pax_global_header 0000666 0000000 0000000 00000000064 14370657153 0014525 g ustar 00root root 0000000 0000000 52 comment=b3bbaeaea20ce8426071eefa24f660fdf9a26e79
golang-github-mmcloughlin-avo-0.5.0/ 0000775 0000000 0000000 00000000000 14370657153 0017355 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/.github/ 0000775 0000000 0000000 00000000000 14370657153 0020715 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/.github/actions/ 0000775 0000000 0000000 00000000000 14370657153 0022355 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/.github/actions/create-pull-request/ 0000775 0000000 0000000 00000000000 14370657153 0026260 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/.github/actions/create-pull-request/action.yml 0000664 0000000 0000000 00000003337 14370657153 0030266 0 ustar 00root root 0000000 0000000 name: create-pull-request
description: Create Pull Request
inputs:
bot:
description: "Bot username"
required: false
default: "cadobot[bot]"
app_id:
description: "Bot App ID"
required: true
app_private_key:
description: "Bot App Private Key"
required: true
title:
description: "Pull request title"
required: true
branch:
description: "Branch name"
required: true
body:
description: "Body of the pull request"
required: true
draft:
description: "Create draft pull request"
required: false
default: false
runs:
using: composite
steps:
- name: Get Bot User
id: bot
uses: actions/github-script@d556feaca394842dc55e4734bf3bb9f685482fa0 # v6.3.3
with:
script: |
const res = await github.rest.users.getByUsername({username: '${{ inputs.bot }}'});
for (const [key, value] of Object.entries(res.data)) {
core.setOutput(key, value)
}
- name: Generate App Token
uses: tibdex/github-app-token@021a2405c7f990db57f5eae5397423dcc554159c # v1.7.0
id: app
with:
app_id: ${{ inputs.app_id }}
private_key: ${{ inputs.app_private_key }}
- name: Create Pull Request
uses: peter-evans/create-pull-request@331d02c7e2104af23ad5974d4d5cbc58a3e6dc77 # v4.2.2
with:
token: ${{ steps.app.outputs.token }}
commit-message: ${{ inputs.title }}
author: "{{ steps.bot.outputs.login }} <${{ steps.bot.outputs.id }}+${{ steps.bot.outputs.login }}@users.noreply.github.com>"
branch: ${{ inputs.branch }}
base: master
delete-branch: true
draft: ${{ inputs.draft }}
title: ${{ inputs.title }}
body: ${{ inputs.body }}
golang-github-mmcloughlin-avo-0.5.0/.github/release.yml 0000664 0000000 0000000 00000000063 14370657153 0023057 0 ustar 00root root 0000000 0000000 changelog:
exclude:
authors:
- cadobot
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/ 0000775 0000000 0000000 00000000000 14370657153 0022752 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/.github/workflows/ci.yml 0000664 0000000 0000000 00000004774 14370657153 0024104 0 ustar 00root root 0000000 0000000 name: ci
permissions:
contents: read
on:
push:
branches:
- master
pull_request:
schedule:
- cron: "17 12 * * 6"
jobs:
# Required job is a stub which only runs when other dependencies complete
# successfully. This is intended to be listed as a required check in a branch
# protection rule.
required:
needs:
- test
- lint
runs-on: ubuntu-latest
steps:
- run: "true"
test:
strategy:
matrix:
go-version: [1.18.x, 1.19.x]
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: ${{ matrix.go-version }}
check-latest: true
- name: Configure Go Environment
run: |
echo GOPATH=${{ runner.workspace }} >> $GITHUB_ENV
echo ${{ runner.workspace }}/bin >> $GITHUB_PATH
- name: Go Environment
run: go env
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Bootstrap
run: ./script/bootstrap
- name: Build
run: go build ./...
- name: Test
run: go test -bench . ./...
- name: Coverage
run: ./script/coverage
- name: Upload Unit Test Coverage
uses: codecov/codecov-action@d9f34f8cd5cb3b3eb79b3e4b5dae3a16df499a70 # v3.1.1
with:
token: ${{ secrets.CODECOV_TOKEN }}
files: unittests.coverprofile
flags: unittests
- name: Upload Integration Test Coverage
uses: codecov/codecov-action@d9f34f8cd5cb3b3eb79b3e4b5dae3a16df499a70 # v3.1.1
with:
token: ${{ secrets.CODECOV_TOKEN }}
files: integration.coverprofile
flags: integration
lint:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Configure Go Environment
run: |
echo GOPATH=${{ runner.workspace }} >> $GITHUB_ENV
echo ${{ runner.workspace }}/bin >> $GITHUB_PATH
- name: Go Environment
run: go env
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Bootstrap
run: ./script/bootstrap
- name: Lint
run: ./script/lint
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/deps.yml 0000664 0000000 0000000 00000001655 14370657153 0024437 0 ustar 00root root 0000000 0000000 name: deps
permissions:
contents: read
on:
schedule:
- cron: "22 5 2 * *"
jobs:
upgrade:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Upgrade Modules
run: go get -u ./...
- name: Tidy
run: go mod tidy
- name: Diff
run: git diff
- name: Create Pull Request
uses: ./.github/actions/create-pull-request
with:
app_id: ${{ secrets.APP_ID }}
app_private_key: ${{ secrets.APP_PRIVATE_KEY }}
branch: auto-upgrade-deps
title: "all: upgrade direct dependencies"
body: "Auto-generated upgrade of module dependencies."
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/metadata.yml 0000664 0000000 0000000 00000002476 14370657153 0025266 0 ustar 00root root 0000000 0000000 name: metadata
permissions:
contents: read
on:
workflow_dispatch:
schedule:
- cron: "24 5 1 * *"
jobs:
update:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
- name: Configure Go Environment
run: |
echo GOPATH=${{ runner.workspace }} >> $GITHUB_ENV
echo ${{ runner.workspace }}/bin >> $GITHUB_PATH
- name: Go Environment
run: go env
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Bootstrap
run: ./script/bootstrap
- name: Update Package Metadata
run: ./script/metadata
- name: Diff
run: git diff
- name: Generate
run: ./script/generate
- name: Diff
run: git diff
- name: Create Pull Request
uses: ./.github/actions/create-pull-request
with:
app_id: ${{ secrets.APP_ID }}
app_private_key: ${{ secrets.APP_PRIVATE_KEY }}
branch: auto-tests-thirdparty-update-metadata
title: "tests/thirdparty: update package metadata"
body: "Auto-generated update of third-party package metadata."
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/packages.yml 0000664 0000000 0000000 00000120071 14370657153 0025254 0 ustar 00root root 0000000 0000000 # Code generated by make_workflow.go. DO NOT EDIT.
name: packages
permissions:
contents: read
on:
push:
branches:
- master
pull_request:
jobs:
zeebo-xxh3:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout zeebo/xxh3
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: zeebo/xxh3
ref: v1.0.0-rc1
path: xxh3
persist-credentials: false
- name: Avo Module Replacement
working-directory: xxh3/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: xxh3/avo
run: |
go run . -avx -out ../accum_vector_avx_amd64.s
go run . -sse -out ../accum_vector_sse_amd64.s
- name: Diff
working-directory: xxh3
run: git diff
- name: Test
working-directory: xxh3
run: go test ./...
dgryski-go-sip13:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout dgryski/go-sip13
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: dgryski/go-sip13
ref: 62edffca92457b3a66125c686137cc5f0fe81672
path: go-sip13
persist-credentials: false
- name: Setup Root Module
working-directory: go-sip13
run: go mod init github.com/dgryski/go-sip13
- name: Setup Generator Module
working-directory: go-sip13/_avo
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/dgryski/go-sip13/_avo
- name: Avo Module Replacement
working-directory: go-sip13/_avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go-sip13/_avo
run: |
go mod edit -modfile=go.mod -require=github.com/dgryski/go-sip13@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/dgryski/go-sip13=../
go run . -out ../sip13_amd64.s
- name: Diff
working-directory: go-sip13
run: git diff
- name: Test
working-directory: go-sip13
run: go test ./...
phoreproject-bls:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout phoreproject/bls
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: phoreproject/bls
ref: a88a5ae26844d7293359422888d7c7f69f43c845
path: bls
persist-credentials: false
- name: Setup Root Module
working-directory: bls
run: go mod tidy
- name: Setup Generator Module
working-directory: bls/asm
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/phoreproject/bls/asm
- name: Avo Module Replacement
working-directory: bls/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: bls/asm
run: |
go mod edit -modfile=go.mod -require=github.com/phoreproject/bls@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/phoreproject/bls=../
go mod download
go run . -out ../primitivefuncs_amd64.s
- name: Diff
working-directory: bls
run: git diff
- name: Test
working-directory: bls
run: go test ./...
minio-md5-simd:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout minio/md5-simd
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: minio/md5-simd
ref: 30ad8af83f6868c2a30c615f3edf1a9366bf3f89
path: md5-simd
persist-credentials: false
- name: Avo Module Replacement
working-directory: md5-simd/_gen
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: md5-simd/_gen
run: go run gen.go -out ../md5block_amd64.s -stubs ../md5block_amd64.go -pkg md5simd
- name: Diff
working-directory: md5-simd
run: git diff
- name: Test
working-directory: md5-simd
run: go test ./...
zeebo-blake3:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout zeebo/blake3
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: zeebo/blake3
ref: 25dba572f0e78ec108f0dd79c9c15288f542d7d9
path: blake3
persist-credentials: false
- name: Avo Module Replacement
working-directory: blake3/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: blake3/avo
run: |
go run ./avx2 -out ../avx2/impl.s
go run ./sse41 -out ../sse41/impl.s
- name: Diff
working-directory: blake3
run: git diff
- name: Test
working-directory: blake3
run: go test ./...
klauspost-reedsolomon:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout klauspost/reedsolomon
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: klauspost/reedsolomon
ref: 922778284547557265cff0f903ab5f4c27e40ae9
path: reedsolomon
persist-credentials: false
- name: Avo Module Replacement
working-directory: reedsolomon/_gen
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: reedsolomon/_gen
run: go run gen.go -out ../galois_gen_amd64.s -stubs ../galois_gen_amd64.go -pkg reedsolomon
- name: Diff
working-directory: reedsolomon
run: git diff
- name: Test
working-directory: reedsolomon
run: go test ./...
orisano-wyhash:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout orisano/wyhash
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: orisano/wyhash
ref: 32a3f7f6ba4797e2d87dab2969cc9dd63d39cce9
path: wyhash
persist-credentials: false
- name: Setup Generator Module
working-directory: wyhash/avo
run: go mod init github.com/orisano/wyhash/avo
- name: Avo Module Replacement
working-directory: wyhash/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: wyhash/avo
run: go run gen.go -out ../blocks_amd64.s -stubs ../blocks_amd64.go -pkg wyhash
- name: Diff
working-directory: wyhash
run: git diff
- name: Test
working-directory: wyhash
run: go test ./...
klauspost-compress-s2:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout klauspost/compress
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: klauspost/compress
ref: 2f236383d7c2faa8ef7e354ccecb926a5b47a24d
path: compress
persist-credentials: false
- name: Avo Module Replacement
working-directory: compress/s2/_generate
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: compress/s2/_generate
run: go generate -v -x
- name: Diff
working-directory: compress/s2
run: git diff
- name: Test
working-directory: compress/s2
run: go test ./...
klauspost-compress-zstd:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout klauspost/compress
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: klauspost/compress
ref: 2f236383d7c2faa8ef7e354ccecb926a5b47a24d
path: compress
persist-credentials: false
- name: Avo Module Replacement
working-directory: compress/zstd/_generate
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: compress/zstd/_generate
run: go generate -v -x
- name: Diff
working-directory: compress/zstd
run: git diff
- name: Test
working-directory: compress/zstd
run: go test -short
dgryski-go-bloomindex:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout dgryski/go-bloomindex
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: dgryski/go-bloomindex
ref: 0902316dce158c154b958ee5cfc706c62af29a42
path: go-bloomindex
persist-credentials: false
- name: Setup Root Module
working-directory: go-bloomindex
run: |
go mod init github.com/dgryski/go-bloomindex
go get github.com/dgryski/go-bits@v0.0.0-20180113010104-bd8a69a71dc2
- name: Create Generator Module
working-directory: go-bloomindex
run: |
mkdir avo
git mv asm.go avo
- name: Setup Generator Module
working-directory: go-bloomindex/avo
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/dgryski/go-bloomindex/avo
- name: Avo Module Replacement
working-directory: go-bloomindex/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go-bloomindex/avo
run: go run asm.go -out ../query_amd64.s
- name: Diff
working-directory: go-bloomindex
run: git diff
- name: Test
working-directory: go-bloomindex
run: go test ./...
dgryski-go-marvin32:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout dgryski/go-marvin32
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: dgryski/go-marvin32
ref: 7d18f4c6ea7c24b29d1c7a670f8ae40b0812f2e3
path: go-marvin32
persist-credentials: false
- name: Setup Root Module
working-directory: go-marvin32
run: go mod init github.com/dgryski/go-marvin32
- name: Create Generator Module
working-directory: go-marvin32
run: |
mkdir avo
git mv asm.go avo
- name: Setup Generator Module
working-directory: go-marvin32/avo
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/dgryski/go-marvin32/avo
- name: Avo Module Replacement
working-directory: go-marvin32/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go-marvin32/avo
run: |
go mod edit -modfile=go.mod -require=github.com/dgryski/go-marvin32@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/dgryski/go-marvin32=../
go run asm.go -out ../marvin_amd64.s
- name: Diff
working-directory: go-marvin32
run: git diff
- name: Test
working-directory: go-marvin32
run: go test ./...
dgryski-go-speck:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout dgryski/go-speck
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: dgryski/go-speck
ref: 5b36d4c08d8840c352a153bf37281434ad550ec0
path: go-speck
persist-credentials: false
- name: Setup Root Module
working-directory: go-speck
run: |
go mod init github.com/dgryski/go-speck
go get github.com/dgryski/go-skipjack@v0.0.0-20150401095227-f3a984a142ab
- name: Create Generator Module
working-directory: go-speck
run: |
mkdir avo
git mv asm.go avo
- name: Setup Generator Module
working-directory: go-speck/avo
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/dgryski/go-speck/avo
- name: Avo Module Replacement
working-directory: go-speck/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go-speck/avo
run: |
go mod edit -modfile=go.mod -require=github.com/dgryski/go-speck@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/dgryski/go-speck=../
go run asm.go -out ../speck_amd64.s
- name: Diff
working-directory: go-speck
run: git diff
- name: Test
working-directory: go-speck
run: go test ./...
dgryski-go-chaskey:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout dgryski/go-chaskey
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: dgryski/go-chaskey
ref: ba454392bc5ab6daae103e15147185f8f4a27dcc
path: go-chaskey
persist-credentials: false
- name: Setup Root Module
working-directory: go-chaskey
run: |
go mod init github.com/dgryski/go-chaskey
go get github.com/dchest/siphash@v1.2.2
- name: Create Generator Module
working-directory: go-chaskey
run: |
mkdir avo
git mv asm.go avo
- name: Setup Generator Module
working-directory: go-chaskey/avo
run: |
sed -i.bak '/+build ignore/d' asm.go
go mod init github.com/dgryski/go-chaskey/avo
- name: Avo Module Replacement
working-directory: go-chaskey/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go-chaskey/avo
run: |
go mod edit -modfile=go.mod -require=github.com/dgryski/go-chaskey@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/dgryski/go-chaskey=../
go run asm.go -out ../core_amd64.s
- name: Diff
working-directory: go-chaskey
run: git diff
- name: Test
working-directory: go-chaskey
run: go test ./...
lukechampine-us-merkle-blake2b:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout lukechampine/us
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: lukechampine/us
ref: dff56a80f83653cb14eeeb57ba6ba3c3e942c412
path: us
persist-credentials: false
- name: Create Generator Module
working-directory: us/merkle/blake2b
run: |
mkdir avo
git mv gen.go avo
- name: Setup Generator Module
working-directory: us/merkle/blake2b/avo
run: |
sed -i.bak '/+build ignore/d' gen.go
go mod init github.com/lukechampine/us/merkle/blake2b/avo
- name: Avo Module Replacement
working-directory: us/merkle/blake2b/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: us/merkle/blake2b/avo
run: go run gen.go -out ../blake2b_amd64.s
- name: Diff
working-directory: us/merkle/blake2b
run: git diff
- name: Test
working-directory: us/merkle/blake2b
run: go test ./...
segmentio-asm:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout segmentio/asm
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: segmentio/asm
ref: 2bf3fdd47b1cdbe8fe020f032caf14891e10a85f
path: asm
persist-credentials: false
- name: Avo Module Replacement
working-directory: asm/build
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: asm
run: make --always-make build
- name: Diff
working-directory: asm
run: git diff
- name: Test
working-directory: asm
run: go test ./...
ericlagergren-lwcrypto-ascon:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout ericlagergren/lwcrypto
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: ericlagergren/lwcrypto
ref: 0c42b05eddc34c58bf8e0cd4250c5cd2c256ea57
path: lwcrypto
persist-credentials: false
- name: Avo Module Replacement
working-directory: lwcrypto/ascon/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: lwcrypto/ascon/asm
run: |
go mod edit -require=github.com/ericlagergren/lwcrypto@v0.0.0-00010101000000-000000000000
go generate -v -x
- name: Diff
working-directory: lwcrypto/ascon
run: git diff
- name: Test
working-directory: lwcrypto/ascon
run: go test ./...
ericlagergren-lwcrypto-grain:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout ericlagergren/lwcrypto
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: ericlagergren/lwcrypto
ref: 0c42b05eddc34c58bf8e0cd4250c5cd2c256ea57
path: lwcrypto
persist-credentials: false
- name: Avo Module Replacement
working-directory: lwcrypto/grain/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: lwcrypto/grain/asm
run: |
go mod edit -require=github.com/ericlagergren/lwcrypto@v0.0.0-00010101000000-000000000000
go generate -v -x
- name: Diff
working-directory: lwcrypto/grain
run: git diff
- name: Test
working-directory: lwcrypto/grain
run: go test ./...
oasisprotocol-curve25519-voi:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout oasisprotocol/curve25519-voi
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: oasisprotocol/curve25519-voi
ref: d5a936accd94ef9da4c0fe9db0a6342dcdcfeadf
path: curve25519-voi
persist-credentials: false
- name: Avo Module Replacement
working-directory: curve25519-voi/internal/asm/amd64
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: curve25519-voi/internal/asm/amd64
run: bash -ex gen.sh
- name: Diff
working-directory: curve25519-voi
run: git diff
- name: Test
working-directory: curve25519-voi
run: go test ./...
oasisprotocol-deoxysii:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout oasisprotocol/deoxysii
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: oasisprotocol/deoxysii
ref: 2091330c22b71dd4e04e15306498e68f3a1b3afc
path: deoxysii
persist-credentials: false
- name: Avo Module Replacement
working-directory: deoxysii/internal/hardware/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: deoxysii/internal/hardware/asm
run: bash -ex gen.sh
- name: Diff
working-directory: deoxysii
run: git diff
- name: Test
working-directory: deoxysii
run: go test ./...
golang-crypto-curve25519:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout golang/crypto
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: golang/crypto
ref: 089bfa5675191fd96a44247682f76ebca03d7916
path: crypto
persist-credentials: false
- name: Avo Module Replacement
working-directory: crypto/curve25519/internal/field/_asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: crypto/curve25519/internal/field/_asm
run: go generate -v -x
- name: Diff
working-directory: crypto/curve25519
run: git diff
- name: Test
working-directory: crypto/curve25519
run: go test ./...
FiloSottile-edwards25519:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout FiloSottile/edwards25519
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: FiloSottile/edwards25519
ref: v1.0.0-rc.1
path: edwards25519
persist-credentials: false
- name: Avo Module Replacement
working-directory: edwards25519/field/_asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: edwards25519/field/_asm
run: go generate -v -x
- name: Diff
working-directory: edwards25519
run: git diff
- name: Test
working-directory: edwards25519
run: go test ./...
lukechampine-blake3:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout lukechampine/blake3
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: lukechampine/blake3
ref: v1.1.7
path: blake3
persist-credentials: false
- name: Setup Generator Module
working-directory: blake3/avo
run: |
sed -i.bak '/build ignore/d' gen.go
go mod init github.com/lukechampine/blake3/avo
- name: Avo Module Replacement
working-directory: blake3/avo
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: blake3/avo
run: go run gen.go -out ../blake3_amd64.s
- name: Diff
working-directory: blake3
run: git diff
- name: Test
working-directory: blake3
run: go test ./...
mmcloughlin-md4:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout mmcloughlin/md4
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: mmcloughlin/md4
ref: v0.1.2
path: md4
persist-credentials: false
- name: Avo Module Replacement
working-directory: md4/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: md4
run: go generate -v -x
- name: Diff
working-directory: md4
run: git diff
- name: Test
working-directory: md4
run: go test ./...
golang-go:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout golang/go
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: golang/go
ref: go1.19
path: go
persist-credentials: false
- name: Compile Go Toolchain
working-directory: go/src
run: ./make.bash
- name: Avo Module Replacement
working-directory: go/src/crypto/internal/edwards25519/field/_asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: go/src/crypto/internal/edwards25519/field/_asm
run: go generate -v -x
- name: Diff
working-directory: go
run: git diff
- name: Test
working-directory: go
run: env --unset=GOROOT ./bin/go test crypto/ed25519/...
cloudflare-circl-sign-dilithium:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout cloudflare/circl
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: cloudflare/circl
ref: v1.1.0
path: circl
persist-credentials: false
- name: Avo Module Replacement
working-directory: circl/sign/dilithium/internal/common/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: circl/sign/dilithium/internal/common/asm
run: go generate -v -x
- name: Diff
working-directory: circl/sign/dilithium
run: git diff
- name: Test
working-directory: circl/sign/dilithium
run: go test ./...
cloudflare-circl-pke-kyber:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout cloudflare/circl
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: cloudflare/circl
ref: v1.1.0
path: circl
persist-credentials: false
- name: Avo Module Replacement
working-directory: circl/pke/kyber/internal/common/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: circl/pke/kyber/internal/common/asm
run: go generate -v -x
- name: Diff
working-directory: circl/pke/kyber
run: git diff
- name: Test
working-directory: circl/pke/kyber
run: go test ./...
cloudflare-circl-simd-keccakf1600:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout avo
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
path: avo
persist-credentials: false
- name: Checkout cloudflare/circl
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
repository: cloudflare/circl
ref: v1.1.0
path: circl
persist-credentials: false
- name: Avo Module Replacement
working-directory: circl/simd/keccakf1600/internal/asm
run: |
go mod edit -modfile=go.mod -require=github.com/mmcloughlin/avo@v0.0.0-00010101000000-000000000000
go mod edit -modfile=go.mod -replace=github.com/mmcloughlin/avo=${{ github.workspace }}/avo
go mod tidy -modfile=go.mod
- name: Generate
working-directory: circl/simd/keccakf1600/internal/asm
run: go generate -v -x
- name: Diff
working-directory: circl/simd/keccakf1600
run: git diff
- name: Test
working-directory: circl/simd/keccakf1600
run: go test ./...
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/pr.yml 0000664 0000000 0000000 00000001173 14370657153 0024120 0 ustar 00root root 0000000 0000000 name: pr
permissions:
contents: read
on:
pull_request:
jobs:
automerge:
runs-on: ubuntu-latest
steps:
- name: Generate Bot Token
uses: tibdex/github-app-token@021a2405c7f990db57f5eae5397423dcc554159c # v1.7.0
id: bot
with:
app_id: ${{ secrets.APP_ID }}
private_key: ${{ secrets.APP_PRIVATE_KEY }}
- name: Automerge Bot Pull Requests
if: github.actor == 'cadobot[bot]' && !github.event.pull_request.draft
run: gh pr merge --auto --squash "${{ github.event.pull_request.html_url }}"
env:
GITHUB_TOKEN: ${{ steps.bot.outputs.token }}
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/stress.yml 0000664 0000000 0000000 00000002430 14370657153 0025017 0 ustar 00root root 0000000 0000000 name: stress
permissions:
contents: read
on:
schedule:
- cron: "33 3 * * 6"
jobs:
test:
runs-on: ubuntu-latest
env:
GOFLAGS: -tags=stress
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Configure Go Environment
run: |
echo GOPATH=${{ runner.workspace }} >> $GITHUB_ENV
echo ${{ runner.workspace }}/bin >> $GITHUB_PATH
- name: Go Environment
run: go env
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Bootstrap
run: ./script/bootstrap
- name: Generate
run: ./script/generate
- name: Status
run: git status
- name: Build
run: go build ./...
- name: Test
run: go test -bench . ./...
- name: Coverage
run: ./script/coverage
- name: Upload Stress Unit Test Coverage
uses: codecov/codecov-action@d9f34f8cd5cb3b3eb79b3e4b5dae3a16df499a70 # v3.1.1
with:
token: ${{ secrets.CODECOV_TOKEN }}
files: unittests.coverprofile
flags: stress
golang-github-mmcloughlin-avo-0.5.0/.github/workflows/thirdparty.yml 0000664 0000000 0000000 00000001274 14370657153 0025673 0 ustar 00root root 0000000 0000000 name: thirdparty
permissions:
contents: read
on:
push:
branches:
- master
paths:
- "tests/thirdparty/**"
pull_request:
paths:
- "tests/thirdparty/**"
jobs:
test:
runs-on: ubuntu-latest
steps:
- name: Install Go
uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1
with:
go-version: 1.19.x
check-latest: true
- name: Checkout code
uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0
with:
persist-credentials: false
- name: Run Third-Party Tests
working-directory: tests/thirdparty
run: go test -net -suite suite.json
golang-github-mmcloughlin-avo-0.5.0/.gitignore 0000664 0000000 0000000 00000000017 14370657153 0021343 0 ustar 00root root 0000000 0000000 *.coverprofile
golang-github-mmcloughlin-avo-0.5.0/.golangci.yml 0000664 0000000 0000000 00000002375 14370657153 0021750 0 ustar 00root root 0000000 0000000 run:
timeout: 5m
linters:
enable-all: true
disable:
- cyclop
- deadcode
- errname
- exhaustruct
- exhaustivestruct
- forbidigo
- forcetypeassert
- funlen
- gochecknoglobals
- gochecknoinits
- godox
- goerr113
- golint
- gomnd
- gosec
- ifshort
- interfacer
- ireturn
- lll
- maligned
- nlreturn
- nonamedreturns
- nosnakecase
- paralleltest
- prealloc
- scopelint
- structcheck
- tagliatelle
- testpackage
- unparam
- varcheck
- varnamelen
- wrapcheck
- wsl
linters-settings:
depguard:
list-type: whitelist
packages:
- github.com/mmcloughlin/avo
- golang.org/x/
gci:
sections:
- standard
- default
- prefix(github.com/mmcloughlin/avo)
issues:
exclude-use-default: false
exclude:
# errcheck: Almost all programs ignore errors on these functions and in most cases it's ok
- Error return value of .((os\.)?std(out|err)\..*|.*Close|.*Flush|os\.Remove(All)?|.*printf?|os\.(Un)?Setenv). is not checked
# gocritic: https://github.com/go-critic/go-critic/issues/762
- " with `(len|cap|real|imag)`"
# We want to allow all caps in certain cases.
- "ALL_CAPS in Go names"
golang-github-mmcloughlin-avo-0.5.0/LICENSE 0000664 0000000 0000000 00000002756 14370657153 0020374 0 ustar 00root root 0000000 0000000 BSD 3-Clause License
Copyright (c) 2018, Michael McLoughlin
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
* Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
golang-github-mmcloughlin-avo-0.5.0/README.md 0000664 0000000 0000000 00000025055 14370657153 0020643 0 ustar 00root root 0000000 0000000
Generate x86 Assembly with Go
`avo` makes high-performance Go assembly easier to write, review and maintain. The `avo` package presents a familiar assembly-like interface that simplifies development without sacrificing performance:
* **Use Go control structures** for assembly generation; `avo` programs _are_ Go programs
* **Register allocation**: write functions with virtual registers and `avo` assigns physical registers for you
* **Automatically load arguments and store return values**: ensure memory offsets are correct for complex structures
* **Generation of stub files** to interface with your Go package
For more about `avo`:
* Introductory talk ["Better `x86` Assembly Generation with Go"](https://www.youtube.com/watch?v=6Y5CZ7_tyA4) at [dotGo 2019](https://2019.dotgo.eu/) ([slides](https://speakerdeck.com/mmcloughlin/better-x86-assembly-generation-with-go))
* [Longer tutorial at Gophercon 2019](https://www.youtube.com/watch?v=WaD8sNqroAw) showing a highly-optimized dot product ([slides](https://speakerdeck.com/mmcloughlin/better-x86-assembly-generation-with-go-gophercon-2019))
* Watch [Filippo Valsorda](https://filippo.io/) live code the [rewrite of `filippo.io/edwards25519` assembly with `avo`](https://vimeo.com/679848853)
* Explore [projects using `avo`](doc/adopters.md)
* Discuss `avo` and general Go assembly topics in the [#assembly](https://gophers.slack.com/archives/C6WDZJ70S) channel of [Gophers Slack](https://invite.slack.golangbridge.org/)
_Note: APIs subject to change while `avo` is still in an experimental phase. You can use it to build [real things](examples) but we suggest you pin a version with your package manager of choice._
## Quick Start
Install `avo` with `go get`:
```
$ go get -u github.com/mmcloughlin/avo
```
`avo` assembly generators are pure Go programs. Here's a function that adds two `uint64` values:
```go
//go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Add", NOSPLIT, "func(x, y uint64) uint64")
Doc("Add adds x and y.")
x := Load(Param("x"), GP64())
y := Load(Param("y"), GP64())
ADDQ(x, y)
Store(y, ReturnIndex(0))
RET()
Generate()
}
```
`go run` this code to see the assembly output. To integrate this into the rest of your Go package we recommend a [`go:generate`](https://blog.golang.org/generate) line to produce the assembly and the corresponding Go stub file.
```go
//go:generate go run asm.go -out add.s -stubs stub.go
```
After running `go generate` the [`add.s`](examples/add/add.s) file will contain the Go assembly.
```s
// Code generated by command: go run asm.go -out add.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Add(x uint64, y uint64) uint64
TEXT ·Add(SB), NOSPLIT, $0-24
MOVQ x+0(FP), AX
MOVQ y+8(FP), CX
ADDQ AX, CX
MOVQ CX, ret+16(FP)
RET
```
The same call will produce the stub file [`stub.go`](examples/add/stub.go) which will enable the function to be called from your Go code.
```go
// Code generated by command: go run asm.go -out add.s -stubs stub.go. DO NOT EDIT.
package add
// Add adds x and y.
func Add(x uint64, y uint64) uint64
```
See the [`examples/add`](examples/add) directory for the complete working example.
## Examples
See [`examples`](examples) for the full suite of examples.
### Slice Sum
Sum a slice of `uint64`s:
```go
func main() {
TEXT("Sum", NOSPLIT, "func(xs []uint64) uint64")
Doc("Sum returns the sum of the elements in xs.")
ptr := Load(Param("xs").Base(), GP64())
n := Load(Param("xs").Len(), GP64())
Comment("Initialize sum register to zero.")
s := GP64()
XORQ(s, s)
Label("loop")
Comment("Loop until zero bytes remain.")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
Comment("Load from pointer and add to running sum.")
ADDQ(Mem{Base: ptr}, s)
Comment("Advance pointer, decrement byte count.")
ADDQ(Imm(8), ptr)
DECQ(n)
JMP(LabelRef("loop"))
Label("done")
Comment("Store sum to return value.")
Store(s, ReturnIndex(0))
RET()
Generate()
}
```
The result from this code generator is:
```s
// Code generated by command: go run asm.go -out sum.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Sum(xs []uint64) uint64
TEXT ·Sum(SB), NOSPLIT, $0-32
MOVQ xs_base+0(FP), AX
MOVQ xs_len+8(FP), CX
// Initialize sum register to zero.
XORQ DX, DX
loop:
// Loop until zero bytes remain.
CMPQ CX, $0x00
JE done
// Load from pointer and add to running sum.
ADDQ (AX), DX
// Advance pointer, decrement byte count.
ADDQ $0x08, AX
DECQ CX
JMP loop
done:
// Store sum to return value.
MOVQ DX, ret+24(FP)
RET
```
Full example at [`examples/sum`](examples/sum).
### Features
For demonstrations of `avo` features:
* **[args](examples/args):** Loading function arguments.
* **[returns](examples/returns):** Building return values.
* **[complex](examples/complex):** Working with `complex{64,128}` types.
* **[data](examples/data):** Defining `DATA` sections.
* **[ext](examples/ext):** Interacting with types from external packages.
* **[pragma](examples/pragma):** Apply compiler directives to generated functions.
### Real Examples
Implementations of full algorithms:
* **[sha1](examples/sha1):** [SHA-1](https://en.wikipedia.org/wiki/SHA-1) cryptographic hash.
* **[fnv1a](examples/fnv1a):** [FNV-1a](https://en.wikipedia.org/wiki/Fowler%E2%80%93Noll%E2%80%93Vo_hash_function#FNV-1a_hash) hash function.
* **[dot](examples/dot):** Vector dot product.
* **[md5x16](examples/md5x16):** AVX-512 accelerated [MD5](https://en.wikipedia.org/wiki/MD5).
* **[geohash](examples/geohash):** Integer [geohash](https://en.wikipedia.org/wiki/Geohash) encoding.
* **[stadtx](examples/stadtx):** [`StadtX` hash](https://github.com/demerphq/BeagleHash) port from [dgryski/go-stadtx](https://github.com/dgryski/go-stadtx).
## Adopters
Popular projects[^projects] using `avo`:
[^projects]: Projects drawn from the `avo` third-party test suite. Popularity
estimated from Github star count collected on Nov 26, 2022.
[golang / **go**](https://github.com/golang/go)
:star: 106.1k
> The Go programming language
[klauspost / **compress**](https://github.com/klauspost/compress)
:star: 3.4k
> Optimized Go Compression Packages
[golang / **crypto**](https://github.com/golang/crypto)
:star: 2.5k
> [mirror] Go supplementary cryptography libraries
[klauspost / **reedsolomon**](https://github.com/klauspost/reedsolomon)
:star: 1.6k
> Reed-Solomon Erasure Coding in Go
[segmentio / **asm**](https://github.com/segmentio/asm)
:star: 776
> Go library providing algorithms optimized to leverage the characteristics of modern CPUs
[cloudflare / **circl**](https://github.com/cloudflare/circl)
:star: 764
> CIRCL: Cloudflare Interoperable Reusable Cryptographic Library
[zeebo / **blake3**](https://github.com/zeebo/blake3)
:star: 322
> Pure Go implementation of BLAKE3 with AVX2 and SSE4.1 acceleration
[zeebo / **xxh3**](https://github.com/zeebo/xxh3)
:star: 290
> XXH3 algorithm in Go
[lukechampine / **blake3**](https://github.com/lukechampine/blake3)
:star: 288
> A pure-Go implementation of the BLAKE3 cryptographic hash function
[minio / **md5-simd**](https://github.com/minio/md5-simd)
:star: 125
> Accelerate aggregated MD5 hashing performance up to 8x for AVX512 and 4x for AVX2. Useful for server applications that need to compute many MD5 sums in parallel.
See the [full list of projects using `avo`](doc/adopters.md).
## Contributing
Contributions to `avo` are welcome:
* Feedback from using `avo` in a real project is incredibly valuable. Consider [porting an existing project to `avo`](https://github.com/mmcloughlin/avo/issues/40).
* [Submit bug reports](https://github.com/mmcloughlin/avo/issues/new) to the issues page.
* Pull requests accepted. Take a look at outstanding [issues](https://github.com/mmcloughlin/avo/issues) for ideas (especially the ["good first issue"](https://github.com/mmcloughlin/avo/labels/good%20first%20issue) label).
* Join us in the [#assembly](https://gophers.slack.com/archives/C6WDZJ70S) channel of [Gophers Slack](https://invite.slack.golangbridge.org/).
## Credits
Inspired by the [PeachPy](https://github.com/Maratyszcza/PeachPy) and [asmjit](https://github.com/asmjit/asmjit) projects. Thanks to [Damian Gryski](https://github.com/dgryski) for advice, and his [extensive library of PeachPy Go projects](https://github.com/mmcloughlin/avo/issues/40).
## License
`avo` is available under the [BSD 3-Clause License](LICENSE).
golang-github-mmcloughlin-avo-0.5.0/attr/ 0000775 0000000 0000000 00000000000 14370657153 0020327 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/attr/attr.go 0000664 0000000 0000000 00000002223 14370657153 0021627 0 ustar 00root root 0000000 0000000 // Package attr provides attributes for text and data sections.
package attr
import (
"fmt"
"math/bits"
"strings"
)
// Attribute represents TEXT or DATA flags.
type Attribute uint16
//go:generate go run make_textflag.go -output ztextflag.go
// Asm returns a representation of the attributes in assembly syntax. This may use macros from "textflags.h"; see ContainsTextFlags() to determine if this header is required.
func (a Attribute) Asm() string {
parts, rest := a.split()
if len(parts) == 0 || rest != 0 {
parts = append(parts, fmt.Sprintf("%d", rest))
}
return strings.Join(parts, "|")
}
// ContainsTextFlags returns whether the Asm() representation requires macros in "textflags.h".
func (a Attribute) ContainsTextFlags() bool {
flags, _ := a.split()
return len(flags) > 0
}
// split splits a into known flags and any remaining bits.
func (a Attribute) split() ([]string, Attribute) {
var flags []string
var rest Attribute
for a != 0 {
i := uint(bits.TrailingZeros16(uint16(a)))
bit := Attribute(1) << i
if flag := attrname[bit]; flag != "" {
flags = append(flags, flag)
} else {
rest |= bit
}
a ^= bit
}
return flags, rest
}
golang-github-mmcloughlin-avo-0.5.0/attr/attr_test.go 0000664 0000000 0000000 00000003544 14370657153 0022675 0 ustar 00root root 0000000 0000000 package attr
import "testing"
func TestAttributeAsm(t *testing.T) {
cases := []struct {
Attribute Attribute
Expect string
}{
{0, "0"},
{32768, "32768"},
{1, "NOPROF"},
{DUPOK, "DUPOK"},
{RODATA | NOSPLIT, "NOSPLIT|RODATA"},
{WRAPPER | 16384 | NOPTR, "NOPTR|WRAPPER|16384"},
{NEEDCTXT + NOFRAME + TLSBSS, "NEEDCTXT|TLSBSS|NOFRAME"},
{REFLECTMETHOD, "REFLECTMETHOD"},
{TOPFRAME, "TOPFRAME"},
}
for _, c := range cases {
got := c.Attribute.Asm()
if got != c.Expect {
t.Errorf("Attribute(%d).Asm() = %#v; expect %#v", c.Attribute, got, c.Expect)
}
}
}
func TestAttributeContainsTextFlags(t *testing.T) {
cases := []struct {
Attribute Attribute
Expect bool
}{
{0, false},
{32768, false},
{1, true},
{DUPOK, true},
{WRAPPER | 16384 | NOPTR, true},
}
for _, c := range cases {
if c.Attribute.ContainsTextFlags() != c.Expect {
t.Errorf("%s: ContainsTextFlags() expected %#v", c.Attribute.Asm(), c.Expect)
}
}
}
func TestAttributeTestMethods(t *testing.T) {
cases := []struct {
Attribute Attribute
Predicate func(Attribute) bool
Expect bool
}{
// Confirm logic works as expected.
{DUPOK | NOSPLIT, Attribute.DUPOK, true},
{DUPOK | NOSPLIT, Attribute.NOSPLIT, true},
{DUPOK | NOSPLIT, Attribute.NOFRAME, false},
// Basic test for every method.
{NOPROF, Attribute.NOPROF, true},
{DUPOK, Attribute.DUPOK, true},
{NOSPLIT, Attribute.NOSPLIT, true},
{RODATA, Attribute.RODATA, true},
{NOPTR, Attribute.NOPTR, true},
{WRAPPER, Attribute.WRAPPER, true},
{NEEDCTXT, Attribute.NEEDCTXT, true},
{TLSBSS, Attribute.TLSBSS, true},
{NOFRAME, Attribute.NOFRAME, true},
{REFLECTMETHOD, Attribute.REFLECTMETHOD, true},
{TOPFRAME, Attribute.TOPFRAME, true},
}
for _, c := range cases {
if c.Predicate(c.Attribute) != c.Expect {
t.Errorf("%s: expected %#v", c.Attribute.Asm(), c.Expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/attr/make_textflag.go 0000664 0000000 0000000 00000010220 14370657153 0023464 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"bufio"
"bytes"
"errors"
"flag"
"fmt"
"go/format"
"io"
"log"
"net/http"
"os"
"path/filepath"
"runtime"
"strconv"
"strings"
)
var (
TextFlagPath = "src/runtime/textflag.h"
TextFlagName = filepath.Base(TextFlagPath)
)
var (
download = flag.Bool("download", false, "download new version of "+TextFlagName)
version = flag.String("version", runtime.Version(), "go version to download file from")
textflag = flag.String("textflag", TextFlagName, "path to "+TextFlagName)
output = flag.String("output", "", "path to output file")
)
func main() {
if err := mainerr(); err != nil {
log.Fatal(err)
}
}
func mainerr() error {
flag.Parse()
// Download new version, if requested.
if *download {
if err := DownloadGoSourceFile(*textflag, *version, TextFlagPath); err != nil {
return err
}
log.Printf("downloaded %q from version %s to %q", TextFlagPath, *version, *textflag)
}
// Parse text flags header.
fs, err := ParseFile(*textflag)
if err != nil {
return err
}
// Determine output.
w := os.Stdout
if *output != "" {
f, err := os.Create(*output)
if err != nil {
return err
}
defer f.Close()
w = f
}
// Generate code and format it.
buf := bytes.NewBuffer(nil)
PrintFlagAttributes(buf, fs)
src, err := format.Source(buf.Bytes())
if err != nil {
return err
}
// Write output.
_, err = w.Write(src)
if err != nil {
return err
}
return nil
}
// DownloadGoSourceFile downloads a Go source file from a specific version.
func DownloadGoSourceFile(outpath, v, srcpath string) (err error) {
// Download from github.
url := "https://github.com/golang/go/raw/" + v + "/" + srcpath
res, err := http.Get(url)
if err != nil {
return err
}
defer func() {
if errc := res.Body.Close(); errc != nil && err == nil {
err = errc
}
}()
// Write to file.
buf := bytes.NewBuffer(nil)
fmt.Fprintf(buf, "// Code generated by downloading from %s. DO NOT EDIT.\n\n", url)
if _, err := io.Copy(buf, res.Body); err != nil {
return err
}
if err := os.WriteFile(outpath, buf.Bytes(), 0o644); err != nil {
return err
}
return nil
}
type Flag struct {
Doc []string
Name string
Value int
}
// Parse text flags header format.
func Parse(r io.Reader) ([]Flag, error) {
var fs []Flag
var doc []string
s := bufio.NewScanner(r)
for s.Scan() {
line := s.Text()
switch {
case strings.Contains(line, "TODO"):
// skip
case strings.HasPrefix(line, "// "):
doc = append(doc, strings.TrimPrefix(line, "// "))
case strings.HasPrefix(line, "#define"):
fields := strings.Fields(line)
if len(fields) != 3 || fields[0] != "#define" {
return nil, fmt.Errorf("unexpected line format %q", line)
}
v, err := strconv.Atoi(fields[2])
if err != nil {
return nil, err
}
fs = append(fs, Flag{
Doc: doc,
Name: fields[1],
Value: v,
})
doc = nil
case line == "" || line == "//":
doc = nil
default:
return nil, errors.New("unexpected format")
}
}
if err := s.Err(); err != nil {
return nil, err
}
return fs, nil
}
// ParseFile parses text flags header file.
func ParseFile(filename string) ([]Flag, error) {
b, err := os.ReadFile(filename)
if err != nil {
return nil, err
}
return Parse(bytes.NewReader(b))
}
func PrintFlagAttributes(w io.Writer, fs []Flag) {
_, self, _, _ := runtime.Caller(0)
fmt.Fprintf(w, "// Code generated by %s. DO NOT EDIT.\n\n", filepath.Base(self))
fmt.Fprintf(w, "package attr\n")
// Attribute constants.
fmt.Fprintf(w, "\n// Attribute values defined in %s.\n", TextFlagName)
fmt.Fprintf(w, "const (\n")
for _, f := range fs {
for _, line := range f.Doc {
fmt.Fprintf(w, "\t// %s\n", line)
}
fmt.Fprintf(w, "\t%s Attribute = %d\n\n", f.Name, f.Value)
}
fmt.Fprintf(w, ")\n")
// String map.
fmt.Fprintf(w, "\nvar attrname = map[Attribute]string{\n")
for _, f := range fs {
fmt.Fprintf(w, "\t%s: %q,\n", f.Name, f.Name)
}
fmt.Fprintf(w, "}\n")
// Flag test methods.
for _, f := range fs {
fmt.Fprintf(w, "\n// %s reports whether the %s flag is set.\n", f.Name, f.Name)
fmt.Fprintf(w, "func (a Attribute) %s() bool { return (a & %s) != 0 }\n", f.Name, f.Name)
}
}
golang-github-mmcloughlin-avo-0.5.0/attr/textflag.h 0000664 0000000 0000000 00000003113 14370657153 0022314 0 ustar 00root root 0000000 0000000 // Code generated by downloading from https://github.com/golang/go/raw/go1.16.2/src/runtime/textflag.h. DO NOT EDIT.
// Copyright 2013 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
// This file defines flags attached to various functions
// and data objects. The compilers, assemblers, and linker must
// all agree on these values.
//
// Keep in sync with src/cmd/internal/obj/textflag.go.
// Don't profile the marked routine. This flag is deprecated.
#define NOPROF 1
// It is ok for the linker to get multiple of these symbols. It will
// pick one of the duplicates to use.
#define DUPOK 2
// Don't insert stack check preamble.
#define NOSPLIT 4
// Put this data in a read-only section.
#define RODATA 8
// This data contains no pointers.
#define NOPTR 16
// This is a wrapper function and should not count as disabling 'recover'.
#define WRAPPER 32
// This function uses its incoming context register.
#define NEEDCTXT 64
// Allocate a word of thread local storage and store the offset from the
// thread local base to the thread local storage in this variable.
#define TLSBSS 256
// Do not insert instructions to allocate a stack frame for this function.
// Only valid on functions that declare a frame size of 0.
// TODO(mwhudson): only implemented for ppc64x at present.
#define NOFRAME 512
// Function can call reflect.Type.Method or reflect.Type.MethodByName.
#define REFLECTMETHOD 1024
// Function is the top of the call stack. Call stack unwinders should stop
// at this function.
#define TOPFRAME 2048
golang-github-mmcloughlin-avo-0.5.0/attr/ztextflag.go 0000664 0000000 0000000 00000005515 14370657153 0022674 0 ustar 00root root 0000000 0000000 // Code generated by make_textflag.go. DO NOT EDIT.
package attr
// Attribute values defined in textflag.h.
const (
// Don't profile the marked routine. This flag is deprecated.
NOPROF Attribute = 1
// It is ok for the linker to get multiple of these symbols. It will
// pick one of the duplicates to use.
DUPOK Attribute = 2
// Don't insert stack check preamble.
NOSPLIT Attribute = 4
// Put this data in a read-only section.
RODATA Attribute = 8
// This data contains no pointers.
NOPTR Attribute = 16
// This is a wrapper function and should not count as disabling 'recover'.
WRAPPER Attribute = 32
// This function uses its incoming context register.
NEEDCTXT Attribute = 64
// Allocate a word of thread local storage and store the offset from the
// thread local base to the thread local storage in this variable.
TLSBSS Attribute = 256
// Do not insert instructions to allocate a stack frame for this function.
// Only valid on functions that declare a frame size of 0.
NOFRAME Attribute = 512
// Function can call reflect.Type.Method or reflect.Type.MethodByName.
REFLECTMETHOD Attribute = 1024
// Function is the top of the call stack. Call stack unwinders should stop
// at this function.
TOPFRAME Attribute = 2048
)
var attrname = map[Attribute]string{
NOPROF: "NOPROF",
DUPOK: "DUPOK",
NOSPLIT: "NOSPLIT",
RODATA: "RODATA",
NOPTR: "NOPTR",
WRAPPER: "WRAPPER",
NEEDCTXT: "NEEDCTXT",
TLSBSS: "TLSBSS",
NOFRAME: "NOFRAME",
REFLECTMETHOD: "REFLECTMETHOD",
TOPFRAME: "TOPFRAME",
}
// NOPROF reports whether the NOPROF flag is set.
func (a Attribute) NOPROF() bool { return (a & NOPROF) != 0 }
// DUPOK reports whether the DUPOK flag is set.
func (a Attribute) DUPOK() bool { return (a & DUPOK) != 0 }
// NOSPLIT reports whether the NOSPLIT flag is set.
func (a Attribute) NOSPLIT() bool { return (a & NOSPLIT) != 0 }
// RODATA reports whether the RODATA flag is set.
func (a Attribute) RODATA() bool { return (a & RODATA) != 0 }
// NOPTR reports whether the NOPTR flag is set.
func (a Attribute) NOPTR() bool { return (a & NOPTR) != 0 }
// WRAPPER reports whether the WRAPPER flag is set.
func (a Attribute) WRAPPER() bool { return (a & WRAPPER) != 0 }
// NEEDCTXT reports whether the NEEDCTXT flag is set.
func (a Attribute) NEEDCTXT() bool { return (a & NEEDCTXT) != 0 }
// TLSBSS reports whether the TLSBSS flag is set.
func (a Attribute) TLSBSS() bool { return (a & TLSBSS) != 0 }
// NOFRAME reports whether the NOFRAME flag is set.
func (a Attribute) NOFRAME() bool { return (a & NOFRAME) != 0 }
// REFLECTMETHOD reports whether the REFLECTMETHOD flag is set.
func (a Attribute) REFLECTMETHOD() bool { return (a & REFLECTMETHOD) != 0 }
// TOPFRAME reports whether the TOPFRAME flag is set.
func (a Attribute) TOPFRAME() bool { return (a & TOPFRAME) != 0 }
golang-github-mmcloughlin-avo-0.5.0/build/ 0000775 0000000 0000000 00000000000 14370657153 0020454 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/build/attr.go 0000664 0000000 0000000 00000000712 14370657153 0021755 0 ustar 00root root 0000000 0000000 package build
import "github.com/mmcloughlin/avo/attr"
// TEXT and DATA attribute values included for convenience.
const (
NOPROF = attr.NOPROF
DUPOK = attr.DUPOK
NOSPLIT = attr.NOSPLIT
RODATA = attr.RODATA
NOPTR = attr.NOPTR
WRAPPER = attr.WRAPPER
NEEDCTXT = attr.NEEDCTXT
TLSBSS = attr.TLSBSS
NOFRAME = attr.NOFRAME
REFLECTMETHOD = attr.REFLECTMETHOD
TOPFRAME = attr.TOPFRAME
)
golang-github-mmcloughlin-avo-0.5.0/build/cli.go 0000664 0000000 0000000 00000006715 14370657153 0021563 0 ustar 00root root 0000000 0000000 package build
import (
"flag"
"io"
"log"
"os"
"runtime/pprof"
"github.com/mmcloughlin/avo/pass"
"github.com/mmcloughlin/avo/printer"
)
// Config contains options for an avo main function.
type Config struct {
ErrOut io.Writer
MaxErrors int // max errors to report; 0 means unlimited
CPUProfile io.WriteCloser
Passes []pass.Interface
}
// Main is the standard main function for an avo program. This extracts the
// result from the build Context (logging and exiting on error), and performs
// configured passes.
func Main(cfg *Config, context *Context) int {
diag := log.New(cfg.ErrOut, "", 0)
if cfg.CPUProfile != nil {
defer cfg.CPUProfile.Close()
if err := pprof.StartCPUProfile(cfg.CPUProfile); err != nil {
diag.Println("could not start CPU profile: ", err)
return 1
}
defer pprof.StopCPUProfile()
}
f, err := context.Result()
if err != nil {
LogError(diag, err, cfg.MaxErrors)
return 1
}
p := pass.Concat(cfg.Passes...)
if err := p.Execute(f); err != nil {
diag.Println(err)
return 1
}
return 0
}
// Flags represents CLI flags for an avo program.
type Flags struct {
errout *outputValue
allerrors bool
cpuprof *outputValue
pkg string
printers []*printerValue
}
// NewFlags initializes avo flags for the given FlagSet.
func NewFlags(fs *flag.FlagSet) *Flags {
f := &Flags{}
f.errout = newOutputValue(os.Stderr)
fs.Var(f.errout, "log", "diagnostics output")
fs.BoolVar(&f.allerrors, "e", false, "no limit on number of errors reported")
f.cpuprof = newOutputValue(nil)
fs.Var(f.cpuprof, "cpuprofile", "write cpu profile to `file`")
fs.StringVar(&f.pkg, "pkg", "", "package name (defaults to current directory name)")
goasm := newPrinterValue(printer.NewGoAsm, os.Stdout)
fs.Var(goasm, "out", "assembly output")
f.printers = append(f.printers, goasm)
stubs := newPrinterValue(printer.NewStubs, nil)
fs.Var(stubs, "stubs", "go stub file")
f.printers = append(f.printers, stubs)
return f
}
// Config builds a configuration object based on flag values.
func (f *Flags) Config() *Config {
pc := printer.NewGoRunConfig()
if f.pkg != "" {
pc.Pkg = f.pkg
}
passes := []pass.Interface{pass.Compile}
for _, pv := range f.printers {
p := pv.Build(pc)
if p != nil {
passes = append(passes, p)
}
}
cfg := &Config{
ErrOut: f.errout.w,
MaxErrors: 10,
CPUProfile: f.cpuprof.w,
Passes: passes,
}
if f.allerrors {
cfg.MaxErrors = 0
}
return cfg
}
type outputValue struct {
w io.WriteCloser
filename string
}
func newOutputValue(dflt io.WriteCloser) *outputValue {
return &outputValue{w: dflt}
}
func (o *outputValue) String() string {
if o == nil {
return ""
}
return o.filename
}
func (o *outputValue) Set(s string) error {
o.filename = s
if s == "-" {
o.w = nopwritecloser{os.Stdout}
return nil
}
f, err := os.Create(s)
if err != nil {
return err
}
o.w = f
return nil
}
type printerValue struct {
*outputValue
Builder printer.Builder
}
func newPrinterValue(b printer.Builder, dflt io.WriteCloser) *printerValue {
return &printerValue{
outputValue: newOutputValue(dflt),
Builder: b,
}
}
func (p *printerValue) Build(cfg printer.Config) pass.Interface {
if p.outputValue.w == nil {
return nil
}
return &pass.Output{
Writer: p.outputValue.w,
Printer: p.Builder(cfg),
}
}
// nopwritecloser wraps a Writer and provides a null implementation of Close().
type nopwritecloser struct {
io.Writer
}
func (nopwritecloser) Close() error { return nil }
golang-github-mmcloughlin-avo-0.5.0/build/context.go 0000664 0000000 0000000 00000013503 14370657153 0022471 0 ustar 00root root 0000000 0000000 package build
import (
"errors"
"fmt"
"go/types"
"golang.org/x/tools/go/packages"
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/gotypes"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
//go:generate avogen -output zinstructions.go build
//go:generate avogen -output zinstructions_test.go buildtest
// Context maintains state for incrementally building an avo File.
type Context struct {
pkg *packages.Package
file *ir.File
function *ir.Function
global *ir.Global
errs ErrorList
reg.Collection
}
// NewContext initializes an empty build Context.
func NewContext() *Context {
return &Context{
file: ir.NewFile(),
Collection: *reg.NewCollection(),
}
}
// Package sets the package the generated file will belong to. Required to be able to reference types in the package.
func (c *Context) Package(path string) {
cfg := &packages.Config{
Mode: packages.NeedTypes | packages.NeedDeps | packages.NeedImports,
}
pkgs, err := packages.Load(cfg, path)
if err != nil {
c.adderror(err)
return
}
pkg := pkgs[0]
if len(pkg.Errors) > 0 {
for _, err := range pkg.Errors {
c.adderror(err)
}
return
}
c.pkg = pkg
}
// Constraints sets build constraints for the file.
func (c *Context) Constraints(t buildtags.ConstraintsConvertable) {
cs := t.ToConstraints()
if err := cs.Validate(); err != nil {
c.adderror(err)
return
}
c.file.Constraints = cs
}
// Constraint appends a constraint to the file's build constraints.
func (c *Context) Constraint(t buildtags.ConstraintConvertable) {
c.Constraints(append(c.file.Constraints, t.ToConstraint()))
}
// ConstraintExpr appends a constraint to the file's build constraints. The
// constraint to add is parsed from the given expression. The expression should
// look the same as the content following "// +build " in regular build
// constraint comments.
func (c *Context) ConstraintExpr(expr string) {
constraint, err := buildtags.ParseConstraint(expr)
if err != nil {
c.adderror(err)
return
}
c.Constraint(constraint)
}
// Function starts building a new function with the given name.
func (c *Context) Function(name string) {
c.function = ir.NewFunction(name)
c.file.AddSection(c.function)
}
// Doc sets documentation comment lines for the currently active function.
func (c *Context) Doc(lines ...string) {
c.activefunc().Doc = lines
}
// Pragma adds a compiler directive to the currently active function.
func (c *Context) Pragma(directive string, args ...string) {
c.activefunc().AddPragma(directive, args...)
}
// Attributes sets function attributes for the currently active function.
func (c *Context) Attributes(a attr.Attribute) {
c.activefunc().Attributes = a
}
// Signature sets the signature for the currently active function.
func (c *Context) Signature(s *gotypes.Signature) {
c.activefunc().SetSignature(s)
}
// SignatureExpr parses the signature expression and sets it as the active function's signature.
func (c *Context) SignatureExpr(expr string) {
s, err := gotypes.ParseSignatureInPackage(c.types(), expr)
if err != nil {
c.adderror(err)
return
}
c.Signature(s)
}
// Implement starts building a function of the given name, whose type is
// specified by a stub in the containing package.
func (c *Context) Implement(name string) {
pkg := c.types()
if pkg == nil {
c.adderrormessage("no package specified")
return
}
s, err := gotypes.LookupSignature(pkg, name)
if err != nil {
c.adderror(err)
return
}
c.Function(name)
c.Signature(s)
}
func (c *Context) types() *types.Package {
if c.pkg == nil {
return nil
}
return c.pkg.Types
}
// AllocLocal allocates size bytes in the stack of the currently active function.
// Returns a reference to the base pointer for the newly allocated region.
func (c *Context) AllocLocal(size int) operand.Mem {
return c.activefunc().AllocLocal(size)
}
// Instruction adds an instruction to the active function.
func (c *Context) Instruction(i *ir.Instruction) {
c.activefunc().AddInstruction(i)
}
// Label adds a label to the active function.
func (c *Context) Label(name string) {
c.activefunc().AddLabel(ir.Label(name))
}
// Comment adds comment lines to the active function.
func (c *Context) Comment(lines ...string) {
c.activefunc().AddComment(lines...)
}
// Commentf adds a formtted comment line.
func (c *Context) Commentf(format string, a ...interface{}) {
c.Comment(fmt.Sprintf(format, a...))
}
func (c *Context) activefunc() *ir.Function {
if c.function == nil {
c.adderrormessage("no active function")
return ir.NewFunction("")
}
return c.function
}
// StaticGlobal adds a new static data section to the file and returns a pointer to it.
func (c *Context) StaticGlobal(name string) operand.Mem {
c.global = ir.NewStaticGlobal(name)
c.file.AddSection(c.global)
return c.global.Base()
}
// DataAttributes sets the attributes on the current active global data section.
func (c *Context) DataAttributes(a attr.Attribute) {
c.activeglobal().Attributes = a
}
// AddDatum adds constant v at offset to the current active global data section.
func (c *Context) AddDatum(offset int, v operand.Constant) {
if err := c.activeglobal().AddDatum(ir.NewDatum(offset, v)); err != nil {
c.adderror(err)
}
}
// AppendDatum appends a constant to the current active global data section.
func (c *Context) AppendDatum(v operand.Constant) {
c.activeglobal().Append(v)
}
func (c *Context) activeglobal() *ir.Global {
if c.global == nil {
c.adderrormessage("no active global")
return ir.NewStaticGlobal("")
}
return c.global
}
func (c *Context) adderror(err error) {
c.errs.addext(err)
}
func (c *Context) adderrormessage(msg string) {
c.adderror(errors.New(msg))
}
// Result returns the built file and any accumulated errors.
func (c *Context) Result() (*ir.File, error) {
return c.file, c.errs.Err()
}
golang-github-mmcloughlin-avo-0.5.0/build/doc.go 0000664 0000000 0000000 00000000152 14370657153 0021546 0 ustar 00root root 0000000 0000000 // Package build provides an assembly-like interface for incremental building of avo Files.
package build
golang-github-mmcloughlin-avo-0.5.0/build/error.go 0000664 0000000 0000000 00000004010 14370657153 0022127 0 ustar 00root root 0000000 0000000 package build
import (
"errors"
"fmt"
"log"
"github.com/mmcloughlin/avo/internal/stack"
"github.com/mmcloughlin/avo/src"
)
// Error represents an error during building, optionally tagged with the position at which it happened.
type Error struct {
Position src.Position
Err error
}
// exterr constructs an Error with position derived from the first frame in the
// call stack outside this package.
func exterr(err error) Error {
e := Error{Err: err}
if f := stack.ExternalCaller(); f != nil {
e.Position = src.FramePosition(*f).Relwd()
}
return e
}
func (e Error) Error() string {
msg := e.Err.Error()
if e.Position.IsValid() {
return e.Position.String() + ": " + msg
}
return msg
}
// ErrorList is a collection of errors for a source file.
type ErrorList []Error
// Add appends an error to the list.
func (e *ErrorList) Add(err Error) {
*e = append(*e, err)
}
// AddAt appends an error at position p.
func (e *ErrorList) AddAt(p src.Position, err error) {
e.Add(Error{p, err})
}
// addext appends an error to the list, tagged with the first external position
// outside this package.
func (e *ErrorList) addext(err error) {
e.Add(exterr(err))
}
// Err returns an error equivalent to this error list.
// If the list is empty, Err returns nil.
func (e ErrorList) Err() error {
if len(e) == 0 {
return nil
}
return e
}
// Error implements the error interface.
func (e ErrorList) Error() string {
switch len(e) {
case 0:
return "no errors"
case 1:
return e[0].Error()
}
return fmt.Sprintf("%s (and %d more errors)", e[0], len(e)-1)
}
// LogError logs a list of errors, one error per line, if the err parameter is
// an ErrorList. Otherwise it just logs the err string. Reports at most max
// errors, or unlimited if max is 0.
func LogError(l *log.Logger, err error, max int) {
var list ErrorList
if errors.As(err, &list) {
for i, e := range list {
if max > 0 && i == max {
l.Print("too many errors")
return
}
l.Printf("%s\n", e)
}
} else if err != nil {
l.Printf("%s\n", err)
}
}
golang-github-mmcloughlin-avo-0.5.0/build/error_test.go 0000664 0000000 0000000 00000002754 14370657153 0023203 0 ustar 00root root 0000000 0000000 package build
import (
"bytes"
"errors"
"fmt"
"log"
"testing"
"github.com/mmcloughlin/avo/src"
)
func TestLogErrorNil(t *testing.T) {
var buf bytes.Buffer
l := log.New(&buf, "prefix: ", 0)
LogError(l, nil, 0)
if buf.String() != "" {
t.Fatalf("should print nothing for nil error")
}
}
func TestLogErrorNonErrorList(t *testing.T) {
var buf bytes.Buffer
l := log.New(&buf, "prefix: ", 0)
err := errors.New("not an ErrorList")
LogError(l, err, 0)
got := buf.String()
expect := "prefix: " + err.Error() + "\n"
if got != expect {
t.Fatalf("got\t%q\nexpect\t%q\n", got, expect)
}
}
func TestLogErrorList(t *testing.T) {
var buf bytes.Buffer
l := log.New(&buf, "prefix: ", 0)
e := ErrorList{}
filename := "asm.go"
err := errors.New("some kind of error")
n := 7
for i := 1; i <= n; i++ {
p := src.Position{Filename: filename, Line: i}
e.AddAt(p, err)
}
expect := ""
// Unlimited print.
LogError(l, e, 0)
for i := 1; i <= n; i++ {
expect += fmt.Sprintf("prefix: %s:%d: some kind of error\n", filename, i)
}
// Max equal to number of errors.
LogError(l, e, n)
for i := 1; i <= n; i++ {
expect += fmt.Sprintf("prefix: %s:%d: some kind of error\n", filename, i)
}
// Max less than number of errors.
m := n / 2
LogError(l, e, m)
for i := 1; i <= m; i++ {
expect += fmt.Sprintf("prefix: %s:%d: some kind of error\n", filename, i)
}
expect += "prefix: too many errors\n"
got := buf.String()
if got != expect {
t.Fatalf("got\n%s\nexpect\n%s\n", got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/build/global.go 0000664 0000000 0000000 00000014227 14370657153 0022251 0 ustar 00root root 0000000 0000000 package build
import (
"flag"
"os"
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/gotypes"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
// ctx provides a global build context.
var ctx = NewContext()
// TEXT starts building a new function called name, with attributes a, and sets its signature (see SignatureExpr).
func TEXT(name string, a attr.Attribute, signature string) {
ctx.Function(name)
ctx.Attributes(a)
ctx.SignatureExpr(signature)
}
// GLOBL declares a new static global data section with the given attributes.
func GLOBL(name string, a attr.Attribute) operand.Mem {
// TODO(mbm): should this be static?
g := ctx.StaticGlobal(name)
ctx.DataAttributes(a)
return g
}
// DATA adds a data value to the active data section.
func DATA(offset int, v operand.Constant) {
ctx.AddDatum(offset, v)
}
var flags = NewFlags(flag.CommandLine)
// Generate builds and compiles the avo file built with the global context. This
// should be the final line of any avo program. Configuration is determined from command-line flags.
func Generate() {
if !flag.Parsed() {
flag.Parse()
}
cfg := flags.Config()
status := Main(cfg, ctx)
// To record coverage of integration tests we wrap main() functions in a test
// functions. In this case we need the main function to terminate, therefore we
// only exit for failure status codes.
if status != 0 {
os.Exit(status)
}
}
// Package sets the package the generated file will belong to. Required to be able to reference types in the package.
func Package(path string) { ctx.Package(path) }
// Constraints sets build constraints for the file.
func Constraints(t buildtags.ConstraintsConvertable) { ctx.Constraints(t) }
// Constraint appends a constraint to the file's build constraints.
func Constraint(t buildtags.ConstraintConvertable) { ctx.Constraint(t) }
// ConstraintExpr appends a constraint to the file's build constraints. The
// constraint to add is parsed from the given expression. The expression should
// look the same as the content following "// +build " in regular build
// constraint comments.
func ConstraintExpr(expr string) { ctx.ConstraintExpr(expr) }
// GP8L allocates and returns a general-purpose 8-bit register (low byte).
func GP8L() reg.GPVirtual { return ctx.GP8L() }
// GP8H allocates and returns a general-purpose 8-bit register (high byte).
func GP8H() reg.GPVirtual { return ctx.GP8H() }
// GP8 allocates and returns a general-purpose 8-bit register (low byte).
func GP8() reg.GPVirtual { return ctx.GP8() }
// GP16 allocates and returns a general-purpose 16-bit register.
func GP16() reg.GPVirtual { return ctx.GP16() }
// GP32 allocates and returns a general-purpose 32-bit register.
func GP32() reg.GPVirtual { return ctx.GP32() }
// GP64 allocates and returns a general-purpose 64-bit register.
func GP64() reg.GPVirtual { return ctx.GP64() }
// XMM allocates and returns a 128-bit vector register.
func XMM() reg.VecVirtual { return ctx.XMM() }
// YMM allocates and returns a 256-bit vector register.
func YMM() reg.VecVirtual { return ctx.YMM() }
// ZMM allocates and returns a 512-bit vector register.
func ZMM() reg.VecVirtual { return ctx.ZMM() }
// K allocates and returns an opmask register.
func K() reg.OpmaskVirtual { return ctx.K() }
// Param returns a the named argument of the active function.
func Param(name string) gotypes.Component { return ctx.Param(name) }
// ParamIndex returns the ith argument of the active function.
func ParamIndex(i int) gotypes.Component { return ctx.ParamIndex(i) }
// Return returns a the named return value of the active function.
func Return(name string) gotypes.Component { return ctx.Return(name) }
// ReturnIndex returns the ith argument of the active function.
func ReturnIndex(i int) gotypes.Component { return ctx.ReturnIndex(i) }
// Load the function argument src into register dst. Returns the destination
// register. This is syntactic sugar: it will attempt to select the right MOV
// instruction based on the types involved.
func Load(src gotypes.Component, dst reg.Register) reg.Register { return ctx.Load(src, dst) }
// Store register src into return value dst. This is syntactic sugar: it will
// attempt to select the right MOV instruction based on the types involved.
func Store(src reg.Register, dst gotypes.Component) { ctx.Store(src, dst) }
// Dereference loads a pointer and returns its element type.
func Dereference(ptr gotypes.Component) gotypes.Component { return ctx.Dereference(ptr) }
// Function starts building a new function with the given name.
func Function(name string) { ctx.Function(name) }
// Doc sets documentation comment lines for the currently active function.
func Doc(lines ...string) { ctx.Doc(lines...) }
// Pragma adds a compiler directive to the currently active function.
func Pragma(directive string, args ...string) { ctx.Pragma(directive, args...) }
// Attributes sets function attributes for the currently active function.
func Attributes(a attr.Attribute) { ctx.Attributes(a) }
// SignatureExpr parses the signature expression and sets it as the active function's signature.
func SignatureExpr(expr string) { ctx.SignatureExpr(expr) }
// Implement starts building a function of the given name, whose type is
// specified by a stub in the containing package.
func Implement(name string) { ctx.Implement(name) }
// AllocLocal allocates size bytes in the stack of the currently active function.
// Returns a reference to the base pointer for the newly allocated region.
func AllocLocal(size int) operand.Mem { return ctx.AllocLocal(size) }
// Label adds a label to the active function.
func Label(name string) { ctx.Label(name) }
// Comment adds comment lines to the active function.
func Comment(lines ...string) { ctx.Comment(lines...) }
// Commentf adds a formtted comment line.
func Commentf(format string, a ...interface{}) { ctx.Commentf(format, a...) }
// ConstData builds a static data section containing just the given constant.
func ConstData(name string, v operand.Constant) operand.Mem { return ctx.ConstData(name, v) }
// Instruction adds an instruction to the active function.
func Instruction(i *ir.Instruction) { ctx.Instruction(i) }
golang-github-mmcloughlin-avo-0.5.0/build/pseudo.go 0000664 0000000 0000000 00000004220 14370657153 0022300 0 ustar 00root root 0000000 0000000 package build
import (
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/gotypes"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
//go:generate avogen -output zmov.go mov
// Param returns a the named argument of the active function.
func (c *Context) Param(name string) gotypes.Component {
return c.activefunc().Signature.Params().Lookup(name)
}
// ParamIndex returns the ith argument of the active function.
func (c *Context) ParamIndex(i int) gotypes.Component {
return c.activefunc().Signature.Params().At(i)
}
// Return returns a the named return value of the active function.
func (c *Context) Return(name string) gotypes.Component {
return c.activefunc().Signature.Results().Lookup(name)
}
// ReturnIndex returns the ith argument of the active function.
func (c *Context) ReturnIndex(i int) gotypes.Component {
return c.activefunc().Signature.Results().At(i)
}
// Load the function argument src into register dst. Returns the destination
// register. This is syntactic sugar: it will attempt to select the right MOV
// instruction based on the types involved.
func (c *Context) Load(src gotypes.Component, dst reg.Register) reg.Register {
b, err := src.Resolve()
if err != nil {
c.adderror(err)
return dst
}
c.mov(b.Addr, dst, int(gotypes.Sizes.Sizeof(b.Type)), int(dst.Size()), b.Type)
return dst
}
// Store register src into return value dst. This is syntactic sugar: it will
// attempt to select the right MOV instruction based on the types involved.
func (c *Context) Store(src reg.Register, dst gotypes.Component) {
b, err := dst.Resolve()
if err != nil {
c.adderror(err)
return
}
c.mov(src, b.Addr, int(src.Size()), int(gotypes.Sizes.Sizeof(b.Type)), b.Type)
}
// Dereference loads a pointer and returns its element type.
func (c *Context) Dereference(ptr gotypes.Component) gotypes.Component {
r := c.GP64()
c.Load(ptr, r)
return ptr.Dereference(r)
}
// ConstData builds a static data section containing just the given constant.
func (c *Context) ConstData(name string, v operand.Constant) operand.Mem {
g := c.StaticGlobal(name)
c.DataAttributes(attr.RODATA | attr.NOPTR)
c.AppendDatum(v)
return g
}
golang-github-mmcloughlin-avo-0.5.0/build/zinstructions.go 0000664 0000000 0000000 00011461471 14370657153 0023760 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zinstructions.go build. DO NOT EDIT.
package build
import (
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/x86"
)
func (c *Context) addinstruction(i *ir.Instruction, err error) {
if err == nil {
c.Instruction(i)
} else {
c.adderror(err)
}
}
// ADCB: Add with Carry.
//
// Forms:
//
// ADCB imm8 al
// ADCB imm8 m8
// ADCB imm8 r8
// ADCB m8 r8
// ADCB r8 m8
// ADCB r8 r8
//
// Construct and append a ADCB instruction to the active function.
func (c *Context) ADCB(imr, amr operand.Op) {
c.addinstruction(x86.ADCB(imr, amr))
}
// ADCB: Add with Carry.
//
// Forms:
//
// ADCB imm8 al
// ADCB imm8 m8
// ADCB imm8 r8
// ADCB m8 r8
// ADCB r8 m8
// ADCB r8 r8
//
// Construct and append a ADCB instruction to the active function.
// Operates on the global context.
func ADCB(imr, amr operand.Op) { ctx.ADCB(imr, amr) }
// ADCL: Add with Carry.
//
// Forms:
//
// ADCL imm32 eax
// ADCL imm32 m32
// ADCL imm32 r32
// ADCL imm8 m32
// ADCL imm8 r32
// ADCL m32 r32
// ADCL r32 m32
// ADCL r32 r32
//
// Construct and append a ADCL instruction to the active function.
func (c *Context) ADCL(imr, emr operand.Op) {
c.addinstruction(x86.ADCL(imr, emr))
}
// ADCL: Add with Carry.
//
// Forms:
//
// ADCL imm32 eax
// ADCL imm32 m32
// ADCL imm32 r32
// ADCL imm8 m32
// ADCL imm8 r32
// ADCL m32 r32
// ADCL r32 m32
// ADCL r32 r32
//
// Construct and append a ADCL instruction to the active function.
// Operates on the global context.
func ADCL(imr, emr operand.Op) { ctx.ADCL(imr, emr) }
// ADCQ: Add with Carry.
//
// Forms:
//
// ADCQ imm32 m64
// ADCQ imm32 r64
// ADCQ imm32 rax
// ADCQ imm8 m64
// ADCQ imm8 r64
// ADCQ m64 r64
// ADCQ r64 m64
// ADCQ r64 r64
//
// Construct and append a ADCQ instruction to the active function.
func (c *Context) ADCQ(imr, mr operand.Op) {
c.addinstruction(x86.ADCQ(imr, mr))
}
// ADCQ: Add with Carry.
//
// Forms:
//
// ADCQ imm32 m64
// ADCQ imm32 r64
// ADCQ imm32 rax
// ADCQ imm8 m64
// ADCQ imm8 r64
// ADCQ m64 r64
// ADCQ r64 m64
// ADCQ r64 r64
//
// Construct and append a ADCQ instruction to the active function.
// Operates on the global context.
func ADCQ(imr, mr operand.Op) { ctx.ADCQ(imr, mr) }
// ADCW: Add with Carry.
//
// Forms:
//
// ADCW imm16 ax
// ADCW imm16 m16
// ADCW imm16 r16
// ADCW imm8 m16
// ADCW imm8 r16
// ADCW m16 r16
// ADCW r16 m16
// ADCW r16 r16
//
// Construct and append a ADCW instruction to the active function.
func (c *Context) ADCW(imr, amr operand.Op) {
c.addinstruction(x86.ADCW(imr, amr))
}
// ADCW: Add with Carry.
//
// Forms:
//
// ADCW imm16 ax
// ADCW imm16 m16
// ADCW imm16 r16
// ADCW imm8 m16
// ADCW imm8 r16
// ADCW m16 r16
// ADCW r16 m16
// ADCW r16 r16
//
// Construct and append a ADCW instruction to the active function.
// Operates on the global context.
func ADCW(imr, amr operand.Op) { ctx.ADCW(imr, amr) }
// ADCXL: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXL m32 r32
// ADCXL r32 r32
//
// Construct and append a ADCXL instruction to the active function.
func (c *Context) ADCXL(mr, r operand.Op) {
c.addinstruction(x86.ADCXL(mr, r))
}
// ADCXL: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXL m32 r32
// ADCXL r32 r32
//
// Construct and append a ADCXL instruction to the active function.
// Operates on the global context.
func ADCXL(mr, r operand.Op) { ctx.ADCXL(mr, r) }
// ADCXQ: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXQ m64 r64
// ADCXQ r64 r64
//
// Construct and append a ADCXQ instruction to the active function.
func (c *Context) ADCXQ(mr, r operand.Op) {
c.addinstruction(x86.ADCXQ(mr, r))
}
// ADCXQ: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXQ m64 r64
// ADCXQ r64 r64
//
// Construct and append a ADCXQ instruction to the active function.
// Operates on the global context.
func ADCXQ(mr, r operand.Op) { ctx.ADCXQ(mr, r) }
// ADDB: Add.
//
// Forms:
//
// ADDB imm8 al
// ADDB imm8 m8
// ADDB imm8 r8
// ADDB m8 r8
// ADDB r8 m8
// ADDB r8 r8
//
// Construct and append a ADDB instruction to the active function.
func (c *Context) ADDB(imr, amr operand.Op) {
c.addinstruction(x86.ADDB(imr, amr))
}
// ADDB: Add.
//
// Forms:
//
// ADDB imm8 al
// ADDB imm8 m8
// ADDB imm8 r8
// ADDB m8 r8
// ADDB r8 m8
// ADDB r8 r8
//
// Construct and append a ADDB instruction to the active function.
// Operates on the global context.
func ADDB(imr, amr operand.Op) { ctx.ADDB(imr, amr) }
// ADDL: Add.
//
// Forms:
//
// ADDL imm32 eax
// ADDL imm32 m32
// ADDL imm32 r32
// ADDL imm8 m32
// ADDL imm8 r32
// ADDL m32 r32
// ADDL r32 m32
// ADDL r32 r32
//
// Construct and append a ADDL instruction to the active function.
func (c *Context) ADDL(imr, emr operand.Op) {
c.addinstruction(x86.ADDL(imr, emr))
}
// ADDL: Add.
//
// Forms:
//
// ADDL imm32 eax
// ADDL imm32 m32
// ADDL imm32 r32
// ADDL imm8 m32
// ADDL imm8 r32
// ADDL m32 r32
// ADDL r32 m32
// ADDL r32 r32
//
// Construct and append a ADDL instruction to the active function.
// Operates on the global context.
func ADDL(imr, emr operand.Op) { ctx.ADDL(imr, emr) }
// ADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDPD m128 xmm
// ADDPD xmm xmm
//
// Construct and append a ADDPD instruction to the active function.
func (c *Context) ADDPD(mx, x operand.Op) {
c.addinstruction(x86.ADDPD(mx, x))
}
// ADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDPD m128 xmm
// ADDPD xmm xmm
//
// Construct and append a ADDPD instruction to the active function.
// Operates on the global context.
func ADDPD(mx, x operand.Op) { ctx.ADDPD(mx, x) }
// ADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDPS m128 xmm
// ADDPS xmm xmm
//
// Construct and append a ADDPS instruction to the active function.
func (c *Context) ADDPS(mx, x operand.Op) {
c.addinstruction(x86.ADDPS(mx, x))
}
// ADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDPS m128 xmm
// ADDPS xmm xmm
//
// Construct and append a ADDPS instruction to the active function.
// Operates on the global context.
func ADDPS(mx, x operand.Op) { ctx.ADDPS(mx, x) }
// ADDQ: Add.
//
// Forms:
//
// ADDQ imm32 m64
// ADDQ imm32 r64
// ADDQ imm32 rax
// ADDQ imm8 m64
// ADDQ imm8 r64
// ADDQ m64 r64
// ADDQ r64 m64
// ADDQ r64 r64
//
// Construct and append a ADDQ instruction to the active function.
func (c *Context) ADDQ(imr, mr operand.Op) {
c.addinstruction(x86.ADDQ(imr, mr))
}
// ADDQ: Add.
//
// Forms:
//
// ADDQ imm32 m64
// ADDQ imm32 r64
// ADDQ imm32 rax
// ADDQ imm8 m64
// ADDQ imm8 r64
// ADDQ m64 r64
// ADDQ r64 m64
// ADDQ r64 r64
//
// Construct and append a ADDQ instruction to the active function.
// Operates on the global context.
func ADDQ(imr, mr operand.Op) { ctx.ADDQ(imr, mr) }
// ADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDSD m64 xmm
// ADDSD xmm xmm
//
// Construct and append a ADDSD instruction to the active function.
func (c *Context) ADDSD(mx, x operand.Op) {
c.addinstruction(x86.ADDSD(mx, x))
}
// ADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDSD m64 xmm
// ADDSD xmm xmm
//
// Construct and append a ADDSD instruction to the active function.
// Operates on the global context.
func ADDSD(mx, x operand.Op) { ctx.ADDSD(mx, x) }
// ADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDSS m32 xmm
// ADDSS xmm xmm
//
// Construct and append a ADDSS instruction to the active function.
func (c *Context) ADDSS(mx, x operand.Op) {
c.addinstruction(x86.ADDSS(mx, x))
}
// ADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDSS m32 xmm
// ADDSS xmm xmm
//
// Construct and append a ADDSS instruction to the active function.
// Operates on the global context.
func ADDSS(mx, x operand.Op) { ctx.ADDSS(mx, x) }
// ADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPD m128 xmm
// ADDSUBPD xmm xmm
//
// Construct and append a ADDSUBPD instruction to the active function.
func (c *Context) ADDSUBPD(mx, x operand.Op) {
c.addinstruction(x86.ADDSUBPD(mx, x))
}
// ADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPD m128 xmm
// ADDSUBPD xmm xmm
//
// Construct and append a ADDSUBPD instruction to the active function.
// Operates on the global context.
func ADDSUBPD(mx, x operand.Op) { ctx.ADDSUBPD(mx, x) }
// ADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPS m128 xmm
// ADDSUBPS xmm xmm
//
// Construct and append a ADDSUBPS instruction to the active function.
func (c *Context) ADDSUBPS(mx, x operand.Op) {
c.addinstruction(x86.ADDSUBPS(mx, x))
}
// ADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPS m128 xmm
// ADDSUBPS xmm xmm
//
// Construct and append a ADDSUBPS instruction to the active function.
// Operates on the global context.
func ADDSUBPS(mx, x operand.Op) { ctx.ADDSUBPS(mx, x) }
// ADDW: Add.
//
// Forms:
//
// ADDW imm16 ax
// ADDW imm16 m16
// ADDW imm16 r16
// ADDW imm8 m16
// ADDW imm8 r16
// ADDW m16 r16
// ADDW r16 m16
// ADDW r16 r16
//
// Construct and append a ADDW instruction to the active function.
func (c *Context) ADDW(imr, amr operand.Op) {
c.addinstruction(x86.ADDW(imr, amr))
}
// ADDW: Add.
//
// Forms:
//
// ADDW imm16 ax
// ADDW imm16 m16
// ADDW imm16 r16
// ADDW imm8 m16
// ADDW imm8 r16
// ADDW m16 r16
// ADDW r16 m16
// ADDW r16 r16
//
// Construct and append a ADDW instruction to the active function.
// Operates on the global context.
func ADDW(imr, amr operand.Op) { ctx.ADDW(imr, amr) }
// ADOXL: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXL m32 r32
// ADOXL r32 r32
//
// Construct and append a ADOXL instruction to the active function.
func (c *Context) ADOXL(mr, r operand.Op) {
c.addinstruction(x86.ADOXL(mr, r))
}
// ADOXL: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXL m32 r32
// ADOXL r32 r32
//
// Construct and append a ADOXL instruction to the active function.
// Operates on the global context.
func ADOXL(mr, r operand.Op) { ctx.ADOXL(mr, r) }
// ADOXQ: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXQ m64 r64
// ADOXQ r64 r64
//
// Construct and append a ADOXQ instruction to the active function.
func (c *Context) ADOXQ(mr, r operand.Op) {
c.addinstruction(x86.ADOXQ(mr, r))
}
// ADOXQ: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXQ m64 r64
// ADOXQ r64 r64
//
// Construct and append a ADOXQ instruction to the active function.
// Operates on the global context.
func ADOXQ(mr, r operand.Op) { ctx.ADOXQ(mr, r) }
// AESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// AESDEC m128 xmm
// AESDEC xmm xmm
//
// Construct and append a AESDEC instruction to the active function.
func (c *Context) AESDEC(mx, x operand.Op) {
c.addinstruction(x86.AESDEC(mx, x))
}
// AESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// AESDEC m128 xmm
// AESDEC xmm xmm
//
// Construct and append a AESDEC instruction to the active function.
// Operates on the global context.
func AESDEC(mx, x operand.Op) { ctx.AESDEC(mx, x) }
// AESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// AESDECLAST m128 xmm
// AESDECLAST xmm xmm
//
// Construct and append a AESDECLAST instruction to the active function.
func (c *Context) AESDECLAST(mx, x operand.Op) {
c.addinstruction(x86.AESDECLAST(mx, x))
}
// AESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// AESDECLAST m128 xmm
// AESDECLAST xmm xmm
//
// Construct and append a AESDECLAST instruction to the active function.
// Operates on the global context.
func AESDECLAST(mx, x operand.Op) { ctx.AESDECLAST(mx, x) }
// AESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// AESENC m128 xmm
// AESENC xmm xmm
//
// Construct and append a AESENC instruction to the active function.
func (c *Context) AESENC(mx, x operand.Op) {
c.addinstruction(x86.AESENC(mx, x))
}
// AESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// AESENC m128 xmm
// AESENC xmm xmm
//
// Construct and append a AESENC instruction to the active function.
// Operates on the global context.
func AESENC(mx, x operand.Op) { ctx.AESENC(mx, x) }
// AESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// AESENCLAST m128 xmm
// AESENCLAST xmm xmm
//
// Construct and append a AESENCLAST instruction to the active function.
func (c *Context) AESENCLAST(mx, x operand.Op) {
c.addinstruction(x86.AESENCLAST(mx, x))
}
// AESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// AESENCLAST m128 xmm
// AESENCLAST xmm xmm
//
// Construct and append a AESENCLAST instruction to the active function.
// Operates on the global context.
func AESENCLAST(mx, x operand.Op) { ctx.AESENCLAST(mx, x) }
// AESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// AESIMC m128 xmm
// AESIMC xmm xmm
//
// Construct and append a AESIMC instruction to the active function.
func (c *Context) AESIMC(mx, x operand.Op) {
c.addinstruction(x86.AESIMC(mx, x))
}
// AESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// AESIMC m128 xmm
// AESIMC xmm xmm
//
// Construct and append a AESIMC instruction to the active function.
// Operates on the global context.
func AESIMC(mx, x operand.Op) { ctx.AESIMC(mx, x) }
// AESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// AESKEYGENASSIST imm8 m128 xmm
// AESKEYGENASSIST imm8 xmm xmm
//
// Construct and append a AESKEYGENASSIST instruction to the active function.
func (c *Context) AESKEYGENASSIST(i, mx, x operand.Op) {
c.addinstruction(x86.AESKEYGENASSIST(i, mx, x))
}
// AESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// AESKEYGENASSIST imm8 m128 xmm
// AESKEYGENASSIST imm8 xmm xmm
//
// Construct and append a AESKEYGENASSIST instruction to the active function.
// Operates on the global context.
func AESKEYGENASSIST(i, mx, x operand.Op) { ctx.AESKEYGENASSIST(i, mx, x) }
// ANDB: Logical AND.
//
// Forms:
//
// ANDB imm8 al
// ANDB imm8 m8
// ANDB imm8 r8
// ANDB m8 r8
// ANDB r8 m8
// ANDB r8 r8
//
// Construct and append a ANDB instruction to the active function.
func (c *Context) ANDB(imr, amr operand.Op) {
c.addinstruction(x86.ANDB(imr, amr))
}
// ANDB: Logical AND.
//
// Forms:
//
// ANDB imm8 al
// ANDB imm8 m8
// ANDB imm8 r8
// ANDB m8 r8
// ANDB r8 m8
// ANDB r8 r8
//
// Construct and append a ANDB instruction to the active function.
// Operates on the global context.
func ANDB(imr, amr operand.Op) { ctx.ANDB(imr, amr) }
// ANDL: Logical AND.
//
// Forms:
//
// ANDL imm32 eax
// ANDL imm32 m32
// ANDL imm32 r32
// ANDL imm8 m32
// ANDL imm8 r32
// ANDL m32 r32
// ANDL r32 m32
// ANDL r32 r32
//
// Construct and append a ANDL instruction to the active function.
func (c *Context) ANDL(imr, emr operand.Op) {
c.addinstruction(x86.ANDL(imr, emr))
}
// ANDL: Logical AND.
//
// Forms:
//
// ANDL imm32 eax
// ANDL imm32 m32
// ANDL imm32 r32
// ANDL imm8 m32
// ANDL imm8 r32
// ANDL m32 r32
// ANDL r32 m32
// ANDL r32 r32
//
// Construct and append a ANDL instruction to the active function.
// Operates on the global context.
func ANDL(imr, emr operand.Op) { ctx.ANDL(imr, emr) }
// ANDNL: Logical AND NOT.
//
// Forms:
//
// ANDNL m32 r32 r32
// ANDNL r32 r32 r32
//
// Construct and append a ANDNL instruction to the active function.
func (c *Context) ANDNL(mr, r, r1 operand.Op) {
c.addinstruction(x86.ANDNL(mr, r, r1))
}
// ANDNL: Logical AND NOT.
//
// Forms:
//
// ANDNL m32 r32 r32
// ANDNL r32 r32 r32
//
// Construct and append a ANDNL instruction to the active function.
// Operates on the global context.
func ANDNL(mr, r, r1 operand.Op) { ctx.ANDNL(mr, r, r1) }
// ANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPD m128 xmm
// ANDNPD xmm xmm
//
// Construct and append a ANDNPD instruction to the active function.
func (c *Context) ANDNPD(mx, x operand.Op) {
c.addinstruction(x86.ANDNPD(mx, x))
}
// ANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPD m128 xmm
// ANDNPD xmm xmm
//
// Construct and append a ANDNPD instruction to the active function.
// Operates on the global context.
func ANDNPD(mx, x operand.Op) { ctx.ANDNPD(mx, x) }
// ANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPS m128 xmm
// ANDNPS xmm xmm
//
// Construct and append a ANDNPS instruction to the active function.
func (c *Context) ANDNPS(mx, x operand.Op) {
c.addinstruction(x86.ANDNPS(mx, x))
}
// ANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPS m128 xmm
// ANDNPS xmm xmm
//
// Construct and append a ANDNPS instruction to the active function.
// Operates on the global context.
func ANDNPS(mx, x operand.Op) { ctx.ANDNPS(mx, x) }
// ANDNQ: Logical AND NOT.
//
// Forms:
//
// ANDNQ m64 r64 r64
// ANDNQ r64 r64 r64
//
// Construct and append a ANDNQ instruction to the active function.
func (c *Context) ANDNQ(mr, r, r1 operand.Op) {
c.addinstruction(x86.ANDNQ(mr, r, r1))
}
// ANDNQ: Logical AND NOT.
//
// Forms:
//
// ANDNQ m64 r64 r64
// ANDNQ r64 r64 r64
//
// Construct and append a ANDNQ instruction to the active function.
// Operates on the global context.
func ANDNQ(mr, r, r1 operand.Op) { ctx.ANDNQ(mr, r, r1) }
// ANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDPD m128 xmm
// ANDPD xmm xmm
//
// Construct and append a ANDPD instruction to the active function.
func (c *Context) ANDPD(mx, x operand.Op) {
c.addinstruction(x86.ANDPD(mx, x))
}
// ANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDPD m128 xmm
// ANDPD xmm xmm
//
// Construct and append a ANDPD instruction to the active function.
// Operates on the global context.
func ANDPD(mx, x operand.Op) { ctx.ANDPD(mx, x) }
// ANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDPS m128 xmm
// ANDPS xmm xmm
//
// Construct and append a ANDPS instruction to the active function.
func (c *Context) ANDPS(mx, x operand.Op) {
c.addinstruction(x86.ANDPS(mx, x))
}
// ANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDPS m128 xmm
// ANDPS xmm xmm
//
// Construct and append a ANDPS instruction to the active function.
// Operates on the global context.
func ANDPS(mx, x operand.Op) { ctx.ANDPS(mx, x) }
// ANDQ: Logical AND.
//
// Forms:
//
// ANDQ imm32 m64
// ANDQ imm32 r64
// ANDQ imm32 rax
// ANDQ imm8 m64
// ANDQ imm8 r64
// ANDQ m64 r64
// ANDQ r64 m64
// ANDQ r64 r64
//
// Construct and append a ANDQ instruction to the active function.
func (c *Context) ANDQ(imr, mr operand.Op) {
c.addinstruction(x86.ANDQ(imr, mr))
}
// ANDQ: Logical AND.
//
// Forms:
//
// ANDQ imm32 m64
// ANDQ imm32 r64
// ANDQ imm32 rax
// ANDQ imm8 m64
// ANDQ imm8 r64
// ANDQ m64 r64
// ANDQ r64 m64
// ANDQ r64 r64
//
// Construct and append a ANDQ instruction to the active function.
// Operates on the global context.
func ANDQ(imr, mr operand.Op) { ctx.ANDQ(imr, mr) }
// ANDW: Logical AND.
//
// Forms:
//
// ANDW imm16 ax
// ANDW imm16 m16
// ANDW imm16 r16
// ANDW imm8 m16
// ANDW imm8 r16
// ANDW m16 r16
// ANDW r16 m16
// ANDW r16 r16
//
// Construct and append a ANDW instruction to the active function.
func (c *Context) ANDW(imr, amr operand.Op) {
c.addinstruction(x86.ANDW(imr, amr))
}
// ANDW: Logical AND.
//
// Forms:
//
// ANDW imm16 ax
// ANDW imm16 m16
// ANDW imm16 r16
// ANDW imm8 m16
// ANDW imm8 r16
// ANDW m16 r16
// ANDW r16 m16
// ANDW r16 r16
//
// Construct and append a ANDW instruction to the active function.
// Operates on the global context.
func ANDW(imr, amr operand.Op) { ctx.ANDW(imr, amr) }
// BEXTRL: Bit Field Extract.
//
// Forms:
//
// BEXTRL r32 m32 r32
// BEXTRL r32 r32 r32
//
// Construct and append a BEXTRL instruction to the active function.
func (c *Context) BEXTRL(r, mr, r1 operand.Op) {
c.addinstruction(x86.BEXTRL(r, mr, r1))
}
// BEXTRL: Bit Field Extract.
//
// Forms:
//
// BEXTRL r32 m32 r32
// BEXTRL r32 r32 r32
//
// Construct and append a BEXTRL instruction to the active function.
// Operates on the global context.
func BEXTRL(r, mr, r1 operand.Op) { ctx.BEXTRL(r, mr, r1) }
// BEXTRQ: Bit Field Extract.
//
// Forms:
//
// BEXTRQ r64 m64 r64
// BEXTRQ r64 r64 r64
//
// Construct and append a BEXTRQ instruction to the active function.
func (c *Context) BEXTRQ(r, mr, r1 operand.Op) {
c.addinstruction(x86.BEXTRQ(r, mr, r1))
}
// BEXTRQ: Bit Field Extract.
//
// Forms:
//
// BEXTRQ r64 m64 r64
// BEXTRQ r64 r64 r64
//
// Construct and append a BEXTRQ instruction to the active function.
// Operates on the global context.
func BEXTRQ(r, mr, r1 operand.Op) { ctx.BEXTRQ(r, mr, r1) }
// BLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDPD imm8 m128 xmm
// BLENDPD imm8 xmm xmm
//
// Construct and append a BLENDPD instruction to the active function.
func (c *Context) BLENDPD(i, mx, x operand.Op) {
c.addinstruction(x86.BLENDPD(i, mx, x))
}
// BLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDPD imm8 m128 xmm
// BLENDPD imm8 xmm xmm
//
// Construct and append a BLENDPD instruction to the active function.
// Operates on the global context.
func BLENDPD(i, mx, x operand.Op) { ctx.BLENDPD(i, mx, x) }
// BLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDPS imm8 m128 xmm
// BLENDPS imm8 xmm xmm
//
// Construct and append a BLENDPS instruction to the active function.
func (c *Context) BLENDPS(i, mx, x operand.Op) {
c.addinstruction(x86.BLENDPS(i, mx, x))
}
// BLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDPS imm8 m128 xmm
// BLENDPS imm8 xmm xmm
//
// Construct and append a BLENDPS instruction to the active function.
// Operates on the global context.
func BLENDPS(i, mx, x operand.Op) { ctx.BLENDPS(i, mx, x) }
// BLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPD xmm0 m128 xmm
// BLENDVPD xmm0 xmm xmm
//
// Construct and append a BLENDVPD instruction to the active function.
func (c *Context) BLENDVPD(x, mx, x1 operand.Op) {
c.addinstruction(x86.BLENDVPD(x, mx, x1))
}
// BLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPD xmm0 m128 xmm
// BLENDVPD xmm0 xmm xmm
//
// Construct and append a BLENDVPD instruction to the active function.
// Operates on the global context.
func BLENDVPD(x, mx, x1 operand.Op) { ctx.BLENDVPD(x, mx, x1) }
// BLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPS xmm0 m128 xmm
// BLENDVPS xmm0 xmm xmm
//
// Construct and append a BLENDVPS instruction to the active function.
func (c *Context) BLENDVPS(x, mx, x1 operand.Op) {
c.addinstruction(x86.BLENDVPS(x, mx, x1))
}
// BLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPS xmm0 m128 xmm
// BLENDVPS xmm0 xmm xmm
//
// Construct and append a BLENDVPS instruction to the active function.
// Operates on the global context.
func BLENDVPS(x, mx, x1 operand.Op) { ctx.BLENDVPS(x, mx, x1) }
// BLSIL: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIL m32 r32
// BLSIL r32 r32
//
// Construct and append a BLSIL instruction to the active function.
func (c *Context) BLSIL(mr, r operand.Op) {
c.addinstruction(x86.BLSIL(mr, r))
}
// BLSIL: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIL m32 r32
// BLSIL r32 r32
//
// Construct and append a BLSIL instruction to the active function.
// Operates on the global context.
func BLSIL(mr, r operand.Op) { ctx.BLSIL(mr, r) }
// BLSIQ: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIQ m64 r64
// BLSIQ r64 r64
//
// Construct and append a BLSIQ instruction to the active function.
func (c *Context) BLSIQ(mr, r operand.Op) {
c.addinstruction(x86.BLSIQ(mr, r))
}
// BLSIQ: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIQ m64 r64
// BLSIQ r64 r64
//
// Construct and append a BLSIQ instruction to the active function.
// Operates on the global context.
func BLSIQ(mr, r operand.Op) { ctx.BLSIQ(mr, r) }
// BLSMSKL: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKL m32 r32
// BLSMSKL r32 r32
//
// Construct and append a BLSMSKL instruction to the active function.
func (c *Context) BLSMSKL(mr, r operand.Op) {
c.addinstruction(x86.BLSMSKL(mr, r))
}
// BLSMSKL: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKL m32 r32
// BLSMSKL r32 r32
//
// Construct and append a BLSMSKL instruction to the active function.
// Operates on the global context.
func BLSMSKL(mr, r operand.Op) { ctx.BLSMSKL(mr, r) }
// BLSMSKQ: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKQ m64 r64
// BLSMSKQ r64 r64
//
// Construct and append a BLSMSKQ instruction to the active function.
func (c *Context) BLSMSKQ(mr, r operand.Op) {
c.addinstruction(x86.BLSMSKQ(mr, r))
}
// BLSMSKQ: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKQ m64 r64
// BLSMSKQ r64 r64
//
// Construct and append a BLSMSKQ instruction to the active function.
// Operates on the global context.
func BLSMSKQ(mr, r operand.Op) { ctx.BLSMSKQ(mr, r) }
// BLSRL: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRL m32 r32
// BLSRL r32 r32
//
// Construct and append a BLSRL instruction to the active function.
func (c *Context) BLSRL(mr, r operand.Op) {
c.addinstruction(x86.BLSRL(mr, r))
}
// BLSRL: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRL m32 r32
// BLSRL r32 r32
//
// Construct and append a BLSRL instruction to the active function.
// Operates on the global context.
func BLSRL(mr, r operand.Op) { ctx.BLSRL(mr, r) }
// BLSRQ: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRQ m64 r64
// BLSRQ r64 r64
//
// Construct and append a BLSRQ instruction to the active function.
func (c *Context) BLSRQ(mr, r operand.Op) {
c.addinstruction(x86.BLSRQ(mr, r))
}
// BLSRQ: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRQ m64 r64
// BLSRQ r64 r64
//
// Construct and append a BLSRQ instruction to the active function.
// Operates on the global context.
func BLSRQ(mr, r operand.Op) { ctx.BLSRQ(mr, r) }
// BSFL: Bit Scan Forward.
//
// Forms:
//
// BSFL m32 r32
// BSFL r32 r32
//
// Construct and append a BSFL instruction to the active function.
func (c *Context) BSFL(mr, r operand.Op) {
c.addinstruction(x86.BSFL(mr, r))
}
// BSFL: Bit Scan Forward.
//
// Forms:
//
// BSFL m32 r32
// BSFL r32 r32
//
// Construct and append a BSFL instruction to the active function.
// Operates on the global context.
func BSFL(mr, r operand.Op) { ctx.BSFL(mr, r) }
// BSFQ: Bit Scan Forward.
//
// Forms:
//
// BSFQ m64 r64
// BSFQ r64 r64
//
// Construct and append a BSFQ instruction to the active function.
func (c *Context) BSFQ(mr, r operand.Op) {
c.addinstruction(x86.BSFQ(mr, r))
}
// BSFQ: Bit Scan Forward.
//
// Forms:
//
// BSFQ m64 r64
// BSFQ r64 r64
//
// Construct and append a BSFQ instruction to the active function.
// Operates on the global context.
func BSFQ(mr, r operand.Op) { ctx.BSFQ(mr, r) }
// BSFW: Bit Scan Forward.
//
// Forms:
//
// BSFW m16 r16
// BSFW r16 r16
//
// Construct and append a BSFW instruction to the active function.
func (c *Context) BSFW(mr, r operand.Op) {
c.addinstruction(x86.BSFW(mr, r))
}
// BSFW: Bit Scan Forward.
//
// Forms:
//
// BSFW m16 r16
// BSFW r16 r16
//
// Construct and append a BSFW instruction to the active function.
// Operates on the global context.
func BSFW(mr, r operand.Op) { ctx.BSFW(mr, r) }
// BSRL: Bit Scan Reverse.
//
// Forms:
//
// BSRL m32 r32
// BSRL r32 r32
//
// Construct and append a BSRL instruction to the active function.
func (c *Context) BSRL(mr, r operand.Op) {
c.addinstruction(x86.BSRL(mr, r))
}
// BSRL: Bit Scan Reverse.
//
// Forms:
//
// BSRL m32 r32
// BSRL r32 r32
//
// Construct and append a BSRL instruction to the active function.
// Operates on the global context.
func BSRL(mr, r operand.Op) { ctx.BSRL(mr, r) }
// BSRQ: Bit Scan Reverse.
//
// Forms:
//
// BSRQ m64 r64
// BSRQ r64 r64
//
// Construct and append a BSRQ instruction to the active function.
func (c *Context) BSRQ(mr, r operand.Op) {
c.addinstruction(x86.BSRQ(mr, r))
}
// BSRQ: Bit Scan Reverse.
//
// Forms:
//
// BSRQ m64 r64
// BSRQ r64 r64
//
// Construct and append a BSRQ instruction to the active function.
// Operates on the global context.
func BSRQ(mr, r operand.Op) { ctx.BSRQ(mr, r) }
// BSRW: Bit Scan Reverse.
//
// Forms:
//
// BSRW m16 r16
// BSRW r16 r16
//
// Construct and append a BSRW instruction to the active function.
func (c *Context) BSRW(mr, r operand.Op) {
c.addinstruction(x86.BSRW(mr, r))
}
// BSRW: Bit Scan Reverse.
//
// Forms:
//
// BSRW m16 r16
// BSRW r16 r16
//
// Construct and append a BSRW instruction to the active function.
// Operates on the global context.
func BSRW(mr, r operand.Op) { ctx.BSRW(mr, r) }
// BSWAPL: Byte Swap.
//
// Forms:
//
// BSWAPL r32
//
// Construct and append a BSWAPL instruction to the active function.
func (c *Context) BSWAPL(r operand.Op) {
c.addinstruction(x86.BSWAPL(r))
}
// BSWAPL: Byte Swap.
//
// Forms:
//
// BSWAPL r32
//
// Construct and append a BSWAPL instruction to the active function.
// Operates on the global context.
func BSWAPL(r operand.Op) { ctx.BSWAPL(r) }
// BSWAPQ: Byte Swap.
//
// Forms:
//
// BSWAPQ r64
//
// Construct and append a BSWAPQ instruction to the active function.
func (c *Context) BSWAPQ(r operand.Op) {
c.addinstruction(x86.BSWAPQ(r))
}
// BSWAPQ: Byte Swap.
//
// Forms:
//
// BSWAPQ r64
//
// Construct and append a BSWAPQ instruction to the active function.
// Operates on the global context.
func BSWAPQ(r operand.Op) { ctx.BSWAPQ(r) }
// BTCL: Bit Test and Complement.
//
// Forms:
//
// BTCL imm8 m32
// BTCL imm8 r32
// BTCL r32 m32
// BTCL r32 r32
//
// Construct and append a BTCL instruction to the active function.
func (c *Context) BTCL(ir, mr operand.Op) {
c.addinstruction(x86.BTCL(ir, mr))
}
// BTCL: Bit Test and Complement.
//
// Forms:
//
// BTCL imm8 m32
// BTCL imm8 r32
// BTCL r32 m32
// BTCL r32 r32
//
// Construct and append a BTCL instruction to the active function.
// Operates on the global context.
func BTCL(ir, mr operand.Op) { ctx.BTCL(ir, mr) }
// BTCQ: Bit Test and Complement.
//
// Forms:
//
// BTCQ imm8 m64
// BTCQ imm8 r64
// BTCQ r64 m64
// BTCQ r64 r64
//
// Construct and append a BTCQ instruction to the active function.
func (c *Context) BTCQ(ir, mr operand.Op) {
c.addinstruction(x86.BTCQ(ir, mr))
}
// BTCQ: Bit Test and Complement.
//
// Forms:
//
// BTCQ imm8 m64
// BTCQ imm8 r64
// BTCQ r64 m64
// BTCQ r64 r64
//
// Construct and append a BTCQ instruction to the active function.
// Operates on the global context.
func BTCQ(ir, mr operand.Op) { ctx.BTCQ(ir, mr) }
// BTCW: Bit Test and Complement.
//
// Forms:
//
// BTCW imm8 m16
// BTCW imm8 r16
// BTCW r16 m16
// BTCW r16 r16
//
// Construct and append a BTCW instruction to the active function.
func (c *Context) BTCW(ir, mr operand.Op) {
c.addinstruction(x86.BTCW(ir, mr))
}
// BTCW: Bit Test and Complement.
//
// Forms:
//
// BTCW imm8 m16
// BTCW imm8 r16
// BTCW r16 m16
// BTCW r16 r16
//
// Construct and append a BTCW instruction to the active function.
// Operates on the global context.
func BTCW(ir, mr operand.Op) { ctx.BTCW(ir, mr) }
// BTL: Bit Test.
//
// Forms:
//
// BTL imm8 m32
// BTL imm8 r32
// BTL r32 m32
// BTL r32 r32
//
// Construct and append a BTL instruction to the active function.
func (c *Context) BTL(ir, mr operand.Op) {
c.addinstruction(x86.BTL(ir, mr))
}
// BTL: Bit Test.
//
// Forms:
//
// BTL imm8 m32
// BTL imm8 r32
// BTL r32 m32
// BTL r32 r32
//
// Construct and append a BTL instruction to the active function.
// Operates on the global context.
func BTL(ir, mr operand.Op) { ctx.BTL(ir, mr) }
// BTQ: Bit Test.
//
// Forms:
//
// BTQ imm8 m64
// BTQ imm8 r64
// BTQ r64 m64
// BTQ r64 r64
//
// Construct and append a BTQ instruction to the active function.
func (c *Context) BTQ(ir, mr operand.Op) {
c.addinstruction(x86.BTQ(ir, mr))
}
// BTQ: Bit Test.
//
// Forms:
//
// BTQ imm8 m64
// BTQ imm8 r64
// BTQ r64 m64
// BTQ r64 r64
//
// Construct and append a BTQ instruction to the active function.
// Operates on the global context.
func BTQ(ir, mr operand.Op) { ctx.BTQ(ir, mr) }
// BTRL: Bit Test and Reset.
//
// Forms:
//
// BTRL imm8 m32
// BTRL imm8 r32
// BTRL r32 m32
// BTRL r32 r32
//
// Construct and append a BTRL instruction to the active function.
func (c *Context) BTRL(ir, mr operand.Op) {
c.addinstruction(x86.BTRL(ir, mr))
}
// BTRL: Bit Test and Reset.
//
// Forms:
//
// BTRL imm8 m32
// BTRL imm8 r32
// BTRL r32 m32
// BTRL r32 r32
//
// Construct and append a BTRL instruction to the active function.
// Operates on the global context.
func BTRL(ir, mr operand.Op) { ctx.BTRL(ir, mr) }
// BTRQ: Bit Test and Reset.
//
// Forms:
//
// BTRQ imm8 m64
// BTRQ imm8 r64
// BTRQ r64 m64
// BTRQ r64 r64
//
// Construct and append a BTRQ instruction to the active function.
func (c *Context) BTRQ(ir, mr operand.Op) {
c.addinstruction(x86.BTRQ(ir, mr))
}
// BTRQ: Bit Test and Reset.
//
// Forms:
//
// BTRQ imm8 m64
// BTRQ imm8 r64
// BTRQ r64 m64
// BTRQ r64 r64
//
// Construct and append a BTRQ instruction to the active function.
// Operates on the global context.
func BTRQ(ir, mr operand.Op) { ctx.BTRQ(ir, mr) }
// BTRW: Bit Test and Reset.
//
// Forms:
//
// BTRW imm8 m16
// BTRW imm8 r16
// BTRW r16 m16
// BTRW r16 r16
//
// Construct and append a BTRW instruction to the active function.
func (c *Context) BTRW(ir, mr operand.Op) {
c.addinstruction(x86.BTRW(ir, mr))
}
// BTRW: Bit Test and Reset.
//
// Forms:
//
// BTRW imm8 m16
// BTRW imm8 r16
// BTRW r16 m16
// BTRW r16 r16
//
// Construct and append a BTRW instruction to the active function.
// Operates on the global context.
func BTRW(ir, mr operand.Op) { ctx.BTRW(ir, mr) }
// BTSL: Bit Test and Set.
//
// Forms:
//
// BTSL imm8 m32
// BTSL imm8 r32
// BTSL r32 m32
// BTSL r32 r32
//
// Construct and append a BTSL instruction to the active function.
func (c *Context) BTSL(ir, mr operand.Op) {
c.addinstruction(x86.BTSL(ir, mr))
}
// BTSL: Bit Test and Set.
//
// Forms:
//
// BTSL imm8 m32
// BTSL imm8 r32
// BTSL r32 m32
// BTSL r32 r32
//
// Construct and append a BTSL instruction to the active function.
// Operates on the global context.
func BTSL(ir, mr operand.Op) { ctx.BTSL(ir, mr) }
// BTSQ: Bit Test and Set.
//
// Forms:
//
// BTSQ imm8 m64
// BTSQ imm8 r64
// BTSQ r64 m64
// BTSQ r64 r64
//
// Construct and append a BTSQ instruction to the active function.
func (c *Context) BTSQ(ir, mr operand.Op) {
c.addinstruction(x86.BTSQ(ir, mr))
}
// BTSQ: Bit Test and Set.
//
// Forms:
//
// BTSQ imm8 m64
// BTSQ imm8 r64
// BTSQ r64 m64
// BTSQ r64 r64
//
// Construct and append a BTSQ instruction to the active function.
// Operates on the global context.
func BTSQ(ir, mr operand.Op) { ctx.BTSQ(ir, mr) }
// BTSW: Bit Test and Set.
//
// Forms:
//
// BTSW imm8 m16
// BTSW imm8 r16
// BTSW r16 m16
// BTSW r16 r16
//
// Construct and append a BTSW instruction to the active function.
func (c *Context) BTSW(ir, mr operand.Op) {
c.addinstruction(x86.BTSW(ir, mr))
}
// BTSW: Bit Test and Set.
//
// Forms:
//
// BTSW imm8 m16
// BTSW imm8 r16
// BTSW r16 m16
// BTSW r16 r16
//
// Construct and append a BTSW instruction to the active function.
// Operates on the global context.
func BTSW(ir, mr operand.Op) { ctx.BTSW(ir, mr) }
// BTW: Bit Test.
//
// Forms:
//
// BTW imm8 m16
// BTW imm8 r16
// BTW r16 m16
// BTW r16 r16
//
// Construct and append a BTW instruction to the active function.
func (c *Context) BTW(ir, mr operand.Op) {
c.addinstruction(x86.BTW(ir, mr))
}
// BTW: Bit Test.
//
// Forms:
//
// BTW imm8 m16
// BTW imm8 r16
// BTW r16 m16
// BTW r16 r16
//
// Construct and append a BTW instruction to the active function.
// Operates on the global context.
func BTW(ir, mr operand.Op) { ctx.BTW(ir, mr) }
// BZHIL: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIL r32 m32 r32
// BZHIL r32 r32 r32
//
// Construct and append a BZHIL instruction to the active function.
func (c *Context) BZHIL(r, mr, r1 operand.Op) {
c.addinstruction(x86.BZHIL(r, mr, r1))
}
// BZHIL: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIL r32 m32 r32
// BZHIL r32 r32 r32
//
// Construct and append a BZHIL instruction to the active function.
// Operates on the global context.
func BZHIL(r, mr, r1 operand.Op) { ctx.BZHIL(r, mr, r1) }
// BZHIQ: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIQ r64 m64 r64
// BZHIQ r64 r64 r64
//
// Construct and append a BZHIQ instruction to the active function.
func (c *Context) BZHIQ(r, mr, r1 operand.Op) {
c.addinstruction(x86.BZHIQ(r, mr, r1))
}
// BZHIQ: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIQ r64 m64 r64
// BZHIQ r64 r64 r64
//
// Construct and append a BZHIQ instruction to the active function.
// Operates on the global context.
func BZHIQ(r, mr, r1 operand.Op) { ctx.BZHIQ(r, mr, r1) }
// CALL: Call Procedure.
//
// Forms:
//
// CALL rel32
//
// Construct and append a CALL instruction to the active function.
func (c *Context) CALL(r operand.Op) {
c.addinstruction(x86.CALL(r))
}
// CALL: Call Procedure.
//
// Forms:
//
// CALL rel32
//
// Construct and append a CALL instruction to the active function.
// Operates on the global context.
func CALL(r operand.Op) { ctx.CALL(r) }
// CBW: Convert Byte to Word.
//
// Forms:
//
// CBW
//
// Construct and append a CBW instruction to the active function.
func (c *Context) CBW() {
c.addinstruction(x86.CBW())
}
// CBW: Convert Byte to Word.
//
// Forms:
//
// CBW
//
// Construct and append a CBW instruction to the active function.
// Operates on the global context.
func CBW() { ctx.CBW() }
// CDQ: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQ
//
// Construct and append a CDQ instruction to the active function.
func (c *Context) CDQ() {
c.addinstruction(x86.CDQ())
}
// CDQ: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQ
//
// Construct and append a CDQ instruction to the active function.
// Operates on the global context.
func CDQ() { ctx.CDQ() }
// CDQE: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQE
//
// Construct and append a CDQE instruction to the active function.
func (c *Context) CDQE() {
c.addinstruction(x86.CDQE())
}
// CDQE: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQE
//
// Construct and append a CDQE instruction to the active function.
// Operates on the global context.
func CDQE() { ctx.CDQE() }
// CLC: Clear Carry Flag.
//
// Forms:
//
// CLC
//
// Construct and append a CLC instruction to the active function.
func (c *Context) CLC() {
c.addinstruction(x86.CLC())
}
// CLC: Clear Carry Flag.
//
// Forms:
//
// CLC
//
// Construct and append a CLC instruction to the active function.
// Operates on the global context.
func CLC() { ctx.CLC() }
// CLD: Clear Direction Flag.
//
// Forms:
//
// CLD
//
// Construct and append a CLD instruction to the active function.
func (c *Context) CLD() {
c.addinstruction(x86.CLD())
}
// CLD: Clear Direction Flag.
//
// Forms:
//
// CLD
//
// Construct and append a CLD instruction to the active function.
// Operates on the global context.
func CLD() { ctx.CLD() }
// CLFLUSH: Flush Cache Line.
//
// Forms:
//
// CLFLUSH m8
//
// Construct and append a CLFLUSH instruction to the active function.
func (c *Context) CLFLUSH(m operand.Op) {
c.addinstruction(x86.CLFLUSH(m))
}
// CLFLUSH: Flush Cache Line.
//
// Forms:
//
// CLFLUSH m8
//
// Construct and append a CLFLUSH instruction to the active function.
// Operates on the global context.
func CLFLUSH(m operand.Op) { ctx.CLFLUSH(m) }
// CLFLUSHOPT: Flush Cache Line Optimized.
//
// Forms:
//
// CLFLUSHOPT m8
//
// Construct and append a CLFLUSHOPT instruction to the active function.
func (c *Context) CLFLUSHOPT(m operand.Op) {
c.addinstruction(x86.CLFLUSHOPT(m))
}
// CLFLUSHOPT: Flush Cache Line Optimized.
//
// Forms:
//
// CLFLUSHOPT m8
//
// Construct and append a CLFLUSHOPT instruction to the active function.
// Operates on the global context.
func CLFLUSHOPT(m operand.Op) { ctx.CLFLUSHOPT(m) }
// CMC: Complement Carry Flag.
//
// Forms:
//
// CMC
//
// Construct and append a CMC instruction to the active function.
func (c *Context) CMC() {
c.addinstruction(x86.CMC())
}
// CMC: Complement Carry Flag.
//
// Forms:
//
// CMC
//
// Construct and append a CMC instruction to the active function.
// Operates on the global context.
func CMC() { ctx.CMC() }
// CMOVLCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVLCC m32 r32
// CMOVLCC r32 r32
//
// Construct and append a CMOVLCC instruction to the active function.
func (c *Context) CMOVLCC(mr, r operand.Op) {
c.addinstruction(x86.CMOVLCC(mr, r))
}
// CMOVLCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVLCC m32 r32
// CMOVLCC r32 r32
//
// Construct and append a CMOVLCC instruction to the active function.
// Operates on the global context.
func CMOVLCC(mr, r operand.Op) { ctx.CMOVLCC(mr, r) }
// CMOVLCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVLCS m32 r32
// CMOVLCS r32 r32
//
// Construct and append a CMOVLCS instruction to the active function.
func (c *Context) CMOVLCS(mr, r operand.Op) {
c.addinstruction(x86.CMOVLCS(mr, r))
}
// CMOVLCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVLCS m32 r32
// CMOVLCS r32 r32
//
// Construct and append a CMOVLCS instruction to the active function.
// Operates on the global context.
func CMOVLCS(mr, r operand.Op) { ctx.CMOVLCS(mr, r) }
// CMOVLEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVLEQ m32 r32
// CMOVLEQ r32 r32
//
// Construct and append a CMOVLEQ instruction to the active function.
func (c *Context) CMOVLEQ(mr, r operand.Op) {
c.addinstruction(x86.CMOVLEQ(mr, r))
}
// CMOVLEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVLEQ m32 r32
// CMOVLEQ r32 r32
//
// Construct and append a CMOVLEQ instruction to the active function.
// Operates on the global context.
func CMOVLEQ(mr, r operand.Op) { ctx.CMOVLEQ(mr, r) }
// CMOVLGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVLGE m32 r32
// CMOVLGE r32 r32
//
// Construct and append a CMOVLGE instruction to the active function.
func (c *Context) CMOVLGE(mr, r operand.Op) {
c.addinstruction(x86.CMOVLGE(mr, r))
}
// CMOVLGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVLGE m32 r32
// CMOVLGE r32 r32
//
// Construct and append a CMOVLGE instruction to the active function.
// Operates on the global context.
func CMOVLGE(mr, r operand.Op) { ctx.CMOVLGE(mr, r) }
// CMOVLGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVLGT m32 r32
// CMOVLGT r32 r32
//
// Construct and append a CMOVLGT instruction to the active function.
func (c *Context) CMOVLGT(mr, r operand.Op) {
c.addinstruction(x86.CMOVLGT(mr, r))
}
// CMOVLGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVLGT m32 r32
// CMOVLGT r32 r32
//
// Construct and append a CMOVLGT instruction to the active function.
// Operates on the global context.
func CMOVLGT(mr, r operand.Op) { ctx.CMOVLGT(mr, r) }
// CMOVLHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVLHI m32 r32
// CMOVLHI r32 r32
//
// Construct and append a CMOVLHI instruction to the active function.
func (c *Context) CMOVLHI(mr, r operand.Op) {
c.addinstruction(x86.CMOVLHI(mr, r))
}
// CMOVLHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVLHI m32 r32
// CMOVLHI r32 r32
//
// Construct and append a CMOVLHI instruction to the active function.
// Operates on the global context.
func CMOVLHI(mr, r operand.Op) { ctx.CMOVLHI(mr, r) }
// CMOVLLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVLLE m32 r32
// CMOVLLE r32 r32
//
// Construct and append a CMOVLLE instruction to the active function.
func (c *Context) CMOVLLE(mr, r operand.Op) {
c.addinstruction(x86.CMOVLLE(mr, r))
}
// CMOVLLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVLLE m32 r32
// CMOVLLE r32 r32
//
// Construct and append a CMOVLLE instruction to the active function.
// Operates on the global context.
func CMOVLLE(mr, r operand.Op) { ctx.CMOVLLE(mr, r) }
// CMOVLLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVLLS m32 r32
// CMOVLLS r32 r32
//
// Construct and append a CMOVLLS instruction to the active function.
func (c *Context) CMOVLLS(mr, r operand.Op) {
c.addinstruction(x86.CMOVLLS(mr, r))
}
// CMOVLLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVLLS m32 r32
// CMOVLLS r32 r32
//
// Construct and append a CMOVLLS instruction to the active function.
// Operates on the global context.
func CMOVLLS(mr, r operand.Op) { ctx.CMOVLLS(mr, r) }
// CMOVLLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVLLT m32 r32
// CMOVLLT r32 r32
//
// Construct and append a CMOVLLT instruction to the active function.
func (c *Context) CMOVLLT(mr, r operand.Op) {
c.addinstruction(x86.CMOVLLT(mr, r))
}
// CMOVLLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVLLT m32 r32
// CMOVLLT r32 r32
//
// Construct and append a CMOVLLT instruction to the active function.
// Operates on the global context.
func CMOVLLT(mr, r operand.Op) { ctx.CMOVLLT(mr, r) }
// CMOVLMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVLMI m32 r32
// CMOVLMI r32 r32
//
// Construct and append a CMOVLMI instruction to the active function.
func (c *Context) CMOVLMI(mr, r operand.Op) {
c.addinstruction(x86.CMOVLMI(mr, r))
}
// CMOVLMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVLMI m32 r32
// CMOVLMI r32 r32
//
// Construct and append a CMOVLMI instruction to the active function.
// Operates on the global context.
func CMOVLMI(mr, r operand.Op) { ctx.CMOVLMI(mr, r) }
// CMOVLNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVLNE m32 r32
// CMOVLNE r32 r32
//
// Construct and append a CMOVLNE instruction to the active function.
func (c *Context) CMOVLNE(mr, r operand.Op) {
c.addinstruction(x86.CMOVLNE(mr, r))
}
// CMOVLNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVLNE m32 r32
// CMOVLNE r32 r32
//
// Construct and append a CMOVLNE instruction to the active function.
// Operates on the global context.
func CMOVLNE(mr, r operand.Op) { ctx.CMOVLNE(mr, r) }
// CMOVLOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVLOC m32 r32
// CMOVLOC r32 r32
//
// Construct and append a CMOVLOC instruction to the active function.
func (c *Context) CMOVLOC(mr, r operand.Op) {
c.addinstruction(x86.CMOVLOC(mr, r))
}
// CMOVLOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVLOC m32 r32
// CMOVLOC r32 r32
//
// Construct and append a CMOVLOC instruction to the active function.
// Operates on the global context.
func CMOVLOC(mr, r operand.Op) { ctx.CMOVLOC(mr, r) }
// CMOVLOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVLOS m32 r32
// CMOVLOS r32 r32
//
// Construct and append a CMOVLOS instruction to the active function.
func (c *Context) CMOVLOS(mr, r operand.Op) {
c.addinstruction(x86.CMOVLOS(mr, r))
}
// CMOVLOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVLOS m32 r32
// CMOVLOS r32 r32
//
// Construct and append a CMOVLOS instruction to the active function.
// Operates on the global context.
func CMOVLOS(mr, r operand.Op) { ctx.CMOVLOS(mr, r) }
// CMOVLPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVLPC m32 r32
// CMOVLPC r32 r32
//
// Construct and append a CMOVLPC instruction to the active function.
func (c *Context) CMOVLPC(mr, r operand.Op) {
c.addinstruction(x86.CMOVLPC(mr, r))
}
// CMOVLPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVLPC m32 r32
// CMOVLPC r32 r32
//
// Construct and append a CMOVLPC instruction to the active function.
// Operates on the global context.
func CMOVLPC(mr, r operand.Op) { ctx.CMOVLPC(mr, r) }
// CMOVLPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVLPL m32 r32
// CMOVLPL r32 r32
//
// Construct and append a CMOVLPL instruction to the active function.
func (c *Context) CMOVLPL(mr, r operand.Op) {
c.addinstruction(x86.CMOVLPL(mr, r))
}
// CMOVLPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVLPL m32 r32
// CMOVLPL r32 r32
//
// Construct and append a CMOVLPL instruction to the active function.
// Operates on the global context.
func CMOVLPL(mr, r operand.Op) { ctx.CMOVLPL(mr, r) }
// CMOVLPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVLPS m32 r32
// CMOVLPS r32 r32
//
// Construct and append a CMOVLPS instruction to the active function.
func (c *Context) CMOVLPS(mr, r operand.Op) {
c.addinstruction(x86.CMOVLPS(mr, r))
}
// CMOVLPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVLPS m32 r32
// CMOVLPS r32 r32
//
// Construct and append a CMOVLPS instruction to the active function.
// Operates on the global context.
func CMOVLPS(mr, r operand.Op) { ctx.CMOVLPS(mr, r) }
// CMOVQCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVQCC m64 r64
// CMOVQCC r64 r64
//
// Construct and append a CMOVQCC instruction to the active function.
func (c *Context) CMOVQCC(mr, r operand.Op) {
c.addinstruction(x86.CMOVQCC(mr, r))
}
// CMOVQCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVQCC m64 r64
// CMOVQCC r64 r64
//
// Construct and append a CMOVQCC instruction to the active function.
// Operates on the global context.
func CMOVQCC(mr, r operand.Op) { ctx.CMOVQCC(mr, r) }
// CMOVQCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVQCS m64 r64
// CMOVQCS r64 r64
//
// Construct and append a CMOVQCS instruction to the active function.
func (c *Context) CMOVQCS(mr, r operand.Op) {
c.addinstruction(x86.CMOVQCS(mr, r))
}
// CMOVQCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVQCS m64 r64
// CMOVQCS r64 r64
//
// Construct and append a CMOVQCS instruction to the active function.
// Operates on the global context.
func CMOVQCS(mr, r operand.Op) { ctx.CMOVQCS(mr, r) }
// CMOVQEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVQEQ m64 r64
// CMOVQEQ r64 r64
//
// Construct and append a CMOVQEQ instruction to the active function.
func (c *Context) CMOVQEQ(mr, r operand.Op) {
c.addinstruction(x86.CMOVQEQ(mr, r))
}
// CMOVQEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVQEQ m64 r64
// CMOVQEQ r64 r64
//
// Construct and append a CMOVQEQ instruction to the active function.
// Operates on the global context.
func CMOVQEQ(mr, r operand.Op) { ctx.CMOVQEQ(mr, r) }
// CMOVQGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVQGE m64 r64
// CMOVQGE r64 r64
//
// Construct and append a CMOVQGE instruction to the active function.
func (c *Context) CMOVQGE(mr, r operand.Op) {
c.addinstruction(x86.CMOVQGE(mr, r))
}
// CMOVQGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVQGE m64 r64
// CMOVQGE r64 r64
//
// Construct and append a CMOVQGE instruction to the active function.
// Operates on the global context.
func CMOVQGE(mr, r operand.Op) { ctx.CMOVQGE(mr, r) }
// CMOVQGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVQGT m64 r64
// CMOVQGT r64 r64
//
// Construct and append a CMOVQGT instruction to the active function.
func (c *Context) CMOVQGT(mr, r operand.Op) {
c.addinstruction(x86.CMOVQGT(mr, r))
}
// CMOVQGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVQGT m64 r64
// CMOVQGT r64 r64
//
// Construct and append a CMOVQGT instruction to the active function.
// Operates on the global context.
func CMOVQGT(mr, r operand.Op) { ctx.CMOVQGT(mr, r) }
// CMOVQHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVQHI m64 r64
// CMOVQHI r64 r64
//
// Construct and append a CMOVQHI instruction to the active function.
func (c *Context) CMOVQHI(mr, r operand.Op) {
c.addinstruction(x86.CMOVQHI(mr, r))
}
// CMOVQHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVQHI m64 r64
// CMOVQHI r64 r64
//
// Construct and append a CMOVQHI instruction to the active function.
// Operates on the global context.
func CMOVQHI(mr, r operand.Op) { ctx.CMOVQHI(mr, r) }
// CMOVQLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVQLE m64 r64
// CMOVQLE r64 r64
//
// Construct and append a CMOVQLE instruction to the active function.
func (c *Context) CMOVQLE(mr, r operand.Op) {
c.addinstruction(x86.CMOVQLE(mr, r))
}
// CMOVQLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVQLE m64 r64
// CMOVQLE r64 r64
//
// Construct and append a CMOVQLE instruction to the active function.
// Operates on the global context.
func CMOVQLE(mr, r operand.Op) { ctx.CMOVQLE(mr, r) }
// CMOVQLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVQLS m64 r64
// CMOVQLS r64 r64
//
// Construct and append a CMOVQLS instruction to the active function.
func (c *Context) CMOVQLS(mr, r operand.Op) {
c.addinstruction(x86.CMOVQLS(mr, r))
}
// CMOVQLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVQLS m64 r64
// CMOVQLS r64 r64
//
// Construct and append a CMOVQLS instruction to the active function.
// Operates on the global context.
func CMOVQLS(mr, r operand.Op) { ctx.CMOVQLS(mr, r) }
// CMOVQLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVQLT m64 r64
// CMOVQLT r64 r64
//
// Construct and append a CMOVQLT instruction to the active function.
func (c *Context) CMOVQLT(mr, r operand.Op) {
c.addinstruction(x86.CMOVQLT(mr, r))
}
// CMOVQLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVQLT m64 r64
// CMOVQLT r64 r64
//
// Construct and append a CMOVQLT instruction to the active function.
// Operates on the global context.
func CMOVQLT(mr, r operand.Op) { ctx.CMOVQLT(mr, r) }
// CMOVQMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVQMI m64 r64
// CMOVQMI r64 r64
//
// Construct and append a CMOVQMI instruction to the active function.
func (c *Context) CMOVQMI(mr, r operand.Op) {
c.addinstruction(x86.CMOVQMI(mr, r))
}
// CMOVQMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVQMI m64 r64
// CMOVQMI r64 r64
//
// Construct and append a CMOVQMI instruction to the active function.
// Operates on the global context.
func CMOVQMI(mr, r operand.Op) { ctx.CMOVQMI(mr, r) }
// CMOVQNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVQNE m64 r64
// CMOVQNE r64 r64
//
// Construct and append a CMOVQNE instruction to the active function.
func (c *Context) CMOVQNE(mr, r operand.Op) {
c.addinstruction(x86.CMOVQNE(mr, r))
}
// CMOVQNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVQNE m64 r64
// CMOVQNE r64 r64
//
// Construct and append a CMOVQNE instruction to the active function.
// Operates on the global context.
func CMOVQNE(mr, r operand.Op) { ctx.CMOVQNE(mr, r) }
// CMOVQOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVQOC m64 r64
// CMOVQOC r64 r64
//
// Construct and append a CMOVQOC instruction to the active function.
func (c *Context) CMOVQOC(mr, r operand.Op) {
c.addinstruction(x86.CMOVQOC(mr, r))
}
// CMOVQOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVQOC m64 r64
// CMOVQOC r64 r64
//
// Construct and append a CMOVQOC instruction to the active function.
// Operates on the global context.
func CMOVQOC(mr, r operand.Op) { ctx.CMOVQOC(mr, r) }
// CMOVQOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVQOS m64 r64
// CMOVQOS r64 r64
//
// Construct and append a CMOVQOS instruction to the active function.
func (c *Context) CMOVQOS(mr, r operand.Op) {
c.addinstruction(x86.CMOVQOS(mr, r))
}
// CMOVQOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVQOS m64 r64
// CMOVQOS r64 r64
//
// Construct and append a CMOVQOS instruction to the active function.
// Operates on the global context.
func CMOVQOS(mr, r operand.Op) { ctx.CMOVQOS(mr, r) }
// CMOVQPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVQPC m64 r64
// CMOVQPC r64 r64
//
// Construct and append a CMOVQPC instruction to the active function.
func (c *Context) CMOVQPC(mr, r operand.Op) {
c.addinstruction(x86.CMOVQPC(mr, r))
}
// CMOVQPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVQPC m64 r64
// CMOVQPC r64 r64
//
// Construct and append a CMOVQPC instruction to the active function.
// Operates on the global context.
func CMOVQPC(mr, r operand.Op) { ctx.CMOVQPC(mr, r) }
// CMOVQPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVQPL m64 r64
// CMOVQPL r64 r64
//
// Construct and append a CMOVQPL instruction to the active function.
func (c *Context) CMOVQPL(mr, r operand.Op) {
c.addinstruction(x86.CMOVQPL(mr, r))
}
// CMOVQPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVQPL m64 r64
// CMOVQPL r64 r64
//
// Construct and append a CMOVQPL instruction to the active function.
// Operates on the global context.
func CMOVQPL(mr, r operand.Op) { ctx.CMOVQPL(mr, r) }
// CMOVQPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVQPS m64 r64
// CMOVQPS r64 r64
//
// Construct and append a CMOVQPS instruction to the active function.
func (c *Context) CMOVQPS(mr, r operand.Op) {
c.addinstruction(x86.CMOVQPS(mr, r))
}
// CMOVQPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVQPS m64 r64
// CMOVQPS r64 r64
//
// Construct and append a CMOVQPS instruction to the active function.
// Operates on the global context.
func CMOVQPS(mr, r operand.Op) { ctx.CMOVQPS(mr, r) }
// CMOVWCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVWCC m16 r16
// CMOVWCC r16 r16
//
// Construct and append a CMOVWCC instruction to the active function.
func (c *Context) CMOVWCC(mr, r operand.Op) {
c.addinstruction(x86.CMOVWCC(mr, r))
}
// CMOVWCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVWCC m16 r16
// CMOVWCC r16 r16
//
// Construct and append a CMOVWCC instruction to the active function.
// Operates on the global context.
func CMOVWCC(mr, r operand.Op) { ctx.CMOVWCC(mr, r) }
// CMOVWCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVWCS m16 r16
// CMOVWCS r16 r16
//
// Construct and append a CMOVWCS instruction to the active function.
func (c *Context) CMOVWCS(mr, r operand.Op) {
c.addinstruction(x86.CMOVWCS(mr, r))
}
// CMOVWCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVWCS m16 r16
// CMOVWCS r16 r16
//
// Construct and append a CMOVWCS instruction to the active function.
// Operates on the global context.
func CMOVWCS(mr, r operand.Op) { ctx.CMOVWCS(mr, r) }
// CMOVWEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVWEQ m16 r16
// CMOVWEQ r16 r16
//
// Construct and append a CMOVWEQ instruction to the active function.
func (c *Context) CMOVWEQ(mr, r operand.Op) {
c.addinstruction(x86.CMOVWEQ(mr, r))
}
// CMOVWEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVWEQ m16 r16
// CMOVWEQ r16 r16
//
// Construct and append a CMOVWEQ instruction to the active function.
// Operates on the global context.
func CMOVWEQ(mr, r operand.Op) { ctx.CMOVWEQ(mr, r) }
// CMOVWGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVWGE m16 r16
// CMOVWGE r16 r16
//
// Construct and append a CMOVWGE instruction to the active function.
func (c *Context) CMOVWGE(mr, r operand.Op) {
c.addinstruction(x86.CMOVWGE(mr, r))
}
// CMOVWGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVWGE m16 r16
// CMOVWGE r16 r16
//
// Construct and append a CMOVWGE instruction to the active function.
// Operates on the global context.
func CMOVWGE(mr, r operand.Op) { ctx.CMOVWGE(mr, r) }
// CMOVWGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVWGT m16 r16
// CMOVWGT r16 r16
//
// Construct and append a CMOVWGT instruction to the active function.
func (c *Context) CMOVWGT(mr, r operand.Op) {
c.addinstruction(x86.CMOVWGT(mr, r))
}
// CMOVWGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVWGT m16 r16
// CMOVWGT r16 r16
//
// Construct and append a CMOVWGT instruction to the active function.
// Operates on the global context.
func CMOVWGT(mr, r operand.Op) { ctx.CMOVWGT(mr, r) }
// CMOVWHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVWHI m16 r16
// CMOVWHI r16 r16
//
// Construct and append a CMOVWHI instruction to the active function.
func (c *Context) CMOVWHI(mr, r operand.Op) {
c.addinstruction(x86.CMOVWHI(mr, r))
}
// CMOVWHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVWHI m16 r16
// CMOVWHI r16 r16
//
// Construct and append a CMOVWHI instruction to the active function.
// Operates on the global context.
func CMOVWHI(mr, r operand.Op) { ctx.CMOVWHI(mr, r) }
// CMOVWLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVWLE m16 r16
// CMOVWLE r16 r16
//
// Construct and append a CMOVWLE instruction to the active function.
func (c *Context) CMOVWLE(mr, r operand.Op) {
c.addinstruction(x86.CMOVWLE(mr, r))
}
// CMOVWLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVWLE m16 r16
// CMOVWLE r16 r16
//
// Construct and append a CMOVWLE instruction to the active function.
// Operates on the global context.
func CMOVWLE(mr, r operand.Op) { ctx.CMOVWLE(mr, r) }
// CMOVWLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVWLS m16 r16
// CMOVWLS r16 r16
//
// Construct and append a CMOVWLS instruction to the active function.
func (c *Context) CMOVWLS(mr, r operand.Op) {
c.addinstruction(x86.CMOVWLS(mr, r))
}
// CMOVWLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVWLS m16 r16
// CMOVWLS r16 r16
//
// Construct and append a CMOVWLS instruction to the active function.
// Operates on the global context.
func CMOVWLS(mr, r operand.Op) { ctx.CMOVWLS(mr, r) }
// CMOVWLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVWLT m16 r16
// CMOVWLT r16 r16
//
// Construct and append a CMOVWLT instruction to the active function.
func (c *Context) CMOVWLT(mr, r operand.Op) {
c.addinstruction(x86.CMOVWLT(mr, r))
}
// CMOVWLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVWLT m16 r16
// CMOVWLT r16 r16
//
// Construct and append a CMOVWLT instruction to the active function.
// Operates on the global context.
func CMOVWLT(mr, r operand.Op) { ctx.CMOVWLT(mr, r) }
// CMOVWMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVWMI m16 r16
// CMOVWMI r16 r16
//
// Construct and append a CMOVWMI instruction to the active function.
func (c *Context) CMOVWMI(mr, r operand.Op) {
c.addinstruction(x86.CMOVWMI(mr, r))
}
// CMOVWMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVWMI m16 r16
// CMOVWMI r16 r16
//
// Construct and append a CMOVWMI instruction to the active function.
// Operates on the global context.
func CMOVWMI(mr, r operand.Op) { ctx.CMOVWMI(mr, r) }
// CMOVWNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVWNE m16 r16
// CMOVWNE r16 r16
//
// Construct and append a CMOVWNE instruction to the active function.
func (c *Context) CMOVWNE(mr, r operand.Op) {
c.addinstruction(x86.CMOVWNE(mr, r))
}
// CMOVWNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVWNE m16 r16
// CMOVWNE r16 r16
//
// Construct and append a CMOVWNE instruction to the active function.
// Operates on the global context.
func CMOVWNE(mr, r operand.Op) { ctx.CMOVWNE(mr, r) }
// CMOVWOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVWOC m16 r16
// CMOVWOC r16 r16
//
// Construct and append a CMOVWOC instruction to the active function.
func (c *Context) CMOVWOC(mr, r operand.Op) {
c.addinstruction(x86.CMOVWOC(mr, r))
}
// CMOVWOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVWOC m16 r16
// CMOVWOC r16 r16
//
// Construct and append a CMOVWOC instruction to the active function.
// Operates on the global context.
func CMOVWOC(mr, r operand.Op) { ctx.CMOVWOC(mr, r) }
// CMOVWOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVWOS m16 r16
// CMOVWOS r16 r16
//
// Construct and append a CMOVWOS instruction to the active function.
func (c *Context) CMOVWOS(mr, r operand.Op) {
c.addinstruction(x86.CMOVWOS(mr, r))
}
// CMOVWOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVWOS m16 r16
// CMOVWOS r16 r16
//
// Construct and append a CMOVWOS instruction to the active function.
// Operates on the global context.
func CMOVWOS(mr, r operand.Op) { ctx.CMOVWOS(mr, r) }
// CMOVWPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVWPC m16 r16
// CMOVWPC r16 r16
//
// Construct and append a CMOVWPC instruction to the active function.
func (c *Context) CMOVWPC(mr, r operand.Op) {
c.addinstruction(x86.CMOVWPC(mr, r))
}
// CMOVWPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVWPC m16 r16
// CMOVWPC r16 r16
//
// Construct and append a CMOVWPC instruction to the active function.
// Operates on the global context.
func CMOVWPC(mr, r operand.Op) { ctx.CMOVWPC(mr, r) }
// CMOVWPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVWPL m16 r16
// CMOVWPL r16 r16
//
// Construct and append a CMOVWPL instruction to the active function.
func (c *Context) CMOVWPL(mr, r operand.Op) {
c.addinstruction(x86.CMOVWPL(mr, r))
}
// CMOVWPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVWPL m16 r16
// CMOVWPL r16 r16
//
// Construct and append a CMOVWPL instruction to the active function.
// Operates on the global context.
func CMOVWPL(mr, r operand.Op) { ctx.CMOVWPL(mr, r) }
// CMOVWPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVWPS m16 r16
// CMOVWPS r16 r16
//
// Construct and append a CMOVWPS instruction to the active function.
func (c *Context) CMOVWPS(mr, r operand.Op) {
c.addinstruction(x86.CMOVWPS(mr, r))
}
// CMOVWPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVWPS m16 r16
// CMOVWPS r16 r16
//
// Construct and append a CMOVWPS instruction to the active function.
// Operates on the global context.
func CMOVWPS(mr, r operand.Op) { ctx.CMOVWPS(mr, r) }
// CMPB: Compare Two Operands.
//
// Forms:
//
// CMPB al imm8
// CMPB m8 imm8
// CMPB m8 r8
// CMPB r8 imm8
// CMPB r8 m8
// CMPB r8 r8
//
// Construct and append a CMPB instruction to the active function.
func (c *Context) CMPB(amr, imr operand.Op) {
c.addinstruction(x86.CMPB(amr, imr))
}
// CMPB: Compare Two Operands.
//
// Forms:
//
// CMPB al imm8
// CMPB m8 imm8
// CMPB m8 r8
// CMPB r8 imm8
// CMPB r8 m8
// CMPB r8 r8
//
// Construct and append a CMPB instruction to the active function.
// Operates on the global context.
func CMPB(amr, imr operand.Op) { ctx.CMPB(amr, imr) }
// CMPL: Compare Two Operands.
//
// Forms:
//
// CMPL eax imm32
// CMPL m32 imm32
// CMPL m32 imm8
// CMPL m32 r32
// CMPL r32 imm32
// CMPL r32 imm8
// CMPL r32 m32
// CMPL r32 r32
//
// Construct and append a CMPL instruction to the active function.
func (c *Context) CMPL(emr, imr operand.Op) {
c.addinstruction(x86.CMPL(emr, imr))
}
// CMPL: Compare Two Operands.
//
// Forms:
//
// CMPL eax imm32
// CMPL m32 imm32
// CMPL m32 imm8
// CMPL m32 r32
// CMPL r32 imm32
// CMPL r32 imm8
// CMPL r32 m32
// CMPL r32 r32
//
// Construct and append a CMPL instruction to the active function.
// Operates on the global context.
func CMPL(emr, imr operand.Op) { ctx.CMPL(emr, imr) }
// CMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPPD m128 xmm imm8
// CMPPD xmm xmm imm8
//
// Construct and append a CMPPD instruction to the active function.
func (c *Context) CMPPD(mx, x, i operand.Op) {
c.addinstruction(x86.CMPPD(mx, x, i))
}
// CMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPPD m128 xmm imm8
// CMPPD xmm xmm imm8
//
// Construct and append a CMPPD instruction to the active function.
// Operates on the global context.
func CMPPD(mx, x, i operand.Op) { ctx.CMPPD(mx, x, i) }
// CMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPPS m128 xmm imm8
// CMPPS xmm xmm imm8
//
// Construct and append a CMPPS instruction to the active function.
func (c *Context) CMPPS(mx, x, i operand.Op) {
c.addinstruction(x86.CMPPS(mx, x, i))
}
// CMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPPS m128 xmm imm8
// CMPPS xmm xmm imm8
//
// Construct and append a CMPPS instruction to the active function.
// Operates on the global context.
func CMPPS(mx, x, i operand.Op) { ctx.CMPPS(mx, x, i) }
// CMPQ: Compare Two Operands.
//
// Forms:
//
// CMPQ m64 imm32
// CMPQ m64 imm8
// CMPQ m64 r64
// CMPQ r64 imm32
// CMPQ r64 imm8
// CMPQ r64 m64
// CMPQ r64 r64
// CMPQ rax imm32
//
// Construct and append a CMPQ instruction to the active function.
func (c *Context) CMPQ(mr, imr operand.Op) {
c.addinstruction(x86.CMPQ(mr, imr))
}
// CMPQ: Compare Two Operands.
//
// Forms:
//
// CMPQ m64 imm32
// CMPQ m64 imm8
// CMPQ m64 r64
// CMPQ r64 imm32
// CMPQ r64 imm8
// CMPQ r64 m64
// CMPQ r64 r64
// CMPQ rax imm32
//
// Construct and append a CMPQ instruction to the active function.
// Operates on the global context.
func CMPQ(mr, imr operand.Op) { ctx.CMPQ(mr, imr) }
// CMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPSD m64 xmm imm8
// CMPSD xmm xmm imm8
//
// Construct and append a CMPSD instruction to the active function.
func (c *Context) CMPSD(mx, x, i operand.Op) {
c.addinstruction(x86.CMPSD(mx, x, i))
}
// CMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPSD m64 xmm imm8
// CMPSD xmm xmm imm8
//
// Construct and append a CMPSD instruction to the active function.
// Operates on the global context.
func CMPSD(mx, x, i operand.Op) { ctx.CMPSD(mx, x, i) }
// CMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPSS m32 xmm imm8
// CMPSS xmm xmm imm8
//
// Construct and append a CMPSS instruction to the active function.
func (c *Context) CMPSS(mx, x, i operand.Op) {
c.addinstruction(x86.CMPSS(mx, x, i))
}
// CMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPSS m32 xmm imm8
// CMPSS xmm xmm imm8
//
// Construct and append a CMPSS instruction to the active function.
// Operates on the global context.
func CMPSS(mx, x, i operand.Op) { ctx.CMPSS(mx, x, i) }
// CMPW: Compare Two Operands.
//
// Forms:
//
// CMPW ax imm16
// CMPW m16 imm16
// CMPW m16 imm8
// CMPW m16 r16
// CMPW r16 imm16
// CMPW r16 imm8
// CMPW r16 m16
// CMPW r16 r16
//
// Construct and append a CMPW instruction to the active function.
func (c *Context) CMPW(amr, imr operand.Op) {
c.addinstruction(x86.CMPW(amr, imr))
}
// CMPW: Compare Two Operands.
//
// Forms:
//
// CMPW ax imm16
// CMPW m16 imm16
// CMPW m16 imm8
// CMPW m16 r16
// CMPW r16 imm16
// CMPW r16 imm8
// CMPW r16 m16
// CMPW r16 r16
//
// Construct and append a CMPW instruction to the active function.
// Operates on the global context.
func CMPW(amr, imr operand.Op) { ctx.CMPW(amr, imr) }
// CMPXCHG16B: Compare and Exchange 16 Bytes.
//
// Forms:
//
// CMPXCHG16B m128
//
// Construct and append a CMPXCHG16B instruction to the active function.
func (c *Context) CMPXCHG16B(m operand.Op) {
c.addinstruction(x86.CMPXCHG16B(m))
}
// CMPXCHG16B: Compare and Exchange 16 Bytes.
//
// Forms:
//
// CMPXCHG16B m128
//
// Construct and append a CMPXCHG16B instruction to the active function.
// Operates on the global context.
func CMPXCHG16B(m operand.Op) { ctx.CMPXCHG16B(m) }
// CMPXCHG8B: Compare and Exchange 8 Bytes.
//
// Forms:
//
// CMPXCHG8B m64
//
// Construct and append a CMPXCHG8B instruction to the active function.
func (c *Context) CMPXCHG8B(m operand.Op) {
c.addinstruction(x86.CMPXCHG8B(m))
}
// CMPXCHG8B: Compare and Exchange 8 Bytes.
//
// Forms:
//
// CMPXCHG8B m64
//
// Construct and append a CMPXCHG8B instruction to the active function.
// Operates on the global context.
func CMPXCHG8B(m operand.Op) { ctx.CMPXCHG8B(m) }
// CMPXCHGB: Compare and Exchange.
//
// Forms:
//
// CMPXCHGB r8 m8
// CMPXCHGB r8 r8
//
// Construct and append a CMPXCHGB instruction to the active function.
func (c *Context) CMPXCHGB(r, mr operand.Op) {
c.addinstruction(x86.CMPXCHGB(r, mr))
}
// CMPXCHGB: Compare and Exchange.
//
// Forms:
//
// CMPXCHGB r8 m8
// CMPXCHGB r8 r8
//
// Construct and append a CMPXCHGB instruction to the active function.
// Operates on the global context.
func CMPXCHGB(r, mr operand.Op) { ctx.CMPXCHGB(r, mr) }
// CMPXCHGL: Compare and Exchange.
//
// Forms:
//
// CMPXCHGL r32 m32
// CMPXCHGL r32 r32
//
// Construct and append a CMPXCHGL instruction to the active function.
func (c *Context) CMPXCHGL(r, mr operand.Op) {
c.addinstruction(x86.CMPXCHGL(r, mr))
}
// CMPXCHGL: Compare and Exchange.
//
// Forms:
//
// CMPXCHGL r32 m32
// CMPXCHGL r32 r32
//
// Construct and append a CMPXCHGL instruction to the active function.
// Operates on the global context.
func CMPXCHGL(r, mr operand.Op) { ctx.CMPXCHGL(r, mr) }
// CMPXCHGQ: Compare and Exchange.
//
// Forms:
//
// CMPXCHGQ r64 m64
// CMPXCHGQ r64 r64
//
// Construct and append a CMPXCHGQ instruction to the active function.
func (c *Context) CMPXCHGQ(r, mr operand.Op) {
c.addinstruction(x86.CMPXCHGQ(r, mr))
}
// CMPXCHGQ: Compare and Exchange.
//
// Forms:
//
// CMPXCHGQ r64 m64
// CMPXCHGQ r64 r64
//
// Construct and append a CMPXCHGQ instruction to the active function.
// Operates on the global context.
func CMPXCHGQ(r, mr operand.Op) { ctx.CMPXCHGQ(r, mr) }
// CMPXCHGW: Compare and Exchange.
//
// Forms:
//
// CMPXCHGW r16 m16
// CMPXCHGW r16 r16
//
// Construct and append a CMPXCHGW instruction to the active function.
func (c *Context) CMPXCHGW(r, mr operand.Op) {
c.addinstruction(x86.CMPXCHGW(r, mr))
}
// CMPXCHGW: Compare and Exchange.
//
// Forms:
//
// CMPXCHGW r16 m16
// CMPXCHGW r16 r16
//
// Construct and append a CMPXCHGW instruction to the active function.
// Operates on the global context.
func CMPXCHGW(r, mr operand.Op) { ctx.CMPXCHGW(r, mr) }
// COMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISD m64 xmm
// COMISD xmm xmm
//
// Construct and append a COMISD instruction to the active function.
func (c *Context) COMISD(mx, x operand.Op) {
c.addinstruction(x86.COMISD(mx, x))
}
// COMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISD m64 xmm
// COMISD xmm xmm
//
// Construct and append a COMISD instruction to the active function.
// Operates on the global context.
func COMISD(mx, x operand.Op) { ctx.COMISD(mx, x) }
// COMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISS m32 xmm
// COMISS xmm xmm
//
// Construct and append a COMISS instruction to the active function.
func (c *Context) COMISS(mx, x operand.Op) {
c.addinstruction(x86.COMISS(mx, x))
}
// COMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISS m32 xmm
// COMISS xmm xmm
//
// Construct and append a COMISS instruction to the active function.
// Operates on the global context.
func COMISS(mx, x operand.Op) { ctx.COMISS(mx, x) }
// CPUID: CPU Identification.
//
// Forms:
//
// CPUID
//
// Construct and append a CPUID instruction to the active function.
func (c *Context) CPUID() {
c.addinstruction(x86.CPUID())
}
// CPUID: CPU Identification.
//
// Forms:
//
// CPUID
//
// Construct and append a CPUID instruction to the active function.
// Operates on the global context.
func CPUID() { ctx.CPUID() }
// CQO: Convert Quadword to Octaword.
//
// Forms:
//
// CQO
//
// Construct and append a CQO instruction to the active function.
func (c *Context) CQO() {
c.addinstruction(x86.CQO())
}
// CQO: Convert Quadword to Octaword.
//
// Forms:
//
// CQO
//
// Construct and append a CQO instruction to the active function.
// Operates on the global context.
func CQO() { ctx.CQO() }
// CRC32B: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32B m8 r32
// CRC32B m8 r64
// CRC32B r8 r32
// CRC32B r8 r64
//
// Construct and append a CRC32B instruction to the active function.
func (c *Context) CRC32B(mr, r operand.Op) {
c.addinstruction(x86.CRC32B(mr, r))
}
// CRC32B: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32B m8 r32
// CRC32B m8 r64
// CRC32B r8 r32
// CRC32B r8 r64
//
// Construct and append a CRC32B instruction to the active function.
// Operates on the global context.
func CRC32B(mr, r operand.Op) { ctx.CRC32B(mr, r) }
// CRC32L: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32L m32 r32
// CRC32L r32 r32
//
// Construct and append a CRC32L instruction to the active function.
func (c *Context) CRC32L(mr, r operand.Op) {
c.addinstruction(x86.CRC32L(mr, r))
}
// CRC32L: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32L m32 r32
// CRC32L r32 r32
//
// Construct and append a CRC32L instruction to the active function.
// Operates on the global context.
func CRC32L(mr, r operand.Op) { ctx.CRC32L(mr, r) }
// CRC32Q: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32Q m64 r64
// CRC32Q r64 r64
//
// Construct and append a CRC32Q instruction to the active function.
func (c *Context) CRC32Q(mr, r operand.Op) {
c.addinstruction(x86.CRC32Q(mr, r))
}
// CRC32Q: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32Q m64 r64
// CRC32Q r64 r64
//
// Construct and append a CRC32Q instruction to the active function.
// Operates on the global context.
func CRC32Q(mr, r operand.Op) { ctx.CRC32Q(mr, r) }
// CRC32W: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32W m16 r32
// CRC32W r16 r32
//
// Construct and append a CRC32W instruction to the active function.
func (c *Context) CRC32W(mr, r operand.Op) {
c.addinstruction(x86.CRC32W(mr, r))
}
// CRC32W: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32W m16 r32
// CRC32W r16 r32
//
// Construct and append a CRC32W instruction to the active function.
// Operates on the global context.
func CRC32W(mr, r operand.Op) { ctx.CRC32W(mr, r) }
// CVTPD2PL: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPD2PL m128 xmm
// CVTPD2PL xmm xmm
//
// Construct and append a CVTPD2PL instruction to the active function.
func (c *Context) CVTPD2PL(mx, x operand.Op) {
c.addinstruction(x86.CVTPD2PL(mx, x))
}
// CVTPD2PL: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPD2PL m128 xmm
// CVTPD2PL xmm xmm
//
// Construct and append a CVTPD2PL instruction to the active function.
// Operates on the global context.
func CVTPD2PL(mx, x operand.Op) { ctx.CVTPD2PL(mx, x) }
// CVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPD2PS m128 xmm
// CVTPD2PS xmm xmm
//
// Construct and append a CVTPD2PS instruction to the active function.
func (c *Context) CVTPD2PS(mx, x operand.Op) {
c.addinstruction(x86.CVTPD2PS(mx, x))
}
// CVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPD2PS m128 xmm
// CVTPD2PS xmm xmm
//
// Construct and append a CVTPD2PS instruction to the active function.
// Operates on the global context.
func CVTPD2PS(mx, x operand.Op) { ctx.CVTPD2PS(mx, x) }
// CVTPL2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPL2PD m64 xmm
// CVTPL2PD xmm xmm
//
// Construct and append a CVTPL2PD instruction to the active function.
func (c *Context) CVTPL2PD(mx, x operand.Op) {
c.addinstruction(x86.CVTPL2PD(mx, x))
}
// CVTPL2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPL2PD m64 xmm
// CVTPL2PD xmm xmm
//
// Construct and append a CVTPL2PD instruction to the active function.
// Operates on the global context.
func CVTPL2PD(mx, x operand.Op) { ctx.CVTPL2PD(mx, x) }
// CVTPL2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPL2PS m128 xmm
// CVTPL2PS xmm xmm
//
// Construct and append a CVTPL2PS instruction to the active function.
func (c *Context) CVTPL2PS(mx, x operand.Op) {
c.addinstruction(x86.CVTPL2PS(mx, x))
}
// CVTPL2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPL2PS m128 xmm
// CVTPL2PS xmm xmm
//
// Construct and append a CVTPL2PS instruction to the active function.
// Operates on the global context.
func CVTPL2PS(mx, x operand.Op) { ctx.CVTPL2PS(mx, x) }
// CVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPS2PD m64 xmm
// CVTPS2PD xmm xmm
//
// Construct and append a CVTPS2PD instruction to the active function.
func (c *Context) CVTPS2PD(mx, x operand.Op) {
c.addinstruction(x86.CVTPS2PD(mx, x))
}
// CVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPS2PD m64 xmm
// CVTPS2PD xmm xmm
//
// Construct and append a CVTPS2PD instruction to the active function.
// Operates on the global context.
func CVTPS2PD(mx, x operand.Op) { ctx.CVTPS2PD(mx, x) }
// CVTPS2PL: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPS2PL m128 xmm
// CVTPS2PL xmm xmm
//
// Construct and append a CVTPS2PL instruction to the active function.
func (c *Context) CVTPS2PL(mx, x operand.Op) {
c.addinstruction(x86.CVTPS2PL(mx, x))
}
// CVTPS2PL: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPS2PL m128 xmm
// CVTPS2PL xmm xmm
//
// Construct and append a CVTPS2PL instruction to the active function.
// Operates on the global context.
func CVTPS2PL(mx, x operand.Op) { ctx.CVTPS2PL(mx, x) }
// CVTSD2SL: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// CVTSD2SL m64 r32
// CVTSD2SL m64 r64
// CVTSD2SL xmm r32
// CVTSD2SL xmm r64
//
// Construct and append a CVTSD2SL instruction to the active function.
func (c *Context) CVTSD2SL(mx, r operand.Op) {
c.addinstruction(x86.CVTSD2SL(mx, r))
}
// CVTSD2SL: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// CVTSD2SL m64 r32
// CVTSD2SL m64 r64
// CVTSD2SL xmm r32
// CVTSD2SL xmm r64
//
// Construct and append a CVTSD2SL instruction to the active function.
// Operates on the global context.
func CVTSD2SL(mx, r operand.Op) { ctx.CVTSD2SL(mx, r) }
// CVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSD2SS m64 xmm
// CVTSD2SS xmm xmm
//
// Construct and append a CVTSD2SS instruction to the active function.
func (c *Context) CVTSD2SS(mx, x operand.Op) {
c.addinstruction(x86.CVTSD2SS(mx, x))
}
// CVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSD2SS m64 xmm
// CVTSD2SS xmm xmm
//
// Construct and append a CVTSD2SS instruction to the active function.
// Operates on the global context.
func CVTSD2SS(mx, x operand.Op) { ctx.CVTSD2SS(mx, x) }
// CVTSL2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSL2SD m32 xmm
// CVTSL2SD r32 xmm
//
// Construct and append a CVTSL2SD instruction to the active function.
func (c *Context) CVTSL2SD(mr, x operand.Op) {
c.addinstruction(x86.CVTSL2SD(mr, x))
}
// CVTSL2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSL2SD m32 xmm
// CVTSL2SD r32 xmm
//
// Construct and append a CVTSL2SD instruction to the active function.
// Operates on the global context.
func CVTSL2SD(mr, x operand.Op) { ctx.CVTSL2SD(mr, x) }
// CVTSL2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSL2SS m32 xmm
// CVTSL2SS r32 xmm
//
// Construct and append a CVTSL2SS instruction to the active function.
func (c *Context) CVTSL2SS(mr, x operand.Op) {
c.addinstruction(x86.CVTSL2SS(mr, x))
}
// CVTSL2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSL2SS m32 xmm
// CVTSL2SS r32 xmm
//
// Construct and append a CVTSL2SS instruction to the active function.
// Operates on the global context.
func CVTSL2SS(mr, x operand.Op) { ctx.CVTSL2SS(mr, x) }
// CVTSQ2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSQ2SD m64 xmm
// CVTSQ2SD r64 xmm
//
// Construct and append a CVTSQ2SD instruction to the active function.
func (c *Context) CVTSQ2SD(mr, x operand.Op) {
c.addinstruction(x86.CVTSQ2SD(mr, x))
}
// CVTSQ2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSQ2SD m64 xmm
// CVTSQ2SD r64 xmm
//
// Construct and append a CVTSQ2SD instruction to the active function.
// Operates on the global context.
func CVTSQ2SD(mr, x operand.Op) { ctx.CVTSQ2SD(mr, x) }
// CVTSQ2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSQ2SS m64 xmm
// CVTSQ2SS r64 xmm
//
// Construct and append a CVTSQ2SS instruction to the active function.
func (c *Context) CVTSQ2SS(mr, x operand.Op) {
c.addinstruction(x86.CVTSQ2SS(mr, x))
}
// CVTSQ2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSQ2SS m64 xmm
// CVTSQ2SS r64 xmm
//
// Construct and append a CVTSQ2SS instruction to the active function.
// Operates on the global context.
func CVTSQ2SS(mr, x operand.Op) { ctx.CVTSQ2SS(mr, x) }
// CVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSS2SD m32 xmm
// CVTSS2SD xmm xmm
//
// Construct and append a CVTSS2SD instruction to the active function.
func (c *Context) CVTSS2SD(mx, x operand.Op) {
c.addinstruction(x86.CVTSS2SD(mx, x))
}
// CVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSS2SD m32 xmm
// CVTSS2SD xmm xmm
//
// Construct and append a CVTSS2SD instruction to the active function.
// Operates on the global context.
func CVTSS2SD(mx, x operand.Op) { ctx.CVTSS2SD(mx, x) }
// CVTSS2SL: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTSS2SL m32 r32
// CVTSS2SL m32 r64
// CVTSS2SL xmm r32
// CVTSS2SL xmm r64
//
// Construct and append a CVTSS2SL instruction to the active function.
func (c *Context) CVTSS2SL(mx, r operand.Op) {
c.addinstruction(x86.CVTSS2SL(mx, r))
}
// CVTSS2SL: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTSS2SL m32 r32
// CVTSS2SL m32 r64
// CVTSS2SL xmm r32
// CVTSS2SL xmm r64
//
// Construct and append a CVTSS2SL instruction to the active function.
// Operates on the global context.
func CVTSS2SL(mx, r operand.Op) { ctx.CVTSS2SL(mx, r) }
// CVTTPD2PL: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPD2PL m128 xmm
// CVTTPD2PL xmm xmm
//
// Construct and append a CVTTPD2PL instruction to the active function.
func (c *Context) CVTTPD2PL(mx, x operand.Op) {
c.addinstruction(x86.CVTTPD2PL(mx, x))
}
// CVTTPD2PL: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPD2PL m128 xmm
// CVTTPD2PL xmm xmm
//
// Construct and append a CVTTPD2PL instruction to the active function.
// Operates on the global context.
func CVTTPD2PL(mx, x operand.Op) { ctx.CVTTPD2PL(mx, x) }
// CVTTPS2PL: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPS2PL m128 xmm
// CVTTPS2PL xmm xmm
//
// Construct and append a CVTTPS2PL instruction to the active function.
func (c *Context) CVTTPS2PL(mx, x operand.Op) {
c.addinstruction(x86.CVTTPS2PL(mx, x))
}
// CVTTPS2PL: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPS2PL m128 xmm
// CVTTPS2PL xmm xmm
//
// Construct and append a CVTTPS2PL instruction to the active function.
// Operates on the global context.
func CVTTPS2PL(mx, x operand.Op) { ctx.CVTTPS2PL(mx, x) }
// CVTTSD2SL: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SL m64 r32
// CVTTSD2SL xmm r32
//
// Construct and append a CVTTSD2SL instruction to the active function.
func (c *Context) CVTTSD2SL(mx, r operand.Op) {
c.addinstruction(x86.CVTTSD2SL(mx, r))
}
// CVTTSD2SL: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SL m64 r32
// CVTTSD2SL xmm r32
//
// Construct and append a CVTTSD2SL instruction to the active function.
// Operates on the global context.
func CVTTSD2SL(mx, r operand.Op) { ctx.CVTTSD2SL(mx, r) }
// CVTTSD2SQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SQ m64 r64
// CVTTSD2SQ xmm r64
//
// Construct and append a CVTTSD2SQ instruction to the active function.
func (c *Context) CVTTSD2SQ(mx, r operand.Op) {
c.addinstruction(x86.CVTTSD2SQ(mx, r))
}
// CVTTSD2SQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SQ m64 r64
// CVTTSD2SQ xmm r64
//
// Construct and append a CVTTSD2SQ instruction to the active function.
// Operates on the global context.
func CVTTSD2SQ(mx, r operand.Op) { ctx.CVTTSD2SQ(mx, r) }
// CVTTSS2SL: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTTSS2SL m32 r32
// CVTTSS2SL m32 r64
// CVTTSS2SL xmm r32
// CVTTSS2SL xmm r64
//
// Construct and append a CVTTSS2SL instruction to the active function.
func (c *Context) CVTTSS2SL(mx, r operand.Op) {
c.addinstruction(x86.CVTTSS2SL(mx, r))
}
// CVTTSS2SL: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTTSS2SL m32 r32
// CVTTSS2SL m32 r64
// CVTTSS2SL xmm r32
// CVTTSS2SL xmm r64
//
// Construct and append a CVTTSS2SL instruction to the active function.
// Operates on the global context.
func CVTTSS2SL(mx, r operand.Op) { ctx.CVTTSS2SL(mx, r) }
// CWD: Convert Word to Doubleword.
//
// Forms:
//
// CWD
//
// Construct and append a CWD instruction to the active function.
func (c *Context) CWD() {
c.addinstruction(x86.CWD())
}
// CWD: Convert Word to Doubleword.
//
// Forms:
//
// CWD
//
// Construct and append a CWD instruction to the active function.
// Operates on the global context.
func CWD() { ctx.CWD() }
// CWDE: Convert Word to Doubleword.
//
// Forms:
//
// CWDE
//
// Construct and append a CWDE instruction to the active function.
func (c *Context) CWDE() {
c.addinstruction(x86.CWDE())
}
// CWDE: Convert Word to Doubleword.
//
// Forms:
//
// CWDE
//
// Construct and append a CWDE instruction to the active function.
// Operates on the global context.
func CWDE() { ctx.CWDE() }
// DECB: Decrement by 1.
//
// Forms:
//
// DECB m8
// DECB r8
//
// Construct and append a DECB instruction to the active function.
func (c *Context) DECB(mr operand.Op) {
c.addinstruction(x86.DECB(mr))
}
// DECB: Decrement by 1.
//
// Forms:
//
// DECB m8
// DECB r8
//
// Construct and append a DECB instruction to the active function.
// Operates on the global context.
func DECB(mr operand.Op) { ctx.DECB(mr) }
// DECL: Decrement by 1.
//
// Forms:
//
// DECL m32
// DECL r32
//
// Construct and append a DECL instruction to the active function.
func (c *Context) DECL(mr operand.Op) {
c.addinstruction(x86.DECL(mr))
}
// DECL: Decrement by 1.
//
// Forms:
//
// DECL m32
// DECL r32
//
// Construct and append a DECL instruction to the active function.
// Operates on the global context.
func DECL(mr operand.Op) { ctx.DECL(mr) }
// DECQ: Decrement by 1.
//
// Forms:
//
// DECQ m64
// DECQ r64
//
// Construct and append a DECQ instruction to the active function.
func (c *Context) DECQ(mr operand.Op) {
c.addinstruction(x86.DECQ(mr))
}
// DECQ: Decrement by 1.
//
// Forms:
//
// DECQ m64
// DECQ r64
//
// Construct and append a DECQ instruction to the active function.
// Operates on the global context.
func DECQ(mr operand.Op) { ctx.DECQ(mr) }
// DECW: Decrement by 1.
//
// Forms:
//
// DECW m16
// DECW r16
//
// Construct and append a DECW instruction to the active function.
func (c *Context) DECW(mr operand.Op) {
c.addinstruction(x86.DECW(mr))
}
// DECW: Decrement by 1.
//
// Forms:
//
// DECW m16
// DECW r16
//
// Construct and append a DECW instruction to the active function.
// Operates on the global context.
func DECW(mr operand.Op) { ctx.DECW(mr) }
// DIVB: Unsigned Divide.
//
// Forms:
//
// DIVB m8
// DIVB r8
//
// Construct and append a DIVB instruction to the active function.
func (c *Context) DIVB(mr operand.Op) {
c.addinstruction(x86.DIVB(mr))
}
// DIVB: Unsigned Divide.
//
// Forms:
//
// DIVB m8
// DIVB r8
//
// Construct and append a DIVB instruction to the active function.
// Operates on the global context.
func DIVB(mr operand.Op) { ctx.DIVB(mr) }
// DIVL: Unsigned Divide.
//
// Forms:
//
// DIVL m32
// DIVL r32
//
// Construct and append a DIVL instruction to the active function.
func (c *Context) DIVL(mr operand.Op) {
c.addinstruction(x86.DIVL(mr))
}
// DIVL: Unsigned Divide.
//
// Forms:
//
// DIVL m32
// DIVL r32
//
// Construct and append a DIVL instruction to the active function.
// Operates on the global context.
func DIVL(mr operand.Op) { ctx.DIVL(mr) }
// DIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVPD m128 xmm
// DIVPD xmm xmm
//
// Construct and append a DIVPD instruction to the active function.
func (c *Context) DIVPD(mx, x operand.Op) {
c.addinstruction(x86.DIVPD(mx, x))
}
// DIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVPD m128 xmm
// DIVPD xmm xmm
//
// Construct and append a DIVPD instruction to the active function.
// Operates on the global context.
func DIVPD(mx, x operand.Op) { ctx.DIVPD(mx, x) }
// DIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVPS m128 xmm
// DIVPS xmm xmm
//
// Construct and append a DIVPS instruction to the active function.
func (c *Context) DIVPS(mx, x operand.Op) {
c.addinstruction(x86.DIVPS(mx, x))
}
// DIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVPS m128 xmm
// DIVPS xmm xmm
//
// Construct and append a DIVPS instruction to the active function.
// Operates on the global context.
func DIVPS(mx, x operand.Op) { ctx.DIVPS(mx, x) }
// DIVQ: Unsigned Divide.
//
// Forms:
//
// DIVQ m64
// DIVQ r64
//
// Construct and append a DIVQ instruction to the active function.
func (c *Context) DIVQ(mr operand.Op) {
c.addinstruction(x86.DIVQ(mr))
}
// DIVQ: Unsigned Divide.
//
// Forms:
//
// DIVQ m64
// DIVQ r64
//
// Construct and append a DIVQ instruction to the active function.
// Operates on the global context.
func DIVQ(mr operand.Op) { ctx.DIVQ(mr) }
// DIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVSD m64 xmm
// DIVSD xmm xmm
//
// Construct and append a DIVSD instruction to the active function.
func (c *Context) DIVSD(mx, x operand.Op) {
c.addinstruction(x86.DIVSD(mx, x))
}
// DIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVSD m64 xmm
// DIVSD xmm xmm
//
// Construct and append a DIVSD instruction to the active function.
// Operates on the global context.
func DIVSD(mx, x operand.Op) { ctx.DIVSD(mx, x) }
// DIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVSS m32 xmm
// DIVSS xmm xmm
//
// Construct and append a DIVSS instruction to the active function.
func (c *Context) DIVSS(mx, x operand.Op) {
c.addinstruction(x86.DIVSS(mx, x))
}
// DIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVSS m32 xmm
// DIVSS xmm xmm
//
// Construct and append a DIVSS instruction to the active function.
// Operates on the global context.
func DIVSS(mx, x operand.Op) { ctx.DIVSS(mx, x) }
// DIVW: Unsigned Divide.
//
// Forms:
//
// DIVW m16
// DIVW r16
//
// Construct and append a DIVW instruction to the active function.
func (c *Context) DIVW(mr operand.Op) {
c.addinstruction(x86.DIVW(mr))
}
// DIVW: Unsigned Divide.
//
// Forms:
//
// DIVW m16
// DIVW r16
//
// Construct and append a DIVW instruction to the active function.
// Operates on the global context.
func DIVW(mr operand.Op) { ctx.DIVW(mr) }
// DPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// DPPD imm8 m128 xmm
// DPPD imm8 xmm xmm
//
// Construct and append a DPPD instruction to the active function.
func (c *Context) DPPD(i, mx, x operand.Op) {
c.addinstruction(x86.DPPD(i, mx, x))
}
// DPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// DPPD imm8 m128 xmm
// DPPD imm8 xmm xmm
//
// Construct and append a DPPD instruction to the active function.
// Operates on the global context.
func DPPD(i, mx, x operand.Op) { ctx.DPPD(i, mx, x) }
// DPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// DPPS imm8 m128 xmm
// DPPS imm8 xmm xmm
//
// Construct and append a DPPS instruction to the active function.
func (c *Context) DPPS(i, mx, x operand.Op) {
c.addinstruction(x86.DPPS(i, mx, x))
}
// DPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// DPPS imm8 m128 xmm
// DPPS imm8 xmm xmm
//
// Construct and append a DPPS instruction to the active function.
// Operates on the global context.
func DPPS(i, mx, x operand.Op) { ctx.DPPS(i, mx, x) }
// EXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// EXTRACTPS imm2u xmm m32
// EXTRACTPS imm2u xmm r32
//
// Construct and append a EXTRACTPS instruction to the active function.
func (c *Context) EXTRACTPS(i, x, mr operand.Op) {
c.addinstruction(x86.EXTRACTPS(i, x, mr))
}
// EXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// EXTRACTPS imm2u xmm m32
// EXTRACTPS imm2u xmm r32
//
// Construct and append a EXTRACTPS instruction to the active function.
// Operates on the global context.
func EXTRACTPS(i, x, mr operand.Op) { ctx.EXTRACTPS(i, x, mr) }
// HADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// HADDPD m128 xmm
// HADDPD xmm xmm
//
// Construct and append a HADDPD instruction to the active function.
func (c *Context) HADDPD(mx, x operand.Op) {
c.addinstruction(x86.HADDPD(mx, x))
}
// HADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// HADDPD m128 xmm
// HADDPD xmm xmm
//
// Construct and append a HADDPD instruction to the active function.
// Operates on the global context.
func HADDPD(mx, x operand.Op) { ctx.HADDPD(mx, x) }
// HADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// HADDPS m128 xmm
// HADDPS xmm xmm
//
// Construct and append a HADDPS instruction to the active function.
func (c *Context) HADDPS(mx, x operand.Op) {
c.addinstruction(x86.HADDPS(mx, x))
}
// HADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// HADDPS m128 xmm
// HADDPS xmm xmm
//
// Construct and append a HADDPS instruction to the active function.
// Operates on the global context.
func HADDPS(mx, x operand.Op) { ctx.HADDPS(mx, x) }
// HSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPD m128 xmm
// HSUBPD xmm xmm
//
// Construct and append a HSUBPD instruction to the active function.
func (c *Context) HSUBPD(mx, x operand.Op) {
c.addinstruction(x86.HSUBPD(mx, x))
}
// HSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPD m128 xmm
// HSUBPD xmm xmm
//
// Construct and append a HSUBPD instruction to the active function.
// Operates on the global context.
func HSUBPD(mx, x operand.Op) { ctx.HSUBPD(mx, x) }
// HSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPS m128 xmm
// HSUBPS xmm xmm
//
// Construct and append a HSUBPS instruction to the active function.
func (c *Context) HSUBPS(mx, x operand.Op) {
c.addinstruction(x86.HSUBPS(mx, x))
}
// HSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPS m128 xmm
// HSUBPS xmm xmm
//
// Construct and append a HSUBPS instruction to the active function.
// Operates on the global context.
func HSUBPS(mx, x operand.Op) { ctx.HSUBPS(mx, x) }
// IDIVB: Signed Divide.
//
// Forms:
//
// IDIVB m8
// IDIVB r8
//
// Construct and append a IDIVB instruction to the active function.
func (c *Context) IDIVB(mr operand.Op) {
c.addinstruction(x86.IDIVB(mr))
}
// IDIVB: Signed Divide.
//
// Forms:
//
// IDIVB m8
// IDIVB r8
//
// Construct and append a IDIVB instruction to the active function.
// Operates on the global context.
func IDIVB(mr operand.Op) { ctx.IDIVB(mr) }
// IDIVL: Signed Divide.
//
// Forms:
//
// IDIVL m32
// IDIVL r32
//
// Construct and append a IDIVL instruction to the active function.
func (c *Context) IDIVL(mr operand.Op) {
c.addinstruction(x86.IDIVL(mr))
}
// IDIVL: Signed Divide.
//
// Forms:
//
// IDIVL m32
// IDIVL r32
//
// Construct and append a IDIVL instruction to the active function.
// Operates on the global context.
func IDIVL(mr operand.Op) { ctx.IDIVL(mr) }
// IDIVQ: Signed Divide.
//
// Forms:
//
// IDIVQ m64
// IDIVQ r64
//
// Construct and append a IDIVQ instruction to the active function.
func (c *Context) IDIVQ(mr operand.Op) {
c.addinstruction(x86.IDIVQ(mr))
}
// IDIVQ: Signed Divide.
//
// Forms:
//
// IDIVQ m64
// IDIVQ r64
//
// Construct and append a IDIVQ instruction to the active function.
// Operates on the global context.
func IDIVQ(mr operand.Op) { ctx.IDIVQ(mr) }
// IDIVW: Signed Divide.
//
// Forms:
//
// IDIVW m16
// IDIVW r16
//
// Construct and append a IDIVW instruction to the active function.
func (c *Context) IDIVW(mr operand.Op) {
c.addinstruction(x86.IDIVW(mr))
}
// IDIVW: Signed Divide.
//
// Forms:
//
// IDIVW m16
// IDIVW r16
//
// Construct and append a IDIVW instruction to the active function.
// Operates on the global context.
func IDIVW(mr operand.Op) { ctx.IDIVW(mr) }
// IMUL3L: Signed Multiply.
//
// Forms:
//
// IMUL3L imm32 m32 r32
// IMUL3L imm32 r32 r32
// IMUL3L imm8 m32 r32
// IMUL3L imm8 r32 r32
//
// Construct and append a IMUL3L instruction to the active function.
func (c *Context) IMUL3L(i, mr, r operand.Op) {
c.addinstruction(x86.IMUL3L(i, mr, r))
}
// IMUL3L: Signed Multiply.
//
// Forms:
//
// IMUL3L imm32 m32 r32
// IMUL3L imm32 r32 r32
// IMUL3L imm8 m32 r32
// IMUL3L imm8 r32 r32
//
// Construct and append a IMUL3L instruction to the active function.
// Operates on the global context.
func IMUL3L(i, mr, r operand.Op) { ctx.IMUL3L(i, mr, r) }
// IMUL3Q: Signed Multiply.
//
// Forms:
//
// IMUL3Q imm32 m64 r64
// IMUL3Q imm32 r64 r64
// IMUL3Q imm8 m64 r64
// IMUL3Q imm8 r64 r64
//
// Construct and append a IMUL3Q instruction to the active function.
func (c *Context) IMUL3Q(i, mr, r operand.Op) {
c.addinstruction(x86.IMUL3Q(i, mr, r))
}
// IMUL3Q: Signed Multiply.
//
// Forms:
//
// IMUL3Q imm32 m64 r64
// IMUL3Q imm32 r64 r64
// IMUL3Q imm8 m64 r64
// IMUL3Q imm8 r64 r64
//
// Construct and append a IMUL3Q instruction to the active function.
// Operates on the global context.
func IMUL3Q(i, mr, r operand.Op) { ctx.IMUL3Q(i, mr, r) }
// IMUL3W: Signed Multiply.
//
// Forms:
//
// IMUL3W imm16 m16 r16
// IMUL3W imm16 r16 r16
// IMUL3W imm8 m16 r16
// IMUL3W imm8 r16 r16
//
// Construct and append a IMUL3W instruction to the active function.
func (c *Context) IMUL3W(i, mr, r operand.Op) {
c.addinstruction(x86.IMUL3W(i, mr, r))
}
// IMUL3W: Signed Multiply.
//
// Forms:
//
// IMUL3W imm16 m16 r16
// IMUL3W imm16 r16 r16
// IMUL3W imm8 m16 r16
// IMUL3W imm8 r16 r16
//
// Construct and append a IMUL3W instruction to the active function.
// Operates on the global context.
func IMUL3W(i, mr, r operand.Op) { ctx.IMUL3W(i, mr, r) }
// IMULB: Signed Multiply.
//
// Forms:
//
// IMULB m8
// IMULB r8
//
// Construct and append a IMULB instruction to the active function.
func (c *Context) IMULB(mr operand.Op) {
c.addinstruction(x86.IMULB(mr))
}
// IMULB: Signed Multiply.
//
// Forms:
//
// IMULB m8
// IMULB r8
//
// Construct and append a IMULB instruction to the active function.
// Operates on the global context.
func IMULB(mr operand.Op) { ctx.IMULB(mr) }
// IMULL: Signed Multiply.
//
// Forms:
//
// IMULL m32 r32
// IMULL m32
// IMULL r32 r32
// IMULL r32
//
// Construct and append a IMULL instruction to the active function.
func (c *Context) IMULL(ops ...operand.Op) {
c.addinstruction(x86.IMULL(ops...))
}
// IMULL: Signed Multiply.
//
// Forms:
//
// IMULL m32 r32
// IMULL m32
// IMULL r32 r32
// IMULL r32
//
// Construct and append a IMULL instruction to the active function.
// Operates on the global context.
func IMULL(ops ...operand.Op) { ctx.IMULL(ops...) }
// IMULQ: Signed Multiply.
//
// Forms:
//
// IMULQ m64 r64
// IMULQ m64
// IMULQ r64 r64
// IMULQ r64
//
// Construct and append a IMULQ instruction to the active function.
func (c *Context) IMULQ(ops ...operand.Op) {
c.addinstruction(x86.IMULQ(ops...))
}
// IMULQ: Signed Multiply.
//
// Forms:
//
// IMULQ m64 r64
// IMULQ m64
// IMULQ r64 r64
// IMULQ r64
//
// Construct and append a IMULQ instruction to the active function.
// Operates on the global context.
func IMULQ(ops ...operand.Op) { ctx.IMULQ(ops...) }
// IMULW: Signed Multiply.
//
// Forms:
//
// IMULW m16 r16
// IMULW m16
// IMULW r16 r16
// IMULW r16
//
// Construct and append a IMULW instruction to the active function.
func (c *Context) IMULW(ops ...operand.Op) {
c.addinstruction(x86.IMULW(ops...))
}
// IMULW: Signed Multiply.
//
// Forms:
//
// IMULW m16 r16
// IMULW m16
// IMULW r16 r16
// IMULW r16
//
// Construct and append a IMULW instruction to the active function.
// Operates on the global context.
func IMULW(ops ...operand.Op) { ctx.IMULW(ops...) }
// INCB: Increment by 1.
//
// Forms:
//
// INCB m8
// INCB r8
//
// Construct and append a INCB instruction to the active function.
func (c *Context) INCB(mr operand.Op) {
c.addinstruction(x86.INCB(mr))
}
// INCB: Increment by 1.
//
// Forms:
//
// INCB m8
// INCB r8
//
// Construct and append a INCB instruction to the active function.
// Operates on the global context.
func INCB(mr operand.Op) { ctx.INCB(mr) }
// INCL: Increment by 1.
//
// Forms:
//
// INCL m32
// INCL r32
//
// Construct and append a INCL instruction to the active function.
func (c *Context) INCL(mr operand.Op) {
c.addinstruction(x86.INCL(mr))
}
// INCL: Increment by 1.
//
// Forms:
//
// INCL m32
// INCL r32
//
// Construct and append a INCL instruction to the active function.
// Operates on the global context.
func INCL(mr operand.Op) { ctx.INCL(mr) }
// INCQ: Increment by 1.
//
// Forms:
//
// INCQ m64
// INCQ r64
//
// Construct and append a INCQ instruction to the active function.
func (c *Context) INCQ(mr operand.Op) {
c.addinstruction(x86.INCQ(mr))
}
// INCQ: Increment by 1.
//
// Forms:
//
// INCQ m64
// INCQ r64
//
// Construct and append a INCQ instruction to the active function.
// Operates on the global context.
func INCQ(mr operand.Op) { ctx.INCQ(mr) }
// INCW: Increment by 1.
//
// Forms:
//
// INCW m16
// INCW r16
//
// Construct and append a INCW instruction to the active function.
func (c *Context) INCW(mr operand.Op) {
c.addinstruction(x86.INCW(mr))
}
// INCW: Increment by 1.
//
// Forms:
//
// INCW m16
// INCW r16
//
// Construct and append a INCW instruction to the active function.
// Operates on the global context.
func INCW(mr operand.Op) { ctx.INCW(mr) }
// INSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// INSERTPS imm8 m32 xmm
// INSERTPS imm8 xmm xmm
//
// Construct and append a INSERTPS instruction to the active function.
func (c *Context) INSERTPS(i, mx, x operand.Op) {
c.addinstruction(x86.INSERTPS(i, mx, x))
}
// INSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// INSERTPS imm8 m32 xmm
// INSERTPS imm8 xmm xmm
//
// Construct and append a INSERTPS instruction to the active function.
// Operates on the global context.
func INSERTPS(i, mx, x operand.Op) { ctx.INSERTPS(i, mx, x) }
// INT: Call to Interrupt Procedure.
//
// Forms:
//
// INT 3
// INT imm8
//
// Construct and append a INT instruction to the active function.
func (c *Context) INT(i operand.Op) {
c.addinstruction(x86.INT(i))
}
// INT: Call to Interrupt Procedure.
//
// Forms:
//
// INT 3
// INT imm8
//
// Construct and append a INT instruction to the active function.
// Operates on the global context.
func INT(i operand.Op) { ctx.INT(i) }
// JA: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JA rel32
// JA rel8
//
// Construct and append a JA instruction to the active function.
func (c *Context) JA(r operand.Op) {
c.addinstruction(x86.JA(r))
}
// JA: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JA rel32
// JA rel8
//
// Construct and append a JA instruction to the active function.
// Operates on the global context.
func JA(r operand.Op) { ctx.JA(r) }
// JAE: Jump if above or equal (CF == 0).
//
// Forms:
//
// JAE rel32
// JAE rel8
//
// Construct and append a JAE instruction to the active function.
func (c *Context) JAE(r operand.Op) {
c.addinstruction(x86.JAE(r))
}
// JAE: Jump if above or equal (CF == 0).
//
// Forms:
//
// JAE rel32
// JAE rel8
//
// Construct and append a JAE instruction to the active function.
// Operates on the global context.
func JAE(r operand.Op) { ctx.JAE(r) }
// JB: Jump if below (CF == 1).
//
// Forms:
//
// JB rel32
// JB rel8
//
// Construct and append a JB instruction to the active function.
func (c *Context) JB(r operand.Op) {
c.addinstruction(x86.JB(r))
}
// JB: Jump if below (CF == 1).
//
// Forms:
//
// JB rel32
// JB rel8
//
// Construct and append a JB instruction to the active function.
// Operates on the global context.
func JB(r operand.Op) { ctx.JB(r) }
// JBE: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JBE rel32
// JBE rel8
//
// Construct and append a JBE instruction to the active function.
func (c *Context) JBE(r operand.Op) {
c.addinstruction(x86.JBE(r))
}
// JBE: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JBE rel32
// JBE rel8
//
// Construct and append a JBE instruction to the active function.
// Operates on the global context.
func JBE(r operand.Op) { ctx.JBE(r) }
// JC: Jump if below (CF == 1).
//
// Forms:
//
// JC rel32
// JC rel8
//
// Construct and append a JC instruction to the active function.
func (c *Context) JC(r operand.Op) {
c.addinstruction(x86.JC(r))
}
// JC: Jump if below (CF == 1).
//
// Forms:
//
// JC rel32
// JC rel8
//
// Construct and append a JC instruction to the active function.
// Operates on the global context.
func JC(r operand.Op) { ctx.JC(r) }
// JCC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JCC rel32
// JCC rel8
//
// Construct and append a JCC instruction to the active function.
func (c *Context) JCC(r operand.Op) {
c.addinstruction(x86.JCC(r))
}
// JCC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JCC rel32
// JCC rel8
//
// Construct and append a JCC instruction to the active function.
// Operates on the global context.
func JCC(r operand.Op) { ctx.JCC(r) }
// JCS: Jump if below (CF == 1).
//
// Forms:
//
// JCS rel32
// JCS rel8
//
// Construct and append a JCS instruction to the active function.
func (c *Context) JCS(r operand.Op) {
c.addinstruction(x86.JCS(r))
}
// JCS: Jump if below (CF == 1).
//
// Forms:
//
// JCS rel32
// JCS rel8
//
// Construct and append a JCS instruction to the active function.
// Operates on the global context.
func JCS(r operand.Op) { ctx.JCS(r) }
// JCXZL: Jump if ECX register is 0.
//
// Forms:
//
// JCXZL rel8
//
// Construct and append a JCXZL instruction to the active function.
func (c *Context) JCXZL(r operand.Op) {
c.addinstruction(x86.JCXZL(r))
}
// JCXZL: Jump if ECX register is 0.
//
// Forms:
//
// JCXZL rel8
//
// Construct and append a JCXZL instruction to the active function.
// Operates on the global context.
func JCXZL(r operand.Op) { ctx.JCXZL(r) }
// JCXZQ: Jump if RCX register is 0.
//
// Forms:
//
// JCXZQ rel8
//
// Construct and append a JCXZQ instruction to the active function.
func (c *Context) JCXZQ(r operand.Op) {
c.addinstruction(x86.JCXZQ(r))
}
// JCXZQ: Jump if RCX register is 0.
//
// Forms:
//
// JCXZQ rel8
//
// Construct and append a JCXZQ instruction to the active function.
// Operates on the global context.
func JCXZQ(r operand.Op) { ctx.JCXZQ(r) }
// JE: Jump if equal (ZF == 1).
//
// Forms:
//
// JE rel32
// JE rel8
//
// Construct and append a JE instruction to the active function.
func (c *Context) JE(r operand.Op) {
c.addinstruction(x86.JE(r))
}
// JE: Jump if equal (ZF == 1).
//
// Forms:
//
// JE rel32
// JE rel8
//
// Construct and append a JE instruction to the active function.
// Operates on the global context.
func JE(r operand.Op) { ctx.JE(r) }
// JEQ: Jump if equal (ZF == 1).
//
// Forms:
//
// JEQ rel32
// JEQ rel8
//
// Construct and append a JEQ instruction to the active function.
func (c *Context) JEQ(r operand.Op) {
c.addinstruction(x86.JEQ(r))
}
// JEQ: Jump if equal (ZF == 1).
//
// Forms:
//
// JEQ rel32
// JEQ rel8
//
// Construct and append a JEQ instruction to the active function.
// Operates on the global context.
func JEQ(r operand.Op) { ctx.JEQ(r) }
// JG: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JG rel32
// JG rel8
//
// Construct and append a JG instruction to the active function.
func (c *Context) JG(r operand.Op) {
c.addinstruction(x86.JG(r))
}
// JG: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JG rel32
// JG rel8
//
// Construct and append a JG instruction to the active function.
// Operates on the global context.
func JG(r operand.Op) { ctx.JG(r) }
// JGE: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JGE rel32
// JGE rel8
//
// Construct and append a JGE instruction to the active function.
func (c *Context) JGE(r operand.Op) {
c.addinstruction(x86.JGE(r))
}
// JGE: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JGE rel32
// JGE rel8
//
// Construct and append a JGE instruction to the active function.
// Operates on the global context.
func JGE(r operand.Op) { ctx.JGE(r) }
// JGT: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JGT rel32
// JGT rel8
//
// Construct and append a JGT instruction to the active function.
func (c *Context) JGT(r operand.Op) {
c.addinstruction(x86.JGT(r))
}
// JGT: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JGT rel32
// JGT rel8
//
// Construct and append a JGT instruction to the active function.
// Operates on the global context.
func JGT(r operand.Op) { ctx.JGT(r) }
// JHI: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JHI rel32
// JHI rel8
//
// Construct and append a JHI instruction to the active function.
func (c *Context) JHI(r operand.Op) {
c.addinstruction(x86.JHI(r))
}
// JHI: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JHI rel32
// JHI rel8
//
// Construct and append a JHI instruction to the active function.
// Operates on the global context.
func JHI(r operand.Op) { ctx.JHI(r) }
// JHS: Jump if above or equal (CF == 0).
//
// Forms:
//
// JHS rel32
// JHS rel8
//
// Construct and append a JHS instruction to the active function.
func (c *Context) JHS(r operand.Op) {
c.addinstruction(x86.JHS(r))
}
// JHS: Jump if above or equal (CF == 0).
//
// Forms:
//
// JHS rel32
// JHS rel8
//
// Construct and append a JHS instruction to the active function.
// Operates on the global context.
func JHS(r operand.Op) { ctx.JHS(r) }
// JL: Jump if less (SF != OF).
//
// Forms:
//
// JL rel32
// JL rel8
//
// Construct and append a JL instruction to the active function.
func (c *Context) JL(r operand.Op) {
c.addinstruction(x86.JL(r))
}
// JL: Jump if less (SF != OF).
//
// Forms:
//
// JL rel32
// JL rel8
//
// Construct and append a JL instruction to the active function.
// Operates on the global context.
func JL(r operand.Op) { ctx.JL(r) }
// JLE: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JLE rel32
// JLE rel8
//
// Construct and append a JLE instruction to the active function.
func (c *Context) JLE(r operand.Op) {
c.addinstruction(x86.JLE(r))
}
// JLE: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JLE rel32
// JLE rel8
//
// Construct and append a JLE instruction to the active function.
// Operates on the global context.
func JLE(r operand.Op) { ctx.JLE(r) }
// JLO: Jump if below (CF == 1).
//
// Forms:
//
// JLO rel32
// JLO rel8
//
// Construct and append a JLO instruction to the active function.
func (c *Context) JLO(r operand.Op) {
c.addinstruction(x86.JLO(r))
}
// JLO: Jump if below (CF == 1).
//
// Forms:
//
// JLO rel32
// JLO rel8
//
// Construct and append a JLO instruction to the active function.
// Operates on the global context.
func JLO(r operand.Op) { ctx.JLO(r) }
// JLS: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JLS rel32
// JLS rel8
//
// Construct and append a JLS instruction to the active function.
func (c *Context) JLS(r operand.Op) {
c.addinstruction(x86.JLS(r))
}
// JLS: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JLS rel32
// JLS rel8
//
// Construct and append a JLS instruction to the active function.
// Operates on the global context.
func JLS(r operand.Op) { ctx.JLS(r) }
// JLT: Jump if less (SF != OF).
//
// Forms:
//
// JLT rel32
// JLT rel8
//
// Construct and append a JLT instruction to the active function.
func (c *Context) JLT(r operand.Op) {
c.addinstruction(x86.JLT(r))
}
// JLT: Jump if less (SF != OF).
//
// Forms:
//
// JLT rel32
// JLT rel8
//
// Construct and append a JLT instruction to the active function.
// Operates on the global context.
func JLT(r operand.Op) { ctx.JLT(r) }
// JMI: Jump if sign (SF == 1).
//
// Forms:
//
// JMI rel32
// JMI rel8
//
// Construct and append a JMI instruction to the active function.
func (c *Context) JMI(r operand.Op) {
c.addinstruction(x86.JMI(r))
}
// JMI: Jump if sign (SF == 1).
//
// Forms:
//
// JMI rel32
// JMI rel8
//
// Construct and append a JMI instruction to the active function.
// Operates on the global context.
func JMI(r operand.Op) { ctx.JMI(r) }
// JMP: Jump Unconditionally.
//
// Forms:
//
// JMP rel32
// JMP rel8
// JMP m64
// JMP r64
//
// Construct and append a JMP instruction to the active function.
func (c *Context) JMP(mr operand.Op) {
c.addinstruction(x86.JMP(mr))
}
// JMP: Jump Unconditionally.
//
// Forms:
//
// JMP rel32
// JMP rel8
// JMP m64
// JMP r64
//
// Construct and append a JMP instruction to the active function.
// Operates on the global context.
func JMP(mr operand.Op) { ctx.JMP(mr) }
// JNA: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JNA rel32
// JNA rel8
//
// Construct and append a JNA instruction to the active function.
func (c *Context) JNA(r operand.Op) {
c.addinstruction(x86.JNA(r))
}
// JNA: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JNA rel32
// JNA rel8
//
// Construct and append a JNA instruction to the active function.
// Operates on the global context.
func JNA(r operand.Op) { ctx.JNA(r) }
// JNAE: Jump if below (CF == 1).
//
// Forms:
//
// JNAE rel32
// JNAE rel8
//
// Construct and append a JNAE instruction to the active function.
func (c *Context) JNAE(r operand.Op) {
c.addinstruction(x86.JNAE(r))
}
// JNAE: Jump if below (CF == 1).
//
// Forms:
//
// JNAE rel32
// JNAE rel8
//
// Construct and append a JNAE instruction to the active function.
// Operates on the global context.
func JNAE(r operand.Op) { ctx.JNAE(r) }
// JNB: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNB rel32
// JNB rel8
//
// Construct and append a JNB instruction to the active function.
func (c *Context) JNB(r operand.Op) {
c.addinstruction(x86.JNB(r))
}
// JNB: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNB rel32
// JNB rel8
//
// Construct and append a JNB instruction to the active function.
// Operates on the global context.
func JNB(r operand.Op) { ctx.JNB(r) }
// JNBE: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JNBE rel32
// JNBE rel8
//
// Construct and append a JNBE instruction to the active function.
func (c *Context) JNBE(r operand.Op) {
c.addinstruction(x86.JNBE(r))
}
// JNBE: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JNBE rel32
// JNBE rel8
//
// Construct and append a JNBE instruction to the active function.
// Operates on the global context.
func JNBE(r operand.Op) { ctx.JNBE(r) }
// JNC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNC rel32
// JNC rel8
//
// Construct and append a JNC instruction to the active function.
func (c *Context) JNC(r operand.Op) {
c.addinstruction(x86.JNC(r))
}
// JNC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNC rel32
// JNC rel8
//
// Construct and append a JNC instruction to the active function.
// Operates on the global context.
func JNC(r operand.Op) { ctx.JNC(r) }
// JNE: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNE rel32
// JNE rel8
//
// Construct and append a JNE instruction to the active function.
func (c *Context) JNE(r operand.Op) {
c.addinstruction(x86.JNE(r))
}
// JNE: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNE rel32
// JNE rel8
//
// Construct and append a JNE instruction to the active function.
// Operates on the global context.
func JNE(r operand.Op) { ctx.JNE(r) }
// JNG: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JNG rel32
// JNG rel8
//
// Construct and append a JNG instruction to the active function.
func (c *Context) JNG(r operand.Op) {
c.addinstruction(x86.JNG(r))
}
// JNG: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JNG rel32
// JNG rel8
//
// Construct and append a JNG instruction to the active function.
// Operates on the global context.
func JNG(r operand.Op) { ctx.JNG(r) }
// JNGE: Jump if less (SF != OF).
//
// Forms:
//
// JNGE rel32
// JNGE rel8
//
// Construct and append a JNGE instruction to the active function.
func (c *Context) JNGE(r operand.Op) {
c.addinstruction(x86.JNGE(r))
}
// JNGE: Jump if less (SF != OF).
//
// Forms:
//
// JNGE rel32
// JNGE rel8
//
// Construct and append a JNGE instruction to the active function.
// Operates on the global context.
func JNGE(r operand.Op) { ctx.JNGE(r) }
// JNL: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JNL rel32
// JNL rel8
//
// Construct and append a JNL instruction to the active function.
func (c *Context) JNL(r operand.Op) {
c.addinstruction(x86.JNL(r))
}
// JNL: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JNL rel32
// JNL rel8
//
// Construct and append a JNL instruction to the active function.
// Operates on the global context.
func JNL(r operand.Op) { ctx.JNL(r) }
// JNLE: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JNLE rel32
// JNLE rel8
//
// Construct and append a JNLE instruction to the active function.
func (c *Context) JNLE(r operand.Op) {
c.addinstruction(x86.JNLE(r))
}
// JNLE: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JNLE rel32
// JNLE rel8
//
// Construct and append a JNLE instruction to the active function.
// Operates on the global context.
func JNLE(r operand.Op) { ctx.JNLE(r) }
// JNO: Jump if not overflow (OF == 0).
//
// Forms:
//
// JNO rel32
// JNO rel8
//
// Construct and append a JNO instruction to the active function.
func (c *Context) JNO(r operand.Op) {
c.addinstruction(x86.JNO(r))
}
// JNO: Jump if not overflow (OF == 0).
//
// Forms:
//
// JNO rel32
// JNO rel8
//
// Construct and append a JNO instruction to the active function.
// Operates on the global context.
func JNO(r operand.Op) { ctx.JNO(r) }
// JNP: Jump if not parity (PF == 0).
//
// Forms:
//
// JNP rel32
// JNP rel8
//
// Construct and append a JNP instruction to the active function.
func (c *Context) JNP(r operand.Op) {
c.addinstruction(x86.JNP(r))
}
// JNP: Jump if not parity (PF == 0).
//
// Forms:
//
// JNP rel32
// JNP rel8
//
// Construct and append a JNP instruction to the active function.
// Operates on the global context.
func JNP(r operand.Op) { ctx.JNP(r) }
// JNS: Jump if not sign (SF == 0).
//
// Forms:
//
// JNS rel32
// JNS rel8
//
// Construct and append a JNS instruction to the active function.
func (c *Context) JNS(r operand.Op) {
c.addinstruction(x86.JNS(r))
}
// JNS: Jump if not sign (SF == 0).
//
// Forms:
//
// JNS rel32
// JNS rel8
//
// Construct and append a JNS instruction to the active function.
// Operates on the global context.
func JNS(r operand.Op) { ctx.JNS(r) }
// JNZ: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNZ rel32
// JNZ rel8
//
// Construct and append a JNZ instruction to the active function.
func (c *Context) JNZ(r operand.Op) {
c.addinstruction(x86.JNZ(r))
}
// JNZ: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNZ rel32
// JNZ rel8
//
// Construct and append a JNZ instruction to the active function.
// Operates on the global context.
func JNZ(r operand.Op) { ctx.JNZ(r) }
// JO: Jump if overflow (OF == 1).
//
// Forms:
//
// JO rel32
// JO rel8
//
// Construct and append a JO instruction to the active function.
func (c *Context) JO(r operand.Op) {
c.addinstruction(x86.JO(r))
}
// JO: Jump if overflow (OF == 1).
//
// Forms:
//
// JO rel32
// JO rel8
//
// Construct and append a JO instruction to the active function.
// Operates on the global context.
func JO(r operand.Op) { ctx.JO(r) }
// JOC: Jump if not overflow (OF == 0).
//
// Forms:
//
// JOC rel32
// JOC rel8
//
// Construct and append a JOC instruction to the active function.
func (c *Context) JOC(r operand.Op) {
c.addinstruction(x86.JOC(r))
}
// JOC: Jump if not overflow (OF == 0).
//
// Forms:
//
// JOC rel32
// JOC rel8
//
// Construct and append a JOC instruction to the active function.
// Operates on the global context.
func JOC(r operand.Op) { ctx.JOC(r) }
// JOS: Jump if overflow (OF == 1).
//
// Forms:
//
// JOS rel32
// JOS rel8
//
// Construct and append a JOS instruction to the active function.
func (c *Context) JOS(r operand.Op) {
c.addinstruction(x86.JOS(r))
}
// JOS: Jump if overflow (OF == 1).
//
// Forms:
//
// JOS rel32
// JOS rel8
//
// Construct and append a JOS instruction to the active function.
// Operates on the global context.
func JOS(r operand.Op) { ctx.JOS(r) }
// JP: Jump if parity (PF == 1).
//
// Forms:
//
// JP rel32
// JP rel8
//
// Construct and append a JP instruction to the active function.
func (c *Context) JP(r operand.Op) {
c.addinstruction(x86.JP(r))
}
// JP: Jump if parity (PF == 1).
//
// Forms:
//
// JP rel32
// JP rel8
//
// Construct and append a JP instruction to the active function.
// Operates on the global context.
func JP(r operand.Op) { ctx.JP(r) }
// JPC: Jump if not parity (PF == 0).
//
// Forms:
//
// JPC rel32
// JPC rel8
//
// Construct and append a JPC instruction to the active function.
func (c *Context) JPC(r operand.Op) {
c.addinstruction(x86.JPC(r))
}
// JPC: Jump if not parity (PF == 0).
//
// Forms:
//
// JPC rel32
// JPC rel8
//
// Construct and append a JPC instruction to the active function.
// Operates on the global context.
func JPC(r operand.Op) { ctx.JPC(r) }
// JPE: Jump if parity (PF == 1).
//
// Forms:
//
// JPE rel32
// JPE rel8
//
// Construct and append a JPE instruction to the active function.
func (c *Context) JPE(r operand.Op) {
c.addinstruction(x86.JPE(r))
}
// JPE: Jump if parity (PF == 1).
//
// Forms:
//
// JPE rel32
// JPE rel8
//
// Construct and append a JPE instruction to the active function.
// Operates on the global context.
func JPE(r operand.Op) { ctx.JPE(r) }
// JPL: Jump if not sign (SF == 0).
//
// Forms:
//
// JPL rel32
// JPL rel8
//
// Construct and append a JPL instruction to the active function.
func (c *Context) JPL(r operand.Op) {
c.addinstruction(x86.JPL(r))
}
// JPL: Jump if not sign (SF == 0).
//
// Forms:
//
// JPL rel32
// JPL rel8
//
// Construct and append a JPL instruction to the active function.
// Operates on the global context.
func JPL(r operand.Op) { ctx.JPL(r) }
// JPO: Jump if not parity (PF == 0).
//
// Forms:
//
// JPO rel32
// JPO rel8
//
// Construct and append a JPO instruction to the active function.
func (c *Context) JPO(r operand.Op) {
c.addinstruction(x86.JPO(r))
}
// JPO: Jump if not parity (PF == 0).
//
// Forms:
//
// JPO rel32
// JPO rel8
//
// Construct and append a JPO instruction to the active function.
// Operates on the global context.
func JPO(r operand.Op) { ctx.JPO(r) }
// JPS: Jump if parity (PF == 1).
//
// Forms:
//
// JPS rel32
// JPS rel8
//
// Construct and append a JPS instruction to the active function.
func (c *Context) JPS(r operand.Op) {
c.addinstruction(x86.JPS(r))
}
// JPS: Jump if parity (PF == 1).
//
// Forms:
//
// JPS rel32
// JPS rel8
//
// Construct and append a JPS instruction to the active function.
// Operates on the global context.
func JPS(r operand.Op) { ctx.JPS(r) }
// JS: Jump if sign (SF == 1).
//
// Forms:
//
// JS rel32
// JS rel8
//
// Construct and append a JS instruction to the active function.
func (c *Context) JS(r operand.Op) {
c.addinstruction(x86.JS(r))
}
// JS: Jump if sign (SF == 1).
//
// Forms:
//
// JS rel32
// JS rel8
//
// Construct and append a JS instruction to the active function.
// Operates on the global context.
func JS(r operand.Op) { ctx.JS(r) }
// JZ: Jump if equal (ZF == 1).
//
// Forms:
//
// JZ rel32
// JZ rel8
//
// Construct and append a JZ instruction to the active function.
func (c *Context) JZ(r operand.Op) {
c.addinstruction(x86.JZ(r))
}
// JZ: Jump if equal (ZF == 1).
//
// Forms:
//
// JZ rel32
// JZ rel8
//
// Construct and append a JZ instruction to the active function.
// Operates on the global context.
func JZ(r operand.Op) { ctx.JZ(r) }
// KADDB: ADD Two 8-bit Masks.
//
// Forms:
//
// KADDB k k k
//
// Construct and append a KADDB instruction to the active function.
func (c *Context) KADDB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KADDB(k, k1, k2))
}
// KADDB: ADD Two 8-bit Masks.
//
// Forms:
//
// KADDB k k k
//
// Construct and append a KADDB instruction to the active function.
// Operates on the global context.
func KADDB(k, k1, k2 operand.Op) { ctx.KADDB(k, k1, k2) }
// KADDD: ADD Two 32-bit Masks.
//
// Forms:
//
// KADDD k k k
//
// Construct and append a KADDD instruction to the active function.
func (c *Context) KADDD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KADDD(k, k1, k2))
}
// KADDD: ADD Two 32-bit Masks.
//
// Forms:
//
// KADDD k k k
//
// Construct and append a KADDD instruction to the active function.
// Operates on the global context.
func KADDD(k, k1, k2 operand.Op) { ctx.KADDD(k, k1, k2) }
// KADDQ: ADD Two 64-bit Masks.
//
// Forms:
//
// KADDQ k k k
//
// Construct and append a KADDQ instruction to the active function.
func (c *Context) KADDQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KADDQ(k, k1, k2))
}
// KADDQ: ADD Two 64-bit Masks.
//
// Forms:
//
// KADDQ k k k
//
// Construct and append a KADDQ instruction to the active function.
// Operates on the global context.
func KADDQ(k, k1, k2 operand.Op) { ctx.KADDQ(k, k1, k2) }
// KADDW: ADD Two 16-bit Masks.
//
// Forms:
//
// KADDW k k k
//
// Construct and append a KADDW instruction to the active function.
func (c *Context) KADDW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KADDW(k, k1, k2))
}
// KADDW: ADD Two 16-bit Masks.
//
// Forms:
//
// KADDW k k k
//
// Construct and append a KADDW instruction to the active function.
// Operates on the global context.
func KADDW(k, k1, k2 operand.Op) { ctx.KADDW(k, k1, k2) }
// KANDB: Bitwise Logical AND 8-bit Masks.
//
// Forms:
//
// KANDB k k k
//
// Construct and append a KANDB instruction to the active function.
func (c *Context) KANDB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDB(k, k1, k2))
}
// KANDB: Bitwise Logical AND 8-bit Masks.
//
// Forms:
//
// KANDB k k k
//
// Construct and append a KANDB instruction to the active function.
// Operates on the global context.
func KANDB(k, k1, k2 operand.Op) { ctx.KANDB(k, k1, k2) }
// KANDD: Bitwise Logical AND 32-bit Masks.
//
// Forms:
//
// KANDD k k k
//
// Construct and append a KANDD instruction to the active function.
func (c *Context) KANDD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDD(k, k1, k2))
}
// KANDD: Bitwise Logical AND 32-bit Masks.
//
// Forms:
//
// KANDD k k k
//
// Construct and append a KANDD instruction to the active function.
// Operates on the global context.
func KANDD(k, k1, k2 operand.Op) { ctx.KANDD(k, k1, k2) }
// KANDNB: Bitwise Logical AND NOT 8-bit Masks.
//
// Forms:
//
// KANDNB k k k
//
// Construct and append a KANDNB instruction to the active function.
func (c *Context) KANDNB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDNB(k, k1, k2))
}
// KANDNB: Bitwise Logical AND NOT 8-bit Masks.
//
// Forms:
//
// KANDNB k k k
//
// Construct and append a KANDNB instruction to the active function.
// Operates on the global context.
func KANDNB(k, k1, k2 operand.Op) { ctx.KANDNB(k, k1, k2) }
// KANDND: Bitwise Logical AND NOT 32-bit Masks.
//
// Forms:
//
// KANDND k k k
//
// Construct and append a KANDND instruction to the active function.
func (c *Context) KANDND(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDND(k, k1, k2))
}
// KANDND: Bitwise Logical AND NOT 32-bit Masks.
//
// Forms:
//
// KANDND k k k
//
// Construct and append a KANDND instruction to the active function.
// Operates on the global context.
func KANDND(k, k1, k2 operand.Op) { ctx.KANDND(k, k1, k2) }
// KANDNQ: Bitwise Logical AND NOT 64-bit Masks.
//
// Forms:
//
// KANDNQ k k k
//
// Construct and append a KANDNQ instruction to the active function.
func (c *Context) KANDNQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDNQ(k, k1, k2))
}
// KANDNQ: Bitwise Logical AND NOT 64-bit Masks.
//
// Forms:
//
// KANDNQ k k k
//
// Construct and append a KANDNQ instruction to the active function.
// Operates on the global context.
func KANDNQ(k, k1, k2 operand.Op) { ctx.KANDNQ(k, k1, k2) }
// KANDNW: Bitwise Logical AND NOT 16-bit Masks.
//
// Forms:
//
// KANDNW k k k
//
// Construct and append a KANDNW instruction to the active function.
func (c *Context) KANDNW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDNW(k, k1, k2))
}
// KANDNW: Bitwise Logical AND NOT 16-bit Masks.
//
// Forms:
//
// KANDNW k k k
//
// Construct and append a KANDNW instruction to the active function.
// Operates on the global context.
func KANDNW(k, k1, k2 operand.Op) { ctx.KANDNW(k, k1, k2) }
// KANDQ: Bitwise Logical AND 64-bit Masks.
//
// Forms:
//
// KANDQ k k k
//
// Construct and append a KANDQ instruction to the active function.
func (c *Context) KANDQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDQ(k, k1, k2))
}
// KANDQ: Bitwise Logical AND 64-bit Masks.
//
// Forms:
//
// KANDQ k k k
//
// Construct and append a KANDQ instruction to the active function.
// Operates on the global context.
func KANDQ(k, k1, k2 operand.Op) { ctx.KANDQ(k, k1, k2) }
// KANDW: Bitwise Logical AND 16-bit Masks.
//
// Forms:
//
// KANDW k k k
//
// Construct and append a KANDW instruction to the active function.
func (c *Context) KANDW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KANDW(k, k1, k2))
}
// KANDW: Bitwise Logical AND 16-bit Masks.
//
// Forms:
//
// KANDW k k k
//
// Construct and append a KANDW instruction to the active function.
// Operates on the global context.
func KANDW(k, k1, k2 operand.Op) { ctx.KANDW(k, k1, k2) }
// KMOVB: Move 8-bit Mask.
//
// Forms:
//
// KMOVB k k
// KMOVB k m8
// KMOVB k r32
// KMOVB m8 k
// KMOVB r32 k
//
// Construct and append a KMOVB instruction to the active function.
func (c *Context) KMOVB(kmr, kmr1 operand.Op) {
c.addinstruction(x86.KMOVB(kmr, kmr1))
}
// KMOVB: Move 8-bit Mask.
//
// Forms:
//
// KMOVB k k
// KMOVB k m8
// KMOVB k r32
// KMOVB m8 k
// KMOVB r32 k
//
// Construct and append a KMOVB instruction to the active function.
// Operates on the global context.
func KMOVB(kmr, kmr1 operand.Op) { ctx.KMOVB(kmr, kmr1) }
// KMOVD: Move 32-bit Mask.
//
// Forms:
//
// KMOVD k k
// KMOVD k m32
// KMOVD k r32
// KMOVD m32 k
// KMOVD r32 k
//
// Construct and append a KMOVD instruction to the active function.
func (c *Context) KMOVD(kmr, kmr1 operand.Op) {
c.addinstruction(x86.KMOVD(kmr, kmr1))
}
// KMOVD: Move 32-bit Mask.
//
// Forms:
//
// KMOVD k k
// KMOVD k m32
// KMOVD k r32
// KMOVD m32 k
// KMOVD r32 k
//
// Construct and append a KMOVD instruction to the active function.
// Operates on the global context.
func KMOVD(kmr, kmr1 operand.Op) { ctx.KMOVD(kmr, kmr1) }
// KMOVQ: Move 64-bit Mask.
//
// Forms:
//
// KMOVQ k k
// KMOVQ k m64
// KMOVQ k r64
// KMOVQ m64 k
// KMOVQ r64 k
//
// Construct and append a KMOVQ instruction to the active function.
func (c *Context) KMOVQ(kmr, kmr1 operand.Op) {
c.addinstruction(x86.KMOVQ(kmr, kmr1))
}
// KMOVQ: Move 64-bit Mask.
//
// Forms:
//
// KMOVQ k k
// KMOVQ k m64
// KMOVQ k r64
// KMOVQ m64 k
// KMOVQ r64 k
//
// Construct and append a KMOVQ instruction to the active function.
// Operates on the global context.
func KMOVQ(kmr, kmr1 operand.Op) { ctx.KMOVQ(kmr, kmr1) }
// KMOVW: Move 16-bit Mask.
//
// Forms:
//
// KMOVW k k
// KMOVW k m16
// KMOVW k r32
// KMOVW m16 k
// KMOVW r32 k
//
// Construct and append a KMOVW instruction to the active function.
func (c *Context) KMOVW(kmr, kmr1 operand.Op) {
c.addinstruction(x86.KMOVW(kmr, kmr1))
}
// KMOVW: Move 16-bit Mask.
//
// Forms:
//
// KMOVW k k
// KMOVW k m16
// KMOVW k r32
// KMOVW m16 k
// KMOVW r32 k
//
// Construct and append a KMOVW instruction to the active function.
// Operates on the global context.
func KMOVW(kmr, kmr1 operand.Op) { ctx.KMOVW(kmr, kmr1) }
// KNOTB: NOT 8-bit Mask Register.
//
// Forms:
//
// KNOTB k k
//
// Construct and append a KNOTB instruction to the active function.
func (c *Context) KNOTB(k, k1 operand.Op) {
c.addinstruction(x86.KNOTB(k, k1))
}
// KNOTB: NOT 8-bit Mask Register.
//
// Forms:
//
// KNOTB k k
//
// Construct and append a KNOTB instruction to the active function.
// Operates on the global context.
func KNOTB(k, k1 operand.Op) { ctx.KNOTB(k, k1) }
// KNOTD: NOT 32-bit Mask Register.
//
// Forms:
//
// KNOTD k k
//
// Construct and append a KNOTD instruction to the active function.
func (c *Context) KNOTD(k, k1 operand.Op) {
c.addinstruction(x86.KNOTD(k, k1))
}
// KNOTD: NOT 32-bit Mask Register.
//
// Forms:
//
// KNOTD k k
//
// Construct and append a KNOTD instruction to the active function.
// Operates on the global context.
func KNOTD(k, k1 operand.Op) { ctx.KNOTD(k, k1) }
// KNOTQ: NOT 64-bit Mask Register.
//
// Forms:
//
// KNOTQ k k
//
// Construct and append a KNOTQ instruction to the active function.
func (c *Context) KNOTQ(k, k1 operand.Op) {
c.addinstruction(x86.KNOTQ(k, k1))
}
// KNOTQ: NOT 64-bit Mask Register.
//
// Forms:
//
// KNOTQ k k
//
// Construct and append a KNOTQ instruction to the active function.
// Operates on the global context.
func KNOTQ(k, k1 operand.Op) { ctx.KNOTQ(k, k1) }
// KNOTW: NOT 16-bit Mask Register.
//
// Forms:
//
// KNOTW k k
//
// Construct and append a KNOTW instruction to the active function.
func (c *Context) KNOTW(k, k1 operand.Op) {
c.addinstruction(x86.KNOTW(k, k1))
}
// KNOTW: NOT 16-bit Mask Register.
//
// Forms:
//
// KNOTW k k
//
// Construct and append a KNOTW instruction to the active function.
// Operates on the global context.
func KNOTW(k, k1 operand.Op) { ctx.KNOTW(k, k1) }
// KORB: Bitwise Logical OR 8-bit Masks.
//
// Forms:
//
// KORB k k k
//
// Construct and append a KORB instruction to the active function.
func (c *Context) KORB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KORB(k, k1, k2))
}
// KORB: Bitwise Logical OR 8-bit Masks.
//
// Forms:
//
// KORB k k k
//
// Construct and append a KORB instruction to the active function.
// Operates on the global context.
func KORB(k, k1, k2 operand.Op) { ctx.KORB(k, k1, k2) }
// KORD: Bitwise Logical OR 32-bit Masks.
//
// Forms:
//
// KORD k k k
//
// Construct and append a KORD instruction to the active function.
func (c *Context) KORD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KORD(k, k1, k2))
}
// KORD: Bitwise Logical OR 32-bit Masks.
//
// Forms:
//
// KORD k k k
//
// Construct and append a KORD instruction to the active function.
// Operates on the global context.
func KORD(k, k1, k2 operand.Op) { ctx.KORD(k, k1, k2) }
// KORQ: Bitwise Logical OR 64-bit Masks.
//
// Forms:
//
// KORQ k k k
//
// Construct and append a KORQ instruction to the active function.
func (c *Context) KORQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KORQ(k, k1, k2))
}
// KORQ: Bitwise Logical OR 64-bit Masks.
//
// Forms:
//
// KORQ k k k
//
// Construct and append a KORQ instruction to the active function.
// Operates on the global context.
func KORQ(k, k1, k2 operand.Op) { ctx.KORQ(k, k1, k2) }
// KORTESTB: OR 8-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTB k k
//
// Construct and append a KORTESTB instruction to the active function.
func (c *Context) KORTESTB(k, k1 operand.Op) {
c.addinstruction(x86.KORTESTB(k, k1))
}
// KORTESTB: OR 8-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTB k k
//
// Construct and append a KORTESTB instruction to the active function.
// Operates on the global context.
func KORTESTB(k, k1 operand.Op) { ctx.KORTESTB(k, k1) }
// KORTESTD: OR 32-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTD k k
//
// Construct and append a KORTESTD instruction to the active function.
func (c *Context) KORTESTD(k, k1 operand.Op) {
c.addinstruction(x86.KORTESTD(k, k1))
}
// KORTESTD: OR 32-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTD k k
//
// Construct and append a KORTESTD instruction to the active function.
// Operates on the global context.
func KORTESTD(k, k1 operand.Op) { ctx.KORTESTD(k, k1) }
// KORTESTQ: OR 64-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTQ k k
//
// Construct and append a KORTESTQ instruction to the active function.
func (c *Context) KORTESTQ(k, k1 operand.Op) {
c.addinstruction(x86.KORTESTQ(k, k1))
}
// KORTESTQ: OR 64-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTQ k k
//
// Construct and append a KORTESTQ instruction to the active function.
// Operates on the global context.
func KORTESTQ(k, k1 operand.Op) { ctx.KORTESTQ(k, k1) }
// KORTESTW: OR 16-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTW k k
//
// Construct and append a KORTESTW instruction to the active function.
func (c *Context) KORTESTW(k, k1 operand.Op) {
c.addinstruction(x86.KORTESTW(k, k1))
}
// KORTESTW: OR 16-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTW k k
//
// Construct and append a KORTESTW instruction to the active function.
// Operates on the global context.
func KORTESTW(k, k1 operand.Op) { ctx.KORTESTW(k, k1) }
// KORW: Bitwise Logical OR 16-bit Masks.
//
// Forms:
//
// KORW k k k
//
// Construct and append a KORW instruction to the active function.
func (c *Context) KORW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KORW(k, k1, k2))
}
// KORW: Bitwise Logical OR 16-bit Masks.
//
// Forms:
//
// KORW k k k
//
// Construct and append a KORW instruction to the active function.
// Operates on the global context.
func KORW(k, k1, k2 operand.Op) { ctx.KORW(k, k1, k2) }
// KSHIFTLB: Shift Left 8-bit Masks.
//
// Forms:
//
// KSHIFTLB imm8 k k
//
// Construct and append a KSHIFTLB instruction to the active function.
func (c *Context) KSHIFTLB(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTLB(i, k, k1))
}
// KSHIFTLB: Shift Left 8-bit Masks.
//
// Forms:
//
// KSHIFTLB imm8 k k
//
// Construct and append a KSHIFTLB instruction to the active function.
// Operates on the global context.
func KSHIFTLB(i, k, k1 operand.Op) { ctx.KSHIFTLB(i, k, k1) }
// KSHIFTLD: Shift Left 32-bit Masks.
//
// Forms:
//
// KSHIFTLD imm8 k k
//
// Construct and append a KSHIFTLD instruction to the active function.
func (c *Context) KSHIFTLD(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTLD(i, k, k1))
}
// KSHIFTLD: Shift Left 32-bit Masks.
//
// Forms:
//
// KSHIFTLD imm8 k k
//
// Construct and append a KSHIFTLD instruction to the active function.
// Operates on the global context.
func KSHIFTLD(i, k, k1 operand.Op) { ctx.KSHIFTLD(i, k, k1) }
// KSHIFTLQ: Shift Left 64-bit Masks.
//
// Forms:
//
// KSHIFTLQ imm8 k k
//
// Construct and append a KSHIFTLQ instruction to the active function.
func (c *Context) KSHIFTLQ(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTLQ(i, k, k1))
}
// KSHIFTLQ: Shift Left 64-bit Masks.
//
// Forms:
//
// KSHIFTLQ imm8 k k
//
// Construct and append a KSHIFTLQ instruction to the active function.
// Operates on the global context.
func KSHIFTLQ(i, k, k1 operand.Op) { ctx.KSHIFTLQ(i, k, k1) }
// KSHIFTLW: Shift Left 16-bit Masks.
//
// Forms:
//
// KSHIFTLW imm8 k k
//
// Construct and append a KSHIFTLW instruction to the active function.
func (c *Context) KSHIFTLW(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTLW(i, k, k1))
}
// KSHIFTLW: Shift Left 16-bit Masks.
//
// Forms:
//
// KSHIFTLW imm8 k k
//
// Construct and append a KSHIFTLW instruction to the active function.
// Operates on the global context.
func KSHIFTLW(i, k, k1 operand.Op) { ctx.KSHIFTLW(i, k, k1) }
// KSHIFTRB: Shift Right 8-bit Masks.
//
// Forms:
//
// KSHIFTRB imm8 k k
//
// Construct and append a KSHIFTRB instruction to the active function.
func (c *Context) KSHIFTRB(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTRB(i, k, k1))
}
// KSHIFTRB: Shift Right 8-bit Masks.
//
// Forms:
//
// KSHIFTRB imm8 k k
//
// Construct and append a KSHIFTRB instruction to the active function.
// Operates on the global context.
func KSHIFTRB(i, k, k1 operand.Op) { ctx.KSHIFTRB(i, k, k1) }
// KSHIFTRD: Shift Right 32-bit Masks.
//
// Forms:
//
// KSHIFTRD imm8 k k
//
// Construct and append a KSHIFTRD instruction to the active function.
func (c *Context) KSHIFTRD(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTRD(i, k, k1))
}
// KSHIFTRD: Shift Right 32-bit Masks.
//
// Forms:
//
// KSHIFTRD imm8 k k
//
// Construct and append a KSHIFTRD instruction to the active function.
// Operates on the global context.
func KSHIFTRD(i, k, k1 operand.Op) { ctx.KSHIFTRD(i, k, k1) }
// KSHIFTRQ: Shift Right 64-bit Masks.
//
// Forms:
//
// KSHIFTRQ imm8 k k
//
// Construct and append a KSHIFTRQ instruction to the active function.
func (c *Context) KSHIFTRQ(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTRQ(i, k, k1))
}
// KSHIFTRQ: Shift Right 64-bit Masks.
//
// Forms:
//
// KSHIFTRQ imm8 k k
//
// Construct and append a KSHIFTRQ instruction to the active function.
// Operates on the global context.
func KSHIFTRQ(i, k, k1 operand.Op) { ctx.KSHIFTRQ(i, k, k1) }
// KSHIFTRW: Shift Right 16-bit Masks.
//
// Forms:
//
// KSHIFTRW imm8 k k
//
// Construct and append a KSHIFTRW instruction to the active function.
func (c *Context) KSHIFTRW(i, k, k1 operand.Op) {
c.addinstruction(x86.KSHIFTRW(i, k, k1))
}
// KSHIFTRW: Shift Right 16-bit Masks.
//
// Forms:
//
// KSHIFTRW imm8 k k
//
// Construct and append a KSHIFTRW instruction to the active function.
// Operates on the global context.
func KSHIFTRW(i, k, k1 operand.Op) { ctx.KSHIFTRW(i, k, k1) }
// KTESTB: Bit Test 8-bit Masks and Set Flags.
//
// Forms:
//
// KTESTB k k
//
// Construct and append a KTESTB instruction to the active function.
func (c *Context) KTESTB(k, k1 operand.Op) {
c.addinstruction(x86.KTESTB(k, k1))
}
// KTESTB: Bit Test 8-bit Masks and Set Flags.
//
// Forms:
//
// KTESTB k k
//
// Construct and append a KTESTB instruction to the active function.
// Operates on the global context.
func KTESTB(k, k1 operand.Op) { ctx.KTESTB(k, k1) }
// KTESTD: Bit Test 32-bit Masks and Set Flags.
//
// Forms:
//
// KTESTD k k
//
// Construct and append a KTESTD instruction to the active function.
func (c *Context) KTESTD(k, k1 operand.Op) {
c.addinstruction(x86.KTESTD(k, k1))
}
// KTESTD: Bit Test 32-bit Masks and Set Flags.
//
// Forms:
//
// KTESTD k k
//
// Construct and append a KTESTD instruction to the active function.
// Operates on the global context.
func KTESTD(k, k1 operand.Op) { ctx.KTESTD(k, k1) }
// KTESTQ: Bit Test 64-bit Masks and Set Flags.
//
// Forms:
//
// KTESTQ k k
//
// Construct and append a KTESTQ instruction to the active function.
func (c *Context) KTESTQ(k, k1 operand.Op) {
c.addinstruction(x86.KTESTQ(k, k1))
}
// KTESTQ: Bit Test 64-bit Masks and Set Flags.
//
// Forms:
//
// KTESTQ k k
//
// Construct and append a KTESTQ instruction to the active function.
// Operates on the global context.
func KTESTQ(k, k1 operand.Op) { ctx.KTESTQ(k, k1) }
// KTESTW: Bit Test 16-bit Masks and Set Flags.
//
// Forms:
//
// KTESTW k k
//
// Construct and append a KTESTW instruction to the active function.
func (c *Context) KTESTW(k, k1 operand.Op) {
c.addinstruction(x86.KTESTW(k, k1))
}
// KTESTW: Bit Test 16-bit Masks and Set Flags.
//
// Forms:
//
// KTESTW k k
//
// Construct and append a KTESTW instruction to the active function.
// Operates on the global context.
func KTESTW(k, k1 operand.Op) { ctx.KTESTW(k, k1) }
// KUNPCKBW: Unpack and Interleave 8-bit Masks.
//
// Forms:
//
// KUNPCKBW k k k
//
// Construct and append a KUNPCKBW instruction to the active function.
func (c *Context) KUNPCKBW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KUNPCKBW(k, k1, k2))
}
// KUNPCKBW: Unpack and Interleave 8-bit Masks.
//
// Forms:
//
// KUNPCKBW k k k
//
// Construct and append a KUNPCKBW instruction to the active function.
// Operates on the global context.
func KUNPCKBW(k, k1, k2 operand.Op) { ctx.KUNPCKBW(k, k1, k2) }
// KUNPCKDQ: Unpack and Interleave 32-bit Masks.
//
// Forms:
//
// KUNPCKDQ k k k
//
// Construct and append a KUNPCKDQ instruction to the active function.
func (c *Context) KUNPCKDQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KUNPCKDQ(k, k1, k2))
}
// KUNPCKDQ: Unpack and Interleave 32-bit Masks.
//
// Forms:
//
// KUNPCKDQ k k k
//
// Construct and append a KUNPCKDQ instruction to the active function.
// Operates on the global context.
func KUNPCKDQ(k, k1, k2 operand.Op) { ctx.KUNPCKDQ(k, k1, k2) }
// KUNPCKWD: Unpack and Interleave 16-bit Masks.
//
// Forms:
//
// KUNPCKWD k k k
//
// Construct and append a KUNPCKWD instruction to the active function.
func (c *Context) KUNPCKWD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KUNPCKWD(k, k1, k2))
}
// KUNPCKWD: Unpack and Interleave 16-bit Masks.
//
// Forms:
//
// KUNPCKWD k k k
//
// Construct and append a KUNPCKWD instruction to the active function.
// Operates on the global context.
func KUNPCKWD(k, k1, k2 operand.Op) { ctx.KUNPCKWD(k, k1, k2) }
// KXNORB: Bitwise Logical XNOR 8-bit Masks.
//
// Forms:
//
// KXNORB k k k
//
// Construct and append a KXNORB instruction to the active function.
func (c *Context) KXNORB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXNORB(k, k1, k2))
}
// KXNORB: Bitwise Logical XNOR 8-bit Masks.
//
// Forms:
//
// KXNORB k k k
//
// Construct and append a KXNORB instruction to the active function.
// Operates on the global context.
func KXNORB(k, k1, k2 operand.Op) { ctx.KXNORB(k, k1, k2) }
// KXNORD: Bitwise Logical XNOR 32-bit Masks.
//
// Forms:
//
// KXNORD k k k
//
// Construct and append a KXNORD instruction to the active function.
func (c *Context) KXNORD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXNORD(k, k1, k2))
}
// KXNORD: Bitwise Logical XNOR 32-bit Masks.
//
// Forms:
//
// KXNORD k k k
//
// Construct and append a KXNORD instruction to the active function.
// Operates on the global context.
func KXNORD(k, k1, k2 operand.Op) { ctx.KXNORD(k, k1, k2) }
// KXNORQ: Bitwise Logical XNOR 64-bit Masks.
//
// Forms:
//
// KXNORQ k k k
//
// Construct and append a KXNORQ instruction to the active function.
func (c *Context) KXNORQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXNORQ(k, k1, k2))
}
// KXNORQ: Bitwise Logical XNOR 64-bit Masks.
//
// Forms:
//
// KXNORQ k k k
//
// Construct and append a KXNORQ instruction to the active function.
// Operates on the global context.
func KXNORQ(k, k1, k2 operand.Op) { ctx.KXNORQ(k, k1, k2) }
// KXNORW: Bitwise Logical XNOR 16-bit Masks.
//
// Forms:
//
// KXNORW k k k
//
// Construct and append a KXNORW instruction to the active function.
func (c *Context) KXNORW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXNORW(k, k1, k2))
}
// KXNORW: Bitwise Logical XNOR 16-bit Masks.
//
// Forms:
//
// KXNORW k k k
//
// Construct and append a KXNORW instruction to the active function.
// Operates on the global context.
func KXNORW(k, k1, k2 operand.Op) { ctx.KXNORW(k, k1, k2) }
// KXORB: Bitwise Logical XOR 8-bit Masks.
//
// Forms:
//
// KXORB k k k
//
// Construct and append a KXORB instruction to the active function.
func (c *Context) KXORB(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXORB(k, k1, k2))
}
// KXORB: Bitwise Logical XOR 8-bit Masks.
//
// Forms:
//
// KXORB k k k
//
// Construct and append a KXORB instruction to the active function.
// Operates on the global context.
func KXORB(k, k1, k2 operand.Op) { ctx.KXORB(k, k1, k2) }
// KXORD: Bitwise Logical XOR 32-bit Masks.
//
// Forms:
//
// KXORD k k k
//
// Construct and append a KXORD instruction to the active function.
func (c *Context) KXORD(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXORD(k, k1, k2))
}
// KXORD: Bitwise Logical XOR 32-bit Masks.
//
// Forms:
//
// KXORD k k k
//
// Construct and append a KXORD instruction to the active function.
// Operates on the global context.
func KXORD(k, k1, k2 operand.Op) { ctx.KXORD(k, k1, k2) }
// KXORQ: Bitwise Logical XOR 64-bit Masks.
//
// Forms:
//
// KXORQ k k k
//
// Construct and append a KXORQ instruction to the active function.
func (c *Context) KXORQ(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXORQ(k, k1, k2))
}
// KXORQ: Bitwise Logical XOR 64-bit Masks.
//
// Forms:
//
// KXORQ k k k
//
// Construct and append a KXORQ instruction to the active function.
// Operates on the global context.
func KXORQ(k, k1, k2 operand.Op) { ctx.KXORQ(k, k1, k2) }
// KXORW: Bitwise Logical XOR 16-bit Masks.
//
// Forms:
//
// KXORW k k k
//
// Construct and append a KXORW instruction to the active function.
func (c *Context) KXORW(k, k1, k2 operand.Op) {
c.addinstruction(x86.KXORW(k, k1, k2))
}
// KXORW: Bitwise Logical XOR 16-bit Masks.
//
// Forms:
//
// KXORW k k k
//
// Construct and append a KXORW instruction to the active function.
// Operates on the global context.
func KXORW(k, k1, k2 operand.Op) { ctx.KXORW(k, k1, k2) }
// LDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// LDDQU m128 xmm
//
// Construct and append a LDDQU instruction to the active function.
func (c *Context) LDDQU(m, x operand.Op) {
c.addinstruction(x86.LDDQU(m, x))
}
// LDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// LDDQU m128 xmm
//
// Construct and append a LDDQU instruction to the active function.
// Operates on the global context.
func LDDQU(m, x operand.Op) { ctx.LDDQU(m, x) }
// LDMXCSR: Load MXCSR Register.
//
// Forms:
//
// LDMXCSR m32
//
// Construct and append a LDMXCSR instruction to the active function.
func (c *Context) LDMXCSR(m operand.Op) {
c.addinstruction(x86.LDMXCSR(m))
}
// LDMXCSR: Load MXCSR Register.
//
// Forms:
//
// LDMXCSR m32
//
// Construct and append a LDMXCSR instruction to the active function.
// Operates on the global context.
func LDMXCSR(m operand.Op) { ctx.LDMXCSR(m) }
// LEAL: Load Effective Address.
//
// Forms:
//
// LEAL m r32
//
// Construct and append a LEAL instruction to the active function.
func (c *Context) LEAL(m, r operand.Op) {
c.addinstruction(x86.LEAL(m, r))
}
// LEAL: Load Effective Address.
//
// Forms:
//
// LEAL m r32
//
// Construct and append a LEAL instruction to the active function.
// Operates on the global context.
func LEAL(m, r operand.Op) { ctx.LEAL(m, r) }
// LEAQ: Load Effective Address.
//
// Forms:
//
// LEAQ m r64
//
// Construct and append a LEAQ instruction to the active function.
func (c *Context) LEAQ(m, r operand.Op) {
c.addinstruction(x86.LEAQ(m, r))
}
// LEAQ: Load Effective Address.
//
// Forms:
//
// LEAQ m r64
//
// Construct and append a LEAQ instruction to the active function.
// Operates on the global context.
func LEAQ(m, r operand.Op) { ctx.LEAQ(m, r) }
// LEAW: Load Effective Address.
//
// Forms:
//
// LEAW m r16
//
// Construct and append a LEAW instruction to the active function.
func (c *Context) LEAW(m, r operand.Op) {
c.addinstruction(x86.LEAW(m, r))
}
// LEAW: Load Effective Address.
//
// Forms:
//
// LEAW m r16
//
// Construct and append a LEAW instruction to the active function.
// Operates on the global context.
func LEAW(m, r operand.Op) { ctx.LEAW(m, r) }
// LFENCE: Load Fence.
//
// Forms:
//
// LFENCE
//
// Construct and append a LFENCE instruction to the active function.
func (c *Context) LFENCE() {
c.addinstruction(x86.LFENCE())
}
// LFENCE: Load Fence.
//
// Forms:
//
// LFENCE
//
// Construct and append a LFENCE instruction to the active function.
// Operates on the global context.
func LFENCE() { ctx.LFENCE() }
// LZCNTL: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTL m32 r32
// LZCNTL r32 r32
//
// Construct and append a LZCNTL instruction to the active function.
func (c *Context) LZCNTL(mr, r operand.Op) {
c.addinstruction(x86.LZCNTL(mr, r))
}
// LZCNTL: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTL m32 r32
// LZCNTL r32 r32
//
// Construct and append a LZCNTL instruction to the active function.
// Operates on the global context.
func LZCNTL(mr, r operand.Op) { ctx.LZCNTL(mr, r) }
// LZCNTQ: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTQ m64 r64
// LZCNTQ r64 r64
//
// Construct and append a LZCNTQ instruction to the active function.
func (c *Context) LZCNTQ(mr, r operand.Op) {
c.addinstruction(x86.LZCNTQ(mr, r))
}
// LZCNTQ: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTQ m64 r64
// LZCNTQ r64 r64
//
// Construct and append a LZCNTQ instruction to the active function.
// Operates on the global context.
func LZCNTQ(mr, r operand.Op) { ctx.LZCNTQ(mr, r) }
// LZCNTW: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTW m16 r16
// LZCNTW r16 r16
//
// Construct and append a LZCNTW instruction to the active function.
func (c *Context) LZCNTW(mr, r operand.Op) {
c.addinstruction(x86.LZCNTW(mr, r))
}
// LZCNTW: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTW m16 r16
// LZCNTW r16 r16
//
// Construct and append a LZCNTW instruction to the active function.
// Operates on the global context.
func LZCNTW(mr, r operand.Op) { ctx.LZCNTW(mr, r) }
// MASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVDQU xmm xmm
//
// Construct and append a MASKMOVDQU instruction to the active function.
func (c *Context) MASKMOVDQU(x, x1 operand.Op) {
c.addinstruction(x86.MASKMOVDQU(x, x1))
}
// MASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVDQU xmm xmm
//
// Construct and append a MASKMOVDQU instruction to the active function.
// Operates on the global context.
func MASKMOVDQU(x, x1 operand.Op) { ctx.MASKMOVDQU(x, x1) }
// MASKMOVOU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVOU xmm xmm
//
// Construct and append a MASKMOVOU instruction to the active function.
func (c *Context) MASKMOVOU(x, x1 operand.Op) {
c.addinstruction(x86.MASKMOVOU(x, x1))
}
// MASKMOVOU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVOU xmm xmm
//
// Construct and append a MASKMOVOU instruction to the active function.
// Operates on the global context.
func MASKMOVOU(x, x1 operand.Op) { ctx.MASKMOVOU(x, x1) }
// MAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MAXPD m128 xmm
// MAXPD xmm xmm
//
// Construct and append a MAXPD instruction to the active function.
func (c *Context) MAXPD(mx, x operand.Op) {
c.addinstruction(x86.MAXPD(mx, x))
}
// MAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MAXPD m128 xmm
// MAXPD xmm xmm
//
// Construct and append a MAXPD instruction to the active function.
// Operates on the global context.
func MAXPD(mx, x operand.Op) { ctx.MAXPD(mx, x) }
// MAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MAXPS m128 xmm
// MAXPS xmm xmm
//
// Construct and append a MAXPS instruction to the active function.
func (c *Context) MAXPS(mx, x operand.Op) {
c.addinstruction(x86.MAXPS(mx, x))
}
// MAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MAXPS m128 xmm
// MAXPS xmm xmm
//
// Construct and append a MAXPS instruction to the active function.
// Operates on the global context.
func MAXPS(mx, x operand.Op) { ctx.MAXPS(mx, x) }
// MAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MAXSD m64 xmm
// MAXSD xmm xmm
//
// Construct and append a MAXSD instruction to the active function.
func (c *Context) MAXSD(mx, x operand.Op) {
c.addinstruction(x86.MAXSD(mx, x))
}
// MAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MAXSD m64 xmm
// MAXSD xmm xmm
//
// Construct and append a MAXSD instruction to the active function.
// Operates on the global context.
func MAXSD(mx, x operand.Op) { ctx.MAXSD(mx, x) }
// MAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MAXSS m32 xmm
// MAXSS xmm xmm
//
// Construct and append a MAXSS instruction to the active function.
func (c *Context) MAXSS(mx, x operand.Op) {
c.addinstruction(x86.MAXSS(mx, x))
}
// MAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MAXSS m32 xmm
// MAXSS xmm xmm
//
// Construct and append a MAXSS instruction to the active function.
// Operates on the global context.
func MAXSS(mx, x operand.Op) { ctx.MAXSS(mx, x) }
// MFENCE: Memory Fence.
//
// Forms:
//
// MFENCE
//
// Construct and append a MFENCE instruction to the active function.
func (c *Context) MFENCE() {
c.addinstruction(x86.MFENCE())
}
// MFENCE: Memory Fence.
//
// Forms:
//
// MFENCE
//
// Construct and append a MFENCE instruction to the active function.
// Operates on the global context.
func MFENCE() { ctx.MFENCE() }
// MINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MINPD m128 xmm
// MINPD xmm xmm
//
// Construct and append a MINPD instruction to the active function.
func (c *Context) MINPD(mx, x operand.Op) {
c.addinstruction(x86.MINPD(mx, x))
}
// MINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MINPD m128 xmm
// MINPD xmm xmm
//
// Construct and append a MINPD instruction to the active function.
// Operates on the global context.
func MINPD(mx, x operand.Op) { ctx.MINPD(mx, x) }
// MINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MINPS m128 xmm
// MINPS xmm xmm
//
// Construct and append a MINPS instruction to the active function.
func (c *Context) MINPS(mx, x operand.Op) {
c.addinstruction(x86.MINPS(mx, x))
}
// MINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MINPS m128 xmm
// MINPS xmm xmm
//
// Construct and append a MINPS instruction to the active function.
// Operates on the global context.
func MINPS(mx, x operand.Op) { ctx.MINPS(mx, x) }
// MINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MINSD m64 xmm
// MINSD xmm xmm
//
// Construct and append a MINSD instruction to the active function.
func (c *Context) MINSD(mx, x operand.Op) {
c.addinstruction(x86.MINSD(mx, x))
}
// MINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MINSD m64 xmm
// MINSD xmm xmm
//
// Construct and append a MINSD instruction to the active function.
// Operates on the global context.
func MINSD(mx, x operand.Op) { ctx.MINSD(mx, x) }
// MINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MINSS m32 xmm
// MINSS xmm xmm
//
// Construct and append a MINSS instruction to the active function.
func (c *Context) MINSS(mx, x operand.Op) {
c.addinstruction(x86.MINSS(mx, x))
}
// MINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MINSS m32 xmm
// MINSS xmm xmm
//
// Construct and append a MINSS instruction to the active function.
// Operates on the global context.
func MINSS(mx, x operand.Op) { ctx.MINSS(mx, x) }
// MONITOR: Monitor a Linear Address Range.
//
// Forms:
//
// MONITOR
//
// Construct and append a MONITOR instruction to the active function.
func (c *Context) MONITOR() {
c.addinstruction(x86.MONITOR())
}
// MONITOR: Monitor a Linear Address Range.
//
// Forms:
//
// MONITOR
//
// Construct and append a MONITOR instruction to the active function.
// Operates on the global context.
func MONITOR() { ctx.MONITOR() }
// MOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPD m128 xmm
// MOVAPD xmm m128
// MOVAPD xmm xmm
//
// Construct and append a MOVAPD instruction to the active function.
func (c *Context) MOVAPD(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVAPD(mx, mx1))
}
// MOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPD m128 xmm
// MOVAPD xmm m128
// MOVAPD xmm xmm
//
// Construct and append a MOVAPD instruction to the active function.
// Operates on the global context.
func MOVAPD(mx, mx1 operand.Op) { ctx.MOVAPD(mx, mx1) }
// MOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPS m128 xmm
// MOVAPS xmm m128
// MOVAPS xmm xmm
//
// Construct and append a MOVAPS instruction to the active function.
func (c *Context) MOVAPS(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVAPS(mx, mx1))
}
// MOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPS m128 xmm
// MOVAPS xmm m128
// MOVAPS xmm xmm
//
// Construct and append a MOVAPS instruction to the active function.
// Operates on the global context.
func MOVAPS(mx, mx1 operand.Op) { ctx.MOVAPS(mx, mx1) }
// MOVB: Move.
//
// Forms:
//
// MOVB imm8 m8
// MOVB imm8 r8
// MOVB m8 r8
// MOVB r8 m8
// MOVB r8 r8
//
// Construct and append a MOVB instruction to the active function.
func (c *Context) MOVB(imr, mr operand.Op) {
c.addinstruction(x86.MOVB(imr, mr))
}
// MOVB: Move.
//
// Forms:
//
// MOVB imm8 m8
// MOVB imm8 r8
// MOVB m8 r8
// MOVB r8 m8
// MOVB r8 r8
//
// Construct and append a MOVB instruction to the active function.
// Operates on the global context.
func MOVB(imr, mr operand.Op) { ctx.MOVB(imr, mr) }
// MOVBELL: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBELL m32 r32
// MOVBELL r32 m32
//
// Construct and append a MOVBELL instruction to the active function.
func (c *Context) MOVBELL(mr, mr1 operand.Op) {
c.addinstruction(x86.MOVBELL(mr, mr1))
}
// MOVBELL: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBELL m32 r32
// MOVBELL r32 m32
//
// Construct and append a MOVBELL instruction to the active function.
// Operates on the global context.
func MOVBELL(mr, mr1 operand.Op) { ctx.MOVBELL(mr, mr1) }
// MOVBEQQ: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEQQ m64 r64
// MOVBEQQ r64 m64
//
// Construct and append a MOVBEQQ instruction to the active function.
func (c *Context) MOVBEQQ(mr, mr1 operand.Op) {
c.addinstruction(x86.MOVBEQQ(mr, mr1))
}
// MOVBEQQ: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEQQ m64 r64
// MOVBEQQ r64 m64
//
// Construct and append a MOVBEQQ instruction to the active function.
// Operates on the global context.
func MOVBEQQ(mr, mr1 operand.Op) { ctx.MOVBEQQ(mr, mr1) }
// MOVBEWW: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEWW m16 r16
// MOVBEWW r16 m16
//
// Construct and append a MOVBEWW instruction to the active function.
func (c *Context) MOVBEWW(mr, mr1 operand.Op) {
c.addinstruction(x86.MOVBEWW(mr, mr1))
}
// MOVBEWW: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEWW m16 r16
// MOVBEWW r16 m16
//
// Construct and append a MOVBEWW instruction to the active function.
// Operates on the global context.
func MOVBEWW(mr, mr1 operand.Op) { ctx.MOVBEWW(mr, mr1) }
// MOVBLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBLSX m8 r32
// MOVBLSX r8 r32
//
// Construct and append a MOVBLSX instruction to the active function.
func (c *Context) MOVBLSX(mr, r operand.Op) {
c.addinstruction(x86.MOVBLSX(mr, r))
}
// MOVBLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBLSX m8 r32
// MOVBLSX r8 r32
//
// Construct and append a MOVBLSX instruction to the active function.
// Operates on the global context.
func MOVBLSX(mr, r operand.Op) { ctx.MOVBLSX(mr, r) }
// MOVBLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBLZX m8 r32
// MOVBLZX r8 r32
//
// Construct and append a MOVBLZX instruction to the active function.
func (c *Context) MOVBLZX(mr, r operand.Op) {
c.addinstruction(x86.MOVBLZX(mr, r))
}
// MOVBLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBLZX m8 r32
// MOVBLZX r8 r32
//
// Construct and append a MOVBLZX instruction to the active function.
// Operates on the global context.
func MOVBLZX(mr, r operand.Op) { ctx.MOVBLZX(mr, r) }
// MOVBQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBQSX m8 r64
// MOVBQSX r8 r64
//
// Construct and append a MOVBQSX instruction to the active function.
func (c *Context) MOVBQSX(mr, r operand.Op) {
c.addinstruction(x86.MOVBQSX(mr, r))
}
// MOVBQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBQSX m8 r64
// MOVBQSX r8 r64
//
// Construct and append a MOVBQSX instruction to the active function.
// Operates on the global context.
func MOVBQSX(mr, r operand.Op) { ctx.MOVBQSX(mr, r) }
// MOVBQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBQZX m8 r64
// MOVBQZX r8 r64
//
// Construct and append a MOVBQZX instruction to the active function.
func (c *Context) MOVBQZX(mr, r operand.Op) {
c.addinstruction(x86.MOVBQZX(mr, r))
}
// MOVBQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBQZX m8 r64
// MOVBQZX r8 r64
//
// Construct and append a MOVBQZX instruction to the active function.
// Operates on the global context.
func MOVBQZX(mr, r operand.Op) { ctx.MOVBQZX(mr, r) }
// MOVBWSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBWSX m8 r16
// MOVBWSX r8 r16
//
// Construct and append a MOVBWSX instruction to the active function.
func (c *Context) MOVBWSX(mr, r operand.Op) {
c.addinstruction(x86.MOVBWSX(mr, r))
}
// MOVBWSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBWSX m8 r16
// MOVBWSX r8 r16
//
// Construct and append a MOVBWSX instruction to the active function.
// Operates on the global context.
func MOVBWSX(mr, r operand.Op) { ctx.MOVBWSX(mr, r) }
// MOVBWZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBWZX m8 r16
// MOVBWZX r8 r16
//
// Construct and append a MOVBWZX instruction to the active function.
func (c *Context) MOVBWZX(mr, r operand.Op) {
c.addinstruction(x86.MOVBWZX(mr, r))
}
// MOVBWZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBWZX m8 r16
// MOVBWZX r8 r16
//
// Construct and append a MOVBWZX instruction to the active function.
// Operates on the global context.
func MOVBWZX(mr, r operand.Op) { ctx.MOVBWZX(mr, r) }
// MOVD: Move.
//
// Forms:
//
// MOVD m32 xmm
// MOVD m64 xmm
// MOVD r32 xmm
// MOVD r64 xmm
// MOVD xmm m32
// MOVD xmm m64
// MOVD xmm r32
// MOVD xmm r64
// MOVD xmm xmm
// MOVD imm32 m64
// MOVD imm32 r64
// MOVD imm64 r64
// MOVD m64 r64
// MOVD r64 m64
// MOVD r64 r64
//
// Construct and append a MOVD instruction to the active function.
func (c *Context) MOVD(imrx, mrx operand.Op) {
c.addinstruction(x86.MOVD(imrx, mrx))
}
// MOVD: Move.
//
// Forms:
//
// MOVD m32 xmm
// MOVD m64 xmm
// MOVD r32 xmm
// MOVD r64 xmm
// MOVD xmm m32
// MOVD xmm m64
// MOVD xmm r32
// MOVD xmm r64
// MOVD xmm xmm
// MOVD imm32 m64
// MOVD imm32 r64
// MOVD imm64 r64
// MOVD m64 r64
// MOVD r64 m64
// MOVD r64 r64
//
// Construct and append a MOVD instruction to the active function.
// Operates on the global context.
func MOVD(imrx, mrx operand.Op) { ctx.MOVD(imrx, mrx) }
// MOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// MOVDDUP m64 xmm
// MOVDDUP xmm xmm
//
// Construct and append a MOVDDUP instruction to the active function.
func (c *Context) MOVDDUP(mx, x operand.Op) {
c.addinstruction(x86.MOVDDUP(mx, x))
}
// MOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// MOVDDUP m64 xmm
// MOVDDUP xmm xmm
//
// Construct and append a MOVDDUP instruction to the active function.
// Operates on the global context.
func MOVDDUP(mx, x operand.Op) { ctx.MOVDDUP(mx, x) }
// MOVDQ2Q: Move.
//
// Forms:
//
// MOVDQ2Q m32 xmm
// MOVDQ2Q m64 xmm
// MOVDQ2Q r32 xmm
// MOVDQ2Q r64 xmm
// MOVDQ2Q xmm m32
// MOVDQ2Q xmm m64
// MOVDQ2Q xmm r32
// MOVDQ2Q xmm r64
// MOVDQ2Q xmm xmm
// MOVDQ2Q imm32 m64
// MOVDQ2Q imm32 r64
// MOVDQ2Q imm64 r64
// MOVDQ2Q m64 r64
// MOVDQ2Q r64 m64
// MOVDQ2Q r64 r64
//
// Construct and append a MOVDQ2Q instruction to the active function.
func (c *Context) MOVDQ2Q(imrx, mrx operand.Op) {
c.addinstruction(x86.MOVDQ2Q(imrx, mrx))
}
// MOVDQ2Q: Move.
//
// Forms:
//
// MOVDQ2Q m32 xmm
// MOVDQ2Q m64 xmm
// MOVDQ2Q r32 xmm
// MOVDQ2Q r64 xmm
// MOVDQ2Q xmm m32
// MOVDQ2Q xmm m64
// MOVDQ2Q xmm r32
// MOVDQ2Q xmm r64
// MOVDQ2Q xmm xmm
// MOVDQ2Q imm32 m64
// MOVDQ2Q imm32 r64
// MOVDQ2Q imm64 r64
// MOVDQ2Q m64 r64
// MOVDQ2Q r64 m64
// MOVDQ2Q r64 r64
//
// Construct and append a MOVDQ2Q instruction to the active function.
// Operates on the global context.
func MOVDQ2Q(imrx, mrx operand.Op) { ctx.MOVDQ2Q(imrx, mrx) }
// MOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// MOVHLPS xmm xmm
//
// Construct and append a MOVHLPS instruction to the active function.
func (c *Context) MOVHLPS(x, x1 operand.Op) {
c.addinstruction(x86.MOVHLPS(x, x1))
}
// MOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// MOVHLPS xmm xmm
//
// Construct and append a MOVHLPS instruction to the active function.
// Operates on the global context.
func MOVHLPS(x, x1 operand.Op) { ctx.MOVHLPS(x, x1) }
// MOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVHPD m64 xmm
// MOVHPD xmm m64
//
// Construct and append a MOVHPD instruction to the active function.
func (c *Context) MOVHPD(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVHPD(mx, mx1))
}
// MOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVHPD m64 xmm
// MOVHPD xmm m64
//
// Construct and append a MOVHPD instruction to the active function.
// Operates on the global context.
func MOVHPD(mx, mx1 operand.Op) { ctx.MOVHPD(mx, mx1) }
// MOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVHPS m64 xmm
// MOVHPS xmm m64
//
// Construct and append a MOVHPS instruction to the active function.
func (c *Context) MOVHPS(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVHPS(mx, mx1))
}
// MOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVHPS m64 xmm
// MOVHPS xmm m64
//
// Construct and append a MOVHPS instruction to the active function.
// Operates on the global context.
func MOVHPS(mx, mx1 operand.Op) { ctx.MOVHPS(mx, mx1) }
// MOVL: Move.
//
// Forms:
//
// MOVL imm32 m32
// MOVL imm32 r32
// MOVL m32 r32
// MOVL r32 m32
// MOVL r32 r32
//
// Construct and append a MOVL instruction to the active function.
func (c *Context) MOVL(imr, mr operand.Op) {
c.addinstruction(x86.MOVL(imr, mr))
}
// MOVL: Move.
//
// Forms:
//
// MOVL imm32 m32
// MOVL imm32 r32
// MOVL m32 r32
// MOVL r32 m32
// MOVL r32 r32
//
// Construct and append a MOVL instruction to the active function.
// Operates on the global context.
func MOVL(imr, mr operand.Op) { ctx.MOVL(imr, mr) }
// MOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// MOVLHPS xmm xmm
//
// Construct and append a MOVLHPS instruction to the active function.
func (c *Context) MOVLHPS(x, x1 operand.Op) {
c.addinstruction(x86.MOVLHPS(x, x1))
}
// MOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// MOVLHPS xmm xmm
//
// Construct and append a MOVLHPS instruction to the active function.
// Operates on the global context.
func MOVLHPS(x, x1 operand.Op) { ctx.MOVLHPS(x, x1) }
// MOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVLPD m64 xmm
// MOVLPD xmm m64
//
// Construct and append a MOVLPD instruction to the active function.
func (c *Context) MOVLPD(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVLPD(mx, mx1))
}
// MOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVLPD m64 xmm
// MOVLPD xmm m64
//
// Construct and append a MOVLPD instruction to the active function.
// Operates on the global context.
func MOVLPD(mx, mx1 operand.Op) { ctx.MOVLPD(mx, mx1) }
// MOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVLPS m64 xmm
// MOVLPS xmm m64
//
// Construct and append a MOVLPS instruction to the active function.
func (c *Context) MOVLPS(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVLPS(mx, mx1))
}
// MOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVLPS m64 xmm
// MOVLPS xmm m64
//
// Construct and append a MOVLPS instruction to the active function.
// Operates on the global context.
func MOVLPS(mx, mx1 operand.Op) { ctx.MOVLPS(mx, mx1) }
// MOVLQSX: Move Doubleword to Quadword with Sign-Extension.
//
// Forms:
//
// MOVLQSX m32 r64
// MOVLQSX r32 r64
//
// Construct and append a MOVLQSX instruction to the active function.
func (c *Context) MOVLQSX(mr, r operand.Op) {
c.addinstruction(x86.MOVLQSX(mr, r))
}
// MOVLQSX: Move Doubleword to Quadword with Sign-Extension.
//
// Forms:
//
// MOVLQSX m32 r64
// MOVLQSX r32 r64
//
// Construct and append a MOVLQSX instruction to the active function.
// Operates on the global context.
func MOVLQSX(mr, r operand.Op) { ctx.MOVLQSX(mr, r) }
// MOVLQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVLQZX m32 r64
//
// Construct and append a MOVLQZX instruction to the active function.
func (c *Context) MOVLQZX(m, r operand.Op) {
c.addinstruction(x86.MOVLQZX(m, r))
}
// MOVLQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVLQZX m32 r64
//
// Construct and append a MOVLQZX instruction to the active function.
// Operates on the global context.
func MOVLQZX(m, r operand.Op) { ctx.MOVLQZX(m, r) }
// MOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPD xmm r32
//
// Construct and append a MOVMSKPD instruction to the active function.
func (c *Context) MOVMSKPD(x, r operand.Op) {
c.addinstruction(x86.MOVMSKPD(x, r))
}
// MOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPD xmm r32
//
// Construct and append a MOVMSKPD instruction to the active function.
// Operates on the global context.
func MOVMSKPD(x, r operand.Op) { ctx.MOVMSKPD(x, r) }
// MOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPS xmm r32
//
// Construct and append a MOVMSKPS instruction to the active function.
func (c *Context) MOVMSKPS(x, r operand.Op) {
c.addinstruction(x86.MOVMSKPS(x, r))
}
// MOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPS xmm r32
//
// Construct and append a MOVMSKPS instruction to the active function.
// Operates on the global context.
func MOVMSKPS(x, r operand.Op) { ctx.MOVMSKPS(x, r) }
// MOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTDQ xmm m128
//
// Construct and append a MOVNTDQ instruction to the active function.
func (c *Context) MOVNTDQ(x, m operand.Op) {
c.addinstruction(x86.MOVNTDQ(x, m))
}
// MOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTDQ xmm m128
//
// Construct and append a MOVNTDQ instruction to the active function.
// Operates on the global context.
func MOVNTDQ(x, m operand.Op) { ctx.MOVNTDQ(x, m) }
// MOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// MOVNTDQA m128 xmm
//
// Construct and append a MOVNTDQA instruction to the active function.
func (c *Context) MOVNTDQA(m, x operand.Op) {
c.addinstruction(x86.MOVNTDQA(m, x))
}
// MOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// MOVNTDQA m128 xmm
//
// Construct and append a MOVNTDQA instruction to the active function.
// Operates on the global context.
func MOVNTDQA(m, x operand.Op) { ctx.MOVNTDQA(m, x) }
// MOVNTIL: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIL r32 m32
//
// Construct and append a MOVNTIL instruction to the active function.
func (c *Context) MOVNTIL(r, m operand.Op) {
c.addinstruction(x86.MOVNTIL(r, m))
}
// MOVNTIL: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIL r32 m32
//
// Construct and append a MOVNTIL instruction to the active function.
// Operates on the global context.
func MOVNTIL(r, m operand.Op) { ctx.MOVNTIL(r, m) }
// MOVNTIQ: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIQ r64 m64
//
// Construct and append a MOVNTIQ instruction to the active function.
func (c *Context) MOVNTIQ(r, m operand.Op) {
c.addinstruction(x86.MOVNTIQ(r, m))
}
// MOVNTIQ: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIQ r64 m64
//
// Construct and append a MOVNTIQ instruction to the active function.
// Operates on the global context.
func MOVNTIQ(r, m operand.Op) { ctx.MOVNTIQ(r, m) }
// MOVNTO: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTO xmm m128
//
// Construct and append a MOVNTO instruction to the active function.
func (c *Context) MOVNTO(x, m operand.Op) {
c.addinstruction(x86.MOVNTO(x, m))
}
// MOVNTO: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTO xmm m128
//
// Construct and append a MOVNTO instruction to the active function.
// Operates on the global context.
func MOVNTO(x, m operand.Op) { ctx.MOVNTO(x, m) }
// MOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPD xmm m128
//
// Construct and append a MOVNTPD instruction to the active function.
func (c *Context) MOVNTPD(x, m operand.Op) {
c.addinstruction(x86.MOVNTPD(x, m))
}
// MOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPD xmm m128
//
// Construct and append a MOVNTPD instruction to the active function.
// Operates on the global context.
func MOVNTPD(x, m operand.Op) { ctx.MOVNTPD(x, m) }
// MOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPS xmm m128
//
// Construct and append a MOVNTPS instruction to the active function.
func (c *Context) MOVNTPS(x, m operand.Op) {
c.addinstruction(x86.MOVNTPS(x, m))
}
// MOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPS xmm m128
//
// Construct and append a MOVNTPS instruction to the active function.
// Operates on the global context.
func MOVNTPS(x, m operand.Op) { ctx.MOVNTPS(x, m) }
// MOVO: Move Aligned Double Quadword.
//
// Forms:
//
// MOVO m128 xmm
// MOVO xmm m128
// MOVO xmm xmm
//
// Construct and append a MOVO instruction to the active function.
func (c *Context) MOVO(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVO(mx, mx1))
}
// MOVO: Move Aligned Double Quadword.
//
// Forms:
//
// MOVO m128 xmm
// MOVO xmm m128
// MOVO xmm xmm
//
// Construct and append a MOVO instruction to the active function.
// Operates on the global context.
func MOVO(mx, mx1 operand.Op) { ctx.MOVO(mx, mx1) }
// MOVOA: Move Aligned Double Quadword.
//
// Forms:
//
// MOVOA m128 xmm
// MOVOA xmm m128
// MOVOA xmm xmm
//
// Construct and append a MOVOA instruction to the active function.
func (c *Context) MOVOA(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVOA(mx, mx1))
}
// MOVOA: Move Aligned Double Quadword.
//
// Forms:
//
// MOVOA m128 xmm
// MOVOA xmm m128
// MOVOA xmm xmm
//
// Construct and append a MOVOA instruction to the active function.
// Operates on the global context.
func MOVOA(mx, mx1 operand.Op) { ctx.MOVOA(mx, mx1) }
// MOVOU: Move Unaligned Double Quadword.
//
// Forms:
//
// MOVOU m128 xmm
// MOVOU xmm m128
// MOVOU xmm xmm
//
// Construct and append a MOVOU instruction to the active function.
func (c *Context) MOVOU(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVOU(mx, mx1))
}
// MOVOU: Move Unaligned Double Quadword.
//
// Forms:
//
// MOVOU m128 xmm
// MOVOU xmm m128
// MOVOU xmm xmm
//
// Construct and append a MOVOU instruction to the active function.
// Operates on the global context.
func MOVOU(mx, mx1 operand.Op) { ctx.MOVOU(mx, mx1) }
// MOVQ: Move.
//
// Forms:
//
// MOVQ m32 xmm
// MOVQ m64 xmm
// MOVQ r32 xmm
// MOVQ r64 xmm
// MOVQ xmm m32
// MOVQ xmm m64
// MOVQ xmm r32
// MOVQ xmm r64
// MOVQ xmm xmm
// MOVQ imm32 m64
// MOVQ imm32 r64
// MOVQ imm64 r64
// MOVQ m64 r64
// MOVQ r64 m64
// MOVQ r64 r64
//
// Construct and append a MOVQ instruction to the active function.
func (c *Context) MOVQ(imrx, mrx operand.Op) {
c.addinstruction(x86.MOVQ(imrx, mrx))
}
// MOVQ: Move.
//
// Forms:
//
// MOVQ m32 xmm
// MOVQ m64 xmm
// MOVQ r32 xmm
// MOVQ r64 xmm
// MOVQ xmm m32
// MOVQ xmm m64
// MOVQ xmm r32
// MOVQ xmm r64
// MOVQ xmm xmm
// MOVQ imm32 m64
// MOVQ imm32 r64
// MOVQ imm64 r64
// MOVQ m64 r64
// MOVQ r64 m64
// MOVQ r64 r64
//
// Construct and append a MOVQ instruction to the active function.
// Operates on the global context.
func MOVQ(imrx, mrx operand.Op) { ctx.MOVQ(imrx, mrx) }
// MOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVSD m64 xmm
// MOVSD xmm m64
// MOVSD xmm xmm
//
// Construct and append a MOVSD instruction to the active function.
func (c *Context) MOVSD(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVSD(mx, mx1))
}
// MOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVSD m64 xmm
// MOVSD xmm m64
// MOVSD xmm xmm
//
// Construct and append a MOVSD instruction to the active function.
// Operates on the global context.
func MOVSD(mx, mx1 operand.Op) { ctx.MOVSD(mx, mx1) }
// MOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// MOVSHDUP m128 xmm
// MOVSHDUP xmm xmm
//
// Construct and append a MOVSHDUP instruction to the active function.
func (c *Context) MOVSHDUP(mx, x operand.Op) {
c.addinstruction(x86.MOVSHDUP(mx, x))
}
// MOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// MOVSHDUP m128 xmm
// MOVSHDUP xmm xmm
//
// Construct and append a MOVSHDUP instruction to the active function.
// Operates on the global context.
func MOVSHDUP(mx, x operand.Op) { ctx.MOVSHDUP(mx, x) }
// MOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// MOVSLDUP m128 xmm
// MOVSLDUP xmm xmm
//
// Construct and append a MOVSLDUP instruction to the active function.
func (c *Context) MOVSLDUP(mx, x operand.Op) {
c.addinstruction(x86.MOVSLDUP(mx, x))
}
// MOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// MOVSLDUP m128 xmm
// MOVSLDUP xmm xmm
//
// Construct and append a MOVSLDUP instruction to the active function.
// Operates on the global context.
func MOVSLDUP(mx, x operand.Op) { ctx.MOVSLDUP(mx, x) }
// MOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVSS m32 xmm
// MOVSS xmm m32
// MOVSS xmm xmm
//
// Construct and append a MOVSS instruction to the active function.
func (c *Context) MOVSS(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVSS(mx, mx1))
}
// MOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVSS m32 xmm
// MOVSS xmm m32
// MOVSS xmm xmm
//
// Construct and append a MOVSS instruction to the active function.
// Operates on the global context.
func MOVSS(mx, mx1 operand.Op) { ctx.MOVSS(mx, mx1) }
// MOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPD m128 xmm
// MOVUPD xmm m128
// MOVUPD xmm xmm
//
// Construct and append a MOVUPD instruction to the active function.
func (c *Context) MOVUPD(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVUPD(mx, mx1))
}
// MOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPD m128 xmm
// MOVUPD xmm m128
// MOVUPD xmm xmm
//
// Construct and append a MOVUPD instruction to the active function.
// Operates on the global context.
func MOVUPD(mx, mx1 operand.Op) { ctx.MOVUPD(mx, mx1) }
// MOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPS m128 xmm
// MOVUPS xmm m128
// MOVUPS xmm xmm
//
// Construct and append a MOVUPS instruction to the active function.
func (c *Context) MOVUPS(mx, mx1 operand.Op) {
c.addinstruction(x86.MOVUPS(mx, mx1))
}
// MOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPS m128 xmm
// MOVUPS xmm m128
// MOVUPS xmm xmm
//
// Construct and append a MOVUPS instruction to the active function.
// Operates on the global context.
func MOVUPS(mx, mx1 operand.Op) { ctx.MOVUPS(mx, mx1) }
// MOVW: Move.
//
// Forms:
//
// MOVW imm16 m16
// MOVW imm16 r16
// MOVW m16 r16
// MOVW r16 m16
// MOVW r16 r16
//
// Construct and append a MOVW instruction to the active function.
func (c *Context) MOVW(imr, mr operand.Op) {
c.addinstruction(x86.MOVW(imr, mr))
}
// MOVW: Move.
//
// Forms:
//
// MOVW imm16 m16
// MOVW imm16 r16
// MOVW m16 r16
// MOVW r16 m16
// MOVW r16 r16
//
// Construct and append a MOVW instruction to the active function.
// Operates on the global context.
func MOVW(imr, mr operand.Op) { ctx.MOVW(imr, mr) }
// MOVWLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWLSX m16 r32
// MOVWLSX r16 r32
//
// Construct and append a MOVWLSX instruction to the active function.
func (c *Context) MOVWLSX(mr, r operand.Op) {
c.addinstruction(x86.MOVWLSX(mr, r))
}
// MOVWLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWLSX m16 r32
// MOVWLSX r16 r32
//
// Construct and append a MOVWLSX instruction to the active function.
// Operates on the global context.
func MOVWLSX(mr, r operand.Op) { ctx.MOVWLSX(mr, r) }
// MOVWLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWLZX m16 r32
// MOVWLZX r16 r32
//
// Construct and append a MOVWLZX instruction to the active function.
func (c *Context) MOVWLZX(mr, r operand.Op) {
c.addinstruction(x86.MOVWLZX(mr, r))
}
// MOVWLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWLZX m16 r32
// MOVWLZX r16 r32
//
// Construct and append a MOVWLZX instruction to the active function.
// Operates on the global context.
func MOVWLZX(mr, r operand.Op) { ctx.MOVWLZX(mr, r) }
// MOVWQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWQSX m16 r64
// MOVWQSX r16 r64
//
// Construct and append a MOVWQSX instruction to the active function.
func (c *Context) MOVWQSX(mr, r operand.Op) {
c.addinstruction(x86.MOVWQSX(mr, r))
}
// MOVWQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWQSX m16 r64
// MOVWQSX r16 r64
//
// Construct and append a MOVWQSX instruction to the active function.
// Operates on the global context.
func MOVWQSX(mr, r operand.Op) { ctx.MOVWQSX(mr, r) }
// MOVWQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWQZX m16 r64
// MOVWQZX r16 r64
//
// Construct and append a MOVWQZX instruction to the active function.
func (c *Context) MOVWQZX(mr, r operand.Op) {
c.addinstruction(x86.MOVWQZX(mr, r))
}
// MOVWQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWQZX m16 r64
// MOVWQZX r16 r64
//
// Construct and append a MOVWQZX instruction to the active function.
// Operates on the global context.
func MOVWQZX(mr, r operand.Op) { ctx.MOVWQZX(mr, r) }
// MPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// MPSADBW imm8 m128 xmm
// MPSADBW imm8 xmm xmm
//
// Construct and append a MPSADBW instruction to the active function.
func (c *Context) MPSADBW(i, mx, x operand.Op) {
c.addinstruction(x86.MPSADBW(i, mx, x))
}
// MPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// MPSADBW imm8 m128 xmm
// MPSADBW imm8 xmm xmm
//
// Construct and append a MPSADBW instruction to the active function.
// Operates on the global context.
func MPSADBW(i, mx, x operand.Op) { ctx.MPSADBW(i, mx, x) }
// MULB: Unsigned Multiply.
//
// Forms:
//
// MULB m8
// MULB r8
//
// Construct and append a MULB instruction to the active function.
func (c *Context) MULB(mr operand.Op) {
c.addinstruction(x86.MULB(mr))
}
// MULB: Unsigned Multiply.
//
// Forms:
//
// MULB m8
// MULB r8
//
// Construct and append a MULB instruction to the active function.
// Operates on the global context.
func MULB(mr operand.Op) { ctx.MULB(mr) }
// MULL: Unsigned Multiply.
//
// Forms:
//
// MULL m32
// MULL r32
//
// Construct and append a MULL instruction to the active function.
func (c *Context) MULL(mr operand.Op) {
c.addinstruction(x86.MULL(mr))
}
// MULL: Unsigned Multiply.
//
// Forms:
//
// MULL m32
// MULL r32
//
// Construct and append a MULL instruction to the active function.
// Operates on the global context.
func MULL(mr operand.Op) { ctx.MULL(mr) }
// MULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MULPD m128 xmm
// MULPD xmm xmm
//
// Construct and append a MULPD instruction to the active function.
func (c *Context) MULPD(mx, x operand.Op) {
c.addinstruction(x86.MULPD(mx, x))
}
// MULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MULPD m128 xmm
// MULPD xmm xmm
//
// Construct and append a MULPD instruction to the active function.
// Operates on the global context.
func MULPD(mx, x operand.Op) { ctx.MULPD(mx, x) }
// MULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MULPS m128 xmm
// MULPS xmm xmm
//
// Construct and append a MULPS instruction to the active function.
func (c *Context) MULPS(mx, x operand.Op) {
c.addinstruction(x86.MULPS(mx, x))
}
// MULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MULPS m128 xmm
// MULPS xmm xmm
//
// Construct and append a MULPS instruction to the active function.
// Operates on the global context.
func MULPS(mx, x operand.Op) { ctx.MULPS(mx, x) }
// MULQ: Unsigned Multiply.
//
// Forms:
//
// MULQ m64
// MULQ r64
//
// Construct and append a MULQ instruction to the active function.
func (c *Context) MULQ(mr operand.Op) {
c.addinstruction(x86.MULQ(mr))
}
// MULQ: Unsigned Multiply.
//
// Forms:
//
// MULQ m64
// MULQ r64
//
// Construct and append a MULQ instruction to the active function.
// Operates on the global context.
func MULQ(mr operand.Op) { ctx.MULQ(mr) }
// MULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// MULSD m64 xmm
// MULSD xmm xmm
//
// Construct and append a MULSD instruction to the active function.
func (c *Context) MULSD(mx, x operand.Op) {
c.addinstruction(x86.MULSD(mx, x))
}
// MULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// MULSD m64 xmm
// MULSD xmm xmm
//
// Construct and append a MULSD instruction to the active function.
// Operates on the global context.
func MULSD(mx, x operand.Op) { ctx.MULSD(mx, x) }
// MULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MULSS m32 xmm
// MULSS xmm xmm
//
// Construct and append a MULSS instruction to the active function.
func (c *Context) MULSS(mx, x operand.Op) {
c.addinstruction(x86.MULSS(mx, x))
}
// MULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MULSS m32 xmm
// MULSS xmm xmm
//
// Construct and append a MULSS instruction to the active function.
// Operates on the global context.
func MULSS(mx, x operand.Op) { ctx.MULSS(mx, x) }
// MULW: Unsigned Multiply.
//
// Forms:
//
// MULW m16
// MULW r16
//
// Construct and append a MULW instruction to the active function.
func (c *Context) MULW(mr operand.Op) {
c.addinstruction(x86.MULW(mr))
}
// MULW: Unsigned Multiply.
//
// Forms:
//
// MULW m16
// MULW r16
//
// Construct and append a MULW instruction to the active function.
// Operates on the global context.
func MULW(mr operand.Op) { ctx.MULW(mr) }
// MULXL: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXL m32 r32 r32
// MULXL r32 r32 r32
//
// Construct and append a MULXL instruction to the active function.
func (c *Context) MULXL(mr, r, r1 operand.Op) {
c.addinstruction(x86.MULXL(mr, r, r1))
}
// MULXL: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXL m32 r32 r32
// MULXL r32 r32 r32
//
// Construct and append a MULXL instruction to the active function.
// Operates on the global context.
func MULXL(mr, r, r1 operand.Op) { ctx.MULXL(mr, r, r1) }
// MULXQ: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXQ m64 r64 r64
// MULXQ r64 r64 r64
//
// Construct and append a MULXQ instruction to the active function.
func (c *Context) MULXQ(mr, r, r1 operand.Op) {
c.addinstruction(x86.MULXQ(mr, r, r1))
}
// MULXQ: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXQ m64 r64 r64
// MULXQ r64 r64 r64
//
// Construct and append a MULXQ instruction to the active function.
// Operates on the global context.
func MULXQ(mr, r, r1 operand.Op) { ctx.MULXQ(mr, r, r1) }
// MWAIT: Monitor Wait.
//
// Forms:
//
// MWAIT
//
// Construct and append a MWAIT instruction to the active function.
func (c *Context) MWAIT() {
c.addinstruction(x86.MWAIT())
}
// MWAIT: Monitor Wait.
//
// Forms:
//
// MWAIT
//
// Construct and append a MWAIT instruction to the active function.
// Operates on the global context.
func MWAIT() { ctx.MWAIT() }
// NEGB: Two's Complement Negation.
//
// Forms:
//
// NEGB m8
// NEGB r8
//
// Construct and append a NEGB instruction to the active function.
func (c *Context) NEGB(mr operand.Op) {
c.addinstruction(x86.NEGB(mr))
}
// NEGB: Two's Complement Negation.
//
// Forms:
//
// NEGB m8
// NEGB r8
//
// Construct and append a NEGB instruction to the active function.
// Operates on the global context.
func NEGB(mr operand.Op) { ctx.NEGB(mr) }
// NEGL: Two's Complement Negation.
//
// Forms:
//
// NEGL m32
// NEGL r32
//
// Construct and append a NEGL instruction to the active function.
func (c *Context) NEGL(mr operand.Op) {
c.addinstruction(x86.NEGL(mr))
}
// NEGL: Two's Complement Negation.
//
// Forms:
//
// NEGL m32
// NEGL r32
//
// Construct and append a NEGL instruction to the active function.
// Operates on the global context.
func NEGL(mr operand.Op) { ctx.NEGL(mr) }
// NEGQ: Two's Complement Negation.
//
// Forms:
//
// NEGQ m64
// NEGQ r64
//
// Construct and append a NEGQ instruction to the active function.
func (c *Context) NEGQ(mr operand.Op) {
c.addinstruction(x86.NEGQ(mr))
}
// NEGQ: Two's Complement Negation.
//
// Forms:
//
// NEGQ m64
// NEGQ r64
//
// Construct and append a NEGQ instruction to the active function.
// Operates on the global context.
func NEGQ(mr operand.Op) { ctx.NEGQ(mr) }
// NEGW: Two's Complement Negation.
//
// Forms:
//
// NEGW m16
// NEGW r16
//
// Construct and append a NEGW instruction to the active function.
func (c *Context) NEGW(mr operand.Op) {
c.addinstruction(x86.NEGW(mr))
}
// NEGW: Two's Complement Negation.
//
// Forms:
//
// NEGW m16
// NEGW r16
//
// Construct and append a NEGW instruction to the active function.
// Operates on the global context.
func NEGW(mr operand.Op) { ctx.NEGW(mr) }
// NOP: No Operation.
//
// Forms:
//
// NOP
//
// Construct and append a NOP instruction to the active function.
func (c *Context) NOP() {
c.addinstruction(x86.NOP())
}
// NOP: No Operation.
//
// Forms:
//
// NOP
//
// Construct and append a NOP instruction to the active function.
// Operates on the global context.
func NOP() { ctx.NOP() }
// NOTB: One's Complement Negation.
//
// Forms:
//
// NOTB m8
// NOTB r8
//
// Construct and append a NOTB instruction to the active function.
func (c *Context) NOTB(mr operand.Op) {
c.addinstruction(x86.NOTB(mr))
}
// NOTB: One's Complement Negation.
//
// Forms:
//
// NOTB m8
// NOTB r8
//
// Construct and append a NOTB instruction to the active function.
// Operates on the global context.
func NOTB(mr operand.Op) { ctx.NOTB(mr) }
// NOTL: One's Complement Negation.
//
// Forms:
//
// NOTL m32
// NOTL r32
//
// Construct and append a NOTL instruction to the active function.
func (c *Context) NOTL(mr operand.Op) {
c.addinstruction(x86.NOTL(mr))
}
// NOTL: One's Complement Negation.
//
// Forms:
//
// NOTL m32
// NOTL r32
//
// Construct and append a NOTL instruction to the active function.
// Operates on the global context.
func NOTL(mr operand.Op) { ctx.NOTL(mr) }
// NOTQ: One's Complement Negation.
//
// Forms:
//
// NOTQ m64
// NOTQ r64
//
// Construct and append a NOTQ instruction to the active function.
func (c *Context) NOTQ(mr operand.Op) {
c.addinstruction(x86.NOTQ(mr))
}
// NOTQ: One's Complement Negation.
//
// Forms:
//
// NOTQ m64
// NOTQ r64
//
// Construct and append a NOTQ instruction to the active function.
// Operates on the global context.
func NOTQ(mr operand.Op) { ctx.NOTQ(mr) }
// NOTW: One's Complement Negation.
//
// Forms:
//
// NOTW m16
// NOTW r16
//
// Construct and append a NOTW instruction to the active function.
func (c *Context) NOTW(mr operand.Op) {
c.addinstruction(x86.NOTW(mr))
}
// NOTW: One's Complement Negation.
//
// Forms:
//
// NOTW m16
// NOTW r16
//
// Construct and append a NOTW instruction to the active function.
// Operates on the global context.
func NOTW(mr operand.Op) { ctx.NOTW(mr) }
// ORB: Logical Inclusive OR.
//
// Forms:
//
// ORB imm8 al
// ORB imm8 m8
// ORB imm8 r8
// ORB m8 r8
// ORB r8 m8
// ORB r8 r8
//
// Construct and append a ORB instruction to the active function.
func (c *Context) ORB(imr, amr operand.Op) {
c.addinstruction(x86.ORB(imr, amr))
}
// ORB: Logical Inclusive OR.
//
// Forms:
//
// ORB imm8 al
// ORB imm8 m8
// ORB imm8 r8
// ORB m8 r8
// ORB r8 m8
// ORB r8 r8
//
// Construct and append a ORB instruction to the active function.
// Operates on the global context.
func ORB(imr, amr operand.Op) { ctx.ORB(imr, amr) }
// ORL: Logical Inclusive OR.
//
// Forms:
//
// ORL imm32 eax
// ORL imm32 m32
// ORL imm32 r32
// ORL imm8 m32
// ORL imm8 r32
// ORL m32 r32
// ORL r32 m32
// ORL r32 r32
//
// Construct and append a ORL instruction to the active function.
func (c *Context) ORL(imr, emr operand.Op) {
c.addinstruction(x86.ORL(imr, emr))
}
// ORL: Logical Inclusive OR.
//
// Forms:
//
// ORL imm32 eax
// ORL imm32 m32
// ORL imm32 r32
// ORL imm8 m32
// ORL imm8 r32
// ORL m32 r32
// ORL r32 m32
// ORL r32 r32
//
// Construct and append a ORL instruction to the active function.
// Operates on the global context.
func ORL(imr, emr operand.Op) { ctx.ORL(imr, emr) }
// ORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// ORPD m128 xmm
// ORPD xmm xmm
//
// Construct and append a ORPD instruction to the active function.
func (c *Context) ORPD(mx, x operand.Op) {
c.addinstruction(x86.ORPD(mx, x))
}
// ORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// ORPD m128 xmm
// ORPD xmm xmm
//
// Construct and append a ORPD instruction to the active function.
// Operates on the global context.
func ORPD(mx, x operand.Op) { ctx.ORPD(mx, x) }
// ORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// ORPS m128 xmm
// ORPS xmm xmm
//
// Construct and append a ORPS instruction to the active function.
func (c *Context) ORPS(mx, x operand.Op) {
c.addinstruction(x86.ORPS(mx, x))
}
// ORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// ORPS m128 xmm
// ORPS xmm xmm
//
// Construct and append a ORPS instruction to the active function.
// Operates on the global context.
func ORPS(mx, x operand.Op) { ctx.ORPS(mx, x) }
// ORQ: Logical Inclusive OR.
//
// Forms:
//
// ORQ imm32 m64
// ORQ imm32 r64
// ORQ imm32 rax
// ORQ imm8 m64
// ORQ imm8 r64
// ORQ m64 r64
// ORQ r64 m64
// ORQ r64 r64
//
// Construct and append a ORQ instruction to the active function.
func (c *Context) ORQ(imr, mr operand.Op) {
c.addinstruction(x86.ORQ(imr, mr))
}
// ORQ: Logical Inclusive OR.
//
// Forms:
//
// ORQ imm32 m64
// ORQ imm32 r64
// ORQ imm32 rax
// ORQ imm8 m64
// ORQ imm8 r64
// ORQ m64 r64
// ORQ r64 m64
// ORQ r64 r64
//
// Construct and append a ORQ instruction to the active function.
// Operates on the global context.
func ORQ(imr, mr operand.Op) { ctx.ORQ(imr, mr) }
// ORW: Logical Inclusive OR.
//
// Forms:
//
// ORW imm16 ax
// ORW imm16 m16
// ORW imm16 r16
// ORW imm8 m16
// ORW imm8 r16
// ORW m16 r16
// ORW r16 m16
// ORW r16 r16
//
// Construct and append a ORW instruction to the active function.
func (c *Context) ORW(imr, amr operand.Op) {
c.addinstruction(x86.ORW(imr, amr))
}
// ORW: Logical Inclusive OR.
//
// Forms:
//
// ORW imm16 ax
// ORW imm16 m16
// ORW imm16 r16
// ORW imm8 m16
// ORW imm8 r16
// ORW m16 r16
// ORW r16 m16
// ORW r16 r16
//
// Construct and append a ORW instruction to the active function.
// Operates on the global context.
func ORW(imr, amr operand.Op) { ctx.ORW(imr, amr) }
// PABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// PABSB m128 xmm
// PABSB xmm xmm
//
// Construct and append a PABSB instruction to the active function.
func (c *Context) PABSB(mx, x operand.Op) {
c.addinstruction(x86.PABSB(mx, x))
}
// PABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// PABSB m128 xmm
// PABSB xmm xmm
//
// Construct and append a PABSB instruction to the active function.
// Operates on the global context.
func PABSB(mx, x operand.Op) { ctx.PABSB(mx, x) }
// PABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// PABSD m128 xmm
// PABSD xmm xmm
//
// Construct and append a PABSD instruction to the active function.
func (c *Context) PABSD(mx, x operand.Op) {
c.addinstruction(x86.PABSD(mx, x))
}
// PABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// PABSD m128 xmm
// PABSD xmm xmm
//
// Construct and append a PABSD instruction to the active function.
// Operates on the global context.
func PABSD(mx, x operand.Op) { ctx.PABSD(mx, x) }
// PABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// PABSW m128 xmm
// PABSW xmm xmm
//
// Construct and append a PABSW instruction to the active function.
func (c *Context) PABSW(mx, x operand.Op) {
c.addinstruction(x86.PABSW(mx, x))
}
// PABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// PABSW m128 xmm
// PABSW xmm xmm
//
// Construct and append a PABSW instruction to the active function.
// Operates on the global context.
func PABSW(mx, x operand.Op) { ctx.PABSW(mx, x) }
// PACKSSLW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// PACKSSLW m128 xmm
// PACKSSLW xmm xmm
//
// Construct and append a PACKSSLW instruction to the active function.
func (c *Context) PACKSSLW(mx, x operand.Op) {
c.addinstruction(x86.PACKSSLW(mx, x))
}
// PACKSSLW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// PACKSSLW m128 xmm
// PACKSSLW xmm xmm
//
// Construct and append a PACKSSLW instruction to the active function.
// Operates on the global context.
func PACKSSLW(mx, x operand.Op) { ctx.PACKSSLW(mx, x) }
// PACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// PACKSSWB m128 xmm
// PACKSSWB xmm xmm
//
// Construct and append a PACKSSWB instruction to the active function.
func (c *Context) PACKSSWB(mx, x operand.Op) {
c.addinstruction(x86.PACKSSWB(mx, x))
}
// PACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// PACKSSWB m128 xmm
// PACKSSWB xmm xmm
//
// Construct and append a PACKSSWB instruction to the active function.
// Operates on the global context.
func PACKSSWB(mx, x operand.Op) { ctx.PACKSSWB(mx, x) }
// PACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// PACKUSDW m128 xmm
// PACKUSDW xmm xmm
//
// Construct and append a PACKUSDW instruction to the active function.
func (c *Context) PACKUSDW(mx, x operand.Op) {
c.addinstruction(x86.PACKUSDW(mx, x))
}
// PACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// PACKUSDW m128 xmm
// PACKUSDW xmm xmm
//
// Construct and append a PACKUSDW instruction to the active function.
// Operates on the global context.
func PACKUSDW(mx, x operand.Op) { ctx.PACKUSDW(mx, x) }
// PACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// PACKUSWB m128 xmm
// PACKUSWB xmm xmm
//
// Construct and append a PACKUSWB instruction to the active function.
func (c *Context) PACKUSWB(mx, x operand.Op) {
c.addinstruction(x86.PACKUSWB(mx, x))
}
// PACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// PACKUSWB m128 xmm
// PACKUSWB xmm xmm
//
// Construct and append a PACKUSWB instruction to the active function.
// Operates on the global context.
func PACKUSWB(mx, x operand.Op) { ctx.PACKUSWB(mx, x) }
// PADDB: Add Packed Byte Integers.
//
// Forms:
//
// PADDB m128 xmm
// PADDB xmm xmm
//
// Construct and append a PADDB instruction to the active function.
func (c *Context) PADDB(mx, x operand.Op) {
c.addinstruction(x86.PADDB(mx, x))
}
// PADDB: Add Packed Byte Integers.
//
// Forms:
//
// PADDB m128 xmm
// PADDB xmm xmm
//
// Construct and append a PADDB instruction to the active function.
// Operates on the global context.
func PADDB(mx, x operand.Op) { ctx.PADDB(mx, x) }
// PADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDD m128 xmm
// PADDD xmm xmm
//
// Construct and append a PADDD instruction to the active function.
func (c *Context) PADDD(mx, x operand.Op) {
c.addinstruction(x86.PADDD(mx, x))
}
// PADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDD m128 xmm
// PADDD xmm xmm
//
// Construct and append a PADDD instruction to the active function.
// Operates on the global context.
func PADDD(mx, x operand.Op) { ctx.PADDD(mx, x) }
// PADDL: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDL m128 xmm
// PADDL xmm xmm
//
// Construct and append a PADDL instruction to the active function.
func (c *Context) PADDL(mx, x operand.Op) {
c.addinstruction(x86.PADDL(mx, x))
}
// PADDL: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDL m128 xmm
// PADDL xmm xmm
//
// Construct and append a PADDL instruction to the active function.
// Operates on the global context.
func PADDL(mx, x operand.Op) { ctx.PADDL(mx, x) }
// PADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// PADDQ m128 xmm
// PADDQ xmm xmm
//
// Construct and append a PADDQ instruction to the active function.
func (c *Context) PADDQ(mx, x operand.Op) {
c.addinstruction(x86.PADDQ(mx, x))
}
// PADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// PADDQ m128 xmm
// PADDQ xmm xmm
//
// Construct and append a PADDQ instruction to the active function.
// Operates on the global context.
func PADDQ(mx, x operand.Op) { ctx.PADDQ(mx, x) }
// PADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PADDSB m128 xmm
// PADDSB xmm xmm
//
// Construct and append a PADDSB instruction to the active function.
func (c *Context) PADDSB(mx, x operand.Op) {
c.addinstruction(x86.PADDSB(mx, x))
}
// PADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PADDSB m128 xmm
// PADDSB xmm xmm
//
// Construct and append a PADDSB instruction to the active function.
// Operates on the global context.
func PADDSB(mx, x operand.Op) { ctx.PADDSB(mx, x) }
// PADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PADDSW m128 xmm
// PADDSW xmm xmm
//
// Construct and append a PADDSW instruction to the active function.
func (c *Context) PADDSW(mx, x operand.Op) {
c.addinstruction(x86.PADDSW(mx, x))
}
// PADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PADDSW m128 xmm
// PADDSW xmm xmm
//
// Construct and append a PADDSW instruction to the active function.
// Operates on the global context.
func PADDSW(mx, x operand.Op) { ctx.PADDSW(mx, x) }
// PADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSB m128 xmm
// PADDUSB xmm xmm
//
// Construct and append a PADDUSB instruction to the active function.
func (c *Context) PADDUSB(mx, x operand.Op) {
c.addinstruction(x86.PADDUSB(mx, x))
}
// PADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSB m128 xmm
// PADDUSB xmm xmm
//
// Construct and append a PADDUSB instruction to the active function.
// Operates on the global context.
func PADDUSB(mx, x operand.Op) { ctx.PADDUSB(mx, x) }
// PADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSW m128 xmm
// PADDUSW xmm xmm
//
// Construct and append a PADDUSW instruction to the active function.
func (c *Context) PADDUSW(mx, x operand.Op) {
c.addinstruction(x86.PADDUSW(mx, x))
}
// PADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSW m128 xmm
// PADDUSW xmm xmm
//
// Construct and append a PADDUSW instruction to the active function.
// Operates on the global context.
func PADDUSW(mx, x operand.Op) { ctx.PADDUSW(mx, x) }
// PADDW: Add Packed Word Integers.
//
// Forms:
//
// PADDW m128 xmm
// PADDW xmm xmm
//
// Construct and append a PADDW instruction to the active function.
func (c *Context) PADDW(mx, x operand.Op) {
c.addinstruction(x86.PADDW(mx, x))
}
// PADDW: Add Packed Word Integers.
//
// Forms:
//
// PADDW m128 xmm
// PADDW xmm xmm
//
// Construct and append a PADDW instruction to the active function.
// Operates on the global context.
func PADDW(mx, x operand.Op) { ctx.PADDW(mx, x) }
// PALIGNR: Packed Align Right.
//
// Forms:
//
// PALIGNR imm8 m128 xmm
// PALIGNR imm8 xmm xmm
//
// Construct and append a PALIGNR instruction to the active function.
func (c *Context) PALIGNR(i, mx, x operand.Op) {
c.addinstruction(x86.PALIGNR(i, mx, x))
}
// PALIGNR: Packed Align Right.
//
// Forms:
//
// PALIGNR imm8 m128 xmm
// PALIGNR imm8 xmm xmm
//
// Construct and append a PALIGNR instruction to the active function.
// Operates on the global context.
func PALIGNR(i, mx, x operand.Op) { ctx.PALIGNR(i, mx, x) }
// PAND: Packed Bitwise Logical AND.
//
// Forms:
//
// PAND m128 xmm
// PAND xmm xmm
//
// Construct and append a PAND instruction to the active function.
func (c *Context) PAND(mx, x operand.Op) {
c.addinstruction(x86.PAND(mx, x))
}
// PAND: Packed Bitwise Logical AND.
//
// Forms:
//
// PAND m128 xmm
// PAND xmm xmm
//
// Construct and append a PAND instruction to the active function.
// Operates on the global context.
func PAND(mx, x operand.Op) { ctx.PAND(mx, x) }
// PANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// PANDN m128 xmm
// PANDN xmm xmm
//
// Construct and append a PANDN instruction to the active function.
func (c *Context) PANDN(mx, x operand.Op) {
c.addinstruction(x86.PANDN(mx, x))
}
// PANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// PANDN m128 xmm
// PANDN xmm xmm
//
// Construct and append a PANDN instruction to the active function.
// Operates on the global context.
func PANDN(mx, x operand.Op) { ctx.PANDN(mx, x) }
// PAUSE: Spin Loop Hint.
//
// Forms:
//
// PAUSE
//
// Construct and append a PAUSE instruction to the active function.
func (c *Context) PAUSE() {
c.addinstruction(x86.PAUSE())
}
// PAUSE: Spin Loop Hint.
//
// Forms:
//
// PAUSE
//
// Construct and append a PAUSE instruction to the active function.
// Operates on the global context.
func PAUSE() { ctx.PAUSE() }
// PAVGB: Average Packed Byte Integers.
//
// Forms:
//
// PAVGB m128 xmm
// PAVGB xmm xmm
//
// Construct and append a PAVGB instruction to the active function.
func (c *Context) PAVGB(mx, x operand.Op) {
c.addinstruction(x86.PAVGB(mx, x))
}
// PAVGB: Average Packed Byte Integers.
//
// Forms:
//
// PAVGB m128 xmm
// PAVGB xmm xmm
//
// Construct and append a PAVGB instruction to the active function.
// Operates on the global context.
func PAVGB(mx, x operand.Op) { ctx.PAVGB(mx, x) }
// PAVGW: Average Packed Word Integers.
//
// Forms:
//
// PAVGW m128 xmm
// PAVGW xmm xmm
//
// Construct and append a PAVGW instruction to the active function.
func (c *Context) PAVGW(mx, x operand.Op) {
c.addinstruction(x86.PAVGW(mx, x))
}
// PAVGW: Average Packed Word Integers.
//
// Forms:
//
// PAVGW m128 xmm
// PAVGW xmm xmm
//
// Construct and append a PAVGW instruction to the active function.
// Operates on the global context.
func PAVGW(mx, x operand.Op) { ctx.PAVGW(mx, x) }
// PBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// PBLENDVB xmm0 m128 xmm
// PBLENDVB xmm0 xmm xmm
//
// Construct and append a PBLENDVB instruction to the active function.
func (c *Context) PBLENDVB(x, mx, x1 operand.Op) {
c.addinstruction(x86.PBLENDVB(x, mx, x1))
}
// PBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// PBLENDVB xmm0 m128 xmm
// PBLENDVB xmm0 xmm xmm
//
// Construct and append a PBLENDVB instruction to the active function.
// Operates on the global context.
func PBLENDVB(x, mx, x1 operand.Op) { ctx.PBLENDVB(x, mx, x1) }
// PBLENDW: Blend Packed Words.
//
// Forms:
//
// PBLENDW imm8 m128 xmm
// PBLENDW imm8 xmm xmm
//
// Construct and append a PBLENDW instruction to the active function.
func (c *Context) PBLENDW(i, mx, x operand.Op) {
c.addinstruction(x86.PBLENDW(i, mx, x))
}
// PBLENDW: Blend Packed Words.
//
// Forms:
//
// PBLENDW imm8 m128 xmm
// PBLENDW imm8 xmm xmm
//
// Construct and append a PBLENDW instruction to the active function.
// Operates on the global context.
func PBLENDW(i, mx, x operand.Op) { ctx.PBLENDW(i, mx, x) }
// PCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// PCLMULQDQ imm8 m128 xmm
// PCLMULQDQ imm8 xmm xmm
//
// Construct and append a PCLMULQDQ instruction to the active function.
func (c *Context) PCLMULQDQ(i, mx, x operand.Op) {
c.addinstruction(x86.PCLMULQDQ(i, mx, x))
}
// PCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// PCLMULQDQ imm8 m128 xmm
// PCLMULQDQ imm8 xmm xmm
//
// Construct and append a PCLMULQDQ instruction to the active function.
// Operates on the global context.
func PCLMULQDQ(i, mx, x operand.Op) { ctx.PCLMULQDQ(i, mx, x) }
// PCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// PCMPEQB m128 xmm
// PCMPEQB xmm xmm
//
// Construct and append a PCMPEQB instruction to the active function.
func (c *Context) PCMPEQB(mx, x operand.Op) {
c.addinstruction(x86.PCMPEQB(mx, x))
}
// PCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// PCMPEQB m128 xmm
// PCMPEQB xmm xmm
//
// Construct and append a PCMPEQB instruction to the active function.
// Operates on the global context.
func PCMPEQB(mx, x operand.Op) { ctx.PCMPEQB(mx, x) }
// PCMPEQL: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// PCMPEQL m128 xmm
// PCMPEQL xmm xmm
//
// Construct and append a PCMPEQL instruction to the active function.
func (c *Context) PCMPEQL(mx, x operand.Op) {
c.addinstruction(x86.PCMPEQL(mx, x))
}
// PCMPEQL: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// PCMPEQL m128 xmm
// PCMPEQL xmm xmm
//
// Construct and append a PCMPEQL instruction to the active function.
// Operates on the global context.
func PCMPEQL(mx, x operand.Op) { ctx.PCMPEQL(mx, x) }
// PCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// PCMPEQQ m128 xmm
// PCMPEQQ xmm xmm
//
// Construct and append a PCMPEQQ instruction to the active function.
func (c *Context) PCMPEQQ(mx, x operand.Op) {
c.addinstruction(x86.PCMPEQQ(mx, x))
}
// PCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// PCMPEQQ m128 xmm
// PCMPEQQ xmm xmm
//
// Construct and append a PCMPEQQ instruction to the active function.
// Operates on the global context.
func PCMPEQQ(mx, x operand.Op) { ctx.PCMPEQQ(mx, x) }
// PCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// PCMPEQW m128 xmm
// PCMPEQW xmm xmm
//
// Construct and append a PCMPEQW instruction to the active function.
func (c *Context) PCMPEQW(mx, x operand.Op) {
c.addinstruction(x86.PCMPEQW(mx, x))
}
// PCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// PCMPEQW m128 xmm
// PCMPEQW xmm xmm
//
// Construct and append a PCMPEQW instruction to the active function.
// Operates on the global context.
func PCMPEQW(mx, x operand.Op) { ctx.PCMPEQW(mx, x) }
// PCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// PCMPESTRI imm8 m128 xmm
// PCMPESTRI imm8 xmm xmm
//
// Construct and append a PCMPESTRI instruction to the active function.
func (c *Context) PCMPESTRI(i, mx, x operand.Op) {
c.addinstruction(x86.PCMPESTRI(i, mx, x))
}
// PCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// PCMPESTRI imm8 m128 xmm
// PCMPESTRI imm8 xmm xmm
//
// Construct and append a PCMPESTRI instruction to the active function.
// Operates on the global context.
func PCMPESTRI(i, mx, x operand.Op) { ctx.PCMPESTRI(i, mx, x) }
// PCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPESTRM imm8 m128 xmm
// PCMPESTRM imm8 xmm xmm
//
// Construct and append a PCMPESTRM instruction to the active function.
func (c *Context) PCMPESTRM(i, mx, x operand.Op) {
c.addinstruction(x86.PCMPESTRM(i, mx, x))
}
// PCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPESTRM imm8 m128 xmm
// PCMPESTRM imm8 xmm xmm
//
// Construct and append a PCMPESTRM instruction to the active function.
// Operates on the global context.
func PCMPESTRM(i, mx, x operand.Op) { ctx.PCMPESTRM(i, mx, x) }
// PCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// PCMPGTB m128 xmm
// PCMPGTB xmm xmm
//
// Construct and append a PCMPGTB instruction to the active function.
func (c *Context) PCMPGTB(mx, x operand.Op) {
c.addinstruction(x86.PCMPGTB(mx, x))
}
// PCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// PCMPGTB m128 xmm
// PCMPGTB xmm xmm
//
// Construct and append a PCMPGTB instruction to the active function.
// Operates on the global context.
func PCMPGTB(mx, x operand.Op) { ctx.PCMPGTB(mx, x) }
// PCMPGTL: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// PCMPGTL m128 xmm
// PCMPGTL xmm xmm
//
// Construct and append a PCMPGTL instruction to the active function.
func (c *Context) PCMPGTL(mx, x operand.Op) {
c.addinstruction(x86.PCMPGTL(mx, x))
}
// PCMPGTL: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// PCMPGTL m128 xmm
// PCMPGTL xmm xmm
//
// Construct and append a PCMPGTL instruction to the active function.
// Operates on the global context.
func PCMPGTL(mx, x operand.Op) { ctx.PCMPGTL(mx, x) }
// PCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// PCMPGTQ m128 xmm
// PCMPGTQ xmm xmm
//
// Construct and append a PCMPGTQ instruction to the active function.
func (c *Context) PCMPGTQ(mx, x operand.Op) {
c.addinstruction(x86.PCMPGTQ(mx, x))
}
// PCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// PCMPGTQ m128 xmm
// PCMPGTQ xmm xmm
//
// Construct and append a PCMPGTQ instruction to the active function.
// Operates on the global context.
func PCMPGTQ(mx, x operand.Op) { ctx.PCMPGTQ(mx, x) }
// PCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// PCMPGTW m128 xmm
// PCMPGTW xmm xmm
//
// Construct and append a PCMPGTW instruction to the active function.
func (c *Context) PCMPGTW(mx, x operand.Op) {
c.addinstruction(x86.PCMPGTW(mx, x))
}
// PCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// PCMPGTW m128 xmm
// PCMPGTW xmm xmm
//
// Construct and append a PCMPGTW instruction to the active function.
// Operates on the global context.
func PCMPGTW(mx, x operand.Op) { ctx.PCMPGTW(mx, x) }
// PCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// PCMPISTRI imm8 m128 xmm
// PCMPISTRI imm8 xmm xmm
//
// Construct and append a PCMPISTRI instruction to the active function.
func (c *Context) PCMPISTRI(i, mx, x operand.Op) {
c.addinstruction(x86.PCMPISTRI(i, mx, x))
}
// PCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// PCMPISTRI imm8 m128 xmm
// PCMPISTRI imm8 xmm xmm
//
// Construct and append a PCMPISTRI instruction to the active function.
// Operates on the global context.
func PCMPISTRI(i, mx, x operand.Op) { ctx.PCMPISTRI(i, mx, x) }
// PCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPISTRM imm8 m128 xmm
// PCMPISTRM imm8 xmm xmm
//
// Construct and append a PCMPISTRM instruction to the active function.
func (c *Context) PCMPISTRM(i, mx, x operand.Op) {
c.addinstruction(x86.PCMPISTRM(i, mx, x))
}
// PCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPISTRM imm8 m128 xmm
// PCMPISTRM imm8 xmm xmm
//
// Construct and append a PCMPISTRM instruction to the active function.
// Operates on the global context.
func PCMPISTRM(i, mx, x operand.Op) { ctx.PCMPISTRM(i, mx, x) }
// PDEPL: Parallel Bits Deposit.
//
// Forms:
//
// PDEPL m32 r32 r32
// PDEPL r32 r32 r32
//
// Construct and append a PDEPL instruction to the active function.
func (c *Context) PDEPL(mr, r, r1 operand.Op) {
c.addinstruction(x86.PDEPL(mr, r, r1))
}
// PDEPL: Parallel Bits Deposit.
//
// Forms:
//
// PDEPL m32 r32 r32
// PDEPL r32 r32 r32
//
// Construct and append a PDEPL instruction to the active function.
// Operates on the global context.
func PDEPL(mr, r, r1 operand.Op) { ctx.PDEPL(mr, r, r1) }
// PDEPQ: Parallel Bits Deposit.
//
// Forms:
//
// PDEPQ m64 r64 r64
// PDEPQ r64 r64 r64
//
// Construct and append a PDEPQ instruction to the active function.
func (c *Context) PDEPQ(mr, r, r1 operand.Op) {
c.addinstruction(x86.PDEPQ(mr, r, r1))
}
// PDEPQ: Parallel Bits Deposit.
//
// Forms:
//
// PDEPQ m64 r64 r64
// PDEPQ r64 r64 r64
//
// Construct and append a PDEPQ instruction to the active function.
// Operates on the global context.
func PDEPQ(mr, r, r1 operand.Op) { ctx.PDEPQ(mr, r, r1) }
// PEXTL: Parallel Bits Extract.
//
// Forms:
//
// PEXTL m32 r32 r32
// PEXTL r32 r32 r32
//
// Construct and append a PEXTL instruction to the active function.
func (c *Context) PEXTL(mr, r, r1 operand.Op) {
c.addinstruction(x86.PEXTL(mr, r, r1))
}
// PEXTL: Parallel Bits Extract.
//
// Forms:
//
// PEXTL m32 r32 r32
// PEXTL r32 r32 r32
//
// Construct and append a PEXTL instruction to the active function.
// Operates on the global context.
func PEXTL(mr, r, r1 operand.Op) { ctx.PEXTL(mr, r, r1) }
// PEXTQ: Parallel Bits Extract.
//
// Forms:
//
// PEXTQ m64 r64 r64
// PEXTQ r64 r64 r64
//
// Construct and append a PEXTQ instruction to the active function.
func (c *Context) PEXTQ(mr, r, r1 operand.Op) {
c.addinstruction(x86.PEXTQ(mr, r, r1))
}
// PEXTQ: Parallel Bits Extract.
//
// Forms:
//
// PEXTQ m64 r64 r64
// PEXTQ r64 r64 r64
//
// Construct and append a PEXTQ instruction to the active function.
// Operates on the global context.
func PEXTQ(mr, r, r1 operand.Op) { ctx.PEXTQ(mr, r, r1) }
// PEXTRB: Extract Byte.
//
// Forms:
//
// PEXTRB imm8 xmm m8
// PEXTRB imm8 xmm r32
//
// Construct and append a PEXTRB instruction to the active function.
func (c *Context) PEXTRB(i, x, mr operand.Op) {
c.addinstruction(x86.PEXTRB(i, x, mr))
}
// PEXTRB: Extract Byte.
//
// Forms:
//
// PEXTRB imm8 xmm m8
// PEXTRB imm8 xmm r32
//
// Construct and append a PEXTRB instruction to the active function.
// Operates on the global context.
func PEXTRB(i, x, mr operand.Op) { ctx.PEXTRB(i, x, mr) }
// PEXTRD: Extract Doubleword.
//
// Forms:
//
// PEXTRD imm8 xmm m32
// PEXTRD imm8 xmm r32
//
// Construct and append a PEXTRD instruction to the active function.
func (c *Context) PEXTRD(i, x, mr operand.Op) {
c.addinstruction(x86.PEXTRD(i, x, mr))
}
// PEXTRD: Extract Doubleword.
//
// Forms:
//
// PEXTRD imm8 xmm m32
// PEXTRD imm8 xmm r32
//
// Construct and append a PEXTRD instruction to the active function.
// Operates on the global context.
func PEXTRD(i, x, mr operand.Op) { ctx.PEXTRD(i, x, mr) }
// PEXTRQ: Extract Quadword.
//
// Forms:
//
// PEXTRQ imm8 xmm m64
// PEXTRQ imm8 xmm r64
//
// Construct and append a PEXTRQ instruction to the active function.
func (c *Context) PEXTRQ(i, x, mr operand.Op) {
c.addinstruction(x86.PEXTRQ(i, x, mr))
}
// PEXTRQ: Extract Quadword.
//
// Forms:
//
// PEXTRQ imm8 xmm m64
// PEXTRQ imm8 xmm r64
//
// Construct and append a PEXTRQ instruction to the active function.
// Operates on the global context.
func PEXTRQ(i, x, mr operand.Op) { ctx.PEXTRQ(i, x, mr) }
// PEXTRW: Extract Word.
//
// Forms:
//
// PEXTRW imm8 xmm m16
// PEXTRW imm8 xmm r32
//
// Construct and append a PEXTRW instruction to the active function.
func (c *Context) PEXTRW(i, x, mr operand.Op) {
c.addinstruction(x86.PEXTRW(i, x, mr))
}
// PEXTRW: Extract Word.
//
// Forms:
//
// PEXTRW imm8 xmm m16
// PEXTRW imm8 xmm r32
//
// Construct and append a PEXTRW instruction to the active function.
// Operates on the global context.
func PEXTRW(i, x, mr operand.Op) { ctx.PEXTRW(i, x, mr) }
// PHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// PHADDD m128 xmm
// PHADDD xmm xmm
//
// Construct and append a PHADDD instruction to the active function.
func (c *Context) PHADDD(mx, x operand.Op) {
c.addinstruction(x86.PHADDD(mx, x))
}
// PHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// PHADDD m128 xmm
// PHADDD xmm xmm
//
// Construct and append a PHADDD instruction to the active function.
// Operates on the global context.
func PHADDD(mx, x operand.Op) { ctx.PHADDD(mx, x) }
// PHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHADDSW m128 xmm
// PHADDSW xmm xmm
//
// Construct and append a PHADDSW instruction to the active function.
func (c *Context) PHADDSW(mx, x operand.Op) {
c.addinstruction(x86.PHADDSW(mx, x))
}
// PHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHADDSW m128 xmm
// PHADDSW xmm xmm
//
// Construct and append a PHADDSW instruction to the active function.
// Operates on the global context.
func PHADDSW(mx, x operand.Op) { ctx.PHADDSW(mx, x) }
// PHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// PHADDW m128 xmm
// PHADDW xmm xmm
//
// Construct and append a PHADDW instruction to the active function.
func (c *Context) PHADDW(mx, x operand.Op) {
c.addinstruction(x86.PHADDW(mx, x))
}
// PHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// PHADDW m128 xmm
// PHADDW xmm xmm
//
// Construct and append a PHADDW instruction to the active function.
// Operates on the global context.
func PHADDW(mx, x operand.Op) { ctx.PHADDW(mx, x) }
// PHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// PHMINPOSUW m128 xmm
// PHMINPOSUW xmm xmm
//
// Construct and append a PHMINPOSUW instruction to the active function.
func (c *Context) PHMINPOSUW(mx, x operand.Op) {
c.addinstruction(x86.PHMINPOSUW(mx, x))
}
// PHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// PHMINPOSUW m128 xmm
// PHMINPOSUW xmm xmm
//
// Construct and append a PHMINPOSUW instruction to the active function.
// Operates on the global context.
func PHMINPOSUW(mx, x operand.Op) { ctx.PHMINPOSUW(mx, x) }
// PHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// PHSUBD m128 xmm
// PHSUBD xmm xmm
//
// Construct and append a PHSUBD instruction to the active function.
func (c *Context) PHSUBD(mx, x operand.Op) {
c.addinstruction(x86.PHSUBD(mx, x))
}
// PHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// PHSUBD m128 xmm
// PHSUBD xmm xmm
//
// Construct and append a PHSUBD instruction to the active function.
// Operates on the global context.
func PHSUBD(mx, x operand.Op) { ctx.PHSUBD(mx, x) }
// PHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHSUBSW m128 xmm
// PHSUBSW xmm xmm
//
// Construct and append a PHSUBSW instruction to the active function.
func (c *Context) PHSUBSW(mx, x operand.Op) {
c.addinstruction(x86.PHSUBSW(mx, x))
}
// PHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHSUBSW m128 xmm
// PHSUBSW xmm xmm
//
// Construct and append a PHSUBSW instruction to the active function.
// Operates on the global context.
func PHSUBSW(mx, x operand.Op) { ctx.PHSUBSW(mx, x) }
// PHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// PHSUBW m128 xmm
// PHSUBW xmm xmm
//
// Construct and append a PHSUBW instruction to the active function.
func (c *Context) PHSUBW(mx, x operand.Op) {
c.addinstruction(x86.PHSUBW(mx, x))
}
// PHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// PHSUBW m128 xmm
// PHSUBW xmm xmm
//
// Construct and append a PHSUBW instruction to the active function.
// Operates on the global context.
func PHSUBW(mx, x operand.Op) { ctx.PHSUBW(mx, x) }
// PINSRB: Insert Byte.
//
// Forms:
//
// PINSRB imm8 m8 xmm
// PINSRB imm8 r32 xmm
//
// Construct and append a PINSRB instruction to the active function.
func (c *Context) PINSRB(i, mr, x operand.Op) {
c.addinstruction(x86.PINSRB(i, mr, x))
}
// PINSRB: Insert Byte.
//
// Forms:
//
// PINSRB imm8 m8 xmm
// PINSRB imm8 r32 xmm
//
// Construct and append a PINSRB instruction to the active function.
// Operates on the global context.
func PINSRB(i, mr, x operand.Op) { ctx.PINSRB(i, mr, x) }
// PINSRD: Insert Doubleword.
//
// Forms:
//
// PINSRD imm8 m32 xmm
// PINSRD imm8 r32 xmm
//
// Construct and append a PINSRD instruction to the active function.
func (c *Context) PINSRD(i, mr, x operand.Op) {
c.addinstruction(x86.PINSRD(i, mr, x))
}
// PINSRD: Insert Doubleword.
//
// Forms:
//
// PINSRD imm8 m32 xmm
// PINSRD imm8 r32 xmm
//
// Construct and append a PINSRD instruction to the active function.
// Operates on the global context.
func PINSRD(i, mr, x operand.Op) { ctx.PINSRD(i, mr, x) }
// PINSRQ: Insert Quadword.
//
// Forms:
//
// PINSRQ imm8 m64 xmm
// PINSRQ imm8 r64 xmm
//
// Construct and append a PINSRQ instruction to the active function.
func (c *Context) PINSRQ(i, mr, x operand.Op) {
c.addinstruction(x86.PINSRQ(i, mr, x))
}
// PINSRQ: Insert Quadword.
//
// Forms:
//
// PINSRQ imm8 m64 xmm
// PINSRQ imm8 r64 xmm
//
// Construct and append a PINSRQ instruction to the active function.
// Operates on the global context.
func PINSRQ(i, mr, x operand.Op) { ctx.PINSRQ(i, mr, x) }
// PINSRW: Insert Word.
//
// Forms:
//
// PINSRW imm8 m16 xmm
// PINSRW imm8 r32 xmm
//
// Construct and append a PINSRW instruction to the active function.
func (c *Context) PINSRW(i, mr, x operand.Op) {
c.addinstruction(x86.PINSRW(i, mr, x))
}
// PINSRW: Insert Word.
//
// Forms:
//
// PINSRW imm8 m16 xmm
// PINSRW imm8 r32 xmm
//
// Construct and append a PINSRW instruction to the active function.
// Operates on the global context.
func PINSRW(i, mr, x operand.Op) { ctx.PINSRW(i, mr, x) }
// PMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// PMADDUBSW m128 xmm
// PMADDUBSW xmm xmm
//
// Construct and append a PMADDUBSW instruction to the active function.
func (c *Context) PMADDUBSW(mx, x operand.Op) {
c.addinstruction(x86.PMADDUBSW(mx, x))
}
// PMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// PMADDUBSW m128 xmm
// PMADDUBSW xmm xmm
//
// Construct and append a PMADDUBSW instruction to the active function.
// Operates on the global context.
func PMADDUBSW(mx, x operand.Op) { ctx.PMADDUBSW(mx, x) }
// PMADDWL: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// PMADDWL m128 xmm
// PMADDWL xmm xmm
//
// Construct and append a PMADDWL instruction to the active function.
func (c *Context) PMADDWL(mx, x operand.Op) {
c.addinstruction(x86.PMADDWL(mx, x))
}
// PMADDWL: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// PMADDWL m128 xmm
// PMADDWL xmm xmm
//
// Construct and append a PMADDWL instruction to the active function.
// Operates on the global context.
func PMADDWL(mx, x operand.Op) { ctx.PMADDWL(mx, x) }
// PMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// PMAXSB m128 xmm
// PMAXSB xmm xmm
//
// Construct and append a PMAXSB instruction to the active function.
func (c *Context) PMAXSB(mx, x operand.Op) {
c.addinstruction(x86.PMAXSB(mx, x))
}
// PMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// PMAXSB m128 xmm
// PMAXSB xmm xmm
//
// Construct and append a PMAXSB instruction to the active function.
// Operates on the global context.
func PMAXSB(mx, x operand.Op) { ctx.PMAXSB(mx, x) }
// PMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMAXSD m128 xmm
// PMAXSD xmm xmm
//
// Construct and append a PMAXSD instruction to the active function.
func (c *Context) PMAXSD(mx, x operand.Op) {
c.addinstruction(x86.PMAXSD(mx, x))
}
// PMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMAXSD m128 xmm
// PMAXSD xmm xmm
//
// Construct and append a PMAXSD instruction to the active function.
// Operates on the global context.
func PMAXSD(mx, x operand.Op) { ctx.PMAXSD(mx, x) }
// PMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// PMAXSW m128 xmm
// PMAXSW xmm xmm
//
// Construct and append a PMAXSW instruction to the active function.
func (c *Context) PMAXSW(mx, x operand.Op) {
c.addinstruction(x86.PMAXSW(mx, x))
}
// PMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// PMAXSW m128 xmm
// PMAXSW xmm xmm
//
// Construct and append a PMAXSW instruction to the active function.
// Operates on the global context.
func PMAXSW(mx, x operand.Op) { ctx.PMAXSW(mx, x) }
// PMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMAXUB m128 xmm
// PMAXUB xmm xmm
//
// Construct and append a PMAXUB instruction to the active function.
func (c *Context) PMAXUB(mx, x operand.Op) {
c.addinstruction(x86.PMAXUB(mx, x))
}
// PMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMAXUB m128 xmm
// PMAXUB xmm xmm
//
// Construct and append a PMAXUB instruction to the active function.
// Operates on the global context.
func PMAXUB(mx, x operand.Op) { ctx.PMAXUB(mx, x) }
// PMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMAXUD m128 xmm
// PMAXUD xmm xmm
//
// Construct and append a PMAXUD instruction to the active function.
func (c *Context) PMAXUD(mx, x operand.Op) {
c.addinstruction(x86.PMAXUD(mx, x))
}
// PMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMAXUD m128 xmm
// PMAXUD xmm xmm
//
// Construct and append a PMAXUD instruction to the active function.
// Operates on the global context.
func PMAXUD(mx, x operand.Op) { ctx.PMAXUD(mx, x) }
// PMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMAXUW m128 xmm
// PMAXUW xmm xmm
//
// Construct and append a PMAXUW instruction to the active function.
func (c *Context) PMAXUW(mx, x operand.Op) {
c.addinstruction(x86.PMAXUW(mx, x))
}
// PMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMAXUW m128 xmm
// PMAXUW xmm xmm
//
// Construct and append a PMAXUW instruction to the active function.
// Operates on the global context.
func PMAXUW(mx, x operand.Op) { ctx.PMAXUW(mx, x) }
// PMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// PMINSB m128 xmm
// PMINSB xmm xmm
//
// Construct and append a PMINSB instruction to the active function.
func (c *Context) PMINSB(mx, x operand.Op) {
c.addinstruction(x86.PMINSB(mx, x))
}
// PMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// PMINSB m128 xmm
// PMINSB xmm xmm
//
// Construct and append a PMINSB instruction to the active function.
// Operates on the global context.
func PMINSB(mx, x operand.Op) { ctx.PMINSB(mx, x) }
// PMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMINSD m128 xmm
// PMINSD xmm xmm
//
// Construct and append a PMINSD instruction to the active function.
func (c *Context) PMINSD(mx, x operand.Op) {
c.addinstruction(x86.PMINSD(mx, x))
}
// PMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMINSD m128 xmm
// PMINSD xmm xmm
//
// Construct and append a PMINSD instruction to the active function.
// Operates on the global context.
func PMINSD(mx, x operand.Op) { ctx.PMINSD(mx, x) }
// PMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// PMINSW m128 xmm
// PMINSW xmm xmm
//
// Construct and append a PMINSW instruction to the active function.
func (c *Context) PMINSW(mx, x operand.Op) {
c.addinstruction(x86.PMINSW(mx, x))
}
// PMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// PMINSW m128 xmm
// PMINSW xmm xmm
//
// Construct and append a PMINSW instruction to the active function.
// Operates on the global context.
func PMINSW(mx, x operand.Op) { ctx.PMINSW(mx, x) }
// PMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMINUB m128 xmm
// PMINUB xmm xmm
//
// Construct and append a PMINUB instruction to the active function.
func (c *Context) PMINUB(mx, x operand.Op) {
c.addinstruction(x86.PMINUB(mx, x))
}
// PMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMINUB m128 xmm
// PMINUB xmm xmm
//
// Construct and append a PMINUB instruction to the active function.
// Operates on the global context.
func PMINUB(mx, x operand.Op) { ctx.PMINUB(mx, x) }
// PMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMINUD m128 xmm
// PMINUD xmm xmm
//
// Construct and append a PMINUD instruction to the active function.
func (c *Context) PMINUD(mx, x operand.Op) {
c.addinstruction(x86.PMINUD(mx, x))
}
// PMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMINUD m128 xmm
// PMINUD xmm xmm
//
// Construct and append a PMINUD instruction to the active function.
// Operates on the global context.
func PMINUD(mx, x operand.Op) { ctx.PMINUD(mx, x) }
// PMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMINUW m128 xmm
// PMINUW xmm xmm
//
// Construct and append a PMINUW instruction to the active function.
func (c *Context) PMINUW(mx, x operand.Op) {
c.addinstruction(x86.PMINUW(mx, x))
}
// PMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMINUW m128 xmm
// PMINUW xmm xmm
//
// Construct and append a PMINUW instruction to the active function.
// Operates on the global context.
func PMINUW(mx, x operand.Op) { ctx.PMINUW(mx, x) }
// PMOVMSKB: Move Byte Mask.
//
// Forms:
//
// PMOVMSKB xmm r32
//
// Construct and append a PMOVMSKB instruction to the active function.
func (c *Context) PMOVMSKB(x, r operand.Op) {
c.addinstruction(x86.PMOVMSKB(x, r))
}
// PMOVMSKB: Move Byte Mask.
//
// Forms:
//
// PMOVMSKB xmm r32
//
// Construct and append a PMOVMSKB instruction to the active function.
// Operates on the global context.
func PMOVMSKB(x, r operand.Op) { ctx.PMOVMSKB(x, r) }
// PMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBD m32 xmm
// PMOVSXBD xmm xmm
//
// Construct and append a PMOVSXBD instruction to the active function.
func (c *Context) PMOVSXBD(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXBD(mx, x))
}
// PMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBD m32 xmm
// PMOVSXBD xmm xmm
//
// Construct and append a PMOVSXBD instruction to the active function.
// Operates on the global context.
func PMOVSXBD(mx, x operand.Op) { ctx.PMOVSXBD(mx, x) }
// PMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBQ m16 xmm
// PMOVSXBQ xmm xmm
//
// Construct and append a PMOVSXBQ instruction to the active function.
func (c *Context) PMOVSXBQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXBQ(mx, x))
}
// PMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBQ m16 xmm
// PMOVSXBQ xmm xmm
//
// Construct and append a PMOVSXBQ instruction to the active function.
// Operates on the global context.
func PMOVSXBQ(mx, x operand.Op) { ctx.PMOVSXBQ(mx, x) }
// PMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBW m64 xmm
// PMOVSXBW xmm xmm
//
// Construct and append a PMOVSXBW instruction to the active function.
func (c *Context) PMOVSXBW(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXBW(mx, x))
}
// PMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBW m64 xmm
// PMOVSXBW xmm xmm
//
// Construct and append a PMOVSXBW instruction to the active function.
// Operates on the global context.
func PMOVSXBW(mx, x operand.Op) { ctx.PMOVSXBW(mx, x) }
// PMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXDQ m64 xmm
// PMOVSXDQ xmm xmm
//
// Construct and append a PMOVSXDQ instruction to the active function.
func (c *Context) PMOVSXDQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXDQ(mx, x))
}
// PMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXDQ m64 xmm
// PMOVSXDQ xmm xmm
//
// Construct and append a PMOVSXDQ instruction to the active function.
// Operates on the global context.
func PMOVSXDQ(mx, x operand.Op) { ctx.PMOVSXDQ(mx, x) }
// PMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWD m64 xmm
// PMOVSXWD xmm xmm
//
// Construct and append a PMOVSXWD instruction to the active function.
func (c *Context) PMOVSXWD(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXWD(mx, x))
}
// PMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWD m64 xmm
// PMOVSXWD xmm xmm
//
// Construct and append a PMOVSXWD instruction to the active function.
// Operates on the global context.
func PMOVSXWD(mx, x operand.Op) { ctx.PMOVSXWD(mx, x) }
// PMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWQ m32 xmm
// PMOVSXWQ xmm xmm
//
// Construct and append a PMOVSXWQ instruction to the active function.
func (c *Context) PMOVSXWQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVSXWQ(mx, x))
}
// PMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWQ m32 xmm
// PMOVSXWQ xmm xmm
//
// Construct and append a PMOVSXWQ instruction to the active function.
// Operates on the global context.
func PMOVSXWQ(mx, x operand.Op) { ctx.PMOVSXWQ(mx, x) }
// PMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBD m32 xmm
// PMOVZXBD xmm xmm
//
// Construct and append a PMOVZXBD instruction to the active function.
func (c *Context) PMOVZXBD(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXBD(mx, x))
}
// PMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBD m32 xmm
// PMOVZXBD xmm xmm
//
// Construct and append a PMOVZXBD instruction to the active function.
// Operates on the global context.
func PMOVZXBD(mx, x operand.Op) { ctx.PMOVZXBD(mx, x) }
// PMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBQ m16 xmm
// PMOVZXBQ xmm xmm
//
// Construct and append a PMOVZXBQ instruction to the active function.
func (c *Context) PMOVZXBQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXBQ(mx, x))
}
// PMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBQ m16 xmm
// PMOVZXBQ xmm xmm
//
// Construct and append a PMOVZXBQ instruction to the active function.
// Operates on the global context.
func PMOVZXBQ(mx, x operand.Op) { ctx.PMOVZXBQ(mx, x) }
// PMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBW m64 xmm
// PMOVZXBW xmm xmm
//
// Construct and append a PMOVZXBW instruction to the active function.
func (c *Context) PMOVZXBW(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXBW(mx, x))
}
// PMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBW m64 xmm
// PMOVZXBW xmm xmm
//
// Construct and append a PMOVZXBW instruction to the active function.
// Operates on the global context.
func PMOVZXBW(mx, x operand.Op) { ctx.PMOVZXBW(mx, x) }
// PMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXDQ m64 xmm
// PMOVZXDQ xmm xmm
//
// Construct and append a PMOVZXDQ instruction to the active function.
func (c *Context) PMOVZXDQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXDQ(mx, x))
}
// PMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXDQ m64 xmm
// PMOVZXDQ xmm xmm
//
// Construct and append a PMOVZXDQ instruction to the active function.
// Operates on the global context.
func PMOVZXDQ(mx, x operand.Op) { ctx.PMOVZXDQ(mx, x) }
// PMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWD m64 xmm
// PMOVZXWD xmm xmm
//
// Construct and append a PMOVZXWD instruction to the active function.
func (c *Context) PMOVZXWD(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXWD(mx, x))
}
// PMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWD m64 xmm
// PMOVZXWD xmm xmm
//
// Construct and append a PMOVZXWD instruction to the active function.
// Operates on the global context.
func PMOVZXWD(mx, x operand.Op) { ctx.PMOVZXWD(mx, x) }
// PMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWQ m32 xmm
// PMOVZXWQ xmm xmm
//
// Construct and append a PMOVZXWQ instruction to the active function.
func (c *Context) PMOVZXWQ(mx, x operand.Op) {
c.addinstruction(x86.PMOVZXWQ(mx, x))
}
// PMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWQ m32 xmm
// PMOVZXWQ xmm xmm
//
// Construct and append a PMOVZXWQ instruction to the active function.
// Operates on the global context.
func PMOVZXWQ(mx, x operand.Op) { ctx.PMOVZXWQ(mx, x) }
// PMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// PMULDQ m128 xmm
// PMULDQ xmm xmm
//
// Construct and append a PMULDQ instruction to the active function.
func (c *Context) PMULDQ(mx, x operand.Op) {
c.addinstruction(x86.PMULDQ(mx, x))
}
// PMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// PMULDQ m128 xmm
// PMULDQ xmm xmm
//
// Construct and append a PMULDQ instruction to the active function.
// Operates on the global context.
func PMULDQ(mx, x operand.Op) { ctx.PMULDQ(mx, x) }
// PMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// PMULHRSW m128 xmm
// PMULHRSW xmm xmm
//
// Construct and append a PMULHRSW instruction to the active function.
func (c *Context) PMULHRSW(mx, x operand.Op) {
c.addinstruction(x86.PMULHRSW(mx, x))
}
// PMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// PMULHRSW m128 xmm
// PMULHRSW xmm xmm
//
// Construct and append a PMULHRSW instruction to the active function.
// Operates on the global context.
func PMULHRSW(mx, x operand.Op) { ctx.PMULHRSW(mx, x) }
// PMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// PMULHUW m128 xmm
// PMULHUW xmm xmm
//
// Construct and append a PMULHUW instruction to the active function.
func (c *Context) PMULHUW(mx, x operand.Op) {
c.addinstruction(x86.PMULHUW(mx, x))
}
// PMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// PMULHUW m128 xmm
// PMULHUW xmm xmm
//
// Construct and append a PMULHUW instruction to the active function.
// Operates on the global context.
func PMULHUW(mx, x operand.Op) { ctx.PMULHUW(mx, x) }
// PMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// PMULHW m128 xmm
// PMULHW xmm xmm
//
// Construct and append a PMULHW instruction to the active function.
func (c *Context) PMULHW(mx, x operand.Op) {
c.addinstruction(x86.PMULHW(mx, x))
}
// PMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// PMULHW m128 xmm
// PMULHW xmm xmm
//
// Construct and append a PMULHW instruction to the active function.
// Operates on the global context.
func PMULHW(mx, x operand.Op) { ctx.PMULHW(mx, x) }
// PMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// PMULLD m128 xmm
// PMULLD xmm xmm
//
// Construct and append a PMULLD instruction to the active function.
func (c *Context) PMULLD(mx, x operand.Op) {
c.addinstruction(x86.PMULLD(mx, x))
}
// PMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// PMULLD m128 xmm
// PMULLD xmm xmm
//
// Construct and append a PMULLD instruction to the active function.
// Operates on the global context.
func PMULLD(mx, x operand.Op) { ctx.PMULLD(mx, x) }
// PMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// PMULLW m128 xmm
// PMULLW xmm xmm
//
// Construct and append a PMULLW instruction to the active function.
func (c *Context) PMULLW(mx, x operand.Op) {
c.addinstruction(x86.PMULLW(mx, x))
}
// PMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// PMULLW m128 xmm
// PMULLW xmm xmm
//
// Construct and append a PMULLW instruction to the active function.
// Operates on the global context.
func PMULLW(mx, x operand.Op) { ctx.PMULLW(mx, x) }
// PMULULQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMULULQ m128 xmm
// PMULULQ xmm xmm
//
// Construct and append a PMULULQ instruction to the active function.
func (c *Context) PMULULQ(mx, x operand.Op) {
c.addinstruction(x86.PMULULQ(mx, x))
}
// PMULULQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMULULQ m128 xmm
// PMULULQ xmm xmm
//
// Construct and append a PMULULQ instruction to the active function.
// Operates on the global context.
func PMULULQ(mx, x operand.Op) { ctx.PMULULQ(mx, x) }
// POPCNTL: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTL m32 r32
// POPCNTL r32 r32
//
// Construct and append a POPCNTL instruction to the active function.
func (c *Context) POPCNTL(mr, r operand.Op) {
c.addinstruction(x86.POPCNTL(mr, r))
}
// POPCNTL: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTL m32 r32
// POPCNTL r32 r32
//
// Construct and append a POPCNTL instruction to the active function.
// Operates on the global context.
func POPCNTL(mr, r operand.Op) { ctx.POPCNTL(mr, r) }
// POPCNTQ: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTQ m64 r64
// POPCNTQ r64 r64
//
// Construct and append a POPCNTQ instruction to the active function.
func (c *Context) POPCNTQ(mr, r operand.Op) {
c.addinstruction(x86.POPCNTQ(mr, r))
}
// POPCNTQ: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTQ m64 r64
// POPCNTQ r64 r64
//
// Construct and append a POPCNTQ instruction to the active function.
// Operates on the global context.
func POPCNTQ(mr, r operand.Op) { ctx.POPCNTQ(mr, r) }
// POPCNTW: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTW m16 r16
// POPCNTW r16 r16
//
// Construct and append a POPCNTW instruction to the active function.
func (c *Context) POPCNTW(mr, r operand.Op) {
c.addinstruction(x86.POPCNTW(mr, r))
}
// POPCNTW: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTW m16 r16
// POPCNTW r16 r16
//
// Construct and append a POPCNTW instruction to the active function.
// Operates on the global context.
func POPCNTW(mr, r operand.Op) { ctx.POPCNTW(mr, r) }
// POPQ: Pop a Value from the Stack.
//
// Forms:
//
// POPQ m64
// POPQ r64
//
// Construct and append a POPQ instruction to the active function.
func (c *Context) POPQ(mr operand.Op) {
c.addinstruction(x86.POPQ(mr))
}
// POPQ: Pop a Value from the Stack.
//
// Forms:
//
// POPQ m64
// POPQ r64
//
// Construct and append a POPQ instruction to the active function.
// Operates on the global context.
func POPQ(mr operand.Op) { ctx.POPQ(mr) }
// POPW: Pop a Value from the Stack.
//
// Forms:
//
// POPW m16
// POPW r16
//
// Construct and append a POPW instruction to the active function.
func (c *Context) POPW(mr operand.Op) {
c.addinstruction(x86.POPW(mr))
}
// POPW: Pop a Value from the Stack.
//
// Forms:
//
// POPW m16
// POPW r16
//
// Construct and append a POPW instruction to the active function.
// Operates on the global context.
func POPW(mr operand.Op) { ctx.POPW(mr) }
// POR: Packed Bitwise Logical OR.
//
// Forms:
//
// POR m128 xmm
// POR xmm xmm
//
// Construct and append a POR instruction to the active function.
func (c *Context) POR(mx, x operand.Op) {
c.addinstruction(x86.POR(mx, x))
}
// POR: Packed Bitwise Logical OR.
//
// Forms:
//
// POR m128 xmm
// POR xmm xmm
//
// Construct and append a POR instruction to the active function.
// Operates on the global context.
func POR(mx, x operand.Op) { ctx.POR(mx, x) }
// PREFETCHNTA: Prefetch Data Into Caches using NTA Hint.
//
// Forms:
//
// PREFETCHNTA m8
//
// Construct and append a PREFETCHNTA instruction to the active function.
func (c *Context) PREFETCHNTA(m operand.Op) {
c.addinstruction(x86.PREFETCHNTA(m))
}
// PREFETCHNTA: Prefetch Data Into Caches using NTA Hint.
//
// Forms:
//
// PREFETCHNTA m8
//
// Construct and append a PREFETCHNTA instruction to the active function.
// Operates on the global context.
func PREFETCHNTA(m operand.Op) { ctx.PREFETCHNTA(m) }
// PREFETCHT0: Prefetch Data Into Caches using T0 Hint.
//
// Forms:
//
// PREFETCHT0 m8
//
// Construct and append a PREFETCHT0 instruction to the active function.
func (c *Context) PREFETCHT0(m operand.Op) {
c.addinstruction(x86.PREFETCHT0(m))
}
// PREFETCHT0: Prefetch Data Into Caches using T0 Hint.
//
// Forms:
//
// PREFETCHT0 m8
//
// Construct and append a PREFETCHT0 instruction to the active function.
// Operates on the global context.
func PREFETCHT0(m operand.Op) { ctx.PREFETCHT0(m) }
// PREFETCHT1: Prefetch Data Into Caches using T1 Hint.
//
// Forms:
//
// PREFETCHT1 m8
//
// Construct and append a PREFETCHT1 instruction to the active function.
func (c *Context) PREFETCHT1(m operand.Op) {
c.addinstruction(x86.PREFETCHT1(m))
}
// PREFETCHT1: Prefetch Data Into Caches using T1 Hint.
//
// Forms:
//
// PREFETCHT1 m8
//
// Construct and append a PREFETCHT1 instruction to the active function.
// Operates on the global context.
func PREFETCHT1(m operand.Op) { ctx.PREFETCHT1(m) }
// PREFETCHT2: Prefetch Data Into Caches using T2 Hint.
//
// Forms:
//
// PREFETCHT2 m8
//
// Construct and append a PREFETCHT2 instruction to the active function.
func (c *Context) PREFETCHT2(m operand.Op) {
c.addinstruction(x86.PREFETCHT2(m))
}
// PREFETCHT2: Prefetch Data Into Caches using T2 Hint.
//
// Forms:
//
// PREFETCHT2 m8
//
// Construct and append a PREFETCHT2 instruction to the active function.
// Operates on the global context.
func PREFETCHT2(m operand.Op) { ctx.PREFETCHT2(m) }
// PSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// PSADBW m128 xmm
// PSADBW xmm xmm
//
// Construct and append a PSADBW instruction to the active function.
func (c *Context) PSADBW(mx, x operand.Op) {
c.addinstruction(x86.PSADBW(mx, x))
}
// PSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// PSADBW m128 xmm
// PSADBW xmm xmm
//
// Construct and append a PSADBW instruction to the active function.
// Operates on the global context.
func PSADBW(mx, x operand.Op) { ctx.PSADBW(mx, x) }
// PSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// PSHUFB m128 xmm
// PSHUFB xmm xmm
//
// Construct and append a PSHUFB instruction to the active function.
func (c *Context) PSHUFB(mx, x operand.Op) {
c.addinstruction(x86.PSHUFB(mx, x))
}
// PSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// PSHUFB m128 xmm
// PSHUFB xmm xmm
//
// Construct and append a PSHUFB instruction to the active function.
// Operates on the global context.
func PSHUFB(mx, x operand.Op) { ctx.PSHUFB(mx, x) }
// PSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFD imm8 m128 xmm
// PSHUFD imm8 xmm xmm
//
// Construct and append a PSHUFD instruction to the active function.
func (c *Context) PSHUFD(i, mx, x operand.Op) {
c.addinstruction(x86.PSHUFD(i, mx, x))
}
// PSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFD imm8 m128 xmm
// PSHUFD imm8 xmm xmm
//
// Construct and append a PSHUFD instruction to the active function.
// Operates on the global context.
func PSHUFD(i, mx, x operand.Op) { ctx.PSHUFD(i, mx, x) }
// PSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// PSHUFHW imm8 m128 xmm
// PSHUFHW imm8 xmm xmm
//
// Construct and append a PSHUFHW instruction to the active function.
func (c *Context) PSHUFHW(i, mx, x operand.Op) {
c.addinstruction(x86.PSHUFHW(i, mx, x))
}
// PSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// PSHUFHW imm8 m128 xmm
// PSHUFHW imm8 xmm xmm
//
// Construct and append a PSHUFHW instruction to the active function.
// Operates on the global context.
func PSHUFHW(i, mx, x operand.Op) { ctx.PSHUFHW(i, mx, x) }
// PSHUFL: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFL imm8 m128 xmm
// PSHUFL imm8 xmm xmm
//
// Construct and append a PSHUFL instruction to the active function.
func (c *Context) PSHUFL(i, mx, x operand.Op) {
c.addinstruction(x86.PSHUFL(i, mx, x))
}
// PSHUFL: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFL imm8 m128 xmm
// PSHUFL imm8 xmm xmm
//
// Construct and append a PSHUFL instruction to the active function.
// Operates on the global context.
func PSHUFL(i, mx, x operand.Op) { ctx.PSHUFL(i, mx, x) }
// PSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// PSHUFLW imm8 m128 xmm
// PSHUFLW imm8 xmm xmm
//
// Construct and append a PSHUFLW instruction to the active function.
func (c *Context) PSHUFLW(i, mx, x operand.Op) {
c.addinstruction(x86.PSHUFLW(i, mx, x))
}
// PSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// PSHUFLW imm8 m128 xmm
// PSHUFLW imm8 xmm xmm
//
// Construct and append a PSHUFLW instruction to the active function.
// Operates on the global context.
func PSHUFLW(i, mx, x operand.Op) { ctx.PSHUFLW(i, mx, x) }
// PSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// PSIGNB m128 xmm
// PSIGNB xmm xmm
//
// Construct and append a PSIGNB instruction to the active function.
func (c *Context) PSIGNB(mx, x operand.Op) {
c.addinstruction(x86.PSIGNB(mx, x))
}
// PSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// PSIGNB m128 xmm
// PSIGNB xmm xmm
//
// Construct and append a PSIGNB instruction to the active function.
// Operates on the global context.
func PSIGNB(mx, x operand.Op) { ctx.PSIGNB(mx, x) }
// PSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// PSIGND m128 xmm
// PSIGND xmm xmm
//
// Construct and append a PSIGND instruction to the active function.
func (c *Context) PSIGND(mx, x operand.Op) {
c.addinstruction(x86.PSIGND(mx, x))
}
// PSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// PSIGND m128 xmm
// PSIGND xmm xmm
//
// Construct and append a PSIGND instruction to the active function.
// Operates on the global context.
func PSIGND(mx, x operand.Op) { ctx.PSIGND(mx, x) }
// PSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// PSIGNW m128 xmm
// PSIGNW xmm xmm
//
// Construct and append a PSIGNW instruction to the active function.
func (c *Context) PSIGNW(mx, x operand.Op) {
c.addinstruction(x86.PSIGNW(mx, x))
}
// PSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// PSIGNW m128 xmm
// PSIGNW xmm xmm
//
// Construct and append a PSIGNW instruction to the active function.
// Operates on the global context.
func PSIGNW(mx, x operand.Op) { ctx.PSIGNW(mx, x) }
// PSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLDQ imm8 xmm
//
// Construct and append a PSLLDQ instruction to the active function.
func (c *Context) PSLLDQ(i, x operand.Op) {
c.addinstruction(x86.PSLLDQ(i, x))
}
// PSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLDQ imm8 xmm
//
// Construct and append a PSLLDQ instruction to the active function.
// Operates on the global context.
func PSLLDQ(i, x operand.Op) { ctx.PSLLDQ(i, x) }
// PSLLL: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// PSLLL imm8 xmm
// PSLLL m128 xmm
// PSLLL xmm xmm
//
// Construct and append a PSLLL instruction to the active function.
func (c *Context) PSLLL(imx, x operand.Op) {
c.addinstruction(x86.PSLLL(imx, x))
}
// PSLLL: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// PSLLL imm8 xmm
// PSLLL m128 xmm
// PSLLL xmm xmm
//
// Construct and append a PSLLL instruction to the active function.
// Operates on the global context.
func PSLLL(imx, x operand.Op) { ctx.PSLLL(imx, x) }
// PSLLO: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLO imm8 xmm
//
// Construct and append a PSLLO instruction to the active function.
func (c *Context) PSLLO(i, x operand.Op) {
c.addinstruction(x86.PSLLO(i, x))
}
// PSLLO: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLO imm8 xmm
//
// Construct and append a PSLLO instruction to the active function.
// Operates on the global context.
func PSLLO(i, x operand.Op) { ctx.PSLLO(i, x) }
// PSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// PSLLQ imm8 xmm
// PSLLQ m128 xmm
// PSLLQ xmm xmm
//
// Construct and append a PSLLQ instruction to the active function.
func (c *Context) PSLLQ(imx, x operand.Op) {
c.addinstruction(x86.PSLLQ(imx, x))
}
// PSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// PSLLQ imm8 xmm
// PSLLQ m128 xmm
// PSLLQ xmm xmm
//
// Construct and append a PSLLQ instruction to the active function.
// Operates on the global context.
func PSLLQ(imx, x operand.Op) { ctx.PSLLQ(imx, x) }
// PSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// PSLLW imm8 xmm
// PSLLW m128 xmm
// PSLLW xmm xmm
//
// Construct and append a PSLLW instruction to the active function.
func (c *Context) PSLLW(imx, x operand.Op) {
c.addinstruction(x86.PSLLW(imx, x))
}
// PSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// PSLLW imm8 xmm
// PSLLW m128 xmm
// PSLLW xmm xmm
//
// Construct and append a PSLLW instruction to the active function.
// Operates on the global context.
func PSLLW(imx, x operand.Op) { ctx.PSLLW(imx, x) }
// PSRAL: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// PSRAL imm8 xmm
// PSRAL m128 xmm
// PSRAL xmm xmm
//
// Construct and append a PSRAL instruction to the active function.
func (c *Context) PSRAL(imx, x operand.Op) {
c.addinstruction(x86.PSRAL(imx, x))
}
// PSRAL: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// PSRAL imm8 xmm
// PSRAL m128 xmm
// PSRAL xmm xmm
//
// Construct and append a PSRAL instruction to the active function.
// Operates on the global context.
func PSRAL(imx, x operand.Op) { ctx.PSRAL(imx, x) }
// PSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// PSRAW imm8 xmm
// PSRAW m128 xmm
// PSRAW xmm xmm
//
// Construct and append a PSRAW instruction to the active function.
func (c *Context) PSRAW(imx, x operand.Op) {
c.addinstruction(x86.PSRAW(imx, x))
}
// PSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// PSRAW imm8 xmm
// PSRAW m128 xmm
// PSRAW xmm xmm
//
// Construct and append a PSRAW instruction to the active function.
// Operates on the global context.
func PSRAW(imx, x operand.Op) { ctx.PSRAW(imx, x) }
// PSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLDQ imm8 xmm
//
// Construct and append a PSRLDQ instruction to the active function.
func (c *Context) PSRLDQ(i, x operand.Op) {
c.addinstruction(x86.PSRLDQ(i, x))
}
// PSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLDQ imm8 xmm
//
// Construct and append a PSRLDQ instruction to the active function.
// Operates on the global context.
func PSRLDQ(i, x operand.Op) { ctx.PSRLDQ(i, x) }
// PSRLL: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// PSRLL imm8 xmm
// PSRLL m128 xmm
// PSRLL xmm xmm
//
// Construct and append a PSRLL instruction to the active function.
func (c *Context) PSRLL(imx, x operand.Op) {
c.addinstruction(x86.PSRLL(imx, x))
}
// PSRLL: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// PSRLL imm8 xmm
// PSRLL m128 xmm
// PSRLL xmm xmm
//
// Construct and append a PSRLL instruction to the active function.
// Operates on the global context.
func PSRLL(imx, x operand.Op) { ctx.PSRLL(imx, x) }
// PSRLO: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLO imm8 xmm
//
// Construct and append a PSRLO instruction to the active function.
func (c *Context) PSRLO(i, x operand.Op) {
c.addinstruction(x86.PSRLO(i, x))
}
// PSRLO: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLO imm8 xmm
//
// Construct and append a PSRLO instruction to the active function.
// Operates on the global context.
func PSRLO(i, x operand.Op) { ctx.PSRLO(i, x) }
// PSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// PSRLQ imm8 xmm
// PSRLQ m128 xmm
// PSRLQ xmm xmm
//
// Construct and append a PSRLQ instruction to the active function.
func (c *Context) PSRLQ(imx, x operand.Op) {
c.addinstruction(x86.PSRLQ(imx, x))
}
// PSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// PSRLQ imm8 xmm
// PSRLQ m128 xmm
// PSRLQ xmm xmm
//
// Construct and append a PSRLQ instruction to the active function.
// Operates on the global context.
func PSRLQ(imx, x operand.Op) { ctx.PSRLQ(imx, x) }
// PSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// PSRLW imm8 xmm
// PSRLW m128 xmm
// PSRLW xmm xmm
//
// Construct and append a PSRLW instruction to the active function.
func (c *Context) PSRLW(imx, x operand.Op) {
c.addinstruction(x86.PSRLW(imx, x))
}
// PSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// PSRLW imm8 xmm
// PSRLW m128 xmm
// PSRLW xmm xmm
//
// Construct and append a PSRLW instruction to the active function.
// Operates on the global context.
func PSRLW(imx, x operand.Op) { ctx.PSRLW(imx, x) }
// PSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// PSUBB m128 xmm
// PSUBB xmm xmm
//
// Construct and append a PSUBB instruction to the active function.
func (c *Context) PSUBB(mx, x operand.Op) {
c.addinstruction(x86.PSUBB(mx, x))
}
// PSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// PSUBB m128 xmm
// PSUBB xmm xmm
//
// Construct and append a PSUBB instruction to the active function.
// Operates on the global context.
func PSUBB(mx, x operand.Op) { ctx.PSUBB(mx, x) }
// PSUBL: Subtract Packed Doubleword Integers.
//
// Forms:
//
// PSUBL m128 xmm
// PSUBL xmm xmm
//
// Construct and append a PSUBL instruction to the active function.
func (c *Context) PSUBL(mx, x operand.Op) {
c.addinstruction(x86.PSUBL(mx, x))
}
// PSUBL: Subtract Packed Doubleword Integers.
//
// Forms:
//
// PSUBL m128 xmm
// PSUBL xmm xmm
//
// Construct and append a PSUBL instruction to the active function.
// Operates on the global context.
func PSUBL(mx, x operand.Op) { ctx.PSUBL(mx, x) }
// PSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// PSUBQ m128 xmm
// PSUBQ xmm xmm
//
// Construct and append a PSUBQ instruction to the active function.
func (c *Context) PSUBQ(mx, x operand.Op) {
c.addinstruction(x86.PSUBQ(mx, x))
}
// PSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// PSUBQ m128 xmm
// PSUBQ xmm xmm
//
// Construct and append a PSUBQ instruction to the active function.
// Operates on the global context.
func PSUBQ(mx, x operand.Op) { ctx.PSUBQ(mx, x) }
// PSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PSUBSB m128 xmm
// PSUBSB xmm xmm
//
// Construct and append a PSUBSB instruction to the active function.
func (c *Context) PSUBSB(mx, x operand.Op) {
c.addinstruction(x86.PSUBSB(mx, x))
}
// PSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PSUBSB m128 xmm
// PSUBSB xmm xmm
//
// Construct and append a PSUBSB instruction to the active function.
// Operates on the global context.
func PSUBSB(mx, x operand.Op) { ctx.PSUBSB(mx, x) }
// PSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PSUBSW m128 xmm
// PSUBSW xmm xmm
//
// Construct and append a PSUBSW instruction to the active function.
func (c *Context) PSUBSW(mx, x operand.Op) {
c.addinstruction(x86.PSUBSW(mx, x))
}
// PSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PSUBSW m128 xmm
// PSUBSW xmm xmm
//
// Construct and append a PSUBSW instruction to the active function.
// Operates on the global context.
func PSUBSW(mx, x operand.Op) { ctx.PSUBSW(mx, x) }
// PSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSB m128 xmm
// PSUBUSB xmm xmm
//
// Construct and append a PSUBUSB instruction to the active function.
func (c *Context) PSUBUSB(mx, x operand.Op) {
c.addinstruction(x86.PSUBUSB(mx, x))
}
// PSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSB m128 xmm
// PSUBUSB xmm xmm
//
// Construct and append a PSUBUSB instruction to the active function.
// Operates on the global context.
func PSUBUSB(mx, x operand.Op) { ctx.PSUBUSB(mx, x) }
// PSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSW m128 xmm
// PSUBUSW xmm xmm
//
// Construct and append a PSUBUSW instruction to the active function.
func (c *Context) PSUBUSW(mx, x operand.Op) {
c.addinstruction(x86.PSUBUSW(mx, x))
}
// PSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSW m128 xmm
// PSUBUSW xmm xmm
//
// Construct and append a PSUBUSW instruction to the active function.
// Operates on the global context.
func PSUBUSW(mx, x operand.Op) { ctx.PSUBUSW(mx, x) }
// PSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// PSUBW m128 xmm
// PSUBW xmm xmm
//
// Construct and append a PSUBW instruction to the active function.
func (c *Context) PSUBW(mx, x operand.Op) {
c.addinstruction(x86.PSUBW(mx, x))
}
// PSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// PSUBW m128 xmm
// PSUBW xmm xmm
//
// Construct and append a PSUBW instruction to the active function.
// Operates on the global context.
func PSUBW(mx, x operand.Op) { ctx.PSUBW(mx, x) }
// PTEST: Packed Logical Compare.
//
// Forms:
//
// PTEST m128 xmm
// PTEST xmm xmm
//
// Construct and append a PTEST instruction to the active function.
func (c *Context) PTEST(mx, x operand.Op) {
c.addinstruction(x86.PTEST(mx, x))
}
// PTEST: Packed Logical Compare.
//
// Forms:
//
// PTEST m128 xmm
// PTEST xmm xmm
//
// Construct and append a PTEST instruction to the active function.
// Operates on the global context.
func PTEST(mx, x operand.Op) { ctx.PTEST(mx, x) }
// PUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// PUNPCKHBW m128 xmm
// PUNPCKHBW xmm xmm
//
// Construct and append a PUNPCKHBW instruction to the active function.
func (c *Context) PUNPCKHBW(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKHBW(mx, x))
}
// PUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// PUNPCKHBW m128 xmm
// PUNPCKHBW xmm xmm
//
// Construct and append a PUNPCKHBW instruction to the active function.
// Operates on the global context.
func PUNPCKHBW(mx, x operand.Op) { ctx.PUNPCKHBW(mx, x) }
// PUNPCKHLQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKHLQ m128 xmm
// PUNPCKHLQ xmm xmm
//
// Construct and append a PUNPCKHLQ instruction to the active function.
func (c *Context) PUNPCKHLQ(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKHLQ(mx, x))
}
// PUNPCKHLQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKHLQ m128 xmm
// PUNPCKHLQ xmm xmm
//
// Construct and append a PUNPCKHLQ instruction to the active function.
// Operates on the global context.
func PUNPCKHLQ(mx, x operand.Op) { ctx.PUNPCKHLQ(mx, x) }
// PUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKHQDQ m128 xmm
// PUNPCKHQDQ xmm xmm
//
// Construct and append a PUNPCKHQDQ instruction to the active function.
func (c *Context) PUNPCKHQDQ(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKHQDQ(mx, x))
}
// PUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKHQDQ m128 xmm
// PUNPCKHQDQ xmm xmm
//
// Construct and append a PUNPCKHQDQ instruction to the active function.
// Operates on the global context.
func PUNPCKHQDQ(mx, x operand.Op) { ctx.PUNPCKHQDQ(mx, x) }
// PUNPCKHWL: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKHWL m128 xmm
// PUNPCKHWL xmm xmm
//
// Construct and append a PUNPCKHWL instruction to the active function.
func (c *Context) PUNPCKHWL(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKHWL(mx, x))
}
// PUNPCKHWL: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKHWL m128 xmm
// PUNPCKHWL xmm xmm
//
// Construct and append a PUNPCKHWL instruction to the active function.
// Operates on the global context.
func PUNPCKHWL(mx, x operand.Op) { ctx.PUNPCKHWL(mx, x) }
// PUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// PUNPCKLBW m128 xmm
// PUNPCKLBW xmm xmm
//
// Construct and append a PUNPCKLBW instruction to the active function.
func (c *Context) PUNPCKLBW(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKLBW(mx, x))
}
// PUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// PUNPCKLBW m128 xmm
// PUNPCKLBW xmm xmm
//
// Construct and append a PUNPCKLBW instruction to the active function.
// Operates on the global context.
func PUNPCKLBW(mx, x operand.Op) { ctx.PUNPCKLBW(mx, x) }
// PUNPCKLLQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKLLQ m128 xmm
// PUNPCKLLQ xmm xmm
//
// Construct and append a PUNPCKLLQ instruction to the active function.
func (c *Context) PUNPCKLLQ(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKLLQ(mx, x))
}
// PUNPCKLLQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKLLQ m128 xmm
// PUNPCKLLQ xmm xmm
//
// Construct and append a PUNPCKLLQ instruction to the active function.
// Operates on the global context.
func PUNPCKLLQ(mx, x operand.Op) { ctx.PUNPCKLLQ(mx, x) }
// PUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKLQDQ m128 xmm
// PUNPCKLQDQ xmm xmm
//
// Construct and append a PUNPCKLQDQ instruction to the active function.
func (c *Context) PUNPCKLQDQ(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKLQDQ(mx, x))
}
// PUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKLQDQ m128 xmm
// PUNPCKLQDQ xmm xmm
//
// Construct and append a PUNPCKLQDQ instruction to the active function.
// Operates on the global context.
func PUNPCKLQDQ(mx, x operand.Op) { ctx.PUNPCKLQDQ(mx, x) }
// PUNPCKLWL: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKLWL m128 xmm
// PUNPCKLWL xmm xmm
//
// Construct and append a PUNPCKLWL instruction to the active function.
func (c *Context) PUNPCKLWL(mx, x operand.Op) {
c.addinstruction(x86.PUNPCKLWL(mx, x))
}
// PUNPCKLWL: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKLWL m128 xmm
// PUNPCKLWL xmm xmm
//
// Construct and append a PUNPCKLWL instruction to the active function.
// Operates on the global context.
func PUNPCKLWL(mx, x operand.Op) { ctx.PUNPCKLWL(mx, x) }
// PUSHQ: Push Value Onto the Stack.
//
// Forms:
//
// PUSHQ imm32
// PUSHQ imm8
// PUSHQ m64
// PUSHQ r64
//
// Construct and append a PUSHQ instruction to the active function.
func (c *Context) PUSHQ(imr operand.Op) {
c.addinstruction(x86.PUSHQ(imr))
}
// PUSHQ: Push Value Onto the Stack.
//
// Forms:
//
// PUSHQ imm32
// PUSHQ imm8
// PUSHQ m64
// PUSHQ r64
//
// Construct and append a PUSHQ instruction to the active function.
// Operates on the global context.
func PUSHQ(imr operand.Op) { ctx.PUSHQ(imr) }
// PUSHW: Push Value Onto the Stack.
//
// Forms:
//
// PUSHW m16
// PUSHW r16
//
// Construct and append a PUSHW instruction to the active function.
func (c *Context) PUSHW(mr operand.Op) {
c.addinstruction(x86.PUSHW(mr))
}
// PUSHW: Push Value Onto the Stack.
//
// Forms:
//
// PUSHW m16
// PUSHW r16
//
// Construct and append a PUSHW instruction to the active function.
// Operates on the global context.
func PUSHW(mr operand.Op) { ctx.PUSHW(mr) }
// PXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// PXOR m128 xmm
// PXOR xmm xmm
//
// Construct and append a PXOR instruction to the active function.
func (c *Context) PXOR(mx, x operand.Op) {
c.addinstruction(x86.PXOR(mx, x))
}
// PXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// PXOR m128 xmm
// PXOR xmm xmm
//
// Construct and append a PXOR instruction to the active function.
// Operates on the global context.
func PXOR(mx, x operand.Op) { ctx.PXOR(mx, x) }
// RCLB: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLB 1 m8
// RCLB 1 r8
// RCLB cl m8
// RCLB cl r8
// RCLB imm8 m8
// RCLB imm8 r8
//
// Construct and append a RCLB instruction to the active function.
func (c *Context) RCLB(ci, mr operand.Op) {
c.addinstruction(x86.RCLB(ci, mr))
}
// RCLB: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLB 1 m8
// RCLB 1 r8
// RCLB cl m8
// RCLB cl r8
// RCLB imm8 m8
// RCLB imm8 r8
//
// Construct and append a RCLB instruction to the active function.
// Operates on the global context.
func RCLB(ci, mr operand.Op) { ctx.RCLB(ci, mr) }
// RCLL: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLL 1 m32
// RCLL 1 r32
// RCLL cl m32
// RCLL cl r32
// RCLL imm8 m32
// RCLL imm8 r32
//
// Construct and append a RCLL instruction to the active function.
func (c *Context) RCLL(ci, mr operand.Op) {
c.addinstruction(x86.RCLL(ci, mr))
}
// RCLL: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLL 1 m32
// RCLL 1 r32
// RCLL cl m32
// RCLL cl r32
// RCLL imm8 m32
// RCLL imm8 r32
//
// Construct and append a RCLL instruction to the active function.
// Operates on the global context.
func RCLL(ci, mr operand.Op) { ctx.RCLL(ci, mr) }
// RCLQ: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLQ 1 m64
// RCLQ 1 r64
// RCLQ cl m64
// RCLQ cl r64
// RCLQ imm8 m64
// RCLQ imm8 r64
//
// Construct and append a RCLQ instruction to the active function.
func (c *Context) RCLQ(ci, mr operand.Op) {
c.addinstruction(x86.RCLQ(ci, mr))
}
// RCLQ: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLQ 1 m64
// RCLQ 1 r64
// RCLQ cl m64
// RCLQ cl r64
// RCLQ imm8 m64
// RCLQ imm8 r64
//
// Construct and append a RCLQ instruction to the active function.
// Operates on the global context.
func RCLQ(ci, mr operand.Op) { ctx.RCLQ(ci, mr) }
// RCLW: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLW 1 m16
// RCLW 1 r16
// RCLW cl m16
// RCLW cl r16
// RCLW imm8 m16
// RCLW imm8 r16
//
// Construct and append a RCLW instruction to the active function.
func (c *Context) RCLW(ci, mr operand.Op) {
c.addinstruction(x86.RCLW(ci, mr))
}
// RCLW: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLW 1 m16
// RCLW 1 r16
// RCLW cl m16
// RCLW cl r16
// RCLW imm8 m16
// RCLW imm8 r16
//
// Construct and append a RCLW instruction to the active function.
// Operates on the global context.
func RCLW(ci, mr operand.Op) { ctx.RCLW(ci, mr) }
// RCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPPS m128 xmm
// RCPPS xmm xmm
//
// Construct and append a RCPPS instruction to the active function.
func (c *Context) RCPPS(mx, x operand.Op) {
c.addinstruction(x86.RCPPS(mx, x))
}
// RCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPPS m128 xmm
// RCPPS xmm xmm
//
// Construct and append a RCPPS instruction to the active function.
// Operates on the global context.
func RCPPS(mx, x operand.Op) { ctx.RCPPS(mx, x) }
// RCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPSS m32 xmm
// RCPSS xmm xmm
//
// Construct and append a RCPSS instruction to the active function.
func (c *Context) RCPSS(mx, x operand.Op) {
c.addinstruction(x86.RCPSS(mx, x))
}
// RCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPSS m32 xmm
// RCPSS xmm xmm
//
// Construct and append a RCPSS instruction to the active function.
// Operates on the global context.
func RCPSS(mx, x operand.Op) { ctx.RCPSS(mx, x) }
// RCRB: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRB 1 m8
// RCRB 1 r8
// RCRB cl m8
// RCRB cl r8
// RCRB imm8 m8
// RCRB imm8 r8
//
// Construct and append a RCRB instruction to the active function.
func (c *Context) RCRB(ci, mr operand.Op) {
c.addinstruction(x86.RCRB(ci, mr))
}
// RCRB: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRB 1 m8
// RCRB 1 r8
// RCRB cl m8
// RCRB cl r8
// RCRB imm8 m8
// RCRB imm8 r8
//
// Construct and append a RCRB instruction to the active function.
// Operates on the global context.
func RCRB(ci, mr operand.Op) { ctx.RCRB(ci, mr) }
// RCRL: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRL 1 m32
// RCRL 1 r32
// RCRL cl m32
// RCRL cl r32
// RCRL imm8 m32
// RCRL imm8 r32
//
// Construct and append a RCRL instruction to the active function.
func (c *Context) RCRL(ci, mr operand.Op) {
c.addinstruction(x86.RCRL(ci, mr))
}
// RCRL: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRL 1 m32
// RCRL 1 r32
// RCRL cl m32
// RCRL cl r32
// RCRL imm8 m32
// RCRL imm8 r32
//
// Construct and append a RCRL instruction to the active function.
// Operates on the global context.
func RCRL(ci, mr operand.Op) { ctx.RCRL(ci, mr) }
// RCRQ: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRQ 1 m64
// RCRQ 1 r64
// RCRQ cl m64
// RCRQ cl r64
// RCRQ imm8 m64
// RCRQ imm8 r64
//
// Construct and append a RCRQ instruction to the active function.
func (c *Context) RCRQ(ci, mr operand.Op) {
c.addinstruction(x86.RCRQ(ci, mr))
}
// RCRQ: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRQ 1 m64
// RCRQ 1 r64
// RCRQ cl m64
// RCRQ cl r64
// RCRQ imm8 m64
// RCRQ imm8 r64
//
// Construct and append a RCRQ instruction to the active function.
// Operates on the global context.
func RCRQ(ci, mr operand.Op) { ctx.RCRQ(ci, mr) }
// RCRW: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRW 1 m16
// RCRW 1 r16
// RCRW cl m16
// RCRW cl r16
// RCRW imm8 m16
// RCRW imm8 r16
//
// Construct and append a RCRW instruction to the active function.
func (c *Context) RCRW(ci, mr operand.Op) {
c.addinstruction(x86.RCRW(ci, mr))
}
// RCRW: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRW 1 m16
// RCRW 1 r16
// RCRW cl m16
// RCRW cl r16
// RCRW imm8 m16
// RCRW imm8 r16
//
// Construct and append a RCRW instruction to the active function.
// Operates on the global context.
func RCRW(ci, mr operand.Op) { ctx.RCRW(ci, mr) }
// RDRANDL: Read Random Number.
//
// Forms:
//
// RDRANDL r16
// RDRANDL r32
// RDRANDL r64
//
// Construct and append a RDRANDL instruction to the active function.
func (c *Context) RDRANDL(r operand.Op) {
c.addinstruction(x86.RDRANDL(r))
}
// RDRANDL: Read Random Number.
//
// Forms:
//
// RDRANDL r16
// RDRANDL r32
// RDRANDL r64
//
// Construct and append a RDRANDL instruction to the active function.
// Operates on the global context.
func RDRANDL(r operand.Op) { ctx.RDRANDL(r) }
// RDSEEDL: Read Random SEED.
//
// Forms:
//
// RDSEEDL r16
// RDSEEDL r32
// RDSEEDL r64
//
// Construct and append a RDSEEDL instruction to the active function.
func (c *Context) RDSEEDL(r operand.Op) {
c.addinstruction(x86.RDSEEDL(r))
}
// RDSEEDL: Read Random SEED.
//
// Forms:
//
// RDSEEDL r16
// RDSEEDL r32
// RDSEEDL r64
//
// Construct and append a RDSEEDL instruction to the active function.
// Operates on the global context.
func RDSEEDL(r operand.Op) { ctx.RDSEEDL(r) }
// RDTSC: Read Time-Stamp Counter.
//
// Forms:
//
// RDTSC
//
// Construct and append a RDTSC instruction to the active function.
func (c *Context) RDTSC() {
c.addinstruction(x86.RDTSC())
}
// RDTSC: Read Time-Stamp Counter.
//
// Forms:
//
// RDTSC
//
// Construct and append a RDTSC instruction to the active function.
// Operates on the global context.
func RDTSC() { ctx.RDTSC() }
// RDTSCP: Read Time-Stamp Counter and Processor ID.
//
// Forms:
//
// RDTSCP
//
// Construct and append a RDTSCP instruction to the active function.
func (c *Context) RDTSCP() {
c.addinstruction(x86.RDTSCP())
}
// RDTSCP: Read Time-Stamp Counter and Processor ID.
//
// Forms:
//
// RDTSCP
//
// Construct and append a RDTSCP instruction to the active function.
// Operates on the global context.
func RDTSCP() { ctx.RDTSCP() }
// RET: Return from Procedure.
//
// Forms:
//
// RET
//
// Construct and append a RET instruction to the active function.
func (c *Context) RET() {
c.addinstruction(x86.RET())
}
// RET: Return from Procedure.
//
// Forms:
//
// RET
//
// Construct and append a RET instruction to the active function.
// Operates on the global context.
func RET() { ctx.RET() }
// RETFL: Return from Procedure.
//
// Forms:
//
// RETFL imm16
//
// Construct and append a RETFL instruction to the active function.
func (c *Context) RETFL(i operand.Op) {
c.addinstruction(x86.RETFL(i))
}
// RETFL: Return from Procedure.
//
// Forms:
//
// RETFL imm16
//
// Construct and append a RETFL instruction to the active function.
// Operates on the global context.
func RETFL(i operand.Op) { ctx.RETFL(i) }
// RETFQ: Return from Procedure.
//
// Forms:
//
// RETFQ imm16
//
// Construct and append a RETFQ instruction to the active function.
func (c *Context) RETFQ(i operand.Op) {
c.addinstruction(x86.RETFQ(i))
}
// RETFQ: Return from Procedure.
//
// Forms:
//
// RETFQ imm16
//
// Construct and append a RETFQ instruction to the active function.
// Operates on the global context.
func RETFQ(i operand.Op) { ctx.RETFQ(i) }
// RETFW: Return from Procedure.
//
// Forms:
//
// RETFW imm16
//
// Construct and append a RETFW instruction to the active function.
func (c *Context) RETFW(i operand.Op) {
c.addinstruction(x86.RETFW(i))
}
// RETFW: Return from Procedure.
//
// Forms:
//
// RETFW imm16
//
// Construct and append a RETFW instruction to the active function.
// Operates on the global context.
func RETFW(i operand.Op) { ctx.RETFW(i) }
// ROLB: Rotate Left.
//
// Forms:
//
// ROLB 1 m8
// ROLB 1 r8
// ROLB cl m8
// ROLB cl r8
// ROLB imm8 m8
// ROLB imm8 r8
//
// Construct and append a ROLB instruction to the active function.
func (c *Context) ROLB(ci, mr operand.Op) {
c.addinstruction(x86.ROLB(ci, mr))
}
// ROLB: Rotate Left.
//
// Forms:
//
// ROLB 1 m8
// ROLB 1 r8
// ROLB cl m8
// ROLB cl r8
// ROLB imm8 m8
// ROLB imm8 r8
//
// Construct and append a ROLB instruction to the active function.
// Operates on the global context.
func ROLB(ci, mr operand.Op) { ctx.ROLB(ci, mr) }
// ROLL: Rotate Left.
//
// Forms:
//
// ROLL 1 m32
// ROLL 1 r32
// ROLL cl m32
// ROLL cl r32
// ROLL imm8 m32
// ROLL imm8 r32
//
// Construct and append a ROLL instruction to the active function.
func (c *Context) ROLL(ci, mr operand.Op) {
c.addinstruction(x86.ROLL(ci, mr))
}
// ROLL: Rotate Left.
//
// Forms:
//
// ROLL 1 m32
// ROLL 1 r32
// ROLL cl m32
// ROLL cl r32
// ROLL imm8 m32
// ROLL imm8 r32
//
// Construct and append a ROLL instruction to the active function.
// Operates on the global context.
func ROLL(ci, mr operand.Op) { ctx.ROLL(ci, mr) }
// ROLQ: Rotate Left.
//
// Forms:
//
// ROLQ 1 m64
// ROLQ 1 r64
// ROLQ cl m64
// ROLQ cl r64
// ROLQ imm8 m64
// ROLQ imm8 r64
//
// Construct and append a ROLQ instruction to the active function.
func (c *Context) ROLQ(ci, mr operand.Op) {
c.addinstruction(x86.ROLQ(ci, mr))
}
// ROLQ: Rotate Left.
//
// Forms:
//
// ROLQ 1 m64
// ROLQ 1 r64
// ROLQ cl m64
// ROLQ cl r64
// ROLQ imm8 m64
// ROLQ imm8 r64
//
// Construct and append a ROLQ instruction to the active function.
// Operates on the global context.
func ROLQ(ci, mr operand.Op) { ctx.ROLQ(ci, mr) }
// ROLW: Rotate Left.
//
// Forms:
//
// ROLW 1 m16
// ROLW 1 r16
// ROLW cl m16
// ROLW cl r16
// ROLW imm8 m16
// ROLW imm8 r16
//
// Construct and append a ROLW instruction to the active function.
func (c *Context) ROLW(ci, mr operand.Op) {
c.addinstruction(x86.ROLW(ci, mr))
}
// ROLW: Rotate Left.
//
// Forms:
//
// ROLW 1 m16
// ROLW 1 r16
// ROLW cl m16
// ROLW cl r16
// ROLW imm8 m16
// ROLW imm8 r16
//
// Construct and append a ROLW instruction to the active function.
// Operates on the global context.
func ROLW(ci, mr operand.Op) { ctx.ROLW(ci, mr) }
// RORB: Rotate Right.
//
// Forms:
//
// RORB 1 m8
// RORB 1 r8
// RORB cl m8
// RORB cl r8
// RORB imm8 m8
// RORB imm8 r8
//
// Construct and append a RORB instruction to the active function.
func (c *Context) RORB(ci, mr operand.Op) {
c.addinstruction(x86.RORB(ci, mr))
}
// RORB: Rotate Right.
//
// Forms:
//
// RORB 1 m8
// RORB 1 r8
// RORB cl m8
// RORB cl r8
// RORB imm8 m8
// RORB imm8 r8
//
// Construct and append a RORB instruction to the active function.
// Operates on the global context.
func RORB(ci, mr operand.Op) { ctx.RORB(ci, mr) }
// RORL: Rotate Right.
//
// Forms:
//
// RORL 1 m32
// RORL 1 r32
// RORL cl m32
// RORL cl r32
// RORL imm8 m32
// RORL imm8 r32
//
// Construct and append a RORL instruction to the active function.
func (c *Context) RORL(ci, mr operand.Op) {
c.addinstruction(x86.RORL(ci, mr))
}
// RORL: Rotate Right.
//
// Forms:
//
// RORL 1 m32
// RORL 1 r32
// RORL cl m32
// RORL cl r32
// RORL imm8 m32
// RORL imm8 r32
//
// Construct and append a RORL instruction to the active function.
// Operates on the global context.
func RORL(ci, mr operand.Op) { ctx.RORL(ci, mr) }
// RORQ: Rotate Right.
//
// Forms:
//
// RORQ 1 m64
// RORQ 1 r64
// RORQ cl m64
// RORQ cl r64
// RORQ imm8 m64
// RORQ imm8 r64
//
// Construct and append a RORQ instruction to the active function.
func (c *Context) RORQ(ci, mr operand.Op) {
c.addinstruction(x86.RORQ(ci, mr))
}
// RORQ: Rotate Right.
//
// Forms:
//
// RORQ 1 m64
// RORQ 1 r64
// RORQ cl m64
// RORQ cl r64
// RORQ imm8 m64
// RORQ imm8 r64
//
// Construct and append a RORQ instruction to the active function.
// Operates on the global context.
func RORQ(ci, mr operand.Op) { ctx.RORQ(ci, mr) }
// RORW: Rotate Right.
//
// Forms:
//
// RORW 1 m16
// RORW 1 r16
// RORW cl m16
// RORW cl r16
// RORW imm8 m16
// RORW imm8 r16
//
// Construct and append a RORW instruction to the active function.
func (c *Context) RORW(ci, mr operand.Op) {
c.addinstruction(x86.RORW(ci, mr))
}
// RORW: Rotate Right.
//
// Forms:
//
// RORW 1 m16
// RORW 1 r16
// RORW cl m16
// RORW cl r16
// RORW imm8 m16
// RORW imm8 r16
//
// Construct and append a RORW instruction to the active function.
// Operates on the global context.
func RORW(ci, mr operand.Op) { ctx.RORW(ci, mr) }
// RORXL: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXL imm8 m32 r32
// RORXL imm8 r32 r32
//
// Construct and append a RORXL instruction to the active function.
func (c *Context) RORXL(i, mr, r operand.Op) {
c.addinstruction(x86.RORXL(i, mr, r))
}
// RORXL: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXL imm8 m32 r32
// RORXL imm8 r32 r32
//
// Construct and append a RORXL instruction to the active function.
// Operates on the global context.
func RORXL(i, mr, r operand.Op) { ctx.RORXL(i, mr, r) }
// RORXQ: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXQ imm8 m64 r64
// RORXQ imm8 r64 r64
//
// Construct and append a RORXQ instruction to the active function.
func (c *Context) RORXQ(i, mr, r operand.Op) {
c.addinstruction(x86.RORXQ(i, mr, r))
}
// RORXQ: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXQ imm8 m64 r64
// RORXQ imm8 r64 r64
//
// Construct and append a RORXQ instruction to the active function.
// Operates on the global context.
func RORXQ(i, mr, r operand.Op) { ctx.RORXQ(i, mr, r) }
// ROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPD imm8 m128 xmm
// ROUNDPD imm8 xmm xmm
//
// Construct and append a ROUNDPD instruction to the active function.
func (c *Context) ROUNDPD(i, mx, x operand.Op) {
c.addinstruction(x86.ROUNDPD(i, mx, x))
}
// ROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPD imm8 m128 xmm
// ROUNDPD imm8 xmm xmm
//
// Construct and append a ROUNDPD instruction to the active function.
// Operates on the global context.
func ROUNDPD(i, mx, x operand.Op) { ctx.ROUNDPD(i, mx, x) }
// ROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPS imm8 m128 xmm
// ROUNDPS imm8 xmm xmm
//
// Construct and append a ROUNDPS instruction to the active function.
func (c *Context) ROUNDPS(i, mx, x operand.Op) {
c.addinstruction(x86.ROUNDPS(i, mx, x))
}
// ROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPS imm8 m128 xmm
// ROUNDPS imm8 xmm xmm
//
// Construct and append a ROUNDPS instruction to the active function.
// Operates on the global context.
func ROUNDPS(i, mx, x operand.Op) { ctx.ROUNDPS(i, mx, x) }
// ROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSD imm8 m64 xmm
// ROUNDSD imm8 xmm xmm
//
// Construct and append a ROUNDSD instruction to the active function.
func (c *Context) ROUNDSD(i, mx, x operand.Op) {
c.addinstruction(x86.ROUNDSD(i, mx, x))
}
// ROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSD imm8 m64 xmm
// ROUNDSD imm8 xmm xmm
//
// Construct and append a ROUNDSD instruction to the active function.
// Operates on the global context.
func ROUNDSD(i, mx, x operand.Op) { ctx.ROUNDSD(i, mx, x) }
// ROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSS imm8 m32 xmm
// ROUNDSS imm8 xmm xmm
//
// Construct and append a ROUNDSS instruction to the active function.
func (c *Context) ROUNDSS(i, mx, x operand.Op) {
c.addinstruction(x86.ROUNDSS(i, mx, x))
}
// ROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSS imm8 m32 xmm
// ROUNDSS imm8 xmm xmm
//
// Construct and append a ROUNDSS instruction to the active function.
// Operates on the global context.
func ROUNDSS(i, mx, x operand.Op) { ctx.ROUNDSS(i, mx, x) }
// RSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RSQRTPS m128 xmm
// RSQRTPS xmm xmm
//
// Construct and append a RSQRTPS instruction to the active function.
func (c *Context) RSQRTPS(mx, x operand.Op) {
c.addinstruction(x86.RSQRTPS(mx, x))
}
// RSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RSQRTPS m128 xmm
// RSQRTPS xmm xmm
//
// Construct and append a RSQRTPS instruction to the active function.
// Operates on the global context.
func RSQRTPS(mx, x operand.Op) { ctx.RSQRTPS(mx, x) }
// RSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// RSQRTSS m32 xmm
// RSQRTSS xmm xmm
//
// Construct and append a RSQRTSS instruction to the active function.
func (c *Context) RSQRTSS(mx, x operand.Op) {
c.addinstruction(x86.RSQRTSS(mx, x))
}
// RSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// RSQRTSS m32 xmm
// RSQRTSS xmm xmm
//
// Construct and append a RSQRTSS instruction to the active function.
// Operates on the global context.
func RSQRTSS(mx, x operand.Op) { ctx.RSQRTSS(mx, x) }
// SALB: Arithmetic Shift Left.
//
// Forms:
//
// SALB 1 m8
// SALB 1 r8
// SALB cl m8
// SALB cl r8
// SALB imm8 m8
// SALB imm8 r8
//
// Construct and append a SALB instruction to the active function.
func (c *Context) SALB(ci, mr operand.Op) {
c.addinstruction(x86.SALB(ci, mr))
}
// SALB: Arithmetic Shift Left.
//
// Forms:
//
// SALB 1 m8
// SALB 1 r8
// SALB cl m8
// SALB cl r8
// SALB imm8 m8
// SALB imm8 r8
//
// Construct and append a SALB instruction to the active function.
// Operates on the global context.
func SALB(ci, mr operand.Op) { ctx.SALB(ci, mr) }
// SALL: Arithmetic Shift Left.
//
// Forms:
//
// SALL 1 m32
// SALL 1 r32
// SALL cl m32
// SALL cl r32
// SALL imm8 m32
// SALL imm8 r32
//
// Construct and append a SALL instruction to the active function.
func (c *Context) SALL(ci, mr operand.Op) {
c.addinstruction(x86.SALL(ci, mr))
}
// SALL: Arithmetic Shift Left.
//
// Forms:
//
// SALL 1 m32
// SALL 1 r32
// SALL cl m32
// SALL cl r32
// SALL imm8 m32
// SALL imm8 r32
//
// Construct and append a SALL instruction to the active function.
// Operates on the global context.
func SALL(ci, mr operand.Op) { ctx.SALL(ci, mr) }
// SALQ: Arithmetic Shift Left.
//
// Forms:
//
// SALQ 1 m64
// SALQ 1 r64
// SALQ cl m64
// SALQ cl r64
// SALQ imm8 m64
// SALQ imm8 r64
//
// Construct and append a SALQ instruction to the active function.
func (c *Context) SALQ(ci, mr operand.Op) {
c.addinstruction(x86.SALQ(ci, mr))
}
// SALQ: Arithmetic Shift Left.
//
// Forms:
//
// SALQ 1 m64
// SALQ 1 r64
// SALQ cl m64
// SALQ cl r64
// SALQ imm8 m64
// SALQ imm8 r64
//
// Construct and append a SALQ instruction to the active function.
// Operates on the global context.
func SALQ(ci, mr operand.Op) { ctx.SALQ(ci, mr) }
// SALW: Arithmetic Shift Left.
//
// Forms:
//
// SALW 1 m16
// SALW 1 r16
// SALW cl m16
// SALW cl r16
// SALW imm8 m16
// SALW imm8 r16
//
// Construct and append a SALW instruction to the active function.
func (c *Context) SALW(ci, mr operand.Op) {
c.addinstruction(x86.SALW(ci, mr))
}
// SALW: Arithmetic Shift Left.
//
// Forms:
//
// SALW 1 m16
// SALW 1 r16
// SALW cl m16
// SALW cl r16
// SALW imm8 m16
// SALW imm8 r16
//
// Construct and append a SALW instruction to the active function.
// Operates on the global context.
func SALW(ci, mr operand.Op) { ctx.SALW(ci, mr) }
// SARB: Arithmetic Shift Right.
//
// Forms:
//
// SARB 1 m8
// SARB 1 r8
// SARB cl m8
// SARB cl r8
// SARB imm8 m8
// SARB imm8 r8
//
// Construct and append a SARB instruction to the active function.
func (c *Context) SARB(ci, mr operand.Op) {
c.addinstruction(x86.SARB(ci, mr))
}
// SARB: Arithmetic Shift Right.
//
// Forms:
//
// SARB 1 m8
// SARB 1 r8
// SARB cl m8
// SARB cl r8
// SARB imm8 m8
// SARB imm8 r8
//
// Construct and append a SARB instruction to the active function.
// Operates on the global context.
func SARB(ci, mr operand.Op) { ctx.SARB(ci, mr) }
// SARL: Arithmetic Shift Right.
//
// Forms:
//
// SARL 1 m32
// SARL 1 r32
// SARL cl m32
// SARL cl r32
// SARL imm8 m32
// SARL imm8 r32
//
// Construct and append a SARL instruction to the active function.
func (c *Context) SARL(ci, mr operand.Op) {
c.addinstruction(x86.SARL(ci, mr))
}
// SARL: Arithmetic Shift Right.
//
// Forms:
//
// SARL 1 m32
// SARL 1 r32
// SARL cl m32
// SARL cl r32
// SARL imm8 m32
// SARL imm8 r32
//
// Construct and append a SARL instruction to the active function.
// Operates on the global context.
func SARL(ci, mr operand.Op) { ctx.SARL(ci, mr) }
// SARQ: Arithmetic Shift Right.
//
// Forms:
//
// SARQ 1 m64
// SARQ 1 r64
// SARQ cl m64
// SARQ cl r64
// SARQ imm8 m64
// SARQ imm8 r64
//
// Construct and append a SARQ instruction to the active function.
func (c *Context) SARQ(ci, mr operand.Op) {
c.addinstruction(x86.SARQ(ci, mr))
}
// SARQ: Arithmetic Shift Right.
//
// Forms:
//
// SARQ 1 m64
// SARQ 1 r64
// SARQ cl m64
// SARQ cl r64
// SARQ imm8 m64
// SARQ imm8 r64
//
// Construct and append a SARQ instruction to the active function.
// Operates on the global context.
func SARQ(ci, mr operand.Op) { ctx.SARQ(ci, mr) }
// SARW: Arithmetic Shift Right.
//
// Forms:
//
// SARW 1 m16
// SARW 1 r16
// SARW cl m16
// SARW cl r16
// SARW imm8 m16
// SARW imm8 r16
//
// Construct and append a SARW instruction to the active function.
func (c *Context) SARW(ci, mr operand.Op) {
c.addinstruction(x86.SARW(ci, mr))
}
// SARW: Arithmetic Shift Right.
//
// Forms:
//
// SARW 1 m16
// SARW 1 r16
// SARW cl m16
// SARW cl r16
// SARW imm8 m16
// SARW imm8 r16
//
// Construct and append a SARW instruction to the active function.
// Operates on the global context.
func SARW(ci, mr operand.Op) { ctx.SARW(ci, mr) }
// SARXL: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXL r32 m32 r32
// SARXL r32 r32 r32
//
// Construct and append a SARXL instruction to the active function.
func (c *Context) SARXL(r, mr, r1 operand.Op) {
c.addinstruction(x86.SARXL(r, mr, r1))
}
// SARXL: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXL r32 m32 r32
// SARXL r32 r32 r32
//
// Construct and append a SARXL instruction to the active function.
// Operates on the global context.
func SARXL(r, mr, r1 operand.Op) { ctx.SARXL(r, mr, r1) }
// SARXQ: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXQ r64 m64 r64
// SARXQ r64 r64 r64
//
// Construct and append a SARXQ instruction to the active function.
func (c *Context) SARXQ(r, mr, r1 operand.Op) {
c.addinstruction(x86.SARXQ(r, mr, r1))
}
// SARXQ: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXQ r64 m64 r64
// SARXQ r64 r64 r64
//
// Construct and append a SARXQ instruction to the active function.
// Operates on the global context.
func SARXQ(r, mr, r1 operand.Op) { ctx.SARXQ(r, mr, r1) }
// SBBB: Subtract with Borrow.
//
// Forms:
//
// SBBB imm8 al
// SBBB imm8 m8
// SBBB imm8 r8
// SBBB m8 r8
// SBBB r8 m8
// SBBB r8 r8
//
// Construct and append a SBBB instruction to the active function.
func (c *Context) SBBB(imr, amr operand.Op) {
c.addinstruction(x86.SBBB(imr, amr))
}
// SBBB: Subtract with Borrow.
//
// Forms:
//
// SBBB imm8 al
// SBBB imm8 m8
// SBBB imm8 r8
// SBBB m8 r8
// SBBB r8 m8
// SBBB r8 r8
//
// Construct and append a SBBB instruction to the active function.
// Operates on the global context.
func SBBB(imr, amr operand.Op) { ctx.SBBB(imr, amr) }
// SBBL: Subtract with Borrow.
//
// Forms:
//
// SBBL imm32 eax
// SBBL imm32 m32
// SBBL imm32 r32
// SBBL imm8 m32
// SBBL imm8 r32
// SBBL m32 r32
// SBBL r32 m32
// SBBL r32 r32
//
// Construct and append a SBBL instruction to the active function.
func (c *Context) SBBL(imr, emr operand.Op) {
c.addinstruction(x86.SBBL(imr, emr))
}
// SBBL: Subtract with Borrow.
//
// Forms:
//
// SBBL imm32 eax
// SBBL imm32 m32
// SBBL imm32 r32
// SBBL imm8 m32
// SBBL imm8 r32
// SBBL m32 r32
// SBBL r32 m32
// SBBL r32 r32
//
// Construct and append a SBBL instruction to the active function.
// Operates on the global context.
func SBBL(imr, emr operand.Op) { ctx.SBBL(imr, emr) }
// SBBQ: Subtract with Borrow.
//
// Forms:
//
// SBBQ imm32 m64
// SBBQ imm32 r64
// SBBQ imm32 rax
// SBBQ imm8 m64
// SBBQ imm8 r64
// SBBQ m64 r64
// SBBQ r64 m64
// SBBQ r64 r64
//
// Construct and append a SBBQ instruction to the active function.
func (c *Context) SBBQ(imr, mr operand.Op) {
c.addinstruction(x86.SBBQ(imr, mr))
}
// SBBQ: Subtract with Borrow.
//
// Forms:
//
// SBBQ imm32 m64
// SBBQ imm32 r64
// SBBQ imm32 rax
// SBBQ imm8 m64
// SBBQ imm8 r64
// SBBQ m64 r64
// SBBQ r64 m64
// SBBQ r64 r64
//
// Construct and append a SBBQ instruction to the active function.
// Operates on the global context.
func SBBQ(imr, mr operand.Op) { ctx.SBBQ(imr, mr) }
// SBBW: Subtract with Borrow.
//
// Forms:
//
// SBBW imm16 ax
// SBBW imm16 m16
// SBBW imm16 r16
// SBBW imm8 m16
// SBBW imm8 r16
// SBBW m16 r16
// SBBW r16 m16
// SBBW r16 r16
//
// Construct and append a SBBW instruction to the active function.
func (c *Context) SBBW(imr, amr operand.Op) {
c.addinstruction(x86.SBBW(imr, amr))
}
// SBBW: Subtract with Borrow.
//
// Forms:
//
// SBBW imm16 ax
// SBBW imm16 m16
// SBBW imm16 r16
// SBBW imm8 m16
// SBBW imm8 r16
// SBBW m16 r16
// SBBW r16 m16
// SBBW r16 r16
//
// Construct and append a SBBW instruction to the active function.
// Operates on the global context.
func SBBW(imr, amr operand.Op) { ctx.SBBW(imr, amr) }
// SETCC: Set byte if above or equal (CF == 0).
//
// Forms:
//
// SETCC m8
// SETCC r8
//
// Construct and append a SETCC instruction to the active function.
func (c *Context) SETCC(mr operand.Op) {
c.addinstruction(x86.SETCC(mr))
}
// SETCC: Set byte if above or equal (CF == 0).
//
// Forms:
//
// SETCC m8
// SETCC r8
//
// Construct and append a SETCC instruction to the active function.
// Operates on the global context.
func SETCC(mr operand.Op) { ctx.SETCC(mr) }
// SETCS: Set byte if below (CF == 1).
//
// Forms:
//
// SETCS m8
// SETCS r8
//
// Construct and append a SETCS instruction to the active function.
func (c *Context) SETCS(mr operand.Op) {
c.addinstruction(x86.SETCS(mr))
}
// SETCS: Set byte if below (CF == 1).
//
// Forms:
//
// SETCS m8
// SETCS r8
//
// Construct and append a SETCS instruction to the active function.
// Operates on the global context.
func SETCS(mr operand.Op) { ctx.SETCS(mr) }
// SETEQ: Set byte if equal (ZF == 1).
//
// Forms:
//
// SETEQ m8
// SETEQ r8
//
// Construct and append a SETEQ instruction to the active function.
func (c *Context) SETEQ(mr operand.Op) {
c.addinstruction(x86.SETEQ(mr))
}
// SETEQ: Set byte if equal (ZF == 1).
//
// Forms:
//
// SETEQ m8
// SETEQ r8
//
// Construct and append a SETEQ instruction to the active function.
// Operates on the global context.
func SETEQ(mr operand.Op) { ctx.SETEQ(mr) }
// SETGE: Set byte if greater or equal (SF == OF).
//
// Forms:
//
// SETGE m8
// SETGE r8
//
// Construct and append a SETGE instruction to the active function.
func (c *Context) SETGE(mr operand.Op) {
c.addinstruction(x86.SETGE(mr))
}
// SETGE: Set byte if greater or equal (SF == OF).
//
// Forms:
//
// SETGE m8
// SETGE r8
//
// Construct and append a SETGE instruction to the active function.
// Operates on the global context.
func SETGE(mr operand.Op) { ctx.SETGE(mr) }
// SETGT: Set byte if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// SETGT m8
// SETGT r8
//
// Construct and append a SETGT instruction to the active function.
func (c *Context) SETGT(mr operand.Op) {
c.addinstruction(x86.SETGT(mr))
}
// SETGT: Set byte if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// SETGT m8
// SETGT r8
//
// Construct and append a SETGT instruction to the active function.
// Operates on the global context.
func SETGT(mr operand.Op) { ctx.SETGT(mr) }
// SETHI: Set byte if above (CF == 0 and ZF == 0).
//
// Forms:
//
// SETHI m8
// SETHI r8
//
// Construct and append a SETHI instruction to the active function.
func (c *Context) SETHI(mr operand.Op) {
c.addinstruction(x86.SETHI(mr))
}
// SETHI: Set byte if above (CF == 0 and ZF == 0).
//
// Forms:
//
// SETHI m8
// SETHI r8
//
// Construct and append a SETHI instruction to the active function.
// Operates on the global context.
func SETHI(mr operand.Op) { ctx.SETHI(mr) }
// SETLE: Set byte if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// SETLE m8
// SETLE r8
//
// Construct and append a SETLE instruction to the active function.
func (c *Context) SETLE(mr operand.Op) {
c.addinstruction(x86.SETLE(mr))
}
// SETLE: Set byte if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// SETLE m8
// SETLE r8
//
// Construct and append a SETLE instruction to the active function.
// Operates on the global context.
func SETLE(mr operand.Op) { ctx.SETLE(mr) }
// SETLS: Set byte if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// SETLS m8
// SETLS r8
//
// Construct and append a SETLS instruction to the active function.
func (c *Context) SETLS(mr operand.Op) {
c.addinstruction(x86.SETLS(mr))
}
// SETLS: Set byte if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// SETLS m8
// SETLS r8
//
// Construct and append a SETLS instruction to the active function.
// Operates on the global context.
func SETLS(mr operand.Op) { ctx.SETLS(mr) }
// SETLT: Set byte if less (SF != OF).
//
// Forms:
//
// SETLT m8
// SETLT r8
//
// Construct and append a SETLT instruction to the active function.
func (c *Context) SETLT(mr operand.Op) {
c.addinstruction(x86.SETLT(mr))
}
// SETLT: Set byte if less (SF != OF).
//
// Forms:
//
// SETLT m8
// SETLT r8
//
// Construct and append a SETLT instruction to the active function.
// Operates on the global context.
func SETLT(mr operand.Op) { ctx.SETLT(mr) }
// SETMI: Set byte if sign (SF == 1).
//
// Forms:
//
// SETMI m8
// SETMI r8
//
// Construct and append a SETMI instruction to the active function.
func (c *Context) SETMI(mr operand.Op) {
c.addinstruction(x86.SETMI(mr))
}
// SETMI: Set byte if sign (SF == 1).
//
// Forms:
//
// SETMI m8
// SETMI r8
//
// Construct and append a SETMI instruction to the active function.
// Operates on the global context.
func SETMI(mr operand.Op) { ctx.SETMI(mr) }
// SETNE: Set byte if not equal (ZF == 0).
//
// Forms:
//
// SETNE m8
// SETNE r8
//
// Construct and append a SETNE instruction to the active function.
func (c *Context) SETNE(mr operand.Op) {
c.addinstruction(x86.SETNE(mr))
}
// SETNE: Set byte if not equal (ZF == 0).
//
// Forms:
//
// SETNE m8
// SETNE r8
//
// Construct and append a SETNE instruction to the active function.
// Operates on the global context.
func SETNE(mr operand.Op) { ctx.SETNE(mr) }
// SETOC: Set byte if not overflow (OF == 0).
//
// Forms:
//
// SETOC m8
// SETOC r8
//
// Construct and append a SETOC instruction to the active function.
func (c *Context) SETOC(mr operand.Op) {
c.addinstruction(x86.SETOC(mr))
}
// SETOC: Set byte if not overflow (OF == 0).
//
// Forms:
//
// SETOC m8
// SETOC r8
//
// Construct and append a SETOC instruction to the active function.
// Operates on the global context.
func SETOC(mr operand.Op) { ctx.SETOC(mr) }
// SETOS: Set byte if overflow (OF == 1).
//
// Forms:
//
// SETOS m8
// SETOS r8
//
// Construct and append a SETOS instruction to the active function.
func (c *Context) SETOS(mr operand.Op) {
c.addinstruction(x86.SETOS(mr))
}
// SETOS: Set byte if overflow (OF == 1).
//
// Forms:
//
// SETOS m8
// SETOS r8
//
// Construct and append a SETOS instruction to the active function.
// Operates on the global context.
func SETOS(mr operand.Op) { ctx.SETOS(mr) }
// SETPC: Set byte if not parity (PF == 0).
//
// Forms:
//
// SETPC m8
// SETPC r8
//
// Construct and append a SETPC instruction to the active function.
func (c *Context) SETPC(mr operand.Op) {
c.addinstruction(x86.SETPC(mr))
}
// SETPC: Set byte if not parity (PF == 0).
//
// Forms:
//
// SETPC m8
// SETPC r8
//
// Construct and append a SETPC instruction to the active function.
// Operates on the global context.
func SETPC(mr operand.Op) { ctx.SETPC(mr) }
// SETPL: Set byte if not sign (SF == 0).
//
// Forms:
//
// SETPL m8
// SETPL r8
//
// Construct and append a SETPL instruction to the active function.
func (c *Context) SETPL(mr operand.Op) {
c.addinstruction(x86.SETPL(mr))
}
// SETPL: Set byte if not sign (SF == 0).
//
// Forms:
//
// SETPL m8
// SETPL r8
//
// Construct and append a SETPL instruction to the active function.
// Operates on the global context.
func SETPL(mr operand.Op) { ctx.SETPL(mr) }
// SETPS: Set byte if parity (PF == 1).
//
// Forms:
//
// SETPS m8
// SETPS r8
//
// Construct and append a SETPS instruction to the active function.
func (c *Context) SETPS(mr operand.Op) {
c.addinstruction(x86.SETPS(mr))
}
// SETPS: Set byte if parity (PF == 1).
//
// Forms:
//
// SETPS m8
// SETPS r8
//
// Construct and append a SETPS instruction to the active function.
// Operates on the global context.
func SETPS(mr operand.Op) { ctx.SETPS(mr) }
// SFENCE: Store Fence.
//
// Forms:
//
// SFENCE
//
// Construct and append a SFENCE instruction to the active function.
func (c *Context) SFENCE() {
c.addinstruction(x86.SFENCE())
}
// SFENCE: Store Fence.
//
// Forms:
//
// SFENCE
//
// Construct and append a SFENCE instruction to the active function.
// Operates on the global context.
func SFENCE() { ctx.SFENCE() }
// SHA1MSG1: Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG1 m128 xmm
// SHA1MSG1 xmm xmm
//
// Construct and append a SHA1MSG1 instruction to the active function.
func (c *Context) SHA1MSG1(mx, x operand.Op) {
c.addinstruction(x86.SHA1MSG1(mx, x))
}
// SHA1MSG1: Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG1 m128 xmm
// SHA1MSG1 xmm xmm
//
// Construct and append a SHA1MSG1 instruction to the active function.
// Operates on the global context.
func SHA1MSG1(mx, x operand.Op) { ctx.SHA1MSG1(mx, x) }
// SHA1MSG2: Perform a Final Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG2 m128 xmm
// SHA1MSG2 xmm xmm
//
// Construct and append a SHA1MSG2 instruction to the active function.
func (c *Context) SHA1MSG2(mx, x operand.Op) {
c.addinstruction(x86.SHA1MSG2(mx, x))
}
// SHA1MSG2: Perform a Final Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG2 m128 xmm
// SHA1MSG2 xmm xmm
//
// Construct and append a SHA1MSG2 instruction to the active function.
// Operates on the global context.
func SHA1MSG2(mx, x operand.Op) { ctx.SHA1MSG2(mx, x) }
// SHA1NEXTE: Calculate SHA1 State Variable E after Four Rounds.
//
// Forms:
//
// SHA1NEXTE m128 xmm
// SHA1NEXTE xmm xmm
//
// Construct and append a SHA1NEXTE instruction to the active function.
func (c *Context) SHA1NEXTE(mx, x operand.Op) {
c.addinstruction(x86.SHA1NEXTE(mx, x))
}
// SHA1NEXTE: Calculate SHA1 State Variable E after Four Rounds.
//
// Forms:
//
// SHA1NEXTE m128 xmm
// SHA1NEXTE xmm xmm
//
// Construct and append a SHA1NEXTE instruction to the active function.
// Operates on the global context.
func SHA1NEXTE(mx, x operand.Op) { ctx.SHA1NEXTE(mx, x) }
// SHA1RNDS4: Perform Four Rounds of SHA1 Operation.
//
// Forms:
//
// SHA1RNDS4 imm2u m128 xmm
// SHA1RNDS4 imm2u xmm xmm
//
// Construct and append a SHA1RNDS4 instruction to the active function.
func (c *Context) SHA1RNDS4(i, mx, x operand.Op) {
c.addinstruction(x86.SHA1RNDS4(i, mx, x))
}
// SHA1RNDS4: Perform Four Rounds of SHA1 Operation.
//
// Forms:
//
// SHA1RNDS4 imm2u m128 xmm
// SHA1RNDS4 imm2u xmm xmm
//
// Construct and append a SHA1RNDS4 instruction to the active function.
// Operates on the global context.
func SHA1RNDS4(i, mx, x operand.Op) { ctx.SHA1RNDS4(i, mx, x) }
// SHA256MSG1: Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG1 m128 xmm
// SHA256MSG1 xmm xmm
//
// Construct and append a SHA256MSG1 instruction to the active function.
func (c *Context) SHA256MSG1(mx, x operand.Op) {
c.addinstruction(x86.SHA256MSG1(mx, x))
}
// SHA256MSG1: Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG1 m128 xmm
// SHA256MSG1 xmm xmm
//
// Construct and append a SHA256MSG1 instruction to the active function.
// Operates on the global context.
func SHA256MSG1(mx, x operand.Op) { ctx.SHA256MSG1(mx, x) }
// SHA256MSG2: Perform a Final Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG2 m128 xmm
// SHA256MSG2 xmm xmm
//
// Construct and append a SHA256MSG2 instruction to the active function.
func (c *Context) SHA256MSG2(mx, x operand.Op) {
c.addinstruction(x86.SHA256MSG2(mx, x))
}
// SHA256MSG2: Perform a Final Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG2 m128 xmm
// SHA256MSG2 xmm xmm
//
// Construct and append a SHA256MSG2 instruction to the active function.
// Operates on the global context.
func SHA256MSG2(mx, x operand.Op) { ctx.SHA256MSG2(mx, x) }
// SHA256RNDS2: Perform Two Rounds of SHA256 Operation.
//
// Forms:
//
// SHA256RNDS2 xmm0 m128 xmm
// SHA256RNDS2 xmm0 xmm xmm
//
// Construct and append a SHA256RNDS2 instruction to the active function.
func (c *Context) SHA256RNDS2(x, mx, x1 operand.Op) {
c.addinstruction(x86.SHA256RNDS2(x, mx, x1))
}
// SHA256RNDS2: Perform Two Rounds of SHA256 Operation.
//
// Forms:
//
// SHA256RNDS2 xmm0 m128 xmm
// SHA256RNDS2 xmm0 xmm xmm
//
// Construct and append a SHA256RNDS2 instruction to the active function.
// Operates on the global context.
func SHA256RNDS2(x, mx, x1 operand.Op) { ctx.SHA256RNDS2(x, mx, x1) }
// SHLB: Logical Shift Left.
//
// Forms:
//
// SHLB 1 m8
// SHLB 1 r8
// SHLB cl m8
// SHLB cl r8
// SHLB imm8 m8
// SHLB imm8 r8
//
// Construct and append a SHLB instruction to the active function.
func (c *Context) SHLB(ci, mr operand.Op) {
c.addinstruction(x86.SHLB(ci, mr))
}
// SHLB: Logical Shift Left.
//
// Forms:
//
// SHLB 1 m8
// SHLB 1 r8
// SHLB cl m8
// SHLB cl r8
// SHLB imm8 m8
// SHLB imm8 r8
//
// Construct and append a SHLB instruction to the active function.
// Operates on the global context.
func SHLB(ci, mr operand.Op) { ctx.SHLB(ci, mr) }
// SHLL: Logical Shift Left.
//
// Forms:
//
// SHLL 1 m32
// SHLL 1 r32
// SHLL cl m32
// SHLL cl r32
// SHLL cl r32 m32
// SHLL cl r32 r32
// SHLL imm8 m32
// SHLL imm8 r32
// SHLL imm8 r32 m32
// SHLL imm8 r32 r32
//
// Construct and append a SHLL instruction to the active function.
func (c *Context) SHLL(ops ...operand.Op) {
c.addinstruction(x86.SHLL(ops...))
}
// SHLL: Logical Shift Left.
//
// Forms:
//
// SHLL 1 m32
// SHLL 1 r32
// SHLL cl m32
// SHLL cl r32
// SHLL cl r32 m32
// SHLL cl r32 r32
// SHLL imm8 m32
// SHLL imm8 r32
// SHLL imm8 r32 m32
// SHLL imm8 r32 r32
//
// Construct and append a SHLL instruction to the active function.
// Operates on the global context.
func SHLL(ops ...operand.Op) { ctx.SHLL(ops...) }
// SHLQ: Logical Shift Left.
//
// Forms:
//
// SHLQ 1 m64
// SHLQ 1 r64
// SHLQ cl m64
// SHLQ cl r64
// SHLQ cl r64 m64
// SHLQ cl r64 r64
// SHLQ imm8 m64
// SHLQ imm8 r64
// SHLQ imm8 r64 m64
// SHLQ imm8 r64 r64
//
// Construct and append a SHLQ instruction to the active function.
func (c *Context) SHLQ(ops ...operand.Op) {
c.addinstruction(x86.SHLQ(ops...))
}
// SHLQ: Logical Shift Left.
//
// Forms:
//
// SHLQ 1 m64
// SHLQ 1 r64
// SHLQ cl m64
// SHLQ cl r64
// SHLQ cl r64 m64
// SHLQ cl r64 r64
// SHLQ imm8 m64
// SHLQ imm8 r64
// SHLQ imm8 r64 m64
// SHLQ imm8 r64 r64
//
// Construct and append a SHLQ instruction to the active function.
// Operates on the global context.
func SHLQ(ops ...operand.Op) { ctx.SHLQ(ops...) }
// SHLW: Logical Shift Left.
//
// Forms:
//
// SHLW 1 m16
// SHLW 1 r16
// SHLW cl m16
// SHLW cl r16
// SHLW cl r16 m16
// SHLW cl r16 r16
// SHLW imm8 m16
// SHLW imm8 r16
// SHLW imm8 r16 m16
// SHLW imm8 r16 r16
//
// Construct and append a SHLW instruction to the active function.
func (c *Context) SHLW(ops ...operand.Op) {
c.addinstruction(x86.SHLW(ops...))
}
// SHLW: Logical Shift Left.
//
// Forms:
//
// SHLW 1 m16
// SHLW 1 r16
// SHLW cl m16
// SHLW cl r16
// SHLW cl r16 m16
// SHLW cl r16 r16
// SHLW imm8 m16
// SHLW imm8 r16
// SHLW imm8 r16 m16
// SHLW imm8 r16 r16
//
// Construct and append a SHLW instruction to the active function.
// Operates on the global context.
func SHLW(ops ...operand.Op) { ctx.SHLW(ops...) }
// SHLXL: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXL r32 m32 r32
// SHLXL r32 r32 r32
//
// Construct and append a SHLXL instruction to the active function.
func (c *Context) SHLXL(r, mr, r1 operand.Op) {
c.addinstruction(x86.SHLXL(r, mr, r1))
}
// SHLXL: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXL r32 m32 r32
// SHLXL r32 r32 r32
//
// Construct and append a SHLXL instruction to the active function.
// Operates on the global context.
func SHLXL(r, mr, r1 operand.Op) { ctx.SHLXL(r, mr, r1) }
// SHLXQ: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXQ r64 m64 r64
// SHLXQ r64 r64 r64
//
// Construct and append a SHLXQ instruction to the active function.
func (c *Context) SHLXQ(r, mr, r1 operand.Op) {
c.addinstruction(x86.SHLXQ(r, mr, r1))
}
// SHLXQ: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXQ r64 m64 r64
// SHLXQ r64 r64 r64
//
// Construct and append a SHLXQ instruction to the active function.
// Operates on the global context.
func SHLXQ(r, mr, r1 operand.Op) { ctx.SHLXQ(r, mr, r1) }
// SHRB: Logical Shift Right.
//
// Forms:
//
// SHRB 1 m8
// SHRB 1 r8
// SHRB cl m8
// SHRB cl r8
// SHRB imm8 m8
// SHRB imm8 r8
//
// Construct and append a SHRB instruction to the active function.
func (c *Context) SHRB(ci, mr operand.Op) {
c.addinstruction(x86.SHRB(ci, mr))
}
// SHRB: Logical Shift Right.
//
// Forms:
//
// SHRB 1 m8
// SHRB 1 r8
// SHRB cl m8
// SHRB cl r8
// SHRB imm8 m8
// SHRB imm8 r8
//
// Construct and append a SHRB instruction to the active function.
// Operates on the global context.
func SHRB(ci, mr operand.Op) { ctx.SHRB(ci, mr) }
// SHRL: Logical Shift Right.
//
// Forms:
//
// SHRL 1 m32
// SHRL 1 r32
// SHRL cl m32
// SHRL cl r32
// SHRL cl r32 m32
// SHRL cl r32 r32
// SHRL imm8 m32
// SHRL imm8 r32
// SHRL imm8 r32 m32
// SHRL imm8 r32 r32
//
// Construct and append a SHRL instruction to the active function.
func (c *Context) SHRL(ops ...operand.Op) {
c.addinstruction(x86.SHRL(ops...))
}
// SHRL: Logical Shift Right.
//
// Forms:
//
// SHRL 1 m32
// SHRL 1 r32
// SHRL cl m32
// SHRL cl r32
// SHRL cl r32 m32
// SHRL cl r32 r32
// SHRL imm8 m32
// SHRL imm8 r32
// SHRL imm8 r32 m32
// SHRL imm8 r32 r32
//
// Construct and append a SHRL instruction to the active function.
// Operates on the global context.
func SHRL(ops ...operand.Op) { ctx.SHRL(ops...) }
// SHRQ: Logical Shift Right.
//
// Forms:
//
// SHRQ 1 m64
// SHRQ 1 r64
// SHRQ cl m64
// SHRQ cl r64
// SHRQ cl r64 m64
// SHRQ cl r64 r64
// SHRQ imm8 m64
// SHRQ imm8 r64
// SHRQ imm8 r64 m64
// SHRQ imm8 r64 r64
//
// Construct and append a SHRQ instruction to the active function.
func (c *Context) SHRQ(ops ...operand.Op) {
c.addinstruction(x86.SHRQ(ops...))
}
// SHRQ: Logical Shift Right.
//
// Forms:
//
// SHRQ 1 m64
// SHRQ 1 r64
// SHRQ cl m64
// SHRQ cl r64
// SHRQ cl r64 m64
// SHRQ cl r64 r64
// SHRQ imm8 m64
// SHRQ imm8 r64
// SHRQ imm8 r64 m64
// SHRQ imm8 r64 r64
//
// Construct and append a SHRQ instruction to the active function.
// Operates on the global context.
func SHRQ(ops ...operand.Op) { ctx.SHRQ(ops...) }
// SHRW: Logical Shift Right.
//
// Forms:
//
// SHRW 1 m16
// SHRW 1 r16
// SHRW cl m16
// SHRW cl r16
// SHRW cl r16 m16
// SHRW cl r16 r16
// SHRW imm8 m16
// SHRW imm8 r16
// SHRW imm8 r16 m16
// SHRW imm8 r16 r16
//
// Construct and append a SHRW instruction to the active function.
func (c *Context) SHRW(ops ...operand.Op) {
c.addinstruction(x86.SHRW(ops...))
}
// SHRW: Logical Shift Right.
//
// Forms:
//
// SHRW 1 m16
// SHRW 1 r16
// SHRW cl m16
// SHRW cl r16
// SHRW cl r16 m16
// SHRW cl r16 r16
// SHRW imm8 m16
// SHRW imm8 r16
// SHRW imm8 r16 m16
// SHRW imm8 r16 r16
//
// Construct and append a SHRW instruction to the active function.
// Operates on the global context.
func SHRW(ops ...operand.Op) { ctx.SHRW(ops...) }
// SHRXL: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXL r32 m32 r32
// SHRXL r32 r32 r32
//
// Construct and append a SHRXL instruction to the active function.
func (c *Context) SHRXL(r, mr, r1 operand.Op) {
c.addinstruction(x86.SHRXL(r, mr, r1))
}
// SHRXL: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXL r32 m32 r32
// SHRXL r32 r32 r32
//
// Construct and append a SHRXL instruction to the active function.
// Operates on the global context.
func SHRXL(r, mr, r1 operand.Op) { ctx.SHRXL(r, mr, r1) }
// SHRXQ: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXQ r64 m64 r64
// SHRXQ r64 r64 r64
//
// Construct and append a SHRXQ instruction to the active function.
func (c *Context) SHRXQ(r, mr, r1 operand.Op) {
c.addinstruction(x86.SHRXQ(r, mr, r1))
}
// SHRXQ: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXQ r64 m64 r64
// SHRXQ r64 r64 r64
//
// Construct and append a SHRXQ instruction to the active function.
// Operates on the global context.
func SHRXQ(r, mr, r1 operand.Op) { ctx.SHRXQ(r, mr, r1) }
// SHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPD imm8 m128 xmm
// SHUFPD imm8 xmm xmm
//
// Construct and append a SHUFPD instruction to the active function.
func (c *Context) SHUFPD(i, mx, x operand.Op) {
c.addinstruction(x86.SHUFPD(i, mx, x))
}
// SHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPD imm8 m128 xmm
// SHUFPD imm8 xmm xmm
//
// Construct and append a SHUFPD instruction to the active function.
// Operates on the global context.
func SHUFPD(i, mx, x operand.Op) { ctx.SHUFPD(i, mx, x) }
// SHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPS imm8 m128 xmm
// SHUFPS imm8 xmm xmm
//
// Construct and append a SHUFPS instruction to the active function.
func (c *Context) SHUFPS(i, mx, x operand.Op) {
c.addinstruction(x86.SHUFPS(i, mx, x))
}
// SHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPS imm8 m128 xmm
// SHUFPS imm8 xmm xmm
//
// Construct and append a SHUFPS instruction to the active function.
// Operates on the global context.
func SHUFPS(i, mx, x operand.Op) { ctx.SHUFPS(i, mx, x) }
// SQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPD m128 xmm
// SQRTPD xmm xmm
//
// Construct and append a SQRTPD instruction to the active function.
func (c *Context) SQRTPD(mx, x operand.Op) {
c.addinstruction(x86.SQRTPD(mx, x))
}
// SQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPD m128 xmm
// SQRTPD xmm xmm
//
// Construct and append a SQRTPD instruction to the active function.
// Operates on the global context.
func SQRTPD(mx, x operand.Op) { ctx.SQRTPD(mx, x) }
// SQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPS m128 xmm
// SQRTPS xmm xmm
//
// Construct and append a SQRTPS instruction to the active function.
func (c *Context) SQRTPS(mx, x operand.Op) {
c.addinstruction(x86.SQRTPS(mx, x))
}
// SQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPS m128 xmm
// SQRTPS xmm xmm
//
// Construct and append a SQRTPS instruction to the active function.
// Operates on the global context.
func SQRTPS(mx, x operand.Op) { ctx.SQRTPS(mx, x) }
// SQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSD m64 xmm
// SQRTSD xmm xmm
//
// Construct and append a SQRTSD instruction to the active function.
func (c *Context) SQRTSD(mx, x operand.Op) {
c.addinstruction(x86.SQRTSD(mx, x))
}
// SQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSD m64 xmm
// SQRTSD xmm xmm
//
// Construct and append a SQRTSD instruction to the active function.
// Operates on the global context.
func SQRTSD(mx, x operand.Op) { ctx.SQRTSD(mx, x) }
// SQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSS m32 xmm
// SQRTSS xmm xmm
//
// Construct and append a SQRTSS instruction to the active function.
func (c *Context) SQRTSS(mx, x operand.Op) {
c.addinstruction(x86.SQRTSS(mx, x))
}
// SQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSS m32 xmm
// SQRTSS xmm xmm
//
// Construct and append a SQRTSS instruction to the active function.
// Operates on the global context.
func SQRTSS(mx, x operand.Op) { ctx.SQRTSS(mx, x) }
// STC: Set Carry Flag.
//
// Forms:
//
// STC
//
// Construct and append a STC instruction to the active function.
func (c *Context) STC() {
c.addinstruction(x86.STC())
}
// STC: Set Carry Flag.
//
// Forms:
//
// STC
//
// Construct and append a STC instruction to the active function.
// Operates on the global context.
func STC() { ctx.STC() }
// STD: Set Direction Flag.
//
// Forms:
//
// STD
//
// Construct and append a STD instruction to the active function.
func (c *Context) STD() {
c.addinstruction(x86.STD())
}
// STD: Set Direction Flag.
//
// Forms:
//
// STD
//
// Construct and append a STD instruction to the active function.
// Operates on the global context.
func STD() { ctx.STD() }
// STMXCSR: Store MXCSR Register State.
//
// Forms:
//
// STMXCSR m32
//
// Construct and append a STMXCSR instruction to the active function.
func (c *Context) STMXCSR(m operand.Op) {
c.addinstruction(x86.STMXCSR(m))
}
// STMXCSR: Store MXCSR Register State.
//
// Forms:
//
// STMXCSR m32
//
// Construct and append a STMXCSR instruction to the active function.
// Operates on the global context.
func STMXCSR(m operand.Op) { ctx.STMXCSR(m) }
// SUBB: Subtract.
//
// Forms:
//
// SUBB imm8 al
// SUBB imm8 m8
// SUBB imm8 r8
// SUBB m8 r8
// SUBB r8 m8
// SUBB r8 r8
//
// Construct and append a SUBB instruction to the active function.
func (c *Context) SUBB(imr, amr operand.Op) {
c.addinstruction(x86.SUBB(imr, amr))
}
// SUBB: Subtract.
//
// Forms:
//
// SUBB imm8 al
// SUBB imm8 m8
// SUBB imm8 r8
// SUBB m8 r8
// SUBB r8 m8
// SUBB r8 r8
//
// Construct and append a SUBB instruction to the active function.
// Operates on the global context.
func SUBB(imr, amr operand.Op) { ctx.SUBB(imr, amr) }
// SUBL: Subtract.
//
// Forms:
//
// SUBL imm32 eax
// SUBL imm32 m32
// SUBL imm32 r32
// SUBL imm8 m32
// SUBL imm8 r32
// SUBL m32 r32
// SUBL r32 m32
// SUBL r32 r32
//
// Construct and append a SUBL instruction to the active function.
func (c *Context) SUBL(imr, emr operand.Op) {
c.addinstruction(x86.SUBL(imr, emr))
}
// SUBL: Subtract.
//
// Forms:
//
// SUBL imm32 eax
// SUBL imm32 m32
// SUBL imm32 r32
// SUBL imm8 m32
// SUBL imm8 r32
// SUBL m32 r32
// SUBL r32 m32
// SUBL r32 r32
//
// Construct and append a SUBL instruction to the active function.
// Operates on the global context.
func SUBL(imr, emr operand.Op) { ctx.SUBL(imr, emr) }
// SUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBPD m128 xmm
// SUBPD xmm xmm
//
// Construct and append a SUBPD instruction to the active function.
func (c *Context) SUBPD(mx, x operand.Op) {
c.addinstruction(x86.SUBPD(mx, x))
}
// SUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBPD m128 xmm
// SUBPD xmm xmm
//
// Construct and append a SUBPD instruction to the active function.
// Operates on the global context.
func SUBPD(mx, x operand.Op) { ctx.SUBPD(mx, x) }
// SUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBPS m128 xmm
// SUBPS xmm xmm
//
// Construct and append a SUBPS instruction to the active function.
func (c *Context) SUBPS(mx, x operand.Op) {
c.addinstruction(x86.SUBPS(mx, x))
}
// SUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBPS m128 xmm
// SUBPS xmm xmm
//
// Construct and append a SUBPS instruction to the active function.
// Operates on the global context.
func SUBPS(mx, x operand.Op) { ctx.SUBPS(mx, x) }
// SUBQ: Subtract.
//
// Forms:
//
// SUBQ imm32 m64
// SUBQ imm32 r64
// SUBQ imm32 rax
// SUBQ imm8 m64
// SUBQ imm8 r64
// SUBQ m64 r64
// SUBQ r64 m64
// SUBQ r64 r64
//
// Construct and append a SUBQ instruction to the active function.
func (c *Context) SUBQ(imr, mr operand.Op) {
c.addinstruction(x86.SUBQ(imr, mr))
}
// SUBQ: Subtract.
//
// Forms:
//
// SUBQ imm32 m64
// SUBQ imm32 r64
// SUBQ imm32 rax
// SUBQ imm8 m64
// SUBQ imm8 r64
// SUBQ m64 r64
// SUBQ r64 m64
// SUBQ r64 r64
//
// Construct and append a SUBQ instruction to the active function.
// Operates on the global context.
func SUBQ(imr, mr operand.Op) { ctx.SUBQ(imr, mr) }
// SUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBSD m64 xmm
// SUBSD xmm xmm
//
// Construct and append a SUBSD instruction to the active function.
func (c *Context) SUBSD(mx, x operand.Op) {
c.addinstruction(x86.SUBSD(mx, x))
}
// SUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBSD m64 xmm
// SUBSD xmm xmm
//
// Construct and append a SUBSD instruction to the active function.
// Operates on the global context.
func SUBSD(mx, x operand.Op) { ctx.SUBSD(mx, x) }
// SUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBSS m32 xmm
// SUBSS xmm xmm
//
// Construct and append a SUBSS instruction to the active function.
func (c *Context) SUBSS(mx, x operand.Op) {
c.addinstruction(x86.SUBSS(mx, x))
}
// SUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBSS m32 xmm
// SUBSS xmm xmm
//
// Construct and append a SUBSS instruction to the active function.
// Operates on the global context.
func SUBSS(mx, x operand.Op) { ctx.SUBSS(mx, x) }
// SUBW: Subtract.
//
// Forms:
//
// SUBW imm16 ax
// SUBW imm16 m16
// SUBW imm16 r16
// SUBW imm8 m16
// SUBW imm8 r16
// SUBW m16 r16
// SUBW r16 m16
// SUBW r16 r16
//
// Construct and append a SUBW instruction to the active function.
func (c *Context) SUBW(imr, amr operand.Op) {
c.addinstruction(x86.SUBW(imr, amr))
}
// SUBW: Subtract.
//
// Forms:
//
// SUBW imm16 ax
// SUBW imm16 m16
// SUBW imm16 r16
// SUBW imm8 m16
// SUBW imm8 r16
// SUBW m16 r16
// SUBW r16 m16
// SUBW r16 r16
//
// Construct and append a SUBW instruction to the active function.
// Operates on the global context.
func SUBW(imr, amr operand.Op) { ctx.SUBW(imr, amr) }
// SYSCALL: Fast System Call.
//
// Forms:
//
// SYSCALL
//
// Construct and append a SYSCALL instruction to the active function.
func (c *Context) SYSCALL() {
c.addinstruction(x86.SYSCALL())
}
// SYSCALL: Fast System Call.
//
// Forms:
//
// SYSCALL
//
// Construct and append a SYSCALL instruction to the active function.
// Operates on the global context.
func SYSCALL() { ctx.SYSCALL() }
// TESTB: Logical Compare.
//
// Forms:
//
// TESTB imm8 al
// TESTB imm8 m8
// TESTB imm8 r8
// TESTB r8 m8
// TESTB r8 r8
//
// Construct and append a TESTB instruction to the active function.
func (c *Context) TESTB(ir, amr operand.Op) {
c.addinstruction(x86.TESTB(ir, amr))
}
// TESTB: Logical Compare.
//
// Forms:
//
// TESTB imm8 al
// TESTB imm8 m8
// TESTB imm8 r8
// TESTB r8 m8
// TESTB r8 r8
//
// Construct and append a TESTB instruction to the active function.
// Operates on the global context.
func TESTB(ir, amr operand.Op) { ctx.TESTB(ir, amr) }
// TESTL: Logical Compare.
//
// Forms:
//
// TESTL imm32 eax
// TESTL imm32 m32
// TESTL imm32 r32
// TESTL r32 m32
// TESTL r32 r32
//
// Construct and append a TESTL instruction to the active function.
func (c *Context) TESTL(ir, emr operand.Op) {
c.addinstruction(x86.TESTL(ir, emr))
}
// TESTL: Logical Compare.
//
// Forms:
//
// TESTL imm32 eax
// TESTL imm32 m32
// TESTL imm32 r32
// TESTL r32 m32
// TESTL r32 r32
//
// Construct and append a TESTL instruction to the active function.
// Operates on the global context.
func TESTL(ir, emr operand.Op) { ctx.TESTL(ir, emr) }
// TESTQ: Logical Compare.
//
// Forms:
//
// TESTQ imm32 m64
// TESTQ imm32 r64
// TESTQ imm32 rax
// TESTQ r64 m64
// TESTQ r64 r64
//
// Construct and append a TESTQ instruction to the active function.
func (c *Context) TESTQ(ir, mr operand.Op) {
c.addinstruction(x86.TESTQ(ir, mr))
}
// TESTQ: Logical Compare.
//
// Forms:
//
// TESTQ imm32 m64
// TESTQ imm32 r64
// TESTQ imm32 rax
// TESTQ r64 m64
// TESTQ r64 r64
//
// Construct and append a TESTQ instruction to the active function.
// Operates on the global context.
func TESTQ(ir, mr operand.Op) { ctx.TESTQ(ir, mr) }
// TESTW: Logical Compare.
//
// Forms:
//
// TESTW imm16 ax
// TESTW imm16 m16
// TESTW imm16 r16
// TESTW r16 m16
// TESTW r16 r16
//
// Construct and append a TESTW instruction to the active function.
func (c *Context) TESTW(ir, amr operand.Op) {
c.addinstruction(x86.TESTW(ir, amr))
}
// TESTW: Logical Compare.
//
// Forms:
//
// TESTW imm16 ax
// TESTW imm16 m16
// TESTW imm16 r16
// TESTW r16 m16
// TESTW r16 r16
//
// Construct and append a TESTW instruction to the active function.
// Operates on the global context.
func TESTW(ir, amr operand.Op) { ctx.TESTW(ir, amr) }
// TZCNTL: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTL m32 r32
// TZCNTL r32 r32
//
// Construct and append a TZCNTL instruction to the active function.
func (c *Context) TZCNTL(mr, r operand.Op) {
c.addinstruction(x86.TZCNTL(mr, r))
}
// TZCNTL: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTL m32 r32
// TZCNTL r32 r32
//
// Construct and append a TZCNTL instruction to the active function.
// Operates on the global context.
func TZCNTL(mr, r operand.Op) { ctx.TZCNTL(mr, r) }
// TZCNTQ: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTQ m64 r64
// TZCNTQ r64 r64
//
// Construct and append a TZCNTQ instruction to the active function.
func (c *Context) TZCNTQ(mr, r operand.Op) {
c.addinstruction(x86.TZCNTQ(mr, r))
}
// TZCNTQ: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTQ m64 r64
// TZCNTQ r64 r64
//
// Construct and append a TZCNTQ instruction to the active function.
// Operates on the global context.
func TZCNTQ(mr, r operand.Op) { ctx.TZCNTQ(mr, r) }
// TZCNTW: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTW m16 r16
// TZCNTW r16 r16
//
// Construct and append a TZCNTW instruction to the active function.
func (c *Context) TZCNTW(mr, r operand.Op) {
c.addinstruction(x86.TZCNTW(mr, r))
}
// TZCNTW: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTW m16 r16
// TZCNTW r16 r16
//
// Construct and append a TZCNTW instruction to the active function.
// Operates on the global context.
func TZCNTW(mr, r operand.Op) { ctx.TZCNTW(mr, r) }
// UCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISD m64 xmm
// UCOMISD xmm xmm
//
// Construct and append a UCOMISD instruction to the active function.
func (c *Context) UCOMISD(mx, x operand.Op) {
c.addinstruction(x86.UCOMISD(mx, x))
}
// UCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISD m64 xmm
// UCOMISD xmm xmm
//
// Construct and append a UCOMISD instruction to the active function.
// Operates on the global context.
func UCOMISD(mx, x operand.Op) { ctx.UCOMISD(mx, x) }
// UCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISS m32 xmm
// UCOMISS xmm xmm
//
// Construct and append a UCOMISS instruction to the active function.
func (c *Context) UCOMISS(mx, x operand.Op) {
c.addinstruction(x86.UCOMISS(mx, x))
}
// UCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISS m32 xmm
// UCOMISS xmm xmm
//
// Construct and append a UCOMISS instruction to the active function.
// Operates on the global context.
func UCOMISS(mx, x operand.Op) { ctx.UCOMISS(mx, x) }
// UD2: Undefined Instruction.
//
// Forms:
//
// UD2
//
// Construct and append a UD2 instruction to the active function.
func (c *Context) UD2() {
c.addinstruction(x86.UD2())
}
// UD2: Undefined Instruction.
//
// Forms:
//
// UD2
//
// Construct and append a UD2 instruction to the active function.
// Operates on the global context.
func UD2() { ctx.UD2() }
// UNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPD m128 xmm
// UNPCKHPD xmm xmm
//
// Construct and append a UNPCKHPD instruction to the active function.
func (c *Context) UNPCKHPD(mx, x operand.Op) {
c.addinstruction(x86.UNPCKHPD(mx, x))
}
// UNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPD m128 xmm
// UNPCKHPD xmm xmm
//
// Construct and append a UNPCKHPD instruction to the active function.
// Operates on the global context.
func UNPCKHPD(mx, x operand.Op) { ctx.UNPCKHPD(mx, x) }
// UNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPS m128 xmm
// UNPCKHPS xmm xmm
//
// Construct and append a UNPCKHPS instruction to the active function.
func (c *Context) UNPCKHPS(mx, x operand.Op) {
c.addinstruction(x86.UNPCKHPS(mx, x))
}
// UNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPS m128 xmm
// UNPCKHPS xmm xmm
//
// Construct and append a UNPCKHPS instruction to the active function.
// Operates on the global context.
func UNPCKHPS(mx, x operand.Op) { ctx.UNPCKHPS(mx, x) }
// UNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPD m128 xmm
// UNPCKLPD xmm xmm
//
// Construct and append a UNPCKLPD instruction to the active function.
func (c *Context) UNPCKLPD(mx, x operand.Op) {
c.addinstruction(x86.UNPCKLPD(mx, x))
}
// UNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPD m128 xmm
// UNPCKLPD xmm xmm
//
// Construct and append a UNPCKLPD instruction to the active function.
// Operates on the global context.
func UNPCKLPD(mx, x operand.Op) { ctx.UNPCKLPD(mx, x) }
// UNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPS m128 xmm
// UNPCKLPS xmm xmm
//
// Construct and append a UNPCKLPS instruction to the active function.
func (c *Context) UNPCKLPS(mx, x operand.Op) {
c.addinstruction(x86.UNPCKLPS(mx, x))
}
// UNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPS m128 xmm
// UNPCKLPS xmm xmm
//
// Construct and append a UNPCKLPS instruction to the active function.
// Operates on the global context.
func UNPCKLPS(mx, x operand.Op) { ctx.UNPCKLPS(mx, x) }
// VADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDPD m128 xmm xmm
// VADDPD m256 ymm ymm
// VADDPD xmm xmm xmm
// VADDPD ymm ymm ymm
// VADDPD m128 xmm k xmm
// VADDPD m256 ymm k ymm
// VADDPD xmm xmm k xmm
// VADDPD ymm ymm k ymm
// VADDPD m512 zmm k zmm
// VADDPD m512 zmm zmm
// VADDPD zmm zmm k zmm
// VADDPD zmm zmm zmm
//
// Construct and append a VADDPD instruction to the active function.
func (c *Context) VADDPD(ops ...operand.Op) {
c.addinstruction(x86.VADDPD(ops...))
}
// VADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDPD m128 xmm xmm
// VADDPD m256 ymm ymm
// VADDPD xmm xmm xmm
// VADDPD ymm ymm ymm
// VADDPD m128 xmm k xmm
// VADDPD m256 ymm k ymm
// VADDPD xmm xmm k xmm
// VADDPD ymm ymm k ymm
// VADDPD m512 zmm k zmm
// VADDPD m512 zmm zmm
// VADDPD zmm zmm k zmm
// VADDPD zmm zmm zmm
//
// Construct and append a VADDPD instruction to the active function.
// Operates on the global context.
func VADDPD(ops ...operand.Op) { ctx.VADDPD(ops...) }
// VADDPD_BCST: Add Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPD.BCST m64 xmm k xmm
// VADDPD.BCST m64 xmm xmm
// VADDPD.BCST m64 ymm k ymm
// VADDPD.BCST m64 ymm ymm
// VADDPD.BCST m64 zmm k zmm
// VADDPD.BCST m64 zmm zmm
//
// Construct and append a VADDPD.BCST instruction to the active function.
func (c *Context) VADDPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VADDPD_BCST(ops...))
}
// VADDPD_BCST: Add Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPD.BCST m64 xmm k xmm
// VADDPD.BCST m64 xmm xmm
// VADDPD.BCST m64 ymm k ymm
// VADDPD.BCST m64 ymm ymm
// VADDPD.BCST m64 zmm k zmm
// VADDPD.BCST m64 zmm zmm
//
// Construct and append a VADDPD.BCST instruction to the active function.
// Operates on the global context.
func VADDPD_BCST(ops ...operand.Op) { ctx.VADDPD_BCST(ops...) }
// VADDPD_BCST_Z: Add Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPD.BCST.Z m64 xmm k xmm
// VADDPD.BCST.Z m64 ymm k ymm
// VADDPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VADDPD.BCST.Z instruction to the active function.
func (c *Context) VADDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VADDPD_BCST_Z(m, xyz, k, xyz1))
}
// VADDPD_BCST_Z: Add Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPD.BCST.Z m64 xmm k xmm
// VADDPD.BCST.Z m64 ymm k ymm
// VADDPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VADDPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VADDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VADDPD_BCST_Z(m, xyz, k, xyz1) }
// VADDPD_RD_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPD.RD_SAE zmm zmm k zmm
// VADDPD.RD_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RD_SAE instruction to the active function.
func (c *Context) VADDPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPD_RD_SAE(ops...))
}
// VADDPD_RD_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPD.RD_SAE zmm zmm k zmm
// VADDPD.RD_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VADDPD_RD_SAE(ops ...operand.Op) { ctx.VADDPD_RD_SAE(ops...) }
// VADDPD_RD_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RD_SAE.Z instruction to the active function.
func (c *Context) VADDPD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPD_RD_SAE_Z(z, z1, k, z2))
}
// VADDPD_RD_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPD_RD_SAE_Z(z, z1, k, z2) }
// VADDPD_RN_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPD.RN_SAE zmm zmm k zmm
// VADDPD.RN_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RN_SAE instruction to the active function.
func (c *Context) VADDPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPD_RN_SAE(ops...))
}
// VADDPD_RN_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPD.RN_SAE zmm zmm k zmm
// VADDPD.RN_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VADDPD_RN_SAE(ops ...operand.Op) { ctx.VADDPD_RN_SAE(ops...) }
// VADDPD_RN_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RN_SAE.Z instruction to the active function.
func (c *Context) VADDPD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPD_RN_SAE_Z(z, z1, k, z2))
}
// VADDPD_RN_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPD_RN_SAE_Z(z, z1, k, z2) }
// VADDPD_RU_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPD.RU_SAE zmm zmm k zmm
// VADDPD.RU_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RU_SAE instruction to the active function.
func (c *Context) VADDPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPD_RU_SAE(ops...))
}
// VADDPD_RU_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPD.RU_SAE zmm zmm k zmm
// VADDPD.RU_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VADDPD_RU_SAE(ops ...operand.Op) { ctx.VADDPD_RU_SAE(ops...) }
// VADDPD_RU_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RU_SAE.Z instruction to the active function.
func (c *Context) VADDPD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPD_RU_SAE_Z(z, z1, k, z2))
}
// VADDPD_RU_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPD_RU_SAE_Z(z, z1, k, z2) }
// VADDPD_RZ_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPD.RZ_SAE zmm zmm k zmm
// VADDPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RZ_SAE instruction to the active function.
func (c *Context) VADDPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPD_RZ_SAE(ops...))
}
// VADDPD_RZ_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPD.RZ_SAE zmm zmm k zmm
// VADDPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VADDPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VADDPD_RZ_SAE(ops ...operand.Op) { ctx.VADDPD_RZ_SAE(ops...) }
// VADDPD_RZ_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VADDPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPD_RZ_SAE_Z(z, z1, k, z2))
}
// VADDPD_RZ_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPD_RZ_SAE_Z(z, z1, k, z2) }
// VADDPD_Z: Add Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPD.Z m128 xmm k xmm
// VADDPD.Z m256 ymm k ymm
// VADDPD.Z xmm xmm k xmm
// VADDPD.Z ymm ymm k ymm
// VADDPD.Z m512 zmm k zmm
// VADDPD.Z zmm zmm k zmm
//
// Construct and append a VADDPD.Z instruction to the active function.
func (c *Context) VADDPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VADDPD_Z(mxyz, xyz, k, xyz1))
}
// VADDPD_Z: Add Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPD.Z m128 xmm k xmm
// VADDPD.Z m256 ymm k ymm
// VADDPD.Z xmm xmm k xmm
// VADDPD.Z ymm ymm k ymm
// VADDPD.Z m512 zmm k zmm
// VADDPD.Z zmm zmm k zmm
//
// Construct and append a VADDPD.Z instruction to the active function.
// Operates on the global context.
func VADDPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VADDPD_Z(mxyz, xyz, k, xyz1) }
// VADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDPS m128 xmm xmm
// VADDPS m256 ymm ymm
// VADDPS xmm xmm xmm
// VADDPS ymm ymm ymm
// VADDPS m128 xmm k xmm
// VADDPS m256 ymm k ymm
// VADDPS xmm xmm k xmm
// VADDPS ymm ymm k ymm
// VADDPS m512 zmm k zmm
// VADDPS m512 zmm zmm
// VADDPS zmm zmm k zmm
// VADDPS zmm zmm zmm
//
// Construct and append a VADDPS instruction to the active function.
func (c *Context) VADDPS(ops ...operand.Op) {
c.addinstruction(x86.VADDPS(ops...))
}
// VADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDPS m128 xmm xmm
// VADDPS m256 ymm ymm
// VADDPS xmm xmm xmm
// VADDPS ymm ymm ymm
// VADDPS m128 xmm k xmm
// VADDPS m256 ymm k ymm
// VADDPS xmm xmm k xmm
// VADDPS ymm ymm k ymm
// VADDPS m512 zmm k zmm
// VADDPS m512 zmm zmm
// VADDPS zmm zmm k zmm
// VADDPS zmm zmm zmm
//
// Construct and append a VADDPS instruction to the active function.
// Operates on the global context.
func VADDPS(ops ...operand.Op) { ctx.VADDPS(ops...) }
// VADDPS_BCST: Add Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPS.BCST m32 xmm k xmm
// VADDPS.BCST m32 xmm xmm
// VADDPS.BCST m32 ymm k ymm
// VADDPS.BCST m32 ymm ymm
// VADDPS.BCST m32 zmm k zmm
// VADDPS.BCST m32 zmm zmm
//
// Construct and append a VADDPS.BCST instruction to the active function.
func (c *Context) VADDPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VADDPS_BCST(ops...))
}
// VADDPS_BCST: Add Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPS.BCST m32 xmm k xmm
// VADDPS.BCST m32 xmm xmm
// VADDPS.BCST m32 ymm k ymm
// VADDPS.BCST m32 ymm ymm
// VADDPS.BCST m32 zmm k zmm
// VADDPS.BCST m32 zmm zmm
//
// Construct and append a VADDPS.BCST instruction to the active function.
// Operates on the global context.
func VADDPS_BCST(ops ...operand.Op) { ctx.VADDPS_BCST(ops...) }
// VADDPS_BCST_Z: Add Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPS.BCST.Z m32 xmm k xmm
// VADDPS.BCST.Z m32 ymm k ymm
// VADDPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VADDPS.BCST.Z instruction to the active function.
func (c *Context) VADDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VADDPS_BCST_Z(m, xyz, k, xyz1))
}
// VADDPS_BCST_Z: Add Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPS.BCST.Z m32 xmm k xmm
// VADDPS.BCST.Z m32 ymm k ymm
// VADDPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VADDPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VADDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VADDPS_BCST_Z(m, xyz, k, xyz1) }
// VADDPS_RD_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPS.RD_SAE zmm zmm k zmm
// VADDPS.RD_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RD_SAE instruction to the active function.
func (c *Context) VADDPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPS_RD_SAE(ops...))
}
// VADDPS_RD_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPS.RD_SAE zmm zmm k zmm
// VADDPS.RD_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VADDPS_RD_SAE(ops ...operand.Op) { ctx.VADDPS_RD_SAE(ops...) }
// VADDPS_RD_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RD_SAE.Z instruction to the active function.
func (c *Context) VADDPS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPS_RD_SAE_Z(z, z1, k, z2))
}
// VADDPS_RD_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPS_RD_SAE_Z(z, z1, k, z2) }
// VADDPS_RN_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPS.RN_SAE zmm zmm k zmm
// VADDPS.RN_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RN_SAE instruction to the active function.
func (c *Context) VADDPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPS_RN_SAE(ops...))
}
// VADDPS_RN_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPS.RN_SAE zmm zmm k zmm
// VADDPS.RN_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VADDPS_RN_SAE(ops ...operand.Op) { ctx.VADDPS_RN_SAE(ops...) }
// VADDPS_RN_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RN_SAE.Z instruction to the active function.
func (c *Context) VADDPS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPS_RN_SAE_Z(z, z1, k, z2))
}
// VADDPS_RN_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPS_RN_SAE_Z(z, z1, k, z2) }
// VADDPS_RU_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPS.RU_SAE zmm zmm k zmm
// VADDPS.RU_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RU_SAE instruction to the active function.
func (c *Context) VADDPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPS_RU_SAE(ops...))
}
// VADDPS_RU_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPS.RU_SAE zmm zmm k zmm
// VADDPS.RU_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VADDPS_RU_SAE(ops ...operand.Op) { ctx.VADDPS_RU_SAE(ops...) }
// VADDPS_RU_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RU_SAE.Z instruction to the active function.
func (c *Context) VADDPS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPS_RU_SAE_Z(z, z1, k, z2))
}
// VADDPS_RU_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPS_RU_SAE_Z(z, z1, k, z2) }
// VADDPS_RZ_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPS.RZ_SAE zmm zmm k zmm
// VADDPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RZ_SAE instruction to the active function.
func (c *Context) VADDPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDPS_RZ_SAE(ops...))
}
// VADDPS_RZ_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPS.RZ_SAE zmm zmm k zmm
// VADDPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VADDPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VADDPS_RZ_SAE(ops ...operand.Op) { ctx.VADDPS_RZ_SAE(ops...) }
// VADDPS_RZ_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VADDPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VADDPS_RZ_SAE_Z(z, z1, k, z2))
}
// VADDPS_RZ_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VADDPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VADDPS_RZ_SAE_Z(z, z1, k, z2) }
// VADDPS_Z: Add Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPS.Z m128 xmm k xmm
// VADDPS.Z m256 ymm k ymm
// VADDPS.Z xmm xmm k xmm
// VADDPS.Z ymm ymm k ymm
// VADDPS.Z m512 zmm k zmm
// VADDPS.Z zmm zmm k zmm
//
// Construct and append a VADDPS.Z instruction to the active function.
func (c *Context) VADDPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VADDPS_Z(mxyz, xyz, k, xyz1))
}
// VADDPS_Z: Add Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPS.Z m128 xmm k xmm
// VADDPS.Z m256 ymm k ymm
// VADDPS.Z xmm xmm k xmm
// VADDPS.Z ymm ymm k ymm
// VADDPS.Z m512 zmm k zmm
// VADDPS.Z zmm zmm k zmm
//
// Construct and append a VADDPS.Z instruction to the active function.
// Operates on the global context.
func VADDPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VADDPS_Z(mxyz, xyz, k, xyz1) }
// VADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDSD m64 xmm xmm
// VADDSD xmm xmm xmm
// VADDSD m64 xmm k xmm
// VADDSD xmm xmm k xmm
//
// Construct and append a VADDSD instruction to the active function.
func (c *Context) VADDSD(ops ...operand.Op) {
c.addinstruction(x86.VADDSD(ops...))
}
// VADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDSD m64 xmm xmm
// VADDSD xmm xmm xmm
// VADDSD m64 xmm k xmm
// VADDSD xmm xmm k xmm
//
// Construct and append a VADDSD instruction to the active function.
// Operates on the global context.
func VADDSD(ops ...operand.Op) { ctx.VADDSD(ops...) }
// VADDSD_RD_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSD.RD_SAE xmm xmm k xmm
// VADDSD.RD_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RD_SAE instruction to the active function.
func (c *Context) VADDSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSD_RD_SAE(ops...))
}
// VADDSD_RD_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSD.RD_SAE xmm xmm k xmm
// VADDSD.RD_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VADDSD_RD_SAE(ops ...operand.Op) { ctx.VADDSD_RD_SAE(ops...) }
// VADDSD_RD_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RD_SAE.Z instruction to the active function.
func (c *Context) VADDSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSD_RD_SAE_Z(x, x1, k, x2))
}
// VADDSD_RD_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSD_RD_SAE_Z(x, x1, k, x2) }
// VADDSD_RN_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSD.RN_SAE xmm xmm k xmm
// VADDSD.RN_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RN_SAE instruction to the active function.
func (c *Context) VADDSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSD_RN_SAE(ops...))
}
// VADDSD_RN_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSD.RN_SAE xmm xmm k xmm
// VADDSD.RN_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VADDSD_RN_SAE(ops ...operand.Op) { ctx.VADDSD_RN_SAE(ops...) }
// VADDSD_RN_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RN_SAE.Z instruction to the active function.
func (c *Context) VADDSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSD_RN_SAE_Z(x, x1, k, x2))
}
// VADDSD_RN_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSD_RN_SAE_Z(x, x1, k, x2) }
// VADDSD_RU_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSD.RU_SAE xmm xmm k xmm
// VADDSD.RU_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RU_SAE instruction to the active function.
func (c *Context) VADDSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSD_RU_SAE(ops...))
}
// VADDSD_RU_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSD.RU_SAE xmm xmm k xmm
// VADDSD.RU_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VADDSD_RU_SAE(ops ...operand.Op) { ctx.VADDSD_RU_SAE(ops...) }
// VADDSD_RU_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RU_SAE.Z instruction to the active function.
func (c *Context) VADDSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSD_RU_SAE_Z(x, x1, k, x2))
}
// VADDSD_RU_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSD_RU_SAE_Z(x, x1, k, x2) }
// VADDSD_RZ_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSD.RZ_SAE xmm xmm k xmm
// VADDSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RZ_SAE instruction to the active function.
func (c *Context) VADDSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSD_RZ_SAE(ops...))
}
// VADDSD_RZ_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSD.RZ_SAE xmm xmm k xmm
// VADDSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VADDSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VADDSD_RZ_SAE(ops ...operand.Op) { ctx.VADDSD_RZ_SAE(ops...) }
// VADDSD_RZ_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VADDSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSD_RZ_SAE_Z(x, x1, k, x2))
}
// VADDSD_RZ_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSD_RZ_SAE_Z(x, x1, k, x2) }
// VADDSD_Z: Add Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSD.Z m64 xmm k xmm
// VADDSD.Z xmm xmm k xmm
//
// Construct and append a VADDSD.Z instruction to the active function.
func (c *Context) VADDSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VADDSD_Z(mx, x, k, x1))
}
// VADDSD_Z: Add Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSD.Z m64 xmm k xmm
// VADDSD.Z xmm xmm k xmm
//
// Construct and append a VADDSD.Z instruction to the active function.
// Operates on the global context.
func VADDSD_Z(mx, x, k, x1 operand.Op) { ctx.VADDSD_Z(mx, x, k, x1) }
// VADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDSS m32 xmm xmm
// VADDSS xmm xmm xmm
// VADDSS m32 xmm k xmm
// VADDSS xmm xmm k xmm
//
// Construct and append a VADDSS instruction to the active function.
func (c *Context) VADDSS(ops ...operand.Op) {
c.addinstruction(x86.VADDSS(ops...))
}
// VADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDSS m32 xmm xmm
// VADDSS xmm xmm xmm
// VADDSS m32 xmm k xmm
// VADDSS xmm xmm k xmm
//
// Construct and append a VADDSS instruction to the active function.
// Operates on the global context.
func VADDSS(ops ...operand.Op) { ctx.VADDSS(ops...) }
// VADDSS_RD_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSS.RD_SAE xmm xmm k xmm
// VADDSS.RD_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RD_SAE instruction to the active function.
func (c *Context) VADDSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSS_RD_SAE(ops...))
}
// VADDSS_RD_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSS.RD_SAE xmm xmm k xmm
// VADDSS.RD_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VADDSS_RD_SAE(ops ...operand.Op) { ctx.VADDSS_RD_SAE(ops...) }
// VADDSS_RD_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RD_SAE.Z instruction to the active function.
func (c *Context) VADDSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSS_RD_SAE_Z(x, x1, k, x2))
}
// VADDSS_RD_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSS_RD_SAE_Z(x, x1, k, x2) }
// VADDSS_RN_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSS.RN_SAE xmm xmm k xmm
// VADDSS.RN_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RN_SAE instruction to the active function.
func (c *Context) VADDSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSS_RN_SAE(ops...))
}
// VADDSS_RN_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSS.RN_SAE xmm xmm k xmm
// VADDSS.RN_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VADDSS_RN_SAE(ops ...operand.Op) { ctx.VADDSS_RN_SAE(ops...) }
// VADDSS_RN_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RN_SAE.Z instruction to the active function.
func (c *Context) VADDSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSS_RN_SAE_Z(x, x1, k, x2))
}
// VADDSS_RN_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSS_RN_SAE_Z(x, x1, k, x2) }
// VADDSS_RU_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSS.RU_SAE xmm xmm k xmm
// VADDSS.RU_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RU_SAE instruction to the active function.
func (c *Context) VADDSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSS_RU_SAE(ops...))
}
// VADDSS_RU_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSS.RU_SAE xmm xmm k xmm
// VADDSS.RU_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VADDSS_RU_SAE(ops ...operand.Op) { ctx.VADDSS_RU_SAE(ops...) }
// VADDSS_RU_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RU_SAE.Z instruction to the active function.
func (c *Context) VADDSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSS_RU_SAE_Z(x, x1, k, x2))
}
// VADDSS_RU_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSS_RU_SAE_Z(x, x1, k, x2) }
// VADDSS_RZ_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSS.RZ_SAE xmm xmm k xmm
// VADDSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RZ_SAE instruction to the active function.
func (c *Context) VADDSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VADDSS_RZ_SAE(ops...))
}
// VADDSS_RZ_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSS.RZ_SAE xmm xmm k xmm
// VADDSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VADDSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VADDSS_RZ_SAE(ops ...operand.Op) { ctx.VADDSS_RZ_SAE(ops...) }
// VADDSS_RZ_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VADDSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VADDSS_RZ_SAE_Z(x, x1, k, x2))
}
// VADDSS_RZ_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VADDSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VADDSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VADDSS_RZ_SAE_Z(x, x1, k, x2) }
// VADDSS_Z: Add Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSS.Z m32 xmm k xmm
// VADDSS.Z xmm xmm k xmm
//
// Construct and append a VADDSS.Z instruction to the active function.
func (c *Context) VADDSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VADDSS_Z(mx, x, k, x1))
}
// VADDSS_Z: Add Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSS.Z m32 xmm k xmm
// VADDSS.Z xmm xmm k xmm
//
// Construct and append a VADDSS.Z instruction to the active function.
// Operates on the global context.
func VADDSS_Z(mx, x, k, x1 operand.Op) { ctx.VADDSS_Z(mx, x, k, x1) }
// VADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPD m128 xmm xmm
// VADDSUBPD m256 ymm ymm
// VADDSUBPD xmm xmm xmm
// VADDSUBPD ymm ymm ymm
//
// Construct and append a VADDSUBPD instruction to the active function.
func (c *Context) VADDSUBPD(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VADDSUBPD(mxy, xy, xy1))
}
// VADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPD m128 xmm xmm
// VADDSUBPD m256 ymm ymm
// VADDSUBPD xmm xmm xmm
// VADDSUBPD ymm ymm ymm
//
// Construct and append a VADDSUBPD instruction to the active function.
// Operates on the global context.
func VADDSUBPD(mxy, xy, xy1 operand.Op) { ctx.VADDSUBPD(mxy, xy, xy1) }
// VADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPS m128 xmm xmm
// VADDSUBPS m256 ymm ymm
// VADDSUBPS xmm xmm xmm
// VADDSUBPS ymm ymm ymm
//
// Construct and append a VADDSUBPS instruction to the active function.
func (c *Context) VADDSUBPS(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VADDSUBPS(mxy, xy, xy1))
}
// VADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPS m128 xmm xmm
// VADDSUBPS m256 ymm ymm
// VADDSUBPS xmm xmm xmm
// VADDSUBPS ymm ymm ymm
//
// Construct and append a VADDSUBPS instruction to the active function.
// Operates on the global context.
func VADDSUBPS(mxy, xy, xy1 operand.Op) { ctx.VADDSUBPS(mxy, xy, xy1) }
// VAESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDEC m128 xmm xmm
// VAESDEC xmm xmm xmm
//
// Construct and append a VAESDEC instruction to the active function.
func (c *Context) VAESDEC(mx, x, x1 operand.Op) {
c.addinstruction(x86.VAESDEC(mx, x, x1))
}
// VAESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDEC m128 xmm xmm
// VAESDEC xmm xmm xmm
//
// Construct and append a VAESDEC instruction to the active function.
// Operates on the global context.
func VAESDEC(mx, x, x1 operand.Op) { ctx.VAESDEC(mx, x, x1) }
// VAESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDECLAST m128 xmm xmm
// VAESDECLAST xmm xmm xmm
//
// Construct and append a VAESDECLAST instruction to the active function.
func (c *Context) VAESDECLAST(mx, x, x1 operand.Op) {
c.addinstruction(x86.VAESDECLAST(mx, x, x1))
}
// VAESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDECLAST m128 xmm xmm
// VAESDECLAST xmm xmm xmm
//
// Construct and append a VAESDECLAST instruction to the active function.
// Operates on the global context.
func VAESDECLAST(mx, x, x1 operand.Op) { ctx.VAESDECLAST(mx, x, x1) }
// VAESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENC m128 xmm xmm
// VAESENC xmm xmm xmm
//
// Construct and append a VAESENC instruction to the active function.
func (c *Context) VAESENC(mx, x, x1 operand.Op) {
c.addinstruction(x86.VAESENC(mx, x, x1))
}
// VAESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENC m128 xmm xmm
// VAESENC xmm xmm xmm
//
// Construct and append a VAESENC instruction to the active function.
// Operates on the global context.
func VAESENC(mx, x, x1 operand.Op) { ctx.VAESENC(mx, x, x1) }
// VAESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENCLAST m128 xmm xmm
// VAESENCLAST xmm xmm xmm
//
// Construct and append a VAESENCLAST instruction to the active function.
func (c *Context) VAESENCLAST(mx, x, x1 operand.Op) {
c.addinstruction(x86.VAESENCLAST(mx, x, x1))
}
// VAESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENCLAST m128 xmm xmm
// VAESENCLAST xmm xmm xmm
//
// Construct and append a VAESENCLAST instruction to the active function.
// Operates on the global context.
func VAESENCLAST(mx, x, x1 operand.Op) { ctx.VAESENCLAST(mx, x, x1) }
// VAESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// VAESIMC m128 xmm
// VAESIMC xmm xmm
//
// Construct and append a VAESIMC instruction to the active function.
func (c *Context) VAESIMC(mx, x operand.Op) {
c.addinstruction(x86.VAESIMC(mx, x))
}
// VAESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// VAESIMC m128 xmm
// VAESIMC xmm xmm
//
// Construct and append a VAESIMC instruction to the active function.
// Operates on the global context.
func VAESIMC(mx, x operand.Op) { ctx.VAESIMC(mx, x) }
// VAESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// VAESKEYGENASSIST imm8 m128 xmm
// VAESKEYGENASSIST imm8 xmm xmm
//
// Construct and append a VAESKEYGENASSIST instruction to the active function.
func (c *Context) VAESKEYGENASSIST(i, mx, x operand.Op) {
c.addinstruction(x86.VAESKEYGENASSIST(i, mx, x))
}
// VAESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// VAESKEYGENASSIST imm8 m128 xmm
// VAESKEYGENASSIST imm8 xmm xmm
//
// Construct and append a VAESKEYGENASSIST instruction to the active function.
// Operates on the global context.
func VAESKEYGENASSIST(i, mx, x operand.Op) { ctx.VAESKEYGENASSIST(i, mx, x) }
// VALIGND: Align Doubleword Vectors.
//
// Forms:
//
// VALIGND imm8 m128 xmm k xmm
// VALIGND imm8 m128 xmm xmm
// VALIGND imm8 m256 ymm k ymm
// VALIGND imm8 m256 ymm ymm
// VALIGND imm8 xmm xmm k xmm
// VALIGND imm8 xmm xmm xmm
// VALIGND imm8 ymm ymm k ymm
// VALIGND imm8 ymm ymm ymm
// VALIGND imm8 m512 zmm k zmm
// VALIGND imm8 m512 zmm zmm
// VALIGND imm8 zmm zmm k zmm
// VALIGND imm8 zmm zmm zmm
//
// Construct and append a VALIGND instruction to the active function.
func (c *Context) VALIGND(ops ...operand.Op) {
c.addinstruction(x86.VALIGND(ops...))
}
// VALIGND: Align Doubleword Vectors.
//
// Forms:
//
// VALIGND imm8 m128 xmm k xmm
// VALIGND imm8 m128 xmm xmm
// VALIGND imm8 m256 ymm k ymm
// VALIGND imm8 m256 ymm ymm
// VALIGND imm8 xmm xmm k xmm
// VALIGND imm8 xmm xmm xmm
// VALIGND imm8 ymm ymm k ymm
// VALIGND imm8 ymm ymm ymm
// VALIGND imm8 m512 zmm k zmm
// VALIGND imm8 m512 zmm zmm
// VALIGND imm8 zmm zmm k zmm
// VALIGND imm8 zmm zmm zmm
//
// Construct and append a VALIGND instruction to the active function.
// Operates on the global context.
func VALIGND(ops ...operand.Op) { ctx.VALIGND(ops...) }
// VALIGND_BCST: Align Doubleword Vectors (Broadcast).
//
// Forms:
//
// VALIGND.BCST imm8 m32 xmm k xmm
// VALIGND.BCST imm8 m32 xmm xmm
// VALIGND.BCST imm8 m32 ymm k ymm
// VALIGND.BCST imm8 m32 ymm ymm
// VALIGND.BCST imm8 m32 zmm k zmm
// VALIGND.BCST imm8 m32 zmm zmm
//
// Construct and append a VALIGND.BCST instruction to the active function.
func (c *Context) VALIGND_BCST(ops ...operand.Op) {
c.addinstruction(x86.VALIGND_BCST(ops...))
}
// VALIGND_BCST: Align Doubleword Vectors (Broadcast).
//
// Forms:
//
// VALIGND.BCST imm8 m32 xmm k xmm
// VALIGND.BCST imm8 m32 xmm xmm
// VALIGND.BCST imm8 m32 ymm k ymm
// VALIGND.BCST imm8 m32 ymm ymm
// VALIGND.BCST imm8 m32 zmm k zmm
// VALIGND.BCST imm8 m32 zmm zmm
//
// Construct and append a VALIGND.BCST instruction to the active function.
// Operates on the global context.
func VALIGND_BCST(ops ...operand.Op) { ctx.VALIGND_BCST(ops...) }
// VALIGND_BCST_Z: Align Doubleword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGND.BCST.Z imm8 m32 xmm k xmm
// VALIGND.BCST.Z imm8 m32 ymm k ymm
// VALIGND.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VALIGND.BCST.Z instruction to the active function.
func (c *Context) VALIGND_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VALIGND_BCST_Z(i, m, xyz, k, xyz1))
}
// VALIGND_BCST_Z: Align Doubleword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGND.BCST.Z imm8 m32 xmm k xmm
// VALIGND.BCST.Z imm8 m32 ymm k ymm
// VALIGND.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VALIGND.BCST.Z instruction to the active function.
// Operates on the global context.
func VALIGND_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VALIGND_BCST_Z(i, m, xyz, k, xyz1) }
// VALIGND_Z: Align Doubleword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGND.Z imm8 m128 xmm k xmm
// VALIGND.Z imm8 m256 ymm k ymm
// VALIGND.Z imm8 xmm xmm k xmm
// VALIGND.Z imm8 ymm ymm k ymm
// VALIGND.Z imm8 m512 zmm k zmm
// VALIGND.Z imm8 zmm zmm k zmm
//
// Construct and append a VALIGND.Z instruction to the active function.
func (c *Context) VALIGND_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VALIGND_Z(i, mxyz, xyz, k, xyz1))
}
// VALIGND_Z: Align Doubleword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGND.Z imm8 m128 xmm k xmm
// VALIGND.Z imm8 m256 ymm k ymm
// VALIGND.Z imm8 xmm xmm k xmm
// VALIGND.Z imm8 ymm ymm k ymm
// VALIGND.Z imm8 m512 zmm k zmm
// VALIGND.Z imm8 zmm zmm k zmm
//
// Construct and append a VALIGND.Z instruction to the active function.
// Operates on the global context.
func VALIGND_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VALIGND_Z(i, mxyz, xyz, k, xyz1) }
// VALIGNQ: Align Quadword Vectors.
//
// Forms:
//
// VALIGNQ imm8 m128 xmm k xmm
// VALIGNQ imm8 m128 xmm xmm
// VALIGNQ imm8 m256 ymm k ymm
// VALIGNQ imm8 m256 ymm ymm
// VALIGNQ imm8 xmm xmm k xmm
// VALIGNQ imm8 xmm xmm xmm
// VALIGNQ imm8 ymm ymm k ymm
// VALIGNQ imm8 ymm ymm ymm
// VALIGNQ imm8 m512 zmm k zmm
// VALIGNQ imm8 m512 zmm zmm
// VALIGNQ imm8 zmm zmm k zmm
// VALIGNQ imm8 zmm zmm zmm
//
// Construct and append a VALIGNQ instruction to the active function.
func (c *Context) VALIGNQ(ops ...operand.Op) {
c.addinstruction(x86.VALIGNQ(ops...))
}
// VALIGNQ: Align Quadword Vectors.
//
// Forms:
//
// VALIGNQ imm8 m128 xmm k xmm
// VALIGNQ imm8 m128 xmm xmm
// VALIGNQ imm8 m256 ymm k ymm
// VALIGNQ imm8 m256 ymm ymm
// VALIGNQ imm8 xmm xmm k xmm
// VALIGNQ imm8 xmm xmm xmm
// VALIGNQ imm8 ymm ymm k ymm
// VALIGNQ imm8 ymm ymm ymm
// VALIGNQ imm8 m512 zmm k zmm
// VALIGNQ imm8 m512 zmm zmm
// VALIGNQ imm8 zmm zmm k zmm
// VALIGNQ imm8 zmm zmm zmm
//
// Construct and append a VALIGNQ instruction to the active function.
// Operates on the global context.
func VALIGNQ(ops ...operand.Op) { ctx.VALIGNQ(ops...) }
// VALIGNQ_BCST: Align Quadword Vectors (Broadcast).
//
// Forms:
//
// VALIGNQ.BCST imm8 m64 xmm k xmm
// VALIGNQ.BCST imm8 m64 xmm xmm
// VALIGNQ.BCST imm8 m64 ymm k ymm
// VALIGNQ.BCST imm8 m64 ymm ymm
// VALIGNQ.BCST imm8 m64 zmm k zmm
// VALIGNQ.BCST imm8 m64 zmm zmm
//
// Construct and append a VALIGNQ.BCST instruction to the active function.
func (c *Context) VALIGNQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VALIGNQ_BCST(ops...))
}
// VALIGNQ_BCST: Align Quadword Vectors (Broadcast).
//
// Forms:
//
// VALIGNQ.BCST imm8 m64 xmm k xmm
// VALIGNQ.BCST imm8 m64 xmm xmm
// VALIGNQ.BCST imm8 m64 ymm k ymm
// VALIGNQ.BCST imm8 m64 ymm ymm
// VALIGNQ.BCST imm8 m64 zmm k zmm
// VALIGNQ.BCST imm8 m64 zmm zmm
//
// Construct and append a VALIGNQ.BCST instruction to the active function.
// Operates on the global context.
func VALIGNQ_BCST(ops ...operand.Op) { ctx.VALIGNQ_BCST(ops...) }
// VALIGNQ_BCST_Z: Align Quadword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGNQ.BCST.Z imm8 m64 xmm k xmm
// VALIGNQ.BCST.Z imm8 m64 ymm k ymm
// VALIGNQ.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VALIGNQ.BCST.Z instruction to the active function.
func (c *Context) VALIGNQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VALIGNQ_BCST_Z(i, m, xyz, k, xyz1))
}
// VALIGNQ_BCST_Z: Align Quadword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGNQ.BCST.Z imm8 m64 xmm k xmm
// VALIGNQ.BCST.Z imm8 m64 ymm k ymm
// VALIGNQ.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VALIGNQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VALIGNQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VALIGNQ_BCST_Z(i, m, xyz, k, xyz1) }
// VALIGNQ_Z: Align Quadword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGNQ.Z imm8 m128 xmm k xmm
// VALIGNQ.Z imm8 m256 ymm k ymm
// VALIGNQ.Z imm8 xmm xmm k xmm
// VALIGNQ.Z imm8 ymm ymm k ymm
// VALIGNQ.Z imm8 m512 zmm k zmm
// VALIGNQ.Z imm8 zmm zmm k zmm
//
// Construct and append a VALIGNQ.Z instruction to the active function.
func (c *Context) VALIGNQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VALIGNQ_Z(i, mxyz, xyz, k, xyz1))
}
// VALIGNQ_Z: Align Quadword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGNQ.Z imm8 m128 xmm k xmm
// VALIGNQ.Z imm8 m256 ymm k ymm
// VALIGNQ.Z imm8 xmm xmm k xmm
// VALIGNQ.Z imm8 ymm ymm k ymm
// VALIGNQ.Z imm8 m512 zmm k zmm
// VALIGNQ.Z imm8 zmm zmm k zmm
//
// Construct and append a VALIGNQ.Z instruction to the active function.
// Operates on the global context.
func VALIGNQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VALIGNQ_Z(i, mxyz, xyz, k, xyz1) }
// VANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPD m128 xmm xmm
// VANDNPD m256 ymm ymm
// VANDNPD xmm xmm xmm
// VANDNPD ymm ymm ymm
// VANDNPD m128 xmm k xmm
// VANDNPD m256 ymm k ymm
// VANDNPD xmm xmm k xmm
// VANDNPD ymm ymm k ymm
// VANDNPD m512 zmm k zmm
// VANDNPD m512 zmm zmm
// VANDNPD zmm zmm k zmm
// VANDNPD zmm zmm zmm
//
// Construct and append a VANDNPD instruction to the active function.
func (c *Context) VANDNPD(ops ...operand.Op) {
c.addinstruction(x86.VANDNPD(ops...))
}
// VANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPD m128 xmm xmm
// VANDNPD m256 ymm ymm
// VANDNPD xmm xmm xmm
// VANDNPD ymm ymm ymm
// VANDNPD m128 xmm k xmm
// VANDNPD m256 ymm k ymm
// VANDNPD xmm xmm k xmm
// VANDNPD ymm ymm k ymm
// VANDNPD m512 zmm k zmm
// VANDNPD m512 zmm zmm
// VANDNPD zmm zmm k zmm
// VANDNPD zmm zmm zmm
//
// Construct and append a VANDNPD instruction to the active function.
// Operates on the global context.
func VANDNPD(ops ...operand.Op) { ctx.VANDNPD(ops...) }
// VANDNPD_BCST: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPD.BCST m64 xmm k xmm
// VANDNPD.BCST m64 xmm xmm
// VANDNPD.BCST m64 ymm k ymm
// VANDNPD.BCST m64 ymm ymm
// VANDNPD.BCST m64 zmm k zmm
// VANDNPD.BCST m64 zmm zmm
//
// Construct and append a VANDNPD.BCST instruction to the active function.
func (c *Context) VANDNPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VANDNPD_BCST(ops...))
}
// VANDNPD_BCST: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPD.BCST m64 xmm k xmm
// VANDNPD.BCST m64 xmm xmm
// VANDNPD.BCST m64 ymm k ymm
// VANDNPD.BCST m64 ymm ymm
// VANDNPD.BCST m64 zmm k zmm
// VANDNPD.BCST m64 zmm zmm
//
// Construct and append a VANDNPD.BCST instruction to the active function.
// Operates on the global context.
func VANDNPD_BCST(ops ...operand.Op) { ctx.VANDNPD_BCST(ops...) }
// VANDNPD_BCST_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPD.BCST.Z m64 xmm k xmm
// VANDNPD.BCST.Z m64 ymm k ymm
// VANDNPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VANDNPD.BCST.Z instruction to the active function.
func (c *Context) VANDNPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDNPD_BCST_Z(m, xyz, k, xyz1))
}
// VANDNPD_BCST_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPD.BCST.Z m64 xmm k xmm
// VANDNPD.BCST.Z m64 ymm k ymm
// VANDNPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VANDNPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VANDNPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VANDNPD_BCST_Z(m, xyz, k, xyz1) }
// VANDNPD_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPD.Z m128 xmm k xmm
// VANDNPD.Z m256 ymm k ymm
// VANDNPD.Z xmm xmm k xmm
// VANDNPD.Z ymm ymm k ymm
// VANDNPD.Z m512 zmm k zmm
// VANDNPD.Z zmm zmm k zmm
//
// Construct and append a VANDNPD.Z instruction to the active function.
func (c *Context) VANDNPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDNPD_Z(mxyz, xyz, k, xyz1))
}
// VANDNPD_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPD.Z m128 xmm k xmm
// VANDNPD.Z m256 ymm k ymm
// VANDNPD.Z xmm xmm k xmm
// VANDNPD.Z ymm ymm k ymm
// VANDNPD.Z m512 zmm k zmm
// VANDNPD.Z zmm zmm k zmm
//
// Construct and append a VANDNPD.Z instruction to the active function.
// Operates on the global context.
func VANDNPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VANDNPD_Z(mxyz, xyz, k, xyz1) }
// VANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPS m128 xmm xmm
// VANDNPS m256 ymm ymm
// VANDNPS xmm xmm xmm
// VANDNPS ymm ymm ymm
// VANDNPS m128 xmm k xmm
// VANDNPS m256 ymm k ymm
// VANDNPS xmm xmm k xmm
// VANDNPS ymm ymm k ymm
// VANDNPS m512 zmm k zmm
// VANDNPS m512 zmm zmm
// VANDNPS zmm zmm k zmm
// VANDNPS zmm zmm zmm
//
// Construct and append a VANDNPS instruction to the active function.
func (c *Context) VANDNPS(ops ...operand.Op) {
c.addinstruction(x86.VANDNPS(ops...))
}
// VANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPS m128 xmm xmm
// VANDNPS m256 ymm ymm
// VANDNPS xmm xmm xmm
// VANDNPS ymm ymm ymm
// VANDNPS m128 xmm k xmm
// VANDNPS m256 ymm k ymm
// VANDNPS xmm xmm k xmm
// VANDNPS ymm ymm k ymm
// VANDNPS m512 zmm k zmm
// VANDNPS m512 zmm zmm
// VANDNPS zmm zmm k zmm
// VANDNPS zmm zmm zmm
//
// Construct and append a VANDNPS instruction to the active function.
// Operates on the global context.
func VANDNPS(ops ...operand.Op) { ctx.VANDNPS(ops...) }
// VANDNPS_BCST: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPS.BCST m32 xmm k xmm
// VANDNPS.BCST m32 xmm xmm
// VANDNPS.BCST m32 ymm k ymm
// VANDNPS.BCST m32 ymm ymm
// VANDNPS.BCST m32 zmm k zmm
// VANDNPS.BCST m32 zmm zmm
//
// Construct and append a VANDNPS.BCST instruction to the active function.
func (c *Context) VANDNPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VANDNPS_BCST(ops...))
}
// VANDNPS_BCST: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPS.BCST m32 xmm k xmm
// VANDNPS.BCST m32 xmm xmm
// VANDNPS.BCST m32 ymm k ymm
// VANDNPS.BCST m32 ymm ymm
// VANDNPS.BCST m32 zmm k zmm
// VANDNPS.BCST m32 zmm zmm
//
// Construct and append a VANDNPS.BCST instruction to the active function.
// Operates on the global context.
func VANDNPS_BCST(ops ...operand.Op) { ctx.VANDNPS_BCST(ops...) }
// VANDNPS_BCST_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPS.BCST.Z m32 xmm k xmm
// VANDNPS.BCST.Z m32 ymm k ymm
// VANDNPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VANDNPS.BCST.Z instruction to the active function.
func (c *Context) VANDNPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDNPS_BCST_Z(m, xyz, k, xyz1))
}
// VANDNPS_BCST_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPS.BCST.Z m32 xmm k xmm
// VANDNPS.BCST.Z m32 ymm k ymm
// VANDNPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VANDNPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VANDNPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VANDNPS_BCST_Z(m, xyz, k, xyz1) }
// VANDNPS_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPS.Z m128 xmm k xmm
// VANDNPS.Z m256 ymm k ymm
// VANDNPS.Z xmm xmm k xmm
// VANDNPS.Z ymm ymm k ymm
// VANDNPS.Z m512 zmm k zmm
// VANDNPS.Z zmm zmm k zmm
//
// Construct and append a VANDNPS.Z instruction to the active function.
func (c *Context) VANDNPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDNPS_Z(mxyz, xyz, k, xyz1))
}
// VANDNPS_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPS.Z m128 xmm k xmm
// VANDNPS.Z m256 ymm k ymm
// VANDNPS.Z xmm xmm k xmm
// VANDNPS.Z ymm ymm k ymm
// VANDNPS.Z m512 zmm k zmm
// VANDNPS.Z zmm zmm k zmm
//
// Construct and append a VANDNPS.Z instruction to the active function.
// Operates on the global context.
func VANDNPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VANDNPS_Z(mxyz, xyz, k, xyz1) }
// VANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDPD m128 xmm xmm
// VANDPD m256 ymm ymm
// VANDPD xmm xmm xmm
// VANDPD ymm ymm ymm
// VANDPD m128 xmm k xmm
// VANDPD m256 ymm k ymm
// VANDPD xmm xmm k xmm
// VANDPD ymm ymm k ymm
// VANDPD m512 zmm k zmm
// VANDPD m512 zmm zmm
// VANDPD zmm zmm k zmm
// VANDPD zmm zmm zmm
//
// Construct and append a VANDPD instruction to the active function.
func (c *Context) VANDPD(ops ...operand.Op) {
c.addinstruction(x86.VANDPD(ops...))
}
// VANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDPD m128 xmm xmm
// VANDPD m256 ymm ymm
// VANDPD xmm xmm xmm
// VANDPD ymm ymm ymm
// VANDPD m128 xmm k xmm
// VANDPD m256 ymm k ymm
// VANDPD xmm xmm k xmm
// VANDPD ymm ymm k ymm
// VANDPD m512 zmm k zmm
// VANDPD m512 zmm zmm
// VANDPD zmm zmm k zmm
// VANDPD zmm zmm zmm
//
// Construct and append a VANDPD instruction to the active function.
// Operates on the global context.
func VANDPD(ops ...operand.Op) { ctx.VANDPD(ops...) }
// VANDPD_BCST: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPD.BCST m64 xmm k xmm
// VANDPD.BCST m64 xmm xmm
// VANDPD.BCST m64 ymm k ymm
// VANDPD.BCST m64 ymm ymm
// VANDPD.BCST m64 zmm k zmm
// VANDPD.BCST m64 zmm zmm
//
// Construct and append a VANDPD.BCST instruction to the active function.
func (c *Context) VANDPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VANDPD_BCST(ops...))
}
// VANDPD_BCST: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPD.BCST m64 xmm k xmm
// VANDPD.BCST m64 xmm xmm
// VANDPD.BCST m64 ymm k ymm
// VANDPD.BCST m64 ymm ymm
// VANDPD.BCST m64 zmm k zmm
// VANDPD.BCST m64 zmm zmm
//
// Construct and append a VANDPD.BCST instruction to the active function.
// Operates on the global context.
func VANDPD_BCST(ops ...operand.Op) { ctx.VANDPD_BCST(ops...) }
// VANDPD_BCST_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPD.BCST.Z m64 xmm k xmm
// VANDPD.BCST.Z m64 ymm k ymm
// VANDPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VANDPD.BCST.Z instruction to the active function.
func (c *Context) VANDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDPD_BCST_Z(m, xyz, k, xyz1))
}
// VANDPD_BCST_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPD.BCST.Z m64 xmm k xmm
// VANDPD.BCST.Z m64 ymm k ymm
// VANDPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VANDPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VANDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VANDPD_BCST_Z(m, xyz, k, xyz1) }
// VANDPD_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPD.Z m128 xmm k xmm
// VANDPD.Z m256 ymm k ymm
// VANDPD.Z xmm xmm k xmm
// VANDPD.Z ymm ymm k ymm
// VANDPD.Z m512 zmm k zmm
// VANDPD.Z zmm zmm k zmm
//
// Construct and append a VANDPD.Z instruction to the active function.
func (c *Context) VANDPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDPD_Z(mxyz, xyz, k, xyz1))
}
// VANDPD_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPD.Z m128 xmm k xmm
// VANDPD.Z m256 ymm k ymm
// VANDPD.Z xmm xmm k xmm
// VANDPD.Z ymm ymm k ymm
// VANDPD.Z m512 zmm k zmm
// VANDPD.Z zmm zmm k zmm
//
// Construct and append a VANDPD.Z instruction to the active function.
// Operates on the global context.
func VANDPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VANDPD_Z(mxyz, xyz, k, xyz1) }
// VANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDPS m128 xmm xmm
// VANDPS m256 ymm ymm
// VANDPS xmm xmm xmm
// VANDPS ymm ymm ymm
// VANDPS m128 xmm k xmm
// VANDPS m256 ymm k ymm
// VANDPS xmm xmm k xmm
// VANDPS ymm ymm k ymm
// VANDPS m512 zmm k zmm
// VANDPS m512 zmm zmm
// VANDPS zmm zmm k zmm
// VANDPS zmm zmm zmm
//
// Construct and append a VANDPS instruction to the active function.
func (c *Context) VANDPS(ops ...operand.Op) {
c.addinstruction(x86.VANDPS(ops...))
}
// VANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDPS m128 xmm xmm
// VANDPS m256 ymm ymm
// VANDPS xmm xmm xmm
// VANDPS ymm ymm ymm
// VANDPS m128 xmm k xmm
// VANDPS m256 ymm k ymm
// VANDPS xmm xmm k xmm
// VANDPS ymm ymm k ymm
// VANDPS m512 zmm k zmm
// VANDPS m512 zmm zmm
// VANDPS zmm zmm k zmm
// VANDPS zmm zmm zmm
//
// Construct and append a VANDPS instruction to the active function.
// Operates on the global context.
func VANDPS(ops ...operand.Op) { ctx.VANDPS(ops...) }
// VANDPS_BCST: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPS.BCST m32 xmm k xmm
// VANDPS.BCST m32 xmm xmm
// VANDPS.BCST m32 ymm k ymm
// VANDPS.BCST m32 ymm ymm
// VANDPS.BCST m32 zmm k zmm
// VANDPS.BCST m32 zmm zmm
//
// Construct and append a VANDPS.BCST instruction to the active function.
func (c *Context) VANDPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VANDPS_BCST(ops...))
}
// VANDPS_BCST: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPS.BCST m32 xmm k xmm
// VANDPS.BCST m32 xmm xmm
// VANDPS.BCST m32 ymm k ymm
// VANDPS.BCST m32 ymm ymm
// VANDPS.BCST m32 zmm k zmm
// VANDPS.BCST m32 zmm zmm
//
// Construct and append a VANDPS.BCST instruction to the active function.
// Operates on the global context.
func VANDPS_BCST(ops ...operand.Op) { ctx.VANDPS_BCST(ops...) }
// VANDPS_BCST_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPS.BCST.Z m32 xmm k xmm
// VANDPS.BCST.Z m32 ymm k ymm
// VANDPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VANDPS.BCST.Z instruction to the active function.
func (c *Context) VANDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDPS_BCST_Z(m, xyz, k, xyz1))
}
// VANDPS_BCST_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPS.BCST.Z m32 xmm k xmm
// VANDPS.BCST.Z m32 ymm k ymm
// VANDPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VANDPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VANDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VANDPS_BCST_Z(m, xyz, k, xyz1) }
// VANDPS_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPS.Z m128 xmm k xmm
// VANDPS.Z m256 ymm k ymm
// VANDPS.Z xmm xmm k xmm
// VANDPS.Z ymm ymm k ymm
// VANDPS.Z m512 zmm k zmm
// VANDPS.Z zmm zmm k zmm
//
// Construct and append a VANDPS.Z instruction to the active function.
func (c *Context) VANDPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VANDPS_Z(mxyz, xyz, k, xyz1))
}
// VANDPS_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPS.Z m128 xmm k xmm
// VANDPS.Z m256 ymm k ymm
// VANDPS.Z xmm xmm k xmm
// VANDPS.Z ymm ymm k ymm
// VANDPS.Z m512 zmm k zmm
// VANDPS.Z zmm zmm k zmm
//
// Construct and append a VANDPS.Z instruction to the active function.
// Operates on the global context.
func VANDPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VANDPS_Z(mxyz, xyz, k, xyz1) }
// VBLENDMPD: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPD m128 xmm k xmm
// VBLENDMPD m128 xmm xmm
// VBLENDMPD m256 ymm k ymm
// VBLENDMPD m256 ymm ymm
// VBLENDMPD xmm xmm k xmm
// VBLENDMPD xmm xmm xmm
// VBLENDMPD ymm ymm k ymm
// VBLENDMPD ymm ymm ymm
// VBLENDMPD m512 zmm k zmm
// VBLENDMPD m512 zmm zmm
// VBLENDMPD zmm zmm k zmm
// VBLENDMPD zmm zmm zmm
//
// Construct and append a VBLENDMPD instruction to the active function.
func (c *Context) VBLENDMPD(ops ...operand.Op) {
c.addinstruction(x86.VBLENDMPD(ops...))
}
// VBLENDMPD: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPD m128 xmm k xmm
// VBLENDMPD m128 xmm xmm
// VBLENDMPD m256 ymm k ymm
// VBLENDMPD m256 ymm ymm
// VBLENDMPD xmm xmm k xmm
// VBLENDMPD xmm xmm xmm
// VBLENDMPD ymm ymm k ymm
// VBLENDMPD ymm ymm ymm
// VBLENDMPD m512 zmm k zmm
// VBLENDMPD m512 zmm zmm
// VBLENDMPD zmm zmm k zmm
// VBLENDMPD zmm zmm zmm
//
// Construct and append a VBLENDMPD instruction to the active function.
// Operates on the global context.
func VBLENDMPD(ops ...operand.Op) { ctx.VBLENDMPD(ops...) }
// VBLENDMPD_BCST: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPD.BCST m64 xmm k xmm
// VBLENDMPD.BCST m64 xmm xmm
// VBLENDMPD.BCST m64 ymm k ymm
// VBLENDMPD.BCST m64 ymm ymm
// VBLENDMPD.BCST m64 zmm k zmm
// VBLENDMPD.BCST m64 zmm zmm
//
// Construct and append a VBLENDMPD.BCST instruction to the active function.
func (c *Context) VBLENDMPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VBLENDMPD_BCST(ops...))
}
// VBLENDMPD_BCST: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPD.BCST m64 xmm k xmm
// VBLENDMPD.BCST m64 xmm xmm
// VBLENDMPD.BCST m64 ymm k ymm
// VBLENDMPD.BCST m64 ymm ymm
// VBLENDMPD.BCST m64 zmm k zmm
// VBLENDMPD.BCST m64 zmm zmm
//
// Construct and append a VBLENDMPD.BCST instruction to the active function.
// Operates on the global context.
func VBLENDMPD_BCST(ops ...operand.Op) { ctx.VBLENDMPD_BCST(ops...) }
// VBLENDMPD_BCST_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.BCST.Z m64 xmm k xmm
// VBLENDMPD.BCST.Z m64 ymm k ymm
// VBLENDMPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VBLENDMPD.BCST.Z instruction to the active function.
func (c *Context) VBLENDMPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VBLENDMPD_BCST_Z(m, xyz, k, xyz1))
}
// VBLENDMPD_BCST_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.BCST.Z m64 xmm k xmm
// VBLENDMPD.BCST.Z m64 ymm k ymm
// VBLENDMPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VBLENDMPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VBLENDMPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VBLENDMPD_BCST_Z(m, xyz, k, xyz1) }
// VBLENDMPD_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.Z m128 xmm k xmm
// VBLENDMPD.Z m256 ymm k ymm
// VBLENDMPD.Z xmm xmm k xmm
// VBLENDMPD.Z ymm ymm k ymm
// VBLENDMPD.Z m512 zmm k zmm
// VBLENDMPD.Z zmm zmm k zmm
//
// Construct and append a VBLENDMPD.Z instruction to the active function.
func (c *Context) VBLENDMPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VBLENDMPD_Z(mxyz, xyz, k, xyz1))
}
// VBLENDMPD_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.Z m128 xmm k xmm
// VBLENDMPD.Z m256 ymm k ymm
// VBLENDMPD.Z xmm xmm k xmm
// VBLENDMPD.Z ymm ymm k ymm
// VBLENDMPD.Z m512 zmm k zmm
// VBLENDMPD.Z zmm zmm k zmm
//
// Construct and append a VBLENDMPD.Z instruction to the active function.
// Operates on the global context.
func VBLENDMPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VBLENDMPD_Z(mxyz, xyz, k, xyz1) }
// VBLENDMPS: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPS m128 xmm k xmm
// VBLENDMPS m128 xmm xmm
// VBLENDMPS m256 ymm k ymm
// VBLENDMPS m256 ymm ymm
// VBLENDMPS xmm xmm k xmm
// VBLENDMPS xmm xmm xmm
// VBLENDMPS ymm ymm k ymm
// VBLENDMPS ymm ymm ymm
// VBLENDMPS m512 zmm k zmm
// VBLENDMPS m512 zmm zmm
// VBLENDMPS zmm zmm k zmm
// VBLENDMPS zmm zmm zmm
//
// Construct and append a VBLENDMPS instruction to the active function.
func (c *Context) VBLENDMPS(ops ...operand.Op) {
c.addinstruction(x86.VBLENDMPS(ops...))
}
// VBLENDMPS: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPS m128 xmm k xmm
// VBLENDMPS m128 xmm xmm
// VBLENDMPS m256 ymm k ymm
// VBLENDMPS m256 ymm ymm
// VBLENDMPS xmm xmm k xmm
// VBLENDMPS xmm xmm xmm
// VBLENDMPS ymm ymm k ymm
// VBLENDMPS ymm ymm ymm
// VBLENDMPS m512 zmm k zmm
// VBLENDMPS m512 zmm zmm
// VBLENDMPS zmm zmm k zmm
// VBLENDMPS zmm zmm zmm
//
// Construct and append a VBLENDMPS instruction to the active function.
// Operates on the global context.
func VBLENDMPS(ops ...operand.Op) { ctx.VBLENDMPS(ops...) }
// VBLENDMPS_BCST: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPS.BCST m32 xmm k xmm
// VBLENDMPS.BCST m32 xmm xmm
// VBLENDMPS.BCST m32 ymm k ymm
// VBLENDMPS.BCST m32 ymm ymm
// VBLENDMPS.BCST m32 zmm k zmm
// VBLENDMPS.BCST m32 zmm zmm
//
// Construct and append a VBLENDMPS.BCST instruction to the active function.
func (c *Context) VBLENDMPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VBLENDMPS_BCST(ops...))
}
// VBLENDMPS_BCST: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPS.BCST m32 xmm k xmm
// VBLENDMPS.BCST m32 xmm xmm
// VBLENDMPS.BCST m32 ymm k ymm
// VBLENDMPS.BCST m32 ymm ymm
// VBLENDMPS.BCST m32 zmm k zmm
// VBLENDMPS.BCST m32 zmm zmm
//
// Construct and append a VBLENDMPS.BCST instruction to the active function.
// Operates on the global context.
func VBLENDMPS_BCST(ops ...operand.Op) { ctx.VBLENDMPS_BCST(ops...) }
// VBLENDMPS_BCST_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.BCST.Z m32 xmm k xmm
// VBLENDMPS.BCST.Z m32 ymm k ymm
// VBLENDMPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VBLENDMPS.BCST.Z instruction to the active function.
func (c *Context) VBLENDMPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VBLENDMPS_BCST_Z(m, xyz, k, xyz1))
}
// VBLENDMPS_BCST_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.BCST.Z m32 xmm k xmm
// VBLENDMPS.BCST.Z m32 ymm k ymm
// VBLENDMPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VBLENDMPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VBLENDMPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VBLENDMPS_BCST_Z(m, xyz, k, xyz1) }
// VBLENDMPS_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.Z m128 xmm k xmm
// VBLENDMPS.Z m256 ymm k ymm
// VBLENDMPS.Z xmm xmm k xmm
// VBLENDMPS.Z ymm ymm k ymm
// VBLENDMPS.Z m512 zmm k zmm
// VBLENDMPS.Z zmm zmm k zmm
//
// Construct and append a VBLENDMPS.Z instruction to the active function.
func (c *Context) VBLENDMPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VBLENDMPS_Z(mxyz, xyz, k, xyz1))
}
// VBLENDMPS_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.Z m128 xmm k xmm
// VBLENDMPS.Z m256 ymm k ymm
// VBLENDMPS.Z xmm xmm k xmm
// VBLENDMPS.Z ymm ymm k ymm
// VBLENDMPS.Z m512 zmm k zmm
// VBLENDMPS.Z zmm zmm k zmm
//
// Construct and append a VBLENDMPS.Z instruction to the active function.
// Operates on the global context.
func VBLENDMPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VBLENDMPS_Z(mxyz, xyz, k, xyz1) }
// VBLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPD imm8 m128 xmm xmm
// VBLENDPD imm8 m256 ymm ymm
// VBLENDPD imm8 xmm xmm xmm
// VBLENDPD imm8 ymm ymm ymm
//
// Construct and append a VBLENDPD instruction to the active function.
func (c *Context) VBLENDPD(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VBLENDPD(i, mxy, xy, xy1))
}
// VBLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPD imm8 m128 xmm xmm
// VBLENDPD imm8 m256 ymm ymm
// VBLENDPD imm8 xmm xmm xmm
// VBLENDPD imm8 ymm ymm ymm
//
// Construct and append a VBLENDPD instruction to the active function.
// Operates on the global context.
func VBLENDPD(i, mxy, xy, xy1 operand.Op) { ctx.VBLENDPD(i, mxy, xy, xy1) }
// VBLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPS imm8 m128 xmm xmm
// VBLENDPS imm8 m256 ymm ymm
// VBLENDPS imm8 xmm xmm xmm
// VBLENDPS imm8 ymm ymm ymm
//
// Construct and append a VBLENDPS instruction to the active function.
func (c *Context) VBLENDPS(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VBLENDPS(i, mxy, xy, xy1))
}
// VBLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPS imm8 m128 xmm xmm
// VBLENDPS imm8 m256 ymm ymm
// VBLENDPS imm8 xmm xmm xmm
// VBLENDPS imm8 ymm ymm ymm
//
// Construct and append a VBLENDPS instruction to the active function.
// Operates on the global context.
func VBLENDPS(i, mxy, xy, xy1 operand.Op) { ctx.VBLENDPS(i, mxy, xy, xy1) }
// VBLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPD xmm m128 xmm xmm
// VBLENDVPD xmm xmm xmm xmm
// VBLENDVPD ymm m256 ymm ymm
// VBLENDVPD ymm ymm ymm ymm
//
// Construct and append a VBLENDVPD instruction to the active function.
func (c *Context) VBLENDVPD(xy, mxy, xy1, xy2 operand.Op) {
c.addinstruction(x86.VBLENDVPD(xy, mxy, xy1, xy2))
}
// VBLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPD xmm m128 xmm xmm
// VBLENDVPD xmm xmm xmm xmm
// VBLENDVPD ymm m256 ymm ymm
// VBLENDVPD ymm ymm ymm ymm
//
// Construct and append a VBLENDVPD instruction to the active function.
// Operates on the global context.
func VBLENDVPD(xy, mxy, xy1, xy2 operand.Op) { ctx.VBLENDVPD(xy, mxy, xy1, xy2) }
// VBLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPS xmm m128 xmm xmm
// VBLENDVPS xmm xmm xmm xmm
// VBLENDVPS ymm m256 ymm ymm
// VBLENDVPS ymm ymm ymm ymm
//
// Construct and append a VBLENDVPS instruction to the active function.
func (c *Context) VBLENDVPS(xy, mxy, xy1, xy2 operand.Op) {
c.addinstruction(x86.VBLENDVPS(xy, mxy, xy1, xy2))
}
// VBLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPS xmm m128 xmm xmm
// VBLENDVPS xmm xmm xmm xmm
// VBLENDVPS ymm m256 ymm ymm
// VBLENDVPS ymm ymm ymm ymm
//
// Construct and append a VBLENDVPS instruction to the active function.
// Operates on the global context.
func VBLENDVPS(xy, mxy, xy1, xy2 operand.Op) { ctx.VBLENDVPS(xy, mxy, xy1, xy2) }
// VBROADCASTF128: Broadcast 128 Bit of Floating-Point Data.
//
// Forms:
//
// VBROADCASTF128 m128 ymm
//
// Construct and append a VBROADCASTF128 instruction to the active function.
func (c *Context) VBROADCASTF128(m, y operand.Op) {
c.addinstruction(x86.VBROADCASTF128(m, y))
}
// VBROADCASTF128: Broadcast 128 Bit of Floating-Point Data.
//
// Forms:
//
// VBROADCASTF128 m128 ymm
//
// Construct and append a VBROADCASTF128 instruction to the active function.
// Operates on the global context.
func VBROADCASTF128(m, y operand.Op) { ctx.VBROADCASTF128(m, y) }
// VBROADCASTF32X2: Broadcast Two Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X2 m64 k ymm
// VBROADCASTF32X2 m64 ymm
// VBROADCASTF32X2 xmm k ymm
// VBROADCASTF32X2 xmm ymm
// VBROADCASTF32X2 m64 k zmm
// VBROADCASTF32X2 m64 zmm
// VBROADCASTF32X2 xmm k zmm
// VBROADCASTF32X2 xmm zmm
//
// Construct and append a VBROADCASTF32X2 instruction to the active function.
func (c *Context) VBROADCASTF32X2(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTF32X2(ops...))
}
// VBROADCASTF32X2: Broadcast Two Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X2 m64 k ymm
// VBROADCASTF32X2 m64 ymm
// VBROADCASTF32X2 xmm k ymm
// VBROADCASTF32X2 xmm ymm
// VBROADCASTF32X2 m64 k zmm
// VBROADCASTF32X2 m64 zmm
// VBROADCASTF32X2 xmm k zmm
// VBROADCASTF32X2 xmm zmm
//
// Construct and append a VBROADCASTF32X2 instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X2(ops ...operand.Op) { ctx.VBROADCASTF32X2(ops...) }
// VBROADCASTF32X2_Z: Broadcast Two Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X2.Z m64 k ymm
// VBROADCASTF32X2.Z xmm k ymm
// VBROADCASTF32X2.Z m64 k zmm
// VBROADCASTF32X2.Z xmm k zmm
//
// Construct and append a VBROADCASTF32X2.Z instruction to the active function.
func (c *Context) VBROADCASTF32X2_Z(mx, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTF32X2_Z(mx, k, yz))
}
// VBROADCASTF32X2_Z: Broadcast Two Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X2.Z m64 k ymm
// VBROADCASTF32X2.Z xmm k ymm
// VBROADCASTF32X2.Z m64 k zmm
// VBROADCASTF32X2.Z xmm k zmm
//
// Construct and append a VBROADCASTF32X2.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X2_Z(mx, k, yz operand.Op) { ctx.VBROADCASTF32X2_Z(mx, k, yz) }
// VBROADCASTF32X4: Broadcast Four Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X4 m128 k ymm
// VBROADCASTF32X4 m128 ymm
// VBROADCASTF32X4 m128 k zmm
// VBROADCASTF32X4 m128 zmm
//
// Construct and append a VBROADCASTF32X4 instruction to the active function.
func (c *Context) VBROADCASTF32X4(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTF32X4(ops...))
}
// VBROADCASTF32X4: Broadcast Four Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X4 m128 k ymm
// VBROADCASTF32X4 m128 ymm
// VBROADCASTF32X4 m128 k zmm
// VBROADCASTF32X4 m128 zmm
//
// Construct and append a VBROADCASTF32X4 instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X4(ops ...operand.Op) { ctx.VBROADCASTF32X4(ops...) }
// VBROADCASTF32X4_Z: Broadcast Four Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X4.Z m128 k ymm
// VBROADCASTF32X4.Z m128 k zmm
//
// Construct and append a VBROADCASTF32X4.Z instruction to the active function.
func (c *Context) VBROADCASTF32X4_Z(m, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTF32X4_Z(m, k, yz))
}
// VBROADCASTF32X4_Z: Broadcast Four Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X4.Z m128 k ymm
// VBROADCASTF32X4.Z m128 k zmm
//
// Construct and append a VBROADCASTF32X4.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X4_Z(m, k, yz operand.Op) { ctx.VBROADCASTF32X4_Z(m, k, yz) }
// VBROADCASTF32X8: Broadcast Eight Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X8 m256 k zmm
// VBROADCASTF32X8 m256 zmm
//
// Construct and append a VBROADCASTF32X8 instruction to the active function.
func (c *Context) VBROADCASTF32X8(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTF32X8(ops...))
}
// VBROADCASTF32X8: Broadcast Eight Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X8 m256 k zmm
// VBROADCASTF32X8 m256 zmm
//
// Construct and append a VBROADCASTF32X8 instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X8(ops ...operand.Op) { ctx.VBROADCASTF32X8(ops...) }
// VBROADCASTF32X8_Z: Broadcast Eight Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X8.Z m256 k zmm
//
// Construct and append a VBROADCASTF32X8.Z instruction to the active function.
func (c *Context) VBROADCASTF32X8_Z(m, k, z operand.Op) {
c.addinstruction(x86.VBROADCASTF32X8_Z(m, k, z))
}
// VBROADCASTF32X8_Z: Broadcast Eight Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X8.Z m256 k zmm
//
// Construct and append a VBROADCASTF32X8.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTF32X8_Z(m, k, z operand.Op) { ctx.VBROADCASTF32X8_Z(m, k, z) }
// VBROADCASTF64X2: Broadcast Two Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X2 m128 k ymm
// VBROADCASTF64X2 m128 ymm
// VBROADCASTF64X2 m128 k zmm
// VBROADCASTF64X2 m128 zmm
//
// Construct and append a VBROADCASTF64X2 instruction to the active function.
func (c *Context) VBROADCASTF64X2(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTF64X2(ops...))
}
// VBROADCASTF64X2: Broadcast Two Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X2 m128 k ymm
// VBROADCASTF64X2 m128 ymm
// VBROADCASTF64X2 m128 k zmm
// VBROADCASTF64X2 m128 zmm
//
// Construct and append a VBROADCASTF64X2 instruction to the active function.
// Operates on the global context.
func VBROADCASTF64X2(ops ...operand.Op) { ctx.VBROADCASTF64X2(ops...) }
// VBROADCASTF64X2_Z: Broadcast Two Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X2.Z m128 k ymm
// VBROADCASTF64X2.Z m128 k zmm
//
// Construct and append a VBROADCASTF64X2.Z instruction to the active function.
func (c *Context) VBROADCASTF64X2_Z(m, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTF64X2_Z(m, k, yz))
}
// VBROADCASTF64X2_Z: Broadcast Two Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X2.Z m128 k ymm
// VBROADCASTF64X2.Z m128 k zmm
//
// Construct and append a VBROADCASTF64X2.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTF64X2_Z(m, k, yz operand.Op) { ctx.VBROADCASTF64X2_Z(m, k, yz) }
// VBROADCASTF64X4: Broadcast Four Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X4 m256 k zmm
// VBROADCASTF64X4 m256 zmm
//
// Construct and append a VBROADCASTF64X4 instruction to the active function.
func (c *Context) VBROADCASTF64X4(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTF64X4(ops...))
}
// VBROADCASTF64X4: Broadcast Four Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X4 m256 k zmm
// VBROADCASTF64X4 m256 zmm
//
// Construct and append a VBROADCASTF64X4 instruction to the active function.
// Operates on the global context.
func VBROADCASTF64X4(ops ...operand.Op) { ctx.VBROADCASTF64X4(ops...) }
// VBROADCASTF64X4_Z: Broadcast Four Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X4.Z m256 k zmm
//
// Construct and append a VBROADCASTF64X4.Z instruction to the active function.
func (c *Context) VBROADCASTF64X4_Z(m, k, z operand.Op) {
c.addinstruction(x86.VBROADCASTF64X4_Z(m, k, z))
}
// VBROADCASTF64X4_Z: Broadcast Four Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X4.Z m256 k zmm
//
// Construct and append a VBROADCASTF64X4.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTF64X4_Z(m, k, z operand.Op) { ctx.VBROADCASTF64X4_Z(m, k, z) }
// VBROADCASTI128: Broadcast 128 Bits of Integer Data.
//
// Forms:
//
// VBROADCASTI128 m128 ymm
//
// Construct and append a VBROADCASTI128 instruction to the active function.
func (c *Context) VBROADCASTI128(m, y operand.Op) {
c.addinstruction(x86.VBROADCASTI128(m, y))
}
// VBROADCASTI128: Broadcast 128 Bits of Integer Data.
//
// Forms:
//
// VBROADCASTI128 m128 ymm
//
// Construct and append a VBROADCASTI128 instruction to the active function.
// Operates on the global context.
func VBROADCASTI128(m, y operand.Op) { ctx.VBROADCASTI128(m, y) }
// VBROADCASTI32X2: Broadcast Two Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X2 m64 k xmm
// VBROADCASTI32X2 m64 k ymm
// VBROADCASTI32X2 m64 xmm
// VBROADCASTI32X2 m64 ymm
// VBROADCASTI32X2 xmm k xmm
// VBROADCASTI32X2 xmm k ymm
// VBROADCASTI32X2 xmm xmm
// VBROADCASTI32X2 xmm ymm
// VBROADCASTI32X2 m64 k zmm
// VBROADCASTI32X2 m64 zmm
// VBROADCASTI32X2 xmm k zmm
// VBROADCASTI32X2 xmm zmm
//
// Construct and append a VBROADCASTI32X2 instruction to the active function.
func (c *Context) VBROADCASTI32X2(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTI32X2(ops...))
}
// VBROADCASTI32X2: Broadcast Two Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X2 m64 k xmm
// VBROADCASTI32X2 m64 k ymm
// VBROADCASTI32X2 m64 xmm
// VBROADCASTI32X2 m64 ymm
// VBROADCASTI32X2 xmm k xmm
// VBROADCASTI32X2 xmm k ymm
// VBROADCASTI32X2 xmm xmm
// VBROADCASTI32X2 xmm ymm
// VBROADCASTI32X2 m64 k zmm
// VBROADCASTI32X2 m64 zmm
// VBROADCASTI32X2 xmm k zmm
// VBROADCASTI32X2 xmm zmm
//
// Construct and append a VBROADCASTI32X2 instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X2(ops ...operand.Op) { ctx.VBROADCASTI32X2(ops...) }
// VBROADCASTI32X2_Z: Broadcast Two Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X2.Z m64 k xmm
// VBROADCASTI32X2.Z m64 k ymm
// VBROADCASTI32X2.Z xmm k xmm
// VBROADCASTI32X2.Z xmm k ymm
// VBROADCASTI32X2.Z m64 k zmm
// VBROADCASTI32X2.Z xmm k zmm
//
// Construct and append a VBROADCASTI32X2.Z instruction to the active function.
func (c *Context) VBROADCASTI32X2_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VBROADCASTI32X2_Z(mx, k, xyz))
}
// VBROADCASTI32X2_Z: Broadcast Two Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X2.Z m64 k xmm
// VBROADCASTI32X2.Z m64 k ymm
// VBROADCASTI32X2.Z xmm k xmm
// VBROADCASTI32X2.Z xmm k ymm
// VBROADCASTI32X2.Z m64 k zmm
// VBROADCASTI32X2.Z xmm k zmm
//
// Construct and append a VBROADCASTI32X2.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X2_Z(mx, k, xyz operand.Op) { ctx.VBROADCASTI32X2_Z(mx, k, xyz) }
// VBROADCASTI32X4: Broadcast Four Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X4 m128 k ymm
// VBROADCASTI32X4 m128 ymm
// VBROADCASTI32X4 m128 k zmm
// VBROADCASTI32X4 m128 zmm
//
// Construct and append a VBROADCASTI32X4 instruction to the active function.
func (c *Context) VBROADCASTI32X4(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTI32X4(ops...))
}
// VBROADCASTI32X4: Broadcast Four Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X4 m128 k ymm
// VBROADCASTI32X4 m128 ymm
// VBROADCASTI32X4 m128 k zmm
// VBROADCASTI32X4 m128 zmm
//
// Construct and append a VBROADCASTI32X4 instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X4(ops ...operand.Op) { ctx.VBROADCASTI32X4(ops...) }
// VBROADCASTI32X4_Z: Broadcast Four Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X4.Z m128 k ymm
// VBROADCASTI32X4.Z m128 k zmm
//
// Construct and append a VBROADCASTI32X4.Z instruction to the active function.
func (c *Context) VBROADCASTI32X4_Z(m, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTI32X4_Z(m, k, yz))
}
// VBROADCASTI32X4_Z: Broadcast Four Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X4.Z m128 k ymm
// VBROADCASTI32X4.Z m128 k zmm
//
// Construct and append a VBROADCASTI32X4.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X4_Z(m, k, yz operand.Op) { ctx.VBROADCASTI32X4_Z(m, k, yz) }
// VBROADCASTI32X8: Broadcast Eight Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X8 m256 k zmm
// VBROADCASTI32X8 m256 zmm
//
// Construct and append a VBROADCASTI32X8 instruction to the active function.
func (c *Context) VBROADCASTI32X8(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTI32X8(ops...))
}
// VBROADCASTI32X8: Broadcast Eight Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X8 m256 k zmm
// VBROADCASTI32X8 m256 zmm
//
// Construct and append a VBROADCASTI32X8 instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X8(ops ...operand.Op) { ctx.VBROADCASTI32X8(ops...) }
// VBROADCASTI32X8_Z: Broadcast Eight Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X8.Z m256 k zmm
//
// Construct and append a VBROADCASTI32X8.Z instruction to the active function.
func (c *Context) VBROADCASTI32X8_Z(m, k, z operand.Op) {
c.addinstruction(x86.VBROADCASTI32X8_Z(m, k, z))
}
// VBROADCASTI32X8_Z: Broadcast Eight Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X8.Z m256 k zmm
//
// Construct and append a VBROADCASTI32X8.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTI32X8_Z(m, k, z operand.Op) { ctx.VBROADCASTI32X8_Z(m, k, z) }
// VBROADCASTI64X2: Broadcast Two Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X2 m128 k ymm
// VBROADCASTI64X2 m128 ymm
// VBROADCASTI64X2 m128 k zmm
// VBROADCASTI64X2 m128 zmm
//
// Construct and append a VBROADCASTI64X2 instruction to the active function.
func (c *Context) VBROADCASTI64X2(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTI64X2(ops...))
}
// VBROADCASTI64X2: Broadcast Two Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X2 m128 k ymm
// VBROADCASTI64X2 m128 ymm
// VBROADCASTI64X2 m128 k zmm
// VBROADCASTI64X2 m128 zmm
//
// Construct and append a VBROADCASTI64X2 instruction to the active function.
// Operates on the global context.
func VBROADCASTI64X2(ops ...operand.Op) { ctx.VBROADCASTI64X2(ops...) }
// VBROADCASTI64X2_Z: Broadcast Two Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X2.Z m128 k ymm
// VBROADCASTI64X2.Z m128 k zmm
//
// Construct and append a VBROADCASTI64X2.Z instruction to the active function.
func (c *Context) VBROADCASTI64X2_Z(m, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTI64X2_Z(m, k, yz))
}
// VBROADCASTI64X2_Z: Broadcast Two Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X2.Z m128 k ymm
// VBROADCASTI64X2.Z m128 k zmm
//
// Construct and append a VBROADCASTI64X2.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTI64X2_Z(m, k, yz operand.Op) { ctx.VBROADCASTI64X2_Z(m, k, yz) }
// VBROADCASTI64X4: Broadcast Four Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X4 m256 k zmm
// VBROADCASTI64X4 m256 zmm
//
// Construct and append a VBROADCASTI64X4 instruction to the active function.
func (c *Context) VBROADCASTI64X4(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTI64X4(ops...))
}
// VBROADCASTI64X4: Broadcast Four Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X4 m256 k zmm
// VBROADCASTI64X4 m256 zmm
//
// Construct and append a VBROADCASTI64X4 instruction to the active function.
// Operates on the global context.
func VBROADCASTI64X4(ops ...operand.Op) { ctx.VBROADCASTI64X4(ops...) }
// VBROADCASTI64X4_Z: Broadcast Four Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X4.Z m256 k zmm
//
// Construct and append a VBROADCASTI64X4.Z instruction to the active function.
func (c *Context) VBROADCASTI64X4_Z(m, k, z operand.Op) {
c.addinstruction(x86.VBROADCASTI64X4_Z(m, k, z))
}
// VBROADCASTI64X4_Z: Broadcast Four Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X4.Z m256 k zmm
//
// Construct and append a VBROADCASTI64X4.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTI64X4_Z(m, k, z operand.Op) { ctx.VBROADCASTI64X4_Z(m, k, z) }
// VBROADCASTSD: Broadcast Double-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSD xmm ymm
// VBROADCASTSD m64 ymm
// VBROADCASTSD m64 k ymm
// VBROADCASTSD xmm k ymm
// VBROADCASTSD m64 k zmm
// VBROADCASTSD m64 zmm
// VBROADCASTSD xmm k zmm
// VBROADCASTSD xmm zmm
//
// Construct and append a VBROADCASTSD instruction to the active function.
func (c *Context) VBROADCASTSD(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTSD(ops...))
}
// VBROADCASTSD: Broadcast Double-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSD xmm ymm
// VBROADCASTSD m64 ymm
// VBROADCASTSD m64 k ymm
// VBROADCASTSD xmm k ymm
// VBROADCASTSD m64 k zmm
// VBROADCASTSD m64 zmm
// VBROADCASTSD xmm k zmm
// VBROADCASTSD xmm zmm
//
// Construct and append a VBROADCASTSD instruction to the active function.
// Operates on the global context.
func VBROADCASTSD(ops ...operand.Op) { ctx.VBROADCASTSD(ops...) }
// VBROADCASTSD_Z: Broadcast Double-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSD.Z m64 k ymm
// VBROADCASTSD.Z xmm k ymm
// VBROADCASTSD.Z m64 k zmm
// VBROADCASTSD.Z xmm k zmm
//
// Construct and append a VBROADCASTSD.Z instruction to the active function.
func (c *Context) VBROADCASTSD_Z(mx, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTSD_Z(mx, k, yz))
}
// VBROADCASTSD_Z: Broadcast Double-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSD.Z m64 k ymm
// VBROADCASTSD.Z xmm k ymm
// VBROADCASTSD.Z m64 k zmm
// VBROADCASTSD.Z xmm k zmm
//
// Construct and append a VBROADCASTSD.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTSD_Z(mx, k, yz operand.Op) { ctx.VBROADCASTSD_Z(mx, k, yz) }
// VBROADCASTSS: Broadcast Single-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSS xmm xmm
// VBROADCASTSS xmm ymm
// VBROADCASTSS m32 xmm
// VBROADCASTSS m32 ymm
// VBROADCASTSS m32 k ymm
// VBROADCASTSS xmm k ymm
// VBROADCASTSS m32 k zmm
// VBROADCASTSS m32 zmm
// VBROADCASTSS xmm k zmm
// VBROADCASTSS xmm zmm
//
// Construct and append a VBROADCASTSS instruction to the active function.
func (c *Context) VBROADCASTSS(ops ...operand.Op) {
c.addinstruction(x86.VBROADCASTSS(ops...))
}
// VBROADCASTSS: Broadcast Single-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSS xmm xmm
// VBROADCASTSS xmm ymm
// VBROADCASTSS m32 xmm
// VBROADCASTSS m32 ymm
// VBROADCASTSS m32 k ymm
// VBROADCASTSS xmm k ymm
// VBROADCASTSS m32 k zmm
// VBROADCASTSS m32 zmm
// VBROADCASTSS xmm k zmm
// VBROADCASTSS xmm zmm
//
// Construct and append a VBROADCASTSS instruction to the active function.
// Operates on the global context.
func VBROADCASTSS(ops ...operand.Op) { ctx.VBROADCASTSS(ops...) }
// VBROADCASTSS_Z: Broadcast Single-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSS.Z m32 k ymm
// VBROADCASTSS.Z xmm k ymm
// VBROADCASTSS.Z m32 k zmm
// VBROADCASTSS.Z xmm k zmm
//
// Construct and append a VBROADCASTSS.Z instruction to the active function.
func (c *Context) VBROADCASTSS_Z(mx, k, yz operand.Op) {
c.addinstruction(x86.VBROADCASTSS_Z(mx, k, yz))
}
// VBROADCASTSS_Z: Broadcast Single-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSS.Z m32 k ymm
// VBROADCASTSS.Z xmm k ymm
// VBROADCASTSS.Z m32 k zmm
// VBROADCASTSS.Z xmm k zmm
//
// Construct and append a VBROADCASTSS.Z instruction to the active function.
// Operates on the global context.
func VBROADCASTSS_Z(mx, k, yz operand.Op) { ctx.VBROADCASTSS_Z(mx, k, yz) }
// VCMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPD imm8 m128 xmm xmm
// VCMPPD imm8 m256 ymm ymm
// VCMPPD imm8 xmm xmm xmm
// VCMPPD imm8 ymm ymm ymm
// VCMPPD imm8 m128 xmm k k
// VCMPPD imm8 m128 xmm k
// VCMPPD imm8 m256 ymm k k
// VCMPPD imm8 m256 ymm k
// VCMPPD imm8 xmm xmm k k
// VCMPPD imm8 xmm xmm k
// VCMPPD imm8 ymm ymm k k
// VCMPPD imm8 ymm ymm k
// VCMPPD imm8 m512 zmm k k
// VCMPPD imm8 m512 zmm k
// VCMPPD imm8 zmm zmm k k
// VCMPPD imm8 zmm zmm k
//
// Construct and append a VCMPPD instruction to the active function.
func (c *Context) VCMPPD(ops ...operand.Op) {
c.addinstruction(x86.VCMPPD(ops...))
}
// VCMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPD imm8 m128 xmm xmm
// VCMPPD imm8 m256 ymm ymm
// VCMPPD imm8 xmm xmm xmm
// VCMPPD imm8 ymm ymm ymm
// VCMPPD imm8 m128 xmm k k
// VCMPPD imm8 m128 xmm k
// VCMPPD imm8 m256 ymm k k
// VCMPPD imm8 m256 ymm k
// VCMPPD imm8 xmm xmm k k
// VCMPPD imm8 xmm xmm k
// VCMPPD imm8 ymm ymm k k
// VCMPPD imm8 ymm ymm k
// VCMPPD imm8 m512 zmm k k
// VCMPPD imm8 m512 zmm k
// VCMPPD imm8 zmm zmm k k
// VCMPPD imm8 zmm zmm k
//
// Construct and append a VCMPPD instruction to the active function.
// Operates on the global context.
func VCMPPD(ops ...operand.Op) { ctx.VCMPPD(ops...) }
// VCMPPD_BCST: Compare Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPD.BCST imm8 m64 xmm k k
// VCMPPD.BCST imm8 m64 xmm k
// VCMPPD.BCST imm8 m64 ymm k k
// VCMPPD.BCST imm8 m64 ymm k
// VCMPPD.BCST imm8 m64 zmm k k
// VCMPPD.BCST imm8 m64 zmm k
//
// Construct and append a VCMPPD.BCST instruction to the active function.
func (c *Context) VCMPPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCMPPD_BCST(ops...))
}
// VCMPPD_BCST: Compare Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPD.BCST imm8 m64 xmm k k
// VCMPPD.BCST imm8 m64 xmm k
// VCMPPD.BCST imm8 m64 ymm k k
// VCMPPD.BCST imm8 m64 ymm k
// VCMPPD.BCST imm8 m64 zmm k k
// VCMPPD.BCST imm8 m64 zmm k
//
// Construct and append a VCMPPD.BCST instruction to the active function.
// Operates on the global context.
func VCMPPD_BCST(ops ...operand.Op) { ctx.VCMPPD_BCST(ops...) }
// VCMPPD_SAE: Compare Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPD.SAE imm8 zmm zmm k k
// VCMPPD.SAE imm8 zmm zmm k
//
// Construct and append a VCMPPD.SAE instruction to the active function.
func (c *Context) VCMPPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCMPPD_SAE(ops...))
}
// VCMPPD_SAE: Compare Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPD.SAE imm8 zmm zmm k k
// VCMPPD.SAE imm8 zmm zmm k
//
// Construct and append a VCMPPD.SAE instruction to the active function.
// Operates on the global context.
func VCMPPD_SAE(ops ...operand.Op) { ctx.VCMPPD_SAE(ops...) }
// VCMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPS imm8 m128 xmm xmm
// VCMPPS imm8 m256 ymm ymm
// VCMPPS imm8 xmm xmm xmm
// VCMPPS imm8 ymm ymm ymm
// VCMPPS imm8 m128 xmm k k
// VCMPPS imm8 m128 xmm k
// VCMPPS imm8 m256 ymm k k
// VCMPPS imm8 m256 ymm k
// VCMPPS imm8 xmm xmm k k
// VCMPPS imm8 xmm xmm k
// VCMPPS imm8 ymm ymm k k
// VCMPPS imm8 ymm ymm k
// VCMPPS imm8 m512 zmm k k
// VCMPPS imm8 m512 zmm k
// VCMPPS imm8 zmm zmm k k
// VCMPPS imm8 zmm zmm k
//
// Construct and append a VCMPPS instruction to the active function.
func (c *Context) VCMPPS(ops ...operand.Op) {
c.addinstruction(x86.VCMPPS(ops...))
}
// VCMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPS imm8 m128 xmm xmm
// VCMPPS imm8 m256 ymm ymm
// VCMPPS imm8 xmm xmm xmm
// VCMPPS imm8 ymm ymm ymm
// VCMPPS imm8 m128 xmm k k
// VCMPPS imm8 m128 xmm k
// VCMPPS imm8 m256 ymm k k
// VCMPPS imm8 m256 ymm k
// VCMPPS imm8 xmm xmm k k
// VCMPPS imm8 xmm xmm k
// VCMPPS imm8 ymm ymm k k
// VCMPPS imm8 ymm ymm k
// VCMPPS imm8 m512 zmm k k
// VCMPPS imm8 m512 zmm k
// VCMPPS imm8 zmm zmm k k
// VCMPPS imm8 zmm zmm k
//
// Construct and append a VCMPPS instruction to the active function.
// Operates on the global context.
func VCMPPS(ops ...operand.Op) { ctx.VCMPPS(ops...) }
// VCMPPS_BCST: Compare Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPS.BCST imm8 m32 xmm k k
// VCMPPS.BCST imm8 m32 xmm k
// VCMPPS.BCST imm8 m32 ymm k k
// VCMPPS.BCST imm8 m32 ymm k
// VCMPPS.BCST imm8 m32 zmm k k
// VCMPPS.BCST imm8 m32 zmm k
//
// Construct and append a VCMPPS.BCST instruction to the active function.
func (c *Context) VCMPPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCMPPS_BCST(ops...))
}
// VCMPPS_BCST: Compare Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPS.BCST imm8 m32 xmm k k
// VCMPPS.BCST imm8 m32 xmm k
// VCMPPS.BCST imm8 m32 ymm k k
// VCMPPS.BCST imm8 m32 ymm k
// VCMPPS.BCST imm8 m32 zmm k k
// VCMPPS.BCST imm8 m32 zmm k
//
// Construct and append a VCMPPS.BCST instruction to the active function.
// Operates on the global context.
func VCMPPS_BCST(ops ...operand.Op) { ctx.VCMPPS_BCST(ops...) }
// VCMPPS_SAE: Compare Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPS.SAE imm8 zmm zmm k k
// VCMPPS.SAE imm8 zmm zmm k
//
// Construct and append a VCMPPS.SAE instruction to the active function.
func (c *Context) VCMPPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCMPPS_SAE(ops...))
}
// VCMPPS_SAE: Compare Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPS.SAE imm8 zmm zmm k k
// VCMPPS.SAE imm8 zmm zmm k
//
// Construct and append a VCMPPS.SAE instruction to the active function.
// Operates on the global context.
func VCMPPS_SAE(ops ...operand.Op) { ctx.VCMPPS_SAE(ops...) }
// VCMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSD imm8 m64 xmm xmm
// VCMPSD imm8 xmm xmm xmm
// VCMPSD imm8 m64 xmm k k
// VCMPSD imm8 m64 xmm k
// VCMPSD imm8 xmm xmm k k
// VCMPSD imm8 xmm xmm k
//
// Construct and append a VCMPSD instruction to the active function.
func (c *Context) VCMPSD(ops ...operand.Op) {
c.addinstruction(x86.VCMPSD(ops...))
}
// VCMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSD imm8 m64 xmm xmm
// VCMPSD imm8 xmm xmm xmm
// VCMPSD imm8 m64 xmm k k
// VCMPSD imm8 m64 xmm k
// VCMPSD imm8 xmm xmm k k
// VCMPSD imm8 xmm xmm k
//
// Construct and append a VCMPSD instruction to the active function.
// Operates on the global context.
func VCMPSD(ops ...operand.Op) { ctx.VCMPSD(ops...) }
// VCMPSD_SAE: Compare Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSD.SAE imm8 xmm xmm k k
// VCMPSD.SAE imm8 xmm xmm k
//
// Construct and append a VCMPSD.SAE instruction to the active function.
func (c *Context) VCMPSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCMPSD_SAE(ops...))
}
// VCMPSD_SAE: Compare Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSD.SAE imm8 xmm xmm k k
// VCMPSD.SAE imm8 xmm xmm k
//
// Construct and append a VCMPSD.SAE instruction to the active function.
// Operates on the global context.
func VCMPSD_SAE(ops ...operand.Op) { ctx.VCMPSD_SAE(ops...) }
// VCMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSS imm8 m32 xmm xmm
// VCMPSS imm8 xmm xmm xmm
// VCMPSS imm8 m32 xmm k k
// VCMPSS imm8 m32 xmm k
// VCMPSS imm8 xmm xmm k k
// VCMPSS imm8 xmm xmm k
//
// Construct and append a VCMPSS instruction to the active function.
func (c *Context) VCMPSS(ops ...operand.Op) {
c.addinstruction(x86.VCMPSS(ops...))
}
// VCMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSS imm8 m32 xmm xmm
// VCMPSS imm8 xmm xmm xmm
// VCMPSS imm8 m32 xmm k k
// VCMPSS imm8 m32 xmm k
// VCMPSS imm8 xmm xmm k k
// VCMPSS imm8 xmm xmm k
//
// Construct and append a VCMPSS instruction to the active function.
// Operates on the global context.
func VCMPSS(ops ...operand.Op) { ctx.VCMPSS(ops...) }
// VCMPSS_SAE: Compare Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSS.SAE imm8 xmm xmm k k
// VCMPSS.SAE imm8 xmm xmm k
//
// Construct and append a VCMPSS.SAE instruction to the active function.
func (c *Context) VCMPSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCMPSS_SAE(ops...))
}
// VCMPSS_SAE: Compare Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSS.SAE imm8 xmm xmm k k
// VCMPSS.SAE imm8 xmm xmm k
//
// Construct and append a VCMPSS.SAE instruction to the active function.
// Operates on the global context.
func VCMPSS_SAE(ops ...operand.Op) { ctx.VCMPSS_SAE(ops...) }
// VCOMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISD m64 xmm
// VCOMISD xmm xmm
//
// Construct and append a VCOMISD instruction to the active function.
func (c *Context) VCOMISD(mx, x operand.Op) {
c.addinstruction(x86.VCOMISD(mx, x))
}
// VCOMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISD m64 xmm
// VCOMISD xmm xmm
//
// Construct and append a VCOMISD instruction to the active function.
// Operates on the global context.
func VCOMISD(mx, x operand.Op) { ctx.VCOMISD(mx, x) }
// VCOMISD_SAE: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISD.SAE xmm xmm
//
// Construct and append a VCOMISD.SAE instruction to the active function.
func (c *Context) VCOMISD_SAE(x, x1 operand.Op) {
c.addinstruction(x86.VCOMISD_SAE(x, x1))
}
// VCOMISD_SAE: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISD.SAE xmm xmm
//
// Construct and append a VCOMISD.SAE instruction to the active function.
// Operates on the global context.
func VCOMISD_SAE(x, x1 operand.Op) { ctx.VCOMISD_SAE(x, x1) }
// VCOMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISS m32 xmm
// VCOMISS xmm xmm
//
// Construct and append a VCOMISS instruction to the active function.
func (c *Context) VCOMISS(mx, x operand.Op) {
c.addinstruction(x86.VCOMISS(mx, x))
}
// VCOMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISS m32 xmm
// VCOMISS xmm xmm
//
// Construct and append a VCOMISS instruction to the active function.
// Operates on the global context.
func VCOMISS(mx, x operand.Op) { ctx.VCOMISS(mx, x) }
// VCOMISS_SAE: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISS.SAE xmm xmm
//
// Construct and append a VCOMISS.SAE instruction to the active function.
func (c *Context) VCOMISS_SAE(x, x1 operand.Op) {
c.addinstruction(x86.VCOMISS_SAE(x, x1))
}
// VCOMISS_SAE: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISS.SAE xmm xmm
//
// Construct and append a VCOMISS.SAE instruction to the active function.
// Operates on the global context.
func VCOMISS_SAE(x, x1 operand.Op) { ctx.VCOMISS_SAE(x, x1) }
// VCOMPRESSPD: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPD xmm k m128
// VCOMPRESSPD xmm k xmm
// VCOMPRESSPD xmm m128
// VCOMPRESSPD xmm xmm
// VCOMPRESSPD ymm k m256
// VCOMPRESSPD ymm k ymm
// VCOMPRESSPD ymm m256
// VCOMPRESSPD ymm ymm
// VCOMPRESSPD zmm k m512
// VCOMPRESSPD zmm k zmm
// VCOMPRESSPD zmm m512
// VCOMPRESSPD zmm zmm
//
// Construct and append a VCOMPRESSPD instruction to the active function.
func (c *Context) VCOMPRESSPD(ops ...operand.Op) {
c.addinstruction(x86.VCOMPRESSPD(ops...))
}
// VCOMPRESSPD: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPD xmm k m128
// VCOMPRESSPD xmm k xmm
// VCOMPRESSPD xmm m128
// VCOMPRESSPD xmm xmm
// VCOMPRESSPD ymm k m256
// VCOMPRESSPD ymm k ymm
// VCOMPRESSPD ymm m256
// VCOMPRESSPD ymm ymm
// VCOMPRESSPD zmm k m512
// VCOMPRESSPD zmm k zmm
// VCOMPRESSPD zmm m512
// VCOMPRESSPD zmm zmm
//
// Construct and append a VCOMPRESSPD instruction to the active function.
// Operates on the global context.
func VCOMPRESSPD(ops ...operand.Op) { ctx.VCOMPRESSPD(ops...) }
// VCOMPRESSPD_Z: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPD.Z xmm k m128
// VCOMPRESSPD.Z xmm k xmm
// VCOMPRESSPD.Z ymm k m256
// VCOMPRESSPD.Z ymm k ymm
// VCOMPRESSPD.Z zmm k m512
// VCOMPRESSPD.Z zmm k zmm
//
// Construct and append a VCOMPRESSPD.Z instruction to the active function.
func (c *Context) VCOMPRESSPD_Z(xyz, k, mxyz operand.Op) {
c.addinstruction(x86.VCOMPRESSPD_Z(xyz, k, mxyz))
}
// VCOMPRESSPD_Z: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPD.Z xmm k m128
// VCOMPRESSPD.Z xmm k xmm
// VCOMPRESSPD.Z ymm k m256
// VCOMPRESSPD.Z ymm k ymm
// VCOMPRESSPD.Z zmm k m512
// VCOMPRESSPD.Z zmm k zmm
//
// Construct and append a VCOMPRESSPD.Z instruction to the active function.
// Operates on the global context.
func VCOMPRESSPD_Z(xyz, k, mxyz operand.Op) { ctx.VCOMPRESSPD_Z(xyz, k, mxyz) }
// VCOMPRESSPS: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPS xmm k m128
// VCOMPRESSPS xmm k xmm
// VCOMPRESSPS xmm m128
// VCOMPRESSPS xmm xmm
// VCOMPRESSPS ymm k m256
// VCOMPRESSPS ymm k ymm
// VCOMPRESSPS ymm m256
// VCOMPRESSPS ymm ymm
// VCOMPRESSPS zmm k m512
// VCOMPRESSPS zmm k zmm
// VCOMPRESSPS zmm m512
// VCOMPRESSPS zmm zmm
//
// Construct and append a VCOMPRESSPS instruction to the active function.
func (c *Context) VCOMPRESSPS(ops ...operand.Op) {
c.addinstruction(x86.VCOMPRESSPS(ops...))
}
// VCOMPRESSPS: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPS xmm k m128
// VCOMPRESSPS xmm k xmm
// VCOMPRESSPS xmm m128
// VCOMPRESSPS xmm xmm
// VCOMPRESSPS ymm k m256
// VCOMPRESSPS ymm k ymm
// VCOMPRESSPS ymm m256
// VCOMPRESSPS ymm ymm
// VCOMPRESSPS zmm k m512
// VCOMPRESSPS zmm k zmm
// VCOMPRESSPS zmm m512
// VCOMPRESSPS zmm zmm
//
// Construct and append a VCOMPRESSPS instruction to the active function.
// Operates on the global context.
func VCOMPRESSPS(ops ...operand.Op) { ctx.VCOMPRESSPS(ops...) }
// VCOMPRESSPS_Z: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPS.Z xmm k m128
// VCOMPRESSPS.Z xmm k xmm
// VCOMPRESSPS.Z ymm k m256
// VCOMPRESSPS.Z ymm k ymm
// VCOMPRESSPS.Z zmm k m512
// VCOMPRESSPS.Z zmm k zmm
//
// Construct and append a VCOMPRESSPS.Z instruction to the active function.
func (c *Context) VCOMPRESSPS_Z(xyz, k, mxyz operand.Op) {
c.addinstruction(x86.VCOMPRESSPS_Z(xyz, k, mxyz))
}
// VCOMPRESSPS_Z: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPS.Z xmm k m128
// VCOMPRESSPS.Z xmm k xmm
// VCOMPRESSPS.Z ymm k m256
// VCOMPRESSPS.Z ymm k ymm
// VCOMPRESSPS.Z zmm k m512
// VCOMPRESSPS.Z zmm k zmm
//
// Construct and append a VCOMPRESSPS.Z instruction to the active function.
// Operates on the global context.
func VCOMPRESSPS_Z(xyz, k, mxyz operand.Op) { ctx.VCOMPRESSPS_Z(xyz, k, mxyz) }
// VCVTDQ2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PD m128 ymm
// VCVTDQ2PD m64 xmm
// VCVTDQ2PD xmm xmm
// VCVTDQ2PD xmm ymm
// VCVTDQ2PD m128 k ymm
// VCVTDQ2PD m64 k xmm
// VCVTDQ2PD xmm k xmm
// VCVTDQ2PD xmm k ymm
// VCVTDQ2PD m256 k zmm
// VCVTDQ2PD m256 zmm
// VCVTDQ2PD ymm k zmm
// VCVTDQ2PD ymm zmm
//
// Construct and append a VCVTDQ2PD instruction to the active function.
func (c *Context) VCVTDQ2PD(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PD(ops...))
}
// VCVTDQ2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PD m128 ymm
// VCVTDQ2PD m64 xmm
// VCVTDQ2PD xmm xmm
// VCVTDQ2PD xmm ymm
// VCVTDQ2PD m128 k ymm
// VCVTDQ2PD m64 k xmm
// VCVTDQ2PD xmm k xmm
// VCVTDQ2PD xmm k ymm
// VCVTDQ2PD m256 k zmm
// VCVTDQ2PD m256 zmm
// VCVTDQ2PD ymm k zmm
// VCVTDQ2PD ymm zmm
//
// Construct and append a VCVTDQ2PD instruction to the active function.
// Operates on the global context.
func VCVTDQ2PD(ops ...operand.Op) { ctx.VCVTDQ2PD(ops...) }
// VCVTDQ2PD_BCST: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PD.BCST m32 k xmm
// VCVTDQ2PD.BCST m32 k ymm
// VCVTDQ2PD.BCST m32 xmm
// VCVTDQ2PD.BCST m32 ymm
// VCVTDQ2PD.BCST m32 k zmm
// VCVTDQ2PD.BCST m32 zmm
//
// Construct and append a VCVTDQ2PD.BCST instruction to the active function.
func (c *Context) VCVTDQ2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PD_BCST(ops...))
}
// VCVTDQ2PD_BCST: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PD.BCST m32 k xmm
// VCVTDQ2PD.BCST m32 k ymm
// VCVTDQ2PD.BCST m32 xmm
// VCVTDQ2PD.BCST m32 ymm
// VCVTDQ2PD.BCST m32 k zmm
// VCVTDQ2PD.BCST m32 zmm
//
// Construct and append a VCVTDQ2PD.BCST instruction to the active function.
// Operates on the global context.
func VCVTDQ2PD_BCST(ops ...operand.Op) { ctx.VCVTDQ2PD_BCST(ops...) }
// VCVTDQ2PD_BCST_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.BCST.Z m32 k xmm
// VCVTDQ2PD.BCST.Z m32 k ymm
// VCVTDQ2PD.BCST.Z m32 k zmm
//
// Construct and append a VCVTDQ2PD.BCST.Z instruction to the active function.
func (c *Context) VCVTDQ2PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTDQ2PD_BCST_Z(m, k, xyz))
}
// VCVTDQ2PD_BCST_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.BCST.Z m32 k xmm
// VCVTDQ2PD.BCST.Z m32 k ymm
// VCVTDQ2PD.BCST.Z m32 k zmm
//
// Construct and append a VCVTDQ2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PD_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTDQ2PD_BCST_Z(m, k, xyz) }
// VCVTDQ2PD_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.Z m128 k ymm
// VCVTDQ2PD.Z m64 k xmm
// VCVTDQ2PD.Z xmm k xmm
// VCVTDQ2PD.Z xmm k ymm
// VCVTDQ2PD.Z m256 k zmm
// VCVTDQ2PD.Z ymm k zmm
//
// Construct and append a VCVTDQ2PD.Z instruction to the active function.
func (c *Context) VCVTDQ2PD_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTDQ2PD_Z(mxy, k, xyz))
}
// VCVTDQ2PD_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.Z m128 k ymm
// VCVTDQ2PD.Z m64 k xmm
// VCVTDQ2PD.Z xmm k xmm
// VCVTDQ2PD.Z xmm k ymm
// VCVTDQ2PD.Z m256 k zmm
// VCVTDQ2PD.Z ymm k zmm
//
// Construct and append a VCVTDQ2PD.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PD_Z(mxy, k, xyz operand.Op) { ctx.VCVTDQ2PD_Z(mxy, k, xyz) }
// VCVTDQ2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PS m128 xmm
// VCVTDQ2PS m256 ymm
// VCVTDQ2PS xmm xmm
// VCVTDQ2PS ymm ymm
// VCVTDQ2PS m128 k xmm
// VCVTDQ2PS m256 k ymm
// VCVTDQ2PS xmm k xmm
// VCVTDQ2PS ymm k ymm
// VCVTDQ2PS m512 k zmm
// VCVTDQ2PS m512 zmm
// VCVTDQ2PS zmm k zmm
// VCVTDQ2PS zmm zmm
//
// Construct and append a VCVTDQ2PS instruction to the active function.
func (c *Context) VCVTDQ2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS(ops...))
}
// VCVTDQ2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PS m128 xmm
// VCVTDQ2PS m256 ymm
// VCVTDQ2PS xmm xmm
// VCVTDQ2PS ymm ymm
// VCVTDQ2PS m128 k xmm
// VCVTDQ2PS m256 k ymm
// VCVTDQ2PS xmm k xmm
// VCVTDQ2PS ymm k ymm
// VCVTDQ2PS m512 k zmm
// VCVTDQ2PS m512 zmm
// VCVTDQ2PS zmm k zmm
// VCVTDQ2PS zmm zmm
//
// Construct and append a VCVTDQ2PS instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS(ops ...operand.Op) { ctx.VCVTDQ2PS(ops...) }
// VCVTDQ2PS_BCST: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PS.BCST m32 k xmm
// VCVTDQ2PS.BCST m32 k ymm
// VCVTDQ2PS.BCST m32 xmm
// VCVTDQ2PS.BCST m32 ymm
// VCVTDQ2PS.BCST m32 k zmm
// VCVTDQ2PS.BCST m32 zmm
//
// Construct and append a VCVTDQ2PS.BCST instruction to the active function.
func (c *Context) VCVTDQ2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_BCST(ops...))
}
// VCVTDQ2PS_BCST: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PS.BCST m32 k xmm
// VCVTDQ2PS.BCST m32 k ymm
// VCVTDQ2PS.BCST m32 xmm
// VCVTDQ2PS.BCST m32 ymm
// VCVTDQ2PS.BCST m32 k zmm
// VCVTDQ2PS.BCST m32 zmm
//
// Construct and append a VCVTDQ2PS.BCST instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_BCST(ops ...operand.Op) { ctx.VCVTDQ2PS_BCST(ops...) }
// VCVTDQ2PS_BCST_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.BCST.Z m32 k xmm
// VCVTDQ2PS.BCST.Z m32 k ymm
// VCVTDQ2PS.BCST.Z m32 k zmm
//
// Construct and append a VCVTDQ2PS.BCST.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_BCST_Z(m, k, xyz))
}
// VCVTDQ2PS_BCST_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.BCST.Z m32 k xmm
// VCVTDQ2PS.BCST.Z m32 k ymm
// VCVTDQ2PS.BCST.Z m32 k zmm
//
// Construct and append a VCVTDQ2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTDQ2PS_BCST_Z(m, k, xyz) }
// VCVTDQ2PS_RD_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE zmm k zmm
// VCVTDQ2PS.RD_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RD_SAE instruction to the active function.
func (c *Context) VCVTDQ2PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RD_SAE(ops...))
}
// VCVTDQ2PS_RD_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE zmm k zmm
// VCVTDQ2PS.RD_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RD_SAE(ops ...operand.Op) { ctx.VCVTDQ2PS_RD_SAE(ops...) }
// VCVTDQ2PS_RD_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RD_SAE_Z(z, k, z1))
}
// VCVTDQ2PS_RD_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTDQ2PS_RD_SAE_Z(z, k, z1) }
// VCVTDQ2PS_RN_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE zmm k zmm
// VCVTDQ2PS.RN_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RN_SAE instruction to the active function.
func (c *Context) VCVTDQ2PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RN_SAE(ops...))
}
// VCVTDQ2PS_RN_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE zmm k zmm
// VCVTDQ2PS.RN_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RN_SAE(ops ...operand.Op) { ctx.VCVTDQ2PS_RN_SAE(ops...) }
// VCVTDQ2PS_RN_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RN_SAE_Z(z, k, z1))
}
// VCVTDQ2PS_RN_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTDQ2PS_RN_SAE_Z(z, k, z1) }
// VCVTDQ2PS_RU_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE zmm k zmm
// VCVTDQ2PS.RU_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RU_SAE instruction to the active function.
func (c *Context) VCVTDQ2PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RU_SAE(ops...))
}
// VCVTDQ2PS_RU_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE zmm k zmm
// VCVTDQ2PS.RU_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RU_SAE(ops ...operand.Op) { ctx.VCVTDQ2PS_RU_SAE(ops...) }
// VCVTDQ2PS_RU_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RU_SAE_Z(z, k, z1))
}
// VCVTDQ2PS_RU_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTDQ2PS_RU_SAE_Z(z, k, z1) }
// VCVTDQ2PS_RZ_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE zmm k zmm
// VCVTDQ2PS.RZ_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RZ_SAE instruction to the active function.
func (c *Context) VCVTDQ2PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RZ_SAE(ops...))
}
// VCVTDQ2PS_RZ_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE zmm k zmm
// VCVTDQ2PS.RZ_SAE zmm zmm
//
// Construct and append a VCVTDQ2PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RZ_SAE(ops ...operand.Op) { ctx.VCVTDQ2PS_RZ_SAE(ops...) }
// VCVTDQ2PS_RZ_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_RZ_SAE_Z(z, k, z1))
}
// VCVTDQ2PS_RZ_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTDQ2PS_RZ_SAE_Z(z, k, z1) }
// VCVTDQ2PS_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.Z m128 k xmm
// VCVTDQ2PS.Z m256 k ymm
// VCVTDQ2PS.Z xmm k xmm
// VCVTDQ2PS.Z ymm k ymm
// VCVTDQ2PS.Z m512 k zmm
// VCVTDQ2PS.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.Z instruction to the active function.
func (c *Context) VCVTDQ2PS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTDQ2PS_Z(mxyz, k, xyz))
}
// VCVTDQ2PS_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.Z m128 k xmm
// VCVTDQ2PS.Z m256 k ymm
// VCVTDQ2PS.Z xmm k xmm
// VCVTDQ2PS.Z ymm k ymm
// VCVTDQ2PS.Z m512 k zmm
// VCVTDQ2PS.Z zmm k zmm
//
// Construct and append a VCVTDQ2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTDQ2PS_Z(mxyz, k, xyz operand.Op) { ctx.VCVTDQ2PS_Z(mxyz, k, xyz) }
// VCVTPD2DQ: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQ m512 k ymm
// VCVTPD2DQ m512 ymm
// VCVTPD2DQ zmm k ymm
// VCVTPD2DQ zmm ymm
//
// Construct and append a VCVTPD2DQ instruction to the active function.
func (c *Context) VCVTPD2DQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ(ops...))
}
// VCVTPD2DQ: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQ m512 k ymm
// VCVTPD2DQ m512 ymm
// VCVTPD2DQ zmm k ymm
// VCVTPD2DQ zmm ymm
//
// Construct and append a VCVTPD2DQ instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ(ops ...operand.Op) { ctx.VCVTPD2DQ(ops...) }
// VCVTPD2DQX: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQX m128 xmm
// VCVTPD2DQX xmm xmm
// VCVTPD2DQX m128 k xmm
// VCVTPD2DQX xmm k xmm
//
// Construct and append a VCVTPD2DQX instruction to the active function.
func (c *Context) VCVTPD2DQX(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQX(ops...))
}
// VCVTPD2DQX: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQX m128 xmm
// VCVTPD2DQX xmm xmm
// VCVTPD2DQX m128 k xmm
// VCVTPD2DQX xmm k xmm
//
// Construct and append a VCVTPD2DQX instruction to the active function.
// Operates on the global context.
func VCVTPD2DQX(ops ...operand.Op) { ctx.VCVTPD2DQX(ops...) }
// VCVTPD2DQX_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQX.BCST m64 k xmm
// VCVTPD2DQX.BCST m64 xmm
//
// Construct and append a VCVTPD2DQX.BCST instruction to the active function.
func (c *Context) VCVTPD2DQX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQX_BCST(ops...))
}
// VCVTPD2DQX_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQX.BCST m64 k xmm
// VCVTPD2DQX.BCST m64 xmm
//
// Construct and append a VCVTPD2DQX.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2DQX_BCST(ops ...operand.Op) { ctx.VCVTPD2DQX_BCST(ops...) }
// VCVTPD2DQX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2DQX.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2DQX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2DQX_BCST_Z(m, k, x))
}
// VCVTPD2DQX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2DQX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQX_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2DQX_BCST_Z(m, k, x) }
// VCVTPD2DQX_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.Z m128 k xmm
// VCVTPD2DQX.Z xmm k xmm
//
// Construct and append a VCVTPD2DQX.Z instruction to the active function.
func (c *Context) VCVTPD2DQX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2DQX_Z(mx, k, x))
}
// VCVTPD2DQX_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.Z m128 k xmm
// VCVTPD2DQX.Z xmm k xmm
//
// Construct and append a VCVTPD2DQX.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQX_Z(mx, k, x operand.Op) { ctx.VCVTPD2DQX_Z(mx, k, x) }
// VCVTPD2DQY: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQY m256 xmm
// VCVTPD2DQY ymm xmm
// VCVTPD2DQY m256 k xmm
// VCVTPD2DQY ymm k xmm
//
// Construct and append a VCVTPD2DQY instruction to the active function.
func (c *Context) VCVTPD2DQY(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQY(ops...))
}
// VCVTPD2DQY: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQY m256 xmm
// VCVTPD2DQY ymm xmm
// VCVTPD2DQY m256 k xmm
// VCVTPD2DQY ymm k xmm
//
// Construct and append a VCVTPD2DQY instruction to the active function.
// Operates on the global context.
func VCVTPD2DQY(ops ...operand.Op) { ctx.VCVTPD2DQY(ops...) }
// VCVTPD2DQY_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQY.BCST m64 k xmm
// VCVTPD2DQY.BCST m64 xmm
//
// Construct and append a VCVTPD2DQY.BCST instruction to the active function.
func (c *Context) VCVTPD2DQY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQY_BCST(ops...))
}
// VCVTPD2DQY_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQY.BCST m64 k xmm
// VCVTPD2DQY.BCST m64 xmm
//
// Construct and append a VCVTPD2DQY.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2DQY_BCST(ops ...operand.Op) { ctx.VCVTPD2DQY_BCST(ops...) }
// VCVTPD2DQY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2DQY.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2DQY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2DQY_BCST_Z(m, k, x))
}
// VCVTPD2DQY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2DQY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQY_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2DQY_BCST_Z(m, k, x) }
// VCVTPD2DQY_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.Z m256 k xmm
// VCVTPD2DQY.Z ymm k xmm
//
// Construct and append a VCVTPD2DQY.Z instruction to the active function.
func (c *Context) VCVTPD2DQY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2DQY_Z(my, k, x))
}
// VCVTPD2DQY_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.Z m256 k xmm
// VCVTPD2DQY.Z ymm k xmm
//
// Construct and append a VCVTPD2DQY.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQY_Z(my, k, x operand.Op) { ctx.VCVTPD2DQY_Z(my, k, x) }
// VCVTPD2DQ_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQ.BCST m64 k ymm
// VCVTPD2DQ.BCST m64 ymm
//
// Construct and append a VCVTPD2DQ.BCST instruction to the active function.
func (c *Context) VCVTPD2DQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_BCST(ops...))
}
// VCVTPD2DQ_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQ.BCST m64 k ymm
// VCVTPD2DQ.BCST m64 ymm
//
// Construct and append a VCVTPD2DQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_BCST(ops ...operand.Op) { ctx.VCVTPD2DQ_BCST(ops...) }
// VCVTPD2DQ_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2DQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_BCST_Z(m, k, y))
}
// VCVTPD2DQ_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2DQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_BCST_Z(m, k, y operand.Op) { ctx.VCVTPD2DQ_BCST_Z(m, k, y) }
// VCVTPD2DQ_RD_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE zmm k ymm
// VCVTPD2DQ.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPD2DQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RD_SAE(ops...))
}
// VCVTPD2DQ_RD_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE zmm k ymm
// VCVTPD2DQ.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPD2DQ_RD_SAE(ops...) }
// VCVTPD2DQ_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_RD_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RD_SAE_Z(z, k, y))
}
// VCVTPD2DQ_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RD_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2DQ_RD_SAE_Z(z, k, y) }
// VCVTPD2DQ_RN_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE zmm k ymm
// VCVTPD2DQ.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPD2DQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RN_SAE(ops...))
}
// VCVTPD2DQ_RN_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE zmm k ymm
// VCVTPD2DQ.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPD2DQ_RN_SAE(ops...) }
// VCVTPD2DQ_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_RN_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RN_SAE_Z(z, k, y))
}
// VCVTPD2DQ_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RN_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2DQ_RN_SAE_Z(z, k, y) }
// VCVTPD2DQ_RU_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE zmm k ymm
// VCVTPD2DQ.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPD2DQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RU_SAE(ops...))
}
// VCVTPD2DQ_RU_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE zmm k ymm
// VCVTPD2DQ.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPD2DQ_RU_SAE(ops...) }
// VCVTPD2DQ_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_RU_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RU_SAE_Z(z, k, y))
}
// VCVTPD2DQ_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RU_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2DQ_RU_SAE_Z(z, k, y) }
// VCVTPD2DQ_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE zmm k ymm
// VCVTPD2DQ.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPD2DQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RZ_SAE(ops...))
}
// VCVTPD2DQ_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE zmm k ymm
// VCVTPD2DQ.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2DQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPD2DQ_RZ_SAE(ops...) }
// VCVTPD2DQ_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_RZ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_RZ_SAE_Z(z, k, y))
}
// VCVTPD2DQ_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_RZ_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2DQ_RZ_SAE_Z(z, k, y) }
// VCVTPD2DQ_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.Z m512 k ymm
// VCVTPD2DQ.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.Z instruction to the active function.
func (c *Context) VCVTPD2DQ_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2DQ_Z(mz, k, y))
}
// VCVTPD2DQ_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.Z m512 k ymm
// VCVTPD2DQ.Z zmm k ymm
//
// Construct and append a VCVTPD2DQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2DQ_Z(mz, k, y operand.Op) { ctx.VCVTPD2DQ_Z(mz, k, y) }
// VCVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PS m512 k ymm
// VCVTPD2PS m512 ymm
// VCVTPD2PS zmm k ymm
// VCVTPD2PS zmm ymm
//
// Construct and append a VCVTPD2PS instruction to the active function.
func (c *Context) VCVTPD2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS(ops...))
}
// VCVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PS m512 k ymm
// VCVTPD2PS m512 ymm
// VCVTPD2PS zmm k ymm
// VCVTPD2PS zmm ymm
//
// Construct and append a VCVTPD2PS instruction to the active function.
// Operates on the global context.
func VCVTPD2PS(ops ...operand.Op) { ctx.VCVTPD2PS(ops...) }
// VCVTPD2PSX: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSX m128 xmm
// VCVTPD2PSX xmm xmm
// VCVTPD2PSX m128 k xmm
// VCVTPD2PSX xmm k xmm
//
// Construct and append a VCVTPD2PSX instruction to the active function.
func (c *Context) VCVTPD2PSX(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PSX(ops...))
}
// VCVTPD2PSX: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSX m128 xmm
// VCVTPD2PSX xmm xmm
// VCVTPD2PSX m128 k xmm
// VCVTPD2PSX xmm k xmm
//
// Construct and append a VCVTPD2PSX instruction to the active function.
// Operates on the global context.
func VCVTPD2PSX(ops ...operand.Op) { ctx.VCVTPD2PSX(ops...) }
// VCVTPD2PSX_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSX.BCST m64 k xmm
// VCVTPD2PSX.BCST m64 xmm
//
// Construct and append a VCVTPD2PSX.BCST instruction to the active function.
func (c *Context) VCVTPD2PSX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PSX_BCST(ops...))
}
// VCVTPD2PSX_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSX.BCST m64 k xmm
// VCVTPD2PSX.BCST m64 xmm
//
// Construct and append a VCVTPD2PSX.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2PSX_BCST(ops ...operand.Op) { ctx.VCVTPD2PSX_BCST(ops...) }
// VCVTPD2PSX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2PSX.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2PSX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2PSX_BCST_Z(m, k, x))
}
// VCVTPD2PSX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2PSX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PSX_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2PSX_BCST_Z(m, k, x) }
// VCVTPD2PSX_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.Z m128 k xmm
// VCVTPD2PSX.Z xmm k xmm
//
// Construct and append a VCVTPD2PSX.Z instruction to the active function.
func (c *Context) VCVTPD2PSX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2PSX_Z(mx, k, x))
}
// VCVTPD2PSX_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.Z m128 k xmm
// VCVTPD2PSX.Z xmm k xmm
//
// Construct and append a VCVTPD2PSX.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PSX_Z(mx, k, x operand.Op) { ctx.VCVTPD2PSX_Z(mx, k, x) }
// VCVTPD2PSY: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSY m256 xmm
// VCVTPD2PSY ymm xmm
// VCVTPD2PSY m256 k xmm
// VCVTPD2PSY ymm k xmm
//
// Construct and append a VCVTPD2PSY instruction to the active function.
func (c *Context) VCVTPD2PSY(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PSY(ops...))
}
// VCVTPD2PSY: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSY m256 xmm
// VCVTPD2PSY ymm xmm
// VCVTPD2PSY m256 k xmm
// VCVTPD2PSY ymm k xmm
//
// Construct and append a VCVTPD2PSY instruction to the active function.
// Operates on the global context.
func VCVTPD2PSY(ops ...operand.Op) { ctx.VCVTPD2PSY(ops...) }
// VCVTPD2PSY_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSY.BCST m64 k xmm
// VCVTPD2PSY.BCST m64 xmm
//
// Construct and append a VCVTPD2PSY.BCST instruction to the active function.
func (c *Context) VCVTPD2PSY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PSY_BCST(ops...))
}
// VCVTPD2PSY_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSY.BCST m64 k xmm
// VCVTPD2PSY.BCST m64 xmm
//
// Construct and append a VCVTPD2PSY.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2PSY_BCST(ops ...operand.Op) { ctx.VCVTPD2PSY_BCST(ops...) }
// VCVTPD2PSY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2PSY.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2PSY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2PSY_BCST_Z(m, k, x))
}
// VCVTPD2PSY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2PSY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PSY_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2PSY_BCST_Z(m, k, x) }
// VCVTPD2PSY_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.Z m256 k xmm
// VCVTPD2PSY.Z ymm k xmm
//
// Construct and append a VCVTPD2PSY.Z instruction to the active function.
func (c *Context) VCVTPD2PSY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2PSY_Z(my, k, x))
}
// VCVTPD2PSY_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.Z m256 k xmm
// VCVTPD2PSY.Z ymm k xmm
//
// Construct and append a VCVTPD2PSY.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PSY_Z(my, k, x operand.Op) { ctx.VCVTPD2PSY_Z(my, k, x) }
// VCVTPD2PS_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PS.BCST m64 k ymm
// VCVTPD2PS.BCST m64 ymm
//
// Construct and append a VCVTPD2PS.BCST instruction to the active function.
func (c *Context) VCVTPD2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS_BCST(ops...))
}
// VCVTPD2PS_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PS.BCST m64 k ymm
// VCVTPD2PS.BCST m64 ymm
//
// Construct and append a VCVTPD2PS.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_BCST(ops ...operand.Op) { ctx.VCVTPD2PS_BCST(ops...) }
// VCVTPD2PS_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2PS.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2PS_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_BCST_Z(m, k, y))
}
// VCVTPD2PS_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_BCST_Z(m, k, y operand.Op) { ctx.VCVTPD2PS_BCST_Z(m, k, y) }
// VCVTPD2PS_RD_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2PS.RD_SAE zmm k ymm
// VCVTPD2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RD_SAE instruction to the active function.
func (c *Context) VCVTPD2PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RD_SAE(ops...))
}
// VCVTPD2PS_RD_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2PS.RD_SAE zmm k ymm
// VCVTPD2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RD_SAE(ops ...operand.Op) { ctx.VCVTPD2PS_RD_SAE(ops...) }
// VCVTPD2PS_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2PS_RD_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RD_SAE_Z(z, k, y))
}
// VCVTPD2PS_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RD_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2PS_RD_SAE_Z(z, k, y) }
// VCVTPD2PS_RN_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2PS.RN_SAE zmm k ymm
// VCVTPD2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RN_SAE instruction to the active function.
func (c *Context) VCVTPD2PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RN_SAE(ops...))
}
// VCVTPD2PS_RN_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2PS.RN_SAE zmm k ymm
// VCVTPD2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RN_SAE(ops ...operand.Op) { ctx.VCVTPD2PS_RN_SAE(ops...) }
// VCVTPD2PS_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2PS_RN_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RN_SAE_Z(z, k, y))
}
// VCVTPD2PS_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RN_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2PS_RN_SAE_Z(z, k, y) }
// VCVTPD2PS_RU_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2PS.RU_SAE zmm k ymm
// VCVTPD2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RU_SAE instruction to the active function.
func (c *Context) VCVTPD2PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RU_SAE(ops...))
}
// VCVTPD2PS_RU_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2PS.RU_SAE zmm k ymm
// VCVTPD2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RU_SAE(ops ...operand.Op) { ctx.VCVTPD2PS_RU_SAE(ops...) }
// VCVTPD2PS_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2PS_RU_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RU_SAE_Z(z, k, y))
}
// VCVTPD2PS_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RU_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2PS_RU_SAE_Z(z, k, y) }
// VCVTPD2PS_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE zmm k ymm
// VCVTPD2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RZ_SAE instruction to the active function.
func (c *Context) VCVTPD2PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RZ_SAE(ops...))
}
// VCVTPD2PS_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE zmm k ymm
// VCVTPD2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RZ_SAE(ops ...operand.Op) { ctx.VCVTPD2PS_RZ_SAE(ops...) }
// VCVTPD2PS_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2PS_RZ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_RZ_SAE_Z(z, k, y))
}
// VCVTPD2PS_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_RZ_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2PS_RZ_SAE_Z(z, k, y) }
// VCVTPD2PS_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.Z m512 k ymm
// VCVTPD2PS.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.Z instruction to the active function.
func (c *Context) VCVTPD2PS_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2PS_Z(mz, k, y))
}
// VCVTPD2PS_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.Z m512 k ymm
// VCVTPD2PS.Z zmm k ymm
//
// Construct and append a VCVTPD2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2PS_Z(mz, k, y operand.Op) { ctx.VCVTPD2PS_Z(mz, k, y) }
// VCVTPD2QQ: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTPD2QQ m128 k xmm
// VCVTPD2QQ m128 xmm
// VCVTPD2QQ m256 k ymm
// VCVTPD2QQ m256 ymm
// VCVTPD2QQ xmm k xmm
// VCVTPD2QQ xmm xmm
// VCVTPD2QQ ymm k ymm
// VCVTPD2QQ ymm ymm
// VCVTPD2QQ m512 k zmm
// VCVTPD2QQ m512 zmm
// VCVTPD2QQ zmm k zmm
// VCVTPD2QQ zmm zmm
//
// Construct and append a VCVTPD2QQ instruction to the active function.
func (c *Context) VCVTPD2QQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ(ops...))
}
// VCVTPD2QQ: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTPD2QQ m128 k xmm
// VCVTPD2QQ m128 xmm
// VCVTPD2QQ m256 k ymm
// VCVTPD2QQ m256 ymm
// VCVTPD2QQ xmm k xmm
// VCVTPD2QQ xmm xmm
// VCVTPD2QQ ymm k ymm
// VCVTPD2QQ ymm ymm
// VCVTPD2QQ m512 k zmm
// VCVTPD2QQ m512 zmm
// VCVTPD2QQ zmm k zmm
// VCVTPD2QQ zmm zmm
//
// Construct and append a VCVTPD2QQ instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ(ops ...operand.Op) { ctx.VCVTPD2QQ(ops...) }
// VCVTPD2QQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2QQ.BCST m64 k xmm
// VCVTPD2QQ.BCST m64 k ymm
// VCVTPD2QQ.BCST m64 xmm
// VCVTPD2QQ.BCST m64 ymm
// VCVTPD2QQ.BCST m64 k zmm
// VCVTPD2QQ.BCST m64 zmm
//
// Construct and append a VCVTPD2QQ.BCST instruction to the active function.
func (c *Context) VCVTPD2QQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_BCST(ops...))
}
// VCVTPD2QQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2QQ.BCST m64 k xmm
// VCVTPD2QQ.BCST m64 k ymm
// VCVTPD2QQ.BCST m64 xmm
// VCVTPD2QQ.BCST m64 ymm
// VCVTPD2QQ.BCST m64 k zmm
// VCVTPD2QQ.BCST m64 zmm
//
// Construct and append a VCVTPD2QQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_BCST(ops ...operand.Op) { ctx.VCVTPD2QQ_BCST(ops...) }
// VCVTPD2QQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.BCST.Z m64 k xmm
// VCVTPD2QQ.BCST.Z m64 k ymm
// VCVTPD2QQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTPD2QQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_BCST_Z(m, k, xyz))
}
// VCVTPD2QQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.BCST.Z m64 k xmm
// VCVTPD2QQ.BCST.Z m64 k ymm
// VCVTPD2QQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTPD2QQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPD2QQ_BCST_Z(m, k, xyz) }
// VCVTPD2QQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE zmm k zmm
// VCVTPD2QQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPD2QQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RD_SAE(ops...))
}
// VCVTPD2QQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE zmm k zmm
// VCVTPD2QQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPD2QQ_RD_SAE(ops...) }
// VCVTPD2QQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RD_SAE_Z(z, k, z1))
}
// VCVTPD2QQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2QQ_RD_SAE_Z(z, k, z1) }
// VCVTPD2QQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE zmm k zmm
// VCVTPD2QQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPD2QQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RN_SAE(ops...))
}
// VCVTPD2QQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE zmm k zmm
// VCVTPD2QQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPD2QQ_RN_SAE(ops...) }
// VCVTPD2QQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RN_SAE_Z(z, k, z1))
}
// VCVTPD2QQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2QQ_RN_SAE_Z(z, k, z1) }
// VCVTPD2QQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE zmm k zmm
// VCVTPD2QQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPD2QQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RU_SAE(ops...))
}
// VCVTPD2QQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE zmm k zmm
// VCVTPD2QQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPD2QQ_RU_SAE(ops...) }
// VCVTPD2QQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RU_SAE_Z(z, k, z1))
}
// VCVTPD2QQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2QQ_RU_SAE_Z(z, k, z1) }
// VCVTPD2QQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE zmm k zmm
// VCVTPD2QQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPD2QQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RZ_SAE(ops...))
}
// VCVTPD2QQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE zmm k zmm
// VCVTPD2QQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPD2QQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPD2QQ_RZ_SAE(ops...) }
// VCVTPD2QQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_RZ_SAE_Z(z, k, z1))
}
// VCVTPD2QQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2QQ_RZ_SAE_Z(z, k, z1) }
// VCVTPD2QQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.Z m128 k xmm
// VCVTPD2QQ.Z m256 k ymm
// VCVTPD2QQ.Z xmm k xmm
// VCVTPD2QQ.Z ymm k ymm
// VCVTPD2QQ.Z m512 k zmm
// VCVTPD2QQ.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.Z instruction to the active function.
func (c *Context) VCVTPD2QQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPD2QQ_Z(mxyz, k, xyz))
}
// VCVTPD2QQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.Z m128 k xmm
// VCVTPD2QQ.Z m256 k ymm
// VCVTPD2QQ.Z xmm k xmm
// VCVTPD2QQ.Z ymm k ymm
// VCVTPD2QQ.Z m512 k zmm
// VCVTPD2QQ.Z zmm k zmm
//
// Construct and append a VCVTPD2QQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2QQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTPD2QQ_Z(mxyz, k, xyz) }
// VCVTPD2UDQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQ m512 k ymm
// VCVTPD2UDQ m512 ymm
// VCVTPD2UDQ zmm k ymm
// VCVTPD2UDQ zmm ymm
//
// Construct and append a VCVTPD2UDQ instruction to the active function.
func (c *Context) VCVTPD2UDQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ(ops...))
}
// VCVTPD2UDQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQ m512 k ymm
// VCVTPD2UDQ m512 ymm
// VCVTPD2UDQ zmm k ymm
// VCVTPD2UDQ zmm ymm
//
// Construct and append a VCVTPD2UDQ instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ(ops ...operand.Op) { ctx.VCVTPD2UDQ(ops...) }
// VCVTPD2UDQX: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQX m128 k xmm
// VCVTPD2UDQX m128 xmm
// VCVTPD2UDQX xmm k xmm
// VCVTPD2UDQX xmm xmm
//
// Construct and append a VCVTPD2UDQX instruction to the active function.
func (c *Context) VCVTPD2UDQX(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQX(ops...))
}
// VCVTPD2UDQX: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQX m128 k xmm
// VCVTPD2UDQX m128 xmm
// VCVTPD2UDQX xmm k xmm
// VCVTPD2UDQX xmm xmm
//
// Construct and append a VCVTPD2UDQX instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQX(ops ...operand.Op) { ctx.VCVTPD2UDQX(ops...) }
// VCVTPD2UDQX_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQX.BCST m64 k xmm
// VCVTPD2UDQX.BCST m64 xmm
//
// Construct and append a VCVTPD2UDQX.BCST instruction to the active function.
func (c *Context) VCVTPD2UDQX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQX_BCST(ops...))
}
// VCVTPD2UDQX_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQX.BCST m64 k xmm
// VCVTPD2UDQX.BCST m64 xmm
//
// Construct and append a VCVTPD2UDQX.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQX_BCST(ops ...operand.Op) { ctx.VCVTPD2UDQX_BCST(ops...) }
// VCVTPD2UDQX_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2UDQX.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2UDQX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2UDQX_BCST_Z(m, k, x))
}
// VCVTPD2UDQX_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2UDQX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQX_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2UDQX_BCST_Z(m, k, x) }
// VCVTPD2UDQX_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.Z m128 k xmm
// VCVTPD2UDQX.Z xmm k xmm
//
// Construct and append a VCVTPD2UDQX.Z instruction to the active function.
func (c *Context) VCVTPD2UDQX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2UDQX_Z(mx, k, x))
}
// VCVTPD2UDQX_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.Z m128 k xmm
// VCVTPD2UDQX.Z xmm k xmm
//
// Construct and append a VCVTPD2UDQX.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQX_Z(mx, k, x operand.Op) { ctx.VCVTPD2UDQX_Z(mx, k, x) }
// VCVTPD2UDQY: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQY m256 k xmm
// VCVTPD2UDQY m256 xmm
// VCVTPD2UDQY ymm k xmm
// VCVTPD2UDQY ymm xmm
//
// Construct and append a VCVTPD2UDQY instruction to the active function.
func (c *Context) VCVTPD2UDQY(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQY(ops...))
}
// VCVTPD2UDQY: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQY m256 k xmm
// VCVTPD2UDQY m256 xmm
// VCVTPD2UDQY ymm k xmm
// VCVTPD2UDQY ymm xmm
//
// Construct and append a VCVTPD2UDQY instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQY(ops ...operand.Op) { ctx.VCVTPD2UDQY(ops...) }
// VCVTPD2UDQY_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQY.BCST m64 k xmm
// VCVTPD2UDQY.BCST m64 xmm
//
// Construct and append a VCVTPD2UDQY.BCST instruction to the active function.
func (c *Context) VCVTPD2UDQY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQY_BCST(ops...))
}
// VCVTPD2UDQY_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQY.BCST m64 k xmm
// VCVTPD2UDQY.BCST m64 xmm
//
// Construct and append a VCVTPD2UDQY.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQY_BCST(ops ...operand.Op) { ctx.VCVTPD2UDQY_BCST(ops...) }
// VCVTPD2UDQY_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2UDQY.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2UDQY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2UDQY_BCST_Z(m, k, x))
}
// VCVTPD2UDQY_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTPD2UDQY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQY_BCST_Z(m, k, x operand.Op) { ctx.VCVTPD2UDQY_BCST_Z(m, k, x) }
// VCVTPD2UDQY_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.Z m256 k xmm
// VCVTPD2UDQY.Z ymm k xmm
//
// Construct and append a VCVTPD2UDQY.Z instruction to the active function.
func (c *Context) VCVTPD2UDQY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTPD2UDQY_Z(my, k, x))
}
// VCVTPD2UDQY_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.Z m256 k xmm
// VCVTPD2UDQY.Z ymm k xmm
//
// Construct and append a VCVTPD2UDQY.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQY_Z(my, k, x operand.Op) { ctx.VCVTPD2UDQY_Z(my, k, x) }
// VCVTPD2UDQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQ.BCST m64 k ymm
// VCVTPD2UDQ.BCST m64 ymm
//
// Construct and append a VCVTPD2UDQ.BCST instruction to the active function.
func (c *Context) VCVTPD2UDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_BCST(ops...))
}
// VCVTPD2UDQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQ.BCST m64 k ymm
// VCVTPD2UDQ.BCST m64 ymm
//
// Construct and append a VCVTPD2UDQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_BCST(ops ...operand.Op) { ctx.VCVTPD2UDQ_BCST(ops...) }
// VCVTPD2UDQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2UDQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_BCST_Z(m, k, y))
}
// VCVTPD2UDQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTPD2UDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_BCST_Z(m, k, y operand.Op) { ctx.VCVTPD2UDQ_BCST_Z(m, k, y) }
// VCVTPD2UDQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE zmm k ymm
// VCVTPD2UDQ.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPD2UDQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RD_SAE(ops...))
}
// VCVTPD2UDQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE zmm k ymm
// VCVTPD2UDQ.RD_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPD2UDQ_RD_SAE(ops...) }
// VCVTPD2UDQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_RD_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RD_SAE_Z(z, k, y))
}
// VCVTPD2UDQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RD_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2UDQ_RD_SAE_Z(z, k, y) }
// VCVTPD2UDQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE zmm k ymm
// VCVTPD2UDQ.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPD2UDQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RN_SAE(ops...))
}
// VCVTPD2UDQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE zmm k ymm
// VCVTPD2UDQ.RN_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPD2UDQ_RN_SAE(ops...) }
// VCVTPD2UDQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_RN_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RN_SAE_Z(z, k, y))
}
// VCVTPD2UDQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RN_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2UDQ_RN_SAE_Z(z, k, y) }
// VCVTPD2UDQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE zmm k ymm
// VCVTPD2UDQ.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPD2UDQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RU_SAE(ops...))
}
// VCVTPD2UDQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE zmm k ymm
// VCVTPD2UDQ.RU_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPD2UDQ_RU_SAE(ops...) }
// VCVTPD2UDQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_RU_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RU_SAE_Z(z, k, y))
}
// VCVTPD2UDQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RU_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2UDQ_RU_SAE_Z(z, k, y) }
// VCVTPD2UDQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE zmm k ymm
// VCVTPD2UDQ.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPD2UDQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RZ_SAE(ops...))
}
// VCVTPD2UDQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE zmm k ymm
// VCVTPD2UDQ.RZ_SAE zmm ymm
//
// Construct and append a VCVTPD2UDQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPD2UDQ_RZ_SAE(ops...) }
// VCVTPD2UDQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_RZ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_RZ_SAE_Z(z, k, y))
}
// VCVTPD2UDQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_RZ_SAE_Z(z, k, y operand.Op) { ctx.VCVTPD2UDQ_RZ_SAE_Z(z, k, y) }
// VCVTPD2UDQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.Z m512 k ymm
// VCVTPD2UDQ.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.Z instruction to the active function.
func (c *Context) VCVTPD2UDQ_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTPD2UDQ_Z(mz, k, y))
}
// VCVTPD2UDQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.Z m512 k ymm
// VCVTPD2UDQ.Z zmm k ymm
//
// Construct and append a VCVTPD2UDQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UDQ_Z(mz, k, y operand.Op) { ctx.VCVTPD2UDQ_Z(mz, k, y) }
// VCVTPD2UQQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTPD2UQQ m128 k xmm
// VCVTPD2UQQ m128 xmm
// VCVTPD2UQQ m256 k ymm
// VCVTPD2UQQ m256 ymm
// VCVTPD2UQQ xmm k xmm
// VCVTPD2UQQ xmm xmm
// VCVTPD2UQQ ymm k ymm
// VCVTPD2UQQ ymm ymm
// VCVTPD2UQQ m512 k zmm
// VCVTPD2UQQ m512 zmm
// VCVTPD2UQQ zmm k zmm
// VCVTPD2UQQ zmm zmm
//
// Construct and append a VCVTPD2UQQ instruction to the active function.
func (c *Context) VCVTPD2UQQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ(ops...))
}
// VCVTPD2UQQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTPD2UQQ m128 k xmm
// VCVTPD2UQQ m128 xmm
// VCVTPD2UQQ m256 k ymm
// VCVTPD2UQQ m256 ymm
// VCVTPD2UQQ xmm k xmm
// VCVTPD2UQQ xmm xmm
// VCVTPD2UQQ ymm k ymm
// VCVTPD2UQQ ymm ymm
// VCVTPD2UQQ m512 k zmm
// VCVTPD2UQQ m512 zmm
// VCVTPD2UQQ zmm k zmm
// VCVTPD2UQQ zmm zmm
//
// Construct and append a VCVTPD2UQQ instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ(ops ...operand.Op) { ctx.VCVTPD2UQQ(ops...) }
// VCVTPD2UQQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UQQ.BCST m64 k xmm
// VCVTPD2UQQ.BCST m64 k ymm
// VCVTPD2UQQ.BCST m64 xmm
// VCVTPD2UQQ.BCST m64 ymm
// VCVTPD2UQQ.BCST m64 k zmm
// VCVTPD2UQQ.BCST m64 zmm
//
// Construct and append a VCVTPD2UQQ.BCST instruction to the active function.
func (c *Context) VCVTPD2UQQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_BCST(ops...))
}
// VCVTPD2UQQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UQQ.BCST m64 k xmm
// VCVTPD2UQQ.BCST m64 k ymm
// VCVTPD2UQQ.BCST m64 xmm
// VCVTPD2UQQ.BCST m64 ymm
// VCVTPD2UQQ.BCST m64 k zmm
// VCVTPD2UQQ.BCST m64 zmm
//
// Construct and append a VCVTPD2UQQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_BCST(ops ...operand.Op) { ctx.VCVTPD2UQQ_BCST(ops...) }
// VCVTPD2UQQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.BCST.Z m64 k xmm
// VCVTPD2UQQ.BCST.Z m64 k ymm
// VCVTPD2UQQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTPD2UQQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_BCST_Z(m, k, xyz))
}
// VCVTPD2UQQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.BCST.Z m64 k xmm
// VCVTPD2UQQ.BCST.Z m64 k ymm
// VCVTPD2UQQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTPD2UQQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPD2UQQ_BCST_Z(m, k, xyz) }
// VCVTPD2UQQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE zmm k zmm
// VCVTPD2UQQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPD2UQQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RD_SAE(ops...))
}
// VCVTPD2UQQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE zmm k zmm
// VCVTPD2UQQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPD2UQQ_RD_SAE(ops...) }
// VCVTPD2UQQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RD_SAE_Z(z, k, z1))
}
// VCVTPD2UQQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2UQQ_RD_SAE_Z(z, k, z1) }
// VCVTPD2UQQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE zmm k zmm
// VCVTPD2UQQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPD2UQQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RN_SAE(ops...))
}
// VCVTPD2UQQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE zmm k zmm
// VCVTPD2UQQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPD2UQQ_RN_SAE(ops...) }
// VCVTPD2UQQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RN_SAE_Z(z, k, z1))
}
// VCVTPD2UQQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2UQQ_RN_SAE_Z(z, k, z1) }
// VCVTPD2UQQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE zmm k zmm
// VCVTPD2UQQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPD2UQQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RU_SAE(ops...))
}
// VCVTPD2UQQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE zmm k zmm
// VCVTPD2UQQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPD2UQQ_RU_SAE(ops...) }
// VCVTPD2UQQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RU_SAE_Z(z, k, z1))
}
// VCVTPD2UQQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2UQQ_RU_SAE_Z(z, k, z1) }
// VCVTPD2UQQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE zmm k zmm
// VCVTPD2UQQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPD2UQQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RZ_SAE(ops...))
}
// VCVTPD2UQQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE zmm k zmm
// VCVTPD2UQQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPD2UQQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPD2UQQ_RZ_SAE(ops...) }
// VCVTPD2UQQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_RZ_SAE_Z(z, k, z1))
}
// VCVTPD2UQQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPD2UQQ_RZ_SAE_Z(z, k, z1) }
// VCVTPD2UQQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.Z m128 k xmm
// VCVTPD2UQQ.Z m256 k ymm
// VCVTPD2UQQ.Z xmm k xmm
// VCVTPD2UQQ.Z ymm k ymm
// VCVTPD2UQQ.Z m512 k zmm
// VCVTPD2UQQ.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.Z instruction to the active function.
func (c *Context) VCVTPD2UQQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPD2UQQ_Z(mxyz, k, xyz))
}
// VCVTPD2UQQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.Z m128 k xmm
// VCVTPD2UQQ.Z m256 k ymm
// VCVTPD2UQQ.Z xmm k xmm
// VCVTPD2UQQ.Z ymm k ymm
// VCVTPD2UQQ.Z m512 k zmm
// VCVTPD2UQQ.Z zmm k zmm
//
// Construct and append a VCVTPD2UQQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPD2UQQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTPD2UQQ_Z(mxyz, k, xyz) }
// VCVTPH2PS: Convert Half-Precision FP Values to Single-Precision FP Values.
//
// Forms:
//
// VCVTPH2PS m128 ymm
// VCVTPH2PS m64 xmm
// VCVTPH2PS xmm xmm
// VCVTPH2PS xmm ymm
// VCVTPH2PS m128 k ymm
// VCVTPH2PS m64 k xmm
// VCVTPH2PS xmm k xmm
// VCVTPH2PS xmm k ymm
// VCVTPH2PS m256 k zmm
// VCVTPH2PS m256 zmm
// VCVTPH2PS ymm k zmm
// VCVTPH2PS ymm zmm
//
// Construct and append a VCVTPH2PS instruction to the active function.
func (c *Context) VCVTPH2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTPH2PS(ops...))
}
// VCVTPH2PS: Convert Half-Precision FP Values to Single-Precision FP Values.
//
// Forms:
//
// VCVTPH2PS m128 ymm
// VCVTPH2PS m64 xmm
// VCVTPH2PS xmm xmm
// VCVTPH2PS xmm ymm
// VCVTPH2PS m128 k ymm
// VCVTPH2PS m64 k xmm
// VCVTPH2PS xmm k xmm
// VCVTPH2PS xmm k ymm
// VCVTPH2PS m256 k zmm
// VCVTPH2PS m256 zmm
// VCVTPH2PS ymm k zmm
// VCVTPH2PS ymm zmm
//
// Construct and append a VCVTPH2PS instruction to the active function.
// Operates on the global context.
func VCVTPH2PS(ops ...operand.Op) { ctx.VCVTPH2PS(ops...) }
// VCVTPH2PS_SAE: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPH2PS.SAE ymm k zmm
// VCVTPH2PS.SAE ymm zmm
//
// Construct and append a VCVTPH2PS.SAE instruction to the active function.
func (c *Context) VCVTPH2PS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPH2PS_SAE(ops...))
}
// VCVTPH2PS_SAE: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPH2PS.SAE ymm k zmm
// VCVTPH2PS.SAE ymm zmm
//
// Construct and append a VCVTPH2PS.SAE instruction to the active function.
// Operates on the global context.
func VCVTPH2PS_SAE(ops ...operand.Op) { ctx.VCVTPH2PS_SAE(ops...) }
// VCVTPH2PS_SAE_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.SAE.Z ymm k zmm
//
// Construct and append a VCVTPH2PS.SAE.Z instruction to the active function.
func (c *Context) VCVTPH2PS_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPH2PS_SAE_Z(y, k, z))
}
// VCVTPH2PS_SAE_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.SAE.Z ymm k zmm
//
// Construct and append a VCVTPH2PS.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPH2PS_SAE_Z(y, k, z operand.Op) { ctx.VCVTPH2PS_SAE_Z(y, k, z) }
// VCVTPH2PS_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.Z m128 k ymm
// VCVTPH2PS.Z m64 k xmm
// VCVTPH2PS.Z xmm k xmm
// VCVTPH2PS.Z xmm k ymm
// VCVTPH2PS.Z m256 k zmm
// VCVTPH2PS.Z ymm k zmm
//
// Construct and append a VCVTPH2PS.Z instruction to the active function.
func (c *Context) VCVTPH2PS_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPH2PS_Z(mxy, k, xyz))
}
// VCVTPH2PS_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.Z m128 k ymm
// VCVTPH2PS.Z m64 k xmm
// VCVTPH2PS.Z xmm k xmm
// VCVTPH2PS.Z xmm k ymm
// VCVTPH2PS.Z m256 k zmm
// VCVTPH2PS.Z ymm k zmm
//
// Construct and append a VCVTPH2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTPH2PS_Z(mxy, k, xyz operand.Op) { ctx.VCVTPH2PS_Z(mxy, k, xyz) }
// VCVTPS2DQ: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPS2DQ m128 xmm
// VCVTPS2DQ m256 ymm
// VCVTPS2DQ xmm xmm
// VCVTPS2DQ ymm ymm
// VCVTPS2DQ m128 k xmm
// VCVTPS2DQ m256 k ymm
// VCVTPS2DQ xmm k xmm
// VCVTPS2DQ ymm k ymm
// VCVTPS2DQ m512 k zmm
// VCVTPS2DQ m512 zmm
// VCVTPS2DQ zmm k zmm
// VCVTPS2DQ zmm zmm
//
// Construct and append a VCVTPS2DQ instruction to the active function.
func (c *Context) VCVTPS2DQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ(ops...))
}
// VCVTPS2DQ: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPS2DQ m128 xmm
// VCVTPS2DQ m256 ymm
// VCVTPS2DQ xmm xmm
// VCVTPS2DQ ymm ymm
// VCVTPS2DQ m128 k xmm
// VCVTPS2DQ m256 k ymm
// VCVTPS2DQ xmm k xmm
// VCVTPS2DQ ymm k ymm
// VCVTPS2DQ m512 k zmm
// VCVTPS2DQ m512 zmm
// VCVTPS2DQ zmm k zmm
// VCVTPS2DQ zmm zmm
//
// Construct and append a VCVTPS2DQ instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ(ops ...operand.Op) { ctx.VCVTPS2DQ(ops...) }
// VCVTPS2DQ_BCST: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPS2DQ.BCST m32 k xmm
// VCVTPS2DQ.BCST m32 k ymm
// VCVTPS2DQ.BCST m32 xmm
// VCVTPS2DQ.BCST m32 ymm
// VCVTPS2DQ.BCST m32 k zmm
// VCVTPS2DQ.BCST m32 zmm
//
// Construct and append a VCVTPS2DQ.BCST instruction to the active function.
func (c *Context) VCVTPS2DQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_BCST(ops...))
}
// VCVTPS2DQ_BCST: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPS2DQ.BCST m32 k xmm
// VCVTPS2DQ.BCST m32 k ymm
// VCVTPS2DQ.BCST m32 xmm
// VCVTPS2DQ.BCST m32 ymm
// VCVTPS2DQ.BCST m32 k zmm
// VCVTPS2DQ.BCST m32 zmm
//
// Construct and append a VCVTPS2DQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_BCST(ops ...operand.Op) { ctx.VCVTPS2DQ_BCST(ops...) }
// VCVTPS2DQ_BCST_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.BCST.Z m32 k xmm
// VCVTPS2DQ.BCST.Z m32 k ymm
// VCVTPS2DQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2DQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_BCST_Z(m, k, xyz))
}
// VCVTPS2DQ_BCST_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.BCST.Z m32 k xmm
// VCVTPS2DQ.BCST.Z m32 k ymm
// VCVTPS2DQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2DQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPS2DQ_BCST_Z(m, k, xyz) }
// VCVTPS2DQ_RD_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE zmm k zmm
// VCVTPS2DQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPS2DQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RD_SAE(ops...))
}
// VCVTPS2DQ_RD_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE zmm k zmm
// VCVTPS2DQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPS2DQ_RD_SAE(ops...) }
// VCVTPS2DQ_RD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RD_SAE_Z(z, k, z1))
}
// VCVTPS2DQ_RD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2DQ_RD_SAE_Z(z, k, z1) }
// VCVTPS2DQ_RN_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE zmm k zmm
// VCVTPS2DQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPS2DQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RN_SAE(ops...))
}
// VCVTPS2DQ_RN_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE zmm k zmm
// VCVTPS2DQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPS2DQ_RN_SAE(ops...) }
// VCVTPS2DQ_RN_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RN_SAE_Z(z, k, z1))
}
// VCVTPS2DQ_RN_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2DQ_RN_SAE_Z(z, k, z1) }
// VCVTPS2DQ_RU_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE zmm k zmm
// VCVTPS2DQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPS2DQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RU_SAE(ops...))
}
// VCVTPS2DQ_RU_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE zmm k zmm
// VCVTPS2DQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPS2DQ_RU_SAE(ops...) }
// VCVTPS2DQ_RU_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RU_SAE_Z(z, k, z1))
}
// VCVTPS2DQ_RU_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2DQ_RU_SAE_Z(z, k, z1) }
// VCVTPS2DQ_RZ_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE zmm k zmm
// VCVTPS2DQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPS2DQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RZ_SAE(ops...))
}
// VCVTPS2DQ_RZ_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE zmm k zmm
// VCVTPS2DQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPS2DQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPS2DQ_RZ_SAE(ops...) }
// VCVTPS2DQ_RZ_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_RZ_SAE_Z(z, k, z1))
}
// VCVTPS2DQ_RZ_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2DQ_RZ_SAE_Z(z, k, z1) }
// VCVTPS2DQ_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.Z m128 k xmm
// VCVTPS2DQ.Z m256 k ymm
// VCVTPS2DQ.Z xmm k xmm
// VCVTPS2DQ.Z ymm k ymm
// VCVTPS2DQ.Z m512 k zmm
// VCVTPS2DQ.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.Z instruction to the active function.
func (c *Context) VCVTPS2DQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2DQ_Z(mxyz, k, xyz))
}
// VCVTPS2DQ_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.Z m128 k xmm
// VCVTPS2DQ.Z m256 k ymm
// VCVTPS2DQ.Z xmm k xmm
// VCVTPS2DQ.Z ymm k ymm
// VCVTPS2DQ.Z m512 k zmm
// VCVTPS2DQ.Z zmm k zmm
//
// Construct and append a VCVTPS2DQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2DQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTPS2DQ_Z(mxyz, k, xyz) }
// VCVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTPS2PD m128 ymm
// VCVTPS2PD m64 xmm
// VCVTPS2PD xmm xmm
// VCVTPS2PD xmm ymm
// VCVTPS2PD m64 k xmm
// VCVTPS2PD xmm k xmm
// VCVTPS2PD m256 k zmm
// VCVTPS2PD m256 zmm
// VCVTPS2PD ymm k zmm
// VCVTPS2PD ymm zmm
// VCVTPS2PD m128 k ymm
// VCVTPS2PD xmm k ymm
//
// Construct and append a VCVTPS2PD instruction to the active function.
func (c *Context) VCVTPS2PD(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2PD(ops...))
}
// VCVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTPS2PD m128 ymm
// VCVTPS2PD m64 xmm
// VCVTPS2PD xmm xmm
// VCVTPS2PD xmm ymm
// VCVTPS2PD m64 k xmm
// VCVTPS2PD xmm k xmm
// VCVTPS2PD m256 k zmm
// VCVTPS2PD m256 zmm
// VCVTPS2PD ymm k zmm
// VCVTPS2PD ymm zmm
// VCVTPS2PD m128 k ymm
// VCVTPS2PD xmm k ymm
//
// Construct and append a VCVTPS2PD instruction to the active function.
// Operates on the global context.
func VCVTPS2PD(ops ...operand.Op) { ctx.VCVTPS2PD(ops...) }
// VCVTPS2PD_BCST: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPS2PD.BCST m32 k xmm
// VCVTPS2PD.BCST m32 xmm
// VCVTPS2PD.BCST m32 k zmm
// VCVTPS2PD.BCST m32 zmm
// VCVTPS2PD.BCST m32 k ymm
// VCVTPS2PD.BCST m32 ymm
//
// Construct and append a VCVTPS2PD.BCST instruction to the active function.
func (c *Context) VCVTPS2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2PD_BCST(ops...))
}
// VCVTPS2PD_BCST: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPS2PD.BCST m32 k xmm
// VCVTPS2PD.BCST m32 xmm
// VCVTPS2PD.BCST m32 k zmm
// VCVTPS2PD.BCST m32 zmm
// VCVTPS2PD.BCST m32 k ymm
// VCVTPS2PD.BCST m32 ymm
//
// Construct and append a VCVTPS2PD.BCST instruction to the active function.
// Operates on the global context.
func VCVTPS2PD_BCST(ops ...operand.Op) { ctx.VCVTPS2PD_BCST(ops...) }
// VCVTPS2PD_BCST_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.BCST.Z m32 k xmm
// VCVTPS2PD.BCST.Z m32 k zmm
// VCVTPS2PD.BCST.Z m32 k ymm
//
// Construct and append a VCVTPS2PD.BCST.Z instruction to the active function.
func (c *Context) VCVTPS2PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2PD_BCST_Z(m, k, xyz))
}
// VCVTPS2PD_BCST_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.BCST.Z m32 k xmm
// VCVTPS2PD.BCST.Z m32 k zmm
// VCVTPS2PD.BCST.Z m32 k ymm
//
// Construct and append a VCVTPS2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2PD_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPS2PD_BCST_Z(m, k, xyz) }
// VCVTPS2PD_SAE: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PD.SAE ymm k zmm
// VCVTPS2PD.SAE ymm zmm
//
// Construct and append a VCVTPS2PD.SAE instruction to the active function.
func (c *Context) VCVTPS2PD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2PD_SAE(ops...))
}
// VCVTPS2PD_SAE: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PD.SAE ymm k zmm
// VCVTPS2PD.SAE ymm zmm
//
// Construct and append a VCVTPS2PD.SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2PD_SAE(ops ...operand.Op) { ctx.VCVTPS2PD_SAE(ops...) }
// VCVTPS2PD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2PD.SAE.Z instruction to the active function.
func (c *Context) VCVTPS2PD_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2PD_SAE_Z(y, k, z))
}
// VCVTPS2PD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2PD.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2PD_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2PD_SAE_Z(y, k, z) }
// VCVTPS2PD_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.Z m64 k xmm
// VCVTPS2PD.Z xmm k xmm
// VCVTPS2PD.Z m256 k zmm
// VCVTPS2PD.Z ymm k zmm
// VCVTPS2PD.Z m128 k ymm
// VCVTPS2PD.Z xmm k ymm
//
// Construct and append a VCVTPS2PD.Z instruction to the active function.
func (c *Context) VCVTPS2PD_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2PD_Z(mxy, k, xyz))
}
// VCVTPS2PD_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.Z m64 k xmm
// VCVTPS2PD.Z xmm k xmm
// VCVTPS2PD.Z m256 k zmm
// VCVTPS2PD.Z ymm k zmm
// VCVTPS2PD.Z m128 k ymm
// VCVTPS2PD.Z xmm k ymm
//
// Construct and append a VCVTPS2PD.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2PD_Z(mxy, k, xyz operand.Op) { ctx.VCVTPS2PD_Z(mxy, k, xyz) }
// VCVTPS2PH: Convert Single-Precision FP value to Half-Precision FP value.
//
// Forms:
//
// VCVTPS2PH imm8 xmm m64
// VCVTPS2PH imm8 xmm xmm
// VCVTPS2PH imm8 ymm m128
// VCVTPS2PH imm8 ymm xmm
// VCVTPS2PH imm8 xmm k m64
// VCVTPS2PH imm8 xmm k xmm
// VCVTPS2PH imm8 ymm k m128
// VCVTPS2PH imm8 ymm k xmm
// VCVTPS2PH imm8 zmm k m256
// VCVTPS2PH imm8 zmm k ymm
// VCVTPS2PH imm8 zmm m256
// VCVTPS2PH imm8 zmm ymm
//
// Construct and append a VCVTPS2PH instruction to the active function.
func (c *Context) VCVTPS2PH(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2PH(ops...))
}
// VCVTPS2PH: Convert Single-Precision FP value to Half-Precision FP value.
//
// Forms:
//
// VCVTPS2PH imm8 xmm m64
// VCVTPS2PH imm8 xmm xmm
// VCVTPS2PH imm8 ymm m128
// VCVTPS2PH imm8 ymm xmm
// VCVTPS2PH imm8 xmm k m64
// VCVTPS2PH imm8 xmm k xmm
// VCVTPS2PH imm8 ymm k m128
// VCVTPS2PH imm8 ymm k xmm
// VCVTPS2PH imm8 zmm k m256
// VCVTPS2PH imm8 zmm k ymm
// VCVTPS2PH imm8 zmm m256
// VCVTPS2PH imm8 zmm ymm
//
// Construct and append a VCVTPS2PH instruction to the active function.
// Operates on the global context.
func VCVTPS2PH(ops ...operand.Op) { ctx.VCVTPS2PH(ops...) }
// VCVTPS2PH_SAE: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PH.SAE imm8 zmm k ymm
// VCVTPS2PH.SAE imm8 zmm ymm
//
// Construct and append a VCVTPS2PH.SAE instruction to the active function.
func (c *Context) VCVTPS2PH_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2PH_SAE(ops...))
}
// VCVTPS2PH_SAE: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PH.SAE imm8 zmm k ymm
// VCVTPS2PH.SAE imm8 zmm ymm
//
// Construct and append a VCVTPS2PH.SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2PH_SAE(ops ...operand.Op) { ctx.VCVTPS2PH_SAE(ops...) }
// VCVTPS2PH_SAE_Z: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.SAE.Z imm8 zmm k ymm
//
// Construct and append a VCVTPS2PH.SAE.Z instruction to the active function.
func (c *Context) VCVTPS2PH_SAE_Z(i, z, k, y operand.Op) {
c.addinstruction(x86.VCVTPS2PH_SAE_Z(i, z, k, y))
}
// VCVTPS2PH_SAE_Z: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.SAE.Z imm8 zmm k ymm
//
// Construct and append a VCVTPS2PH.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2PH_SAE_Z(i, z, k, y operand.Op) { ctx.VCVTPS2PH_SAE_Z(i, z, k, y) }
// VCVTPS2PH_Z: Convert Single-Precision FP value to Half-Precision FP value (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.Z imm8 xmm k m64
// VCVTPS2PH.Z imm8 xmm k xmm
// VCVTPS2PH.Z imm8 ymm k m128
// VCVTPS2PH.Z imm8 ymm k xmm
// VCVTPS2PH.Z imm8 zmm k m256
// VCVTPS2PH.Z imm8 zmm k ymm
//
// Construct and append a VCVTPS2PH.Z instruction to the active function.
func (c *Context) VCVTPS2PH_Z(i, xyz, k, mxy operand.Op) {
c.addinstruction(x86.VCVTPS2PH_Z(i, xyz, k, mxy))
}
// VCVTPS2PH_Z: Convert Single-Precision FP value to Half-Precision FP value (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.Z imm8 xmm k m64
// VCVTPS2PH.Z imm8 xmm k xmm
// VCVTPS2PH.Z imm8 ymm k m128
// VCVTPS2PH.Z imm8 ymm k xmm
// VCVTPS2PH.Z imm8 zmm k m256
// VCVTPS2PH.Z imm8 zmm k ymm
//
// Construct and append a VCVTPS2PH.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2PH_Z(i, xyz, k, mxy operand.Op) { ctx.VCVTPS2PH_Z(i, xyz, k, mxy) }
// VCVTPS2QQ: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTPS2QQ m128 k ymm
// VCVTPS2QQ m128 ymm
// VCVTPS2QQ m64 k xmm
// VCVTPS2QQ m64 xmm
// VCVTPS2QQ xmm k xmm
// VCVTPS2QQ xmm k ymm
// VCVTPS2QQ xmm xmm
// VCVTPS2QQ xmm ymm
// VCVTPS2QQ m256 k zmm
// VCVTPS2QQ m256 zmm
// VCVTPS2QQ ymm k zmm
// VCVTPS2QQ ymm zmm
//
// Construct and append a VCVTPS2QQ instruction to the active function.
func (c *Context) VCVTPS2QQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ(ops...))
}
// VCVTPS2QQ: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTPS2QQ m128 k ymm
// VCVTPS2QQ m128 ymm
// VCVTPS2QQ m64 k xmm
// VCVTPS2QQ m64 xmm
// VCVTPS2QQ xmm k xmm
// VCVTPS2QQ xmm k ymm
// VCVTPS2QQ xmm xmm
// VCVTPS2QQ xmm ymm
// VCVTPS2QQ m256 k zmm
// VCVTPS2QQ m256 zmm
// VCVTPS2QQ ymm k zmm
// VCVTPS2QQ ymm zmm
//
// Construct and append a VCVTPS2QQ instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ(ops ...operand.Op) { ctx.VCVTPS2QQ(ops...) }
// VCVTPS2QQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2QQ.BCST m32 k xmm
// VCVTPS2QQ.BCST m32 k ymm
// VCVTPS2QQ.BCST m32 xmm
// VCVTPS2QQ.BCST m32 ymm
// VCVTPS2QQ.BCST m32 k zmm
// VCVTPS2QQ.BCST m32 zmm
//
// Construct and append a VCVTPS2QQ.BCST instruction to the active function.
func (c *Context) VCVTPS2QQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_BCST(ops...))
}
// VCVTPS2QQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2QQ.BCST m32 k xmm
// VCVTPS2QQ.BCST m32 k ymm
// VCVTPS2QQ.BCST m32 xmm
// VCVTPS2QQ.BCST m32 ymm
// VCVTPS2QQ.BCST m32 k zmm
// VCVTPS2QQ.BCST m32 zmm
//
// Construct and append a VCVTPS2QQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_BCST(ops ...operand.Op) { ctx.VCVTPS2QQ_BCST(ops...) }
// VCVTPS2QQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.BCST.Z m32 k xmm
// VCVTPS2QQ.BCST.Z m32 k ymm
// VCVTPS2QQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2QQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_BCST_Z(m, k, xyz))
}
// VCVTPS2QQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.BCST.Z m32 k xmm
// VCVTPS2QQ.BCST.Z m32 k ymm
// VCVTPS2QQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2QQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPS2QQ_BCST_Z(m, k, xyz) }
// VCVTPS2QQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE ymm k zmm
// VCVTPS2QQ.RD_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPS2QQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RD_SAE(ops...))
}
// VCVTPS2QQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE ymm k zmm
// VCVTPS2QQ.RD_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPS2QQ_RD_SAE(ops...) }
// VCVTPS2QQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_RD_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RD_SAE_Z(y, k, z))
}
// VCVTPS2QQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RD_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2QQ_RD_SAE_Z(y, k, z) }
// VCVTPS2QQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE ymm k zmm
// VCVTPS2QQ.RN_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPS2QQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RN_SAE(ops...))
}
// VCVTPS2QQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE ymm k zmm
// VCVTPS2QQ.RN_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPS2QQ_RN_SAE(ops...) }
// VCVTPS2QQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_RN_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RN_SAE_Z(y, k, z))
}
// VCVTPS2QQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RN_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2QQ_RN_SAE_Z(y, k, z) }
// VCVTPS2QQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE ymm k zmm
// VCVTPS2QQ.RU_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPS2QQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RU_SAE(ops...))
}
// VCVTPS2QQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE ymm k zmm
// VCVTPS2QQ.RU_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPS2QQ_RU_SAE(ops...) }
// VCVTPS2QQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_RU_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RU_SAE_Z(y, k, z))
}
// VCVTPS2QQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RU_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2QQ_RU_SAE_Z(y, k, z) }
// VCVTPS2QQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE ymm k zmm
// VCVTPS2QQ.RZ_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPS2QQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RZ_SAE(ops...))
}
// VCVTPS2QQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE ymm k zmm
// VCVTPS2QQ.RZ_SAE ymm zmm
//
// Construct and append a VCVTPS2QQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPS2QQ_RZ_SAE(ops...) }
// VCVTPS2QQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_RZ_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_RZ_SAE_Z(y, k, z))
}
// VCVTPS2QQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_RZ_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2QQ_RZ_SAE_Z(y, k, z) }
// VCVTPS2QQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.Z m128 k ymm
// VCVTPS2QQ.Z m64 k xmm
// VCVTPS2QQ.Z xmm k xmm
// VCVTPS2QQ.Z xmm k ymm
// VCVTPS2QQ.Z m256 k zmm
// VCVTPS2QQ.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.Z instruction to the active function.
func (c *Context) VCVTPS2QQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2QQ_Z(mxy, k, xyz))
}
// VCVTPS2QQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.Z m128 k ymm
// VCVTPS2QQ.Z m64 k xmm
// VCVTPS2QQ.Z xmm k xmm
// VCVTPS2QQ.Z xmm k ymm
// VCVTPS2QQ.Z m256 k zmm
// VCVTPS2QQ.Z ymm k zmm
//
// Construct and append a VCVTPS2QQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2QQ_Z(mxy, k, xyz operand.Op) { ctx.VCVTPS2QQ_Z(mxy, k, xyz) }
// VCVTPS2UDQ: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTPS2UDQ m128 k xmm
// VCVTPS2UDQ m128 xmm
// VCVTPS2UDQ m256 k ymm
// VCVTPS2UDQ m256 ymm
// VCVTPS2UDQ xmm k xmm
// VCVTPS2UDQ xmm xmm
// VCVTPS2UDQ ymm k ymm
// VCVTPS2UDQ ymm ymm
// VCVTPS2UDQ m512 k zmm
// VCVTPS2UDQ m512 zmm
// VCVTPS2UDQ zmm k zmm
// VCVTPS2UDQ zmm zmm
//
// Construct and append a VCVTPS2UDQ instruction to the active function.
func (c *Context) VCVTPS2UDQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ(ops...))
}
// VCVTPS2UDQ: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTPS2UDQ m128 k xmm
// VCVTPS2UDQ m128 xmm
// VCVTPS2UDQ m256 k ymm
// VCVTPS2UDQ m256 ymm
// VCVTPS2UDQ xmm k xmm
// VCVTPS2UDQ xmm xmm
// VCVTPS2UDQ ymm k ymm
// VCVTPS2UDQ ymm ymm
// VCVTPS2UDQ m512 k zmm
// VCVTPS2UDQ m512 zmm
// VCVTPS2UDQ zmm k zmm
// VCVTPS2UDQ zmm zmm
//
// Construct and append a VCVTPS2UDQ instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ(ops ...operand.Op) { ctx.VCVTPS2UDQ(ops...) }
// VCVTPS2UDQ_BCST: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UDQ.BCST m32 k xmm
// VCVTPS2UDQ.BCST m32 k ymm
// VCVTPS2UDQ.BCST m32 xmm
// VCVTPS2UDQ.BCST m32 ymm
// VCVTPS2UDQ.BCST m32 k zmm
// VCVTPS2UDQ.BCST m32 zmm
//
// Construct and append a VCVTPS2UDQ.BCST instruction to the active function.
func (c *Context) VCVTPS2UDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_BCST(ops...))
}
// VCVTPS2UDQ_BCST: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UDQ.BCST m32 k xmm
// VCVTPS2UDQ.BCST m32 k ymm
// VCVTPS2UDQ.BCST m32 xmm
// VCVTPS2UDQ.BCST m32 ymm
// VCVTPS2UDQ.BCST m32 k zmm
// VCVTPS2UDQ.BCST m32 zmm
//
// Construct and append a VCVTPS2UDQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_BCST(ops ...operand.Op) { ctx.VCVTPS2UDQ_BCST(ops...) }
// VCVTPS2UDQ_BCST_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.BCST.Z m32 k xmm
// VCVTPS2UDQ.BCST.Z m32 k ymm
// VCVTPS2UDQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2UDQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_BCST_Z(m, k, xyz))
}
// VCVTPS2UDQ_BCST_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.BCST.Z m32 k xmm
// VCVTPS2UDQ.BCST.Z m32 k ymm
// VCVTPS2UDQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2UDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPS2UDQ_BCST_Z(m, k, xyz) }
// VCVTPS2UDQ_RD_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE zmm k zmm
// VCVTPS2UDQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPS2UDQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RD_SAE(ops...))
}
// VCVTPS2UDQ_RD_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE zmm k zmm
// VCVTPS2UDQ.RD_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPS2UDQ_RD_SAE(ops...) }
// VCVTPS2UDQ_RD_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RD_SAE_Z(z, k, z1))
}
// VCVTPS2UDQ_RD_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2UDQ_RD_SAE_Z(z, k, z1) }
// VCVTPS2UDQ_RN_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE zmm k zmm
// VCVTPS2UDQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPS2UDQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RN_SAE(ops...))
}
// VCVTPS2UDQ_RN_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE zmm k zmm
// VCVTPS2UDQ.RN_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPS2UDQ_RN_SAE(ops...) }
// VCVTPS2UDQ_RN_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RN_SAE_Z(z, k, z1))
}
// VCVTPS2UDQ_RN_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2UDQ_RN_SAE_Z(z, k, z1) }
// VCVTPS2UDQ_RU_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE zmm k zmm
// VCVTPS2UDQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPS2UDQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RU_SAE(ops...))
}
// VCVTPS2UDQ_RU_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE zmm k zmm
// VCVTPS2UDQ.RU_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPS2UDQ_RU_SAE(ops...) }
// VCVTPS2UDQ_RU_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RU_SAE_Z(z, k, z1))
}
// VCVTPS2UDQ_RU_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2UDQ_RU_SAE_Z(z, k, z1) }
// VCVTPS2UDQ_RZ_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE zmm k zmm
// VCVTPS2UDQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPS2UDQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RZ_SAE(ops...))
}
// VCVTPS2UDQ_RZ_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE zmm k zmm
// VCVTPS2UDQ.RZ_SAE zmm zmm
//
// Construct and append a VCVTPS2UDQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPS2UDQ_RZ_SAE(ops...) }
// VCVTPS2UDQ_RZ_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_RZ_SAE_Z(z, k, z1))
}
// VCVTPS2UDQ_RZ_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTPS2UDQ_RZ_SAE_Z(z, k, z1) }
// VCVTPS2UDQ_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.Z m128 k xmm
// VCVTPS2UDQ.Z m256 k ymm
// VCVTPS2UDQ.Z xmm k xmm
// VCVTPS2UDQ.Z ymm k ymm
// VCVTPS2UDQ.Z m512 k zmm
// VCVTPS2UDQ.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.Z instruction to the active function.
func (c *Context) VCVTPS2UDQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2UDQ_Z(mxyz, k, xyz))
}
// VCVTPS2UDQ_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.Z m128 k xmm
// VCVTPS2UDQ.Z m256 k ymm
// VCVTPS2UDQ.Z xmm k xmm
// VCVTPS2UDQ.Z ymm k ymm
// VCVTPS2UDQ.Z m512 k zmm
// VCVTPS2UDQ.Z zmm k zmm
//
// Construct and append a VCVTPS2UDQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UDQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTPS2UDQ_Z(mxyz, k, xyz) }
// VCVTPS2UQQ: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTPS2UQQ m128 k ymm
// VCVTPS2UQQ m128 ymm
// VCVTPS2UQQ m64 k xmm
// VCVTPS2UQQ m64 xmm
// VCVTPS2UQQ xmm k xmm
// VCVTPS2UQQ xmm k ymm
// VCVTPS2UQQ xmm xmm
// VCVTPS2UQQ xmm ymm
// VCVTPS2UQQ m256 k zmm
// VCVTPS2UQQ m256 zmm
// VCVTPS2UQQ ymm k zmm
// VCVTPS2UQQ ymm zmm
//
// Construct and append a VCVTPS2UQQ instruction to the active function.
func (c *Context) VCVTPS2UQQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ(ops...))
}
// VCVTPS2UQQ: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTPS2UQQ m128 k ymm
// VCVTPS2UQQ m128 ymm
// VCVTPS2UQQ m64 k xmm
// VCVTPS2UQQ m64 xmm
// VCVTPS2UQQ xmm k xmm
// VCVTPS2UQQ xmm k ymm
// VCVTPS2UQQ xmm xmm
// VCVTPS2UQQ xmm ymm
// VCVTPS2UQQ m256 k zmm
// VCVTPS2UQQ m256 zmm
// VCVTPS2UQQ ymm k zmm
// VCVTPS2UQQ ymm zmm
//
// Construct and append a VCVTPS2UQQ instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ(ops ...operand.Op) { ctx.VCVTPS2UQQ(ops...) }
// VCVTPS2UQQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UQQ.BCST m32 k xmm
// VCVTPS2UQQ.BCST m32 k ymm
// VCVTPS2UQQ.BCST m32 xmm
// VCVTPS2UQQ.BCST m32 ymm
// VCVTPS2UQQ.BCST m32 k zmm
// VCVTPS2UQQ.BCST m32 zmm
//
// Construct and append a VCVTPS2UQQ.BCST instruction to the active function.
func (c *Context) VCVTPS2UQQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_BCST(ops...))
}
// VCVTPS2UQQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UQQ.BCST m32 k xmm
// VCVTPS2UQQ.BCST m32 k ymm
// VCVTPS2UQQ.BCST m32 xmm
// VCVTPS2UQQ.BCST m32 ymm
// VCVTPS2UQQ.BCST m32 k zmm
// VCVTPS2UQQ.BCST m32 zmm
//
// Construct and append a VCVTPS2UQQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_BCST(ops ...operand.Op) { ctx.VCVTPS2UQQ_BCST(ops...) }
// VCVTPS2UQQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.BCST.Z m32 k xmm
// VCVTPS2UQQ.BCST.Z m32 k ymm
// VCVTPS2UQQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2UQQ.BCST.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_BCST_Z(m, k, xyz))
}
// VCVTPS2UQQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.BCST.Z m32 k xmm
// VCVTPS2UQQ.BCST.Z m32 k ymm
// VCVTPS2UQQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTPS2UQQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTPS2UQQ_BCST_Z(m, k, xyz) }
// VCVTPS2UQQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE ymm k zmm
// VCVTPS2UQQ.RD_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RD_SAE instruction to the active function.
func (c *Context) VCVTPS2UQQ_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RD_SAE(ops...))
}
// VCVTPS2UQQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE ymm k zmm
// VCVTPS2UQQ.RD_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RD_SAE(ops ...operand.Op) { ctx.VCVTPS2UQQ_RD_SAE(ops...) }
// VCVTPS2UQQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_RD_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RD_SAE_Z(y, k, z))
}
// VCVTPS2UQQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RD_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2UQQ_RD_SAE_Z(y, k, z) }
// VCVTPS2UQQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE ymm k zmm
// VCVTPS2UQQ.RN_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RN_SAE instruction to the active function.
func (c *Context) VCVTPS2UQQ_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RN_SAE(ops...))
}
// VCVTPS2UQQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE ymm k zmm
// VCVTPS2UQQ.RN_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RN_SAE(ops ...operand.Op) { ctx.VCVTPS2UQQ_RN_SAE(ops...) }
// VCVTPS2UQQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_RN_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RN_SAE_Z(y, k, z))
}
// VCVTPS2UQQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RN_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2UQQ_RN_SAE_Z(y, k, z) }
// VCVTPS2UQQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE ymm k zmm
// VCVTPS2UQQ.RU_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RU_SAE instruction to the active function.
func (c *Context) VCVTPS2UQQ_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RU_SAE(ops...))
}
// VCVTPS2UQQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE ymm k zmm
// VCVTPS2UQQ.RU_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RU_SAE(ops ...operand.Op) { ctx.VCVTPS2UQQ_RU_SAE(ops...) }
// VCVTPS2UQQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_RU_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RU_SAE_Z(y, k, z))
}
// VCVTPS2UQQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RU_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2UQQ_RU_SAE_Z(y, k, z) }
// VCVTPS2UQQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE ymm k zmm
// VCVTPS2UQQ.RZ_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTPS2UQQ_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RZ_SAE(ops...))
}
// VCVTPS2UQQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE ymm k zmm
// VCVTPS2UQQ.RZ_SAE ymm zmm
//
// Construct and append a VCVTPS2UQQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RZ_SAE(ops ...operand.Op) { ctx.VCVTPS2UQQ_RZ_SAE(ops...) }
// VCVTPS2UQQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_RZ_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_RZ_SAE_Z(y, k, z))
}
// VCVTPS2UQQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_RZ_SAE_Z(y, k, z operand.Op) { ctx.VCVTPS2UQQ_RZ_SAE_Z(y, k, z) }
// VCVTPS2UQQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.Z m128 k ymm
// VCVTPS2UQQ.Z m64 k xmm
// VCVTPS2UQQ.Z xmm k xmm
// VCVTPS2UQQ.Z xmm k ymm
// VCVTPS2UQQ.Z m256 k zmm
// VCVTPS2UQQ.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.Z instruction to the active function.
func (c *Context) VCVTPS2UQQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTPS2UQQ_Z(mxy, k, xyz))
}
// VCVTPS2UQQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.Z m128 k ymm
// VCVTPS2UQQ.Z m64 k xmm
// VCVTPS2UQQ.Z xmm k xmm
// VCVTPS2UQQ.Z xmm k ymm
// VCVTPS2UQQ.Z m256 k zmm
// VCVTPS2UQQ.Z ymm k zmm
//
// Construct and append a VCVTPS2UQQ.Z instruction to the active function.
// Operates on the global context.
func VCVTPS2UQQ_Z(mxy, k, xyz operand.Op) { ctx.VCVTPS2UQQ_Z(mxy, k, xyz) }
// VCVTQQ2PD: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PD m128 k xmm
// VCVTQQ2PD m128 xmm
// VCVTQQ2PD m256 k ymm
// VCVTQQ2PD m256 ymm
// VCVTQQ2PD xmm k xmm
// VCVTQQ2PD xmm xmm
// VCVTQQ2PD ymm k ymm
// VCVTQQ2PD ymm ymm
// VCVTQQ2PD m512 k zmm
// VCVTQQ2PD m512 zmm
// VCVTQQ2PD zmm k zmm
// VCVTQQ2PD zmm zmm
//
// Construct and append a VCVTQQ2PD instruction to the active function.
func (c *Context) VCVTQQ2PD(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD(ops...))
}
// VCVTQQ2PD: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PD m128 k xmm
// VCVTQQ2PD m128 xmm
// VCVTQQ2PD m256 k ymm
// VCVTQQ2PD m256 ymm
// VCVTQQ2PD xmm k xmm
// VCVTQQ2PD xmm xmm
// VCVTQQ2PD ymm k ymm
// VCVTQQ2PD ymm ymm
// VCVTQQ2PD m512 k zmm
// VCVTQQ2PD m512 zmm
// VCVTQQ2PD zmm k zmm
// VCVTQQ2PD zmm zmm
//
// Construct and append a VCVTQQ2PD instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD(ops ...operand.Op) { ctx.VCVTQQ2PD(ops...) }
// VCVTQQ2PD_BCST: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PD.BCST m64 k xmm
// VCVTQQ2PD.BCST m64 k ymm
// VCVTQQ2PD.BCST m64 xmm
// VCVTQQ2PD.BCST m64 ymm
// VCVTQQ2PD.BCST m64 k zmm
// VCVTQQ2PD.BCST m64 zmm
//
// Construct and append a VCVTQQ2PD.BCST instruction to the active function.
func (c *Context) VCVTQQ2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_BCST(ops...))
}
// VCVTQQ2PD_BCST: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PD.BCST m64 k xmm
// VCVTQQ2PD.BCST m64 k ymm
// VCVTQQ2PD.BCST m64 xmm
// VCVTQQ2PD.BCST m64 ymm
// VCVTQQ2PD.BCST m64 k zmm
// VCVTQQ2PD.BCST m64 zmm
//
// Construct and append a VCVTQQ2PD.BCST instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_BCST(ops ...operand.Op) { ctx.VCVTQQ2PD_BCST(ops...) }
// VCVTQQ2PD_BCST_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.BCST.Z m64 k xmm
// VCVTQQ2PD.BCST.Z m64 k ymm
// VCVTQQ2PD.BCST.Z m64 k zmm
//
// Construct and append a VCVTQQ2PD.BCST.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_BCST_Z(m, k, xyz))
}
// VCVTQQ2PD_BCST_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.BCST.Z m64 k xmm
// VCVTQQ2PD.BCST.Z m64 k ymm
// VCVTQQ2PD.BCST.Z m64 k zmm
//
// Construct and append a VCVTQQ2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTQQ2PD_BCST_Z(m, k, xyz) }
// VCVTQQ2PD_RD_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE zmm k zmm
// VCVTQQ2PD.RD_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RD_SAE instruction to the active function.
func (c *Context) VCVTQQ2PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RD_SAE(ops...))
}
// VCVTQQ2PD_RD_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE zmm k zmm
// VCVTQQ2PD.RD_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RD_SAE(ops ...operand.Op) { ctx.VCVTQQ2PD_RD_SAE(ops...) }
// VCVTQQ2PD_RD_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RD_SAE_Z(z, k, z1))
}
// VCVTQQ2PD_RD_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTQQ2PD_RD_SAE_Z(z, k, z1) }
// VCVTQQ2PD_RN_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE zmm k zmm
// VCVTQQ2PD.RN_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RN_SAE instruction to the active function.
func (c *Context) VCVTQQ2PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RN_SAE(ops...))
}
// VCVTQQ2PD_RN_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE zmm k zmm
// VCVTQQ2PD.RN_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RN_SAE(ops ...operand.Op) { ctx.VCVTQQ2PD_RN_SAE(ops...) }
// VCVTQQ2PD_RN_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RN_SAE_Z(z, k, z1))
}
// VCVTQQ2PD_RN_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTQQ2PD_RN_SAE_Z(z, k, z1) }
// VCVTQQ2PD_RU_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE zmm k zmm
// VCVTQQ2PD.RU_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RU_SAE instruction to the active function.
func (c *Context) VCVTQQ2PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RU_SAE(ops...))
}
// VCVTQQ2PD_RU_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE zmm k zmm
// VCVTQQ2PD.RU_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RU_SAE(ops ...operand.Op) { ctx.VCVTQQ2PD_RU_SAE(ops...) }
// VCVTQQ2PD_RU_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RU_SAE_Z(z, k, z1))
}
// VCVTQQ2PD_RU_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTQQ2PD_RU_SAE_Z(z, k, z1) }
// VCVTQQ2PD_RZ_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE zmm k zmm
// VCVTQQ2PD.RZ_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RZ_SAE instruction to the active function.
func (c *Context) VCVTQQ2PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RZ_SAE(ops...))
}
// VCVTQQ2PD_RZ_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE zmm k zmm
// VCVTQQ2PD.RZ_SAE zmm zmm
//
// Construct and append a VCVTQQ2PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RZ_SAE(ops ...operand.Op) { ctx.VCVTQQ2PD_RZ_SAE(ops...) }
// VCVTQQ2PD_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_RZ_SAE_Z(z, k, z1))
}
// VCVTQQ2PD_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTQQ2PD_RZ_SAE_Z(z, k, z1) }
// VCVTQQ2PD_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.Z m128 k xmm
// VCVTQQ2PD.Z m256 k ymm
// VCVTQQ2PD.Z xmm k xmm
// VCVTQQ2PD.Z ymm k ymm
// VCVTQQ2PD.Z m512 k zmm
// VCVTQQ2PD.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.Z instruction to the active function.
func (c *Context) VCVTQQ2PD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTQQ2PD_Z(mxyz, k, xyz))
}
// VCVTQQ2PD_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.Z m128 k xmm
// VCVTQQ2PD.Z m256 k ymm
// VCVTQQ2PD.Z xmm k xmm
// VCVTQQ2PD.Z ymm k ymm
// VCVTQQ2PD.Z m512 k zmm
// VCVTQQ2PD.Z zmm k zmm
//
// Construct and append a VCVTQQ2PD.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PD_Z(mxyz, k, xyz operand.Op) { ctx.VCVTQQ2PD_Z(mxyz, k, xyz) }
// VCVTQQ2PS: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PS m512 k ymm
// VCVTQQ2PS m512 ymm
// VCVTQQ2PS zmm k ymm
// VCVTQQ2PS zmm ymm
//
// Construct and append a VCVTQQ2PS instruction to the active function.
func (c *Context) VCVTQQ2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS(ops...))
}
// VCVTQQ2PS: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PS m512 k ymm
// VCVTQQ2PS m512 ymm
// VCVTQQ2PS zmm k ymm
// VCVTQQ2PS zmm ymm
//
// Construct and append a VCVTQQ2PS instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS(ops ...operand.Op) { ctx.VCVTQQ2PS(ops...) }
// VCVTQQ2PSX: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSX m128 k xmm
// VCVTQQ2PSX m128 xmm
// VCVTQQ2PSX xmm k xmm
// VCVTQQ2PSX xmm xmm
//
// Construct and append a VCVTQQ2PSX instruction to the active function.
func (c *Context) VCVTQQ2PSX(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PSX(ops...))
}
// VCVTQQ2PSX: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSX m128 k xmm
// VCVTQQ2PSX m128 xmm
// VCVTQQ2PSX xmm k xmm
// VCVTQQ2PSX xmm xmm
//
// Construct and append a VCVTQQ2PSX instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSX(ops ...operand.Op) { ctx.VCVTQQ2PSX(ops...) }
// VCVTQQ2PSX_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSX.BCST m64 k xmm
// VCVTQQ2PSX.BCST m64 xmm
//
// Construct and append a VCVTQQ2PSX.BCST instruction to the active function.
func (c *Context) VCVTQQ2PSX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PSX_BCST(ops...))
}
// VCVTQQ2PSX_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSX.BCST m64 k xmm
// VCVTQQ2PSX.BCST m64 xmm
//
// Construct and append a VCVTQQ2PSX.BCST instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSX_BCST(ops ...operand.Op) { ctx.VCVTQQ2PSX_BCST(ops...) }
// VCVTQQ2PSX_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTQQ2PSX.BCST.Z instruction to the active function.
func (c *Context) VCVTQQ2PSX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTQQ2PSX_BCST_Z(m, k, x))
}
// VCVTQQ2PSX_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTQQ2PSX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSX_BCST_Z(m, k, x operand.Op) { ctx.VCVTQQ2PSX_BCST_Z(m, k, x) }
// VCVTQQ2PSX_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.Z m128 k xmm
// VCVTQQ2PSX.Z xmm k xmm
//
// Construct and append a VCVTQQ2PSX.Z instruction to the active function.
func (c *Context) VCVTQQ2PSX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTQQ2PSX_Z(mx, k, x))
}
// VCVTQQ2PSX_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.Z m128 k xmm
// VCVTQQ2PSX.Z xmm k xmm
//
// Construct and append a VCVTQQ2PSX.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSX_Z(mx, k, x operand.Op) { ctx.VCVTQQ2PSX_Z(mx, k, x) }
// VCVTQQ2PSY: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSY m256 k xmm
// VCVTQQ2PSY m256 xmm
// VCVTQQ2PSY ymm k xmm
// VCVTQQ2PSY ymm xmm
//
// Construct and append a VCVTQQ2PSY instruction to the active function.
func (c *Context) VCVTQQ2PSY(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PSY(ops...))
}
// VCVTQQ2PSY: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSY m256 k xmm
// VCVTQQ2PSY m256 xmm
// VCVTQQ2PSY ymm k xmm
// VCVTQQ2PSY ymm xmm
//
// Construct and append a VCVTQQ2PSY instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSY(ops ...operand.Op) { ctx.VCVTQQ2PSY(ops...) }
// VCVTQQ2PSY_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSY.BCST m64 k xmm
// VCVTQQ2PSY.BCST m64 xmm
//
// Construct and append a VCVTQQ2PSY.BCST instruction to the active function.
func (c *Context) VCVTQQ2PSY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PSY_BCST(ops...))
}
// VCVTQQ2PSY_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSY.BCST m64 k xmm
// VCVTQQ2PSY.BCST m64 xmm
//
// Construct and append a VCVTQQ2PSY.BCST instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSY_BCST(ops ...operand.Op) { ctx.VCVTQQ2PSY_BCST(ops...) }
// VCVTQQ2PSY_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTQQ2PSY.BCST.Z instruction to the active function.
func (c *Context) VCVTQQ2PSY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTQQ2PSY_BCST_Z(m, k, x))
}
// VCVTQQ2PSY_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTQQ2PSY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSY_BCST_Z(m, k, x operand.Op) { ctx.VCVTQQ2PSY_BCST_Z(m, k, x) }
// VCVTQQ2PSY_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.Z m256 k xmm
// VCVTQQ2PSY.Z ymm k xmm
//
// Construct and append a VCVTQQ2PSY.Z instruction to the active function.
func (c *Context) VCVTQQ2PSY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTQQ2PSY_Z(my, k, x))
}
// VCVTQQ2PSY_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.Z m256 k xmm
// VCVTQQ2PSY.Z ymm k xmm
//
// Construct and append a VCVTQQ2PSY.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PSY_Z(my, k, x operand.Op) { ctx.VCVTQQ2PSY_Z(my, k, x) }
// VCVTQQ2PS_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PS.BCST m64 k ymm
// VCVTQQ2PS.BCST m64 ymm
//
// Construct and append a VCVTQQ2PS.BCST instruction to the active function.
func (c *Context) VCVTQQ2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_BCST(ops...))
}
// VCVTQQ2PS_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PS.BCST m64 k ymm
// VCVTQQ2PS.BCST m64 ymm
//
// Construct and append a VCVTQQ2PS.BCST instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_BCST(ops ...operand.Op) { ctx.VCVTQQ2PS_BCST(ops...) }
// VCVTQQ2PS_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTQQ2PS.BCST.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_BCST_Z(m, k, y))
}
// VCVTQQ2PS_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTQQ2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_BCST_Z(m, k, y operand.Op) { ctx.VCVTQQ2PS_BCST_Z(m, k, y) }
// VCVTQQ2PS_RD_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE zmm k ymm
// VCVTQQ2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RD_SAE instruction to the active function.
func (c *Context) VCVTQQ2PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RD_SAE(ops...))
}
// VCVTQQ2PS_RD_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE zmm k ymm
// VCVTQQ2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RD_SAE(ops ...operand.Op) { ctx.VCVTQQ2PS_RD_SAE(ops...) }
// VCVTQQ2PS_RD_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_RD_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RD_SAE_Z(z, k, y))
}
// VCVTQQ2PS_RD_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RD_SAE_Z(z, k, y operand.Op) { ctx.VCVTQQ2PS_RD_SAE_Z(z, k, y) }
// VCVTQQ2PS_RN_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE zmm k ymm
// VCVTQQ2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RN_SAE instruction to the active function.
func (c *Context) VCVTQQ2PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RN_SAE(ops...))
}
// VCVTQQ2PS_RN_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE zmm k ymm
// VCVTQQ2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RN_SAE(ops ...operand.Op) { ctx.VCVTQQ2PS_RN_SAE(ops...) }
// VCVTQQ2PS_RN_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_RN_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RN_SAE_Z(z, k, y))
}
// VCVTQQ2PS_RN_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RN_SAE_Z(z, k, y operand.Op) { ctx.VCVTQQ2PS_RN_SAE_Z(z, k, y) }
// VCVTQQ2PS_RU_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE zmm k ymm
// VCVTQQ2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RU_SAE instruction to the active function.
func (c *Context) VCVTQQ2PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RU_SAE(ops...))
}
// VCVTQQ2PS_RU_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE zmm k ymm
// VCVTQQ2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RU_SAE(ops ...operand.Op) { ctx.VCVTQQ2PS_RU_SAE(ops...) }
// VCVTQQ2PS_RU_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_RU_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RU_SAE_Z(z, k, y))
}
// VCVTQQ2PS_RU_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RU_SAE_Z(z, k, y operand.Op) { ctx.VCVTQQ2PS_RU_SAE_Z(z, k, y) }
// VCVTQQ2PS_RZ_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE zmm k ymm
// VCVTQQ2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RZ_SAE instruction to the active function.
func (c *Context) VCVTQQ2PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RZ_SAE(ops...))
}
// VCVTQQ2PS_RZ_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE zmm k ymm
// VCVTQQ2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTQQ2PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RZ_SAE(ops ...operand.Op) { ctx.VCVTQQ2PS_RZ_SAE(ops...) }
// VCVTQQ2PS_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_RZ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_RZ_SAE_Z(z, k, y))
}
// VCVTQQ2PS_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_RZ_SAE_Z(z, k, y operand.Op) { ctx.VCVTQQ2PS_RZ_SAE_Z(z, k, y) }
// VCVTQQ2PS_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.Z m512 k ymm
// VCVTQQ2PS.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.Z instruction to the active function.
func (c *Context) VCVTQQ2PS_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTQQ2PS_Z(mz, k, y))
}
// VCVTQQ2PS_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.Z m512 k ymm
// VCVTQQ2PS.Z zmm k ymm
//
// Construct and append a VCVTQQ2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTQQ2PS_Z(mz, k, y operand.Op) { ctx.VCVTQQ2PS_Z(mz, k, y) }
// VCVTSD2SI: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SI m64 r32
// VCVTSD2SI xmm r32
//
// Construct and append a VCVTSD2SI instruction to the active function.
func (c *Context) VCVTSD2SI(mx, r operand.Op) {
c.addinstruction(x86.VCVTSD2SI(mx, r))
}
// VCVTSD2SI: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SI m64 r32
// VCVTSD2SI xmm r32
//
// Construct and append a VCVTSD2SI instruction to the active function.
// Operates on the global context.
func VCVTSD2SI(mx, r operand.Op) { ctx.VCVTSD2SI(mx, r) }
// VCVTSD2SIQ: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SIQ m64 r64
// VCVTSD2SIQ xmm r64
//
// Construct and append a VCVTSD2SIQ instruction to the active function.
func (c *Context) VCVTSD2SIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTSD2SIQ(mx, r))
}
// VCVTSD2SIQ: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SIQ m64 r64
// VCVTSD2SIQ xmm r64
//
// Construct and append a VCVTSD2SIQ instruction to the active function.
// Operates on the global context.
func VCVTSD2SIQ(mx, r operand.Op) { ctx.VCVTSD2SIQ(mx, r) }
// VCVTSD2SIQ_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSD2SIQ_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SIQ_RD_SAE(x, r))
}
// VCVTSD2SIQ_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SIQ_RD_SAE(x, r operand.Op) { ctx.VCVTSD2SIQ_RD_SAE(x, r) }
// VCVTSD2SIQ_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSD2SIQ_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SIQ_RN_SAE(x, r))
}
// VCVTSD2SIQ_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SIQ_RN_SAE(x, r operand.Op) { ctx.VCVTSD2SIQ_RN_SAE(x, r) }
// VCVTSD2SIQ_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSD2SIQ_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SIQ_RU_SAE(x, r))
}
// VCVTSD2SIQ_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SIQ_RU_SAE(x, r operand.Op) { ctx.VCVTSD2SIQ_RU_SAE(x, r) }
// VCVTSD2SIQ_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSD2SIQ_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SIQ_RZ_SAE(x, r))
}
// VCVTSD2SIQ_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSD2SIQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SIQ_RZ_SAE(x, r operand.Op) { ctx.VCVTSD2SIQ_RZ_SAE(x, r) }
// VCVTSD2SI_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SI.RD_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RD_SAE instruction to the active function.
func (c *Context) VCVTSD2SI_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SI_RD_SAE(x, r))
}
// VCVTSD2SI_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SI.RD_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SI_RD_SAE(x, r operand.Op) { ctx.VCVTSD2SI_RD_SAE(x, r) }
// VCVTSD2SI_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SI.RN_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RN_SAE instruction to the active function.
func (c *Context) VCVTSD2SI_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SI_RN_SAE(x, r))
}
// VCVTSD2SI_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SI.RN_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SI_RN_SAE(x, r operand.Op) { ctx.VCVTSD2SI_RN_SAE(x, r) }
// VCVTSD2SI_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SI.RU_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RU_SAE instruction to the active function.
func (c *Context) VCVTSD2SI_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SI_RU_SAE(x, r))
}
// VCVTSD2SI_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SI.RU_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SI_RU_SAE(x, r operand.Op) { ctx.VCVTSD2SI_RU_SAE(x, r) }
// VCVTSD2SI_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SI.RZ_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RZ_SAE instruction to the active function.
func (c *Context) VCVTSD2SI_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2SI_RZ_SAE(x, r))
}
// VCVTSD2SI_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SI.RZ_SAE xmm r32
//
// Construct and append a VCVTSD2SI.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SI_RZ_SAE(x, r operand.Op) { ctx.VCVTSD2SI_RZ_SAE(x, r) }
// VCVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSD2SS m64 xmm xmm
// VCVTSD2SS xmm xmm xmm
// VCVTSD2SS m64 xmm k xmm
// VCVTSD2SS xmm xmm k xmm
//
// Construct and append a VCVTSD2SS instruction to the active function.
func (c *Context) VCVTSD2SS(ops ...operand.Op) {
c.addinstruction(x86.VCVTSD2SS(ops...))
}
// VCVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSD2SS m64 xmm xmm
// VCVTSD2SS xmm xmm xmm
// VCVTSD2SS m64 xmm k xmm
// VCVTSD2SS xmm xmm k xmm
//
// Construct and append a VCVTSD2SS instruction to the active function.
// Operates on the global context.
func VCVTSD2SS(ops ...operand.Op) { ctx.VCVTSD2SS(ops...) }
// VCVTSD2SS_RD_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SS.RD_SAE xmm xmm k xmm
// VCVTSD2SS.RD_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RD_SAE instruction to the active function.
func (c *Context) VCVTSD2SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RD_SAE(ops...))
}
// VCVTSD2SS_RD_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SS.RD_SAE xmm xmm k xmm
// VCVTSD2SS.RD_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RD_SAE(ops ...operand.Op) { ctx.VCVTSD2SS_RD_SAE(ops...) }
// VCVTSD2SS_RD_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTSD2SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RD_SAE_Z(x, x1, k, x2))
}
// VCVTSD2SS_RD_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VCVTSD2SS_RD_SAE_Z(x, x1, k, x2) }
// VCVTSD2SS_RN_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SS.RN_SAE xmm xmm k xmm
// VCVTSD2SS.RN_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RN_SAE instruction to the active function.
func (c *Context) VCVTSD2SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RN_SAE(ops...))
}
// VCVTSD2SS_RN_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SS.RN_SAE xmm xmm k xmm
// VCVTSD2SS.RN_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RN_SAE(ops ...operand.Op) { ctx.VCVTSD2SS_RN_SAE(ops...) }
// VCVTSD2SS_RN_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTSD2SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RN_SAE_Z(x, x1, k, x2))
}
// VCVTSD2SS_RN_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VCVTSD2SS_RN_SAE_Z(x, x1, k, x2) }
// VCVTSD2SS_RU_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SS.RU_SAE xmm xmm k xmm
// VCVTSD2SS.RU_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RU_SAE instruction to the active function.
func (c *Context) VCVTSD2SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RU_SAE(ops...))
}
// VCVTSD2SS_RU_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SS.RU_SAE xmm xmm k xmm
// VCVTSD2SS.RU_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RU_SAE(ops ...operand.Op) { ctx.VCVTSD2SS_RU_SAE(ops...) }
// VCVTSD2SS_RU_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTSD2SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RU_SAE_Z(x, x1, k, x2))
}
// VCVTSD2SS_RU_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VCVTSD2SS_RU_SAE_Z(x, x1, k, x2) }
// VCVTSD2SS_RZ_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE xmm xmm k xmm
// VCVTSD2SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RZ_SAE instruction to the active function.
func (c *Context) VCVTSD2SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RZ_SAE(ops...))
}
// VCVTSD2SS_RZ_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE xmm xmm k xmm
// VCVTSD2SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VCVTSD2SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RZ_SAE(ops ...operand.Op) { ctx.VCVTSD2SS_RZ_SAE(ops...) }
// VCVTSD2SS_RZ_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTSD2SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VCVTSD2SS_RZ_SAE_Z(x, x1, k, x2))
}
// VCVTSD2SS_RZ_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VCVTSD2SS_RZ_SAE_Z(x, x1, k, x2) }
// VCVTSD2SS_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.Z m64 xmm k xmm
// VCVTSD2SS.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.Z instruction to the active function.
func (c *Context) VCVTSD2SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VCVTSD2SS_Z(mx, x, k, x1))
}
// VCVTSD2SS_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.Z m64 xmm k xmm
// VCVTSD2SS.Z xmm xmm k xmm
//
// Construct and append a VCVTSD2SS.Z instruction to the active function.
// Operates on the global context.
func VCVTSD2SS_Z(mx, x, k, x1 operand.Op) { ctx.VCVTSD2SS_Z(mx, x, k, x1) }
// VCVTSD2USIL: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIL m64 r32
// VCVTSD2USIL xmm r32
//
// Construct and append a VCVTSD2USIL instruction to the active function.
func (c *Context) VCVTSD2USIL(mx, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIL(mx, r))
}
// VCVTSD2USIL: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIL m64 r32
// VCVTSD2USIL xmm r32
//
// Construct and append a VCVTSD2USIL instruction to the active function.
// Operates on the global context.
func VCVTSD2USIL(mx, r operand.Op) { ctx.VCVTSD2USIL(mx, r) }
// VCVTSD2USIL_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIL.RD_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RD_SAE instruction to the active function.
func (c *Context) VCVTSD2USIL_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIL_RD_SAE(x, r))
}
// VCVTSD2USIL_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIL.RD_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIL_RD_SAE(x, r operand.Op) { ctx.VCVTSD2USIL_RD_SAE(x, r) }
// VCVTSD2USIL_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIL.RN_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RN_SAE instruction to the active function.
func (c *Context) VCVTSD2USIL_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIL_RN_SAE(x, r))
}
// VCVTSD2USIL_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIL.RN_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIL_RN_SAE(x, r operand.Op) { ctx.VCVTSD2USIL_RN_SAE(x, r) }
// VCVTSD2USIL_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIL.RU_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RU_SAE instruction to the active function.
func (c *Context) VCVTSD2USIL_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIL_RU_SAE(x, r))
}
// VCVTSD2USIL_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIL.RU_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIL_RU_SAE(x, r operand.Op) { ctx.VCVTSD2USIL_RU_SAE(x, r) }
// VCVTSD2USIL_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIL.RZ_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RZ_SAE instruction to the active function.
func (c *Context) VCVTSD2USIL_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIL_RZ_SAE(x, r))
}
// VCVTSD2USIL_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIL.RZ_SAE xmm r32
//
// Construct and append a VCVTSD2USIL.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIL_RZ_SAE(x, r operand.Op) { ctx.VCVTSD2USIL_RZ_SAE(x, r) }
// VCVTSD2USIQ: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIQ m64 r64
// VCVTSD2USIQ xmm r64
//
// Construct and append a VCVTSD2USIQ instruction to the active function.
func (c *Context) VCVTSD2USIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIQ(mx, r))
}
// VCVTSD2USIQ: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIQ m64 r64
// VCVTSD2USIQ xmm r64
//
// Construct and append a VCVTSD2USIQ instruction to the active function.
// Operates on the global context.
func VCVTSD2USIQ(mx, r operand.Op) { ctx.VCVTSD2USIQ(mx, r) }
// VCVTSD2USIQ_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSD2USIQ_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIQ_RD_SAE(x, r))
}
// VCVTSD2USIQ_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIQ_RD_SAE(x, r operand.Op) { ctx.VCVTSD2USIQ_RD_SAE(x, r) }
// VCVTSD2USIQ_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSD2USIQ_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIQ_RN_SAE(x, r))
}
// VCVTSD2USIQ_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIQ_RN_SAE(x, r operand.Op) { ctx.VCVTSD2USIQ_RN_SAE(x, r) }
// VCVTSD2USIQ_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSD2USIQ_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIQ_RU_SAE(x, r))
}
// VCVTSD2USIQ_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIQ_RU_SAE(x, r operand.Op) { ctx.VCVTSD2USIQ_RU_SAE(x, r) }
// VCVTSD2USIQ_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSD2USIQ_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSD2USIQ_RZ_SAE(x, r))
}
// VCVTSD2USIQ_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSD2USIQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSD2USIQ_RZ_SAE(x, r operand.Op) { ctx.VCVTSD2USIQ_RZ_SAE(x, r) }
// VCVTSI2SDL: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDL m32 xmm xmm
// VCVTSI2SDL r32 xmm xmm
//
// Construct and append a VCVTSI2SDL instruction to the active function.
func (c *Context) VCVTSI2SDL(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDL(mr, x, x1))
}
// VCVTSI2SDL: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDL m32 xmm xmm
// VCVTSI2SDL r32 xmm xmm
//
// Construct and append a VCVTSI2SDL instruction to the active function.
// Operates on the global context.
func VCVTSI2SDL(mr, x, x1 operand.Op) { ctx.VCVTSI2SDL(mr, x, x1) }
// VCVTSI2SDQ: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDQ m64 xmm xmm
// VCVTSI2SDQ r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ instruction to the active function.
func (c *Context) VCVTSI2SDQ(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDQ(mr, x, x1))
}
// VCVTSI2SDQ: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDQ m64 xmm xmm
// VCVTSI2SDQ r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ instruction to the active function.
// Operates on the global context.
func VCVTSI2SDQ(mr, x, x1 operand.Op) { ctx.VCVTSI2SDQ(mr, x, x1) }
// VCVTSI2SDQ_RD_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSI2SDQ_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDQ_RD_SAE(r, x, x1))
}
// VCVTSI2SDQ_RD_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SDQ_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SDQ_RD_SAE(r, x, x1) }
// VCVTSI2SDQ_RN_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SDQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSI2SDQ_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDQ_RN_SAE(r, x, x1))
}
// VCVTSI2SDQ_RN_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SDQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SDQ_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SDQ_RN_SAE(r, x, x1) }
// VCVTSI2SDQ_RU_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSI2SDQ_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDQ_RU_SAE(r, x, x1))
}
// VCVTSI2SDQ_RU_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SDQ_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SDQ_RU_SAE(r, x, x1) }
// VCVTSI2SDQ_RZ_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SDQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSI2SDQ_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SDQ_RZ_SAE(r, x, x1))
}
// VCVTSI2SDQ_RZ_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SDQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SDQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SDQ_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SDQ_RZ_SAE(r, x, x1) }
// VCVTSI2SSL: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSL m32 xmm xmm
// VCVTSI2SSL r32 xmm xmm
//
// Construct and append a VCVTSI2SSL instruction to the active function.
func (c *Context) VCVTSI2SSL(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSL(mr, x, x1))
}
// VCVTSI2SSL: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSL m32 xmm xmm
// VCVTSI2SSL r32 xmm xmm
//
// Construct and append a VCVTSI2SSL instruction to the active function.
// Operates on the global context.
func VCVTSI2SSL(mr, x, x1 operand.Op) { ctx.VCVTSI2SSL(mr, x, x1) }
// VCVTSI2SSL_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSL.RD_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RD_SAE instruction to the active function.
func (c *Context) VCVTSI2SSL_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSL_RD_SAE(r, x, x1))
}
// VCVTSI2SSL_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSL.RD_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSL_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSL_RD_SAE(r, x, x1) }
// VCVTSI2SSL_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSL.RN_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RN_SAE instruction to the active function.
func (c *Context) VCVTSI2SSL_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSL_RN_SAE(r, x, x1))
}
// VCVTSI2SSL_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSL.RN_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSL_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSL_RN_SAE(r, x, x1) }
// VCVTSI2SSL_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSL.RU_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RU_SAE instruction to the active function.
func (c *Context) VCVTSI2SSL_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSL_RU_SAE(r, x, x1))
}
// VCVTSI2SSL_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSL.RU_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSL_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSL_RU_SAE(r, x, x1) }
// VCVTSI2SSL_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSL.RZ_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RZ_SAE instruction to the active function.
func (c *Context) VCVTSI2SSL_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSL_RZ_SAE(r, x, x1))
}
// VCVTSI2SSL_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSL.RZ_SAE r32 xmm xmm
//
// Construct and append a VCVTSI2SSL.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSL_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSL_RZ_SAE(r, x, x1) }
// VCVTSI2SSQ: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSQ m64 xmm xmm
// VCVTSI2SSQ r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ instruction to the active function.
func (c *Context) VCVTSI2SSQ(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSQ(mr, x, x1))
}
// VCVTSI2SSQ: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSQ m64 xmm xmm
// VCVTSI2SSQ r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ instruction to the active function.
// Operates on the global context.
func VCVTSI2SSQ(mr, x, x1 operand.Op) { ctx.VCVTSI2SSQ(mr, x, x1) }
// VCVTSI2SSQ_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSI2SSQ_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSQ_RD_SAE(r, x, x1))
}
// VCVTSI2SSQ_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSQ_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSQ_RD_SAE(r, x, x1) }
// VCVTSI2SSQ_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSI2SSQ_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSQ_RN_SAE(r, x, x1))
}
// VCVTSI2SSQ_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSQ_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSQ_RN_SAE(r, x, x1) }
// VCVTSI2SSQ_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSI2SSQ_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSQ_RU_SAE(r, x, x1))
}
// VCVTSI2SSQ_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSQ_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSQ_RU_SAE(r, x, x1) }
// VCVTSI2SSQ_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSI2SSQ_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTSI2SSQ_RZ_SAE(r, x, x1))
}
// VCVTSI2SSQ_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTSI2SSQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSI2SSQ_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTSI2SSQ_RZ_SAE(r, x, x1) }
// VCVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSS2SD m32 xmm xmm
// VCVTSS2SD xmm xmm xmm
// VCVTSS2SD m32 xmm k xmm
// VCVTSS2SD xmm xmm k xmm
//
// Construct and append a VCVTSS2SD instruction to the active function.
func (c *Context) VCVTSS2SD(ops ...operand.Op) {
c.addinstruction(x86.VCVTSS2SD(ops...))
}
// VCVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSS2SD m32 xmm xmm
// VCVTSS2SD xmm xmm xmm
// VCVTSS2SD m32 xmm k xmm
// VCVTSS2SD xmm xmm k xmm
//
// Construct and append a VCVTSS2SD instruction to the active function.
// Operates on the global context.
func VCVTSS2SD(ops ...operand.Op) { ctx.VCVTSS2SD(ops...) }
// VCVTSS2SD_SAE: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions).
//
// Forms:
//
// VCVTSS2SD.SAE xmm xmm k xmm
// VCVTSS2SD.SAE xmm xmm xmm
//
// Construct and append a VCVTSS2SD.SAE instruction to the active function.
func (c *Context) VCVTSS2SD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTSS2SD_SAE(ops...))
}
// VCVTSS2SD_SAE: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions).
//
// Forms:
//
// VCVTSS2SD.SAE xmm xmm k xmm
// VCVTSS2SD.SAE xmm xmm xmm
//
// Construct and append a VCVTSS2SD.SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SD_SAE(ops ...operand.Op) { ctx.VCVTSS2SD_SAE(ops...) }
// VCVTSS2SD_SAE_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSS2SD.SAE.Z instruction to the active function.
func (c *Context) VCVTSS2SD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VCVTSS2SD_SAE_Z(x, x1, k, x2))
}
// VCVTSS2SD_SAE_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VCVTSS2SD.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTSS2SD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VCVTSS2SD_SAE_Z(x, x1, k, x2) }
// VCVTSS2SD_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.Z m32 xmm k xmm
// VCVTSS2SD.Z xmm xmm k xmm
//
// Construct and append a VCVTSS2SD.Z instruction to the active function.
func (c *Context) VCVTSS2SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VCVTSS2SD_Z(mx, x, k, x1))
}
// VCVTSS2SD_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.Z m32 xmm k xmm
// VCVTSS2SD.Z xmm xmm k xmm
//
// Construct and append a VCVTSS2SD.Z instruction to the active function.
// Operates on the global context.
func VCVTSS2SD_Z(mx, x, k, x1 operand.Op) { ctx.VCVTSS2SD_Z(mx, x, k, x1) }
// VCVTSS2SI: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SI m32 r32
// VCVTSS2SI xmm r32
//
// Construct and append a VCVTSS2SI instruction to the active function.
func (c *Context) VCVTSS2SI(mx, r operand.Op) {
c.addinstruction(x86.VCVTSS2SI(mx, r))
}
// VCVTSS2SI: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SI m32 r32
// VCVTSS2SI xmm r32
//
// Construct and append a VCVTSS2SI instruction to the active function.
// Operates on the global context.
func VCVTSS2SI(mx, r operand.Op) { ctx.VCVTSS2SI(mx, r) }
// VCVTSS2SIQ: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SIQ m32 r64
// VCVTSS2SIQ xmm r64
//
// Construct and append a VCVTSS2SIQ instruction to the active function.
func (c *Context) VCVTSS2SIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTSS2SIQ(mx, r))
}
// VCVTSS2SIQ: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SIQ m32 r64
// VCVTSS2SIQ xmm r64
//
// Construct and append a VCVTSS2SIQ instruction to the active function.
// Operates on the global context.
func VCVTSS2SIQ(mx, r operand.Op) { ctx.VCVTSS2SIQ(mx, r) }
// VCVTSS2SIQ_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSS2SIQ_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SIQ_RD_SAE(x, r))
}
// VCVTSS2SIQ_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SIQ_RD_SAE(x, r operand.Op) { ctx.VCVTSS2SIQ_RD_SAE(x, r) }
// VCVTSS2SIQ_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSS2SIQ_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SIQ_RN_SAE(x, r))
}
// VCVTSS2SIQ_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SIQ_RN_SAE(x, r operand.Op) { ctx.VCVTSS2SIQ_RN_SAE(x, r) }
// VCVTSS2SIQ_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSS2SIQ_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SIQ_RU_SAE(x, r))
}
// VCVTSS2SIQ_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SIQ_RU_SAE(x, r operand.Op) { ctx.VCVTSS2SIQ_RU_SAE(x, r) }
// VCVTSS2SIQ_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSS2SIQ_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SIQ_RZ_SAE(x, r))
}
// VCVTSS2SIQ_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSS2SIQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SIQ_RZ_SAE(x, r operand.Op) { ctx.VCVTSS2SIQ_RZ_SAE(x, r) }
// VCVTSS2SI_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SI.RD_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RD_SAE instruction to the active function.
func (c *Context) VCVTSS2SI_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SI_RD_SAE(x, r))
}
// VCVTSS2SI_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SI.RD_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SI_RD_SAE(x, r operand.Op) { ctx.VCVTSS2SI_RD_SAE(x, r) }
// VCVTSS2SI_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SI.RN_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RN_SAE instruction to the active function.
func (c *Context) VCVTSS2SI_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SI_RN_SAE(x, r))
}
// VCVTSS2SI_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SI.RN_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SI_RN_SAE(x, r operand.Op) { ctx.VCVTSS2SI_RN_SAE(x, r) }
// VCVTSS2SI_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SI.RU_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RU_SAE instruction to the active function.
func (c *Context) VCVTSS2SI_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SI_RU_SAE(x, r))
}
// VCVTSS2SI_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SI.RU_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SI_RU_SAE(x, r operand.Op) { ctx.VCVTSS2SI_RU_SAE(x, r) }
// VCVTSS2SI_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SI.RZ_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RZ_SAE instruction to the active function.
func (c *Context) VCVTSS2SI_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2SI_RZ_SAE(x, r))
}
// VCVTSS2SI_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SI.RZ_SAE xmm r32
//
// Construct and append a VCVTSS2SI.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2SI_RZ_SAE(x, r operand.Op) { ctx.VCVTSS2SI_RZ_SAE(x, r) }
// VCVTSS2USIL: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIL m32 r32
// VCVTSS2USIL xmm r32
//
// Construct and append a VCVTSS2USIL instruction to the active function.
func (c *Context) VCVTSS2USIL(mx, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIL(mx, r))
}
// VCVTSS2USIL: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIL m32 r32
// VCVTSS2USIL xmm r32
//
// Construct and append a VCVTSS2USIL instruction to the active function.
// Operates on the global context.
func VCVTSS2USIL(mx, r operand.Op) { ctx.VCVTSS2USIL(mx, r) }
// VCVTSS2USIL_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIL.RD_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RD_SAE instruction to the active function.
func (c *Context) VCVTSS2USIL_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIL_RD_SAE(x, r))
}
// VCVTSS2USIL_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIL.RD_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIL_RD_SAE(x, r operand.Op) { ctx.VCVTSS2USIL_RD_SAE(x, r) }
// VCVTSS2USIL_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIL.RN_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RN_SAE instruction to the active function.
func (c *Context) VCVTSS2USIL_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIL_RN_SAE(x, r))
}
// VCVTSS2USIL_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIL.RN_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIL_RN_SAE(x, r operand.Op) { ctx.VCVTSS2USIL_RN_SAE(x, r) }
// VCVTSS2USIL_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIL.RU_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RU_SAE instruction to the active function.
func (c *Context) VCVTSS2USIL_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIL_RU_SAE(x, r))
}
// VCVTSS2USIL_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIL.RU_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIL_RU_SAE(x, r operand.Op) { ctx.VCVTSS2USIL_RU_SAE(x, r) }
// VCVTSS2USIL_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIL.RZ_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RZ_SAE instruction to the active function.
func (c *Context) VCVTSS2USIL_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIL_RZ_SAE(x, r))
}
// VCVTSS2USIL_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIL.RZ_SAE xmm r32
//
// Construct and append a VCVTSS2USIL.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIL_RZ_SAE(x, r operand.Op) { ctx.VCVTSS2USIL_RZ_SAE(x, r) }
// VCVTSS2USIQ: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIQ m32 r64
// VCVTSS2USIQ xmm r64
//
// Construct and append a VCVTSS2USIQ instruction to the active function.
func (c *Context) VCVTSS2USIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIQ(mx, r))
}
// VCVTSS2USIQ: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIQ m32 r64
// VCVTSS2USIQ xmm r64
//
// Construct and append a VCVTSS2USIQ instruction to the active function.
// Operates on the global context.
func VCVTSS2USIQ(mx, r operand.Op) { ctx.VCVTSS2USIQ(mx, r) }
// VCVTSS2USIQ_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RD_SAE instruction to the active function.
func (c *Context) VCVTSS2USIQ_RD_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIQ_RD_SAE(x, r))
}
// VCVTSS2USIQ_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RD_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIQ_RD_SAE(x, r operand.Op) { ctx.VCVTSS2USIQ_RD_SAE(x, r) }
// VCVTSS2USIQ_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RN_SAE instruction to the active function.
func (c *Context) VCVTSS2USIQ_RN_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIQ_RN_SAE(x, r))
}
// VCVTSS2USIQ_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIQ.RN_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIQ_RN_SAE(x, r operand.Op) { ctx.VCVTSS2USIQ_RN_SAE(x, r) }
// VCVTSS2USIQ_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RU_SAE instruction to the active function.
func (c *Context) VCVTSS2USIQ_RU_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIQ_RU_SAE(x, r))
}
// VCVTSS2USIQ_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RU_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIQ_RU_SAE(x, r operand.Op) { ctx.VCVTSS2USIQ_RU_SAE(x, r) }
// VCVTSS2USIQ_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTSS2USIQ_RZ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTSS2USIQ_RZ_SAE(x, r))
}
// VCVTSS2USIQ_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIQ.RZ_SAE xmm r64
//
// Construct and append a VCVTSS2USIQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTSS2USIQ_RZ_SAE(x, r operand.Op) { ctx.VCVTSS2USIQ_RZ_SAE(x, r) }
// VCVTTPD2DQ: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQ m512 k ymm
// VCVTTPD2DQ m512 ymm
// VCVTTPD2DQ zmm k ymm
// VCVTTPD2DQ zmm ymm
//
// Construct and append a VCVTTPD2DQ instruction to the active function.
func (c *Context) VCVTTPD2DQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ(ops...))
}
// VCVTTPD2DQ: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQ m512 k ymm
// VCVTTPD2DQ m512 ymm
// VCVTTPD2DQ zmm k ymm
// VCVTTPD2DQ zmm ymm
//
// Construct and append a VCVTTPD2DQ instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ(ops ...operand.Op) { ctx.VCVTTPD2DQ(ops...) }
// VCVTTPD2DQX: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQX m128 xmm
// VCVTTPD2DQX xmm xmm
// VCVTTPD2DQX m128 k xmm
// VCVTTPD2DQX xmm k xmm
//
// Construct and append a VCVTTPD2DQX instruction to the active function.
func (c *Context) VCVTTPD2DQX(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQX(ops...))
}
// VCVTTPD2DQX: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQX m128 xmm
// VCVTTPD2DQX xmm xmm
// VCVTTPD2DQX m128 k xmm
// VCVTTPD2DQX xmm k xmm
//
// Construct and append a VCVTTPD2DQX instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQX(ops ...operand.Op) { ctx.VCVTTPD2DQX(ops...) }
// VCVTTPD2DQX_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQX.BCST m64 k xmm
// VCVTTPD2DQX.BCST m64 xmm
//
// Construct and append a VCVTTPD2DQX.BCST instruction to the active function.
func (c *Context) VCVTTPD2DQX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQX_BCST(ops...))
}
// VCVTTPD2DQX_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQX.BCST m64 k xmm
// VCVTTPD2DQX.BCST m64 xmm
//
// Construct and append a VCVTTPD2DQX.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQX_BCST(ops ...operand.Op) { ctx.VCVTTPD2DQX_BCST(ops...) }
// VCVTTPD2DQX_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2DQX.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2DQX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2DQX_BCST_Z(m, k, x))
}
// VCVTTPD2DQX_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2DQX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQX_BCST_Z(m, k, x operand.Op) { ctx.VCVTTPD2DQX_BCST_Z(m, k, x) }
// VCVTTPD2DQX_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.Z m128 k xmm
// VCVTTPD2DQX.Z xmm k xmm
//
// Construct and append a VCVTTPD2DQX.Z instruction to the active function.
func (c *Context) VCVTTPD2DQX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2DQX_Z(mx, k, x))
}
// VCVTTPD2DQX_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.Z m128 k xmm
// VCVTTPD2DQX.Z xmm k xmm
//
// Construct and append a VCVTTPD2DQX.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQX_Z(mx, k, x operand.Op) { ctx.VCVTTPD2DQX_Z(mx, k, x) }
// VCVTTPD2DQY: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQY m256 xmm
// VCVTTPD2DQY ymm xmm
// VCVTTPD2DQY m256 k xmm
// VCVTTPD2DQY ymm k xmm
//
// Construct and append a VCVTTPD2DQY instruction to the active function.
func (c *Context) VCVTTPD2DQY(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQY(ops...))
}
// VCVTTPD2DQY: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQY m256 xmm
// VCVTTPD2DQY ymm xmm
// VCVTTPD2DQY m256 k xmm
// VCVTTPD2DQY ymm k xmm
//
// Construct and append a VCVTTPD2DQY instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQY(ops ...operand.Op) { ctx.VCVTTPD2DQY(ops...) }
// VCVTTPD2DQY_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQY.BCST m64 k xmm
// VCVTTPD2DQY.BCST m64 xmm
//
// Construct and append a VCVTTPD2DQY.BCST instruction to the active function.
func (c *Context) VCVTTPD2DQY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQY_BCST(ops...))
}
// VCVTTPD2DQY_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQY.BCST m64 k xmm
// VCVTTPD2DQY.BCST m64 xmm
//
// Construct and append a VCVTTPD2DQY.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQY_BCST(ops ...operand.Op) { ctx.VCVTTPD2DQY_BCST(ops...) }
// VCVTTPD2DQY_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2DQY.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2DQY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2DQY_BCST_Z(m, k, x))
}
// VCVTTPD2DQY_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2DQY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQY_BCST_Z(m, k, x operand.Op) { ctx.VCVTTPD2DQY_BCST_Z(m, k, x) }
// VCVTTPD2DQY_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.Z m256 k xmm
// VCVTTPD2DQY.Z ymm k xmm
//
// Construct and append a VCVTTPD2DQY.Z instruction to the active function.
func (c *Context) VCVTTPD2DQY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2DQY_Z(my, k, x))
}
// VCVTTPD2DQY_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.Z m256 k xmm
// VCVTTPD2DQY.Z ymm k xmm
//
// Construct and append a VCVTTPD2DQY.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQY_Z(my, k, x operand.Op) { ctx.VCVTTPD2DQY_Z(my, k, x) }
// VCVTTPD2DQ_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQ.BCST m64 k ymm
// VCVTTPD2DQ.BCST m64 ymm
//
// Construct and append a VCVTTPD2DQ.BCST instruction to the active function.
func (c *Context) VCVTTPD2DQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ_BCST(ops...))
}
// VCVTTPD2DQ_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQ.BCST m64 k ymm
// VCVTTPD2DQ.BCST m64 ymm
//
// Construct and append a VCVTTPD2DQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ_BCST(ops ...operand.Op) { ctx.VCVTTPD2DQ_BCST(ops...) }
// VCVTTPD2DQ_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTTPD2DQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2DQ_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ_BCST_Z(m, k, y))
}
// VCVTTPD2DQ_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTTPD2DQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ_BCST_Z(m, k, y operand.Op) { ctx.VCVTTPD2DQ_BCST_Z(m, k, y) }
// VCVTTPD2DQ_SAE: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2DQ.SAE zmm k ymm
// VCVTTPD2DQ.SAE zmm ymm
//
// Construct and append a VCVTTPD2DQ.SAE instruction to the active function.
func (c *Context) VCVTTPD2DQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ_SAE(ops...))
}
// VCVTTPD2DQ_SAE: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2DQ.SAE zmm k ymm
// VCVTTPD2DQ.SAE zmm ymm
//
// Construct and append a VCVTTPD2DQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ_SAE(ops ...operand.Op) { ctx.VCVTTPD2DQ_SAE(ops...) }
// VCVTTPD2DQ_SAE_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.SAE.Z zmm k ymm
//
// Construct and append a VCVTTPD2DQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPD2DQ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ_SAE_Z(z, k, y))
}
// VCVTTPD2DQ_SAE_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.SAE.Z zmm k ymm
//
// Construct and append a VCVTTPD2DQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ_SAE_Z(z, k, y operand.Op) { ctx.VCVTTPD2DQ_SAE_Z(z, k, y) }
// VCVTTPD2DQ_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.Z m512 k ymm
// VCVTTPD2DQ.Z zmm k ymm
//
// Construct and append a VCVTTPD2DQ.Z instruction to the active function.
func (c *Context) VCVTTPD2DQ_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2DQ_Z(mz, k, y))
}
// VCVTTPD2DQ_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.Z m512 k ymm
// VCVTTPD2DQ.Z zmm k ymm
//
// Construct and append a VCVTTPD2DQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2DQ_Z(mz, k, y operand.Op) { ctx.VCVTTPD2DQ_Z(mz, k, y) }
// VCVTTPD2QQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTTPD2QQ m128 k xmm
// VCVTTPD2QQ m128 xmm
// VCVTTPD2QQ m256 k ymm
// VCVTTPD2QQ m256 ymm
// VCVTTPD2QQ xmm k xmm
// VCVTTPD2QQ xmm xmm
// VCVTTPD2QQ ymm k ymm
// VCVTTPD2QQ ymm ymm
// VCVTTPD2QQ m512 k zmm
// VCVTTPD2QQ m512 zmm
// VCVTTPD2QQ zmm k zmm
// VCVTTPD2QQ zmm zmm
//
// Construct and append a VCVTTPD2QQ instruction to the active function.
func (c *Context) VCVTTPD2QQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ(ops...))
}
// VCVTTPD2QQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTTPD2QQ m128 k xmm
// VCVTTPD2QQ m128 xmm
// VCVTTPD2QQ m256 k ymm
// VCVTTPD2QQ m256 ymm
// VCVTTPD2QQ xmm k xmm
// VCVTTPD2QQ xmm xmm
// VCVTTPD2QQ ymm k ymm
// VCVTTPD2QQ ymm ymm
// VCVTTPD2QQ m512 k zmm
// VCVTTPD2QQ m512 zmm
// VCVTTPD2QQ zmm k zmm
// VCVTTPD2QQ zmm zmm
//
// Construct and append a VCVTTPD2QQ instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ(ops ...operand.Op) { ctx.VCVTTPD2QQ(ops...) }
// VCVTTPD2QQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2QQ.BCST m64 k xmm
// VCVTTPD2QQ.BCST m64 k ymm
// VCVTTPD2QQ.BCST m64 xmm
// VCVTTPD2QQ.BCST m64 ymm
// VCVTTPD2QQ.BCST m64 k zmm
// VCVTTPD2QQ.BCST m64 zmm
//
// Construct and append a VCVTTPD2QQ.BCST instruction to the active function.
func (c *Context) VCVTTPD2QQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ_BCST(ops...))
}
// VCVTTPD2QQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2QQ.BCST m64 k xmm
// VCVTTPD2QQ.BCST m64 k ymm
// VCVTTPD2QQ.BCST m64 xmm
// VCVTTPD2QQ.BCST m64 ymm
// VCVTTPD2QQ.BCST m64 k zmm
// VCVTTPD2QQ.BCST m64 zmm
//
// Construct and append a VCVTTPD2QQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ_BCST(ops ...operand.Op) { ctx.VCVTTPD2QQ_BCST(ops...) }
// VCVTTPD2QQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.BCST.Z m64 k xmm
// VCVTTPD2QQ.BCST.Z m64 k ymm
// VCVTTPD2QQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTTPD2QQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2QQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ_BCST_Z(m, k, xyz))
}
// VCVTTPD2QQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.BCST.Z m64 k xmm
// VCVTTPD2QQ.BCST.Z m64 k ymm
// VCVTTPD2QQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTTPD2QQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPD2QQ_BCST_Z(m, k, xyz) }
// VCVTTPD2QQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2QQ.SAE zmm k zmm
// VCVTTPD2QQ.SAE zmm zmm
//
// Construct and append a VCVTTPD2QQ.SAE instruction to the active function.
func (c *Context) VCVTTPD2QQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ_SAE(ops...))
}
// VCVTTPD2QQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2QQ.SAE zmm k zmm
// VCVTTPD2QQ.SAE zmm zmm
//
// Construct and append a VCVTTPD2QQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ_SAE(ops ...operand.Op) { ctx.VCVTTPD2QQ_SAE(ops...) }
// VCVTTPD2QQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPD2QQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPD2QQ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ_SAE_Z(z, k, z1))
}
// VCVTTPD2QQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPD2QQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTTPD2QQ_SAE_Z(z, k, z1) }
// VCVTTPD2QQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.Z m128 k xmm
// VCVTTPD2QQ.Z m256 k ymm
// VCVTTPD2QQ.Z xmm k xmm
// VCVTTPD2QQ.Z ymm k ymm
// VCVTTPD2QQ.Z m512 k zmm
// VCVTTPD2QQ.Z zmm k zmm
//
// Construct and append a VCVTTPD2QQ.Z instruction to the active function.
func (c *Context) VCVTTPD2QQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPD2QQ_Z(mxyz, k, xyz))
}
// VCVTTPD2QQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.Z m128 k xmm
// VCVTTPD2QQ.Z m256 k ymm
// VCVTTPD2QQ.Z xmm k xmm
// VCVTTPD2QQ.Z ymm k ymm
// VCVTTPD2QQ.Z m512 k zmm
// VCVTTPD2QQ.Z zmm k zmm
//
// Construct and append a VCVTTPD2QQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2QQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTTPD2QQ_Z(mxyz, k, xyz) }
// VCVTTPD2UDQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQ m512 k ymm
// VCVTTPD2UDQ m512 ymm
// VCVTTPD2UDQ zmm k ymm
// VCVTTPD2UDQ zmm ymm
//
// Construct and append a VCVTTPD2UDQ instruction to the active function.
func (c *Context) VCVTTPD2UDQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ(ops...))
}
// VCVTTPD2UDQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQ m512 k ymm
// VCVTTPD2UDQ m512 ymm
// VCVTTPD2UDQ zmm k ymm
// VCVTTPD2UDQ zmm ymm
//
// Construct and append a VCVTTPD2UDQ instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ(ops ...operand.Op) { ctx.VCVTTPD2UDQ(ops...) }
// VCVTTPD2UDQX: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQX m128 k xmm
// VCVTTPD2UDQX m128 xmm
// VCVTTPD2UDQX xmm k xmm
// VCVTTPD2UDQX xmm xmm
//
// Construct and append a VCVTTPD2UDQX instruction to the active function.
func (c *Context) VCVTTPD2UDQX(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQX(ops...))
}
// VCVTTPD2UDQX: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQX m128 k xmm
// VCVTTPD2UDQX m128 xmm
// VCVTTPD2UDQX xmm k xmm
// VCVTTPD2UDQX xmm xmm
//
// Construct and append a VCVTTPD2UDQX instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQX(ops ...operand.Op) { ctx.VCVTTPD2UDQX(ops...) }
// VCVTTPD2UDQX_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQX.BCST m64 k xmm
// VCVTTPD2UDQX.BCST m64 xmm
//
// Construct and append a VCVTTPD2UDQX.BCST instruction to the active function.
func (c *Context) VCVTTPD2UDQX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQX_BCST(ops...))
}
// VCVTTPD2UDQX_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQX.BCST m64 k xmm
// VCVTTPD2UDQX.BCST m64 xmm
//
// Construct and append a VCVTTPD2UDQX.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQX_BCST(ops ...operand.Op) { ctx.VCVTTPD2UDQX_BCST(ops...) }
// VCVTTPD2UDQX_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2UDQX.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQX_BCST_Z(m, k, x))
}
// VCVTTPD2UDQX_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2UDQX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQX_BCST_Z(m, k, x operand.Op) { ctx.VCVTTPD2UDQX_BCST_Z(m, k, x) }
// VCVTTPD2UDQX_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.Z m128 k xmm
// VCVTTPD2UDQX.Z xmm k xmm
//
// Construct and append a VCVTTPD2UDQX.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQX_Z(mx, k, x))
}
// VCVTTPD2UDQX_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.Z m128 k xmm
// VCVTTPD2UDQX.Z xmm k xmm
//
// Construct and append a VCVTTPD2UDQX.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQX_Z(mx, k, x operand.Op) { ctx.VCVTTPD2UDQX_Z(mx, k, x) }
// VCVTTPD2UDQY: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQY m256 k xmm
// VCVTTPD2UDQY m256 xmm
// VCVTTPD2UDQY ymm k xmm
// VCVTTPD2UDQY ymm xmm
//
// Construct and append a VCVTTPD2UDQY instruction to the active function.
func (c *Context) VCVTTPD2UDQY(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQY(ops...))
}
// VCVTTPD2UDQY: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQY m256 k xmm
// VCVTTPD2UDQY m256 xmm
// VCVTTPD2UDQY ymm k xmm
// VCVTTPD2UDQY ymm xmm
//
// Construct and append a VCVTTPD2UDQY instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQY(ops ...operand.Op) { ctx.VCVTTPD2UDQY(ops...) }
// VCVTTPD2UDQY_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQY.BCST m64 k xmm
// VCVTTPD2UDQY.BCST m64 xmm
//
// Construct and append a VCVTTPD2UDQY.BCST instruction to the active function.
func (c *Context) VCVTTPD2UDQY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQY_BCST(ops...))
}
// VCVTTPD2UDQY_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQY.BCST m64 k xmm
// VCVTTPD2UDQY.BCST m64 xmm
//
// Construct and append a VCVTTPD2UDQY.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQY_BCST(ops ...operand.Op) { ctx.VCVTTPD2UDQY_BCST(ops...) }
// VCVTTPD2UDQY_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2UDQY.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQY_BCST_Z(m, k, x))
}
// VCVTTPD2UDQY_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.BCST.Z m64 k xmm
//
// Construct and append a VCVTTPD2UDQY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQY_BCST_Z(m, k, x operand.Op) { ctx.VCVTTPD2UDQY_BCST_Z(m, k, x) }
// VCVTTPD2UDQY_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.Z m256 k xmm
// VCVTTPD2UDQY.Z ymm k xmm
//
// Construct and append a VCVTTPD2UDQY.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQY_Z(my, k, x))
}
// VCVTTPD2UDQY_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.Z m256 k xmm
// VCVTTPD2UDQY.Z ymm k xmm
//
// Construct and append a VCVTTPD2UDQY.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQY_Z(my, k, x operand.Op) { ctx.VCVTTPD2UDQY_Z(my, k, x) }
// VCVTTPD2UDQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQ.BCST m64 k ymm
// VCVTTPD2UDQ.BCST m64 ymm
//
// Construct and append a VCVTTPD2UDQ.BCST instruction to the active function.
func (c *Context) VCVTTPD2UDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ_BCST(ops...))
}
// VCVTTPD2UDQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQ.BCST m64 k ymm
// VCVTTPD2UDQ.BCST m64 ymm
//
// Construct and append a VCVTTPD2UDQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ_BCST(ops ...operand.Op) { ctx.VCVTTPD2UDQ_BCST(ops...) }
// VCVTTPD2UDQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTTPD2UDQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQ_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ_BCST_Z(m, k, y))
}
// VCVTTPD2UDQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.BCST.Z m64 k ymm
//
// Construct and append a VCVTTPD2UDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ_BCST_Z(m, k, y operand.Op) { ctx.VCVTTPD2UDQ_BCST_Z(m, k, y) }
// VCVTTPD2UDQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UDQ.SAE zmm k ymm
// VCVTTPD2UDQ.SAE zmm ymm
//
// Construct and append a VCVTTPD2UDQ.SAE instruction to the active function.
func (c *Context) VCVTTPD2UDQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ_SAE(ops...))
}
// VCVTTPD2UDQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UDQ.SAE zmm k ymm
// VCVTTPD2UDQ.SAE zmm ymm
//
// Construct and append a VCVTTPD2UDQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ_SAE(ops ...operand.Op) { ctx.VCVTTPD2UDQ_SAE(ops...) }
// VCVTTPD2UDQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.SAE.Z zmm k ymm
//
// Construct and append a VCVTTPD2UDQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ_SAE_Z(z, k, y))
}
// VCVTTPD2UDQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.SAE.Z zmm k ymm
//
// Construct and append a VCVTTPD2UDQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ_SAE_Z(z, k, y operand.Op) { ctx.VCVTTPD2UDQ_SAE_Z(z, k, y) }
// VCVTTPD2UDQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.Z m512 k ymm
// VCVTTPD2UDQ.Z zmm k ymm
//
// Construct and append a VCVTTPD2UDQ.Z instruction to the active function.
func (c *Context) VCVTTPD2UDQ_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTTPD2UDQ_Z(mz, k, y))
}
// VCVTTPD2UDQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.Z m512 k ymm
// VCVTTPD2UDQ.Z zmm k ymm
//
// Construct and append a VCVTTPD2UDQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UDQ_Z(mz, k, y operand.Op) { ctx.VCVTTPD2UDQ_Z(mz, k, y) }
// VCVTTPD2UQQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTTPD2UQQ m128 k xmm
// VCVTTPD2UQQ m128 xmm
// VCVTTPD2UQQ m256 k ymm
// VCVTTPD2UQQ m256 ymm
// VCVTTPD2UQQ xmm k xmm
// VCVTTPD2UQQ xmm xmm
// VCVTTPD2UQQ ymm k ymm
// VCVTTPD2UQQ ymm ymm
// VCVTTPD2UQQ m512 k zmm
// VCVTTPD2UQQ m512 zmm
// VCVTTPD2UQQ zmm k zmm
// VCVTTPD2UQQ zmm zmm
//
// Construct and append a VCVTTPD2UQQ instruction to the active function.
func (c *Context) VCVTTPD2UQQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ(ops...))
}
// VCVTTPD2UQQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTTPD2UQQ m128 k xmm
// VCVTTPD2UQQ m128 xmm
// VCVTTPD2UQQ m256 k ymm
// VCVTTPD2UQQ m256 ymm
// VCVTTPD2UQQ xmm k xmm
// VCVTTPD2UQQ xmm xmm
// VCVTTPD2UQQ ymm k ymm
// VCVTTPD2UQQ ymm ymm
// VCVTTPD2UQQ m512 k zmm
// VCVTTPD2UQQ m512 zmm
// VCVTTPD2UQQ zmm k zmm
// VCVTTPD2UQQ zmm zmm
//
// Construct and append a VCVTTPD2UQQ instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ(ops ...operand.Op) { ctx.VCVTTPD2UQQ(ops...) }
// VCVTTPD2UQQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UQQ.BCST m64 k xmm
// VCVTTPD2UQQ.BCST m64 k ymm
// VCVTTPD2UQQ.BCST m64 xmm
// VCVTTPD2UQQ.BCST m64 ymm
// VCVTTPD2UQQ.BCST m64 k zmm
// VCVTTPD2UQQ.BCST m64 zmm
//
// Construct and append a VCVTTPD2UQQ.BCST instruction to the active function.
func (c *Context) VCVTTPD2UQQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ_BCST(ops...))
}
// VCVTTPD2UQQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UQQ.BCST m64 k xmm
// VCVTTPD2UQQ.BCST m64 k ymm
// VCVTTPD2UQQ.BCST m64 xmm
// VCVTTPD2UQQ.BCST m64 ymm
// VCVTTPD2UQQ.BCST m64 k zmm
// VCVTTPD2UQQ.BCST m64 zmm
//
// Construct and append a VCVTTPD2UQQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ_BCST(ops ...operand.Op) { ctx.VCVTTPD2UQQ_BCST(ops...) }
// VCVTTPD2UQQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.BCST.Z m64 k xmm
// VCVTTPD2UQQ.BCST.Z m64 k ymm
// VCVTTPD2UQQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTTPD2UQQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPD2UQQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ_BCST_Z(m, k, xyz))
}
// VCVTTPD2UQQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.BCST.Z m64 k xmm
// VCVTTPD2UQQ.BCST.Z m64 k ymm
// VCVTTPD2UQQ.BCST.Z m64 k zmm
//
// Construct and append a VCVTTPD2UQQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPD2UQQ_BCST_Z(m, k, xyz) }
// VCVTTPD2UQQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UQQ.SAE zmm k zmm
// VCVTTPD2UQQ.SAE zmm zmm
//
// Construct and append a VCVTTPD2UQQ.SAE instruction to the active function.
func (c *Context) VCVTTPD2UQQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ_SAE(ops...))
}
// VCVTTPD2UQQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UQQ.SAE zmm k zmm
// VCVTTPD2UQQ.SAE zmm zmm
//
// Construct and append a VCVTTPD2UQQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ_SAE(ops ...operand.Op) { ctx.VCVTTPD2UQQ_SAE(ops...) }
// VCVTTPD2UQQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPD2UQQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPD2UQQ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ_SAE_Z(z, k, z1))
}
// VCVTTPD2UQQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPD2UQQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTTPD2UQQ_SAE_Z(z, k, z1) }
// VCVTTPD2UQQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.Z m128 k xmm
// VCVTTPD2UQQ.Z m256 k ymm
// VCVTTPD2UQQ.Z xmm k xmm
// VCVTTPD2UQQ.Z ymm k ymm
// VCVTTPD2UQQ.Z m512 k zmm
// VCVTTPD2UQQ.Z zmm k zmm
//
// Construct and append a VCVTTPD2UQQ.Z instruction to the active function.
func (c *Context) VCVTTPD2UQQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPD2UQQ_Z(mxyz, k, xyz))
}
// VCVTTPD2UQQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.Z m128 k xmm
// VCVTTPD2UQQ.Z m256 k ymm
// VCVTTPD2UQQ.Z xmm k xmm
// VCVTTPD2UQQ.Z ymm k ymm
// VCVTTPD2UQQ.Z m512 k zmm
// VCVTTPD2UQQ.Z zmm k zmm
//
// Construct and append a VCVTTPD2UQQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPD2UQQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTTPD2UQQ_Z(mxyz, k, xyz) }
// VCVTTPS2DQ: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPS2DQ m128 xmm
// VCVTTPS2DQ m256 ymm
// VCVTTPS2DQ xmm xmm
// VCVTTPS2DQ ymm ymm
// VCVTTPS2DQ m128 k xmm
// VCVTTPS2DQ m256 k ymm
// VCVTTPS2DQ xmm k xmm
// VCVTTPS2DQ ymm k ymm
// VCVTTPS2DQ m512 k zmm
// VCVTTPS2DQ m512 zmm
// VCVTTPS2DQ zmm k zmm
// VCVTTPS2DQ zmm zmm
//
// Construct and append a VCVTTPS2DQ instruction to the active function.
func (c *Context) VCVTTPS2DQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ(ops...))
}
// VCVTTPS2DQ: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPS2DQ m128 xmm
// VCVTTPS2DQ m256 ymm
// VCVTTPS2DQ xmm xmm
// VCVTTPS2DQ ymm ymm
// VCVTTPS2DQ m128 k xmm
// VCVTTPS2DQ m256 k ymm
// VCVTTPS2DQ xmm k xmm
// VCVTTPS2DQ ymm k ymm
// VCVTTPS2DQ m512 k zmm
// VCVTTPS2DQ m512 zmm
// VCVTTPS2DQ zmm k zmm
// VCVTTPS2DQ zmm zmm
//
// Construct and append a VCVTTPS2DQ instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ(ops ...operand.Op) { ctx.VCVTTPS2DQ(ops...) }
// VCVTTPS2DQ_BCST: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPS2DQ.BCST m32 k xmm
// VCVTTPS2DQ.BCST m32 k ymm
// VCVTTPS2DQ.BCST m32 xmm
// VCVTTPS2DQ.BCST m32 ymm
// VCVTTPS2DQ.BCST m32 k zmm
// VCVTTPS2DQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2DQ.BCST instruction to the active function.
func (c *Context) VCVTTPS2DQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ_BCST(ops...))
}
// VCVTTPS2DQ_BCST: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPS2DQ.BCST m32 k xmm
// VCVTTPS2DQ.BCST m32 k ymm
// VCVTTPS2DQ.BCST m32 xmm
// VCVTTPS2DQ.BCST m32 ymm
// VCVTTPS2DQ.BCST m32 k zmm
// VCVTTPS2DQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2DQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ_BCST(ops ...operand.Op) { ctx.VCVTTPS2DQ_BCST(ops...) }
// VCVTTPS2DQ_BCST_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.BCST.Z m32 k xmm
// VCVTTPS2DQ.BCST.Z m32 k ymm
// VCVTTPS2DQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2DQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPS2DQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ_BCST_Z(m, k, xyz))
}
// VCVTTPS2DQ_BCST_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.BCST.Z m32 k xmm
// VCVTTPS2DQ.BCST.Z m32 k ymm
// VCVTTPS2DQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2DQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPS2DQ_BCST_Z(m, k, xyz) }
// VCVTTPS2DQ_SAE: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2DQ.SAE zmm k zmm
// VCVTTPS2DQ.SAE zmm zmm
//
// Construct and append a VCVTTPS2DQ.SAE instruction to the active function.
func (c *Context) VCVTTPS2DQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ_SAE(ops...))
}
// VCVTTPS2DQ_SAE: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2DQ.SAE zmm k zmm
// VCVTTPS2DQ.SAE zmm zmm
//
// Construct and append a VCVTTPS2DQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ_SAE(ops ...operand.Op) { ctx.VCVTTPS2DQ_SAE(ops...) }
// VCVTTPS2DQ_SAE_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPS2DQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPS2DQ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ_SAE_Z(z, k, z1))
}
// VCVTTPS2DQ_SAE_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPS2DQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTTPS2DQ_SAE_Z(z, k, z1) }
// VCVTTPS2DQ_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.Z m128 k xmm
// VCVTTPS2DQ.Z m256 k ymm
// VCVTTPS2DQ.Z xmm k xmm
// VCVTTPS2DQ.Z ymm k ymm
// VCVTTPS2DQ.Z m512 k zmm
// VCVTTPS2DQ.Z zmm k zmm
//
// Construct and append a VCVTTPS2DQ.Z instruction to the active function.
func (c *Context) VCVTTPS2DQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2DQ_Z(mxyz, k, xyz))
}
// VCVTTPS2DQ_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.Z m128 k xmm
// VCVTTPS2DQ.Z m256 k ymm
// VCVTTPS2DQ.Z xmm k xmm
// VCVTTPS2DQ.Z ymm k ymm
// VCVTTPS2DQ.Z m512 k zmm
// VCVTTPS2DQ.Z zmm k zmm
//
// Construct and append a VCVTTPS2DQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2DQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTTPS2DQ_Z(mxyz, k, xyz) }
// VCVTTPS2QQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2QQ m128 k ymm
// VCVTTPS2QQ m128 ymm
// VCVTTPS2QQ m64 k xmm
// VCVTTPS2QQ m64 xmm
// VCVTTPS2QQ xmm k xmm
// VCVTTPS2QQ xmm k ymm
// VCVTTPS2QQ xmm xmm
// VCVTTPS2QQ xmm ymm
// VCVTTPS2QQ m256 k zmm
// VCVTTPS2QQ m256 zmm
// VCVTTPS2QQ ymm k zmm
// VCVTTPS2QQ ymm zmm
//
// Construct and append a VCVTTPS2QQ instruction to the active function.
func (c *Context) VCVTTPS2QQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ(ops...))
}
// VCVTTPS2QQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2QQ m128 k ymm
// VCVTTPS2QQ m128 ymm
// VCVTTPS2QQ m64 k xmm
// VCVTTPS2QQ m64 xmm
// VCVTTPS2QQ xmm k xmm
// VCVTTPS2QQ xmm k ymm
// VCVTTPS2QQ xmm xmm
// VCVTTPS2QQ xmm ymm
// VCVTTPS2QQ m256 k zmm
// VCVTTPS2QQ m256 zmm
// VCVTTPS2QQ ymm k zmm
// VCVTTPS2QQ ymm zmm
//
// Construct and append a VCVTTPS2QQ instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ(ops ...operand.Op) { ctx.VCVTTPS2QQ(ops...) }
// VCVTTPS2QQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2QQ.BCST m32 k xmm
// VCVTTPS2QQ.BCST m32 k ymm
// VCVTTPS2QQ.BCST m32 xmm
// VCVTTPS2QQ.BCST m32 ymm
// VCVTTPS2QQ.BCST m32 k zmm
// VCVTTPS2QQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2QQ.BCST instruction to the active function.
func (c *Context) VCVTTPS2QQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ_BCST(ops...))
}
// VCVTTPS2QQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2QQ.BCST m32 k xmm
// VCVTTPS2QQ.BCST m32 k ymm
// VCVTTPS2QQ.BCST m32 xmm
// VCVTTPS2QQ.BCST m32 ymm
// VCVTTPS2QQ.BCST m32 k zmm
// VCVTTPS2QQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2QQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ_BCST(ops ...operand.Op) { ctx.VCVTTPS2QQ_BCST(ops...) }
// VCVTTPS2QQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.BCST.Z m32 k xmm
// VCVTTPS2QQ.BCST.Z m32 k ymm
// VCVTTPS2QQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2QQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPS2QQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ_BCST_Z(m, k, xyz))
}
// VCVTTPS2QQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.BCST.Z m32 k xmm
// VCVTTPS2QQ.BCST.Z m32 k ymm
// VCVTTPS2QQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2QQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPS2QQ_BCST_Z(m, k, xyz) }
// VCVTTPS2QQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2QQ.SAE ymm k zmm
// VCVTTPS2QQ.SAE ymm zmm
//
// Construct and append a VCVTTPS2QQ.SAE instruction to the active function.
func (c *Context) VCVTTPS2QQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ_SAE(ops...))
}
// VCVTTPS2QQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2QQ.SAE ymm k zmm
// VCVTTPS2QQ.SAE ymm zmm
//
// Construct and append a VCVTTPS2QQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ_SAE(ops ...operand.Op) { ctx.VCVTTPS2QQ_SAE(ops...) }
// VCVTTPS2QQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.SAE.Z ymm k zmm
//
// Construct and append a VCVTTPS2QQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPS2QQ_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ_SAE_Z(y, k, z))
}
// VCVTTPS2QQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.SAE.Z ymm k zmm
//
// Construct and append a VCVTTPS2QQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ_SAE_Z(y, k, z operand.Op) { ctx.VCVTTPS2QQ_SAE_Z(y, k, z) }
// VCVTTPS2QQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.Z m128 k ymm
// VCVTTPS2QQ.Z m64 k xmm
// VCVTTPS2QQ.Z xmm k xmm
// VCVTTPS2QQ.Z xmm k ymm
// VCVTTPS2QQ.Z m256 k zmm
// VCVTTPS2QQ.Z ymm k zmm
//
// Construct and append a VCVTTPS2QQ.Z instruction to the active function.
func (c *Context) VCVTTPS2QQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2QQ_Z(mxy, k, xyz))
}
// VCVTTPS2QQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.Z m128 k ymm
// VCVTTPS2QQ.Z m64 k xmm
// VCVTTPS2QQ.Z xmm k xmm
// VCVTTPS2QQ.Z xmm k ymm
// VCVTTPS2QQ.Z m256 k zmm
// VCVTTPS2QQ.Z ymm k zmm
//
// Construct and append a VCVTTPS2QQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2QQ_Z(mxy, k, xyz operand.Op) { ctx.VCVTTPS2QQ_Z(mxy, k, xyz) }
// VCVTTPS2UDQ: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTTPS2UDQ m128 k xmm
// VCVTTPS2UDQ m128 xmm
// VCVTTPS2UDQ m256 k ymm
// VCVTTPS2UDQ m256 ymm
// VCVTTPS2UDQ xmm k xmm
// VCVTTPS2UDQ xmm xmm
// VCVTTPS2UDQ ymm k ymm
// VCVTTPS2UDQ ymm ymm
// VCVTTPS2UDQ m512 k zmm
// VCVTTPS2UDQ m512 zmm
// VCVTTPS2UDQ zmm k zmm
// VCVTTPS2UDQ zmm zmm
//
// Construct and append a VCVTTPS2UDQ instruction to the active function.
func (c *Context) VCVTTPS2UDQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ(ops...))
}
// VCVTTPS2UDQ: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTTPS2UDQ m128 k xmm
// VCVTTPS2UDQ m128 xmm
// VCVTTPS2UDQ m256 k ymm
// VCVTTPS2UDQ m256 ymm
// VCVTTPS2UDQ xmm k xmm
// VCVTTPS2UDQ xmm xmm
// VCVTTPS2UDQ ymm k ymm
// VCVTTPS2UDQ ymm ymm
// VCVTTPS2UDQ m512 k zmm
// VCVTTPS2UDQ m512 zmm
// VCVTTPS2UDQ zmm k zmm
// VCVTTPS2UDQ zmm zmm
//
// Construct and append a VCVTTPS2UDQ instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ(ops ...operand.Op) { ctx.VCVTTPS2UDQ(ops...) }
// VCVTTPS2UDQ_BCST: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UDQ.BCST m32 k xmm
// VCVTTPS2UDQ.BCST m32 k ymm
// VCVTTPS2UDQ.BCST m32 xmm
// VCVTTPS2UDQ.BCST m32 ymm
// VCVTTPS2UDQ.BCST m32 k zmm
// VCVTTPS2UDQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2UDQ.BCST instruction to the active function.
func (c *Context) VCVTTPS2UDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ_BCST(ops...))
}
// VCVTTPS2UDQ_BCST: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UDQ.BCST m32 k xmm
// VCVTTPS2UDQ.BCST m32 k ymm
// VCVTTPS2UDQ.BCST m32 xmm
// VCVTTPS2UDQ.BCST m32 ymm
// VCVTTPS2UDQ.BCST m32 k zmm
// VCVTTPS2UDQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2UDQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ_BCST(ops ...operand.Op) { ctx.VCVTTPS2UDQ_BCST(ops...) }
// VCVTTPS2UDQ_BCST_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.BCST.Z m32 k xmm
// VCVTTPS2UDQ.BCST.Z m32 k ymm
// VCVTTPS2UDQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2UDQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPS2UDQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ_BCST_Z(m, k, xyz))
}
// VCVTTPS2UDQ_BCST_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.BCST.Z m32 k xmm
// VCVTTPS2UDQ.BCST.Z m32 k ymm
// VCVTTPS2UDQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2UDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPS2UDQ_BCST_Z(m, k, xyz) }
// VCVTTPS2UDQ_SAE: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UDQ.SAE zmm k zmm
// VCVTTPS2UDQ.SAE zmm zmm
//
// Construct and append a VCVTTPS2UDQ.SAE instruction to the active function.
func (c *Context) VCVTTPS2UDQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ_SAE(ops...))
}
// VCVTTPS2UDQ_SAE: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UDQ.SAE zmm k zmm
// VCVTTPS2UDQ.SAE zmm zmm
//
// Construct and append a VCVTTPS2UDQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ_SAE(ops ...operand.Op) { ctx.VCVTTPS2UDQ_SAE(ops...) }
// VCVTTPS2UDQ_SAE_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPS2UDQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPS2UDQ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ_SAE_Z(z, k, z1))
}
// VCVTTPS2UDQ_SAE_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.SAE.Z zmm k zmm
//
// Construct and append a VCVTTPS2UDQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTTPS2UDQ_SAE_Z(z, k, z1) }
// VCVTTPS2UDQ_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.Z m128 k xmm
// VCVTTPS2UDQ.Z m256 k ymm
// VCVTTPS2UDQ.Z xmm k xmm
// VCVTTPS2UDQ.Z ymm k ymm
// VCVTTPS2UDQ.Z m512 k zmm
// VCVTTPS2UDQ.Z zmm k zmm
//
// Construct and append a VCVTTPS2UDQ.Z instruction to the active function.
func (c *Context) VCVTTPS2UDQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2UDQ_Z(mxyz, k, xyz))
}
// VCVTTPS2UDQ_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.Z m128 k xmm
// VCVTTPS2UDQ.Z m256 k ymm
// VCVTTPS2UDQ.Z xmm k xmm
// VCVTTPS2UDQ.Z ymm k ymm
// VCVTTPS2UDQ.Z m512 k zmm
// VCVTTPS2UDQ.Z zmm k zmm
//
// Construct and append a VCVTTPS2UDQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UDQ_Z(mxyz, k, xyz operand.Op) { ctx.VCVTTPS2UDQ_Z(mxyz, k, xyz) }
// VCVTTPS2UQQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2UQQ m128 k ymm
// VCVTTPS2UQQ m128 ymm
// VCVTTPS2UQQ m64 k xmm
// VCVTTPS2UQQ m64 xmm
// VCVTTPS2UQQ xmm k xmm
// VCVTTPS2UQQ xmm k ymm
// VCVTTPS2UQQ xmm xmm
// VCVTTPS2UQQ xmm ymm
// VCVTTPS2UQQ m256 k zmm
// VCVTTPS2UQQ m256 zmm
// VCVTTPS2UQQ ymm k zmm
// VCVTTPS2UQQ ymm zmm
//
// Construct and append a VCVTTPS2UQQ instruction to the active function.
func (c *Context) VCVTTPS2UQQ(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ(ops...))
}
// VCVTTPS2UQQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2UQQ m128 k ymm
// VCVTTPS2UQQ m128 ymm
// VCVTTPS2UQQ m64 k xmm
// VCVTTPS2UQQ m64 xmm
// VCVTTPS2UQQ xmm k xmm
// VCVTTPS2UQQ xmm k ymm
// VCVTTPS2UQQ xmm xmm
// VCVTTPS2UQQ xmm ymm
// VCVTTPS2UQQ m256 k zmm
// VCVTTPS2UQQ m256 zmm
// VCVTTPS2UQQ ymm k zmm
// VCVTTPS2UQQ ymm zmm
//
// Construct and append a VCVTTPS2UQQ instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ(ops ...operand.Op) { ctx.VCVTTPS2UQQ(ops...) }
// VCVTTPS2UQQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UQQ.BCST m32 k xmm
// VCVTTPS2UQQ.BCST m32 k ymm
// VCVTTPS2UQQ.BCST m32 xmm
// VCVTTPS2UQQ.BCST m32 ymm
// VCVTTPS2UQQ.BCST m32 k zmm
// VCVTTPS2UQQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2UQQ.BCST instruction to the active function.
func (c *Context) VCVTTPS2UQQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ_BCST(ops...))
}
// VCVTTPS2UQQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UQQ.BCST m32 k xmm
// VCVTTPS2UQQ.BCST m32 k ymm
// VCVTTPS2UQQ.BCST m32 xmm
// VCVTTPS2UQQ.BCST m32 ymm
// VCVTTPS2UQQ.BCST m32 k zmm
// VCVTTPS2UQQ.BCST m32 zmm
//
// Construct and append a VCVTTPS2UQQ.BCST instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ_BCST(ops ...operand.Op) { ctx.VCVTTPS2UQQ_BCST(ops...) }
// VCVTTPS2UQQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.BCST.Z m32 k xmm
// VCVTTPS2UQQ.BCST.Z m32 k ymm
// VCVTTPS2UQQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2UQQ.BCST.Z instruction to the active function.
func (c *Context) VCVTTPS2UQQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ_BCST_Z(m, k, xyz))
}
// VCVTTPS2UQQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.BCST.Z m32 k xmm
// VCVTTPS2UQQ.BCST.Z m32 k ymm
// VCVTTPS2UQQ.BCST.Z m32 k zmm
//
// Construct and append a VCVTTPS2UQQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTTPS2UQQ_BCST_Z(m, k, xyz) }
// VCVTTPS2UQQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UQQ.SAE ymm k zmm
// VCVTTPS2UQQ.SAE ymm zmm
//
// Construct and append a VCVTTPS2UQQ.SAE instruction to the active function.
func (c *Context) VCVTTPS2UQQ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ_SAE(ops...))
}
// VCVTTPS2UQQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UQQ.SAE ymm k zmm
// VCVTTPS2UQQ.SAE ymm zmm
//
// Construct and append a VCVTTPS2UQQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ_SAE(ops ...operand.Op) { ctx.VCVTTPS2UQQ_SAE(ops...) }
// VCVTTPS2UQQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.SAE.Z ymm k zmm
//
// Construct and append a VCVTTPS2UQQ.SAE.Z instruction to the active function.
func (c *Context) VCVTTPS2UQQ_SAE_Z(y, k, z operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ_SAE_Z(y, k, z))
}
// VCVTTPS2UQQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.SAE.Z ymm k zmm
//
// Construct and append a VCVTTPS2UQQ.SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ_SAE_Z(y, k, z operand.Op) { ctx.VCVTTPS2UQQ_SAE_Z(y, k, z) }
// VCVTTPS2UQQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.Z m128 k ymm
// VCVTTPS2UQQ.Z m64 k xmm
// VCVTTPS2UQQ.Z xmm k xmm
// VCVTTPS2UQQ.Z xmm k ymm
// VCVTTPS2UQQ.Z m256 k zmm
// VCVTTPS2UQQ.Z ymm k zmm
//
// Construct and append a VCVTTPS2UQQ.Z instruction to the active function.
func (c *Context) VCVTTPS2UQQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTTPS2UQQ_Z(mxy, k, xyz))
}
// VCVTTPS2UQQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.Z m128 k ymm
// VCVTTPS2UQQ.Z m64 k xmm
// VCVTTPS2UQQ.Z xmm k xmm
// VCVTTPS2UQQ.Z xmm k ymm
// VCVTTPS2UQQ.Z m256 k zmm
// VCVTTPS2UQQ.Z ymm k zmm
//
// Construct and append a VCVTTPS2UQQ.Z instruction to the active function.
// Operates on the global context.
func VCVTTPS2UQQ_Z(mxy, k, xyz operand.Op) { ctx.VCVTTPS2UQQ_Z(mxy, k, xyz) }
// VCVTTSD2SI: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SI m64 r32
// VCVTTSD2SI xmm r32
//
// Construct and append a VCVTTSD2SI instruction to the active function.
func (c *Context) VCVTTSD2SI(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSD2SI(mx, r))
}
// VCVTTSD2SI: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SI m64 r32
// VCVTTSD2SI xmm r32
//
// Construct and append a VCVTTSD2SI instruction to the active function.
// Operates on the global context.
func VCVTTSD2SI(mx, r operand.Op) { ctx.VCVTTSD2SI(mx, r) }
// VCVTTSD2SIQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SIQ m64 r64
// VCVTTSD2SIQ xmm r64
//
// Construct and append a VCVTTSD2SIQ instruction to the active function.
func (c *Context) VCVTTSD2SIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSD2SIQ(mx, r))
}
// VCVTTSD2SIQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SIQ m64 r64
// VCVTTSD2SIQ xmm r64
//
// Construct and append a VCVTTSD2SIQ instruction to the active function.
// Operates on the global context.
func VCVTTSD2SIQ(mx, r operand.Op) { ctx.VCVTTSD2SIQ(mx, r) }
// VCVTTSD2SIQ_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SIQ.SAE xmm r64
//
// Construct and append a VCVTTSD2SIQ.SAE instruction to the active function.
func (c *Context) VCVTTSD2SIQ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSD2SIQ_SAE(x, r))
}
// VCVTTSD2SIQ_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SIQ.SAE xmm r64
//
// Construct and append a VCVTTSD2SIQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSD2SIQ_SAE(x, r operand.Op) { ctx.VCVTTSD2SIQ_SAE(x, r) }
// VCVTTSD2SI_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SI.SAE xmm r32
//
// Construct and append a VCVTTSD2SI.SAE instruction to the active function.
func (c *Context) VCVTTSD2SI_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSD2SI_SAE(x, r))
}
// VCVTTSD2SI_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SI.SAE xmm r32
//
// Construct and append a VCVTTSD2SI.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSD2SI_SAE(x, r operand.Op) { ctx.VCVTTSD2SI_SAE(x, r) }
// VCVTTSD2USIL: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIL m64 r32
// VCVTTSD2USIL xmm r32
//
// Construct and append a VCVTTSD2USIL instruction to the active function.
func (c *Context) VCVTTSD2USIL(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSD2USIL(mx, r))
}
// VCVTTSD2USIL: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIL m64 r32
// VCVTTSD2USIL xmm r32
//
// Construct and append a VCVTTSD2USIL instruction to the active function.
// Operates on the global context.
func VCVTTSD2USIL(mx, r operand.Op) { ctx.VCVTTSD2USIL(mx, r) }
// VCVTTSD2USIL_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIL.SAE xmm r32
//
// Construct and append a VCVTTSD2USIL.SAE instruction to the active function.
func (c *Context) VCVTTSD2USIL_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSD2USIL_SAE(x, r))
}
// VCVTTSD2USIL_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIL.SAE xmm r32
//
// Construct and append a VCVTTSD2USIL.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSD2USIL_SAE(x, r operand.Op) { ctx.VCVTTSD2USIL_SAE(x, r) }
// VCVTTSD2USIQ: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIQ m64 r64
// VCVTTSD2USIQ xmm r64
//
// Construct and append a VCVTTSD2USIQ instruction to the active function.
func (c *Context) VCVTTSD2USIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSD2USIQ(mx, r))
}
// VCVTTSD2USIQ: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIQ m64 r64
// VCVTTSD2USIQ xmm r64
//
// Construct and append a VCVTTSD2USIQ instruction to the active function.
// Operates on the global context.
func VCVTTSD2USIQ(mx, r operand.Op) { ctx.VCVTTSD2USIQ(mx, r) }
// VCVTTSD2USIQ_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIQ.SAE xmm r64
//
// Construct and append a VCVTTSD2USIQ.SAE instruction to the active function.
func (c *Context) VCVTTSD2USIQ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSD2USIQ_SAE(x, r))
}
// VCVTTSD2USIQ_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIQ.SAE xmm r64
//
// Construct and append a VCVTTSD2USIQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSD2USIQ_SAE(x, r operand.Op) { ctx.VCVTTSD2USIQ_SAE(x, r) }
// VCVTTSS2SI: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SI m32 r32
// VCVTTSS2SI xmm r32
//
// Construct and append a VCVTTSS2SI instruction to the active function.
func (c *Context) VCVTTSS2SI(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSS2SI(mx, r))
}
// VCVTTSS2SI: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SI m32 r32
// VCVTTSS2SI xmm r32
//
// Construct and append a VCVTTSS2SI instruction to the active function.
// Operates on the global context.
func VCVTTSS2SI(mx, r operand.Op) { ctx.VCVTTSS2SI(mx, r) }
// VCVTTSS2SIQ: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SIQ m32 r64
// VCVTTSS2SIQ xmm r64
//
// Construct and append a VCVTTSS2SIQ instruction to the active function.
func (c *Context) VCVTTSS2SIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSS2SIQ(mx, r))
}
// VCVTTSS2SIQ: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SIQ m32 r64
// VCVTTSS2SIQ xmm r64
//
// Construct and append a VCVTTSS2SIQ instruction to the active function.
// Operates on the global context.
func VCVTTSS2SIQ(mx, r operand.Op) { ctx.VCVTTSS2SIQ(mx, r) }
// VCVTTSS2SIQ_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SIQ.SAE xmm r64
//
// Construct and append a VCVTTSS2SIQ.SAE instruction to the active function.
func (c *Context) VCVTTSS2SIQ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSS2SIQ_SAE(x, r))
}
// VCVTTSS2SIQ_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SIQ.SAE xmm r64
//
// Construct and append a VCVTTSS2SIQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSS2SIQ_SAE(x, r operand.Op) { ctx.VCVTTSS2SIQ_SAE(x, r) }
// VCVTTSS2SI_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SI.SAE xmm r32
//
// Construct and append a VCVTTSS2SI.SAE instruction to the active function.
func (c *Context) VCVTTSS2SI_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSS2SI_SAE(x, r))
}
// VCVTTSS2SI_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SI.SAE xmm r32
//
// Construct and append a VCVTTSS2SI.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSS2SI_SAE(x, r operand.Op) { ctx.VCVTTSS2SI_SAE(x, r) }
// VCVTTSS2USIL: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIL m32 r32
// VCVTTSS2USIL xmm r32
//
// Construct and append a VCVTTSS2USIL instruction to the active function.
func (c *Context) VCVTTSS2USIL(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSS2USIL(mx, r))
}
// VCVTTSS2USIL: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIL m32 r32
// VCVTTSS2USIL xmm r32
//
// Construct and append a VCVTTSS2USIL instruction to the active function.
// Operates on the global context.
func VCVTTSS2USIL(mx, r operand.Op) { ctx.VCVTTSS2USIL(mx, r) }
// VCVTTSS2USIL_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIL.SAE xmm r32
//
// Construct and append a VCVTTSS2USIL.SAE instruction to the active function.
func (c *Context) VCVTTSS2USIL_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSS2USIL_SAE(x, r))
}
// VCVTTSS2USIL_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIL.SAE xmm r32
//
// Construct and append a VCVTTSS2USIL.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSS2USIL_SAE(x, r operand.Op) { ctx.VCVTTSS2USIL_SAE(x, r) }
// VCVTTSS2USIQ: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIQ m32 r64
// VCVTTSS2USIQ xmm r64
//
// Construct and append a VCVTTSS2USIQ instruction to the active function.
func (c *Context) VCVTTSS2USIQ(mx, r operand.Op) {
c.addinstruction(x86.VCVTTSS2USIQ(mx, r))
}
// VCVTTSS2USIQ: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIQ m32 r64
// VCVTTSS2USIQ xmm r64
//
// Construct and append a VCVTTSS2USIQ instruction to the active function.
// Operates on the global context.
func VCVTTSS2USIQ(mx, r operand.Op) { ctx.VCVTTSS2USIQ(mx, r) }
// VCVTTSS2USIQ_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIQ.SAE xmm r64
//
// Construct and append a VCVTTSS2USIQ.SAE instruction to the active function.
func (c *Context) VCVTTSS2USIQ_SAE(x, r operand.Op) {
c.addinstruction(x86.VCVTTSS2USIQ_SAE(x, r))
}
// VCVTTSS2USIQ_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIQ.SAE xmm r64
//
// Construct and append a VCVTTSS2USIQ.SAE instruction to the active function.
// Operates on the global context.
func VCVTTSS2USIQ_SAE(x, r operand.Op) { ctx.VCVTTSS2USIQ_SAE(x, r) }
// VCVTUDQ2PD: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PD m128 k ymm
// VCVTUDQ2PD m128 ymm
// VCVTUDQ2PD m64 k xmm
// VCVTUDQ2PD m64 xmm
// VCVTUDQ2PD xmm k xmm
// VCVTUDQ2PD xmm k ymm
// VCVTUDQ2PD xmm xmm
// VCVTUDQ2PD xmm ymm
// VCVTUDQ2PD m256 k zmm
// VCVTUDQ2PD m256 zmm
// VCVTUDQ2PD ymm k zmm
// VCVTUDQ2PD ymm zmm
//
// Construct and append a VCVTUDQ2PD instruction to the active function.
func (c *Context) VCVTUDQ2PD(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PD(ops...))
}
// VCVTUDQ2PD: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PD m128 k ymm
// VCVTUDQ2PD m128 ymm
// VCVTUDQ2PD m64 k xmm
// VCVTUDQ2PD m64 xmm
// VCVTUDQ2PD xmm k xmm
// VCVTUDQ2PD xmm k ymm
// VCVTUDQ2PD xmm xmm
// VCVTUDQ2PD xmm ymm
// VCVTUDQ2PD m256 k zmm
// VCVTUDQ2PD m256 zmm
// VCVTUDQ2PD ymm k zmm
// VCVTUDQ2PD ymm zmm
//
// Construct and append a VCVTUDQ2PD instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PD(ops ...operand.Op) { ctx.VCVTUDQ2PD(ops...) }
// VCVTUDQ2PD_BCST: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PD.BCST m32 k xmm
// VCVTUDQ2PD.BCST m32 k ymm
// VCVTUDQ2PD.BCST m32 xmm
// VCVTUDQ2PD.BCST m32 ymm
// VCVTUDQ2PD.BCST m32 k zmm
// VCVTUDQ2PD.BCST m32 zmm
//
// Construct and append a VCVTUDQ2PD.BCST instruction to the active function.
func (c *Context) VCVTUDQ2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PD_BCST(ops...))
}
// VCVTUDQ2PD_BCST: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PD.BCST m32 k xmm
// VCVTUDQ2PD.BCST m32 k ymm
// VCVTUDQ2PD.BCST m32 xmm
// VCVTUDQ2PD.BCST m32 ymm
// VCVTUDQ2PD.BCST m32 k zmm
// VCVTUDQ2PD.BCST m32 zmm
//
// Construct and append a VCVTUDQ2PD.BCST instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PD_BCST(ops ...operand.Op) { ctx.VCVTUDQ2PD_BCST(ops...) }
// VCVTUDQ2PD_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.BCST.Z m32 k xmm
// VCVTUDQ2PD.BCST.Z m32 k ymm
// VCVTUDQ2PD.BCST.Z m32 k zmm
//
// Construct and append a VCVTUDQ2PD.BCST.Z instruction to the active function.
func (c *Context) VCVTUDQ2PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUDQ2PD_BCST_Z(m, k, xyz))
}
// VCVTUDQ2PD_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.BCST.Z m32 k xmm
// VCVTUDQ2PD.BCST.Z m32 k ymm
// VCVTUDQ2PD.BCST.Z m32 k zmm
//
// Construct and append a VCVTUDQ2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PD_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTUDQ2PD_BCST_Z(m, k, xyz) }
// VCVTUDQ2PD_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.Z m128 k ymm
// VCVTUDQ2PD.Z m64 k xmm
// VCVTUDQ2PD.Z xmm k xmm
// VCVTUDQ2PD.Z xmm k ymm
// VCVTUDQ2PD.Z m256 k zmm
// VCVTUDQ2PD.Z ymm k zmm
//
// Construct and append a VCVTUDQ2PD.Z instruction to the active function.
func (c *Context) VCVTUDQ2PD_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUDQ2PD_Z(mxy, k, xyz))
}
// VCVTUDQ2PD_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.Z m128 k ymm
// VCVTUDQ2PD.Z m64 k xmm
// VCVTUDQ2PD.Z xmm k xmm
// VCVTUDQ2PD.Z xmm k ymm
// VCVTUDQ2PD.Z m256 k zmm
// VCVTUDQ2PD.Z ymm k zmm
//
// Construct and append a VCVTUDQ2PD.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PD_Z(mxy, k, xyz operand.Op) { ctx.VCVTUDQ2PD_Z(mxy, k, xyz) }
// VCVTUDQ2PS: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PS m128 k xmm
// VCVTUDQ2PS m128 xmm
// VCVTUDQ2PS m256 k ymm
// VCVTUDQ2PS m256 ymm
// VCVTUDQ2PS xmm k xmm
// VCVTUDQ2PS xmm xmm
// VCVTUDQ2PS ymm k ymm
// VCVTUDQ2PS ymm ymm
// VCVTUDQ2PS m512 k zmm
// VCVTUDQ2PS m512 zmm
// VCVTUDQ2PS zmm k zmm
// VCVTUDQ2PS zmm zmm
//
// Construct and append a VCVTUDQ2PS instruction to the active function.
func (c *Context) VCVTUDQ2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS(ops...))
}
// VCVTUDQ2PS: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PS m128 k xmm
// VCVTUDQ2PS m128 xmm
// VCVTUDQ2PS m256 k ymm
// VCVTUDQ2PS m256 ymm
// VCVTUDQ2PS xmm k xmm
// VCVTUDQ2PS xmm xmm
// VCVTUDQ2PS ymm k ymm
// VCVTUDQ2PS ymm ymm
// VCVTUDQ2PS m512 k zmm
// VCVTUDQ2PS m512 zmm
// VCVTUDQ2PS zmm k zmm
// VCVTUDQ2PS zmm zmm
//
// Construct and append a VCVTUDQ2PS instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS(ops ...operand.Op) { ctx.VCVTUDQ2PS(ops...) }
// VCVTUDQ2PS_BCST: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PS.BCST m32 k xmm
// VCVTUDQ2PS.BCST m32 k ymm
// VCVTUDQ2PS.BCST m32 xmm
// VCVTUDQ2PS.BCST m32 ymm
// VCVTUDQ2PS.BCST m32 k zmm
// VCVTUDQ2PS.BCST m32 zmm
//
// Construct and append a VCVTUDQ2PS.BCST instruction to the active function.
func (c *Context) VCVTUDQ2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_BCST(ops...))
}
// VCVTUDQ2PS_BCST: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PS.BCST m32 k xmm
// VCVTUDQ2PS.BCST m32 k ymm
// VCVTUDQ2PS.BCST m32 xmm
// VCVTUDQ2PS.BCST m32 ymm
// VCVTUDQ2PS.BCST m32 k zmm
// VCVTUDQ2PS.BCST m32 zmm
//
// Construct and append a VCVTUDQ2PS.BCST instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_BCST(ops ...operand.Op) { ctx.VCVTUDQ2PS_BCST(ops...) }
// VCVTUDQ2PS_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.BCST.Z m32 k xmm
// VCVTUDQ2PS.BCST.Z m32 k ymm
// VCVTUDQ2PS.BCST.Z m32 k zmm
//
// Construct and append a VCVTUDQ2PS.BCST.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_BCST_Z(m, k, xyz))
}
// VCVTUDQ2PS_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.BCST.Z m32 k xmm
// VCVTUDQ2PS.BCST.Z m32 k ymm
// VCVTUDQ2PS.BCST.Z m32 k zmm
//
// Construct and append a VCVTUDQ2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTUDQ2PS_BCST_Z(m, k, xyz) }
// VCVTUDQ2PS_RD_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE zmm k zmm
// VCVTUDQ2PS.RD_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RD_SAE instruction to the active function.
func (c *Context) VCVTUDQ2PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RD_SAE(ops...))
}
// VCVTUDQ2PS_RD_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE zmm k zmm
// VCVTUDQ2PS.RD_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RD_SAE(ops ...operand.Op) { ctx.VCVTUDQ2PS_RD_SAE(ops...) }
// VCVTUDQ2PS_RD_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RD_SAE_Z(z, k, z1))
}
// VCVTUDQ2PS_RD_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUDQ2PS_RD_SAE_Z(z, k, z1) }
// VCVTUDQ2PS_RN_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE zmm k zmm
// VCVTUDQ2PS.RN_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RN_SAE instruction to the active function.
func (c *Context) VCVTUDQ2PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RN_SAE(ops...))
}
// VCVTUDQ2PS_RN_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE zmm k zmm
// VCVTUDQ2PS.RN_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RN_SAE(ops ...operand.Op) { ctx.VCVTUDQ2PS_RN_SAE(ops...) }
// VCVTUDQ2PS_RN_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RN_SAE_Z(z, k, z1))
}
// VCVTUDQ2PS_RN_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUDQ2PS_RN_SAE_Z(z, k, z1) }
// VCVTUDQ2PS_RU_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE zmm k zmm
// VCVTUDQ2PS.RU_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RU_SAE instruction to the active function.
func (c *Context) VCVTUDQ2PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RU_SAE(ops...))
}
// VCVTUDQ2PS_RU_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE zmm k zmm
// VCVTUDQ2PS.RU_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RU_SAE(ops ...operand.Op) { ctx.VCVTUDQ2PS_RU_SAE(ops...) }
// VCVTUDQ2PS_RU_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RU_SAE_Z(z, k, z1))
}
// VCVTUDQ2PS_RU_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUDQ2PS_RU_SAE_Z(z, k, z1) }
// VCVTUDQ2PS_RZ_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE zmm k zmm
// VCVTUDQ2PS.RZ_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RZ_SAE instruction to the active function.
func (c *Context) VCVTUDQ2PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RZ_SAE(ops...))
}
// VCVTUDQ2PS_RZ_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE zmm k zmm
// VCVTUDQ2PS.RZ_SAE zmm zmm
//
// Construct and append a VCVTUDQ2PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RZ_SAE(ops ...operand.Op) { ctx.VCVTUDQ2PS_RZ_SAE(ops...) }
// VCVTUDQ2PS_RZ_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_RZ_SAE_Z(z, k, z1))
}
// VCVTUDQ2PS_RZ_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUDQ2PS_RZ_SAE_Z(z, k, z1) }
// VCVTUDQ2PS_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.Z m128 k xmm
// VCVTUDQ2PS.Z m256 k ymm
// VCVTUDQ2PS.Z xmm k xmm
// VCVTUDQ2PS.Z ymm k ymm
// VCVTUDQ2PS.Z m512 k zmm
// VCVTUDQ2PS.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.Z instruction to the active function.
func (c *Context) VCVTUDQ2PS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUDQ2PS_Z(mxyz, k, xyz))
}
// VCVTUDQ2PS_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.Z m128 k xmm
// VCVTUDQ2PS.Z m256 k ymm
// VCVTUDQ2PS.Z xmm k xmm
// VCVTUDQ2PS.Z ymm k ymm
// VCVTUDQ2PS.Z m512 k zmm
// VCVTUDQ2PS.Z zmm k zmm
//
// Construct and append a VCVTUDQ2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTUDQ2PS_Z(mxyz, k, xyz operand.Op) { ctx.VCVTUDQ2PS_Z(mxyz, k, xyz) }
// VCVTUQQ2PD: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PD m128 k xmm
// VCVTUQQ2PD m128 xmm
// VCVTUQQ2PD m256 k ymm
// VCVTUQQ2PD m256 ymm
// VCVTUQQ2PD xmm k xmm
// VCVTUQQ2PD xmm xmm
// VCVTUQQ2PD ymm k ymm
// VCVTUQQ2PD ymm ymm
// VCVTUQQ2PD m512 k zmm
// VCVTUQQ2PD m512 zmm
// VCVTUQQ2PD zmm k zmm
// VCVTUQQ2PD zmm zmm
//
// Construct and append a VCVTUQQ2PD instruction to the active function.
func (c *Context) VCVTUQQ2PD(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD(ops...))
}
// VCVTUQQ2PD: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PD m128 k xmm
// VCVTUQQ2PD m128 xmm
// VCVTUQQ2PD m256 k ymm
// VCVTUQQ2PD m256 ymm
// VCVTUQQ2PD xmm k xmm
// VCVTUQQ2PD xmm xmm
// VCVTUQQ2PD ymm k ymm
// VCVTUQQ2PD ymm ymm
// VCVTUQQ2PD m512 k zmm
// VCVTUQQ2PD m512 zmm
// VCVTUQQ2PD zmm k zmm
// VCVTUQQ2PD zmm zmm
//
// Construct and append a VCVTUQQ2PD instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD(ops ...operand.Op) { ctx.VCVTUQQ2PD(ops...) }
// VCVTUQQ2PD_BCST: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PD.BCST m64 k xmm
// VCVTUQQ2PD.BCST m64 k ymm
// VCVTUQQ2PD.BCST m64 xmm
// VCVTUQQ2PD.BCST m64 ymm
// VCVTUQQ2PD.BCST m64 k zmm
// VCVTUQQ2PD.BCST m64 zmm
//
// Construct and append a VCVTUQQ2PD.BCST instruction to the active function.
func (c *Context) VCVTUQQ2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_BCST(ops...))
}
// VCVTUQQ2PD_BCST: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PD.BCST m64 k xmm
// VCVTUQQ2PD.BCST m64 k ymm
// VCVTUQQ2PD.BCST m64 xmm
// VCVTUQQ2PD.BCST m64 ymm
// VCVTUQQ2PD.BCST m64 k zmm
// VCVTUQQ2PD.BCST m64 zmm
//
// Construct and append a VCVTUQQ2PD.BCST instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_BCST(ops ...operand.Op) { ctx.VCVTUQQ2PD_BCST(ops...) }
// VCVTUQQ2PD_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.BCST.Z m64 k xmm
// VCVTUQQ2PD.BCST.Z m64 k ymm
// VCVTUQQ2PD.BCST.Z m64 k zmm
//
// Construct and append a VCVTUQQ2PD.BCST.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_BCST_Z(m, k, xyz))
}
// VCVTUQQ2PD_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.BCST.Z m64 k xmm
// VCVTUQQ2PD.BCST.Z m64 k ymm
// VCVTUQQ2PD.BCST.Z m64 k zmm
//
// Construct and append a VCVTUQQ2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_BCST_Z(m, k, xyz operand.Op) { ctx.VCVTUQQ2PD_BCST_Z(m, k, xyz) }
// VCVTUQQ2PD_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE zmm k zmm
// VCVTUQQ2PD.RD_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RD_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RD_SAE(ops...))
}
// VCVTUQQ2PD_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE zmm k zmm
// VCVTUQQ2PD.RD_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RD_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PD_RD_SAE(ops...) }
// VCVTUQQ2PD_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RD_SAE_Z(z, k, z1))
}
// VCVTUQQ2PD_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUQQ2PD_RD_SAE_Z(z, k, z1) }
// VCVTUQQ2PD_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE zmm k zmm
// VCVTUQQ2PD.RN_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RN_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RN_SAE(ops...))
}
// VCVTUQQ2PD_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE zmm k zmm
// VCVTUQQ2PD.RN_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RN_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PD_RN_SAE(ops...) }
// VCVTUQQ2PD_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RN_SAE_Z(z, k, z1))
}
// VCVTUQQ2PD_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUQQ2PD_RN_SAE_Z(z, k, z1) }
// VCVTUQQ2PD_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE zmm k zmm
// VCVTUQQ2PD.RU_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RU_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RU_SAE(ops...))
}
// VCVTUQQ2PD_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE zmm k zmm
// VCVTUQQ2PD.RU_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RU_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PD_RU_SAE(ops...) }
// VCVTUQQ2PD_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RU_SAE_Z(z, k, z1))
}
// VCVTUQQ2PD_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUQQ2PD_RU_SAE_Z(z, k, z1) }
// VCVTUQQ2PD_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE zmm k zmm
// VCVTUQQ2PD.RZ_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RZ_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RZ_SAE(ops...))
}
// VCVTUQQ2PD_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE zmm k zmm
// VCVTUQQ2PD.RZ_SAE zmm zmm
//
// Construct and append a VCVTUQQ2PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RZ_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PD_RZ_SAE(ops...) }
// VCVTUQQ2PD_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_RZ_SAE_Z(z, k, z1))
}
// VCVTUQQ2PD_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VCVTUQQ2PD_RZ_SAE_Z(z, k, z1) }
// VCVTUQQ2PD_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.Z m128 k xmm
// VCVTUQQ2PD.Z m256 k ymm
// VCVTUQQ2PD.Z xmm k xmm
// VCVTUQQ2PD.Z ymm k ymm
// VCVTUQQ2PD.Z m512 k zmm
// VCVTUQQ2PD.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.Z instruction to the active function.
func (c *Context) VCVTUQQ2PD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VCVTUQQ2PD_Z(mxyz, k, xyz))
}
// VCVTUQQ2PD_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.Z m128 k xmm
// VCVTUQQ2PD.Z m256 k ymm
// VCVTUQQ2PD.Z xmm k xmm
// VCVTUQQ2PD.Z ymm k ymm
// VCVTUQQ2PD.Z m512 k zmm
// VCVTUQQ2PD.Z zmm k zmm
//
// Construct and append a VCVTUQQ2PD.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PD_Z(mxyz, k, xyz operand.Op) { ctx.VCVTUQQ2PD_Z(mxyz, k, xyz) }
// VCVTUQQ2PS: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PS m512 k ymm
// VCVTUQQ2PS m512 ymm
// VCVTUQQ2PS zmm k ymm
// VCVTUQQ2PS zmm ymm
//
// Construct and append a VCVTUQQ2PS instruction to the active function.
func (c *Context) VCVTUQQ2PS(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS(ops...))
}
// VCVTUQQ2PS: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PS m512 k ymm
// VCVTUQQ2PS m512 ymm
// VCVTUQQ2PS zmm k ymm
// VCVTUQQ2PS zmm ymm
//
// Construct and append a VCVTUQQ2PS instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS(ops ...operand.Op) { ctx.VCVTUQQ2PS(ops...) }
// VCVTUQQ2PSX: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSX m128 k xmm
// VCVTUQQ2PSX m128 xmm
// VCVTUQQ2PSX xmm k xmm
// VCVTUQQ2PSX xmm xmm
//
// Construct and append a VCVTUQQ2PSX instruction to the active function.
func (c *Context) VCVTUQQ2PSX(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSX(ops...))
}
// VCVTUQQ2PSX: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSX m128 k xmm
// VCVTUQQ2PSX m128 xmm
// VCVTUQQ2PSX xmm k xmm
// VCVTUQQ2PSX xmm xmm
//
// Construct and append a VCVTUQQ2PSX instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSX(ops ...operand.Op) { ctx.VCVTUQQ2PSX(ops...) }
// VCVTUQQ2PSX_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSX.BCST m64 k xmm
// VCVTUQQ2PSX.BCST m64 xmm
//
// Construct and append a VCVTUQQ2PSX.BCST instruction to the active function.
func (c *Context) VCVTUQQ2PSX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSX_BCST(ops...))
}
// VCVTUQQ2PSX_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSX.BCST m64 k xmm
// VCVTUQQ2PSX.BCST m64 xmm
//
// Construct and append a VCVTUQQ2PSX.BCST instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSX_BCST(ops ...operand.Op) { ctx.VCVTUQQ2PSX_BCST(ops...) }
// VCVTUQQ2PSX_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTUQQ2PSX.BCST.Z instruction to the active function.
func (c *Context) VCVTUQQ2PSX_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSX_BCST_Z(m, k, x))
}
// VCVTUQQ2PSX_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.BCST.Z m64 k xmm
//
// Construct and append a VCVTUQQ2PSX.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSX_BCST_Z(m, k, x operand.Op) { ctx.VCVTUQQ2PSX_BCST_Z(m, k, x) }
// VCVTUQQ2PSX_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.Z m128 k xmm
// VCVTUQQ2PSX.Z xmm k xmm
//
// Construct and append a VCVTUQQ2PSX.Z instruction to the active function.
func (c *Context) VCVTUQQ2PSX_Z(mx, k, x operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSX_Z(mx, k, x))
}
// VCVTUQQ2PSX_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.Z m128 k xmm
// VCVTUQQ2PSX.Z xmm k xmm
//
// Construct and append a VCVTUQQ2PSX.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSX_Z(mx, k, x operand.Op) { ctx.VCVTUQQ2PSX_Z(mx, k, x) }
// VCVTUQQ2PSY: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSY m256 k xmm
// VCVTUQQ2PSY m256 xmm
// VCVTUQQ2PSY ymm k xmm
// VCVTUQQ2PSY ymm xmm
//
// Construct and append a VCVTUQQ2PSY instruction to the active function.
func (c *Context) VCVTUQQ2PSY(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSY(ops...))
}
// VCVTUQQ2PSY: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSY m256 k xmm
// VCVTUQQ2PSY m256 xmm
// VCVTUQQ2PSY ymm k xmm
// VCVTUQQ2PSY ymm xmm
//
// Construct and append a VCVTUQQ2PSY instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSY(ops ...operand.Op) { ctx.VCVTUQQ2PSY(ops...) }
// VCVTUQQ2PSY_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSY.BCST m64 k xmm
// VCVTUQQ2PSY.BCST m64 xmm
//
// Construct and append a VCVTUQQ2PSY.BCST instruction to the active function.
func (c *Context) VCVTUQQ2PSY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSY_BCST(ops...))
}
// VCVTUQQ2PSY_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSY.BCST m64 k xmm
// VCVTUQQ2PSY.BCST m64 xmm
//
// Construct and append a VCVTUQQ2PSY.BCST instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSY_BCST(ops ...operand.Op) { ctx.VCVTUQQ2PSY_BCST(ops...) }
// VCVTUQQ2PSY_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTUQQ2PSY.BCST.Z instruction to the active function.
func (c *Context) VCVTUQQ2PSY_BCST_Z(m, k, x operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSY_BCST_Z(m, k, x))
}
// VCVTUQQ2PSY_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.BCST.Z m64 k xmm
//
// Construct and append a VCVTUQQ2PSY.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSY_BCST_Z(m, k, x operand.Op) { ctx.VCVTUQQ2PSY_BCST_Z(m, k, x) }
// VCVTUQQ2PSY_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.Z m256 k xmm
// VCVTUQQ2PSY.Z ymm k xmm
//
// Construct and append a VCVTUQQ2PSY.Z instruction to the active function.
func (c *Context) VCVTUQQ2PSY_Z(my, k, x operand.Op) {
c.addinstruction(x86.VCVTUQQ2PSY_Z(my, k, x))
}
// VCVTUQQ2PSY_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.Z m256 k xmm
// VCVTUQQ2PSY.Z ymm k xmm
//
// Construct and append a VCVTUQQ2PSY.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PSY_Z(my, k, x operand.Op) { ctx.VCVTUQQ2PSY_Z(my, k, x) }
// VCVTUQQ2PS_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PS.BCST m64 k ymm
// VCVTUQQ2PS.BCST m64 ymm
//
// Construct and append a VCVTUQQ2PS.BCST instruction to the active function.
func (c *Context) VCVTUQQ2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_BCST(ops...))
}
// VCVTUQQ2PS_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PS.BCST m64 k ymm
// VCVTUQQ2PS.BCST m64 ymm
//
// Construct and append a VCVTUQQ2PS.BCST instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_BCST(ops ...operand.Op) { ctx.VCVTUQQ2PS_BCST(ops...) }
// VCVTUQQ2PS_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTUQQ2PS.BCST.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_BCST_Z(m, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_BCST_Z(m, k, y))
}
// VCVTUQQ2PS_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.BCST.Z m64 k ymm
//
// Construct and append a VCVTUQQ2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_BCST_Z(m, k, y operand.Op) { ctx.VCVTUQQ2PS_BCST_Z(m, k, y) }
// VCVTUQQ2PS_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE zmm k ymm
// VCVTUQQ2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RD_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RD_SAE(ops...))
}
// VCVTUQQ2PS_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE zmm k ymm
// VCVTUQQ2PS.RD_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RD_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PS_RD_SAE(ops...) }
// VCVTUQQ2PS_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RD_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_RD_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RD_SAE_Z(z, k, y))
}
// VCVTUQQ2PS_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RD_SAE_Z(z, k, y operand.Op) { ctx.VCVTUQQ2PS_RD_SAE_Z(z, k, y) }
// VCVTUQQ2PS_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE zmm k ymm
// VCVTUQQ2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RN_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RN_SAE(ops...))
}
// VCVTUQQ2PS_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE zmm k ymm
// VCVTUQQ2PS.RN_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RN_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PS_RN_SAE(ops...) }
// VCVTUQQ2PS_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RN_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_RN_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RN_SAE_Z(z, k, y))
}
// VCVTUQQ2PS_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RN_SAE_Z(z, k, y operand.Op) { ctx.VCVTUQQ2PS_RN_SAE_Z(z, k, y) }
// VCVTUQQ2PS_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE zmm k ymm
// VCVTUQQ2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RU_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RU_SAE(ops...))
}
// VCVTUQQ2PS_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE zmm k ymm
// VCVTUQQ2PS.RU_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RU_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PS_RU_SAE(ops...) }
// VCVTUQQ2PS_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RU_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_RU_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RU_SAE_Z(z, k, y))
}
// VCVTUQQ2PS_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RU_SAE_Z(z, k, y operand.Op) { ctx.VCVTUQQ2PS_RU_SAE_Z(z, k, y) }
// VCVTUQQ2PS_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE zmm k ymm
// VCVTUQQ2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RZ_SAE instruction to the active function.
func (c *Context) VCVTUQQ2PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RZ_SAE(ops...))
}
// VCVTUQQ2PS_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE zmm k ymm
// VCVTUQQ2PS.RZ_SAE zmm ymm
//
// Construct and append a VCVTUQQ2PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RZ_SAE(ops ...operand.Op) { ctx.VCVTUQQ2PS_RZ_SAE(ops...) }
// VCVTUQQ2PS_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_RZ_SAE_Z(z, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_RZ_SAE_Z(z, k, y))
}
// VCVTUQQ2PS_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_RZ_SAE_Z(z, k, y operand.Op) { ctx.VCVTUQQ2PS_RZ_SAE_Z(z, k, y) }
// VCVTUQQ2PS_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.Z m512 k ymm
// VCVTUQQ2PS.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.Z instruction to the active function.
func (c *Context) VCVTUQQ2PS_Z(mz, k, y operand.Op) {
c.addinstruction(x86.VCVTUQQ2PS_Z(mz, k, y))
}
// VCVTUQQ2PS_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.Z m512 k ymm
// VCVTUQQ2PS.Z zmm k ymm
//
// Construct and append a VCVTUQQ2PS.Z instruction to the active function.
// Operates on the global context.
func VCVTUQQ2PS_Z(mz, k, y operand.Op) { ctx.VCVTUQQ2PS_Z(mz, k, y) }
// VCVTUSI2SDL: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDL m32 xmm xmm
// VCVTUSI2SDL r32 xmm xmm
//
// Construct and append a VCVTUSI2SDL instruction to the active function.
func (c *Context) VCVTUSI2SDL(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDL(mr, x, x1))
}
// VCVTUSI2SDL: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDL m32 xmm xmm
// VCVTUSI2SDL r32 xmm xmm
//
// Construct and append a VCVTUSI2SDL instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDL(mr, x, x1 operand.Op) { ctx.VCVTUSI2SDL(mr, x, x1) }
// VCVTUSI2SDQ: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDQ m64 xmm xmm
// VCVTUSI2SDQ r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ instruction to the active function.
func (c *Context) VCVTUSI2SDQ(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDQ(mr, x, x1))
}
// VCVTUSI2SDQ: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDQ m64 xmm xmm
// VCVTUSI2SDQ r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDQ(mr, x, x1 operand.Op) { ctx.VCVTUSI2SDQ(mr, x, x1) }
// VCVTUSI2SDQ_RD_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RD_SAE instruction to the active function.
func (c *Context) VCVTUSI2SDQ_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDQ_RD_SAE(r, x, x1))
}
// VCVTUSI2SDQ_RD_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDQ_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SDQ_RD_SAE(r, x, x1) }
// VCVTUSI2SDQ_RN_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SDQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RN_SAE instruction to the active function.
func (c *Context) VCVTUSI2SDQ_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDQ_RN_SAE(r, x, x1))
}
// VCVTUSI2SDQ_RN_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SDQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDQ_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SDQ_RN_SAE(r, x, x1) }
// VCVTUSI2SDQ_RU_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RU_SAE instruction to the active function.
func (c *Context) VCVTUSI2SDQ_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDQ_RU_SAE(r, x, x1))
}
// VCVTUSI2SDQ_RU_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDQ_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SDQ_RU_SAE(r, x, x1) }
// VCVTUSI2SDQ_RZ_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SDQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTUSI2SDQ_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SDQ_RZ_SAE(r, x, x1))
}
// VCVTUSI2SDQ_RZ_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SDQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SDQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SDQ_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SDQ_RZ_SAE(r, x, x1) }
// VCVTUSI2SSL: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSL m32 xmm xmm
// VCVTUSI2SSL r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL instruction to the active function.
func (c *Context) VCVTUSI2SSL(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSL(mr, x, x1))
}
// VCVTUSI2SSL: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSL m32 xmm xmm
// VCVTUSI2SSL r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSL(mr, x, x1 operand.Op) { ctx.VCVTUSI2SSL(mr, x, x1) }
// VCVTUSI2SSL_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RD_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RD_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSL_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSL_RD_SAE(r, x, x1))
}
// VCVTUSI2SSL_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RD_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSL_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSL_RD_SAE(r, x, x1) }
// VCVTUSI2SSL_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSL.RN_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RN_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSL_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSL_RN_SAE(r, x, x1))
}
// VCVTUSI2SSL_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSL.RN_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSL_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSL_RN_SAE(r, x, x1) }
// VCVTUSI2SSL_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RU_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RU_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSL_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSL_RU_SAE(r, x, x1))
}
// VCVTUSI2SSL_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RU_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSL_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSL_RU_SAE(r, x, x1) }
// VCVTUSI2SSL_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSL.RZ_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RZ_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSL_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSL_RZ_SAE(r, x, x1))
}
// VCVTUSI2SSL_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSL.RZ_SAE r32 xmm xmm
//
// Construct and append a VCVTUSI2SSL.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSL_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSL_RZ_SAE(r, x, x1) }
// VCVTUSI2SSQ: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSQ m64 xmm xmm
// VCVTUSI2SSQ r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ instruction to the active function.
func (c *Context) VCVTUSI2SSQ(mr, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSQ(mr, x, x1))
}
// VCVTUSI2SSQ: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSQ m64 xmm xmm
// VCVTUSI2SSQ r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSQ(mr, x, x1 operand.Op) { ctx.VCVTUSI2SSQ(mr, x, x1) }
// VCVTUSI2SSQ_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RD_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSQ_RD_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSQ_RD_SAE(r, x, x1))
}
// VCVTUSI2SSQ_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RD_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RD_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSQ_RD_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSQ_RD_SAE(r, x, x1) }
// VCVTUSI2SSQ_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RN_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSQ_RN_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSQ_RN_SAE(r, x, x1))
}
// VCVTUSI2SSQ_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSQ.RN_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RN_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSQ_RN_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSQ_RN_SAE(r, x, x1) }
// VCVTUSI2SSQ_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RU_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSQ_RU_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSQ_RU_SAE(r, x, x1))
}
// VCVTUSI2SSQ_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RU_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RU_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSQ_RU_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSQ_RU_SAE(r, x, x1) }
// VCVTUSI2SSQ_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RZ_SAE instruction to the active function.
func (c *Context) VCVTUSI2SSQ_RZ_SAE(r, x, x1 operand.Op) {
c.addinstruction(x86.VCVTUSI2SSQ_RZ_SAE(r, x, x1))
}
// VCVTUSI2SSQ_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSQ.RZ_SAE r64 xmm xmm
//
// Construct and append a VCVTUSI2SSQ.RZ_SAE instruction to the active function.
// Operates on the global context.
func VCVTUSI2SSQ_RZ_SAE(r, x, x1 operand.Op) { ctx.VCVTUSI2SSQ_RZ_SAE(r, x, x1) }
// VDBPSADBW: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes.
//
// Forms:
//
// VDBPSADBW imm8 m128 xmm k xmm
// VDBPSADBW imm8 m128 xmm xmm
// VDBPSADBW imm8 m256 ymm k ymm
// VDBPSADBW imm8 m256 ymm ymm
// VDBPSADBW imm8 xmm xmm k xmm
// VDBPSADBW imm8 xmm xmm xmm
// VDBPSADBW imm8 ymm ymm k ymm
// VDBPSADBW imm8 ymm ymm ymm
// VDBPSADBW imm8 m512 zmm k zmm
// VDBPSADBW imm8 m512 zmm zmm
// VDBPSADBW imm8 zmm zmm k zmm
// VDBPSADBW imm8 zmm zmm zmm
//
// Construct and append a VDBPSADBW instruction to the active function.
func (c *Context) VDBPSADBW(ops ...operand.Op) {
c.addinstruction(x86.VDBPSADBW(ops...))
}
// VDBPSADBW: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes.
//
// Forms:
//
// VDBPSADBW imm8 m128 xmm k xmm
// VDBPSADBW imm8 m128 xmm xmm
// VDBPSADBW imm8 m256 ymm k ymm
// VDBPSADBW imm8 m256 ymm ymm
// VDBPSADBW imm8 xmm xmm k xmm
// VDBPSADBW imm8 xmm xmm xmm
// VDBPSADBW imm8 ymm ymm k ymm
// VDBPSADBW imm8 ymm ymm ymm
// VDBPSADBW imm8 m512 zmm k zmm
// VDBPSADBW imm8 m512 zmm zmm
// VDBPSADBW imm8 zmm zmm k zmm
// VDBPSADBW imm8 zmm zmm zmm
//
// Construct and append a VDBPSADBW instruction to the active function.
// Operates on the global context.
func VDBPSADBW(ops ...operand.Op) { ctx.VDBPSADBW(ops...) }
// VDBPSADBW_Z: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes (Zeroing Masking).
//
// Forms:
//
// VDBPSADBW.Z imm8 m128 xmm k xmm
// VDBPSADBW.Z imm8 m256 ymm k ymm
// VDBPSADBW.Z imm8 xmm xmm k xmm
// VDBPSADBW.Z imm8 ymm ymm k ymm
// VDBPSADBW.Z imm8 m512 zmm k zmm
// VDBPSADBW.Z imm8 zmm zmm k zmm
//
// Construct and append a VDBPSADBW.Z instruction to the active function.
func (c *Context) VDBPSADBW_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VDBPSADBW_Z(i, mxyz, xyz, k, xyz1))
}
// VDBPSADBW_Z: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes (Zeroing Masking).
//
// Forms:
//
// VDBPSADBW.Z imm8 m128 xmm k xmm
// VDBPSADBW.Z imm8 m256 ymm k ymm
// VDBPSADBW.Z imm8 xmm xmm k xmm
// VDBPSADBW.Z imm8 ymm ymm k ymm
// VDBPSADBW.Z imm8 m512 zmm k zmm
// VDBPSADBW.Z imm8 zmm zmm k zmm
//
// Construct and append a VDBPSADBW.Z instruction to the active function.
// Operates on the global context.
func VDBPSADBW_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VDBPSADBW_Z(i, mxyz, xyz, k, xyz1) }
// VDIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPD m128 xmm xmm
// VDIVPD m256 ymm ymm
// VDIVPD xmm xmm xmm
// VDIVPD ymm ymm ymm
// VDIVPD m128 xmm k xmm
// VDIVPD m256 ymm k ymm
// VDIVPD xmm xmm k xmm
// VDIVPD ymm ymm k ymm
// VDIVPD m512 zmm k zmm
// VDIVPD m512 zmm zmm
// VDIVPD zmm zmm k zmm
// VDIVPD zmm zmm zmm
//
// Construct and append a VDIVPD instruction to the active function.
func (c *Context) VDIVPD(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD(ops...))
}
// VDIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPD m128 xmm xmm
// VDIVPD m256 ymm ymm
// VDIVPD xmm xmm xmm
// VDIVPD ymm ymm ymm
// VDIVPD m128 xmm k xmm
// VDIVPD m256 ymm k ymm
// VDIVPD xmm xmm k xmm
// VDIVPD ymm ymm k ymm
// VDIVPD m512 zmm k zmm
// VDIVPD m512 zmm zmm
// VDIVPD zmm zmm k zmm
// VDIVPD zmm zmm zmm
//
// Construct and append a VDIVPD instruction to the active function.
// Operates on the global context.
func VDIVPD(ops ...operand.Op) { ctx.VDIVPD(ops...) }
// VDIVPD_BCST: Divide Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPD.BCST m64 xmm k xmm
// VDIVPD.BCST m64 xmm xmm
// VDIVPD.BCST m64 ymm k ymm
// VDIVPD.BCST m64 ymm ymm
// VDIVPD.BCST m64 zmm k zmm
// VDIVPD.BCST m64 zmm zmm
//
// Construct and append a VDIVPD.BCST instruction to the active function.
func (c *Context) VDIVPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD_BCST(ops...))
}
// VDIVPD_BCST: Divide Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPD.BCST m64 xmm k xmm
// VDIVPD.BCST m64 xmm xmm
// VDIVPD.BCST m64 ymm k ymm
// VDIVPD.BCST m64 ymm ymm
// VDIVPD.BCST m64 zmm k zmm
// VDIVPD.BCST m64 zmm zmm
//
// Construct and append a VDIVPD.BCST instruction to the active function.
// Operates on the global context.
func VDIVPD_BCST(ops ...operand.Op) { ctx.VDIVPD_BCST(ops...) }
// VDIVPD_BCST_Z: Divide Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPD.BCST.Z m64 xmm k xmm
// VDIVPD.BCST.Z m64 ymm k ymm
// VDIVPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VDIVPD.BCST.Z instruction to the active function.
func (c *Context) VDIVPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VDIVPD_BCST_Z(m, xyz, k, xyz1))
}
// VDIVPD_BCST_Z: Divide Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPD.BCST.Z m64 xmm k xmm
// VDIVPD.BCST.Z m64 ymm k ymm
// VDIVPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VDIVPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VDIVPD_BCST_Z(m, xyz, k, xyz1) }
// VDIVPD_RD_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPD.RD_SAE zmm zmm k zmm
// VDIVPD.RD_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RD_SAE instruction to the active function.
func (c *Context) VDIVPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD_RD_SAE(ops...))
}
// VDIVPD_RD_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPD.RD_SAE zmm zmm k zmm
// VDIVPD.RD_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VDIVPD_RD_SAE(ops ...operand.Op) { ctx.VDIVPD_RD_SAE(ops...) }
// VDIVPD_RD_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RD_SAE.Z instruction to the active function.
func (c *Context) VDIVPD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPD_RD_SAE_Z(z, z1, k, z2))
}
// VDIVPD_RD_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPD_RD_SAE_Z(z, z1, k, z2) }
// VDIVPD_RN_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPD.RN_SAE zmm zmm k zmm
// VDIVPD.RN_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RN_SAE instruction to the active function.
func (c *Context) VDIVPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD_RN_SAE(ops...))
}
// VDIVPD_RN_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPD.RN_SAE zmm zmm k zmm
// VDIVPD.RN_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VDIVPD_RN_SAE(ops ...operand.Op) { ctx.VDIVPD_RN_SAE(ops...) }
// VDIVPD_RN_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RN_SAE.Z instruction to the active function.
func (c *Context) VDIVPD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPD_RN_SAE_Z(z, z1, k, z2))
}
// VDIVPD_RN_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPD_RN_SAE_Z(z, z1, k, z2) }
// VDIVPD_RU_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPD.RU_SAE zmm zmm k zmm
// VDIVPD.RU_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RU_SAE instruction to the active function.
func (c *Context) VDIVPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD_RU_SAE(ops...))
}
// VDIVPD_RU_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPD.RU_SAE zmm zmm k zmm
// VDIVPD.RU_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VDIVPD_RU_SAE(ops ...operand.Op) { ctx.VDIVPD_RU_SAE(ops...) }
// VDIVPD_RU_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RU_SAE.Z instruction to the active function.
func (c *Context) VDIVPD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPD_RU_SAE_Z(z, z1, k, z2))
}
// VDIVPD_RU_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPD_RU_SAE_Z(z, z1, k, z2) }
// VDIVPD_RZ_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPD.RZ_SAE zmm zmm k zmm
// VDIVPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RZ_SAE instruction to the active function.
func (c *Context) VDIVPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPD_RZ_SAE(ops...))
}
// VDIVPD_RZ_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPD.RZ_SAE zmm zmm k zmm
// VDIVPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VDIVPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VDIVPD_RZ_SAE(ops ...operand.Op) { ctx.VDIVPD_RZ_SAE(ops...) }
// VDIVPD_RZ_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VDIVPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPD_RZ_SAE_Z(z, z1, k, z2))
}
// VDIVPD_RZ_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPD_RZ_SAE_Z(z, z1, k, z2) }
// VDIVPD_Z: Divide Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPD.Z m128 xmm k xmm
// VDIVPD.Z m256 ymm k ymm
// VDIVPD.Z xmm xmm k xmm
// VDIVPD.Z ymm ymm k ymm
// VDIVPD.Z m512 zmm k zmm
// VDIVPD.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.Z instruction to the active function.
func (c *Context) VDIVPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VDIVPD_Z(mxyz, xyz, k, xyz1))
}
// VDIVPD_Z: Divide Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPD.Z m128 xmm k xmm
// VDIVPD.Z m256 ymm k ymm
// VDIVPD.Z xmm xmm k xmm
// VDIVPD.Z ymm ymm k ymm
// VDIVPD.Z m512 zmm k zmm
// VDIVPD.Z zmm zmm k zmm
//
// Construct and append a VDIVPD.Z instruction to the active function.
// Operates on the global context.
func VDIVPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VDIVPD_Z(mxyz, xyz, k, xyz1) }
// VDIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPS m128 xmm xmm
// VDIVPS m256 ymm ymm
// VDIVPS xmm xmm xmm
// VDIVPS ymm ymm ymm
// VDIVPS m128 xmm k xmm
// VDIVPS m256 ymm k ymm
// VDIVPS xmm xmm k xmm
// VDIVPS ymm ymm k ymm
// VDIVPS m512 zmm k zmm
// VDIVPS m512 zmm zmm
// VDIVPS zmm zmm k zmm
// VDIVPS zmm zmm zmm
//
// Construct and append a VDIVPS instruction to the active function.
func (c *Context) VDIVPS(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS(ops...))
}
// VDIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPS m128 xmm xmm
// VDIVPS m256 ymm ymm
// VDIVPS xmm xmm xmm
// VDIVPS ymm ymm ymm
// VDIVPS m128 xmm k xmm
// VDIVPS m256 ymm k ymm
// VDIVPS xmm xmm k xmm
// VDIVPS ymm ymm k ymm
// VDIVPS m512 zmm k zmm
// VDIVPS m512 zmm zmm
// VDIVPS zmm zmm k zmm
// VDIVPS zmm zmm zmm
//
// Construct and append a VDIVPS instruction to the active function.
// Operates on the global context.
func VDIVPS(ops ...operand.Op) { ctx.VDIVPS(ops...) }
// VDIVPS_BCST: Divide Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPS.BCST m32 xmm k xmm
// VDIVPS.BCST m32 xmm xmm
// VDIVPS.BCST m32 ymm k ymm
// VDIVPS.BCST m32 ymm ymm
// VDIVPS.BCST m32 zmm k zmm
// VDIVPS.BCST m32 zmm zmm
//
// Construct and append a VDIVPS.BCST instruction to the active function.
func (c *Context) VDIVPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS_BCST(ops...))
}
// VDIVPS_BCST: Divide Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPS.BCST m32 xmm k xmm
// VDIVPS.BCST m32 xmm xmm
// VDIVPS.BCST m32 ymm k ymm
// VDIVPS.BCST m32 ymm ymm
// VDIVPS.BCST m32 zmm k zmm
// VDIVPS.BCST m32 zmm zmm
//
// Construct and append a VDIVPS.BCST instruction to the active function.
// Operates on the global context.
func VDIVPS_BCST(ops ...operand.Op) { ctx.VDIVPS_BCST(ops...) }
// VDIVPS_BCST_Z: Divide Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPS.BCST.Z m32 xmm k xmm
// VDIVPS.BCST.Z m32 ymm k ymm
// VDIVPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VDIVPS.BCST.Z instruction to the active function.
func (c *Context) VDIVPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VDIVPS_BCST_Z(m, xyz, k, xyz1))
}
// VDIVPS_BCST_Z: Divide Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPS.BCST.Z m32 xmm k xmm
// VDIVPS.BCST.Z m32 ymm k ymm
// VDIVPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VDIVPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VDIVPS_BCST_Z(m, xyz, k, xyz1) }
// VDIVPS_RD_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPS.RD_SAE zmm zmm k zmm
// VDIVPS.RD_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RD_SAE instruction to the active function.
func (c *Context) VDIVPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS_RD_SAE(ops...))
}
// VDIVPS_RD_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPS.RD_SAE zmm zmm k zmm
// VDIVPS.RD_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VDIVPS_RD_SAE(ops ...operand.Op) { ctx.VDIVPS_RD_SAE(ops...) }
// VDIVPS_RD_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RD_SAE.Z instruction to the active function.
func (c *Context) VDIVPS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPS_RD_SAE_Z(z, z1, k, z2))
}
// VDIVPS_RD_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPS_RD_SAE_Z(z, z1, k, z2) }
// VDIVPS_RN_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPS.RN_SAE zmm zmm k zmm
// VDIVPS.RN_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RN_SAE instruction to the active function.
func (c *Context) VDIVPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS_RN_SAE(ops...))
}
// VDIVPS_RN_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPS.RN_SAE zmm zmm k zmm
// VDIVPS.RN_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VDIVPS_RN_SAE(ops ...operand.Op) { ctx.VDIVPS_RN_SAE(ops...) }
// VDIVPS_RN_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RN_SAE.Z instruction to the active function.
func (c *Context) VDIVPS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPS_RN_SAE_Z(z, z1, k, z2))
}
// VDIVPS_RN_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPS_RN_SAE_Z(z, z1, k, z2) }
// VDIVPS_RU_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPS.RU_SAE zmm zmm k zmm
// VDIVPS.RU_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RU_SAE instruction to the active function.
func (c *Context) VDIVPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS_RU_SAE(ops...))
}
// VDIVPS_RU_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPS.RU_SAE zmm zmm k zmm
// VDIVPS.RU_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VDIVPS_RU_SAE(ops ...operand.Op) { ctx.VDIVPS_RU_SAE(ops...) }
// VDIVPS_RU_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RU_SAE.Z instruction to the active function.
func (c *Context) VDIVPS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPS_RU_SAE_Z(z, z1, k, z2))
}
// VDIVPS_RU_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPS_RU_SAE_Z(z, z1, k, z2) }
// VDIVPS_RZ_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPS.RZ_SAE zmm zmm k zmm
// VDIVPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RZ_SAE instruction to the active function.
func (c *Context) VDIVPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVPS_RZ_SAE(ops...))
}
// VDIVPS_RZ_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPS.RZ_SAE zmm zmm k zmm
// VDIVPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VDIVPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VDIVPS_RZ_SAE(ops ...operand.Op) { ctx.VDIVPS_RZ_SAE(ops...) }
// VDIVPS_RZ_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VDIVPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VDIVPS_RZ_SAE_Z(z, z1, k, z2))
}
// VDIVPS_RZ_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VDIVPS_RZ_SAE_Z(z, z1, k, z2) }
// VDIVPS_Z: Divide Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPS.Z m128 xmm k xmm
// VDIVPS.Z m256 ymm k ymm
// VDIVPS.Z xmm xmm k xmm
// VDIVPS.Z ymm ymm k ymm
// VDIVPS.Z m512 zmm k zmm
// VDIVPS.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.Z instruction to the active function.
func (c *Context) VDIVPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VDIVPS_Z(mxyz, xyz, k, xyz1))
}
// VDIVPS_Z: Divide Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPS.Z m128 xmm k xmm
// VDIVPS.Z m256 ymm k ymm
// VDIVPS.Z xmm xmm k xmm
// VDIVPS.Z ymm ymm k ymm
// VDIVPS.Z m512 zmm k zmm
// VDIVPS.Z zmm zmm k zmm
//
// Construct and append a VDIVPS.Z instruction to the active function.
// Operates on the global context.
func VDIVPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VDIVPS_Z(mxyz, xyz, k, xyz1) }
// VDIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSD m64 xmm xmm
// VDIVSD xmm xmm xmm
// VDIVSD m64 xmm k xmm
// VDIVSD xmm xmm k xmm
//
// Construct and append a VDIVSD instruction to the active function.
func (c *Context) VDIVSD(ops ...operand.Op) {
c.addinstruction(x86.VDIVSD(ops...))
}
// VDIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSD m64 xmm xmm
// VDIVSD xmm xmm xmm
// VDIVSD m64 xmm k xmm
// VDIVSD xmm xmm k xmm
//
// Construct and append a VDIVSD instruction to the active function.
// Operates on the global context.
func VDIVSD(ops ...operand.Op) { ctx.VDIVSD(ops...) }
// VDIVSD_RD_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSD.RD_SAE xmm xmm k xmm
// VDIVSD.RD_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RD_SAE instruction to the active function.
func (c *Context) VDIVSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSD_RD_SAE(ops...))
}
// VDIVSD_RD_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSD.RD_SAE xmm xmm k xmm
// VDIVSD.RD_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VDIVSD_RD_SAE(ops ...operand.Op) { ctx.VDIVSD_RD_SAE(ops...) }
// VDIVSD_RD_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RD_SAE.Z instruction to the active function.
func (c *Context) VDIVSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSD_RD_SAE_Z(x, x1, k, x2))
}
// VDIVSD_RD_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSD_RD_SAE_Z(x, x1, k, x2) }
// VDIVSD_RN_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSD.RN_SAE xmm xmm k xmm
// VDIVSD.RN_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RN_SAE instruction to the active function.
func (c *Context) VDIVSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSD_RN_SAE(ops...))
}
// VDIVSD_RN_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSD.RN_SAE xmm xmm k xmm
// VDIVSD.RN_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VDIVSD_RN_SAE(ops ...operand.Op) { ctx.VDIVSD_RN_SAE(ops...) }
// VDIVSD_RN_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RN_SAE.Z instruction to the active function.
func (c *Context) VDIVSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSD_RN_SAE_Z(x, x1, k, x2))
}
// VDIVSD_RN_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSD_RN_SAE_Z(x, x1, k, x2) }
// VDIVSD_RU_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSD.RU_SAE xmm xmm k xmm
// VDIVSD.RU_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RU_SAE instruction to the active function.
func (c *Context) VDIVSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSD_RU_SAE(ops...))
}
// VDIVSD_RU_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSD.RU_SAE xmm xmm k xmm
// VDIVSD.RU_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VDIVSD_RU_SAE(ops ...operand.Op) { ctx.VDIVSD_RU_SAE(ops...) }
// VDIVSD_RU_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RU_SAE.Z instruction to the active function.
func (c *Context) VDIVSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSD_RU_SAE_Z(x, x1, k, x2))
}
// VDIVSD_RU_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSD_RU_SAE_Z(x, x1, k, x2) }
// VDIVSD_RZ_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSD.RZ_SAE xmm xmm k xmm
// VDIVSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RZ_SAE instruction to the active function.
func (c *Context) VDIVSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSD_RZ_SAE(ops...))
}
// VDIVSD_RZ_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSD.RZ_SAE xmm xmm k xmm
// VDIVSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VDIVSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VDIVSD_RZ_SAE(ops ...operand.Op) { ctx.VDIVSD_RZ_SAE(ops...) }
// VDIVSD_RZ_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VDIVSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSD_RZ_SAE_Z(x, x1, k, x2))
}
// VDIVSD_RZ_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSD_RZ_SAE_Z(x, x1, k, x2) }
// VDIVSD_Z: Divide Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSD.Z m64 xmm k xmm
// VDIVSD.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.Z instruction to the active function.
func (c *Context) VDIVSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VDIVSD_Z(mx, x, k, x1))
}
// VDIVSD_Z: Divide Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSD.Z m64 xmm k xmm
// VDIVSD.Z xmm xmm k xmm
//
// Construct and append a VDIVSD.Z instruction to the active function.
// Operates on the global context.
func VDIVSD_Z(mx, x, k, x1 operand.Op) { ctx.VDIVSD_Z(mx, x, k, x1) }
// VDIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSS m32 xmm xmm
// VDIVSS xmm xmm xmm
// VDIVSS m32 xmm k xmm
// VDIVSS xmm xmm k xmm
//
// Construct and append a VDIVSS instruction to the active function.
func (c *Context) VDIVSS(ops ...operand.Op) {
c.addinstruction(x86.VDIVSS(ops...))
}
// VDIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSS m32 xmm xmm
// VDIVSS xmm xmm xmm
// VDIVSS m32 xmm k xmm
// VDIVSS xmm xmm k xmm
//
// Construct and append a VDIVSS instruction to the active function.
// Operates on the global context.
func VDIVSS(ops ...operand.Op) { ctx.VDIVSS(ops...) }
// VDIVSS_RD_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSS.RD_SAE xmm xmm k xmm
// VDIVSS.RD_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RD_SAE instruction to the active function.
func (c *Context) VDIVSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSS_RD_SAE(ops...))
}
// VDIVSS_RD_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSS.RD_SAE xmm xmm k xmm
// VDIVSS.RD_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VDIVSS_RD_SAE(ops ...operand.Op) { ctx.VDIVSS_RD_SAE(ops...) }
// VDIVSS_RD_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RD_SAE.Z instruction to the active function.
func (c *Context) VDIVSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSS_RD_SAE_Z(x, x1, k, x2))
}
// VDIVSS_RD_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSS_RD_SAE_Z(x, x1, k, x2) }
// VDIVSS_RN_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSS.RN_SAE xmm xmm k xmm
// VDIVSS.RN_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RN_SAE instruction to the active function.
func (c *Context) VDIVSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSS_RN_SAE(ops...))
}
// VDIVSS_RN_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSS.RN_SAE xmm xmm k xmm
// VDIVSS.RN_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VDIVSS_RN_SAE(ops ...operand.Op) { ctx.VDIVSS_RN_SAE(ops...) }
// VDIVSS_RN_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RN_SAE.Z instruction to the active function.
func (c *Context) VDIVSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSS_RN_SAE_Z(x, x1, k, x2))
}
// VDIVSS_RN_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSS_RN_SAE_Z(x, x1, k, x2) }
// VDIVSS_RU_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSS.RU_SAE xmm xmm k xmm
// VDIVSS.RU_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RU_SAE instruction to the active function.
func (c *Context) VDIVSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSS_RU_SAE(ops...))
}
// VDIVSS_RU_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSS.RU_SAE xmm xmm k xmm
// VDIVSS.RU_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VDIVSS_RU_SAE(ops ...operand.Op) { ctx.VDIVSS_RU_SAE(ops...) }
// VDIVSS_RU_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RU_SAE.Z instruction to the active function.
func (c *Context) VDIVSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSS_RU_SAE_Z(x, x1, k, x2))
}
// VDIVSS_RU_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSS_RU_SAE_Z(x, x1, k, x2) }
// VDIVSS_RZ_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSS.RZ_SAE xmm xmm k xmm
// VDIVSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RZ_SAE instruction to the active function.
func (c *Context) VDIVSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VDIVSS_RZ_SAE(ops...))
}
// VDIVSS_RZ_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSS.RZ_SAE xmm xmm k xmm
// VDIVSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VDIVSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VDIVSS_RZ_SAE(ops ...operand.Op) { ctx.VDIVSS_RZ_SAE(ops...) }
// VDIVSS_RZ_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VDIVSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VDIVSS_RZ_SAE_Z(x, x1, k, x2))
}
// VDIVSS_RZ_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VDIVSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VDIVSS_RZ_SAE_Z(x, x1, k, x2) }
// VDIVSS_Z: Divide Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSS.Z m32 xmm k xmm
// VDIVSS.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.Z instruction to the active function.
func (c *Context) VDIVSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VDIVSS_Z(mx, x, k, x1))
}
// VDIVSS_Z: Divide Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSS.Z m32 xmm k xmm
// VDIVSS.Z xmm xmm k xmm
//
// Construct and append a VDIVSS.Z instruction to the active function.
// Operates on the global context.
func VDIVSS_Z(mx, x, k, x1 operand.Op) { ctx.VDIVSS_Z(mx, x, k, x1) }
// VDPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VDPPD imm8 m128 xmm xmm
// VDPPD imm8 xmm xmm xmm
//
// Construct and append a VDPPD instruction to the active function.
func (c *Context) VDPPD(i, mx, x, x1 operand.Op) {
c.addinstruction(x86.VDPPD(i, mx, x, x1))
}
// VDPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VDPPD imm8 m128 xmm xmm
// VDPPD imm8 xmm xmm xmm
//
// Construct and append a VDPPD instruction to the active function.
// Operates on the global context.
func VDPPD(i, mx, x, x1 operand.Op) { ctx.VDPPD(i, mx, x, x1) }
// VDPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VDPPS imm8 m128 xmm xmm
// VDPPS imm8 m256 ymm ymm
// VDPPS imm8 xmm xmm xmm
// VDPPS imm8 ymm ymm ymm
//
// Construct and append a VDPPS instruction to the active function.
func (c *Context) VDPPS(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VDPPS(i, mxy, xy, xy1))
}
// VDPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VDPPS imm8 m128 xmm xmm
// VDPPS imm8 m256 ymm ymm
// VDPPS imm8 xmm xmm xmm
// VDPPS imm8 ymm ymm ymm
//
// Construct and append a VDPPS instruction to the active function.
// Operates on the global context.
func VDPPS(i, mxy, xy, xy1 operand.Op) { ctx.VDPPS(i, mxy, xy, xy1) }
// VEXP2PD: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PD m512 k zmm
// VEXP2PD m512 zmm
// VEXP2PD zmm k zmm
// VEXP2PD zmm zmm
//
// Construct and append a VEXP2PD instruction to the active function.
func (c *Context) VEXP2PD(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PD(ops...))
}
// VEXP2PD: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PD m512 k zmm
// VEXP2PD m512 zmm
// VEXP2PD zmm k zmm
// VEXP2PD zmm zmm
//
// Construct and append a VEXP2PD instruction to the active function.
// Operates on the global context.
func VEXP2PD(ops ...operand.Op) { ctx.VEXP2PD(ops...) }
// VEXP2PD_BCST: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PD.BCST m64 k zmm
// VEXP2PD.BCST m64 zmm
//
// Construct and append a VEXP2PD.BCST instruction to the active function.
func (c *Context) VEXP2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PD_BCST(ops...))
}
// VEXP2PD_BCST: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PD.BCST m64 k zmm
// VEXP2PD.BCST m64 zmm
//
// Construct and append a VEXP2PD.BCST instruction to the active function.
// Operates on the global context.
func VEXP2PD_BCST(ops ...operand.Op) { ctx.VEXP2PD_BCST(ops...) }
// VEXP2PD_BCST_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.BCST.Z m64 k zmm
//
// Construct and append a VEXP2PD.BCST.Z instruction to the active function.
func (c *Context) VEXP2PD_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VEXP2PD_BCST_Z(m, k, z))
}
// VEXP2PD_BCST_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.BCST.Z m64 k zmm
//
// Construct and append a VEXP2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VEXP2PD_BCST_Z(m, k, z operand.Op) { ctx.VEXP2PD_BCST_Z(m, k, z) }
// VEXP2PD_SAE: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PD.SAE zmm k zmm
// VEXP2PD.SAE zmm zmm
//
// Construct and append a VEXP2PD.SAE instruction to the active function.
func (c *Context) VEXP2PD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PD_SAE(ops...))
}
// VEXP2PD_SAE: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PD.SAE zmm k zmm
// VEXP2PD.SAE zmm zmm
//
// Construct and append a VEXP2PD.SAE instruction to the active function.
// Operates on the global context.
func VEXP2PD_SAE(ops ...operand.Op) { ctx.VEXP2PD_SAE(ops...) }
// VEXP2PD_SAE_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.SAE.Z zmm k zmm
//
// Construct and append a VEXP2PD.SAE.Z instruction to the active function.
func (c *Context) VEXP2PD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VEXP2PD_SAE_Z(z, k, z1))
}
// VEXP2PD_SAE_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.SAE.Z zmm k zmm
//
// Construct and append a VEXP2PD.SAE.Z instruction to the active function.
// Operates on the global context.
func VEXP2PD_SAE_Z(z, k, z1 operand.Op) { ctx.VEXP2PD_SAE_Z(z, k, z1) }
// VEXP2PD_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PD.Z m512 k zmm
// VEXP2PD.Z zmm k zmm
//
// Construct and append a VEXP2PD.Z instruction to the active function.
func (c *Context) VEXP2PD_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VEXP2PD_Z(mz, k, z))
}
// VEXP2PD_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PD.Z m512 k zmm
// VEXP2PD.Z zmm k zmm
//
// Construct and append a VEXP2PD.Z instruction to the active function.
// Operates on the global context.
func VEXP2PD_Z(mz, k, z operand.Op) { ctx.VEXP2PD_Z(mz, k, z) }
// VEXP2PS: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PS m512 k zmm
// VEXP2PS m512 zmm
// VEXP2PS zmm k zmm
// VEXP2PS zmm zmm
//
// Construct and append a VEXP2PS instruction to the active function.
func (c *Context) VEXP2PS(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PS(ops...))
}
// VEXP2PS: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PS m512 k zmm
// VEXP2PS m512 zmm
// VEXP2PS zmm k zmm
// VEXP2PS zmm zmm
//
// Construct and append a VEXP2PS instruction to the active function.
// Operates on the global context.
func VEXP2PS(ops ...operand.Op) { ctx.VEXP2PS(ops...) }
// VEXP2PS_BCST: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PS.BCST m32 k zmm
// VEXP2PS.BCST m32 zmm
//
// Construct and append a VEXP2PS.BCST instruction to the active function.
func (c *Context) VEXP2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PS_BCST(ops...))
}
// VEXP2PS_BCST: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PS.BCST m32 k zmm
// VEXP2PS.BCST m32 zmm
//
// Construct and append a VEXP2PS.BCST instruction to the active function.
// Operates on the global context.
func VEXP2PS_BCST(ops ...operand.Op) { ctx.VEXP2PS_BCST(ops...) }
// VEXP2PS_BCST_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.BCST.Z m32 k zmm
//
// Construct and append a VEXP2PS.BCST.Z instruction to the active function.
func (c *Context) VEXP2PS_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VEXP2PS_BCST_Z(m, k, z))
}
// VEXP2PS_BCST_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.BCST.Z m32 k zmm
//
// Construct and append a VEXP2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VEXP2PS_BCST_Z(m, k, z operand.Op) { ctx.VEXP2PS_BCST_Z(m, k, z) }
// VEXP2PS_SAE: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PS.SAE zmm k zmm
// VEXP2PS.SAE zmm zmm
//
// Construct and append a VEXP2PS.SAE instruction to the active function.
func (c *Context) VEXP2PS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VEXP2PS_SAE(ops...))
}
// VEXP2PS_SAE: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PS.SAE zmm k zmm
// VEXP2PS.SAE zmm zmm
//
// Construct and append a VEXP2PS.SAE instruction to the active function.
// Operates on the global context.
func VEXP2PS_SAE(ops ...operand.Op) { ctx.VEXP2PS_SAE(ops...) }
// VEXP2PS_SAE_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.SAE.Z zmm k zmm
//
// Construct and append a VEXP2PS.SAE.Z instruction to the active function.
func (c *Context) VEXP2PS_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VEXP2PS_SAE_Z(z, k, z1))
}
// VEXP2PS_SAE_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.SAE.Z zmm k zmm
//
// Construct and append a VEXP2PS.SAE.Z instruction to the active function.
// Operates on the global context.
func VEXP2PS_SAE_Z(z, k, z1 operand.Op) { ctx.VEXP2PS_SAE_Z(z, k, z1) }
// VEXP2PS_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PS.Z m512 k zmm
// VEXP2PS.Z zmm k zmm
//
// Construct and append a VEXP2PS.Z instruction to the active function.
func (c *Context) VEXP2PS_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VEXP2PS_Z(mz, k, z))
}
// VEXP2PS_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PS.Z m512 k zmm
// VEXP2PS.Z zmm k zmm
//
// Construct and append a VEXP2PS.Z instruction to the active function.
// Operates on the global context.
func VEXP2PS_Z(mz, k, z operand.Op) { ctx.VEXP2PS_Z(mz, k, z) }
// VEXPANDPD: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPD m256 k ymm
// VEXPANDPD m256 ymm
// VEXPANDPD ymm k ymm
// VEXPANDPD ymm ymm
// VEXPANDPD m512 k zmm
// VEXPANDPD m512 zmm
// VEXPANDPD zmm k zmm
// VEXPANDPD zmm zmm
// VEXPANDPD m128 k xmm
// VEXPANDPD m128 xmm
// VEXPANDPD xmm k xmm
// VEXPANDPD xmm xmm
//
// Construct and append a VEXPANDPD instruction to the active function.
func (c *Context) VEXPANDPD(ops ...operand.Op) {
c.addinstruction(x86.VEXPANDPD(ops...))
}
// VEXPANDPD: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPD m256 k ymm
// VEXPANDPD m256 ymm
// VEXPANDPD ymm k ymm
// VEXPANDPD ymm ymm
// VEXPANDPD m512 k zmm
// VEXPANDPD m512 zmm
// VEXPANDPD zmm k zmm
// VEXPANDPD zmm zmm
// VEXPANDPD m128 k xmm
// VEXPANDPD m128 xmm
// VEXPANDPD xmm k xmm
// VEXPANDPD xmm xmm
//
// Construct and append a VEXPANDPD instruction to the active function.
// Operates on the global context.
func VEXPANDPD(ops ...operand.Op) { ctx.VEXPANDPD(ops...) }
// VEXPANDPD_Z: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPD.Z m256 k ymm
// VEXPANDPD.Z ymm k ymm
// VEXPANDPD.Z m512 k zmm
// VEXPANDPD.Z zmm k zmm
// VEXPANDPD.Z m128 k xmm
// VEXPANDPD.Z xmm k xmm
//
// Construct and append a VEXPANDPD.Z instruction to the active function.
func (c *Context) VEXPANDPD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VEXPANDPD_Z(mxyz, k, xyz))
}
// VEXPANDPD_Z: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPD.Z m256 k ymm
// VEXPANDPD.Z ymm k ymm
// VEXPANDPD.Z m512 k zmm
// VEXPANDPD.Z zmm k zmm
// VEXPANDPD.Z m128 k xmm
// VEXPANDPD.Z xmm k xmm
//
// Construct and append a VEXPANDPD.Z instruction to the active function.
// Operates on the global context.
func VEXPANDPD_Z(mxyz, k, xyz operand.Op) { ctx.VEXPANDPD_Z(mxyz, k, xyz) }
// VEXPANDPS: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPS m128 k xmm
// VEXPANDPS m128 xmm
// VEXPANDPS m256 k ymm
// VEXPANDPS m256 ymm
// VEXPANDPS xmm k xmm
// VEXPANDPS xmm xmm
// VEXPANDPS ymm k ymm
// VEXPANDPS ymm ymm
// VEXPANDPS m512 k zmm
// VEXPANDPS m512 zmm
// VEXPANDPS zmm k zmm
// VEXPANDPS zmm zmm
//
// Construct and append a VEXPANDPS instruction to the active function.
func (c *Context) VEXPANDPS(ops ...operand.Op) {
c.addinstruction(x86.VEXPANDPS(ops...))
}
// VEXPANDPS: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPS m128 k xmm
// VEXPANDPS m128 xmm
// VEXPANDPS m256 k ymm
// VEXPANDPS m256 ymm
// VEXPANDPS xmm k xmm
// VEXPANDPS xmm xmm
// VEXPANDPS ymm k ymm
// VEXPANDPS ymm ymm
// VEXPANDPS m512 k zmm
// VEXPANDPS m512 zmm
// VEXPANDPS zmm k zmm
// VEXPANDPS zmm zmm
//
// Construct and append a VEXPANDPS instruction to the active function.
// Operates on the global context.
func VEXPANDPS(ops ...operand.Op) { ctx.VEXPANDPS(ops...) }
// VEXPANDPS_Z: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPS.Z m128 k xmm
// VEXPANDPS.Z m256 k ymm
// VEXPANDPS.Z xmm k xmm
// VEXPANDPS.Z ymm k ymm
// VEXPANDPS.Z m512 k zmm
// VEXPANDPS.Z zmm k zmm
//
// Construct and append a VEXPANDPS.Z instruction to the active function.
func (c *Context) VEXPANDPS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VEXPANDPS_Z(mxyz, k, xyz))
}
// VEXPANDPS_Z: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPS.Z m128 k xmm
// VEXPANDPS.Z m256 k ymm
// VEXPANDPS.Z xmm k xmm
// VEXPANDPS.Z ymm k ymm
// VEXPANDPS.Z m512 k zmm
// VEXPANDPS.Z zmm k zmm
//
// Construct and append a VEXPANDPS.Z instruction to the active function.
// Operates on the global context.
func VEXPANDPS_Z(mxyz, k, xyz operand.Op) { ctx.VEXPANDPS_Z(mxyz, k, xyz) }
// VEXTRACTF128: Extract Packed Floating-Point Values.
//
// Forms:
//
// VEXTRACTF128 imm8 ymm m128
// VEXTRACTF128 imm8 ymm xmm
//
// Construct and append a VEXTRACTF128 instruction to the active function.
func (c *Context) VEXTRACTF128(i, y, mx operand.Op) {
c.addinstruction(x86.VEXTRACTF128(i, y, mx))
}
// VEXTRACTF128: Extract Packed Floating-Point Values.
//
// Forms:
//
// VEXTRACTF128 imm8 ymm m128
// VEXTRACTF128 imm8 ymm xmm
//
// Construct and append a VEXTRACTF128 instruction to the active function.
// Operates on the global context.
func VEXTRACTF128(i, y, mx operand.Op) { ctx.VEXTRACTF128(i, y, mx) }
// VEXTRACTF32X4: Extract 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X4 imm8 ymm k m128
// VEXTRACTF32X4 imm8 ymm k xmm
// VEXTRACTF32X4 imm8 ymm m128
// VEXTRACTF32X4 imm8 ymm xmm
// VEXTRACTF32X4 imm8 zmm k m128
// VEXTRACTF32X4 imm8 zmm k xmm
// VEXTRACTF32X4 imm8 zmm m128
// VEXTRACTF32X4 imm8 zmm xmm
//
// Construct and append a VEXTRACTF32X4 instruction to the active function.
func (c *Context) VEXTRACTF32X4(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTF32X4(ops...))
}
// VEXTRACTF32X4: Extract 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X4 imm8 ymm k m128
// VEXTRACTF32X4 imm8 ymm k xmm
// VEXTRACTF32X4 imm8 ymm m128
// VEXTRACTF32X4 imm8 ymm xmm
// VEXTRACTF32X4 imm8 zmm k m128
// VEXTRACTF32X4 imm8 zmm k xmm
// VEXTRACTF32X4 imm8 zmm m128
// VEXTRACTF32X4 imm8 zmm xmm
//
// Construct and append a VEXTRACTF32X4 instruction to the active function.
// Operates on the global context.
func VEXTRACTF32X4(ops ...operand.Op) { ctx.VEXTRACTF32X4(ops...) }
// VEXTRACTF32X4_Z: Extract 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X4.Z imm8 ymm k m128
// VEXTRACTF32X4.Z imm8 ymm k xmm
// VEXTRACTF32X4.Z imm8 zmm k m128
// VEXTRACTF32X4.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTF32X4.Z instruction to the active function.
func (c *Context) VEXTRACTF32X4_Z(i, yz, k, mx operand.Op) {
c.addinstruction(x86.VEXTRACTF32X4_Z(i, yz, k, mx))
}
// VEXTRACTF32X4_Z: Extract 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X4.Z imm8 ymm k m128
// VEXTRACTF32X4.Z imm8 ymm k xmm
// VEXTRACTF32X4.Z imm8 zmm k m128
// VEXTRACTF32X4.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTF32X4.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTF32X4_Z(i, yz, k, mx operand.Op) { ctx.VEXTRACTF32X4_Z(i, yz, k, mx) }
// VEXTRACTF32X8: Extract 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X8 imm8 zmm k m256
// VEXTRACTF32X8 imm8 zmm k ymm
// VEXTRACTF32X8 imm8 zmm m256
// VEXTRACTF32X8 imm8 zmm ymm
//
// Construct and append a VEXTRACTF32X8 instruction to the active function.
func (c *Context) VEXTRACTF32X8(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTF32X8(ops...))
}
// VEXTRACTF32X8: Extract 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X8 imm8 zmm k m256
// VEXTRACTF32X8 imm8 zmm k ymm
// VEXTRACTF32X8 imm8 zmm m256
// VEXTRACTF32X8 imm8 zmm ymm
//
// Construct and append a VEXTRACTF32X8 instruction to the active function.
// Operates on the global context.
func VEXTRACTF32X8(ops ...operand.Op) { ctx.VEXTRACTF32X8(ops...) }
// VEXTRACTF32X8_Z: Extract 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X8.Z imm8 zmm k m256
// VEXTRACTF32X8.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTF32X8.Z instruction to the active function.
func (c *Context) VEXTRACTF32X8_Z(i, z, k, my operand.Op) {
c.addinstruction(x86.VEXTRACTF32X8_Z(i, z, k, my))
}
// VEXTRACTF32X8_Z: Extract 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X8.Z imm8 zmm k m256
// VEXTRACTF32X8.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTF32X8.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTF32X8_Z(i, z, k, my operand.Op) { ctx.VEXTRACTF32X8_Z(i, z, k, my) }
// VEXTRACTF64X2: Extract 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X2 imm8 ymm k m128
// VEXTRACTF64X2 imm8 ymm k xmm
// VEXTRACTF64X2 imm8 ymm m128
// VEXTRACTF64X2 imm8 ymm xmm
// VEXTRACTF64X2 imm8 zmm k m128
// VEXTRACTF64X2 imm8 zmm k xmm
// VEXTRACTF64X2 imm8 zmm m128
// VEXTRACTF64X2 imm8 zmm xmm
//
// Construct and append a VEXTRACTF64X2 instruction to the active function.
func (c *Context) VEXTRACTF64X2(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTF64X2(ops...))
}
// VEXTRACTF64X2: Extract 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X2 imm8 ymm k m128
// VEXTRACTF64X2 imm8 ymm k xmm
// VEXTRACTF64X2 imm8 ymm m128
// VEXTRACTF64X2 imm8 ymm xmm
// VEXTRACTF64X2 imm8 zmm k m128
// VEXTRACTF64X2 imm8 zmm k xmm
// VEXTRACTF64X2 imm8 zmm m128
// VEXTRACTF64X2 imm8 zmm xmm
//
// Construct and append a VEXTRACTF64X2 instruction to the active function.
// Operates on the global context.
func VEXTRACTF64X2(ops ...operand.Op) { ctx.VEXTRACTF64X2(ops...) }
// VEXTRACTF64X2_Z: Extract 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X2.Z imm8 ymm k m128
// VEXTRACTF64X2.Z imm8 ymm k xmm
// VEXTRACTF64X2.Z imm8 zmm k m128
// VEXTRACTF64X2.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTF64X2.Z instruction to the active function.
func (c *Context) VEXTRACTF64X2_Z(i, yz, k, mx operand.Op) {
c.addinstruction(x86.VEXTRACTF64X2_Z(i, yz, k, mx))
}
// VEXTRACTF64X2_Z: Extract 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X2.Z imm8 ymm k m128
// VEXTRACTF64X2.Z imm8 ymm k xmm
// VEXTRACTF64X2.Z imm8 zmm k m128
// VEXTRACTF64X2.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTF64X2.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTF64X2_Z(i, yz, k, mx operand.Op) { ctx.VEXTRACTF64X2_Z(i, yz, k, mx) }
// VEXTRACTF64X4: Extract 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X4 imm8 zmm k m256
// VEXTRACTF64X4 imm8 zmm k ymm
// VEXTRACTF64X4 imm8 zmm m256
// VEXTRACTF64X4 imm8 zmm ymm
//
// Construct and append a VEXTRACTF64X4 instruction to the active function.
func (c *Context) VEXTRACTF64X4(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTF64X4(ops...))
}
// VEXTRACTF64X4: Extract 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X4 imm8 zmm k m256
// VEXTRACTF64X4 imm8 zmm k ymm
// VEXTRACTF64X4 imm8 zmm m256
// VEXTRACTF64X4 imm8 zmm ymm
//
// Construct and append a VEXTRACTF64X4 instruction to the active function.
// Operates on the global context.
func VEXTRACTF64X4(ops ...operand.Op) { ctx.VEXTRACTF64X4(ops...) }
// VEXTRACTF64X4_Z: Extract 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X4.Z imm8 zmm k m256
// VEXTRACTF64X4.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTF64X4.Z instruction to the active function.
func (c *Context) VEXTRACTF64X4_Z(i, z, k, my operand.Op) {
c.addinstruction(x86.VEXTRACTF64X4_Z(i, z, k, my))
}
// VEXTRACTF64X4_Z: Extract 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X4.Z imm8 zmm k m256
// VEXTRACTF64X4.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTF64X4.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTF64X4_Z(i, z, k, my operand.Op) { ctx.VEXTRACTF64X4_Z(i, z, k, my) }
// VEXTRACTI128: Extract Packed Integer Values.
//
// Forms:
//
// VEXTRACTI128 imm8 ymm m128
// VEXTRACTI128 imm8 ymm xmm
//
// Construct and append a VEXTRACTI128 instruction to the active function.
func (c *Context) VEXTRACTI128(i, y, mx operand.Op) {
c.addinstruction(x86.VEXTRACTI128(i, y, mx))
}
// VEXTRACTI128: Extract Packed Integer Values.
//
// Forms:
//
// VEXTRACTI128 imm8 ymm m128
// VEXTRACTI128 imm8 ymm xmm
//
// Construct and append a VEXTRACTI128 instruction to the active function.
// Operates on the global context.
func VEXTRACTI128(i, y, mx operand.Op) { ctx.VEXTRACTI128(i, y, mx) }
// VEXTRACTI32X4: Extract 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X4 imm8 ymm k m128
// VEXTRACTI32X4 imm8 ymm k xmm
// VEXTRACTI32X4 imm8 ymm m128
// VEXTRACTI32X4 imm8 ymm xmm
// VEXTRACTI32X4 imm8 zmm k m128
// VEXTRACTI32X4 imm8 zmm k xmm
// VEXTRACTI32X4 imm8 zmm m128
// VEXTRACTI32X4 imm8 zmm xmm
//
// Construct and append a VEXTRACTI32X4 instruction to the active function.
func (c *Context) VEXTRACTI32X4(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTI32X4(ops...))
}
// VEXTRACTI32X4: Extract 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X4 imm8 ymm k m128
// VEXTRACTI32X4 imm8 ymm k xmm
// VEXTRACTI32X4 imm8 ymm m128
// VEXTRACTI32X4 imm8 ymm xmm
// VEXTRACTI32X4 imm8 zmm k m128
// VEXTRACTI32X4 imm8 zmm k xmm
// VEXTRACTI32X4 imm8 zmm m128
// VEXTRACTI32X4 imm8 zmm xmm
//
// Construct and append a VEXTRACTI32X4 instruction to the active function.
// Operates on the global context.
func VEXTRACTI32X4(ops ...operand.Op) { ctx.VEXTRACTI32X4(ops...) }
// VEXTRACTI32X4_Z: Extract 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X4.Z imm8 ymm k m128
// VEXTRACTI32X4.Z imm8 ymm k xmm
// VEXTRACTI32X4.Z imm8 zmm k m128
// VEXTRACTI32X4.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTI32X4.Z instruction to the active function.
func (c *Context) VEXTRACTI32X4_Z(i, yz, k, mx operand.Op) {
c.addinstruction(x86.VEXTRACTI32X4_Z(i, yz, k, mx))
}
// VEXTRACTI32X4_Z: Extract 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X4.Z imm8 ymm k m128
// VEXTRACTI32X4.Z imm8 ymm k xmm
// VEXTRACTI32X4.Z imm8 zmm k m128
// VEXTRACTI32X4.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTI32X4.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTI32X4_Z(i, yz, k, mx operand.Op) { ctx.VEXTRACTI32X4_Z(i, yz, k, mx) }
// VEXTRACTI32X8: Extract 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X8 imm8 zmm k m256
// VEXTRACTI32X8 imm8 zmm k ymm
// VEXTRACTI32X8 imm8 zmm m256
// VEXTRACTI32X8 imm8 zmm ymm
//
// Construct and append a VEXTRACTI32X8 instruction to the active function.
func (c *Context) VEXTRACTI32X8(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTI32X8(ops...))
}
// VEXTRACTI32X8: Extract 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X8 imm8 zmm k m256
// VEXTRACTI32X8 imm8 zmm k ymm
// VEXTRACTI32X8 imm8 zmm m256
// VEXTRACTI32X8 imm8 zmm ymm
//
// Construct and append a VEXTRACTI32X8 instruction to the active function.
// Operates on the global context.
func VEXTRACTI32X8(ops ...operand.Op) { ctx.VEXTRACTI32X8(ops...) }
// VEXTRACTI32X8_Z: Extract 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X8.Z imm8 zmm k m256
// VEXTRACTI32X8.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTI32X8.Z instruction to the active function.
func (c *Context) VEXTRACTI32X8_Z(i, z, k, my operand.Op) {
c.addinstruction(x86.VEXTRACTI32X8_Z(i, z, k, my))
}
// VEXTRACTI32X8_Z: Extract 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X8.Z imm8 zmm k m256
// VEXTRACTI32X8.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTI32X8.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTI32X8_Z(i, z, k, my operand.Op) { ctx.VEXTRACTI32X8_Z(i, z, k, my) }
// VEXTRACTI64X2: Extract 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X2 imm8 ymm k m128
// VEXTRACTI64X2 imm8 ymm k xmm
// VEXTRACTI64X2 imm8 ymm m128
// VEXTRACTI64X2 imm8 ymm xmm
// VEXTRACTI64X2 imm8 zmm k m128
// VEXTRACTI64X2 imm8 zmm k xmm
// VEXTRACTI64X2 imm8 zmm m128
// VEXTRACTI64X2 imm8 zmm xmm
//
// Construct and append a VEXTRACTI64X2 instruction to the active function.
func (c *Context) VEXTRACTI64X2(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTI64X2(ops...))
}
// VEXTRACTI64X2: Extract 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X2 imm8 ymm k m128
// VEXTRACTI64X2 imm8 ymm k xmm
// VEXTRACTI64X2 imm8 ymm m128
// VEXTRACTI64X2 imm8 ymm xmm
// VEXTRACTI64X2 imm8 zmm k m128
// VEXTRACTI64X2 imm8 zmm k xmm
// VEXTRACTI64X2 imm8 zmm m128
// VEXTRACTI64X2 imm8 zmm xmm
//
// Construct and append a VEXTRACTI64X2 instruction to the active function.
// Operates on the global context.
func VEXTRACTI64X2(ops ...operand.Op) { ctx.VEXTRACTI64X2(ops...) }
// VEXTRACTI64X2_Z: Extract 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X2.Z imm8 ymm k m128
// VEXTRACTI64X2.Z imm8 ymm k xmm
// VEXTRACTI64X2.Z imm8 zmm k m128
// VEXTRACTI64X2.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTI64X2.Z instruction to the active function.
func (c *Context) VEXTRACTI64X2_Z(i, yz, k, mx operand.Op) {
c.addinstruction(x86.VEXTRACTI64X2_Z(i, yz, k, mx))
}
// VEXTRACTI64X2_Z: Extract 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X2.Z imm8 ymm k m128
// VEXTRACTI64X2.Z imm8 ymm k xmm
// VEXTRACTI64X2.Z imm8 zmm k m128
// VEXTRACTI64X2.Z imm8 zmm k xmm
//
// Construct and append a VEXTRACTI64X2.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTI64X2_Z(i, yz, k, mx operand.Op) { ctx.VEXTRACTI64X2_Z(i, yz, k, mx) }
// VEXTRACTI64X4: Extract 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X4 imm8 zmm k m256
// VEXTRACTI64X4 imm8 zmm k ymm
// VEXTRACTI64X4 imm8 zmm m256
// VEXTRACTI64X4 imm8 zmm ymm
//
// Construct and append a VEXTRACTI64X4 instruction to the active function.
func (c *Context) VEXTRACTI64X4(ops ...operand.Op) {
c.addinstruction(x86.VEXTRACTI64X4(ops...))
}
// VEXTRACTI64X4: Extract 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X4 imm8 zmm k m256
// VEXTRACTI64X4 imm8 zmm k ymm
// VEXTRACTI64X4 imm8 zmm m256
// VEXTRACTI64X4 imm8 zmm ymm
//
// Construct and append a VEXTRACTI64X4 instruction to the active function.
// Operates on the global context.
func VEXTRACTI64X4(ops ...operand.Op) { ctx.VEXTRACTI64X4(ops...) }
// VEXTRACTI64X4_Z: Extract 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X4.Z imm8 zmm k m256
// VEXTRACTI64X4.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTI64X4.Z instruction to the active function.
func (c *Context) VEXTRACTI64X4_Z(i, z, k, my operand.Op) {
c.addinstruction(x86.VEXTRACTI64X4_Z(i, z, k, my))
}
// VEXTRACTI64X4_Z: Extract 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X4.Z imm8 zmm k m256
// VEXTRACTI64X4.Z imm8 zmm k ymm
//
// Construct and append a VEXTRACTI64X4.Z instruction to the active function.
// Operates on the global context.
func VEXTRACTI64X4_Z(i, z, k, my operand.Op) { ctx.VEXTRACTI64X4_Z(i, z, k, my) }
// VEXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VEXTRACTPS imm8 xmm m32
// VEXTRACTPS imm8 xmm r32
//
// Construct and append a VEXTRACTPS instruction to the active function.
func (c *Context) VEXTRACTPS(i, x, mr operand.Op) {
c.addinstruction(x86.VEXTRACTPS(i, x, mr))
}
// VEXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VEXTRACTPS imm8 xmm m32
// VEXTRACTPS imm8 xmm r32
//
// Construct and append a VEXTRACTPS instruction to the active function.
// Operates on the global context.
func VEXTRACTPS(i, x, mr operand.Op) { ctx.VEXTRACTPS(i, x, mr) }
// VFIXUPIMMPD: Fix Up Special Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPD imm8 m128 xmm k xmm
// VFIXUPIMMPD imm8 m128 xmm xmm
// VFIXUPIMMPD imm8 m256 ymm k ymm
// VFIXUPIMMPD imm8 m256 ymm ymm
// VFIXUPIMMPD imm8 xmm xmm k xmm
// VFIXUPIMMPD imm8 xmm xmm xmm
// VFIXUPIMMPD imm8 ymm ymm k ymm
// VFIXUPIMMPD imm8 ymm ymm ymm
// VFIXUPIMMPD imm8 m512 zmm k zmm
// VFIXUPIMMPD imm8 m512 zmm zmm
// VFIXUPIMMPD imm8 zmm zmm k zmm
// VFIXUPIMMPD imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPD instruction to the active function.
func (c *Context) VFIXUPIMMPD(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD(ops...))
}
// VFIXUPIMMPD: Fix Up Special Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPD imm8 m128 xmm k xmm
// VFIXUPIMMPD imm8 m128 xmm xmm
// VFIXUPIMMPD imm8 m256 ymm k ymm
// VFIXUPIMMPD imm8 m256 ymm ymm
// VFIXUPIMMPD imm8 xmm xmm k xmm
// VFIXUPIMMPD imm8 xmm xmm xmm
// VFIXUPIMMPD imm8 ymm ymm k ymm
// VFIXUPIMMPD imm8 ymm ymm ymm
// VFIXUPIMMPD imm8 m512 zmm k zmm
// VFIXUPIMMPD imm8 m512 zmm zmm
// VFIXUPIMMPD imm8 zmm zmm k zmm
// VFIXUPIMMPD imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPD instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD(ops ...operand.Op) { ctx.VFIXUPIMMPD(ops...) }
// VFIXUPIMMPD_BCST: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPD.BCST imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST imm8 m64 xmm xmm
// VFIXUPIMMPD.BCST imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST imm8 m64 ymm ymm
// VFIXUPIMMPD.BCST imm8 m64 zmm k zmm
// VFIXUPIMMPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VFIXUPIMMPD.BCST instruction to the active function.
func (c *Context) VFIXUPIMMPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD_BCST(ops...))
}
// VFIXUPIMMPD_BCST: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPD.BCST imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST imm8 m64 xmm xmm
// VFIXUPIMMPD.BCST imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST imm8 m64 ymm ymm
// VFIXUPIMMPD.BCST imm8 m64 zmm k zmm
// VFIXUPIMMPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VFIXUPIMMPD.BCST instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD_BCST(ops ...operand.Op) { ctx.VFIXUPIMMPD_BCST(ops...) }
// VFIXUPIMMPD_BCST_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.BCST.Z imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST.Z imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VFIXUPIMMPD.BCST.Z instruction to the active function.
func (c *Context) VFIXUPIMMPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD_BCST_Z(i, m, xyz, k, xyz1))
}
// VFIXUPIMMPD_BCST_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.BCST.Z imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST.Z imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VFIXUPIMMPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VFIXUPIMMPD_BCST_Z(i, m, xyz, k, xyz1) }
// VFIXUPIMMPD_SAE: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPD.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPD.SAE imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPD.SAE instruction to the active function.
func (c *Context) VFIXUPIMMPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD_SAE(ops...))
}
// VFIXUPIMMPD_SAE: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPD.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPD.SAE imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPD.SAE instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD_SAE(ops ...operand.Op) { ctx.VFIXUPIMMPD_SAE(ops...) }
// VFIXUPIMMPD_SAE_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPD.SAE.Z instruction to the active function.
func (c *Context) VFIXUPIMMPD_SAE_Z(i, z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD_SAE_Z(i, z, z1, k, z2))
}
// VFIXUPIMMPD_SAE_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD_SAE_Z(i, z, z1, k, z2 operand.Op) { ctx.VFIXUPIMMPD_SAE_Z(i, z, z1, k, z2) }
// VFIXUPIMMPD_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.Z imm8 m128 xmm k xmm
// VFIXUPIMMPD.Z imm8 m256 ymm k ymm
// VFIXUPIMMPD.Z imm8 xmm xmm k xmm
// VFIXUPIMMPD.Z imm8 ymm ymm k ymm
// VFIXUPIMMPD.Z imm8 m512 zmm k zmm
// VFIXUPIMMPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPD.Z instruction to the active function.
func (c *Context) VFIXUPIMMPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPD_Z(i, mxyz, xyz, k, xyz1))
}
// VFIXUPIMMPD_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.Z imm8 m128 xmm k xmm
// VFIXUPIMMPD.Z imm8 m256 ymm k ymm
// VFIXUPIMMPD.Z imm8 xmm xmm k xmm
// VFIXUPIMMPD.Z imm8 ymm ymm k ymm
// VFIXUPIMMPD.Z imm8 m512 zmm k zmm
// VFIXUPIMMPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPD.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VFIXUPIMMPD_Z(i, mxyz, xyz, k, xyz1) }
// VFIXUPIMMPS: Fix Up Special Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPS imm8 m256 ymm k ymm
// VFIXUPIMMPS imm8 m256 ymm ymm
// VFIXUPIMMPS imm8 ymm ymm k ymm
// VFIXUPIMMPS imm8 ymm ymm ymm
// VFIXUPIMMPS imm8 m512 zmm k zmm
// VFIXUPIMMPS imm8 m512 zmm zmm
// VFIXUPIMMPS imm8 zmm zmm k zmm
// VFIXUPIMMPS imm8 zmm zmm zmm
// VFIXUPIMMPS imm8 m128 xmm k xmm
// VFIXUPIMMPS imm8 m128 xmm xmm
// VFIXUPIMMPS imm8 xmm xmm k xmm
// VFIXUPIMMPS imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMPS instruction to the active function.
func (c *Context) VFIXUPIMMPS(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS(ops...))
}
// VFIXUPIMMPS: Fix Up Special Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPS imm8 m256 ymm k ymm
// VFIXUPIMMPS imm8 m256 ymm ymm
// VFIXUPIMMPS imm8 ymm ymm k ymm
// VFIXUPIMMPS imm8 ymm ymm ymm
// VFIXUPIMMPS imm8 m512 zmm k zmm
// VFIXUPIMMPS imm8 m512 zmm zmm
// VFIXUPIMMPS imm8 zmm zmm k zmm
// VFIXUPIMMPS imm8 zmm zmm zmm
// VFIXUPIMMPS imm8 m128 xmm k xmm
// VFIXUPIMMPS imm8 m128 xmm xmm
// VFIXUPIMMPS imm8 xmm xmm k xmm
// VFIXUPIMMPS imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMPS instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS(ops ...operand.Op) { ctx.VFIXUPIMMPS(ops...) }
// VFIXUPIMMPS_BCST: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPS.BCST imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST imm8 m32 ymm ymm
// VFIXUPIMMPS.BCST imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST imm8 m32 zmm zmm
// VFIXUPIMMPS.BCST imm8 m32 xmm k xmm
// VFIXUPIMMPS.BCST imm8 m32 xmm xmm
//
// Construct and append a VFIXUPIMMPS.BCST instruction to the active function.
func (c *Context) VFIXUPIMMPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS_BCST(ops...))
}
// VFIXUPIMMPS_BCST: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPS.BCST imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST imm8 m32 ymm ymm
// VFIXUPIMMPS.BCST imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST imm8 m32 zmm zmm
// VFIXUPIMMPS.BCST imm8 m32 xmm k xmm
// VFIXUPIMMPS.BCST imm8 m32 xmm xmm
//
// Construct and append a VFIXUPIMMPS.BCST instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS_BCST(ops ...operand.Op) { ctx.VFIXUPIMMPS_BCST(ops...) }
// VFIXUPIMMPS_BCST_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.BCST.Z imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST.Z imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST.Z imm8 m32 xmm k xmm
//
// Construct and append a VFIXUPIMMPS.BCST.Z instruction to the active function.
func (c *Context) VFIXUPIMMPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS_BCST_Z(i, m, xyz, k, xyz1))
}
// VFIXUPIMMPS_BCST_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.BCST.Z imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST.Z imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST.Z imm8 m32 xmm k xmm
//
// Construct and append a VFIXUPIMMPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VFIXUPIMMPS_BCST_Z(i, m, xyz, k, xyz1) }
// VFIXUPIMMPS_SAE: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPS.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPS.SAE imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPS.SAE instruction to the active function.
func (c *Context) VFIXUPIMMPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS_SAE(ops...))
}
// VFIXUPIMMPS_SAE: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPS.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPS.SAE imm8 zmm zmm zmm
//
// Construct and append a VFIXUPIMMPS.SAE instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS_SAE(ops ...operand.Op) { ctx.VFIXUPIMMPS_SAE(ops...) }
// VFIXUPIMMPS_SAE_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPS.SAE.Z instruction to the active function.
func (c *Context) VFIXUPIMMPS_SAE_Z(i, z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS_SAE_Z(i, z, z1, k, z2))
}
// VFIXUPIMMPS_SAE_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VFIXUPIMMPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS_SAE_Z(i, z, z1, k, z2 operand.Op) { ctx.VFIXUPIMMPS_SAE_Z(i, z, z1, k, z2) }
// VFIXUPIMMPS_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.Z imm8 m256 ymm k ymm
// VFIXUPIMMPS.Z imm8 ymm ymm k ymm
// VFIXUPIMMPS.Z imm8 m512 zmm k zmm
// VFIXUPIMMPS.Z imm8 zmm zmm k zmm
// VFIXUPIMMPS.Z imm8 m128 xmm k xmm
// VFIXUPIMMPS.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMPS.Z instruction to the active function.
func (c *Context) VFIXUPIMMPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMPS_Z(i, mxyz, xyz, k, xyz1))
}
// VFIXUPIMMPS_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.Z imm8 m256 ymm k ymm
// VFIXUPIMMPS.Z imm8 ymm ymm k ymm
// VFIXUPIMMPS.Z imm8 m512 zmm k zmm
// VFIXUPIMMPS.Z imm8 zmm zmm k zmm
// VFIXUPIMMPS.Z imm8 m128 xmm k xmm
// VFIXUPIMMPS.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMPS.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VFIXUPIMMPS_Z(i, mxyz, xyz, k, xyz1) }
// VFIXUPIMMSD: Fix Up Special Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSD imm8 m64 xmm k xmm
// VFIXUPIMMSD imm8 m64 xmm xmm
// VFIXUPIMMSD imm8 xmm xmm k xmm
// VFIXUPIMMSD imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSD instruction to the active function.
func (c *Context) VFIXUPIMMSD(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMSD(ops...))
}
// VFIXUPIMMSD: Fix Up Special Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSD imm8 m64 xmm k xmm
// VFIXUPIMMSD imm8 m64 xmm xmm
// VFIXUPIMMSD imm8 xmm xmm k xmm
// VFIXUPIMMSD imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSD instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSD(ops ...operand.Op) { ctx.VFIXUPIMMSD(ops...) }
// VFIXUPIMMSD_SAE: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSD.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSD.SAE imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSD.SAE instruction to the active function.
func (c *Context) VFIXUPIMMSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMSD_SAE(ops...))
}
// VFIXUPIMMSD_SAE: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSD.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSD.SAE imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSD.SAE instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSD_SAE(ops ...operand.Op) { ctx.VFIXUPIMMSD_SAE(ops...) }
// VFIXUPIMMSD_SAE_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSD.SAE.Z instruction to the active function.
func (c *Context) VFIXUPIMMSD_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFIXUPIMMSD_SAE_Z(i, x, x1, k, x2))
}
// VFIXUPIMMSD_SAE_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSD.SAE.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSD_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VFIXUPIMMSD_SAE_Z(i, x, x1, k, x2) }
// VFIXUPIMMSD_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.Z imm8 m64 xmm k xmm
// VFIXUPIMMSD.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSD.Z instruction to the active function.
func (c *Context) VFIXUPIMMSD_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMSD_Z(i, mx, x, k, x1))
}
// VFIXUPIMMSD_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.Z imm8 m64 xmm k xmm
// VFIXUPIMMSD.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSD.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSD_Z(i, mx, x, k, x1 operand.Op) { ctx.VFIXUPIMMSD_Z(i, mx, x, k, x1) }
// VFIXUPIMMSS: Fix Up Special Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSS imm8 m32 xmm k xmm
// VFIXUPIMMSS imm8 m32 xmm xmm
// VFIXUPIMMSS imm8 xmm xmm k xmm
// VFIXUPIMMSS imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSS instruction to the active function.
func (c *Context) VFIXUPIMMSS(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMSS(ops...))
}
// VFIXUPIMMSS: Fix Up Special Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSS imm8 m32 xmm k xmm
// VFIXUPIMMSS imm8 m32 xmm xmm
// VFIXUPIMMSS imm8 xmm xmm k xmm
// VFIXUPIMMSS imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSS instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSS(ops ...operand.Op) { ctx.VFIXUPIMMSS(ops...) }
// VFIXUPIMMSS_SAE: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSS.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSS.SAE imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSS.SAE instruction to the active function.
func (c *Context) VFIXUPIMMSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFIXUPIMMSS_SAE(ops...))
}
// VFIXUPIMMSS_SAE: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSS.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSS.SAE imm8 xmm xmm xmm
//
// Construct and append a VFIXUPIMMSS.SAE instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSS_SAE(ops ...operand.Op) { ctx.VFIXUPIMMSS_SAE(ops...) }
// VFIXUPIMMSS_SAE_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSS.SAE.Z instruction to the active function.
func (c *Context) VFIXUPIMMSS_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFIXUPIMMSS_SAE_Z(i, x, x1, k, x2))
}
// VFIXUPIMMSS_SAE_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSS.SAE.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSS_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VFIXUPIMMSS_SAE_Z(i, x, x1, k, x2) }
// VFIXUPIMMSS_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.Z imm8 m32 xmm k xmm
// VFIXUPIMMSS.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSS.Z instruction to the active function.
func (c *Context) VFIXUPIMMSS_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFIXUPIMMSS_Z(i, mx, x, k, x1))
}
// VFIXUPIMMSS_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.Z imm8 m32 xmm k xmm
// VFIXUPIMMSS.Z imm8 xmm xmm k xmm
//
// Construct and append a VFIXUPIMMSS.Z instruction to the active function.
// Operates on the global context.
func VFIXUPIMMSS_Z(i, mx, x, k, x1 operand.Op) { ctx.VFIXUPIMMSS_Z(i, mx, x, k, x1) }
// VFMADD132PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PD m128 xmm xmm
// VFMADD132PD m256 ymm ymm
// VFMADD132PD xmm xmm xmm
// VFMADD132PD ymm ymm ymm
// VFMADD132PD m128 xmm k xmm
// VFMADD132PD m256 ymm k ymm
// VFMADD132PD xmm xmm k xmm
// VFMADD132PD ymm ymm k ymm
// VFMADD132PD m512 zmm k zmm
// VFMADD132PD m512 zmm zmm
// VFMADD132PD zmm zmm k zmm
// VFMADD132PD zmm zmm zmm
//
// Construct and append a VFMADD132PD instruction to the active function.
func (c *Context) VFMADD132PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD(ops...))
}
// VFMADD132PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PD m128 xmm xmm
// VFMADD132PD m256 ymm ymm
// VFMADD132PD xmm xmm xmm
// VFMADD132PD ymm ymm ymm
// VFMADD132PD m128 xmm k xmm
// VFMADD132PD m256 ymm k ymm
// VFMADD132PD xmm xmm k xmm
// VFMADD132PD ymm ymm k ymm
// VFMADD132PD m512 zmm k zmm
// VFMADD132PD m512 zmm zmm
// VFMADD132PD zmm zmm k zmm
// VFMADD132PD zmm zmm zmm
//
// Construct and append a VFMADD132PD instruction to the active function.
// Operates on the global context.
func VFMADD132PD(ops ...operand.Op) { ctx.VFMADD132PD(ops...) }
// VFMADD132PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PD.BCST m64 xmm k xmm
// VFMADD132PD.BCST m64 xmm xmm
// VFMADD132PD.BCST m64 ymm k ymm
// VFMADD132PD.BCST m64 ymm ymm
// VFMADD132PD.BCST m64 zmm k zmm
// VFMADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD132PD.BCST instruction to the active function.
func (c *Context) VFMADD132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD_BCST(ops...))
}
// VFMADD132PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PD.BCST m64 xmm k xmm
// VFMADD132PD.BCST m64 xmm xmm
// VFMADD132PD.BCST m64 ymm k ymm
// VFMADD132PD.BCST m64 ymm ymm
// VFMADD132PD.BCST m64 zmm k zmm
// VFMADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD132PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADD132PD_BCST(ops ...operand.Op) { ctx.VFMADD132PD_BCST(ops...) }
// VFMADD132PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.BCST.Z m64 xmm k xmm
// VFMADD132PD.BCST.Z m64 ymm k ymm
// VFMADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD132PD.BCST.Z instruction to the active function.
func (c *Context) VFMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD132PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.BCST.Z m64 xmm k xmm
// VFMADD132PD.BCST.Z m64 ymm k ymm
// VFMADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD132PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADD132PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PD.RD_SAE zmm zmm k zmm
// VFMADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RD_SAE instruction to the active function.
func (c *Context) VFMADD132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD_RD_SAE(ops...))
}
// VFMADD132PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PD.RD_SAE zmm zmm k zmm
// VFMADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RD_SAE(ops ...operand.Op) { ctx.VFMADD132PD_RD_SAE(ops...) }
// VFMADD132PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD132PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADD132PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PD.RN_SAE zmm zmm k zmm
// VFMADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RN_SAE instruction to the active function.
func (c *Context) VFMADD132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD_RN_SAE(ops...))
}
// VFMADD132PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PD.RN_SAE zmm zmm k zmm
// VFMADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RN_SAE(ops ...operand.Op) { ctx.VFMADD132PD_RN_SAE(ops...) }
// VFMADD132PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD132PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADD132PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PD.RU_SAE zmm zmm k zmm
// VFMADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RU_SAE instruction to the active function.
func (c *Context) VFMADD132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD_RU_SAE(ops...))
}
// VFMADD132PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PD.RU_SAE zmm zmm k zmm
// VFMADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RU_SAE(ops ...operand.Op) { ctx.VFMADD132PD_RU_SAE(ops...) }
// VFMADD132PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD132PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADD132PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PD.RZ_SAE zmm zmm k zmm
// VFMADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PD_RZ_SAE(ops...))
}
// VFMADD132PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PD.RZ_SAE zmm zmm k zmm
// VFMADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD132PD_RZ_SAE(ops...) }
// VFMADD132PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD132PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD132PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.Z m128 xmm k xmm
// VFMADD132PD.Z m256 ymm k ymm
// VFMADD132PD.Z xmm xmm k xmm
// VFMADD132PD.Z ymm ymm k ymm
// VFMADD132PD.Z m512 zmm k zmm
// VFMADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.Z instruction to the active function.
func (c *Context) VFMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD132PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADD132PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.Z m128 xmm k xmm
// VFMADD132PD.Z m256 ymm k ymm
// VFMADD132PD.Z xmm xmm k xmm
// VFMADD132PD.Z ymm ymm k ymm
// VFMADD132PD.Z m512 zmm k zmm
// VFMADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PD.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD132PD_Z(mxyz, xyz, k, xyz1) }
// VFMADD132PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PS m128 xmm xmm
// VFMADD132PS m256 ymm ymm
// VFMADD132PS xmm xmm xmm
// VFMADD132PS ymm ymm ymm
// VFMADD132PS m128 xmm k xmm
// VFMADD132PS m256 ymm k ymm
// VFMADD132PS xmm xmm k xmm
// VFMADD132PS ymm ymm k ymm
// VFMADD132PS m512 zmm k zmm
// VFMADD132PS m512 zmm zmm
// VFMADD132PS zmm zmm k zmm
// VFMADD132PS zmm zmm zmm
//
// Construct and append a VFMADD132PS instruction to the active function.
func (c *Context) VFMADD132PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS(ops...))
}
// VFMADD132PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PS m128 xmm xmm
// VFMADD132PS m256 ymm ymm
// VFMADD132PS xmm xmm xmm
// VFMADD132PS ymm ymm ymm
// VFMADD132PS m128 xmm k xmm
// VFMADD132PS m256 ymm k ymm
// VFMADD132PS xmm xmm k xmm
// VFMADD132PS ymm ymm k ymm
// VFMADD132PS m512 zmm k zmm
// VFMADD132PS m512 zmm zmm
// VFMADD132PS zmm zmm k zmm
// VFMADD132PS zmm zmm zmm
//
// Construct and append a VFMADD132PS instruction to the active function.
// Operates on the global context.
func VFMADD132PS(ops ...operand.Op) { ctx.VFMADD132PS(ops...) }
// VFMADD132PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PS.BCST m32 xmm k xmm
// VFMADD132PS.BCST m32 xmm xmm
// VFMADD132PS.BCST m32 ymm k ymm
// VFMADD132PS.BCST m32 ymm ymm
// VFMADD132PS.BCST m32 zmm k zmm
// VFMADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD132PS.BCST instruction to the active function.
func (c *Context) VFMADD132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS_BCST(ops...))
}
// VFMADD132PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PS.BCST m32 xmm k xmm
// VFMADD132PS.BCST m32 xmm xmm
// VFMADD132PS.BCST m32 ymm k ymm
// VFMADD132PS.BCST m32 ymm ymm
// VFMADD132PS.BCST m32 zmm k zmm
// VFMADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD132PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADD132PS_BCST(ops ...operand.Op) { ctx.VFMADD132PS_BCST(ops...) }
// VFMADD132PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.BCST.Z m32 xmm k xmm
// VFMADD132PS.BCST.Z m32 ymm k ymm
// VFMADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD132PS.BCST.Z instruction to the active function.
func (c *Context) VFMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD132PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.BCST.Z m32 xmm k xmm
// VFMADD132PS.BCST.Z m32 ymm k ymm
// VFMADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD132PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADD132PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PS.RD_SAE zmm zmm k zmm
// VFMADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RD_SAE instruction to the active function.
func (c *Context) VFMADD132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS_RD_SAE(ops...))
}
// VFMADD132PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PS.RD_SAE zmm zmm k zmm
// VFMADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RD_SAE(ops ...operand.Op) { ctx.VFMADD132PS_RD_SAE(ops...) }
// VFMADD132PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD132PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADD132PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PS.RN_SAE zmm zmm k zmm
// VFMADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RN_SAE instruction to the active function.
func (c *Context) VFMADD132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS_RN_SAE(ops...))
}
// VFMADD132PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PS.RN_SAE zmm zmm k zmm
// VFMADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RN_SAE(ops ...operand.Op) { ctx.VFMADD132PS_RN_SAE(ops...) }
// VFMADD132PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD132PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADD132PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PS.RU_SAE zmm zmm k zmm
// VFMADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RU_SAE instruction to the active function.
func (c *Context) VFMADD132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS_RU_SAE(ops...))
}
// VFMADD132PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PS.RU_SAE zmm zmm k zmm
// VFMADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RU_SAE(ops ...operand.Op) { ctx.VFMADD132PS_RU_SAE(ops...) }
// VFMADD132PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD132PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADD132PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PS.RZ_SAE zmm zmm k zmm
// VFMADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132PS_RZ_SAE(ops...))
}
// VFMADD132PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PS.RZ_SAE zmm zmm k zmm
// VFMADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD132PS_RZ_SAE(ops...) }
// VFMADD132PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD132PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD132PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.Z m128 xmm k xmm
// VFMADD132PS.Z m256 ymm k ymm
// VFMADD132PS.Z xmm xmm k xmm
// VFMADD132PS.Z ymm ymm k ymm
// VFMADD132PS.Z m512 zmm k zmm
// VFMADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.Z instruction to the active function.
func (c *Context) VFMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD132PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADD132PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.Z m128 xmm k xmm
// VFMADD132PS.Z m256 ymm k ymm
// VFMADD132PS.Z xmm xmm k xmm
// VFMADD132PS.Z ymm ymm k ymm
// VFMADD132PS.Z m512 zmm k zmm
// VFMADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD132PS.Z instruction to the active function.
// Operates on the global context.
func VFMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD132PS_Z(mxyz, xyz, k, xyz1) }
// VFMADD132SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SD m64 xmm xmm
// VFMADD132SD xmm xmm xmm
// VFMADD132SD m64 xmm k xmm
// VFMADD132SD xmm xmm k xmm
//
// Construct and append a VFMADD132SD instruction to the active function.
func (c *Context) VFMADD132SD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SD(ops...))
}
// VFMADD132SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SD m64 xmm xmm
// VFMADD132SD xmm xmm xmm
// VFMADD132SD m64 xmm k xmm
// VFMADD132SD xmm xmm k xmm
//
// Construct and append a VFMADD132SD instruction to the active function.
// Operates on the global context.
func VFMADD132SD(ops ...operand.Op) { ctx.VFMADD132SD(ops...) }
// VFMADD132SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SD.RD_SAE xmm xmm k xmm
// VFMADD132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RD_SAE instruction to the active function.
func (c *Context) VFMADD132SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SD_RD_SAE(ops...))
}
// VFMADD132SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SD.RD_SAE xmm xmm k xmm
// VFMADD132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RD_SAE(ops ...operand.Op) { ctx.VFMADD132SD_RD_SAE(ops...) }
// VFMADD132SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD132SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SD_RD_SAE_Z(x, x1, k, x2) }
// VFMADD132SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SD.RN_SAE xmm xmm k xmm
// VFMADD132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RN_SAE instruction to the active function.
func (c *Context) VFMADD132SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SD_RN_SAE(ops...))
}
// VFMADD132SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SD.RN_SAE xmm xmm k xmm
// VFMADD132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RN_SAE(ops ...operand.Op) { ctx.VFMADD132SD_RN_SAE(ops...) }
// VFMADD132SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD132SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SD_RN_SAE_Z(x, x1, k, x2) }
// VFMADD132SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SD.RU_SAE xmm xmm k xmm
// VFMADD132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RU_SAE instruction to the active function.
func (c *Context) VFMADD132SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SD_RU_SAE(ops...))
}
// VFMADD132SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SD.RU_SAE xmm xmm k xmm
// VFMADD132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RU_SAE(ops ...operand.Op) { ctx.VFMADD132SD_RU_SAE(ops...) }
// VFMADD132SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD132SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SD_RU_SAE_Z(x, x1, k, x2) }
// VFMADD132SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SD.RZ_SAE xmm xmm k xmm
// VFMADD132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD132SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SD_RZ_SAE(ops...))
}
// VFMADD132SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SD.RZ_SAE xmm xmm k xmm
// VFMADD132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD132SD_RZ_SAE(ops...) }
// VFMADD132SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD132SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD132SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.Z m64 xmm k xmm
// VFMADD132SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.Z instruction to the active function.
func (c *Context) VFMADD132SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD132SD_Z(mx, x, k, x1))
}
// VFMADD132SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.Z m64 xmm k xmm
// VFMADD132SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SD.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD132SD_Z(mx, x, k, x1) }
// VFMADD132SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SS m32 xmm xmm
// VFMADD132SS xmm xmm xmm
// VFMADD132SS m32 xmm k xmm
// VFMADD132SS xmm xmm k xmm
//
// Construct and append a VFMADD132SS instruction to the active function.
func (c *Context) VFMADD132SS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SS(ops...))
}
// VFMADD132SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SS m32 xmm xmm
// VFMADD132SS xmm xmm xmm
// VFMADD132SS m32 xmm k xmm
// VFMADD132SS xmm xmm k xmm
//
// Construct and append a VFMADD132SS instruction to the active function.
// Operates on the global context.
func VFMADD132SS(ops ...operand.Op) { ctx.VFMADD132SS(ops...) }
// VFMADD132SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SS.RD_SAE xmm xmm k xmm
// VFMADD132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RD_SAE instruction to the active function.
func (c *Context) VFMADD132SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SS_RD_SAE(ops...))
}
// VFMADD132SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SS.RD_SAE xmm xmm k xmm
// VFMADD132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RD_SAE(ops ...operand.Op) { ctx.VFMADD132SS_RD_SAE(ops...) }
// VFMADD132SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD132SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SS_RD_SAE_Z(x, x1, k, x2) }
// VFMADD132SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SS.RN_SAE xmm xmm k xmm
// VFMADD132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RN_SAE instruction to the active function.
func (c *Context) VFMADD132SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SS_RN_SAE(ops...))
}
// VFMADD132SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SS.RN_SAE xmm xmm k xmm
// VFMADD132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RN_SAE(ops ...operand.Op) { ctx.VFMADD132SS_RN_SAE(ops...) }
// VFMADD132SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD132SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SS_RN_SAE_Z(x, x1, k, x2) }
// VFMADD132SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SS.RU_SAE xmm xmm k xmm
// VFMADD132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RU_SAE instruction to the active function.
func (c *Context) VFMADD132SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SS_RU_SAE(ops...))
}
// VFMADD132SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SS.RU_SAE xmm xmm k xmm
// VFMADD132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RU_SAE(ops ...operand.Op) { ctx.VFMADD132SS_RU_SAE(ops...) }
// VFMADD132SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD132SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SS_RU_SAE_Z(x, x1, k, x2) }
// VFMADD132SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SS.RZ_SAE xmm xmm k xmm
// VFMADD132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD132SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD132SS_RZ_SAE(ops...))
}
// VFMADD132SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SS.RZ_SAE xmm xmm k xmm
// VFMADD132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD132SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD132SS_RZ_SAE(ops...) }
// VFMADD132SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD132SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD132SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD132SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD132SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.Z m32 xmm k xmm
// VFMADD132SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.Z instruction to the active function.
func (c *Context) VFMADD132SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD132SS_Z(mx, x, k, x1))
}
// VFMADD132SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.Z m32 xmm k xmm
// VFMADD132SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD132SS.Z instruction to the active function.
// Operates on the global context.
func VFMADD132SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD132SS_Z(mx, x, k, x1) }
// VFMADD213PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PD m128 xmm xmm
// VFMADD213PD m256 ymm ymm
// VFMADD213PD xmm xmm xmm
// VFMADD213PD ymm ymm ymm
// VFMADD213PD m128 xmm k xmm
// VFMADD213PD m256 ymm k ymm
// VFMADD213PD xmm xmm k xmm
// VFMADD213PD ymm ymm k ymm
// VFMADD213PD m512 zmm k zmm
// VFMADD213PD m512 zmm zmm
// VFMADD213PD zmm zmm k zmm
// VFMADD213PD zmm zmm zmm
//
// Construct and append a VFMADD213PD instruction to the active function.
func (c *Context) VFMADD213PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD(ops...))
}
// VFMADD213PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PD m128 xmm xmm
// VFMADD213PD m256 ymm ymm
// VFMADD213PD xmm xmm xmm
// VFMADD213PD ymm ymm ymm
// VFMADD213PD m128 xmm k xmm
// VFMADD213PD m256 ymm k ymm
// VFMADD213PD xmm xmm k xmm
// VFMADD213PD ymm ymm k ymm
// VFMADD213PD m512 zmm k zmm
// VFMADD213PD m512 zmm zmm
// VFMADD213PD zmm zmm k zmm
// VFMADD213PD zmm zmm zmm
//
// Construct and append a VFMADD213PD instruction to the active function.
// Operates on the global context.
func VFMADD213PD(ops ...operand.Op) { ctx.VFMADD213PD(ops...) }
// VFMADD213PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PD.BCST m64 xmm k xmm
// VFMADD213PD.BCST m64 xmm xmm
// VFMADD213PD.BCST m64 ymm k ymm
// VFMADD213PD.BCST m64 ymm ymm
// VFMADD213PD.BCST m64 zmm k zmm
// VFMADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD213PD.BCST instruction to the active function.
func (c *Context) VFMADD213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD_BCST(ops...))
}
// VFMADD213PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PD.BCST m64 xmm k xmm
// VFMADD213PD.BCST m64 xmm xmm
// VFMADD213PD.BCST m64 ymm k ymm
// VFMADD213PD.BCST m64 ymm ymm
// VFMADD213PD.BCST m64 zmm k zmm
// VFMADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD213PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADD213PD_BCST(ops ...operand.Op) { ctx.VFMADD213PD_BCST(ops...) }
// VFMADD213PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.BCST.Z m64 xmm k xmm
// VFMADD213PD.BCST.Z m64 ymm k ymm
// VFMADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD213PD.BCST.Z instruction to the active function.
func (c *Context) VFMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD213PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.BCST.Z m64 xmm k xmm
// VFMADD213PD.BCST.Z m64 ymm k ymm
// VFMADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD213PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADD213PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PD.RD_SAE zmm zmm k zmm
// VFMADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RD_SAE instruction to the active function.
func (c *Context) VFMADD213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD_RD_SAE(ops...))
}
// VFMADD213PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PD.RD_SAE zmm zmm k zmm
// VFMADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RD_SAE(ops ...operand.Op) { ctx.VFMADD213PD_RD_SAE(ops...) }
// VFMADD213PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD213PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADD213PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PD.RN_SAE zmm zmm k zmm
// VFMADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RN_SAE instruction to the active function.
func (c *Context) VFMADD213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD_RN_SAE(ops...))
}
// VFMADD213PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PD.RN_SAE zmm zmm k zmm
// VFMADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RN_SAE(ops ...operand.Op) { ctx.VFMADD213PD_RN_SAE(ops...) }
// VFMADD213PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD213PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADD213PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PD.RU_SAE zmm zmm k zmm
// VFMADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RU_SAE instruction to the active function.
func (c *Context) VFMADD213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD_RU_SAE(ops...))
}
// VFMADD213PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PD.RU_SAE zmm zmm k zmm
// VFMADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RU_SAE(ops ...operand.Op) { ctx.VFMADD213PD_RU_SAE(ops...) }
// VFMADD213PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD213PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADD213PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PD.RZ_SAE zmm zmm k zmm
// VFMADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PD_RZ_SAE(ops...))
}
// VFMADD213PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PD.RZ_SAE zmm zmm k zmm
// VFMADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD213PD_RZ_SAE(ops...) }
// VFMADD213PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD213PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD213PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.Z m128 xmm k xmm
// VFMADD213PD.Z m256 ymm k ymm
// VFMADD213PD.Z xmm xmm k xmm
// VFMADD213PD.Z ymm ymm k ymm
// VFMADD213PD.Z m512 zmm k zmm
// VFMADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.Z instruction to the active function.
func (c *Context) VFMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD213PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADD213PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.Z m128 xmm k xmm
// VFMADD213PD.Z m256 ymm k ymm
// VFMADD213PD.Z xmm xmm k xmm
// VFMADD213PD.Z ymm ymm k ymm
// VFMADD213PD.Z m512 zmm k zmm
// VFMADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PD.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD213PD_Z(mxyz, xyz, k, xyz1) }
// VFMADD213PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PS m128 xmm xmm
// VFMADD213PS m256 ymm ymm
// VFMADD213PS xmm xmm xmm
// VFMADD213PS ymm ymm ymm
// VFMADD213PS m128 xmm k xmm
// VFMADD213PS m256 ymm k ymm
// VFMADD213PS xmm xmm k xmm
// VFMADD213PS ymm ymm k ymm
// VFMADD213PS m512 zmm k zmm
// VFMADD213PS m512 zmm zmm
// VFMADD213PS zmm zmm k zmm
// VFMADD213PS zmm zmm zmm
//
// Construct and append a VFMADD213PS instruction to the active function.
func (c *Context) VFMADD213PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS(ops...))
}
// VFMADD213PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PS m128 xmm xmm
// VFMADD213PS m256 ymm ymm
// VFMADD213PS xmm xmm xmm
// VFMADD213PS ymm ymm ymm
// VFMADD213PS m128 xmm k xmm
// VFMADD213PS m256 ymm k ymm
// VFMADD213PS xmm xmm k xmm
// VFMADD213PS ymm ymm k ymm
// VFMADD213PS m512 zmm k zmm
// VFMADD213PS m512 zmm zmm
// VFMADD213PS zmm zmm k zmm
// VFMADD213PS zmm zmm zmm
//
// Construct and append a VFMADD213PS instruction to the active function.
// Operates on the global context.
func VFMADD213PS(ops ...operand.Op) { ctx.VFMADD213PS(ops...) }
// VFMADD213PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PS.BCST m32 xmm k xmm
// VFMADD213PS.BCST m32 xmm xmm
// VFMADD213PS.BCST m32 ymm k ymm
// VFMADD213PS.BCST m32 ymm ymm
// VFMADD213PS.BCST m32 zmm k zmm
// VFMADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD213PS.BCST instruction to the active function.
func (c *Context) VFMADD213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS_BCST(ops...))
}
// VFMADD213PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PS.BCST m32 xmm k xmm
// VFMADD213PS.BCST m32 xmm xmm
// VFMADD213PS.BCST m32 ymm k ymm
// VFMADD213PS.BCST m32 ymm ymm
// VFMADD213PS.BCST m32 zmm k zmm
// VFMADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD213PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADD213PS_BCST(ops ...operand.Op) { ctx.VFMADD213PS_BCST(ops...) }
// VFMADD213PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.BCST.Z m32 xmm k xmm
// VFMADD213PS.BCST.Z m32 ymm k ymm
// VFMADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD213PS.BCST.Z instruction to the active function.
func (c *Context) VFMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD213PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.BCST.Z m32 xmm k xmm
// VFMADD213PS.BCST.Z m32 ymm k ymm
// VFMADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD213PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADD213PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PS.RD_SAE zmm zmm k zmm
// VFMADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RD_SAE instruction to the active function.
func (c *Context) VFMADD213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS_RD_SAE(ops...))
}
// VFMADD213PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PS.RD_SAE zmm zmm k zmm
// VFMADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RD_SAE(ops ...operand.Op) { ctx.VFMADD213PS_RD_SAE(ops...) }
// VFMADD213PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD213PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADD213PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PS.RN_SAE zmm zmm k zmm
// VFMADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RN_SAE instruction to the active function.
func (c *Context) VFMADD213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS_RN_SAE(ops...))
}
// VFMADD213PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PS.RN_SAE zmm zmm k zmm
// VFMADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RN_SAE(ops ...operand.Op) { ctx.VFMADD213PS_RN_SAE(ops...) }
// VFMADD213PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD213PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADD213PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PS.RU_SAE zmm zmm k zmm
// VFMADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RU_SAE instruction to the active function.
func (c *Context) VFMADD213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS_RU_SAE(ops...))
}
// VFMADD213PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PS.RU_SAE zmm zmm k zmm
// VFMADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RU_SAE(ops ...operand.Op) { ctx.VFMADD213PS_RU_SAE(ops...) }
// VFMADD213PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD213PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADD213PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PS.RZ_SAE zmm zmm k zmm
// VFMADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213PS_RZ_SAE(ops...))
}
// VFMADD213PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PS.RZ_SAE zmm zmm k zmm
// VFMADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD213PS_RZ_SAE(ops...) }
// VFMADD213PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD213PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD213PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.Z m128 xmm k xmm
// VFMADD213PS.Z m256 ymm k ymm
// VFMADD213PS.Z xmm xmm k xmm
// VFMADD213PS.Z ymm ymm k ymm
// VFMADD213PS.Z m512 zmm k zmm
// VFMADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.Z instruction to the active function.
func (c *Context) VFMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD213PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADD213PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.Z m128 xmm k xmm
// VFMADD213PS.Z m256 ymm k ymm
// VFMADD213PS.Z xmm xmm k xmm
// VFMADD213PS.Z ymm ymm k ymm
// VFMADD213PS.Z m512 zmm k zmm
// VFMADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD213PS.Z instruction to the active function.
// Operates on the global context.
func VFMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD213PS_Z(mxyz, xyz, k, xyz1) }
// VFMADD213SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SD m64 xmm xmm
// VFMADD213SD xmm xmm xmm
// VFMADD213SD m64 xmm k xmm
// VFMADD213SD xmm xmm k xmm
//
// Construct and append a VFMADD213SD instruction to the active function.
func (c *Context) VFMADD213SD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SD(ops...))
}
// VFMADD213SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SD m64 xmm xmm
// VFMADD213SD xmm xmm xmm
// VFMADD213SD m64 xmm k xmm
// VFMADD213SD xmm xmm k xmm
//
// Construct and append a VFMADD213SD instruction to the active function.
// Operates on the global context.
func VFMADD213SD(ops ...operand.Op) { ctx.VFMADD213SD(ops...) }
// VFMADD213SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SD.RD_SAE xmm xmm k xmm
// VFMADD213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RD_SAE instruction to the active function.
func (c *Context) VFMADD213SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SD_RD_SAE(ops...))
}
// VFMADD213SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SD.RD_SAE xmm xmm k xmm
// VFMADD213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RD_SAE(ops ...operand.Op) { ctx.VFMADD213SD_RD_SAE(ops...) }
// VFMADD213SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD213SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SD_RD_SAE_Z(x, x1, k, x2) }
// VFMADD213SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SD.RN_SAE xmm xmm k xmm
// VFMADD213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RN_SAE instruction to the active function.
func (c *Context) VFMADD213SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SD_RN_SAE(ops...))
}
// VFMADD213SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SD.RN_SAE xmm xmm k xmm
// VFMADD213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RN_SAE(ops ...operand.Op) { ctx.VFMADD213SD_RN_SAE(ops...) }
// VFMADD213SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD213SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SD_RN_SAE_Z(x, x1, k, x2) }
// VFMADD213SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SD.RU_SAE xmm xmm k xmm
// VFMADD213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RU_SAE instruction to the active function.
func (c *Context) VFMADD213SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SD_RU_SAE(ops...))
}
// VFMADD213SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SD.RU_SAE xmm xmm k xmm
// VFMADD213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RU_SAE(ops ...operand.Op) { ctx.VFMADD213SD_RU_SAE(ops...) }
// VFMADD213SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD213SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SD_RU_SAE_Z(x, x1, k, x2) }
// VFMADD213SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SD.RZ_SAE xmm xmm k xmm
// VFMADD213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD213SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SD_RZ_SAE(ops...))
}
// VFMADD213SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SD.RZ_SAE xmm xmm k xmm
// VFMADD213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD213SD_RZ_SAE(ops...) }
// VFMADD213SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD213SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD213SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.Z m64 xmm k xmm
// VFMADD213SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.Z instruction to the active function.
func (c *Context) VFMADD213SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD213SD_Z(mx, x, k, x1))
}
// VFMADD213SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.Z m64 xmm k xmm
// VFMADD213SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SD.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD213SD_Z(mx, x, k, x1) }
// VFMADD213SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SS m32 xmm xmm
// VFMADD213SS xmm xmm xmm
// VFMADD213SS m32 xmm k xmm
// VFMADD213SS xmm xmm k xmm
//
// Construct and append a VFMADD213SS instruction to the active function.
func (c *Context) VFMADD213SS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SS(ops...))
}
// VFMADD213SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SS m32 xmm xmm
// VFMADD213SS xmm xmm xmm
// VFMADD213SS m32 xmm k xmm
// VFMADD213SS xmm xmm k xmm
//
// Construct and append a VFMADD213SS instruction to the active function.
// Operates on the global context.
func VFMADD213SS(ops ...operand.Op) { ctx.VFMADD213SS(ops...) }
// VFMADD213SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SS.RD_SAE xmm xmm k xmm
// VFMADD213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RD_SAE instruction to the active function.
func (c *Context) VFMADD213SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SS_RD_SAE(ops...))
}
// VFMADD213SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SS.RD_SAE xmm xmm k xmm
// VFMADD213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RD_SAE(ops ...operand.Op) { ctx.VFMADD213SS_RD_SAE(ops...) }
// VFMADD213SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD213SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SS_RD_SAE_Z(x, x1, k, x2) }
// VFMADD213SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SS.RN_SAE xmm xmm k xmm
// VFMADD213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RN_SAE instruction to the active function.
func (c *Context) VFMADD213SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SS_RN_SAE(ops...))
}
// VFMADD213SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SS.RN_SAE xmm xmm k xmm
// VFMADD213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RN_SAE(ops ...operand.Op) { ctx.VFMADD213SS_RN_SAE(ops...) }
// VFMADD213SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD213SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SS_RN_SAE_Z(x, x1, k, x2) }
// VFMADD213SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SS.RU_SAE xmm xmm k xmm
// VFMADD213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RU_SAE instruction to the active function.
func (c *Context) VFMADD213SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SS_RU_SAE(ops...))
}
// VFMADD213SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SS.RU_SAE xmm xmm k xmm
// VFMADD213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RU_SAE(ops ...operand.Op) { ctx.VFMADD213SS_RU_SAE(ops...) }
// VFMADD213SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD213SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SS_RU_SAE_Z(x, x1, k, x2) }
// VFMADD213SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SS.RZ_SAE xmm xmm k xmm
// VFMADD213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD213SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD213SS_RZ_SAE(ops...))
}
// VFMADD213SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SS.RZ_SAE xmm xmm k xmm
// VFMADD213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD213SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD213SS_RZ_SAE(ops...) }
// VFMADD213SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD213SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD213SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD213SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD213SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.Z m32 xmm k xmm
// VFMADD213SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.Z instruction to the active function.
func (c *Context) VFMADD213SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD213SS_Z(mx, x, k, x1))
}
// VFMADD213SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.Z m32 xmm k xmm
// VFMADD213SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD213SS.Z instruction to the active function.
// Operates on the global context.
func VFMADD213SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD213SS_Z(mx, x, k, x1) }
// VFMADD231PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PD m128 xmm xmm
// VFMADD231PD m256 ymm ymm
// VFMADD231PD xmm xmm xmm
// VFMADD231PD ymm ymm ymm
// VFMADD231PD m128 xmm k xmm
// VFMADD231PD m256 ymm k ymm
// VFMADD231PD xmm xmm k xmm
// VFMADD231PD ymm ymm k ymm
// VFMADD231PD m512 zmm k zmm
// VFMADD231PD m512 zmm zmm
// VFMADD231PD zmm zmm k zmm
// VFMADD231PD zmm zmm zmm
//
// Construct and append a VFMADD231PD instruction to the active function.
func (c *Context) VFMADD231PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD(ops...))
}
// VFMADD231PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PD m128 xmm xmm
// VFMADD231PD m256 ymm ymm
// VFMADD231PD xmm xmm xmm
// VFMADD231PD ymm ymm ymm
// VFMADD231PD m128 xmm k xmm
// VFMADD231PD m256 ymm k ymm
// VFMADD231PD xmm xmm k xmm
// VFMADD231PD ymm ymm k ymm
// VFMADD231PD m512 zmm k zmm
// VFMADD231PD m512 zmm zmm
// VFMADD231PD zmm zmm k zmm
// VFMADD231PD zmm zmm zmm
//
// Construct and append a VFMADD231PD instruction to the active function.
// Operates on the global context.
func VFMADD231PD(ops ...operand.Op) { ctx.VFMADD231PD(ops...) }
// VFMADD231PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PD.BCST m64 xmm k xmm
// VFMADD231PD.BCST m64 xmm xmm
// VFMADD231PD.BCST m64 ymm k ymm
// VFMADD231PD.BCST m64 ymm ymm
// VFMADD231PD.BCST m64 zmm k zmm
// VFMADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD231PD.BCST instruction to the active function.
func (c *Context) VFMADD231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD_BCST(ops...))
}
// VFMADD231PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PD.BCST m64 xmm k xmm
// VFMADD231PD.BCST m64 xmm xmm
// VFMADD231PD.BCST m64 ymm k ymm
// VFMADD231PD.BCST m64 ymm ymm
// VFMADD231PD.BCST m64 zmm k zmm
// VFMADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFMADD231PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADD231PD_BCST(ops ...operand.Op) { ctx.VFMADD231PD_BCST(ops...) }
// VFMADD231PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.BCST.Z m64 xmm k xmm
// VFMADD231PD.BCST.Z m64 ymm k ymm
// VFMADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD231PD.BCST.Z instruction to the active function.
func (c *Context) VFMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD231PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.BCST.Z m64 xmm k xmm
// VFMADD231PD.BCST.Z m64 ymm k ymm
// VFMADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADD231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD231PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADD231PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PD.RD_SAE zmm zmm k zmm
// VFMADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RD_SAE instruction to the active function.
func (c *Context) VFMADD231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD_RD_SAE(ops...))
}
// VFMADD231PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PD.RD_SAE zmm zmm k zmm
// VFMADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RD_SAE(ops ...operand.Op) { ctx.VFMADD231PD_RD_SAE(ops...) }
// VFMADD231PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD231PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADD231PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PD.RN_SAE zmm zmm k zmm
// VFMADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RN_SAE instruction to the active function.
func (c *Context) VFMADD231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD_RN_SAE(ops...))
}
// VFMADD231PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PD.RN_SAE zmm zmm k zmm
// VFMADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RN_SAE(ops ...operand.Op) { ctx.VFMADD231PD_RN_SAE(ops...) }
// VFMADD231PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD231PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADD231PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PD.RU_SAE zmm zmm k zmm
// VFMADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RU_SAE instruction to the active function.
func (c *Context) VFMADD231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD_RU_SAE(ops...))
}
// VFMADD231PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PD.RU_SAE zmm zmm k zmm
// VFMADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RU_SAE(ops ...operand.Op) { ctx.VFMADD231PD_RU_SAE(ops...) }
// VFMADD231PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD231PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADD231PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PD.RZ_SAE zmm zmm k zmm
// VFMADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PD_RZ_SAE(ops...))
}
// VFMADD231PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PD.RZ_SAE zmm zmm k zmm
// VFMADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD231PD_RZ_SAE(ops...) }
// VFMADD231PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD231PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD231PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.Z m128 xmm k xmm
// VFMADD231PD.Z m256 ymm k ymm
// VFMADD231PD.Z xmm xmm k xmm
// VFMADD231PD.Z ymm ymm k ymm
// VFMADD231PD.Z m512 zmm k zmm
// VFMADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.Z instruction to the active function.
func (c *Context) VFMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD231PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADD231PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.Z m128 xmm k xmm
// VFMADD231PD.Z m256 ymm k ymm
// VFMADD231PD.Z xmm xmm k xmm
// VFMADD231PD.Z ymm ymm k ymm
// VFMADD231PD.Z m512 zmm k zmm
// VFMADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PD.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD231PD_Z(mxyz, xyz, k, xyz1) }
// VFMADD231PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PS m128 xmm xmm
// VFMADD231PS m256 ymm ymm
// VFMADD231PS xmm xmm xmm
// VFMADD231PS ymm ymm ymm
// VFMADD231PS m128 xmm k xmm
// VFMADD231PS m256 ymm k ymm
// VFMADD231PS xmm xmm k xmm
// VFMADD231PS ymm ymm k ymm
// VFMADD231PS m512 zmm k zmm
// VFMADD231PS m512 zmm zmm
// VFMADD231PS zmm zmm k zmm
// VFMADD231PS zmm zmm zmm
//
// Construct and append a VFMADD231PS instruction to the active function.
func (c *Context) VFMADD231PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS(ops...))
}
// VFMADD231PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PS m128 xmm xmm
// VFMADD231PS m256 ymm ymm
// VFMADD231PS xmm xmm xmm
// VFMADD231PS ymm ymm ymm
// VFMADD231PS m128 xmm k xmm
// VFMADD231PS m256 ymm k ymm
// VFMADD231PS xmm xmm k xmm
// VFMADD231PS ymm ymm k ymm
// VFMADD231PS m512 zmm k zmm
// VFMADD231PS m512 zmm zmm
// VFMADD231PS zmm zmm k zmm
// VFMADD231PS zmm zmm zmm
//
// Construct and append a VFMADD231PS instruction to the active function.
// Operates on the global context.
func VFMADD231PS(ops ...operand.Op) { ctx.VFMADD231PS(ops...) }
// VFMADD231PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PS.BCST m32 xmm k xmm
// VFMADD231PS.BCST m32 xmm xmm
// VFMADD231PS.BCST m32 ymm k ymm
// VFMADD231PS.BCST m32 ymm ymm
// VFMADD231PS.BCST m32 zmm k zmm
// VFMADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD231PS.BCST instruction to the active function.
func (c *Context) VFMADD231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS_BCST(ops...))
}
// VFMADD231PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PS.BCST m32 xmm k xmm
// VFMADD231PS.BCST m32 xmm xmm
// VFMADD231PS.BCST m32 ymm k ymm
// VFMADD231PS.BCST m32 ymm ymm
// VFMADD231PS.BCST m32 zmm k zmm
// VFMADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFMADD231PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADD231PS_BCST(ops ...operand.Op) { ctx.VFMADD231PS_BCST(ops...) }
// VFMADD231PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.BCST.Z m32 xmm k xmm
// VFMADD231PS.BCST.Z m32 ymm k ymm
// VFMADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD231PS.BCST.Z instruction to the active function.
func (c *Context) VFMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADD231PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.BCST.Z m32 xmm k xmm
// VFMADD231PS.BCST.Z m32 ymm k ymm
// VFMADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADD231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADD231PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADD231PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PS.RD_SAE zmm zmm k zmm
// VFMADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RD_SAE instruction to the active function.
func (c *Context) VFMADD231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS_RD_SAE(ops...))
}
// VFMADD231PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PS.RD_SAE zmm zmm k zmm
// VFMADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RD_SAE(ops ...operand.Op) { ctx.VFMADD231PS_RD_SAE(ops...) }
// VFMADD231PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADD231PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADD231PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PS.RN_SAE zmm zmm k zmm
// VFMADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RN_SAE instruction to the active function.
func (c *Context) VFMADD231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS_RN_SAE(ops...))
}
// VFMADD231PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PS.RN_SAE zmm zmm k zmm
// VFMADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RN_SAE(ops ...operand.Op) { ctx.VFMADD231PS_RN_SAE(ops...) }
// VFMADD231PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADD231PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADD231PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PS.RU_SAE zmm zmm k zmm
// VFMADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RU_SAE instruction to the active function.
func (c *Context) VFMADD231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS_RU_SAE(ops...))
}
// VFMADD231PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PS.RU_SAE zmm zmm k zmm
// VFMADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RU_SAE(ops ...operand.Op) { ctx.VFMADD231PS_RU_SAE(ops...) }
// VFMADD231PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADD231PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADD231PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PS.RZ_SAE zmm zmm k zmm
// VFMADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231PS_RZ_SAE(ops...))
}
// VFMADD231PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PS.RZ_SAE zmm zmm k zmm
// VFMADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADD231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD231PS_RZ_SAE(ops...) }
// VFMADD231PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADD231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADD231PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADD231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADD231PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.Z m128 xmm k xmm
// VFMADD231PS.Z m256 ymm k ymm
// VFMADD231PS.Z xmm xmm k xmm
// VFMADD231PS.Z ymm ymm k ymm
// VFMADD231PS.Z m512 zmm k zmm
// VFMADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.Z instruction to the active function.
func (c *Context) VFMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADD231PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADD231PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.Z m128 xmm k xmm
// VFMADD231PS.Z m256 ymm k ymm
// VFMADD231PS.Z xmm xmm k xmm
// VFMADD231PS.Z ymm ymm k ymm
// VFMADD231PS.Z m512 zmm k zmm
// VFMADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFMADD231PS.Z instruction to the active function.
// Operates on the global context.
func VFMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADD231PS_Z(mxyz, xyz, k, xyz1) }
// VFMADD231SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SD m64 xmm xmm
// VFMADD231SD xmm xmm xmm
// VFMADD231SD m64 xmm k xmm
// VFMADD231SD xmm xmm k xmm
//
// Construct and append a VFMADD231SD instruction to the active function.
func (c *Context) VFMADD231SD(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SD(ops...))
}
// VFMADD231SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SD m64 xmm xmm
// VFMADD231SD xmm xmm xmm
// VFMADD231SD m64 xmm k xmm
// VFMADD231SD xmm xmm k xmm
//
// Construct and append a VFMADD231SD instruction to the active function.
// Operates on the global context.
func VFMADD231SD(ops ...operand.Op) { ctx.VFMADD231SD(ops...) }
// VFMADD231SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SD.RD_SAE xmm xmm k xmm
// VFMADD231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RD_SAE instruction to the active function.
func (c *Context) VFMADD231SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SD_RD_SAE(ops...))
}
// VFMADD231SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SD.RD_SAE xmm xmm k xmm
// VFMADD231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RD_SAE(ops ...operand.Op) { ctx.VFMADD231SD_RD_SAE(ops...) }
// VFMADD231SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD231SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SD_RD_SAE_Z(x, x1, k, x2) }
// VFMADD231SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SD.RN_SAE xmm xmm k xmm
// VFMADD231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RN_SAE instruction to the active function.
func (c *Context) VFMADD231SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SD_RN_SAE(ops...))
}
// VFMADD231SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SD.RN_SAE xmm xmm k xmm
// VFMADD231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RN_SAE(ops ...operand.Op) { ctx.VFMADD231SD_RN_SAE(ops...) }
// VFMADD231SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD231SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SD_RN_SAE_Z(x, x1, k, x2) }
// VFMADD231SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SD.RU_SAE xmm xmm k xmm
// VFMADD231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RU_SAE instruction to the active function.
func (c *Context) VFMADD231SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SD_RU_SAE(ops...))
}
// VFMADD231SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SD.RU_SAE xmm xmm k xmm
// VFMADD231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RU_SAE(ops ...operand.Op) { ctx.VFMADD231SD_RU_SAE(ops...) }
// VFMADD231SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD231SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SD_RU_SAE_Z(x, x1, k, x2) }
// VFMADD231SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SD.RZ_SAE xmm xmm k xmm
// VFMADD231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RZ_SAE instruction to the active function.
func (c *Context) VFMADD231SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SD_RZ_SAE(ops...))
}
// VFMADD231SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SD.RZ_SAE xmm xmm k xmm
// VFMADD231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RZ_SAE(ops ...operand.Op) { ctx.VFMADD231SD_RZ_SAE(ops...) }
// VFMADD231SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD231SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD231SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.Z m64 xmm k xmm
// VFMADD231SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.Z instruction to the active function.
func (c *Context) VFMADD231SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD231SD_Z(mx, x, k, x1))
}
// VFMADD231SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.Z m64 xmm k xmm
// VFMADD231SD.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SD.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD231SD_Z(mx, x, k, x1) }
// VFMADD231SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SS m32 xmm xmm
// VFMADD231SS xmm xmm xmm
// VFMADD231SS m32 xmm k xmm
// VFMADD231SS xmm xmm k xmm
//
// Construct and append a VFMADD231SS instruction to the active function.
func (c *Context) VFMADD231SS(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SS(ops...))
}
// VFMADD231SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SS m32 xmm xmm
// VFMADD231SS xmm xmm xmm
// VFMADD231SS m32 xmm k xmm
// VFMADD231SS xmm xmm k xmm
//
// Construct and append a VFMADD231SS instruction to the active function.
// Operates on the global context.
func VFMADD231SS(ops ...operand.Op) { ctx.VFMADD231SS(ops...) }
// VFMADD231SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SS.RD_SAE xmm xmm k xmm
// VFMADD231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RD_SAE instruction to the active function.
func (c *Context) VFMADD231SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SS_RD_SAE(ops...))
}
// VFMADD231SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SS.RD_SAE xmm xmm k xmm
// VFMADD231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RD_SAE(ops ...operand.Op) { ctx.VFMADD231SS_RD_SAE(ops...) }
// VFMADD231SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMADD231SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SS_RD_SAE_Z(x, x1, k, x2) }
// VFMADD231SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SS.RN_SAE xmm xmm k xmm
// VFMADD231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RN_SAE instruction to the active function.
func (c *Context) VFMADD231SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SS_RN_SAE(ops...))
}
// VFMADD231SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SS.RN_SAE xmm xmm k xmm
// VFMADD231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RN_SAE(ops ...operand.Op) { ctx.VFMADD231SS_RN_SAE(ops...) }
// VFMADD231SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMADD231SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SS_RN_SAE_Z(x, x1, k, x2) }
// VFMADD231SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SS.RU_SAE xmm xmm k xmm
// VFMADD231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RU_SAE instruction to the active function.
func (c *Context) VFMADD231SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SS_RU_SAE(ops...))
}
// VFMADD231SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SS.RU_SAE xmm xmm k xmm
// VFMADD231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RU_SAE(ops ...operand.Op) { ctx.VFMADD231SS_RU_SAE(ops...) }
// VFMADD231SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMADD231SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SS_RU_SAE_Z(x, x1, k, x2) }
// VFMADD231SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SS.RZ_SAE xmm xmm k xmm
// VFMADD231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RZ_SAE instruction to the active function.
func (c *Context) VFMADD231SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADD231SS_RZ_SAE(ops...))
}
// VFMADD231SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SS.RZ_SAE xmm xmm k xmm
// VFMADD231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMADD231SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RZ_SAE(ops ...operand.Op) { ctx.VFMADD231SS_RZ_SAE(ops...) }
// VFMADD231SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMADD231SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMADD231SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMADD231SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMADD231SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.Z m32 xmm k xmm
// VFMADD231SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.Z instruction to the active function.
func (c *Context) VFMADD231SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMADD231SS_Z(mx, x, k, x1))
}
// VFMADD231SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.Z m32 xmm k xmm
// VFMADD231SS.Z xmm xmm k xmm
//
// Construct and append a VFMADD231SS.Z instruction to the active function.
// Operates on the global context.
func VFMADD231SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMADD231SS_Z(mx, x, k, x1) }
// VFMADDSUB132PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PD m128 xmm xmm
// VFMADDSUB132PD m256 ymm ymm
// VFMADDSUB132PD xmm xmm xmm
// VFMADDSUB132PD ymm ymm ymm
// VFMADDSUB132PD m128 xmm k xmm
// VFMADDSUB132PD m256 ymm k ymm
// VFMADDSUB132PD xmm xmm k xmm
// VFMADDSUB132PD ymm ymm k ymm
// VFMADDSUB132PD m512 zmm k zmm
// VFMADDSUB132PD m512 zmm zmm
// VFMADDSUB132PD zmm zmm k zmm
// VFMADDSUB132PD zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD instruction to the active function.
func (c *Context) VFMADDSUB132PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD(ops...))
}
// VFMADDSUB132PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PD m128 xmm xmm
// VFMADDSUB132PD m256 ymm ymm
// VFMADDSUB132PD xmm xmm xmm
// VFMADDSUB132PD ymm ymm ymm
// VFMADDSUB132PD m128 xmm k xmm
// VFMADDSUB132PD m256 ymm k ymm
// VFMADDSUB132PD xmm xmm k xmm
// VFMADDSUB132PD ymm ymm k ymm
// VFMADDSUB132PD m512 zmm k zmm
// VFMADDSUB132PD m512 zmm zmm
// VFMADDSUB132PD zmm zmm k zmm
// VFMADDSUB132PD zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD(ops ...operand.Op) { ctx.VFMADDSUB132PD(ops...) }
// VFMADDSUB132PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PD.BCST m64 xmm k xmm
// VFMADDSUB132PD.BCST m64 xmm xmm
// VFMADDSUB132PD.BCST m64 ymm k ymm
// VFMADDSUB132PD.BCST m64 ymm ymm
// VFMADDSUB132PD.BCST m64 zmm k zmm
// VFMADDSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB132PD.BCST instruction to the active function.
func (c *Context) VFMADDSUB132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_BCST(ops...))
}
// VFMADDSUB132PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PD.BCST m64 xmm k xmm
// VFMADDSUB132PD.BCST m64 xmm xmm
// VFMADDSUB132PD.BCST m64 ymm k ymm
// VFMADDSUB132PD.BCST m64 ymm ymm
// VFMADDSUB132PD.BCST m64 zmm k zmm
// VFMADDSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB132PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_BCST(ops ...operand.Op) { ctx.VFMADDSUB132PD_BCST(ops...) }
// VFMADDSUB132PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.BCST.Z m64 xmm k xmm
// VFMADDSUB132PD.BCST.Z m64 ymm k ymm
// VFMADDSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB132PD.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB132PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.BCST.Z m64 xmm k xmm
// VFMADDSUB132PD.BCST.Z m64 ymm k ymm
// VFMADDSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB132PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB132PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE zmm zmm k zmm
// VFMADDSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RD_SAE(ops...))
}
// VFMADDSUB132PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE zmm zmm k zmm
// VFMADDSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PD_RD_SAE(ops...) }
// VFMADDSUB132PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE zmm zmm k zmm
// VFMADDSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RN_SAE(ops...))
}
// VFMADDSUB132PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE zmm zmm k zmm
// VFMADDSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PD_RN_SAE(ops...) }
// VFMADDSUB132PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE zmm zmm k zmm
// VFMADDSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RU_SAE(ops...))
}
// VFMADDSUB132PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE zmm zmm k zmm
// VFMADDSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PD_RU_SAE(ops...) }
// VFMADDSUB132PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RZ_SAE(ops...))
}
// VFMADDSUB132PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PD_RZ_SAE(ops...) }
// VFMADDSUB132PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.Z m128 xmm k xmm
// VFMADDSUB132PD.Z m256 ymm k ymm
// VFMADDSUB132PD.Z xmm xmm k xmm
// VFMADDSUB132PD.Z ymm ymm k ymm
// VFMADDSUB132PD.Z m512 zmm k zmm
// VFMADDSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.Z instruction to the active function.
func (c *Context) VFMADDSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB132PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.Z m128 xmm k xmm
// VFMADDSUB132PD.Z m256 ymm k ymm
// VFMADDSUB132PD.Z xmm xmm k xmm
// VFMADDSUB132PD.Z ymm ymm k ymm
// VFMADDSUB132PD.Z m512 zmm k zmm
// VFMADDSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PD.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB132PD_Z(mxyz, xyz, k, xyz1) }
// VFMADDSUB132PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PS m128 xmm xmm
// VFMADDSUB132PS m256 ymm ymm
// VFMADDSUB132PS xmm xmm xmm
// VFMADDSUB132PS ymm ymm ymm
// VFMADDSUB132PS m128 xmm k xmm
// VFMADDSUB132PS m256 ymm k ymm
// VFMADDSUB132PS xmm xmm k xmm
// VFMADDSUB132PS ymm ymm k ymm
// VFMADDSUB132PS m512 zmm k zmm
// VFMADDSUB132PS m512 zmm zmm
// VFMADDSUB132PS zmm zmm k zmm
// VFMADDSUB132PS zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS instruction to the active function.
func (c *Context) VFMADDSUB132PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS(ops...))
}
// VFMADDSUB132PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PS m128 xmm xmm
// VFMADDSUB132PS m256 ymm ymm
// VFMADDSUB132PS xmm xmm xmm
// VFMADDSUB132PS ymm ymm ymm
// VFMADDSUB132PS m128 xmm k xmm
// VFMADDSUB132PS m256 ymm k ymm
// VFMADDSUB132PS xmm xmm k xmm
// VFMADDSUB132PS ymm ymm k ymm
// VFMADDSUB132PS m512 zmm k zmm
// VFMADDSUB132PS m512 zmm zmm
// VFMADDSUB132PS zmm zmm k zmm
// VFMADDSUB132PS zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS(ops ...operand.Op) { ctx.VFMADDSUB132PS(ops...) }
// VFMADDSUB132PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PS.BCST m32 xmm k xmm
// VFMADDSUB132PS.BCST m32 xmm xmm
// VFMADDSUB132PS.BCST m32 ymm k ymm
// VFMADDSUB132PS.BCST m32 ymm ymm
// VFMADDSUB132PS.BCST m32 zmm k zmm
// VFMADDSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB132PS.BCST instruction to the active function.
func (c *Context) VFMADDSUB132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_BCST(ops...))
}
// VFMADDSUB132PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PS.BCST m32 xmm k xmm
// VFMADDSUB132PS.BCST m32 xmm xmm
// VFMADDSUB132PS.BCST m32 ymm k ymm
// VFMADDSUB132PS.BCST m32 ymm ymm
// VFMADDSUB132PS.BCST m32 zmm k zmm
// VFMADDSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB132PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_BCST(ops ...operand.Op) { ctx.VFMADDSUB132PS_BCST(ops...) }
// VFMADDSUB132PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.BCST.Z m32 xmm k xmm
// VFMADDSUB132PS.BCST.Z m32 ymm k ymm
// VFMADDSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB132PS.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB132PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.BCST.Z m32 xmm k xmm
// VFMADDSUB132PS.BCST.Z m32 ymm k ymm
// VFMADDSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB132PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB132PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE zmm zmm k zmm
// VFMADDSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RD_SAE(ops...))
}
// VFMADDSUB132PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE zmm zmm k zmm
// VFMADDSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PS_RD_SAE(ops...) }
// VFMADDSUB132PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE zmm zmm k zmm
// VFMADDSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RN_SAE(ops...))
}
// VFMADDSUB132PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE zmm zmm k zmm
// VFMADDSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PS_RN_SAE(ops...) }
// VFMADDSUB132PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE zmm zmm k zmm
// VFMADDSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RU_SAE(ops...))
}
// VFMADDSUB132PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE zmm zmm k zmm
// VFMADDSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PS_RU_SAE(ops...) }
// VFMADDSUB132PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RZ_SAE(ops...))
}
// VFMADDSUB132PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB132PS_RZ_SAE(ops...) }
// VFMADDSUB132PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB132PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB132PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.Z m128 xmm k xmm
// VFMADDSUB132PS.Z m256 ymm k ymm
// VFMADDSUB132PS.Z xmm xmm k xmm
// VFMADDSUB132PS.Z ymm ymm k ymm
// VFMADDSUB132PS.Z m512 zmm k zmm
// VFMADDSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.Z instruction to the active function.
func (c *Context) VFMADDSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB132PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB132PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.Z m128 xmm k xmm
// VFMADDSUB132PS.Z m256 ymm k ymm
// VFMADDSUB132PS.Z xmm xmm k xmm
// VFMADDSUB132PS.Z ymm ymm k ymm
// VFMADDSUB132PS.Z m512 zmm k zmm
// VFMADDSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB132PS.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB132PS_Z(mxyz, xyz, k, xyz1) }
// VFMADDSUB213PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PD m128 xmm xmm
// VFMADDSUB213PD m256 ymm ymm
// VFMADDSUB213PD xmm xmm xmm
// VFMADDSUB213PD ymm ymm ymm
// VFMADDSUB213PD m128 xmm k xmm
// VFMADDSUB213PD m256 ymm k ymm
// VFMADDSUB213PD xmm xmm k xmm
// VFMADDSUB213PD ymm ymm k ymm
// VFMADDSUB213PD m512 zmm k zmm
// VFMADDSUB213PD m512 zmm zmm
// VFMADDSUB213PD zmm zmm k zmm
// VFMADDSUB213PD zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD instruction to the active function.
func (c *Context) VFMADDSUB213PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD(ops...))
}
// VFMADDSUB213PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PD m128 xmm xmm
// VFMADDSUB213PD m256 ymm ymm
// VFMADDSUB213PD xmm xmm xmm
// VFMADDSUB213PD ymm ymm ymm
// VFMADDSUB213PD m128 xmm k xmm
// VFMADDSUB213PD m256 ymm k ymm
// VFMADDSUB213PD xmm xmm k xmm
// VFMADDSUB213PD ymm ymm k ymm
// VFMADDSUB213PD m512 zmm k zmm
// VFMADDSUB213PD m512 zmm zmm
// VFMADDSUB213PD zmm zmm k zmm
// VFMADDSUB213PD zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD(ops ...operand.Op) { ctx.VFMADDSUB213PD(ops...) }
// VFMADDSUB213PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PD.BCST m64 xmm k xmm
// VFMADDSUB213PD.BCST m64 xmm xmm
// VFMADDSUB213PD.BCST m64 ymm k ymm
// VFMADDSUB213PD.BCST m64 ymm ymm
// VFMADDSUB213PD.BCST m64 zmm k zmm
// VFMADDSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB213PD.BCST instruction to the active function.
func (c *Context) VFMADDSUB213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_BCST(ops...))
}
// VFMADDSUB213PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PD.BCST m64 xmm k xmm
// VFMADDSUB213PD.BCST m64 xmm xmm
// VFMADDSUB213PD.BCST m64 ymm k ymm
// VFMADDSUB213PD.BCST m64 ymm ymm
// VFMADDSUB213PD.BCST m64 zmm k zmm
// VFMADDSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB213PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_BCST(ops ...operand.Op) { ctx.VFMADDSUB213PD_BCST(ops...) }
// VFMADDSUB213PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.BCST.Z m64 xmm k xmm
// VFMADDSUB213PD.BCST.Z m64 ymm k ymm
// VFMADDSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB213PD.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB213PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.BCST.Z m64 xmm k xmm
// VFMADDSUB213PD.BCST.Z m64 ymm k ymm
// VFMADDSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB213PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB213PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE zmm zmm k zmm
// VFMADDSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RD_SAE(ops...))
}
// VFMADDSUB213PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE zmm zmm k zmm
// VFMADDSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PD_RD_SAE(ops...) }
// VFMADDSUB213PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE zmm zmm k zmm
// VFMADDSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RN_SAE(ops...))
}
// VFMADDSUB213PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE zmm zmm k zmm
// VFMADDSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PD_RN_SAE(ops...) }
// VFMADDSUB213PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE zmm zmm k zmm
// VFMADDSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RU_SAE(ops...))
}
// VFMADDSUB213PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE zmm zmm k zmm
// VFMADDSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PD_RU_SAE(ops...) }
// VFMADDSUB213PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RZ_SAE(ops...))
}
// VFMADDSUB213PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PD_RZ_SAE(ops...) }
// VFMADDSUB213PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.Z m128 xmm k xmm
// VFMADDSUB213PD.Z m256 ymm k ymm
// VFMADDSUB213PD.Z xmm xmm k xmm
// VFMADDSUB213PD.Z ymm ymm k ymm
// VFMADDSUB213PD.Z m512 zmm k zmm
// VFMADDSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.Z instruction to the active function.
func (c *Context) VFMADDSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB213PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.Z m128 xmm k xmm
// VFMADDSUB213PD.Z m256 ymm k ymm
// VFMADDSUB213PD.Z xmm xmm k xmm
// VFMADDSUB213PD.Z ymm ymm k ymm
// VFMADDSUB213PD.Z m512 zmm k zmm
// VFMADDSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PD.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB213PD_Z(mxyz, xyz, k, xyz1) }
// VFMADDSUB213PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PS m128 xmm xmm
// VFMADDSUB213PS m256 ymm ymm
// VFMADDSUB213PS xmm xmm xmm
// VFMADDSUB213PS ymm ymm ymm
// VFMADDSUB213PS m128 xmm k xmm
// VFMADDSUB213PS m256 ymm k ymm
// VFMADDSUB213PS xmm xmm k xmm
// VFMADDSUB213PS ymm ymm k ymm
// VFMADDSUB213PS m512 zmm k zmm
// VFMADDSUB213PS m512 zmm zmm
// VFMADDSUB213PS zmm zmm k zmm
// VFMADDSUB213PS zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS instruction to the active function.
func (c *Context) VFMADDSUB213PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS(ops...))
}
// VFMADDSUB213PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PS m128 xmm xmm
// VFMADDSUB213PS m256 ymm ymm
// VFMADDSUB213PS xmm xmm xmm
// VFMADDSUB213PS ymm ymm ymm
// VFMADDSUB213PS m128 xmm k xmm
// VFMADDSUB213PS m256 ymm k ymm
// VFMADDSUB213PS xmm xmm k xmm
// VFMADDSUB213PS ymm ymm k ymm
// VFMADDSUB213PS m512 zmm k zmm
// VFMADDSUB213PS m512 zmm zmm
// VFMADDSUB213PS zmm zmm k zmm
// VFMADDSUB213PS zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS(ops ...operand.Op) { ctx.VFMADDSUB213PS(ops...) }
// VFMADDSUB213PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PS.BCST m32 xmm k xmm
// VFMADDSUB213PS.BCST m32 xmm xmm
// VFMADDSUB213PS.BCST m32 ymm k ymm
// VFMADDSUB213PS.BCST m32 ymm ymm
// VFMADDSUB213PS.BCST m32 zmm k zmm
// VFMADDSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB213PS.BCST instruction to the active function.
func (c *Context) VFMADDSUB213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_BCST(ops...))
}
// VFMADDSUB213PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PS.BCST m32 xmm k xmm
// VFMADDSUB213PS.BCST m32 xmm xmm
// VFMADDSUB213PS.BCST m32 ymm k ymm
// VFMADDSUB213PS.BCST m32 ymm ymm
// VFMADDSUB213PS.BCST m32 zmm k zmm
// VFMADDSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB213PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_BCST(ops ...operand.Op) { ctx.VFMADDSUB213PS_BCST(ops...) }
// VFMADDSUB213PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.BCST.Z m32 xmm k xmm
// VFMADDSUB213PS.BCST.Z m32 ymm k ymm
// VFMADDSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB213PS.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB213PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.BCST.Z m32 xmm k xmm
// VFMADDSUB213PS.BCST.Z m32 ymm k ymm
// VFMADDSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB213PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB213PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE zmm zmm k zmm
// VFMADDSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RD_SAE(ops...))
}
// VFMADDSUB213PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE zmm zmm k zmm
// VFMADDSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PS_RD_SAE(ops...) }
// VFMADDSUB213PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE zmm zmm k zmm
// VFMADDSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RN_SAE(ops...))
}
// VFMADDSUB213PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE zmm zmm k zmm
// VFMADDSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PS_RN_SAE(ops...) }
// VFMADDSUB213PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE zmm zmm k zmm
// VFMADDSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RU_SAE(ops...))
}
// VFMADDSUB213PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE zmm zmm k zmm
// VFMADDSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PS_RU_SAE(ops...) }
// VFMADDSUB213PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RZ_SAE(ops...))
}
// VFMADDSUB213PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB213PS_RZ_SAE(ops...) }
// VFMADDSUB213PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB213PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB213PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.Z m128 xmm k xmm
// VFMADDSUB213PS.Z m256 ymm k ymm
// VFMADDSUB213PS.Z xmm xmm k xmm
// VFMADDSUB213PS.Z ymm ymm k ymm
// VFMADDSUB213PS.Z m512 zmm k zmm
// VFMADDSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.Z instruction to the active function.
func (c *Context) VFMADDSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB213PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB213PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.Z m128 xmm k xmm
// VFMADDSUB213PS.Z m256 ymm k ymm
// VFMADDSUB213PS.Z xmm xmm k xmm
// VFMADDSUB213PS.Z ymm ymm k ymm
// VFMADDSUB213PS.Z m512 zmm k zmm
// VFMADDSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB213PS.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB213PS_Z(mxyz, xyz, k, xyz1) }
// VFMADDSUB231PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PD m128 xmm xmm
// VFMADDSUB231PD m256 ymm ymm
// VFMADDSUB231PD xmm xmm xmm
// VFMADDSUB231PD ymm ymm ymm
// VFMADDSUB231PD m128 xmm k xmm
// VFMADDSUB231PD m256 ymm k ymm
// VFMADDSUB231PD xmm xmm k xmm
// VFMADDSUB231PD ymm ymm k ymm
// VFMADDSUB231PD m512 zmm k zmm
// VFMADDSUB231PD m512 zmm zmm
// VFMADDSUB231PD zmm zmm k zmm
// VFMADDSUB231PD zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD instruction to the active function.
func (c *Context) VFMADDSUB231PD(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD(ops...))
}
// VFMADDSUB231PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PD m128 xmm xmm
// VFMADDSUB231PD m256 ymm ymm
// VFMADDSUB231PD xmm xmm xmm
// VFMADDSUB231PD ymm ymm ymm
// VFMADDSUB231PD m128 xmm k xmm
// VFMADDSUB231PD m256 ymm k ymm
// VFMADDSUB231PD xmm xmm k xmm
// VFMADDSUB231PD ymm ymm k ymm
// VFMADDSUB231PD m512 zmm k zmm
// VFMADDSUB231PD m512 zmm zmm
// VFMADDSUB231PD zmm zmm k zmm
// VFMADDSUB231PD zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD(ops ...operand.Op) { ctx.VFMADDSUB231PD(ops...) }
// VFMADDSUB231PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PD.BCST m64 xmm k xmm
// VFMADDSUB231PD.BCST m64 xmm xmm
// VFMADDSUB231PD.BCST m64 ymm k ymm
// VFMADDSUB231PD.BCST m64 ymm ymm
// VFMADDSUB231PD.BCST m64 zmm k zmm
// VFMADDSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB231PD.BCST instruction to the active function.
func (c *Context) VFMADDSUB231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_BCST(ops...))
}
// VFMADDSUB231PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PD.BCST m64 xmm k xmm
// VFMADDSUB231PD.BCST m64 xmm xmm
// VFMADDSUB231PD.BCST m64 ymm k ymm
// VFMADDSUB231PD.BCST m64 ymm ymm
// VFMADDSUB231PD.BCST m64 zmm k zmm
// VFMADDSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFMADDSUB231PD.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_BCST(ops ...operand.Op) { ctx.VFMADDSUB231PD_BCST(ops...) }
// VFMADDSUB231PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.BCST.Z m64 xmm k xmm
// VFMADDSUB231PD.BCST.Z m64 ymm k ymm
// VFMADDSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB231PD.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB231PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.BCST.Z m64 xmm k xmm
// VFMADDSUB231PD.BCST.Z m64 ymm k ymm
// VFMADDSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMADDSUB231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB231PD_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB231PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE zmm zmm k zmm
// VFMADDSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RD_SAE(ops...))
}
// VFMADDSUB231PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE zmm zmm k zmm
// VFMADDSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PD_RD_SAE(ops...) }
// VFMADDSUB231PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PD_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE zmm zmm k zmm
// VFMADDSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RN_SAE(ops...))
}
// VFMADDSUB231PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE zmm zmm k zmm
// VFMADDSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PD_RN_SAE(ops...) }
// VFMADDSUB231PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PD_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE zmm zmm k zmm
// VFMADDSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RU_SAE(ops...))
}
// VFMADDSUB231PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE zmm zmm k zmm
// VFMADDSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PD_RU_SAE(ops...) }
// VFMADDSUB231PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PD_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RZ_SAE(ops...))
}
// VFMADDSUB231PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PD_RZ_SAE(ops...) }
// VFMADDSUB231PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.Z m128 xmm k xmm
// VFMADDSUB231PD.Z m256 ymm k ymm
// VFMADDSUB231PD.Z xmm xmm k xmm
// VFMADDSUB231PD.Z ymm ymm k ymm
// VFMADDSUB231PD.Z m512 zmm k zmm
// VFMADDSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.Z instruction to the active function.
func (c *Context) VFMADDSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PD_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB231PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.Z m128 xmm k xmm
// VFMADDSUB231PD.Z m256 ymm k ymm
// VFMADDSUB231PD.Z xmm xmm k xmm
// VFMADDSUB231PD.Z ymm ymm k ymm
// VFMADDSUB231PD.Z m512 zmm k zmm
// VFMADDSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PD.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB231PD_Z(mxyz, xyz, k, xyz1) }
// VFMADDSUB231PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PS m128 xmm xmm
// VFMADDSUB231PS m256 ymm ymm
// VFMADDSUB231PS xmm xmm xmm
// VFMADDSUB231PS ymm ymm ymm
// VFMADDSUB231PS m128 xmm k xmm
// VFMADDSUB231PS m256 ymm k ymm
// VFMADDSUB231PS xmm xmm k xmm
// VFMADDSUB231PS ymm ymm k ymm
// VFMADDSUB231PS m512 zmm k zmm
// VFMADDSUB231PS m512 zmm zmm
// VFMADDSUB231PS zmm zmm k zmm
// VFMADDSUB231PS zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS instruction to the active function.
func (c *Context) VFMADDSUB231PS(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS(ops...))
}
// VFMADDSUB231PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PS m128 xmm xmm
// VFMADDSUB231PS m256 ymm ymm
// VFMADDSUB231PS xmm xmm xmm
// VFMADDSUB231PS ymm ymm ymm
// VFMADDSUB231PS m128 xmm k xmm
// VFMADDSUB231PS m256 ymm k ymm
// VFMADDSUB231PS xmm xmm k xmm
// VFMADDSUB231PS ymm ymm k ymm
// VFMADDSUB231PS m512 zmm k zmm
// VFMADDSUB231PS m512 zmm zmm
// VFMADDSUB231PS zmm zmm k zmm
// VFMADDSUB231PS zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS(ops ...operand.Op) { ctx.VFMADDSUB231PS(ops...) }
// VFMADDSUB231PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PS.BCST m32 xmm k xmm
// VFMADDSUB231PS.BCST m32 xmm xmm
// VFMADDSUB231PS.BCST m32 ymm k ymm
// VFMADDSUB231PS.BCST m32 ymm ymm
// VFMADDSUB231PS.BCST m32 zmm k zmm
// VFMADDSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB231PS.BCST instruction to the active function.
func (c *Context) VFMADDSUB231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_BCST(ops...))
}
// VFMADDSUB231PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PS.BCST m32 xmm k xmm
// VFMADDSUB231PS.BCST m32 xmm xmm
// VFMADDSUB231PS.BCST m32 ymm k ymm
// VFMADDSUB231PS.BCST m32 ymm ymm
// VFMADDSUB231PS.BCST m32 zmm k zmm
// VFMADDSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFMADDSUB231PS.BCST instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_BCST(ops ...operand.Op) { ctx.VFMADDSUB231PS_BCST(ops...) }
// VFMADDSUB231PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.BCST.Z m32 xmm k xmm
// VFMADDSUB231PS.BCST.Z m32 ymm k ymm
// VFMADDSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB231PS.BCST.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMADDSUB231PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.BCST.Z m32 xmm k xmm
// VFMADDSUB231PS.BCST.Z m32 ymm k ymm
// VFMADDSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMADDSUB231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB231PS_BCST_Z(m, xyz, k, xyz1) }
// VFMADDSUB231PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE zmm zmm k zmm
// VFMADDSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RD_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RD_SAE(ops...))
}
// VFMADDSUB231PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE zmm zmm k zmm
// VFMADDSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RD_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PS_RD_SAE(ops...) }
// VFMADDSUB231PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PS_RD_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE zmm zmm k zmm
// VFMADDSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RN_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RN_SAE(ops...))
}
// VFMADDSUB231PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE zmm zmm k zmm
// VFMADDSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RN_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PS_RN_SAE(ops...) }
// VFMADDSUB231PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PS_RN_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE zmm zmm k zmm
// VFMADDSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RU_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RU_SAE(ops...))
}
// VFMADDSUB231PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE zmm zmm k zmm
// VFMADDSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RU_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PS_RU_SAE(ops...) }
// VFMADDSUB231PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PS_RU_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RZ_SAE instruction to the active function.
func (c *Context) VFMADDSUB231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RZ_SAE(ops...))
}
// VFMADDSUB231PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMADDSUB231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RZ_SAE(ops ...operand.Op) { ctx.VFMADDSUB231PS_RZ_SAE(ops...) }
// VFMADDSUB231PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMADDSUB231PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMADDSUB231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMADDSUB231PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.Z m128 xmm k xmm
// VFMADDSUB231PS.Z m256 ymm k ymm
// VFMADDSUB231PS.Z xmm xmm k xmm
// VFMADDSUB231PS.Z ymm ymm k ymm
// VFMADDSUB231PS.Z m512 zmm k zmm
// VFMADDSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.Z instruction to the active function.
func (c *Context) VFMADDSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMADDSUB231PS_Z(mxyz, xyz, k, xyz1))
}
// VFMADDSUB231PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.Z m128 xmm k xmm
// VFMADDSUB231PS.Z m256 ymm k ymm
// VFMADDSUB231PS.Z xmm xmm k xmm
// VFMADDSUB231PS.Z ymm ymm k ymm
// VFMADDSUB231PS.Z m512 zmm k zmm
// VFMADDSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFMADDSUB231PS.Z instruction to the active function.
// Operates on the global context.
func VFMADDSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMADDSUB231PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUB132PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PD m128 xmm xmm
// VFMSUB132PD m256 ymm ymm
// VFMSUB132PD xmm xmm xmm
// VFMSUB132PD ymm ymm ymm
// VFMSUB132PD m128 xmm k xmm
// VFMSUB132PD m256 ymm k ymm
// VFMSUB132PD xmm xmm k xmm
// VFMSUB132PD ymm ymm k ymm
// VFMSUB132PD m512 zmm k zmm
// VFMSUB132PD m512 zmm zmm
// VFMSUB132PD zmm zmm k zmm
// VFMSUB132PD zmm zmm zmm
//
// Construct and append a VFMSUB132PD instruction to the active function.
func (c *Context) VFMSUB132PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD(ops...))
}
// VFMSUB132PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PD m128 xmm xmm
// VFMSUB132PD m256 ymm ymm
// VFMSUB132PD xmm xmm xmm
// VFMSUB132PD ymm ymm ymm
// VFMSUB132PD m128 xmm k xmm
// VFMSUB132PD m256 ymm k ymm
// VFMSUB132PD xmm xmm k xmm
// VFMSUB132PD ymm ymm k ymm
// VFMSUB132PD m512 zmm k zmm
// VFMSUB132PD m512 zmm zmm
// VFMSUB132PD zmm zmm k zmm
// VFMSUB132PD zmm zmm zmm
//
// Construct and append a VFMSUB132PD instruction to the active function.
// Operates on the global context.
func VFMSUB132PD(ops ...operand.Op) { ctx.VFMSUB132PD(ops...) }
// VFMSUB132PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PD.BCST m64 xmm k xmm
// VFMSUB132PD.BCST m64 xmm xmm
// VFMSUB132PD.BCST m64 ymm k ymm
// VFMSUB132PD.BCST m64 ymm ymm
// VFMSUB132PD.BCST m64 zmm k zmm
// VFMSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB132PD.BCST instruction to the active function.
func (c *Context) VFMSUB132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD_BCST(ops...))
}
// VFMSUB132PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PD.BCST m64 xmm k xmm
// VFMSUB132PD.BCST m64 xmm xmm
// VFMSUB132PD.BCST m64 ymm k ymm
// VFMSUB132PD.BCST m64 ymm ymm
// VFMSUB132PD.BCST m64 zmm k zmm
// VFMSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB132PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_BCST(ops ...operand.Op) { ctx.VFMSUB132PD_BCST(ops...) }
// VFMSUB132PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.BCST.Z m64 xmm k xmm
// VFMSUB132PD.BCST.Z m64 ymm k ymm
// VFMSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB132PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB132PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.BCST.Z m64 xmm k xmm
// VFMSUB132PD.BCST.Z m64 ymm k ymm
// VFMSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB132PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB132PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PD.RD_SAE zmm zmm k zmm
// VFMSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RD_SAE(ops...))
}
// VFMSUB132PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PD.RD_SAE zmm zmm k zmm
// VFMSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB132PD_RD_SAE(ops...) }
// VFMSUB132PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB132PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PD.RN_SAE zmm zmm k zmm
// VFMSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RN_SAE(ops...))
}
// VFMSUB132PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PD.RN_SAE zmm zmm k zmm
// VFMSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB132PD_RN_SAE(ops...) }
// VFMSUB132PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB132PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PD.RU_SAE zmm zmm k zmm
// VFMSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RU_SAE(ops...))
}
// VFMSUB132PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PD.RU_SAE zmm zmm k zmm
// VFMSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB132PD_RU_SAE(ops...) }
// VFMSUB132PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB132PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE zmm zmm k zmm
// VFMSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RZ_SAE(ops...))
}
// VFMSUB132PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE zmm zmm k zmm
// VFMSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB132PD_RZ_SAE(ops...) }
// VFMSUB132PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB132PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.Z m128 xmm k xmm
// VFMSUB132PD.Z m256 ymm k ymm
// VFMSUB132PD.Z xmm xmm k xmm
// VFMSUB132PD.Z ymm ymm k ymm
// VFMSUB132PD.Z m512 zmm k zmm
// VFMSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.Z instruction to the active function.
func (c *Context) VFMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB132PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB132PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.Z m128 xmm k xmm
// VFMSUB132PD.Z m256 ymm k ymm
// VFMSUB132PD.Z xmm xmm k xmm
// VFMSUB132PD.Z ymm ymm k ymm
// VFMSUB132PD.Z m512 zmm k zmm
// VFMSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB132PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUB132PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PS m128 xmm xmm
// VFMSUB132PS m256 ymm ymm
// VFMSUB132PS xmm xmm xmm
// VFMSUB132PS ymm ymm ymm
// VFMSUB132PS m128 xmm k xmm
// VFMSUB132PS m256 ymm k ymm
// VFMSUB132PS xmm xmm k xmm
// VFMSUB132PS ymm ymm k ymm
// VFMSUB132PS m512 zmm k zmm
// VFMSUB132PS m512 zmm zmm
// VFMSUB132PS zmm zmm k zmm
// VFMSUB132PS zmm zmm zmm
//
// Construct and append a VFMSUB132PS instruction to the active function.
func (c *Context) VFMSUB132PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS(ops...))
}
// VFMSUB132PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PS m128 xmm xmm
// VFMSUB132PS m256 ymm ymm
// VFMSUB132PS xmm xmm xmm
// VFMSUB132PS ymm ymm ymm
// VFMSUB132PS m128 xmm k xmm
// VFMSUB132PS m256 ymm k ymm
// VFMSUB132PS xmm xmm k xmm
// VFMSUB132PS ymm ymm k ymm
// VFMSUB132PS m512 zmm k zmm
// VFMSUB132PS m512 zmm zmm
// VFMSUB132PS zmm zmm k zmm
// VFMSUB132PS zmm zmm zmm
//
// Construct and append a VFMSUB132PS instruction to the active function.
// Operates on the global context.
func VFMSUB132PS(ops ...operand.Op) { ctx.VFMSUB132PS(ops...) }
// VFMSUB132PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PS.BCST m32 xmm k xmm
// VFMSUB132PS.BCST m32 xmm xmm
// VFMSUB132PS.BCST m32 ymm k ymm
// VFMSUB132PS.BCST m32 ymm ymm
// VFMSUB132PS.BCST m32 zmm k zmm
// VFMSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB132PS.BCST instruction to the active function.
func (c *Context) VFMSUB132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS_BCST(ops...))
}
// VFMSUB132PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PS.BCST m32 xmm k xmm
// VFMSUB132PS.BCST m32 xmm xmm
// VFMSUB132PS.BCST m32 ymm k ymm
// VFMSUB132PS.BCST m32 ymm ymm
// VFMSUB132PS.BCST m32 zmm k zmm
// VFMSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB132PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_BCST(ops ...operand.Op) { ctx.VFMSUB132PS_BCST(ops...) }
// VFMSUB132PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.BCST.Z m32 xmm k xmm
// VFMSUB132PS.BCST.Z m32 ymm k ymm
// VFMSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB132PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB132PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.BCST.Z m32 xmm k xmm
// VFMSUB132PS.BCST.Z m32 ymm k ymm
// VFMSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB132PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB132PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PS.RD_SAE zmm zmm k zmm
// VFMSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RD_SAE(ops...))
}
// VFMSUB132PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PS.RD_SAE zmm zmm k zmm
// VFMSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB132PS_RD_SAE(ops...) }
// VFMSUB132PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB132PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PS.RN_SAE zmm zmm k zmm
// VFMSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RN_SAE(ops...))
}
// VFMSUB132PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PS.RN_SAE zmm zmm k zmm
// VFMSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB132PS_RN_SAE(ops...) }
// VFMSUB132PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB132PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PS.RU_SAE zmm zmm k zmm
// VFMSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RU_SAE(ops...))
}
// VFMSUB132PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PS.RU_SAE zmm zmm k zmm
// VFMSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB132PS_RU_SAE(ops...) }
// VFMSUB132PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB132PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE zmm zmm k zmm
// VFMSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RZ_SAE(ops...))
}
// VFMSUB132PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE zmm zmm k zmm
// VFMSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB132PS_RZ_SAE(ops...) }
// VFMSUB132PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB132PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB132PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.Z m128 xmm k xmm
// VFMSUB132PS.Z m256 ymm k ymm
// VFMSUB132PS.Z xmm xmm k xmm
// VFMSUB132PS.Z ymm ymm k ymm
// VFMSUB132PS.Z m512 zmm k zmm
// VFMSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.Z instruction to the active function.
func (c *Context) VFMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB132PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB132PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.Z m128 xmm k xmm
// VFMSUB132PS.Z m256 ymm k ymm
// VFMSUB132PS.Z xmm xmm k xmm
// VFMSUB132PS.Z ymm ymm k ymm
// VFMSUB132PS.Z m512 zmm k zmm
// VFMSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB132PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB132PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUB132SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SD m64 xmm xmm
// VFMSUB132SD xmm xmm xmm
// VFMSUB132SD m64 xmm k xmm
// VFMSUB132SD xmm xmm k xmm
//
// Construct and append a VFMSUB132SD instruction to the active function.
func (c *Context) VFMSUB132SD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SD(ops...))
}
// VFMSUB132SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SD m64 xmm xmm
// VFMSUB132SD xmm xmm xmm
// VFMSUB132SD m64 xmm k xmm
// VFMSUB132SD xmm xmm k xmm
//
// Construct and append a VFMSUB132SD instruction to the active function.
// Operates on the global context.
func VFMSUB132SD(ops ...operand.Op) { ctx.VFMSUB132SD(ops...) }
// VFMSUB132SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SD.RD_SAE xmm xmm k xmm
// VFMSUB132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB132SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RD_SAE(ops...))
}
// VFMSUB132SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SD.RD_SAE xmm xmm k xmm
// VFMSUB132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB132SD_RD_SAE(ops...) }
// VFMSUB132SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SD_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB132SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SD.RN_SAE xmm xmm k xmm
// VFMSUB132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB132SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RN_SAE(ops...))
}
// VFMSUB132SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SD.RN_SAE xmm xmm k xmm
// VFMSUB132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB132SD_RN_SAE(ops...) }
// VFMSUB132SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SD_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB132SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SD.RU_SAE xmm xmm k xmm
// VFMSUB132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB132SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RU_SAE(ops...))
}
// VFMSUB132SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SD.RU_SAE xmm xmm k xmm
// VFMSUB132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB132SD_RU_SAE(ops...) }
// VFMSUB132SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SD_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB132SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE xmm xmm k xmm
// VFMSUB132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB132SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RZ_SAE(ops...))
}
// VFMSUB132SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE xmm xmm k xmm
// VFMSUB132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB132SD_RZ_SAE(ops...) }
// VFMSUB132SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB132SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.Z m64 xmm k xmm
// VFMSUB132SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.Z instruction to the active function.
func (c *Context) VFMSUB132SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB132SD_Z(mx, x, k, x1))
}
// VFMSUB132SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.Z m64 xmm k xmm
// VFMSUB132SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB132SD_Z(mx, x, k, x1) }
// VFMSUB132SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SS m32 xmm xmm
// VFMSUB132SS xmm xmm xmm
// VFMSUB132SS m32 xmm k xmm
// VFMSUB132SS xmm xmm k xmm
//
// Construct and append a VFMSUB132SS instruction to the active function.
func (c *Context) VFMSUB132SS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SS(ops...))
}
// VFMSUB132SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SS m32 xmm xmm
// VFMSUB132SS xmm xmm xmm
// VFMSUB132SS m32 xmm k xmm
// VFMSUB132SS xmm xmm k xmm
//
// Construct and append a VFMSUB132SS instruction to the active function.
// Operates on the global context.
func VFMSUB132SS(ops ...operand.Op) { ctx.VFMSUB132SS(ops...) }
// VFMSUB132SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SS.RD_SAE xmm xmm k xmm
// VFMSUB132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB132SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RD_SAE(ops...))
}
// VFMSUB132SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SS.RD_SAE xmm xmm k xmm
// VFMSUB132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB132SS_RD_SAE(ops...) }
// VFMSUB132SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SS_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB132SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SS.RN_SAE xmm xmm k xmm
// VFMSUB132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB132SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RN_SAE(ops...))
}
// VFMSUB132SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SS.RN_SAE xmm xmm k xmm
// VFMSUB132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB132SS_RN_SAE(ops...) }
// VFMSUB132SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SS_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB132SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SS.RU_SAE xmm xmm k xmm
// VFMSUB132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB132SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RU_SAE(ops...))
}
// VFMSUB132SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SS.RU_SAE xmm xmm k xmm
// VFMSUB132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB132SS_RU_SAE(ops...) }
// VFMSUB132SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SS_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB132SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE xmm xmm k xmm
// VFMSUB132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB132SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RZ_SAE(ops...))
}
// VFMSUB132SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE xmm xmm k xmm
// VFMSUB132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB132SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB132SS_RZ_SAE(ops...) }
// VFMSUB132SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB132SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB132SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB132SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB132SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.Z m32 xmm k xmm
// VFMSUB132SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.Z instruction to the active function.
func (c *Context) VFMSUB132SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB132SS_Z(mx, x, k, x1))
}
// VFMSUB132SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.Z m32 xmm k xmm
// VFMSUB132SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB132SS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB132SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB132SS_Z(mx, x, k, x1) }
// VFMSUB213PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PD m128 xmm xmm
// VFMSUB213PD m256 ymm ymm
// VFMSUB213PD xmm xmm xmm
// VFMSUB213PD ymm ymm ymm
// VFMSUB213PD m128 xmm k xmm
// VFMSUB213PD m256 ymm k ymm
// VFMSUB213PD xmm xmm k xmm
// VFMSUB213PD ymm ymm k ymm
// VFMSUB213PD m512 zmm k zmm
// VFMSUB213PD m512 zmm zmm
// VFMSUB213PD zmm zmm k zmm
// VFMSUB213PD zmm zmm zmm
//
// Construct and append a VFMSUB213PD instruction to the active function.
func (c *Context) VFMSUB213PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD(ops...))
}
// VFMSUB213PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PD m128 xmm xmm
// VFMSUB213PD m256 ymm ymm
// VFMSUB213PD xmm xmm xmm
// VFMSUB213PD ymm ymm ymm
// VFMSUB213PD m128 xmm k xmm
// VFMSUB213PD m256 ymm k ymm
// VFMSUB213PD xmm xmm k xmm
// VFMSUB213PD ymm ymm k ymm
// VFMSUB213PD m512 zmm k zmm
// VFMSUB213PD m512 zmm zmm
// VFMSUB213PD zmm zmm k zmm
// VFMSUB213PD zmm zmm zmm
//
// Construct and append a VFMSUB213PD instruction to the active function.
// Operates on the global context.
func VFMSUB213PD(ops ...operand.Op) { ctx.VFMSUB213PD(ops...) }
// VFMSUB213PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PD.BCST m64 xmm k xmm
// VFMSUB213PD.BCST m64 xmm xmm
// VFMSUB213PD.BCST m64 ymm k ymm
// VFMSUB213PD.BCST m64 ymm ymm
// VFMSUB213PD.BCST m64 zmm k zmm
// VFMSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB213PD.BCST instruction to the active function.
func (c *Context) VFMSUB213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD_BCST(ops...))
}
// VFMSUB213PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PD.BCST m64 xmm k xmm
// VFMSUB213PD.BCST m64 xmm xmm
// VFMSUB213PD.BCST m64 ymm k ymm
// VFMSUB213PD.BCST m64 ymm ymm
// VFMSUB213PD.BCST m64 zmm k zmm
// VFMSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB213PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_BCST(ops ...operand.Op) { ctx.VFMSUB213PD_BCST(ops...) }
// VFMSUB213PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.BCST.Z m64 xmm k xmm
// VFMSUB213PD.BCST.Z m64 ymm k ymm
// VFMSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB213PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB213PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.BCST.Z m64 xmm k xmm
// VFMSUB213PD.BCST.Z m64 ymm k ymm
// VFMSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB213PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB213PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PD.RD_SAE zmm zmm k zmm
// VFMSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RD_SAE(ops...))
}
// VFMSUB213PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PD.RD_SAE zmm zmm k zmm
// VFMSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB213PD_RD_SAE(ops...) }
// VFMSUB213PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB213PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PD.RN_SAE zmm zmm k zmm
// VFMSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RN_SAE(ops...))
}
// VFMSUB213PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PD.RN_SAE zmm zmm k zmm
// VFMSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB213PD_RN_SAE(ops...) }
// VFMSUB213PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB213PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PD.RU_SAE zmm zmm k zmm
// VFMSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RU_SAE(ops...))
}
// VFMSUB213PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PD.RU_SAE zmm zmm k zmm
// VFMSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB213PD_RU_SAE(ops...) }
// VFMSUB213PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB213PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE zmm zmm k zmm
// VFMSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RZ_SAE(ops...))
}
// VFMSUB213PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE zmm zmm k zmm
// VFMSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB213PD_RZ_SAE(ops...) }
// VFMSUB213PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB213PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.Z m128 xmm k xmm
// VFMSUB213PD.Z m256 ymm k ymm
// VFMSUB213PD.Z xmm xmm k xmm
// VFMSUB213PD.Z ymm ymm k ymm
// VFMSUB213PD.Z m512 zmm k zmm
// VFMSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.Z instruction to the active function.
func (c *Context) VFMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB213PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB213PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.Z m128 xmm k xmm
// VFMSUB213PD.Z m256 ymm k ymm
// VFMSUB213PD.Z xmm xmm k xmm
// VFMSUB213PD.Z ymm ymm k ymm
// VFMSUB213PD.Z m512 zmm k zmm
// VFMSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB213PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUB213PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PS m128 xmm xmm
// VFMSUB213PS m256 ymm ymm
// VFMSUB213PS xmm xmm xmm
// VFMSUB213PS ymm ymm ymm
// VFMSUB213PS m128 xmm k xmm
// VFMSUB213PS m256 ymm k ymm
// VFMSUB213PS xmm xmm k xmm
// VFMSUB213PS ymm ymm k ymm
// VFMSUB213PS m512 zmm k zmm
// VFMSUB213PS m512 zmm zmm
// VFMSUB213PS zmm zmm k zmm
// VFMSUB213PS zmm zmm zmm
//
// Construct and append a VFMSUB213PS instruction to the active function.
func (c *Context) VFMSUB213PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS(ops...))
}
// VFMSUB213PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PS m128 xmm xmm
// VFMSUB213PS m256 ymm ymm
// VFMSUB213PS xmm xmm xmm
// VFMSUB213PS ymm ymm ymm
// VFMSUB213PS m128 xmm k xmm
// VFMSUB213PS m256 ymm k ymm
// VFMSUB213PS xmm xmm k xmm
// VFMSUB213PS ymm ymm k ymm
// VFMSUB213PS m512 zmm k zmm
// VFMSUB213PS m512 zmm zmm
// VFMSUB213PS zmm zmm k zmm
// VFMSUB213PS zmm zmm zmm
//
// Construct and append a VFMSUB213PS instruction to the active function.
// Operates on the global context.
func VFMSUB213PS(ops ...operand.Op) { ctx.VFMSUB213PS(ops...) }
// VFMSUB213PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PS.BCST m32 xmm k xmm
// VFMSUB213PS.BCST m32 xmm xmm
// VFMSUB213PS.BCST m32 ymm k ymm
// VFMSUB213PS.BCST m32 ymm ymm
// VFMSUB213PS.BCST m32 zmm k zmm
// VFMSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB213PS.BCST instruction to the active function.
func (c *Context) VFMSUB213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS_BCST(ops...))
}
// VFMSUB213PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PS.BCST m32 xmm k xmm
// VFMSUB213PS.BCST m32 xmm xmm
// VFMSUB213PS.BCST m32 ymm k ymm
// VFMSUB213PS.BCST m32 ymm ymm
// VFMSUB213PS.BCST m32 zmm k zmm
// VFMSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB213PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_BCST(ops ...operand.Op) { ctx.VFMSUB213PS_BCST(ops...) }
// VFMSUB213PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.BCST.Z m32 xmm k xmm
// VFMSUB213PS.BCST.Z m32 ymm k ymm
// VFMSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB213PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB213PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.BCST.Z m32 xmm k xmm
// VFMSUB213PS.BCST.Z m32 ymm k ymm
// VFMSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB213PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB213PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PS.RD_SAE zmm zmm k zmm
// VFMSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RD_SAE(ops...))
}
// VFMSUB213PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PS.RD_SAE zmm zmm k zmm
// VFMSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB213PS_RD_SAE(ops...) }
// VFMSUB213PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB213PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PS.RN_SAE zmm zmm k zmm
// VFMSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RN_SAE(ops...))
}
// VFMSUB213PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PS.RN_SAE zmm zmm k zmm
// VFMSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB213PS_RN_SAE(ops...) }
// VFMSUB213PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB213PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PS.RU_SAE zmm zmm k zmm
// VFMSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RU_SAE(ops...))
}
// VFMSUB213PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PS.RU_SAE zmm zmm k zmm
// VFMSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB213PS_RU_SAE(ops...) }
// VFMSUB213PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB213PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE zmm zmm k zmm
// VFMSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RZ_SAE(ops...))
}
// VFMSUB213PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE zmm zmm k zmm
// VFMSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB213PS_RZ_SAE(ops...) }
// VFMSUB213PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB213PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB213PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.Z m128 xmm k xmm
// VFMSUB213PS.Z m256 ymm k ymm
// VFMSUB213PS.Z xmm xmm k xmm
// VFMSUB213PS.Z ymm ymm k ymm
// VFMSUB213PS.Z m512 zmm k zmm
// VFMSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.Z instruction to the active function.
func (c *Context) VFMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB213PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB213PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.Z m128 xmm k xmm
// VFMSUB213PS.Z m256 ymm k ymm
// VFMSUB213PS.Z xmm xmm k xmm
// VFMSUB213PS.Z ymm ymm k ymm
// VFMSUB213PS.Z m512 zmm k zmm
// VFMSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB213PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB213PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUB213SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SD m64 xmm xmm
// VFMSUB213SD xmm xmm xmm
// VFMSUB213SD m64 xmm k xmm
// VFMSUB213SD xmm xmm k xmm
//
// Construct and append a VFMSUB213SD instruction to the active function.
func (c *Context) VFMSUB213SD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SD(ops...))
}
// VFMSUB213SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SD m64 xmm xmm
// VFMSUB213SD xmm xmm xmm
// VFMSUB213SD m64 xmm k xmm
// VFMSUB213SD xmm xmm k xmm
//
// Construct and append a VFMSUB213SD instruction to the active function.
// Operates on the global context.
func VFMSUB213SD(ops ...operand.Op) { ctx.VFMSUB213SD(ops...) }
// VFMSUB213SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SD.RD_SAE xmm xmm k xmm
// VFMSUB213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB213SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RD_SAE(ops...))
}
// VFMSUB213SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SD.RD_SAE xmm xmm k xmm
// VFMSUB213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB213SD_RD_SAE(ops...) }
// VFMSUB213SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SD_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB213SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SD.RN_SAE xmm xmm k xmm
// VFMSUB213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB213SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RN_SAE(ops...))
}
// VFMSUB213SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SD.RN_SAE xmm xmm k xmm
// VFMSUB213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB213SD_RN_SAE(ops...) }
// VFMSUB213SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SD_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB213SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SD.RU_SAE xmm xmm k xmm
// VFMSUB213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB213SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RU_SAE(ops...))
}
// VFMSUB213SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SD.RU_SAE xmm xmm k xmm
// VFMSUB213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB213SD_RU_SAE(ops...) }
// VFMSUB213SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SD_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB213SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE xmm xmm k xmm
// VFMSUB213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB213SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RZ_SAE(ops...))
}
// VFMSUB213SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE xmm xmm k xmm
// VFMSUB213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB213SD_RZ_SAE(ops...) }
// VFMSUB213SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB213SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.Z m64 xmm k xmm
// VFMSUB213SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.Z instruction to the active function.
func (c *Context) VFMSUB213SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB213SD_Z(mx, x, k, x1))
}
// VFMSUB213SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.Z m64 xmm k xmm
// VFMSUB213SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB213SD_Z(mx, x, k, x1) }
// VFMSUB213SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SS m32 xmm xmm
// VFMSUB213SS xmm xmm xmm
// VFMSUB213SS m32 xmm k xmm
// VFMSUB213SS xmm xmm k xmm
//
// Construct and append a VFMSUB213SS instruction to the active function.
func (c *Context) VFMSUB213SS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SS(ops...))
}
// VFMSUB213SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SS m32 xmm xmm
// VFMSUB213SS xmm xmm xmm
// VFMSUB213SS m32 xmm k xmm
// VFMSUB213SS xmm xmm k xmm
//
// Construct and append a VFMSUB213SS instruction to the active function.
// Operates on the global context.
func VFMSUB213SS(ops ...operand.Op) { ctx.VFMSUB213SS(ops...) }
// VFMSUB213SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SS.RD_SAE xmm xmm k xmm
// VFMSUB213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB213SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RD_SAE(ops...))
}
// VFMSUB213SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SS.RD_SAE xmm xmm k xmm
// VFMSUB213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB213SS_RD_SAE(ops...) }
// VFMSUB213SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SS_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB213SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SS.RN_SAE xmm xmm k xmm
// VFMSUB213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB213SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RN_SAE(ops...))
}
// VFMSUB213SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SS.RN_SAE xmm xmm k xmm
// VFMSUB213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB213SS_RN_SAE(ops...) }
// VFMSUB213SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SS_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB213SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SS.RU_SAE xmm xmm k xmm
// VFMSUB213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB213SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RU_SAE(ops...))
}
// VFMSUB213SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SS.RU_SAE xmm xmm k xmm
// VFMSUB213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB213SS_RU_SAE(ops...) }
// VFMSUB213SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SS_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB213SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE xmm xmm k xmm
// VFMSUB213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB213SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RZ_SAE(ops...))
}
// VFMSUB213SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE xmm xmm k xmm
// VFMSUB213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB213SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB213SS_RZ_SAE(ops...) }
// VFMSUB213SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB213SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB213SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB213SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB213SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.Z m32 xmm k xmm
// VFMSUB213SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.Z instruction to the active function.
func (c *Context) VFMSUB213SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB213SS_Z(mx, x, k, x1))
}
// VFMSUB213SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.Z m32 xmm k xmm
// VFMSUB213SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB213SS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB213SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB213SS_Z(mx, x, k, x1) }
// VFMSUB231PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PD m128 xmm xmm
// VFMSUB231PD m256 ymm ymm
// VFMSUB231PD xmm xmm xmm
// VFMSUB231PD ymm ymm ymm
// VFMSUB231PD m128 xmm k xmm
// VFMSUB231PD m256 ymm k ymm
// VFMSUB231PD xmm xmm k xmm
// VFMSUB231PD ymm ymm k ymm
// VFMSUB231PD m512 zmm k zmm
// VFMSUB231PD m512 zmm zmm
// VFMSUB231PD zmm zmm k zmm
// VFMSUB231PD zmm zmm zmm
//
// Construct and append a VFMSUB231PD instruction to the active function.
func (c *Context) VFMSUB231PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD(ops...))
}
// VFMSUB231PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PD m128 xmm xmm
// VFMSUB231PD m256 ymm ymm
// VFMSUB231PD xmm xmm xmm
// VFMSUB231PD ymm ymm ymm
// VFMSUB231PD m128 xmm k xmm
// VFMSUB231PD m256 ymm k ymm
// VFMSUB231PD xmm xmm k xmm
// VFMSUB231PD ymm ymm k ymm
// VFMSUB231PD m512 zmm k zmm
// VFMSUB231PD m512 zmm zmm
// VFMSUB231PD zmm zmm k zmm
// VFMSUB231PD zmm zmm zmm
//
// Construct and append a VFMSUB231PD instruction to the active function.
// Operates on the global context.
func VFMSUB231PD(ops ...operand.Op) { ctx.VFMSUB231PD(ops...) }
// VFMSUB231PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PD.BCST m64 xmm k xmm
// VFMSUB231PD.BCST m64 xmm xmm
// VFMSUB231PD.BCST m64 ymm k ymm
// VFMSUB231PD.BCST m64 ymm ymm
// VFMSUB231PD.BCST m64 zmm k zmm
// VFMSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB231PD.BCST instruction to the active function.
func (c *Context) VFMSUB231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD_BCST(ops...))
}
// VFMSUB231PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PD.BCST m64 xmm k xmm
// VFMSUB231PD.BCST m64 xmm xmm
// VFMSUB231PD.BCST m64 ymm k ymm
// VFMSUB231PD.BCST m64 ymm ymm
// VFMSUB231PD.BCST m64 zmm k zmm
// VFMSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUB231PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_BCST(ops ...operand.Op) { ctx.VFMSUB231PD_BCST(ops...) }
// VFMSUB231PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.BCST.Z m64 xmm k xmm
// VFMSUB231PD.BCST.Z m64 ymm k ymm
// VFMSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB231PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB231PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.BCST.Z m64 xmm k xmm
// VFMSUB231PD.BCST.Z m64 ymm k ymm
// VFMSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUB231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB231PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB231PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PD.RD_SAE zmm zmm k zmm
// VFMSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RD_SAE(ops...))
}
// VFMSUB231PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PD.RD_SAE zmm zmm k zmm
// VFMSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB231PD_RD_SAE(ops...) }
// VFMSUB231PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB231PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PD.RN_SAE zmm zmm k zmm
// VFMSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RN_SAE(ops...))
}
// VFMSUB231PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PD.RN_SAE zmm zmm k zmm
// VFMSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB231PD_RN_SAE(ops...) }
// VFMSUB231PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB231PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PD.RU_SAE zmm zmm k zmm
// VFMSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RU_SAE(ops...))
}
// VFMSUB231PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PD.RU_SAE zmm zmm k zmm
// VFMSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB231PD_RU_SAE(ops...) }
// VFMSUB231PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB231PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE zmm zmm k zmm
// VFMSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RZ_SAE(ops...))
}
// VFMSUB231PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE zmm zmm k zmm
// VFMSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB231PD_RZ_SAE(ops...) }
// VFMSUB231PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB231PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.Z m128 xmm k xmm
// VFMSUB231PD.Z m256 ymm k ymm
// VFMSUB231PD.Z xmm xmm k xmm
// VFMSUB231PD.Z ymm ymm k ymm
// VFMSUB231PD.Z m512 zmm k zmm
// VFMSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.Z instruction to the active function.
func (c *Context) VFMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB231PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB231PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.Z m128 xmm k xmm
// VFMSUB231PD.Z m256 ymm k ymm
// VFMSUB231PD.Z xmm xmm k xmm
// VFMSUB231PD.Z ymm ymm k ymm
// VFMSUB231PD.Z m512 zmm k zmm
// VFMSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB231PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUB231PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PS m128 xmm xmm
// VFMSUB231PS m256 ymm ymm
// VFMSUB231PS xmm xmm xmm
// VFMSUB231PS ymm ymm ymm
// VFMSUB231PS m128 xmm k xmm
// VFMSUB231PS m256 ymm k ymm
// VFMSUB231PS xmm xmm k xmm
// VFMSUB231PS ymm ymm k ymm
// VFMSUB231PS m512 zmm k zmm
// VFMSUB231PS m512 zmm zmm
// VFMSUB231PS zmm zmm k zmm
// VFMSUB231PS zmm zmm zmm
//
// Construct and append a VFMSUB231PS instruction to the active function.
func (c *Context) VFMSUB231PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS(ops...))
}
// VFMSUB231PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PS m128 xmm xmm
// VFMSUB231PS m256 ymm ymm
// VFMSUB231PS xmm xmm xmm
// VFMSUB231PS ymm ymm ymm
// VFMSUB231PS m128 xmm k xmm
// VFMSUB231PS m256 ymm k ymm
// VFMSUB231PS xmm xmm k xmm
// VFMSUB231PS ymm ymm k ymm
// VFMSUB231PS m512 zmm k zmm
// VFMSUB231PS m512 zmm zmm
// VFMSUB231PS zmm zmm k zmm
// VFMSUB231PS zmm zmm zmm
//
// Construct and append a VFMSUB231PS instruction to the active function.
// Operates on the global context.
func VFMSUB231PS(ops ...operand.Op) { ctx.VFMSUB231PS(ops...) }
// VFMSUB231PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PS.BCST m32 xmm k xmm
// VFMSUB231PS.BCST m32 xmm xmm
// VFMSUB231PS.BCST m32 ymm k ymm
// VFMSUB231PS.BCST m32 ymm ymm
// VFMSUB231PS.BCST m32 zmm k zmm
// VFMSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB231PS.BCST instruction to the active function.
func (c *Context) VFMSUB231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS_BCST(ops...))
}
// VFMSUB231PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PS.BCST m32 xmm k xmm
// VFMSUB231PS.BCST m32 xmm xmm
// VFMSUB231PS.BCST m32 ymm k ymm
// VFMSUB231PS.BCST m32 ymm ymm
// VFMSUB231PS.BCST m32 zmm k zmm
// VFMSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUB231PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_BCST(ops ...operand.Op) { ctx.VFMSUB231PS_BCST(ops...) }
// VFMSUB231PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.BCST.Z m32 xmm k xmm
// VFMSUB231PS.BCST.Z m32 ymm k ymm
// VFMSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB231PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUB231PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.BCST.Z m32 xmm k xmm
// VFMSUB231PS.BCST.Z m32 ymm k ymm
// VFMSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUB231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUB231PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUB231PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PS.RD_SAE zmm zmm k zmm
// VFMSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RD_SAE(ops...))
}
// VFMSUB231PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PS.RD_SAE zmm zmm k zmm
// VFMSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB231PS_RD_SAE(ops...) }
// VFMSUB231PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUB231PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PS.RN_SAE zmm zmm k zmm
// VFMSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RN_SAE(ops...))
}
// VFMSUB231PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PS.RN_SAE zmm zmm k zmm
// VFMSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB231PS_RN_SAE(ops...) }
// VFMSUB231PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUB231PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PS.RU_SAE zmm zmm k zmm
// VFMSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RU_SAE(ops...))
}
// VFMSUB231PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PS.RU_SAE zmm zmm k zmm
// VFMSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB231PS_RU_SAE(ops...) }
// VFMSUB231PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUB231PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE zmm zmm k zmm
// VFMSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RZ_SAE(ops...))
}
// VFMSUB231PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE zmm zmm k zmm
// VFMSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUB231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB231PS_RZ_SAE(ops...) }
// VFMSUB231PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUB231PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUB231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUB231PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.Z m128 xmm k xmm
// VFMSUB231PS.Z m256 ymm k ymm
// VFMSUB231PS.Z xmm xmm k xmm
// VFMSUB231PS.Z ymm ymm k ymm
// VFMSUB231PS.Z m512 zmm k zmm
// VFMSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.Z instruction to the active function.
func (c *Context) VFMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUB231PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUB231PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.Z m128 xmm k xmm
// VFMSUB231PS.Z m256 ymm k ymm
// VFMSUB231PS.Z xmm xmm k xmm
// VFMSUB231PS.Z ymm ymm k ymm
// VFMSUB231PS.Z m512 zmm k zmm
// VFMSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUB231PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUB231PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUB231SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SD m64 xmm xmm
// VFMSUB231SD xmm xmm xmm
// VFMSUB231SD m64 xmm k xmm
// VFMSUB231SD xmm xmm k xmm
//
// Construct and append a VFMSUB231SD instruction to the active function.
func (c *Context) VFMSUB231SD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SD(ops...))
}
// VFMSUB231SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SD m64 xmm xmm
// VFMSUB231SD xmm xmm xmm
// VFMSUB231SD m64 xmm k xmm
// VFMSUB231SD xmm xmm k xmm
//
// Construct and append a VFMSUB231SD instruction to the active function.
// Operates on the global context.
func VFMSUB231SD(ops ...operand.Op) { ctx.VFMSUB231SD(ops...) }
// VFMSUB231SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SD.RD_SAE xmm xmm k xmm
// VFMSUB231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RD_SAE instruction to the active function.
func (c *Context) VFMSUB231SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RD_SAE(ops...))
}
// VFMSUB231SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SD.RD_SAE xmm xmm k xmm
// VFMSUB231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RD_SAE(ops ...operand.Op) { ctx.VFMSUB231SD_RD_SAE(ops...) }
// VFMSUB231SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SD_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB231SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SD.RN_SAE xmm xmm k xmm
// VFMSUB231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RN_SAE instruction to the active function.
func (c *Context) VFMSUB231SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RN_SAE(ops...))
}
// VFMSUB231SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SD.RN_SAE xmm xmm k xmm
// VFMSUB231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RN_SAE(ops ...operand.Op) { ctx.VFMSUB231SD_RN_SAE(ops...) }
// VFMSUB231SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SD_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB231SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SD.RU_SAE xmm xmm k xmm
// VFMSUB231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RU_SAE instruction to the active function.
func (c *Context) VFMSUB231SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RU_SAE(ops...))
}
// VFMSUB231SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SD.RU_SAE xmm xmm k xmm
// VFMSUB231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RU_SAE(ops ...operand.Op) { ctx.VFMSUB231SD_RU_SAE(ops...) }
// VFMSUB231SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SD_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB231SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE xmm xmm k xmm
// VFMSUB231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB231SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RZ_SAE(ops...))
}
// VFMSUB231SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE xmm xmm k xmm
// VFMSUB231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB231SD_RZ_SAE(ops...) }
// VFMSUB231SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SD_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB231SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.Z m64 xmm k xmm
// VFMSUB231SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.Z instruction to the active function.
func (c *Context) VFMSUB231SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB231SD_Z(mx, x, k, x1))
}
// VFMSUB231SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.Z m64 xmm k xmm
// VFMSUB231SD.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SD.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SD_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB231SD_Z(mx, x, k, x1) }
// VFMSUB231SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SS m32 xmm xmm
// VFMSUB231SS xmm xmm xmm
// VFMSUB231SS m32 xmm k xmm
// VFMSUB231SS xmm xmm k xmm
//
// Construct and append a VFMSUB231SS instruction to the active function.
func (c *Context) VFMSUB231SS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SS(ops...))
}
// VFMSUB231SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SS m32 xmm xmm
// VFMSUB231SS xmm xmm xmm
// VFMSUB231SS m32 xmm k xmm
// VFMSUB231SS xmm xmm k xmm
//
// Construct and append a VFMSUB231SS instruction to the active function.
// Operates on the global context.
func VFMSUB231SS(ops ...operand.Op) { ctx.VFMSUB231SS(ops...) }
// VFMSUB231SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SS.RD_SAE xmm xmm k xmm
// VFMSUB231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RD_SAE instruction to the active function.
func (c *Context) VFMSUB231SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RD_SAE(ops...))
}
// VFMSUB231SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SS.RD_SAE xmm xmm k xmm
// VFMSUB231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RD_SAE(ops ...operand.Op) { ctx.VFMSUB231SS_RD_SAE(ops...) }
// VFMSUB231SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RD_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SS_RD_SAE_Z(x, x1, k, x2) }
// VFMSUB231SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SS.RN_SAE xmm xmm k xmm
// VFMSUB231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RN_SAE instruction to the active function.
func (c *Context) VFMSUB231SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RN_SAE(ops...))
}
// VFMSUB231SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SS.RN_SAE xmm xmm k xmm
// VFMSUB231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RN_SAE(ops ...operand.Op) { ctx.VFMSUB231SS_RN_SAE(ops...) }
// VFMSUB231SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RN_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SS_RN_SAE_Z(x, x1, k, x2) }
// VFMSUB231SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SS.RU_SAE xmm xmm k xmm
// VFMSUB231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RU_SAE instruction to the active function.
func (c *Context) VFMSUB231SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RU_SAE(ops...))
}
// VFMSUB231SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SS.RU_SAE xmm xmm k xmm
// VFMSUB231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RU_SAE(ops ...operand.Op) { ctx.VFMSUB231SS_RU_SAE(ops...) }
// VFMSUB231SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RU_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SS_RU_SAE_Z(x, x1, k, x2) }
// VFMSUB231SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE xmm xmm k xmm
// VFMSUB231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUB231SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RZ_SAE(ops...))
}
// VFMSUB231SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE xmm xmm k xmm
// VFMSUB231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFMSUB231SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUB231SS_RZ_SAE(ops...) }
// VFMSUB231SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFMSUB231SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFMSUB231SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFMSUB231SS_RZ_SAE_Z(x, x1, k, x2) }
// VFMSUB231SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.Z m32 xmm k xmm
// VFMSUB231SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.Z instruction to the active function.
func (c *Context) VFMSUB231SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFMSUB231SS_Z(mx, x, k, x1))
}
// VFMSUB231SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.Z m32 xmm k xmm
// VFMSUB231SS.Z xmm xmm k xmm
//
// Construct and append a VFMSUB231SS.Z instruction to the active function.
// Operates on the global context.
func VFMSUB231SS_Z(mx, x, k, x1 operand.Op) { ctx.VFMSUB231SS_Z(mx, x, k, x1) }
// VFMSUBADD132PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PD m128 xmm xmm
// VFMSUBADD132PD m256 ymm ymm
// VFMSUBADD132PD xmm xmm xmm
// VFMSUBADD132PD ymm ymm ymm
// VFMSUBADD132PD m128 xmm k xmm
// VFMSUBADD132PD m256 ymm k ymm
// VFMSUBADD132PD xmm xmm k xmm
// VFMSUBADD132PD ymm ymm k ymm
// VFMSUBADD132PD m512 zmm k zmm
// VFMSUBADD132PD m512 zmm zmm
// VFMSUBADD132PD zmm zmm k zmm
// VFMSUBADD132PD zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD instruction to the active function.
func (c *Context) VFMSUBADD132PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD(ops...))
}
// VFMSUBADD132PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PD m128 xmm xmm
// VFMSUBADD132PD m256 ymm ymm
// VFMSUBADD132PD xmm xmm xmm
// VFMSUBADD132PD ymm ymm ymm
// VFMSUBADD132PD m128 xmm k xmm
// VFMSUBADD132PD m256 ymm k ymm
// VFMSUBADD132PD xmm xmm k xmm
// VFMSUBADD132PD ymm ymm k ymm
// VFMSUBADD132PD m512 zmm k zmm
// VFMSUBADD132PD m512 zmm zmm
// VFMSUBADD132PD zmm zmm k zmm
// VFMSUBADD132PD zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD(ops ...operand.Op) { ctx.VFMSUBADD132PD(ops...) }
// VFMSUBADD132PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PD.BCST m64 xmm k xmm
// VFMSUBADD132PD.BCST m64 xmm xmm
// VFMSUBADD132PD.BCST m64 ymm k ymm
// VFMSUBADD132PD.BCST m64 ymm ymm
// VFMSUBADD132PD.BCST m64 zmm k zmm
// VFMSUBADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD132PD.BCST instruction to the active function.
func (c *Context) VFMSUBADD132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_BCST(ops...))
}
// VFMSUBADD132PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PD.BCST m64 xmm k xmm
// VFMSUBADD132PD.BCST m64 xmm xmm
// VFMSUBADD132PD.BCST m64 ymm k ymm
// VFMSUBADD132PD.BCST m64 ymm ymm
// VFMSUBADD132PD.BCST m64 zmm k zmm
// VFMSUBADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD132PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_BCST(ops ...operand.Op) { ctx.VFMSUBADD132PD_BCST(ops...) }
// VFMSUBADD132PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.BCST.Z m64 xmm k xmm
// VFMSUBADD132PD.BCST.Z m64 ymm k ymm
// VFMSUBADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD132PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD132PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.BCST.Z m64 xmm k xmm
// VFMSUBADD132PD.BCST.Z m64 ymm k ymm
// VFMSUBADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD132PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD132PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE zmm zmm k zmm
// VFMSUBADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RD_SAE(ops...))
}
// VFMSUBADD132PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE zmm zmm k zmm
// VFMSUBADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PD_RD_SAE(ops...) }
// VFMSUBADD132PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE zmm zmm k zmm
// VFMSUBADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RN_SAE(ops...))
}
// VFMSUBADD132PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE zmm zmm k zmm
// VFMSUBADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PD_RN_SAE(ops...) }
// VFMSUBADD132PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE zmm zmm k zmm
// VFMSUBADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RU_SAE(ops...))
}
// VFMSUBADD132PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE zmm zmm k zmm
// VFMSUBADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PD_RU_SAE(ops...) }
// VFMSUBADD132PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RZ_SAE(ops...))
}
// VFMSUBADD132PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PD_RZ_SAE(ops...) }
// VFMSUBADD132PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.Z m128 xmm k xmm
// VFMSUBADD132PD.Z m256 ymm k ymm
// VFMSUBADD132PD.Z xmm xmm k xmm
// VFMSUBADD132PD.Z ymm ymm k ymm
// VFMSUBADD132PD.Z m512 zmm k zmm
// VFMSUBADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.Z instruction to the active function.
func (c *Context) VFMSUBADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD132PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.Z m128 xmm k xmm
// VFMSUBADD132PD.Z m256 ymm k ymm
// VFMSUBADD132PD.Z xmm xmm k xmm
// VFMSUBADD132PD.Z ymm ymm k ymm
// VFMSUBADD132PD.Z m512 zmm k zmm
// VFMSUBADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD132PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUBADD132PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PS m128 xmm xmm
// VFMSUBADD132PS m256 ymm ymm
// VFMSUBADD132PS xmm xmm xmm
// VFMSUBADD132PS ymm ymm ymm
// VFMSUBADD132PS m128 xmm k xmm
// VFMSUBADD132PS m256 ymm k ymm
// VFMSUBADD132PS xmm xmm k xmm
// VFMSUBADD132PS ymm ymm k ymm
// VFMSUBADD132PS m512 zmm k zmm
// VFMSUBADD132PS m512 zmm zmm
// VFMSUBADD132PS zmm zmm k zmm
// VFMSUBADD132PS zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS instruction to the active function.
func (c *Context) VFMSUBADD132PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS(ops...))
}
// VFMSUBADD132PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PS m128 xmm xmm
// VFMSUBADD132PS m256 ymm ymm
// VFMSUBADD132PS xmm xmm xmm
// VFMSUBADD132PS ymm ymm ymm
// VFMSUBADD132PS m128 xmm k xmm
// VFMSUBADD132PS m256 ymm k ymm
// VFMSUBADD132PS xmm xmm k xmm
// VFMSUBADD132PS ymm ymm k ymm
// VFMSUBADD132PS m512 zmm k zmm
// VFMSUBADD132PS m512 zmm zmm
// VFMSUBADD132PS zmm zmm k zmm
// VFMSUBADD132PS zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS(ops ...operand.Op) { ctx.VFMSUBADD132PS(ops...) }
// VFMSUBADD132PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PS.BCST m32 xmm k xmm
// VFMSUBADD132PS.BCST m32 xmm xmm
// VFMSUBADD132PS.BCST m32 ymm k ymm
// VFMSUBADD132PS.BCST m32 ymm ymm
// VFMSUBADD132PS.BCST m32 zmm k zmm
// VFMSUBADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD132PS.BCST instruction to the active function.
func (c *Context) VFMSUBADD132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_BCST(ops...))
}
// VFMSUBADD132PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PS.BCST m32 xmm k xmm
// VFMSUBADD132PS.BCST m32 xmm xmm
// VFMSUBADD132PS.BCST m32 ymm k ymm
// VFMSUBADD132PS.BCST m32 ymm ymm
// VFMSUBADD132PS.BCST m32 zmm k zmm
// VFMSUBADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD132PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_BCST(ops ...operand.Op) { ctx.VFMSUBADD132PS_BCST(ops...) }
// VFMSUBADD132PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.BCST.Z m32 xmm k xmm
// VFMSUBADD132PS.BCST.Z m32 ymm k ymm
// VFMSUBADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD132PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD132PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.BCST.Z m32 xmm k xmm
// VFMSUBADD132PS.BCST.Z m32 ymm k ymm
// VFMSUBADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD132PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD132PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE zmm zmm k zmm
// VFMSUBADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RD_SAE(ops...))
}
// VFMSUBADD132PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE zmm zmm k zmm
// VFMSUBADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PS_RD_SAE(ops...) }
// VFMSUBADD132PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE zmm zmm k zmm
// VFMSUBADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RN_SAE(ops...))
}
// VFMSUBADD132PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE zmm zmm k zmm
// VFMSUBADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PS_RN_SAE(ops...) }
// VFMSUBADD132PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE zmm zmm k zmm
// VFMSUBADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RU_SAE(ops...))
}
// VFMSUBADD132PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE zmm zmm k zmm
// VFMSUBADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PS_RU_SAE(ops...) }
// VFMSUBADD132PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RZ_SAE(ops...))
}
// VFMSUBADD132PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD132PS_RZ_SAE(ops...) }
// VFMSUBADD132PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD132PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD132PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.Z m128 xmm k xmm
// VFMSUBADD132PS.Z m256 ymm k ymm
// VFMSUBADD132PS.Z xmm xmm k xmm
// VFMSUBADD132PS.Z ymm ymm k ymm
// VFMSUBADD132PS.Z m512 zmm k zmm
// VFMSUBADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.Z instruction to the active function.
func (c *Context) VFMSUBADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD132PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD132PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.Z m128 xmm k xmm
// VFMSUBADD132PS.Z m256 ymm k ymm
// VFMSUBADD132PS.Z xmm xmm k xmm
// VFMSUBADD132PS.Z ymm ymm k ymm
// VFMSUBADD132PS.Z m512 zmm k zmm
// VFMSUBADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD132PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD132PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUBADD213PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PD m128 xmm xmm
// VFMSUBADD213PD m256 ymm ymm
// VFMSUBADD213PD xmm xmm xmm
// VFMSUBADD213PD ymm ymm ymm
// VFMSUBADD213PD m128 xmm k xmm
// VFMSUBADD213PD m256 ymm k ymm
// VFMSUBADD213PD xmm xmm k xmm
// VFMSUBADD213PD ymm ymm k ymm
// VFMSUBADD213PD m512 zmm k zmm
// VFMSUBADD213PD m512 zmm zmm
// VFMSUBADD213PD zmm zmm k zmm
// VFMSUBADD213PD zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD instruction to the active function.
func (c *Context) VFMSUBADD213PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD(ops...))
}
// VFMSUBADD213PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PD m128 xmm xmm
// VFMSUBADD213PD m256 ymm ymm
// VFMSUBADD213PD xmm xmm xmm
// VFMSUBADD213PD ymm ymm ymm
// VFMSUBADD213PD m128 xmm k xmm
// VFMSUBADD213PD m256 ymm k ymm
// VFMSUBADD213PD xmm xmm k xmm
// VFMSUBADD213PD ymm ymm k ymm
// VFMSUBADD213PD m512 zmm k zmm
// VFMSUBADD213PD m512 zmm zmm
// VFMSUBADD213PD zmm zmm k zmm
// VFMSUBADD213PD zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD(ops ...operand.Op) { ctx.VFMSUBADD213PD(ops...) }
// VFMSUBADD213PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PD.BCST m64 xmm k xmm
// VFMSUBADD213PD.BCST m64 xmm xmm
// VFMSUBADD213PD.BCST m64 ymm k ymm
// VFMSUBADD213PD.BCST m64 ymm ymm
// VFMSUBADD213PD.BCST m64 zmm k zmm
// VFMSUBADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD213PD.BCST instruction to the active function.
func (c *Context) VFMSUBADD213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_BCST(ops...))
}
// VFMSUBADD213PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PD.BCST m64 xmm k xmm
// VFMSUBADD213PD.BCST m64 xmm xmm
// VFMSUBADD213PD.BCST m64 ymm k ymm
// VFMSUBADD213PD.BCST m64 ymm ymm
// VFMSUBADD213PD.BCST m64 zmm k zmm
// VFMSUBADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD213PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_BCST(ops ...operand.Op) { ctx.VFMSUBADD213PD_BCST(ops...) }
// VFMSUBADD213PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.BCST.Z m64 xmm k xmm
// VFMSUBADD213PD.BCST.Z m64 ymm k ymm
// VFMSUBADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD213PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD213PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.BCST.Z m64 xmm k xmm
// VFMSUBADD213PD.BCST.Z m64 ymm k ymm
// VFMSUBADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD213PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD213PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE zmm zmm k zmm
// VFMSUBADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RD_SAE(ops...))
}
// VFMSUBADD213PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE zmm zmm k zmm
// VFMSUBADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PD_RD_SAE(ops...) }
// VFMSUBADD213PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE zmm zmm k zmm
// VFMSUBADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RN_SAE(ops...))
}
// VFMSUBADD213PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE zmm zmm k zmm
// VFMSUBADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PD_RN_SAE(ops...) }
// VFMSUBADD213PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE zmm zmm k zmm
// VFMSUBADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RU_SAE(ops...))
}
// VFMSUBADD213PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE zmm zmm k zmm
// VFMSUBADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PD_RU_SAE(ops...) }
// VFMSUBADD213PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RZ_SAE(ops...))
}
// VFMSUBADD213PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PD_RZ_SAE(ops...) }
// VFMSUBADD213PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.Z m128 xmm k xmm
// VFMSUBADD213PD.Z m256 ymm k ymm
// VFMSUBADD213PD.Z xmm xmm k xmm
// VFMSUBADD213PD.Z ymm ymm k ymm
// VFMSUBADD213PD.Z m512 zmm k zmm
// VFMSUBADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.Z instruction to the active function.
func (c *Context) VFMSUBADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD213PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.Z m128 xmm k xmm
// VFMSUBADD213PD.Z m256 ymm k ymm
// VFMSUBADD213PD.Z xmm xmm k xmm
// VFMSUBADD213PD.Z ymm ymm k ymm
// VFMSUBADD213PD.Z m512 zmm k zmm
// VFMSUBADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD213PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUBADD213PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PS m128 xmm xmm
// VFMSUBADD213PS m256 ymm ymm
// VFMSUBADD213PS xmm xmm xmm
// VFMSUBADD213PS ymm ymm ymm
// VFMSUBADD213PS m128 xmm k xmm
// VFMSUBADD213PS m256 ymm k ymm
// VFMSUBADD213PS xmm xmm k xmm
// VFMSUBADD213PS ymm ymm k ymm
// VFMSUBADD213PS m512 zmm k zmm
// VFMSUBADD213PS m512 zmm zmm
// VFMSUBADD213PS zmm zmm k zmm
// VFMSUBADD213PS zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS instruction to the active function.
func (c *Context) VFMSUBADD213PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS(ops...))
}
// VFMSUBADD213PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PS m128 xmm xmm
// VFMSUBADD213PS m256 ymm ymm
// VFMSUBADD213PS xmm xmm xmm
// VFMSUBADD213PS ymm ymm ymm
// VFMSUBADD213PS m128 xmm k xmm
// VFMSUBADD213PS m256 ymm k ymm
// VFMSUBADD213PS xmm xmm k xmm
// VFMSUBADD213PS ymm ymm k ymm
// VFMSUBADD213PS m512 zmm k zmm
// VFMSUBADD213PS m512 zmm zmm
// VFMSUBADD213PS zmm zmm k zmm
// VFMSUBADD213PS zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS(ops ...operand.Op) { ctx.VFMSUBADD213PS(ops...) }
// VFMSUBADD213PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PS.BCST m32 xmm k xmm
// VFMSUBADD213PS.BCST m32 xmm xmm
// VFMSUBADD213PS.BCST m32 ymm k ymm
// VFMSUBADD213PS.BCST m32 ymm ymm
// VFMSUBADD213PS.BCST m32 zmm k zmm
// VFMSUBADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD213PS.BCST instruction to the active function.
func (c *Context) VFMSUBADD213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_BCST(ops...))
}
// VFMSUBADD213PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PS.BCST m32 xmm k xmm
// VFMSUBADD213PS.BCST m32 xmm xmm
// VFMSUBADD213PS.BCST m32 ymm k ymm
// VFMSUBADD213PS.BCST m32 ymm ymm
// VFMSUBADD213PS.BCST m32 zmm k zmm
// VFMSUBADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD213PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_BCST(ops ...operand.Op) { ctx.VFMSUBADD213PS_BCST(ops...) }
// VFMSUBADD213PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.BCST.Z m32 xmm k xmm
// VFMSUBADD213PS.BCST.Z m32 ymm k ymm
// VFMSUBADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD213PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD213PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.BCST.Z m32 xmm k xmm
// VFMSUBADD213PS.BCST.Z m32 ymm k ymm
// VFMSUBADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD213PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD213PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE zmm zmm k zmm
// VFMSUBADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RD_SAE(ops...))
}
// VFMSUBADD213PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE zmm zmm k zmm
// VFMSUBADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PS_RD_SAE(ops...) }
// VFMSUBADD213PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE zmm zmm k zmm
// VFMSUBADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RN_SAE(ops...))
}
// VFMSUBADD213PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE zmm zmm k zmm
// VFMSUBADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PS_RN_SAE(ops...) }
// VFMSUBADD213PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE zmm zmm k zmm
// VFMSUBADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RU_SAE(ops...))
}
// VFMSUBADD213PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE zmm zmm k zmm
// VFMSUBADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PS_RU_SAE(ops...) }
// VFMSUBADD213PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RZ_SAE(ops...))
}
// VFMSUBADD213PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD213PS_RZ_SAE(ops...) }
// VFMSUBADD213PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD213PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD213PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.Z m128 xmm k xmm
// VFMSUBADD213PS.Z m256 ymm k ymm
// VFMSUBADD213PS.Z xmm xmm k xmm
// VFMSUBADD213PS.Z ymm ymm k ymm
// VFMSUBADD213PS.Z m512 zmm k zmm
// VFMSUBADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.Z instruction to the active function.
func (c *Context) VFMSUBADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD213PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD213PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.Z m128 xmm k xmm
// VFMSUBADD213PS.Z m256 ymm k ymm
// VFMSUBADD213PS.Z xmm xmm k xmm
// VFMSUBADD213PS.Z ymm ymm k ymm
// VFMSUBADD213PS.Z m512 zmm k zmm
// VFMSUBADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD213PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD213PS_Z(mxyz, xyz, k, xyz1) }
// VFMSUBADD231PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PD m128 xmm xmm
// VFMSUBADD231PD m256 ymm ymm
// VFMSUBADD231PD xmm xmm xmm
// VFMSUBADD231PD ymm ymm ymm
// VFMSUBADD231PD m128 xmm k xmm
// VFMSUBADD231PD m256 ymm k ymm
// VFMSUBADD231PD xmm xmm k xmm
// VFMSUBADD231PD ymm ymm k ymm
// VFMSUBADD231PD m512 zmm k zmm
// VFMSUBADD231PD m512 zmm zmm
// VFMSUBADD231PD zmm zmm k zmm
// VFMSUBADD231PD zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD instruction to the active function.
func (c *Context) VFMSUBADD231PD(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD(ops...))
}
// VFMSUBADD231PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PD m128 xmm xmm
// VFMSUBADD231PD m256 ymm ymm
// VFMSUBADD231PD xmm xmm xmm
// VFMSUBADD231PD ymm ymm ymm
// VFMSUBADD231PD m128 xmm k xmm
// VFMSUBADD231PD m256 ymm k ymm
// VFMSUBADD231PD xmm xmm k xmm
// VFMSUBADD231PD ymm ymm k ymm
// VFMSUBADD231PD m512 zmm k zmm
// VFMSUBADD231PD m512 zmm zmm
// VFMSUBADD231PD zmm zmm k zmm
// VFMSUBADD231PD zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD(ops ...operand.Op) { ctx.VFMSUBADD231PD(ops...) }
// VFMSUBADD231PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PD.BCST m64 xmm k xmm
// VFMSUBADD231PD.BCST m64 xmm xmm
// VFMSUBADD231PD.BCST m64 ymm k ymm
// VFMSUBADD231PD.BCST m64 ymm ymm
// VFMSUBADD231PD.BCST m64 zmm k zmm
// VFMSUBADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD231PD.BCST instruction to the active function.
func (c *Context) VFMSUBADD231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_BCST(ops...))
}
// VFMSUBADD231PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PD.BCST m64 xmm k xmm
// VFMSUBADD231PD.BCST m64 xmm xmm
// VFMSUBADD231PD.BCST m64 ymm k ymm
// VFMSUBADD231PD.BCST m64 ymm ymm
// VFMSUBADD231PD.BCST m64 zmm k zmm
// VFMSUBADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFMSUBADD231PD.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_BCST(ops ...operand.Op) { ctx.VFMSUBADD231PD_BCST(ops...) }
// VFMSUBADD231PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.BCST.Z m64 xmm k xmm
// VFMSUBADD231PD.BCST.Z m64 ymm k ymm
// VFMSUBADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD231PD.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD231PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.BCST.Z m64 xmm k xmm
// VFMSUBADD231PD.BCST.Z m64 ymm k ymm
// VFMSUBADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFMSUBADD231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD231PD_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD231PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE zmm zmm k zmm
// VFMSUBADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RD_SAE(ops...))
}
// VFMSUBADD231PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE zmm zmm k zmm
// VFMSUBADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PD_RD_SAE(ops...) }
// VFMSUBADD231PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PD_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE zmm zmm k zmm
// VFMSUBADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RN_SAE(ops...))
}
// VFMSUBADD231PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE zmm zmm k zmm
// VFMSUBADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PD_RN_SAE(ops...) }
// VFMSUBADD231PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PD_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE zmm zmm k zmm
// VFMSUBADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RU_SAE(ops...))
}
// VFMSUBADD231PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE zmm zmm k zmm
// VFMSUBADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PD_RU_SAE(ops...) }
// VFMSUBADD231PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PD_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RZ_SAE(ops...))
}
// VFMSUBADD231PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PD_RZ_SAE(ops...) }
// VFMSUBADD231PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.Z m128 xmm k xmm
// VFMSUBADD231PD.Z m256 ymm k ymm
// VFMSUBADD231PD.Z xmm xmm k xmm
// VFMSUBADD231PD.Z ymm ymm k ymm
// VFMSUBADD231PD.Z m512 zmm k zmm
// VFMSUBADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.Z instruction to the active function.
func (c *Context) VFMSUBADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PD_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD231PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.Z m128 xmm k xmm
// VFMSUBADD231PD.Z m256 ymm k ymm
// VFMSUBADD231PD.Z xmm xmm k xmm
// VFMSUBADD231PD.Z ymm ymm k ymm
// VFMSUBADD231PD.Z m512 zmm k zmm
// VFMSUBADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PD.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD231PD_Z(mxyz, xyz, k, xyz1) }
// VFMSUBADD231PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PS m128 xmm xmm
// VFMSUBADD231PS m256 ymm ymm
// VFMSUBADD231PS xmm xmm xmm
// VFMSUBADD231PS ymm ymm ymm
// VFMSUBADD231PS m128 xmm k xmm
// VFMSUBADD231PS m256 ymm k ymm
// VFMSUBADD231PS xmm xmm k xmm
// VFMSUBADD231PS ymm ymm k ymm
// VFMSUBADD231PS m512 zmm k zmm
// VFMSUBADD231PS m512 zmm zmm
// VFMSUBADD231PS zmm zmm k zmm
// VFMSUBADD231PS zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS instruction to the active function.
func (c *Context) VFMSUBADD231PS(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS(ops...))
}
// VFMSUBADD231PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PS m128 xmm xmm
// VFMSUBADD231PS m256 ymm ymm
// VFMSUBADD231PS xmm xmm xmm
// VFMSUBADD231PS ymm ymm ymm
// VFMSUBADD231PS m128 xmm k xmm
// VFMSUBADD231PS m256 ymm k ymm
// VFMSUBADD231PS xmm xmm k xmm
// VFMSUBADD231PS ymm ymm k ymm
// VFMSUBADD231PS m512 zmm k zmm
// VFMSUBADD231PS m512 zmm zmm
// VFMSUBADD231PS zmm zmm k zmm
// VFMSUBADD231PS zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS(ops ...operand.Op) { ctx.VFMSUBADD231PS(ops...) }
// VFMSUBADD231PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PS.BCST m32 xmm k xmm
// VFMSUBADD231PS.BCST m32 xmm xmm
// VFMSUBADD231PS.BCST m32 ymm k ymm
// VFMSUBADD231PS.BCST m32 ymm ymm
// VFMSUBADD231PS.BCST m32 zmm k zmm
// VFMSUBADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD231PS.BCST instruction to the active function.
func (c *Context) VFMSUBADD231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_BCST(ops...))
}
// VFMSUBADD231PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PS.BCST m32 xmm k xmm
// VFMSUBADD231PS.BCST m32 xmm xmm
// VFMSUBADD231PS.BCST m32 ymm k ymm
// VFMSUBADD231PS.BCST m32 ymm ymm
// VFMSUBADD231PS.BCST m32 zmm k zmm
// VFMSUBADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFMSUBADD231PS.BCST instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_BCST(ops ...operand.Op) { ctx.VFMSUBADD231PS_BCST(ops...) }
// VFMSUBADD231PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.BCST.Z m32 xmm k xmm
// VFMSUBADD231PS.BCST.Z m32 ymm k ymm
// VFMSUBADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD231PS.BCST.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFMSUBADD231PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.BCST.Z m32 xmm k xmm
// VFMSUBADD231PS.BCST.Z m32 ymm k ymm
// VFMSUBADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFMSUBADD231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD231PS_BCST_Z(m, xyz, k, xyz1) }
// VFMSUBADD231PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE zmm zmm k zmm
// VFMSUBADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RD_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RD_SAE(ops...))
}
// VFMSUBADD231PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE zmm zmm k zmm
// VFMSUBADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RD_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PS_RD_SAE(ops...) }
// VFMSUBADD231PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PS_RD_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE zmm zmm k zmm
// VFMSUBADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RN_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RN_SAE(ops...))
}
// VFMSUBADD231PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE zmm zmm k zmm
// VFMSUBADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RN_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PS_RN_SAE(ops...) }
// VFMSUBADD231PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PS_RN_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE zmm zmm k zmm
// VFMSUBADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RU_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RU_SAE(ops...))
}
// VFMSUBADD231PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE zmm zmm k zmm
// VFMSUBADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RU_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PS_RU_SAE(ops...) }
// VFMSUBADD231PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PS_RU_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RZ_SAE instruction to the active function.
func (c *Context) VFMSUBADD231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RZ_SAE(ops...))
}
// VFMSUBADD231PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFMSUBADD231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RZ_SAE(ops ...operand.Op) { ctx.VFMSUBADD231PS_RZ_SAE(ops...) }
// VFMSUBADD231PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFMSUBADD231PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFMSUBADD231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFMSUBADD231PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.Z m128 xmm k xmm
// VFMSUBADD231PS.Z m256 ymm k ymm
// VFMSUBADD231PS.Z xmm xmm k xmm
// VFMSUBADD231PS.Z ymm ymm k ymm
// VFMSUBADD231PS.Z m512 zmm k zmm
// VFMSUBADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.Z instruction to the active function.
func (c *Context) VFMSUBADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFMSUBADD231PS_Z(mxyz, xyz, k, xyz1))
}
// VFMSUBADD231PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.Z m128 xmm k xmm
// VFMSUBADD231PS.Z m256 ymm k ymm
// VFMSUBADD231PS.Z xmm xmm k xmm
// VFMSUBADD231PS.Z ymm ymm k ymm
// VFMSUBADD231PS.Z m512 zmm k zmm
// VFMSUBADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFMSUBADD231PS.Z instruction to the active function.
// Operates on the global context.
func VFMSUBADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFMSUBADD231PS_Z(mxyz, xyz, k, xyz1) }
// VFNMADD132PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PD m128 xmm xmm
// VFNMADD132PD m256 ymm ymm
// VFNMADD132PD xmm xmm xmm
// VFNMADD132PD ymm ymm ymm
// VFNMADD132PD m128 xmm k xmm
// VFNMADD132PD m256 ymm k ymm
// VFNMADD132PD xmm xmm k xmm
// VFNMADD132PD ymm ymm k ymm
// VFNMADD132PD m512 zmm k zmm
// VFNMADD132PD m512 zmm zmm
// VFNMADD132PD zmm zmm k zmm
// VFNMADD132PD zmm zmm zmm
//
// Construct and append a VFNMADD132PD instruction to the active function.
func (c *Context) VFNMADD132PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD(ops...))
}
// VFNMADD132PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PD m128 xmm xmm
// VFNMADD132PD m256 ymm ymm
// VFNMADD132PD xmm xmm xmm
// VFNMADD132PD ymm ymm ymm
// VFNMADD132PD m128 xmm k xmm
// VFNMADD132PD m256 ymm k ymm
// VFNMADD132PD xmm xmm k xmm
// VFNMADD132PD ymm ymm k ymm
// VFNMADD132PD m512 zmm k zmm
// VFNMADD132PD m512 zmm zmm
// VFNMADD132PD zmm zmm k zmm
// VFNMADD132PD zmm zmm zmm
//
// Construct and append a VFNMADD132PD instruction to the active function.
// Operates on the global context.
func VFNMADD132PD(ops ...operand.Op) { ctx.VFNMADD132PD(ops...) }
// VFNMADD132PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PD.BCST m64 xmm k xmm
// VFNMADD132PD.BCST m64 xmm xmm
// VFNMADD132PD.BCST m64 ymm k ymm
// VFNMADD132PD.BCST m64 ymm ymm
// VFNMADD132PD.BCST m64 zmm k zmm
// VFNMADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD132PD.BCST instruction to the active function.
func (c *Context) VFNMADD132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD_BCST(ops...))
}
// VFNMADD132PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PD.BCST m64 xmm k xmm
// VFNMADD132PD.BCST m64 xmm xmm
// VFNMADD132PD.BCST m64 ymm k ymm
// VFNMADD132PD.BCST m64 ymm ymm
// VFNMADD132PD.BCST m64 zmm k zmm
// VFNMADD132PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD132PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_BCST(ops ...operand.Op) { ctx.VFNMADD132PD_BCST(ops...) }
// VFNMADD132PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.BCST.Z m64 xmm k xmm
// VFNMADD132PD.BCST.Z m64 ymm k ymm
// VFNMADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD132PD.BCST.Z instruction to the active function.
func (c *Context) VFNMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD132PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.BCST.Z m64 xmm k xmm
// VFNMADD132PD.BCST.Z m64 ymm k ymm
// VFNMADD132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD132PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD132PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PD.RD_SAE zmm zmm k zmm
// VFNMADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RD_SAE(ops...))
}
// VFNMADD132PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PD.RD_SAE zmm zmm k zmm
// VFNMADD132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD132PD_RD_SAE(ops...) }
// VFNMADD132PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD132PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PD.RN_SAE zmm zmm k zmm
// VFNMADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RN_SAE(ops...))
}
// VFNMADD132PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PD.RN_SAE zmm zmm k zmm
// VFNMADD132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD132PD_RN_SAE(ops...) }
// VFNMADD132PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD132PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PD.RU_SAE zmm zmm k zmm
// VFNMADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RU_SAE(ops...))
}
// VFNMADD132PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PD.RU_SAE zmm zmm k zmm
// VFNMADD132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD132PD_RU_SAE(ops...) }
// VFNMADD132PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD132PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE zmm zmm k zmm
// VFNMADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RZ_SAE(ops...))
}
// VFNMADD132PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE zmm zmm k zmm
// VFNMADD132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD132PD_RZ_SAE(ops...) }
// VFNMADD132PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD132PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.Z m128 xmm k xmm
// VFNMADD132PD.Z m256 ymm k ymm
// VFNMADD132PD.Z xmm xmm k xmm
// VFNMADD132PD.Z ymm ymm k ymm
// VFNMADD132PD.Z m512 zmm k zmm
// VFNMADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.Z instruction to the active function.
func (c *Context) VFNMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD132PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD132PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.Z m128 xmm k xmm
// VFNMADD132PD.Z m256 ymm k ymm
// VFNMADD132PD.Z xmm xmm k xmm
// VFNMADD132PD.Z ymm ymm k ymm
// VFNMADD132PD.Z m512 zmm k zmm
// VFNMADD132PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD132PD_Z(mxyz, xyz, k, xyz1) }
// VFNMADD132PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PS m128 xmm xmm
// VFNMADD132PS m256 ymm ymm
// VFNMADD132PS xmm xmm xmm
// VFNMADD132PS ymm ymm ymm
// VFNMADD132PS m128 xmm k xmm
// VFNMADD132PS m256 ymm k ymm
// VFNMADD132PS xmm xmm k xmm
// VFNMADD132PS ymm ymm k ymm
// VFNMADD132PS m512 zmm k zmm
// VFNMADD132PS m512 zmm zmm
// VFNMADD132PS zmm zmm k zmm
// VFNMADD132PS zmm zmm zmm
//
// Construct and append a VFNMADD132PS instruction to the active function.
func (c *Context) VFNMADD132PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS(ops...))
}
// VFNMADD132PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PS m128 xmm xmm
// VFNMADD132PS m256 ymm ymm
// VFNMADD132PS xmm xmm xmm
// VFNMADD132PS ymm ymm ymm
// VFNMADD132PS m128 xmm k xmm
// VFNMADD132PS m256 ymm k ymm
// VFNMADD132PS xmm xmm k xmm
// VFNMADD132PS ymm ymm k ymm
// VFNMADD132PS m512 zmm k zmm
// VFNMADD132PS m512 zmm zmm
// VFNMADD132PS zmm zmm k zmm
// VFNMADD132PS zmm zmm zmm
//
// Construct and append a VFNMADD132PS instruction to the active function.
// Operates on the global context.
func VFNMADD132PS(ops ...operand.Op) { ctx.VFNMADD132PS(ops...) }
// VFNMADD132PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PS.BCST m32 xmm k xmm
// VFNMADD132PS.BCST m32 xmm xmm
// VFNMADD132PS.BCST m32 ymm k ymm
// VFNMADD132PS.BCST m32 ymm ymm
// VFNMADD132PS.BCST m32 zmm k zmm
// VFNMADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD132PS.BCST instruction to the active function.
func (c *Context) VFNMADD132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS_BCST(ops...))
}
// VFNMADD132PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PS.BCST m32 xmm k xmm
// VFNMADD132PS.BCST m32 xmm xmm
// VFNMADD132PS.BCST m32 ymm k ymm
// VFNMADD132PS.BCST m32 ymm ymm
// VFNMADD132PS.BCST m32 zmm k zmm
// VFNMADD132PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD132PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_BCST(ops ...operand.Op) { ctx.VFNMADD132PS_BCST(ops...) }
// VFNMADD132PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.BCST.Z m32 xmm k xmm
// VFNMADD132PS.BCST.Z m32 ymm k ymm
// VFNMADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD132PS.BCST.Z instruction to the active function.
func (c *Context) VFNMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD132PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.BCST.Z m32 xmm k xmm
// VFNMADD132PS.BCST.Z m32 ymm k ymm
// VFNMADD132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD132PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD132PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PS.RD_SAE zmm zmm k zmm
// VFNMADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RD_SAE(ops...))
}
// VFNMADD132PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PS.RD_SAE zmm zmm k zmm
// VFNMADD132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD132PS_RD_SAE(ops...) }
// VFNMADD132PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD132PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PS.RN_SAE zmm zmm k zmm
// VFNMADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RN_SAE(ops...))
}
// VFNMADD132PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PS.RN_SAE zmm zmm k zmm
// VFNMADD132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD132PS_RN_SAE(ops...) }
// VFNMADD132PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD132PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PS.RU_SAE zmm zmm k zmm
// VFNMADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RU_SAE(ops...))
}
// VFNMADD132PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PS.RU_SAE zmm zmm k zmm
// VFNMADD132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD132PS_RU_SAE(ops...) }
// VFNMADD132PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD132PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE zmm zmm k zmm
// VFNMADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RZ_SAE(ops...))
}
// VFNMADD132PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE zmm zmm k zmm
// VFNMADD132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD132PS_RZ_SAE(ops...) }
// VFNMADD132PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD132PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD132PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.Z m128 xmm k xmm
// VFNMADD132PS.Z m256 ymm k ymm
// VFNMADD132PS.Z xmm xmm k xmm
// VFNMADD132PS.Z ymm ymm k ymm
// VFNMADD132PS.Z m512 zmm k zmm
// VFNMADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.Z instruction to the active function.
func (c *Context) VFNMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD132PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD132PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.Z m128 xmm k xmm
// VFNMADD132PS.Z m256 ymm k ymm
// VFNMADD132PS.Z xmm xmm k xmm
// VFNMADD132PS.Z ymm ymm k ymm
// VFNMADD132PS.Z m512 zmm k zmm
// VFNMADD132PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD132PS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD132PS_Z(mxyz, xyz, k, xyz1) }
// VFNMADD132SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SD m64 xmm xmm
// VFNMADD132SD xmm xmm xmm
// VFNMADD132SD m64 xmm k xmm
// VFNMADD132SD xmm xmm k xmm
//
// Construct and append a VFNMADD132SD instruction to the active function.
func (c *Context) VFNMADD132SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SD(ops...))
}
// VFNMADD132SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SD m64 xmm xmm
// VFNMADD132SD xmm xmm xmm
// VFNMADD132SD m64 xmm k xmm
// VFNMADD132SD xmm xmm k xmm
//
// Construct and append a VFNMADD132SD instruction to the active function.
// Operates on the global context.
func VFNMADD132SD(ops ...operand.Op) { ctx.VFNMADD132SD(ops...) }
// VFNMADD132SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SD.RD_SAE xmm xmm k xmm
// VFNMADD132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD132SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RD_SAE(ops...))
}
// VFNMADD132SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SD.RD_SAE xmm xmm k xmm
// VFNMADD132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD132SD_RD_SAE(ops...) }
// VFNMADD132SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD132SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SD.RN_SAE xmm xmm k xmm
// VFNMADD132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD132SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RN_SAE(ops...))
}
// VFNMADD132SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SD.RN_SAE xmm xmm k xmm
// VFNMADD132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD132SD_RN_SAE(ops...) }
// VFNMADD132SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD132SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SD.RU_SAE xmm xmm k xmm
// VFNMADD132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD132SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RU_SAE(ops...))
}
// VFNMADD132SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SD.RU_SAE xmm xmm k xmm
// VFNMADD132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD132SD_RU_SAE(ops...) }
// VFNMADD132SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD132SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE xmm xmm k xmm
// VFNMADD132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD132SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RZ_SAE(ops...))
}
// VFNMADD132SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE xmm xmm k xmm
// VFNMADD132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD132SD_RZ_SAE(ops...) }
// VFNMADD132SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD132SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.Z m64 xmm k xmm
// VFNMADD132SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.Z instruction to the active function.
func (c *Context) VFNMADD132SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD132SD_Z(mx, x, k, x1))
}
// VFNMADD132SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.Z m64 xmm k xmm
// VFNMADD132SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD132SD_Z(mx, x, k, x1) }
// VFNMADD132SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SS m32 xmm xmm
// VFNMADD132SS xmm xmm xmm
// VFNMADD132SS m32 xmm k xmm
// VFNMADD132SS xmm xmm k xmm
//
// Construct and append a VFNMADD132SS instruction to the active function.
func (c *Context) VFNMADD132SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SS(ops...))
}
// VFNMADD132SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SS m32 xmm xmm
// VFNMADD132SS xmm xmm xmm
// VFNMADD132SS m32 xmm k xmm
// VFNMADD132SS xmm xmm k xmm
//
// Construct and append a VFNMADD132SS instruction to the active function.
// Operates on the global context.
func VFNMADD132SS(ops ...operand.Op) { ctx.VFNMADD132SS(ops...) }
// VFNMADD132SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SS.RD_SAE xmm xmm k xmm
// VFNMADD132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD132SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RD_SAE(ops...))
}
// VFNMADD132SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SS.RD_SAE xmm xmm k xmm
// VFNMADD132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD132SS_RD_SAE(ops...) }
// VFNMADD132SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD132SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SS.RN_SAE xmm xmm k xmm
// VFNMADD132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD132SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RN_SAE(ops...))
}
// VFNMADD132SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SS.RN_SAE xmm xmm k xmm
// VFNMADD132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD132SS_RN_SAE(ops...) }
// VFNMADD132SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD132SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SS.RU_SAE xmm xmm k xmm
// VFNMADD132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD132SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RU_SAE(ops...))
}
// VFNMADD132SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SS.RU_SAE xmm xmm k xmm
// VFNMADD132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD132SS_RU_SAE(ops...) }
// VFNMADD132SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD132SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE xmm xmm k xmm
// VFNMADD132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD132SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RZ_SAE(ops...))
}
// VFNMADD132SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE xmm xmm k xmm
// VFNMADD132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD132SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD132SS_RZ_SAE(ops...) }
// VFNMADD132SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD132SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD132SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD132SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD132SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.Z m32 xmm k xmm
// VFNMADD132SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.Z instruction to the active function.
func (c *Context) VFNMADD132SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD132SS_Z(mx, x, k, x1))
}
// VFNMADD132SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.Z m32 xmm k xmm
// VFNMADD132SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD132SS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD132SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD132SS_Z(mx, x, k, x1) }
// VFNMADD213PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PD m128 xmm xmm
// VFNMADD213PD m256 ymm ymm
// VFNMADD213PD xmm xmm xmm
// VFNMADD213PD ymm ymm ymm
// VFNMADD213PD m128 xmm k xmm
// VFNMADD213PD m256 ymm k ymm
// VFNMADD213PD xmm xmm k xmm
// VFNMADD213PD ymm ymm k ymm
// VFNMADD213PD m512 zmm k zmm
// VFNMADD213PD m512 zmm zmm
// VFNMADD213PD zmm zmm k zmm
// VFNMADD213PD zmm zmm zmm
//
// Construct and append a VFNMADD213PD instruction to the active function.
func (c *Context) VFNMADD213PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD(ops...))
}
// VFNMADD213PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PD m128 xmm xmm
// VFNMADD213PD m256 ymm ymm
// VFNMADD213PD xmm xmm xmm
// VFNMADD213PD ymm ymm ymm
// VFNMADD213PD m128 xmm k xmm
// VFNMADD213PD m256 ymm k ymm
// VFNMADD213PD xmm xmm k xmm
// VFNMADD213PD ymm ymm k ymm
// VFNMADD213PD m512 zmm k zmm
// VFNMADD213PD m512 zmm zmm
// VFNMADD213PD zmm zmm k zmm
// VFNMADD213PD zmm zmm zmm
//
// Construct and append a VFNMADD213PD instruction to the active function.
// Operates on the global context.
func VFNMADD213PD(ops ...operand.Op) { ctx.VFNMADD213PD(ops...) }
// VFNMADD213PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PD.BCST m64 xmm k xmm
// VFNMADD213PD.BCST m64 xmm xmm
// VFNMADD213PD.BCST m64 ymm k ymm
// VFNMADD213PD.BCST m64 ymm ymm
// VFNMADD213PD.BCST m64 zmm k zmm
// VFNMADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD213PD.BCST instruction to the active function.
func (c *Context) VFNMADD213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD_BCST(ops...))
}
// VFNMADD213PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PD.BCST m64 xmm k xmm
// VFNMADD213PD.BCST m64 xmm xmm
// VFNMADD213PD.BCST m64 ymm k ymm
// VFNMADD213PD.BCST m64 ymm ymm
// VFNMADD213PD.BCST m64 zmm k zmm
// VFNMADD213PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD213PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_BCST(ops ...operand.Op) { ctx.VFNMADD213PD_BCST(ops...) }
// VFNMADD213PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.BCST.Z m64 xmm k xmm
// VFNMADD213PD.BCST.Z m64 ymm k ymm
// VFNMADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD213PD.BCST.Z instruction to the active function.
func (c *Context) VFNMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD213PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.BCST.Z m64 xmm k xmm
// VFNMADD213PD.BCST.Z m64 ymm k ymm
// VFNMADD213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD213PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD213PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PD.RD_SAE zmm zmm k zmm
// VFNMADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RD_SAE(ops...))
}
// VFNMADD213PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PD.RD_SAE zmm zmm k zmm
// VFNMADD213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD213PD_RD_SAE(ops...) }
// VFNMADD213PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD213PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PD.RN_SAE zmm zmm k zmm
// VFNMADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RN_SAE(ops...))
}
// VFNMADD213PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PD.RN_SAE zmm zmm k zmm
// VFNMADD213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD213PD_RN_SAE(ops...) }
// VFNMADD213PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD213PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PD.RU_SAE zmm zmm k zmm
// VFNMADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RU_SAE(ops...))
}
// VFNMADD213PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PD.RU_SAE zmm zmm k zmm
// VFNMADD213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD213PD_RU_SAE(ops...) }
// VFNMADD213PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD213PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE zmm zmm k zmm
// VFNMADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RZ_SAE(ops...))
}
// VFNMADD213PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE zmm zmm k zmm
// VFNMADD213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD213PD_RZ_SAE(ops...) }
// VFNMADD213PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD213PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.Z m128 xmm k xmm
// VFNMADD213PD.Z m256 ymm k ymm
// VFNMADD213PD.Z xmm xmm k xmm
// VFNMADD213PD.Z ymm ymm k ymm
// VFNMADD213PD.Z m512 zmm k zmm
// VFNMADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.Z instruction to the active function.
func (c *Context) VFNMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD213PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD213PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.Z m128 xmm k xmm
// VFNMADD213PD.Z m256 ymm k ymm
// VFNMADD213PD.Z xmm xmm k xmm
// VFNMADD213PD.Z ymm ymm k ymm
// VFNMADD213PD.Z m512 zmm k zmm
// VFNMADD213PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD213PD_Z(mxyz, xyz, k, xyz1) }
// VFNMADD213PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PS m128 xmm xmm
// VFNMADD213PS m256 ymm ymm
// VFNMADD213PS xmm xmm xmm
// VFNMADD213PS ymm ymm ymm
// VFNMADD213PS m128 xmm k xmm
// VFNMADD213PS m256 ymm k ymm
// VFNMADD213PS xmm xmm k xmm
// VFNMADD213PS ymm ymm k ymm
// VFNMADD213PS m512 zmm k zmm
// VFNMADD213PS m512 zmm zmm
// VFNMADD213PS zmm zmm k zmm
// VFNMADD213PS zmm zmm zmm
//
// Construct and append a VFNMADD213PS instruction to the active function.
func (c *Context) VFNMADD213PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS(ops...))
}
// VFNMADD213PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PS m128 xmm xmm
// VFNMADD213PS m256 ymm ymm
// VFNMADD213PS xmm xmm xmm
// VFNMADD213PS ymm ymm ymm
// VFNMADD213PS m128 xmm k xmm
// VFNMADD213PS m256 ymm k ymm
// VFNMADD213PS xmm xmm k xmm
// VFNMADD213PS ymm ymm k ymm
// VFNMADD213PS m512 zmm k zmm
// VFNMADD213PS m512 zmm zmm
// VFNMADD213PS zmm zmm k zmm
// VFNMADD213PS zmm zmm zmm
//
// Construct and append a VFNMADD213PS instruction to the active function.
// Operates on the global context.
func VFNMADD213PS(ops ...operand.Op) { ctx.VFNMADD213PS(ops...) }
// VFNMADD213PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PS.BCST m32 xmm k xmm
// VFNMADD213PS.BCST m32 xmm xmm
// VFNMADD213PS.BCST m32 ymm k ymm
// VFNMADD213PS.BCST m32 ymm ymm
// VFNMADD213PS.BCST m32 zmm k zmm
// VFNMADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD213PS.BCST instruction to the active function.
func (c *Context) VFNMADD213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS_BCST(ops...))
}
// VFNMADD213PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PS.BCST m32 xmm k xmm
// VFNMADD213PS.BCST m32 xmm xmm
// VFNMADD213PS.BCST m32 ymm k ymm
// VFNMADD213PS.BCST m32 ymm ymm
// VFNMADD213PS.BCST m32 zmm k zmm
// VFNMADD213PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD213PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_BCST(ops ...operand.Op) { ctx.VFNMADD213PS_BCST(ops...) }
// VFNMADD213PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.BCST.Z m32 xmm k xmm
// VFNMADD213PS.BCST.Z m32 ymm k ymm
// VFNMADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD213PS.BCST.Z instruction to the active function.
func (c *Context) VFNMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD213PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.BCST.Z m32 xmm k xmm
// VFNMADD213PS.BCST.Z m32 ymm k ymm
// VFNMADD213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD213PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD213PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PS.RD_SAE zmm zmm k zmm
// VFNMADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RD_SAE(ops...))
}
// VFNMADD213PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PS.RD_SAE zmm zmm k zmm
// VFNMADD213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD213PS_RD_SAE(ops...) }
// VFNMADD213PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD213PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PS.RN_SAE zmm zmm k zmm
// VFNMADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RN_SAE(ops...))
}
// VFNMADD213PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PS.RN_SAE zmm zmm k zmm
// VFNMADD213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD213PS_RN_SAE(ops...) }
// VFNMADD213PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD213PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PS.RU_SAE zmm zmm k zmm
// VFNMADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RU_SAE(ops...))
}
// VFNMADD213PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PS.RU_SAE zmm zmm k zmm
// VFNMADD213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD213PS_RU_SAE(ops...) }
// VFNMADD213PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD213PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE zmm zmm k zmm
// VFNMADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RZ_SAE(ops...))
}
// VFNMADD213PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE zmm zmm k zmm
// VFNMADD213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD213PS_RZ_SAE(ops...) }
// VFNMADD213PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD213PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD213PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.Z m128 xmm k xmm
// VFNMADD213PS.Z m256 ymm k ymm
// VFNMADD213PS.Z xmm xmm k xmm
// VFNMADD213PS.Z ymm ymm k ymm
// VFNMADD213PS.Z m512 zmm k zmm
// VFNMADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.Z instruction to the active function.
func (c *Context) VFNMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD213PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD213PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.Z m128 xmm k xmm
// VFNMADD213PS.Z m256 ymm k ymm
// VFNMADD213PS.Z xmm xmm k xmm
// VFNMADD213PS.Z ymm ymm k ymm
// VFNMADD213PS.Z m512 zmm k zmm
// VFNMADD213PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD213PS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD213PS_Z(mxyz, xyz, k, xyz1) }
// VFNMADD213SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SD m64 xmm xmm
// VFNMADD213SD xmm xmm xmm
// VFNMADD213SD m64 xmm k xmm
// VFNMADD213SD xmm xmm k xmm
//
// Construct and append a VFNMADD213SD instruction to the active function.
func (c *Context) VFNMADD213SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SD(ops...))
}
// VFNMADD213SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SD m64 xmm xmm
// VFNMADD213SD xmm xmm xmm
// VFNMADD213SD m64 xmm k xmm
// VFNMADD213SD xmm xmm k xmm
//
// Construct and append a VFNMADD213SD instruction to the active function.
// Operates on the global context.
func VFNMADD213SD(ops ...operand.Op) { ctx.VFNMADD213SD(ops...) }
// VFNMADD213SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SD.RD_SAE xmm xmm k xmm
// VFNMADD213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD213SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RD_SAE(ops...))
}
// VFNMADD213SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SD.RD_SAE xmm xmm k xmm
// VFNMADD213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD213SD_RD_SAE(ops...) }
// VFNMADD213SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD213SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SD.RN_SAE xmm xmm k xmm
// VFNMADD213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD213SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RN_SAE(ops...))
}
// VFNMADD213SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SD.RN_SAE xmm xmm k xmm
// VFNMADD213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD213SD_RN_SAE(ops...) }
// VFNMADD213SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD213SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SD.RU_SAE xmm xmm k xmm
// VFNMADD213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD213SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RU_SAE(ops...))
}
// VFNMADD213SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SD.RU_SAE xmm xmm k xmm
// VFNMADD213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD213SD_RU_SAE(ops...) }
// VFNMADD213SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD213SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE xmm xmm k xmm
// VFNMADD213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD213SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RZ_SAE(ops...))
}
// VFNMADD213SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE xmm xmm k xmm
// VFNMADD213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD213SD_RZ_SAE(ops...) }
// VFNMADD213SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD213SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.Z m64 xmm k xmm
// VFNMADD213SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.Z instruction to the active function.
func (c *Context) VFNMADD213SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD213SD_Z(mx, x, k, x1))
}
// VFNMADD213SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.Z m64 xmm k xmm
// VFNMADD213SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD213SD_Z(mx, x, k, x1) }
// VFNMADD213SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SS m32 xmm xmm
// VFNMADD213SS xmm xmm xmm
// VFNMADD213SS m32 xmm k xmm
// VFNMADD213SS xmm xmm k xmm
//
// Construct and append a VFNMADD213SS instruction to the active function.
func (c *Context) VFNMADD213SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SS(ops...))
}
// VFNMADD213SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SS m32 xmm xmm
// VFNMADD213SS xmm xmm xmm
// VFNMADD213SS m32 xmm k xmm
// VFNMADD213SS xmm xmm k xmm
//
// Construct and append a VFNMADD213SS instruction to the active function.
// Operates on the global context.
func VFNMADD213SS(ops ...operand.Op) { ctx.VFNMADD213SS(ops...) }
// VFNMADD213SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SS.RD_SAE xmm xmm k xmm
// VFNMADD213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD213SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RD_SAE(ops...))
}
// VFNMADD213SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SS.RD_SAE xmm xmm k xmm
// VFNMADD213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD213SS_RD_SAE(ops...) }
// VFNMADD213SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD213SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SS.RN_SAE xmm xmm k xmm
// VFNMADD213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD213SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RN_SAE(ops...))
}
// VFNMADD213SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SS.RN_SAE xmm xmm k xmm
// VFNMADD213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD213SS_RN_SAE(ops...) }
// VFNMADD213SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD213SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SS.RU_SAE xmm xmm k xmm
// VFNMADD213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD213SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RU_SAE(ops...))
}
// VFNMADD213SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SS.RU_SAE xmm xmm k xmm
// VFNMADD213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD213SS_RU_SAE(ops...) }
// VFNMADD213SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD213SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE xmm xmm k xmm
// VFNMADD213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD213SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RZ_SAE(ops...))
}
// VFNMADD213SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE xmm xmm k xmm
// VFNMADD213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD213SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD213SS_RZ_SAE(ops...) }
// VFNMADD213SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD213SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD213SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD213SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD213SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.Z m32 xmm k xmm
// VFNMADD213SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.Z instruction to the active function.
func (c *Context) VFNMADD213SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD213SS_Z(mx, x, k, x1))
}
// VFNMADD213SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.Z m32 xmm k xmm
// VFNMADD213SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD213SS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD213SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD213SS_Z(mx, x, k, x1) }
// VFNMADD231PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PD m128 xmm xmm
// VFNMADD231PD m256 ymm ymm
// VFNMADD231PD xmm xmm xmm
// VFNMADD231PD ymm ymm ymm
// VFNMADD231PD m128 xmm k xmm
// VFNMADD231PD m256 ymm k ymm
// VFNMADD231PD xmm xmm k xmm
// VFNMADD231PD ymm ymm k ymm
// VFNMADD231PD m512 zmm k zmm
// VFNMADD231PD m512 zmm zmm
// VFNMADD231PD zmm zmm k zmm
// VFNMADD231PD zmm zmm zmm
//
// Construct and append a VFNMADD231PD instruction to the active function.
func (c *Context) VFNMADD231PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD(ops...))
}
// VFNMADD231PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PD m128 xmm xmm
// VFNMADD231PD m256 ymm ymm
// VFNMADD231PD xmm xmm xmm
// VFNMADD231PD ymm ymm ymm
// VFNMADD231PD m128 xmm k xmm
// VFNMADD231PD m256 ymm k ymm
// VFNMADD231PD xmm xmm k xmm
// VFNMADD231PD ymm ymm k ymm
// VFNMADD231PD m512 zmm k zmm
// VFNMADD231PD m512 zmm zmm
// VFNMADD231PD zmm zmm k zmm
// VFNMADD231PD zmm zmm zmm
//
// Construct and append a VFNMADD231PD instruction to the active function.
// Operates on the global context.
func VFNMADD231PD(ops ...operand.Op) { ctx.VFNMADD231PD(ops...) }
// VFNMADD231PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PD.BCST m64 xmm k xmm
// VFNMADD231PD.BCST m64 xmm xmm
// VFNMADD231PD.BCST m64 ymm k ymm
// VFNMADD231PD.BCST m64 ymm ymm
// VFNMADD231PD.BCST m64 zmm k zmm
// VFNMADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD231PD.BCST instruction to the active function.
func (c *Context) VFNMADD231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD_BCST(ops...))
}
// VFNMADD231PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PD.BCST m64 xmm k xmm
// VFNMADD231PD.BCST m64 xmm xmm
// VFNMADD231PD.BCST m64 ymm k ymm
// VFNMADD231PD.BCST m64 ymm ymm
// VFNMADD231PD.BCST m64 zmm k zmm
// VFNMADD231PD.BCST m64 zmm zmm
//
// Construct and append a VFNMADD231PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_BCST(ops ...operand.Op) { ctx.VFNMADD231PD_BCST(ops...) }
// VFNMADD231PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.BCST.Z m64 xmm k xmm
// VFNMADD231PD.BCST.Z m64 ymm k ymm
// VFNMADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD231PD.BCST.Z instruction to the active function.
func (c *Context) VFNMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD231PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.BCST.Z m64 xmm k xmm
// VFNMADD231PD.BCST.Z m64 ymm k ymm
// VFNMADD231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMADD231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD231PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD231PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PD.RD_SAE zmm zmm k zmm
// VFNMADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RD_SAE(ops...))
}
// VFNMADD231PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PD.RD_SAE zmm zmm k zmm
// VFNMADD231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD231PD_RD_SAE(ops...) }
// VFNMADD231PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD231PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PD.RN_SAE zmm zmm k zmm
// VFNMADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RN_SAE(ops...))
}
// VFNMADD231PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PD.RN_SAE zmm zmm k zmm
// VFNMADD231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD231PD_RN_SAE(ops...) }
// VFNMADD231PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD231PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PD.RU_SAE zmm zmm k zmm
// VFNMADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RU_SAE(ops...))
}
// VFNMADD231PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PD.RU_SAE zmm zmm k zmm
// VFNMADD231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD231PD_RU_SAE(ops...) }
// VFNMADD231PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD231PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE zmm zmm k zmm
// VFNMADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RZ_SAE(ops...))
}
// VFNMADD231PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE zmm zmm k zmm
// VFNMADD231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD231PD_RZ_SAE(ops...) }
// VFNMADD231PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD231PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.Z m128 xmm k xmm
// VFNMADD231PD.Z m256 ymm k ymm
// VFNMADD231PD.Z xmm xmm k xmm
// VFNMADD231PD.Z ymm ymm k ymm
// VFNMADD231PD.Z m512 zmm k zmm
// VFNMADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.Z instruction to the active function.
func (c *Context) VFNMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD231PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD231PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.Z m128 xmm k xmm
// VFNMADD231PD.Z m256 ymm k ymm
// VFNMADD231PD.Z xmm xmm k xmm
// VFNMADD231PD.Z ymm ymm k ymm
// VFNMADD231PD.Z m512 zmm k zmm
// VFNMADD231PD.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD231PD_Z(mxyz, xyz, k, xyz1) }
// VFNMADD231PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PS m128 xmm xmm
// VFNMADD231PS m256 ymm ymm
// VFNMADD231PS xmm xmm xmm
// VFNMADD231PS ymm ymm ymm
// VFNMADD231PS m128 xmm k xmm
// VFNMADD231PS m256 ymm k ymm
// VFNMADD231PS xmm xmm k xmm
// VFNMADD231PS ymm ymm k ymm
// VFNMADD231PS m512 zmm k zmm
// VFNMADD231PS m512 zmm zmm
// VFNMADD231PS zmm zmm k zmm
// VFNMADD231PS zmm zmm zmm
//
// Construct and append a VFNMADD231PS instruction to the active function.
func (c *Context) VFNMADD231PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS(ops...))
}
// VFNMADD231PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PS m128 xmm xmm
// VFNMADD231PS m256 ymm ymm
// VFNMADD231PS xmm xmm xmm
// VFNMADD231PS ymm ymm ymm
// VFNMADD231PS m128 xmm k xmm
// VFNMADD231PS m256 ymm k ymm
// VFNMADD231PS xmm xmm k xmm
// VFNMADD231PS ymm ymm k ymm
// VFNMADD231PS m512 zmm k zmm
// VFNMADD231PS m512 zmm zmm
// VFNMADD231PS zmm zmm k zmm
// VFNMADD231PS zmm zmm zmm
//
// Construct and append a VFNMADD231PS instruction to the active function.
// Operates on the global context.
func VFNMADD231PS(ops ...operand.Op) { ctx.VFNMADD231PS(ops...) }
// VFNMADD231PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PS.BCST m32 xmm k xmm
// VFNMADD231PS.BCST m32 xmm xmm
// VFNMADD231PS.BCST m32 ymm k ymm
// VFNMADD231PS.BCST m32 ymm ymm
// VFNMADD231PS.BCST m32 zmm k zmm
// VFNMADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD231PS.BCST instruction to the active function.
func (c *Context) VFNMADD231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS_BCST(ops...))
}
// VFNMADD231PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PS.BCST m32 xmm k xmm
// VFNMADD231PS.BCST m32 xmm xmm
// VFNMADD231PS.BCST m32 ymm k ymm
// VFNMADD231PS.BCST m32 ymm ymm
// VFNMADD231PS.BCST m32 zmm k zmm
// VFNMADD231PS.BCST m32 zmm zmm
//
// Construct and append a VFNMADD231PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_BCST(ops ...operand.Op) { ctx.VFNMADD231PS_BCST(ops...) }
// VFNMADD231PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.BCST.Z m32 xmm k xmm
// VFNMADD231PS.BCST.Z m32 ymm k ymm
// VFNMADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD231PS.BCST.Z instruction to the active function.
func (c *Context) VFNMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMADD231PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.BCST.Z m32 xmm k xmm
// VFNMADD231PS.BCST.Z m32 ymm k ymm
// VFNMADD231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMADD231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMADD231PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMADD231PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PS.RD_SAE zmm zmm k zmm
// VFNMADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RD_SAE(ops...))
}
// VFNMADD231PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PS.RD_SAE zmm zmm k zmm
// VFNMADD231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD231PS_RD_SAE(ops...) }
// VFNMADD231PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMADD231PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PS.RN_SAE zmm zmm k zmm
// VFNMADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RN_SAE(ops...))
}
// VFNMADD231PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PS.RN_SAE zmm zmm k zmm
// VFNMADD231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD231PS_RN_SAE(ops...) }
// VFNMADD231PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMADD231PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PS.RU_SAE zmm zmm k zmm
// VFNMADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RU_SAE(ops...))
}
// VFNMADD231PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PS.RU_SAE zmm zmm k zmm
// VFNMADD231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD231PS_RU_SAE(ops...) }
// VFNMADD231PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMADD231PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE zmm zmm k zmm
// VFNMADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RZ_SAE(ops...))
}
// VFNMADD231PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE zmm zmm k zmm
// VFNMADD231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMADD231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD231PS_RZ_SAE(ops...) }
// VFNMADD231PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMADD231PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMADD231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMADD231PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.Z m128 xmm k xmm
// VFNMADD231PS.Z m256 ymm k ymm
// VFNMADD231PS.Z xmm xmm k xmm
// VFNMADD231PS.Z ymm ymm k ymm
// VFNMADD231PS.Z m512 zmm k zmm
// VFNMADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.Z instruction to the active function.
func (c *Context) VFNMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMADD231PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMADD231PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.Z m128 xmm k xmm
// VFNMADD231PS.Z m256 ymm k ymm
// VFNMADD231PS.Z xmm xmm k xmm
// VFNMADD231PS.Z ymm ymm k ymm
// VFNMADD231PS.Z m512 zmm k zmm
// VFNMADD231PS.Z zmm zmm k zmm
//
// Construct and append a VFNMADD231PS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMADD231PS_Z(mxyz, xyz, k, xyz1) }
// VFNMADD231SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SD m64 xmm xmm
// VFNMADD231SD xmm xmm xmm
// VFNMADD231SD m64 xmm k xmm
// VFNMADD231SD xmm xmm k xmm
//
// Construct and append a VFNMADD231SD instruction to the active function.
func (c *Context) VFNMADD231SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SD(ops...))
}
// VFNMADD231SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SD m64 xmm xmm
// VFNMADD231SD xmm xmm xmm
// VFNMADD231SD m64 xmm k xmm
// VFNMADD231SD xmm xmm k xmm
//
// Construct and append a VFNMADD231SD instruction to the active function.
// Operates on the global context.
func VFNMADD231SD(ops ...operand.Op) { ctx.VFNMADD231SD(ops...) }
// VFNMADD231SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SD.RD_SAE xmm xmm k xmm
// VFNMADD231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RD_SAE instruction to the active function.
func (c *Context) VFNMADD231SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RD_SAE(ops...))
}
// VFNMADD231SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SD.RD_SAE xmm xmm k xmm
// VFNMADD231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RD_SAE(ops ...operand.Op) { ctx.VFNMADD231SD_RD_SAE(ops...) }
// VFNMADD231SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD231SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SD.RN_SAE xmm xmm k xmm
// VFNMADD231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RN_SAE instruction to the active function.
func (c *Context) VFNMADD231SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RN_SAE(ops...))
}
// VFNMADD231SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SD.RN_SAE xmm xmm k xmm
// VFNMADD231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RN_SAE(ops ...operand.Op) { ctx.VFNMADD231SD_RN_SAE(ops...) }
// VFNMADD231SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD231SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SD.RU_SAE xmm xmm k xmm
// VFNMADD231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RU_SAE instruction to the active function.
func (c *Context) VFNMADD231SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RU_SAE(ops...))
}
// VFNMADD231SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SD.RU_SAE xmm xmm k xmm
// VFNMADD231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RU_SAE(ops ...operand.Op) { ctx.VFNMADD231SD_RU_SAE(ops...) }
// VFNMADD231SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD231SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE xmm xmm k xmm
// VFNMADD231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD231SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RZ_SAE(ops...))
}
// VFNMADD231SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE xmm xmm k xmm
// VFNMADD231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD231SD_RZ_SAE(ops...) }
// VFNMADD231SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD231SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.Z m64 xmm k xmm
// VFNMADD231SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.Z instruction to the active function.
func (c *Context) VFNMADD231SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD231SD_Z(mx, x, k, x1))
}
// VFNMADD231SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.Z m64 xmm k xmm
// VFNMADD231SD.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SD.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD231SD_Z(mx, x, k, x1) }
// VFNMADD231SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SS m32 xmm xmm
// VFNMADD231SS xmm xmm xmm
// VFNMADD231SS m32 xmm k xmm
// VFNMADD231SS xmm xmm k xmm
//
// Construct and append a VFNMADD231SS instruction to the active function.
func (c *Context) VFNMADD231SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SS(ops...))
}
// VFNMADD231SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SS m32 xmm xmm
// VFNMADD231SS xmm xmm xmm
// VFNMADD231SS m32 xmm k xmm
// VFNMADD231SS xmm xmm k xmm
//
// Construct and append a VFNMADD231SS instruction to the active function.
// Operates on the global context.
func VFNMADD231SS(ops ...operand.Op) { ctx.VFNMADD231SS(ops...) }
// VFNMADD231SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SS.RD_SAE xmm xmm k xmm
// VFNMADD231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RD_SAE instruction to the active function.
func (c *Context) VFNMADD231SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RD_SAE(ops...))
}
// VFNMADD231SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SS.RD_SAE xmm xmm k xmm
// VFNMADD231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RD_SAE(ops ...operand.Op) { ctx.VFNMADD231SS_RD_SAE(ops...) }
// VFNMADD231SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMADD231SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SS.RN_SAE xmm xmm k xmm
// VFNMADD231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RN_SAE instruction to the active function.
func (c *Context) VFNMADD231SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RN_SAE(ops...))
}
// VFNMADD231SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SS.RN_SAE xmm xmm k xmm
// VFNMADD231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RN_SAE(ops ...operand.Op) { ctx.VFNMADD231SS_RN_SAE(ops...) }
// VFNMADD231SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMADD231SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SS.RU_SAE xmm xmm k xmm
// VFNMADD231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RU_SAE instruction to the active function.
func (c *Context) VFNMADD231SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RU_SAE(ops...))
}
// VFNMADD231SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SS.RU_SAE xmm xmm k xmm
// VFNMADD231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RU_SAE(ops ...operand.Op) { ctx.VFNMADD231SS_RU_SAE(ops...) }
// VFNMADD231SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMADD231SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE xmm xmm k xmm
// VFNMADD231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMADD231SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RZ_SAE(ops...))
}
// VFNMADD231SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE xmm xmm k xmm
// VFNMADD231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMADD231SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMADD231SS_RZ_SAE(ops...) }
// VFNMADD231SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMADD231SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMADD231SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMADD231SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMADD231SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.Z m32 xmm k xmm
// VFNMADD231SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.Z instruction to the active function.
func (c *Context) VFNMADD231SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMADD231SS_Z(mx, x, k, x1))
}
// VFNMADD231SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.Z m32 xmm k xmm
// VFNMADD231SS.Z xmm xmm k xmm
//
// Construct and append a VFNMADD231SS.Z instruction to the active function.
// Operates on the global context.
func VFNMADD231SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMADD231SS_Z(mx, x, k, x1) }
// VFNMSUB132PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PD m128 xmm xmm
// VFNMSUB132PD m256 ymm ymm
// VFNMSUB132PD xmm xmm xmm
// VFNMSUB132PD ymm ymm ymm
// VFNMSUB132PD m128 xmm k xmm
// VFNMSUB132PD m256 ymm k ymm
// VFNMSUB132PD xmm xmm k xmm
// VFNMSUB132PD ymm ymm k ymm
// VFNMSUB132PD m512 zmm k zmm
// VFNMSUB132PD m512 zmm zmm
// VFNMSUB132PD zmm zmm k zmm
// VFNMSUB132PD zmm zmm zmm
//
// Construct and append a VFNMSUB132PD instruction to the active function.
func (c *Context) VFNMSUB132PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD(ops...))
}
// VFNMSUB132PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PD m128 xmm xmm
// VFNMSUB132PD m256 ymm ymm
// VFNMSUB132PD xmm xmm xmm
// VFNMSUB132PD ymm ymm ymm
// VFNMSUB132PD m128 xmm k xmm
// VFNMSUB132PD m256 ymm k ymm
// VFNMSUB132PD xmm xmm k xmm
// VFNMSUB132PD ymm ymm k ymm
// VFNMSUB132PD m512 zmm k zmm
// VFNMSUB132PD m512 zmm zmm
// VFNMSUB132PD zmm zmm k zmm
// VFNMSUB132PD zmm zmm zmm
//
// Construct and append a VFNMSUB132PD instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD(ops ...operand.Op) { ctx.VFNMSUB132PD(ops...) }
// VFNMSUB132PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PD.BCST m64 xmm k xmm
// VFNMSUB132PD.BCST m64 xmm xmm
// VFNMSUB132PD.BCST m64 ymm k ymm
// VFNMSUB132PD.BCST m64 ymm ymm
// VFNMSUB132PD.BCST m64 zmm k zmm
// VFNMSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB132PD.BCST instruction to the active function.
func (c *Context) VFNMSUB132PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_BCST(ops...))
}
// VFNMSUB132PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PD.BCST m64 xmm k xmm
// VFNMSUB132PD.BCST m64 xmm xmm
// VFNMSUB132PD.BCST m64 ymm k ymm
// VFNMSUB132PD.BCST m64 ymm ymm
// VFNMSUB132PD.BCST m64 zmm k zmm
// VFNMSUB132PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB132PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_BCST(ops ...operand.Op) { ctx.VFNMSUB132PD_BCST(ops...) }
// VFNMSUB132PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.BCST.Z m64 xmm k xmm
// VFNMSUB132PD.BCST.Z m64 ymm k ymm
// VFNMSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB132PD.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB132PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.BCST.Z m64 xmm k xmm
// VFNMSUB132PD.BCST.Z m64 ymm k ymm
// VFNMSUB132PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB132PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB132PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB132PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE zmm zmm k zmm
// VFNMSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB132PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RD_SAE(ops...))
}
// VFNMSUB132PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE zmm zmm k zmm
// VFNMSUB132PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB132PD_RD_SAE(ops...) }
// VFNMSUB132PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE zmm zmm k zmm
// VFNMSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB132PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RN_SAE(ops...))
}
// VFNMSUB132PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE zmm zmm k zmm
// VFNMSUB132PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB132PD_RN_SAE(ops...) }
// VFNMSUB132PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE zmm zmm k zmm
// VFNMSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB132PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RU_SAE(ops...))
}
// VFNMSUB132PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE zmm zmm k zmm
// VFNMSUB132PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB132PD_RU_SAE(ops...) }
// VFNMSUB132PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE zmm zmm k zmm
// VFNMSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB132PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RZ_SAE(ops...))
}
// VFNMSUB132PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE zmm zmm k zmm
// VFNMSUB132PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB132PD_RZ_SAE(ops...) }
// VFNMSUB132PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.Z m128 xmm k xmm
// VFNMSUB132PD.Z m256 ymm k ymm
// VFNMSUB132PD.Z xmm xmm k xmm
// VFNMSUB132PD.Z ymm ymm k ymm
// VFNMSUB132PD.Z m512 zmm k zmm
// VFNMSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.Z instruction to the active function.
func (c *Context) VFNMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB132PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB132PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.Z m128 xmm k xmm
// VFNMSUB132PD.Z m256 ymm k ymm
// VFNMSUB132PD.Z xmm xmm k xmm
// VFNMSUB132PD.Z ymm ymm k ymm
// VFNMSUB132PD.Z m512 zmm k zmm
// VFNMSUB132PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB132PD_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB132PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PS m128 xmm xmm
// VFNMSUB132PS m256 ymm ymm
// VFNMSUB132PS xmm xmm xmm
// VFNMSUB132PS ymm ymm ymm
// VFNMSUB132PS m128 xmm k xmm
// VFNMSUB132PS m256 ymm k ymm
// VFNMSUB132PS xmm xmm k xmm
// VFNMSUB132PS ymm ymm k ymm
// VFNMSUB132PS m512 zmm k zmm
// VFNMSUB132PS m512 zmm zmm
// VFNMSUB132PS zmm zmm k zmm
// VFNMSUB132PS zmm zmm zmm
//
// Construct and append a VFNMSUB132PS instruction to the active function.
func (c *Context) VFNMSUB132PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS(ops...))
}
// VFNMSUB132PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PS m128 xmm xmm
// VFNMSUB132PS m256 ymm ymm
// VFNMSUB132PS xmm xmm xmm
// VFNMSUB132PS ymm ymm ymm
// VFNMSUB132PS m128 xmm k xmm
// VFNMSUB132PS m256 ymm k ymm
// VFNMSUB132PS xmm xmm k xmm
// VFNMSUB132PS ymm ymm k ymm
// VFNMSUB132PS m512 zmm k zmm
// VFNMSUB132PS m512 zmm zmm
// VFNMSUB132PS zmm zmm k zmm
// VFNMSUB132PS zmm zmm zmm
//
// Construct and append a VFNMSUB132PS instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS(ops ...operand.Op) { ctx.VFNMSUB132PS(ops...) }
// VFNMSUB132PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PS.BCST m32 xmm k xmm
// VFNMSUB132PS.BCST m32 xmm xmm
// VFNMSUB132PS.BCST m32 ymm k ymm
// VFNMSUB132PS.BCST m32 ymm ymm
// VFNMSUB132PS.BCST m32 zmm k zmm
// VFNMSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB132PS.BCST instruction to the active function.
func (c *Context) VFNMSUB132PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_BCST(ops...))
}
// VFNMSUB132PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PS.BCST m32 xmm k xmm
// VFNMSUB132PS.BCST m32 xmm xmm
// VFNMSUB132PS.BCST m32 ymm k ymm
// VFNMSUB132PS.BCST m32 ymm ymm
// VFNMSUB132PS.BCST m32 zmm k zmm
// VFNMSUB132PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB132PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_BCST(ops ...operand.Op) { ctx.VFNMSUB132PS_BCST(ops...) }
// VFNMSUB132PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.BCST.Z m32 xmm k xmm
// VFNMSUB132PS.BCST.Z m32 ymm k ymm
// VFNMSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB132PS.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB132PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.BCST.Z m32 xmm k xmm
// VFNMSUB132PS.BCST.Z m32 ymm k ymm
// VFNMSUB132PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB132PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB132PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB132PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE zmm zmm k zmm
// VFNMSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB132PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RD_SAE(ops...))
}
// VFNMSUB132PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE zmm zmm k zmm
// VFNMSUB132PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB132PS_RD_SAE(ops...) }
// VFNMSUB132PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE zmm zmm k zmm
// VFNMSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB132PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RN_SAE(ops...))
}
// VFNMSUB132PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE zmm zmm k zmm
// VFNMSUB132PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB132PS_RN_SAE(ops...) }
// VFNMSUB132PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE zmm zmm k zmm
// VFNMSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB132PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RU_SAE(ops...))
}
// VFNMSUB132PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE zmm zmm k zmm
// VFNMSUB132PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB132PS_RU_SAE(ops...) }
// VFNMSUB132PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE zmm zmm k zmm
// VFNMSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB132PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RZ_SAE(ops...))
}
// VFNMSUB132PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE zmm zmm k zmm
// VFNMSUB132PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB132PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB132PS_RZ_SAE(ops...) }
// VFNMSUB132PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB132PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB132PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB132PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.Z m128 xmm k xmm
// VFNMSUB132PS.Z m256 ymm k ymm
// VFNMSUB132PS.Z xmm xmm k xmm
// VFNMSUB132PS.Z ymm ymm k ymm
// VFNMSUB132PS.Z m512 zmm k zmm
// VFNMSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.Z instruction to the active function.
func (c *Context) VFNMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB132PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB132PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.Z m128 xmm k xmm
// VFNMSUB132PS.Z m256 ymm k ymm
// VFNMSUB132PS.Z xmm xmm k xmm
// VFNMSUB132PS.Z ymm ymm k ymm
// VFNMSUB132PS.Z m512 zmm k zmm
// VFNMSUB132PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB132PS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB132PS_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB132SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SD m64 xmm xmm
// VFNMSUB132SD xmm xmm xmm
// VFNMSUB132SD m64 xmm k xmm
// VFNMSUB132SD xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD instruction to the active function.
func (c *Context) VFNMSUB132SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SD(ops...))
}
// VFNMSUB132SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SD m64 xmm xmm
// VFNMSUB132SD xmm xmm xmm
// VFNMSUB132SD m64 xmm k xmm
// VFNMSUB132SD xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD(ops ...operand.Op) { ctx.VFNMSUB132SD(ops...) }
// VFNMSUB132SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE xmm xmm k xmm
// VFNMSUB132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB132SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RD_SAE(ops...))
}
// VFNMSUB132SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE xmm xmm k xmm
// VFNMSUB132SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB132SD_RD_SAE(ops...) }
// VFNMSUB132SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE xmm xmm k xmm
// VFNMSUB132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB132SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RN_SAE(ops...))
}
// VFNMSUB132SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE xmm xmm k xmm
// VFNMSUB132SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB132SD_RN_SAE(ops...) }
// VFNMSUB132SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE xmm xmm k xmm
// VFNMSUB132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB132SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RU_SAE(ops...))
}
// VFNMSUB132SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE xmm xmm k xmm
// VFNMSUB132SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB132SD_RU_SAE(ops...) }
// VFNMSUB132SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE xmm xmm k xmm
// VFNMSUB132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB132SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RZ_SAE(ops...))
}
// VFNMSUB132SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE xmm xmm k xmm
// VFNMSUB132SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB132SD_RZ_SAE(ops...) }
// VFNMSUB132SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.Z m64 xmm k xmm
// VFNMSUB132SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.Z instruction to the active function.
func (c *Context) VFNMSUB132SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB132SD_Z(mx, x, k, x1))
}
// VFNMSUB132SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.Z m64 xmm k xmm
// VFNMSUB132SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB132SD_Z(mx, x, k, x1) }
// VFNMSUB132SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SS m32 xmm xmm
// VFNMSUB132SS xmm xmm xmm
// VFNMSUB132SS m32 xmm k xmm
// VFNMSUB132SS xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS instruction to the active function.
func (c *Context) VFNMSUB132SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SS(ops...))
}
// VFNMSUB132SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SS m32 xmm xmm
// VFNMSUB132SS xmm xmm xmm
// VFNMSUB132SS m32 xmm k xmm
// VFNMSUB132SS xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS(ops ...operand.Op) { ctx.VFNMSUB132SS(ops...) }
// VFNMSUB132SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE xmm xmm k xmm
// VFNMSUB132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB132SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RD_SAE(ops...))
}
// VFNMSUB132SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE xmm xmm k xmm
// VFNMSUB132SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB132SS_RD_SAE(ops...) }
// VFNMSUB132SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE xmm xmm k xmm
// VFNMSUB132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB132SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RN_SAE(ops...))
}
// VFNMSUB132SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE xmm xmm k xmm
// VFNMSUB132SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB132SS_RN_SAE(ops...) }
// VFNMSUB132SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE xmm xmm k xmm
// VFNMSUB132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB132SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RU_SAE(ops...))
}
// VFNMSUB132SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE xmm xmm k xmm
// VFNMSUB132SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB132SS_RU_SAE(ops...) }
// VFNMSUB132SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE xmm xmm k xmm
// VFNMSUB132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB132SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RZ_SAE(ops...))
}
// VFNMSUB132SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE xmm xmm k xmm
// VFNMSUB132SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB132SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB132SS_RZ_SAE(ops...) }
// VFNMSUB132SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB132SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB132SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB132SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.Z m32 xmm k xmm
// VFNMSUB132SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.Z instruction to the active function.
func (c *Context) VFNMSUB132SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB132SS_Z(mx, x, k, x1))
}
// VFNMSUB132SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.Z m32 xmm k xmm
// VFNMSUB132SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB132SS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB132SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB132SS_Z(mx, x, k, x1) }
// VFNMSUB213PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PD m128 xmm xmm
// VFNMSUB213PD m256 ymm ymm
// VFNMSUB213PD xmm xmm xmm
// VFNMSUB213PD ymm ymm ymm
// VFNMSUB213PD m128 xmm k xmm
// VFNMSUB213PD m256 ymm k ymm
// VFNMSUB213PD xmm xmm k xmm
// VFNMSUB213PD ymm ymm k ymm
// VFNMSUB213PD m512 zmm k zmm
// VFNMSUB213PD m512 zmm zmm
// VFNMSUB213PD zmm zmm k zmm
// VFNMSUB213PD zmm zmm zmm
//
// Construct and append a VFNMSUB213PD instruction to the active function.
func (c *Context) VFNMSUB213PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD(ops...))
}
// VFNMSUB213PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PD m128 xmm xmm
// VFNMSUB213PD m256 ymm ymm
// VFNMSUB213PD xmm xmm xmm
// VFNMSUB213PD ymm ymm ymm
// VFNMSUB213PD m128 xmm k xmm
// VFNMSUB213PD m256 ymm k ymm
// VFNMSUB213PD xmm xmm k xmm
// VFNMSUB213PD ymm ymm k ymm
// VFNMSUB213PD m512 zmm k zmm
// VFNMSUB213PD m512 zmm zmm
// VFNMSUB213PD zmm zmm k zmm
// VFNMSUB213PD zmm zmm zmm
//
// Construct and append a VFNMSUB213PD instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD(ops ...operand.Op) { ctx.VFNMSUB213PD(ops...) }
// VFNMSUB213PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PD.BCST m64 xmm k xmm
// VFNMSUB213PD.BCST m64 xmm xmm
// VFNMSUB213PD.BCST m64 ymm k ymm
// VFNMSUB213PD.BCST m64 ymm ymm
// VFNMSUB213PD.BCST m64 zmm k zmm
// VFNMSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB213PD.BCST instruction to the active function.
func (c *Context) VFNMSUB213PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_BCST(ops...))
}
// VFNMSUB213PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PD.BCST m64 xmm k xmm
// VFNMSUB213PD.BCST m64 xmm xmm
// VFNMSUB213PD.BCST m64 ymm k ymm
// VFNMSUB213PD.BCST m64 ymm ymm
// VFNMSUB213PD.BCST m64 zmm k zmm
// VFNMSUB213PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB213PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_BCST(ops ...operand.Op) { ctx.VFNMSUB213PD_BCST(ops...) }
// VFNMSUB213PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.BCST.Z m64 xmm k xmm
// VFNMSUB213PD.BCST.Z m64 ymm k ymm
// VFNMSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB213PD.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB213PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.BCST.Z m64 xmm k xmm
// VFNMSUB213PD.BCST.Z m64 ymm k ymm
// VFNMSUB213PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB213PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB213PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB213PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE zmm zmm k zmm
// VFNMSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB213PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RD_SAE(ops...))
}
// VFNMSUB213PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE zmm zmm k zmm
// VFNMSUB213PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB213PD_RD_SAE(ops...) }
// VFNMSUB213PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE zmm zmm k zmm
// VFNMSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB213PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RN_SAE(ops...))
}
// VFNMSUB213PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE zmm zmm k zmm
// VFNMSUB213PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB213PD_RN_SAE(ops...) }
// VFNMSUB213PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE zmm zmm k zmm
// VFNMSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB213PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RU_SAE(ops...))
}
// VFNMSUB213PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE zmm zmm k zmm
// VFNMSUB213PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB213PD_RU_SAE(ops...) }
// VFNMSUB213PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE zmm zmm k zmm
// VFNMSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB213PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RZ_SAE(ops...))
}
// VFNMSUB213PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE zmm zmm k zmm
// VFNMSUB213PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB213PD_RZ_SAE(ops...) }
// VFNMSUB213PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.Z m128 xmm k xmm
// VFNMSUB213PD.Z m256 ymm k ymm
// VFNMSUB213PD.Z xmm xmm k xmm
// VFNMSUB213PD.Z ymm ymm k ymm
// VFNMSUB213PD.Z m512 zmm k zmm
// VFNMSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.Z instruction to the active function.
func (c *Context) VFNMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB213PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB213PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.Z m128 xmm k xmm
// VFNMSUB213PD.Z m256 ymm k ymm
// VFNMSUB213PD.Z xmm xmm k xmm
// VFNMSUB213PD.Z ymm ymm k ymm
// VFNMSUB213PD.Z m512 zmm k zmm
// VFNMSUB213PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB213PD_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB213PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PS m128 xmm xmm
// VFNMSUB213PS m256 ymm ymm
// VFNMSUB213PS xmm xmm xmm
// VFNMSUB213PS ymm ymm ymm
// VFNMSUB213PS m128 xmm k xmm
// VFNMSUB213PS m256 ymm k ymm
// VFNMSUB213PS xmm xmm k xmm
// VFNMSUB213PS ymm ymm k ymm
// VFNMSUB213PS m512 zmm k zmm
// VFNMSUB213PS m512 zmm zmm
// VFNMSUB213PS zmm zmm k zmm
// VFNMSUB213PS zmm zmm zmm
//
// Construct and append a VFNMSUB213PS instruction to the active function.
func (c *Context) VFNMSUB213PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS(ops...))
}
// VFNMSUB213PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PS m128 xmm xmm
// VFNMSUB213PS m256 ymm ymm
// VFNMSUB213PS xmm xmm xmm
// VFNMSUB213PS ymm ymm ymm
// VFNMSUB213PS m128 xmm k xmm
// VFNMSUB213PS m256 ymm k ymm
// VFNMSUB213PS xmm xmm k xmm
// VFNMSUB213PS ymm ymm k ymm
// VFNMSUB213PS m512 zmm k zmm
// VFNMSUB213PS m512 zmm zmm
// VFNMSUB213PS zmm zmm k zmm
// VFNMSUB213PS zmm zmm zmm
//
// Construct and append a VFNMSUB213PS instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS(ops ...operand.Op) { ctx.VFNMSUB213PS(ops...) }
// VFNMSUB213PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PS.BCST m32 xmm k xmm
// VFNMSUB213PS.BCST m32 xmm xmm
// VFNMSUB213PS.BCST m32 ymm k ymm
// VFNMSUB213PS.BCST m32 ymm ymm
// VFNMSUB213PS.BCST m32 zmm k zmm
// VFNMSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB213PS.BCST instruction to the active function.
func (c *Context) VFNMSUB213PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_BCST(ops...))
}
// VFNMSUB213PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PS.BCST m32 xmm k xmm
// VFNMSUB213PS.BCST m32 xmm xmm
// VFNMSUB213PS.BCST m32 ymm k ymm
// VFNMSUB213PS.BCST m32 ymm ymm
// VFNMSUB213PS.BCST m32 zmm k zmm
// VFNMSUB213PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB213PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_BCST(ops ...operand.Op) { ctx.VFNMSUB213PS_BCST(ops...) }
// VFNMSUB213PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.BCST.Z m32 xmm k xmm
// VFNMSUB213PS.BCST.Z m32 ymm k ymm
// VFNMSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB213PS.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB213PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.BCST.Z m32 xmm k xmm
// VFNMSUB213PS.BCST.Z m32 ymm k ymm
// VFNMSUB213PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB213PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB213PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB213PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE zmm zmm k zmm
// VFNMSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB213PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RD_SAE(ops...))
}
// VFNMSUB213PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE zmm zmm k zmm
// VFNMSUB213PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB213PS_RD_SAE(ops...) }
// VFNMSUB213PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE zmm zmm k zmm
// VFNMSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB213PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RN_SAE(ops...))
}
// VFNMSUB213PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE zmm zmm k zmm
// VFNMSUB213PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB213PS_RN_SAE(ops...) }
// VFNMSUB213PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE zmm zmm k zmm
// VFNMSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB213PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RU_SAE(ops...))
}
// VFNMSUB213PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE zmm zmm k zmm
// VFNMSUB213PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB213PS_RU_SAE(ops...) }
// VFNMSUB213PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE zmm zmm k zmm
// VFNMSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB213PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RZ_SAE(ops...))
}
// VFNMSUB213PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE zmm zmm k zmm
// VFNMSUB213PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB213PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB213PS_RZ_SAE(ops...) }
// VFNMSUB213PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB213PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB213PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB213PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.Z m128 xmm k xmm
// VFNMSUB213PS.Z m256 ymm k ymm
// VFNMSUB213PS.Z xmm xmm k xmm
// VFNMSUB213PS.Z ymm ymm k ymm
// VFNMSUB213PS.Z m512 zmm k zmm
// VFNMSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.Z instruction to the active function.
func (c *Context) VFNMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB213PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB213PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.Z m128 xmm k xmm
// VFNMSUB213PS.Z m256 ymm k ymm
// VFNMSUB213PS.Z xmm xmm k xmm
// VFNMSUB213PS.Z ymm ymm k ymm
// VFNMSUB213PS.Z m512 zmm k zmm
// VFNMSUB213PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB213PS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB213PS_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB213SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SD m64 xmm xmm
// VFNMSUB213SD xmm xmm xmm
// VFNMSUB213SD m64 xmm k xmm
// VFNMSUB213SD xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD instruction to the active function.
func (c *Context) VFNMSUB213SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SD(ops...))
}
// VFNMSUB213SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SD m64 xmm xmm
// VFNMSUB213SD xmm xmm xmm
// VFNMSUB213SD m64 xmm k xmm
// VFNMSUB213SD xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD(ops ...operand.Op) { ctx.VFNMSUB213SD(ops...) }
// VFNMSUB213SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE xmm xmm k xmm
// VFNMSUB213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB213SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RD_SAE(ops...))
}
// VFNMSUB213SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE xmm xmm k xmm
// VFNMSUB213SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB213SD_RD_SAE(ops...) }
// VFNMSUB213SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE xmm xmm k xmm
// VFNMSUB213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB213SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RN_SAE(ops...))
}
// VFNMSUB213SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE xmm xmm k xmm
// VFNMSUB213SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB213SD_RN_SAE(ops...) }
// VFNMSUB213SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE xmm xmm k xmm
// VFNMSUB213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB213SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RU_SAE(ops...))
}
// VFNMSUB213SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE xmm xmm k xmm
// VFNMSUB213SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB213SD_RU_SAE(ops...) }
// VFNMSUB213SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE xmm xmm k xmm
// VFNMSUB213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB213SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RZ_SAE(ops...))
}
// VFNMSUB213SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE xmm xmm k xmm
// VFNMSUB213SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB213SD_RZ_SAE(ops...) }
// VFNMSUB213SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.Z m64 xmm k xmm
// VFNMSUB213SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.Z instruction to the active function.
func (c *Context) VFNMSUB213SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB213SD_Z(mx, x, k, x1))
}
// VFNMSUB213SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.Z m64 xmm k xmm
// VFNMSUB213SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB213SD_Z(mx, x, k, x1) }
// VFNMSUB213SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SS m32 xmm xmm
// VFNMSUB213SS xmm xmm xmm
// VFNMSUB213SS m32 xmm k xmm
// VFNMSUB213SS xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS instruction to the active function.
func (c *Context) VFNMSUB213SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SS(ops...))
}
// VFNMSUB213SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SS m32 xmm xmm
// VFNMSUB213SS xmm xmm xmm
// VFNMSUB213SS m32 xmm k xmm
// VFNMSUB213SS xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS(ops ...operand.Op) { ctx.VFNMSUB213SS(ops...) }
// VFNMSUB213SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE xmm xmm k xmm
// VFNMSUB213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB213SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RD_SAE(ops...))
}
// VFNMSUB213SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE xmm xmm k xmm
// VFNMSUB213SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB213SS_RD_SAE(ops...) }
// VFNMSUB213SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE xmm xmm k xmm
// VFNMSUB213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB213SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RN_SAE(ops...))
}
// VFNMSUB213SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE xmm xmm k xmm
// VFNMSUB213SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB213SS_RN_SAE(ops...) }
// VFNMSUB213SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE xmm xmm k xmm
// VFNMSUB213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB213SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RU_SAE(ops...))
}
// VFNMSUB213SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE xmm xmm k xmm
// VFNMSUB213SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB213SS_RU_SAE(ops...) }
// VFNMSUB213SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE xmm xmm k xmm
// VFNMSUB213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB213SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RZ_SAE(ops...))
}
// VFNMSUB213SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE xmm xmm k xmm
// VFNMSUB213SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB213SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB213SS_RZ_SAE(ops...) }
// VFNMSUB213SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB213SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB213SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB213SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.Z m32 xmm k xmm
// VFNMSUB213SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.Z instruction to the active function.
func (c *Context) VFNMSUB213SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB213SS_Z(mx, x, k, x1))
}
// VFNMSUB213SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.Z m32 xmm k xmm
// VFNMSUB213SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB213SS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB213SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB213SS_Z(mx, x, k, x1) }
// VFNMSUB231PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PD m128 xmm xmm
// VFNMSUB231PD m256 ymm ymm
// VFNMSUB231PD xmm xmm xmm
// VFNMSUB231PD ymm ymm ymm
// VFNMSUB231PD m128 xmm k xmm
// VFNMSUB231PD m256 ymm k ymm
// VFNMSUB231PD xmm xmm k xmm
// VFNMSUB231PD ymm ymm k ymm
// VFNMSUB231PD m512 zmm k zmm
// VFNMSUB231PD m512 zmm zmm
// VFNMSUB231PD zmm zmm k zmm
// VFNMSUB231PD zmm zmm zmm
//
// Construct and append a VFNMSUB231PD instruction to the active function.
func (c *Context) VFNMSUB231PD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD(ops...))
}
// VFNMSUB231PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PD m128 xmm xmm
// VFNMSUB231PD m256 ymm ymm
// VFNMSUB231PD xmm xmm xmm
// VFNMSUB231PD ymm ymm ymm
// VFNMSUB231PD m128 xmm k xmm
// VFNMSUB231PD m256 ymm k ymm
// VFNMSUB231PD xmm xmm k xmm
// VFNMSUB231PD ymm ymm k ymm
// VFNMSUB231PD m512 zmm k zmm
// VFNMSUB231PD m512 zmm zmm
// VFNMSUB231PD zmm zmm k zmm
// VFNMSUB231PD zmm zmm zmm
//
// Construct and append a VFNMSUB231PD instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD(ops ...operand.Op) { ctx.VFNMSUB231PD(ops...) }
// VFNMSUB231PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PD.BCST m64 xmm k xmm
// VFNMSUB231PD.BCST m64 xmm xmm
// VFNMSUB231PD.BCST m64 ymm k ymm
// VFNMSUB231PD.BCST m64 ymm ymm
// VFNMSUB231PD.BCST m64 zmm k zmm
// VFNMSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB231PD.BCST instruction to the active function.
func (c *Context) VFNMSUB231PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_BCST(ops...))
}
// VFNMSUB231PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PD.BCST m64 xmm k xmm
// VFNMSUB231PD.BCST m64 xmm xmm
// VFNMSUB231PD.BCST m64 ymm k ymm
// VFNMSUB231PD.BCST m64 ymm ymm
// VFNMSUB231PD.BCST m64 zmm k zmm
// VFNMSUB231PD.BCST m64 zmm zmm
//
// Construct and append a VFNMSUB231PD.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_BCST(ops ...operand.Op) { ctx.VFNMSUB231PD_BCST(ops...) }
// VFNMSUB231PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.BCST.Z m64 xmm k xmm
// VFNMSUB231PD.BCST.Z m64 ymm k ymm
// VFNMSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB231PD.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB231PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.BCST.Z m64 xmm k xmm
// VFNMSUB231PD.BCST.Z m64 ymm k ymm
// VFNMSUB231PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VFNMSUB231PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB231PD_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB231PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE zmm zmm k zmm
// VFNMSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB231PD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RD_SAE(ops...))
}
// VFNMSUB231PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE zmm zmm k zmm
// VFNMSUB231PD.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB231PD_RD_SAE(ops...) }
// VFNMSUB231PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PD_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE zmm zmm k zmm
// VFNMSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB231PD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RN_SAE(ops...))
}
// VFNMSUB231PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE zmm zmm k zmm
// VFNMSUB231PD.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB231PD_RN_SAE(ops...) }
// VFNMSUB231PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PD_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE zmm zmm k zmm
// VFNMSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB231PD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RU_SAE(ops...))
}
// VFNMSUB231PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE zmm zmm k zmm
// VFNMSUB231PD.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB231PD_RU_SAE(ops...) }
// VFNMSUB231PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PD_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE zmm zmm k zmm
// VFNMSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB231PD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RZ_SAE(ops...))
}
// VFNMSUB231PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE zmm zmm k zmm
// VFNMSUB231PD.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB231PD_RZ_SAE(ops...) }
// VFNMSUB231PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PD_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.Z m128 xmm k xmm
// VFNMSUB231PD.Z m256 ymm k ymm
// VFNMSUB231PD.Z xmm xmm k xmm
// VFNMSUB231PD.Z ymm ymm k ymm
// VFNMSUB231PD.Z m512 zmm k zmm
// VFNMSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.Z instruction to the active function.
func (c *Context) VFNMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB231PD_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB231PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.Z m128 xmm k xmm
// VFNMSUB231PD.Z m256 ymm k ymm
// VFNMSUB231PD.Z xmm xmm k xmm
// VFNMSUB231PD.Z ymm ymm k ymm
// VFNMSUB231PD.Z m512 zmm k zmm
// VFNMSUB231PD.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB231PD_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB231PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PS m128 xmm xmm
// VFNMSUB231PS m256 ymm ymm
// VFNMSUB231PS xmm xmm xmm
// VFNMSUB231PS ymm ymm ymm
// VFNMSUB231PS m128 xmm k xmm
// VFNMSUB231PS m256 ymm k ymm
// VFNMSUB231PS xmm xmm k xmm
// VFNMSUB231PS ymm ymm k ymm
// VFNMSUB231PS m512 zmm k zmm
// VFNMSUB231PS m512 zmm zmm
// VFNMSUB231PS zmm zmm k zmm
// VFNMSUB231PS zmm zmm zmm
//
// Construct and append a VFNMSUB231PS instruction to the active function.
func (c *Context) VFNMSUB231PS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS(ops...))
}
// VFNMSUB231PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PS m128 xmm xmm
// VFNMSUB231PS m256 ymm ymm
// VFNMSUB231PS xmm xmm xmm
// VFNMSUB231PS ymm ymm ymm
// VFNMSUB231PS m128 xmm k xmm
// VFNMSUB231PS m256 ymm k ymm
// VFNMSUB231PS xmm xmm k xmm
// VFNMSUB231PS ymm ymm k ymm
// VFNMSUB231PS m512 zmm k zmm
// VFNMSUB231PS m512 zmm zmm
// VFNMSUB231PS zmm zmm k zmm
// VFNMSUB231PS zmm zmm zmm
//
// Construct and append a VFNMSUB231PS instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS(ops ...operand.Op) { ctx.VFNMSUB231PS(ops...) }
// VFNMSUB231PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PS.BCST m32 xmm k xmm
// VFNMSUB231PS.BCST m32 xmm xmm
// VFNMSUB231PS.BCST m32 ymm k ymm
// VFNMSUB231PS.BCST m32 ymm ymm
// VFNMSUB231PS.BCST m32 zmm k zmm
// VFNMSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB231PS.BCST instruction to the active function.
func (c *Context) VFNMSUB231PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_BCST(ops...))
}
// VFNMSUB231PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PS.BCST m32 xmm k xmm
// VFNMSUB231PS.BCST m32 xmm xmm
// VFNMSUB231PS.BCST m32 ymm k ymm
// VFNMSUB231PS.BCST m32 ymm ymm
// VFNMSUB231PS.BCST m32 zmm k zmm
// VFNMSUB231PS.BCST m32 zmm zmm
//
// Construct and append a VFNMSUB231PS.BCST instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_BCST(ops ...operand.Op) { ctx.VFNMSUB231PS_BCST(ops...) }
// VFNMSUB231PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.BCST.Z m32 xmm k xmm
// VFNMSUB231PS.BCST.Z m32 ymm k ymm
// VFNMSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB231PS.BCST.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_BCST_Z(m, xyz, k, xyz1))
}
// VFNMSUB231PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.BCST.Z m32 xmm k xmm
// VFNMSUB231PS.BCST.Z m32 ymm k ymm
// VFNMSUB231PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VFNMSUB231PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB231PS_BCST_Z(m, xyz, k, xyz1) }
// VFNMSUB231PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE zmm zmm k zmm
// VFNMSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB231PS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RD_SAE(ops...))
}
// VFNMSUB231PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE zmm zmm k zmm
// VFNMSUB231PS.RD_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB231PS_RD_SAE(ops...) }
// VFNMSUB231PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RD_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PS_RD_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE zmm zmm k zmm
// VFNMSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB231PS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RN_SAE(ops...))
}
// VFNMSUB231PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE zmm zmm k zmm
// VFNMSUB231PS.RN_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB231PS_RN_SAE(ops...) }
// VFNMSUB231PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RN_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PS_RN_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE zmm zmm k zmm
// VFNMSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB231PS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RU_SAE(ops...))
}
// VFNMSUB231PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE zmm zmm k zmm
// VFNMSUB231PS.RU_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB231PS_RU_SAE(ops...) }
// VFNMSUB231PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RU_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PS_RU_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE zmm zmm k zmm
// VFNMSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB231PS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RZ_SAE(ops...))
}
// VFNMSUB231PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE zmm zmm k zmm
// VFNMSUB231PS.RZ_SAE zmm zmm zmm
//
// Construct and append a VFNMSUB231PS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB231PS_RZ_SAE(ops...) }
// VFNMSUB231PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_RZ_SAE_Z(z, z1, k, z2))
}
// VFNMSUB231PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VFNMSUB231PS_RZ_SAE_Z(z, z1, k, z2) }
// VFNMSUB231PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.Z m128 xmm k xmm
// VFNMSUB231PS.Z m256 ymm k ymm
// VFNMSUB231PS.Z xmm xmm k xmm
// VFNMSUB231PS.Z ymm ymm k ymm
// VFNMSUB231PS.Z m512 zmm k zmm
// VFNMSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.Z instruction to the active function.
func (c *Context) VFNMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VFNMSUB231PS_Z(mxyz, xyz, k, xyz1))
}
// VFNMSUB231PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.Z m128 xmm k xmm
// VFNMSUB231PS.Z m256 ymm k ymm
// VFNMSUB231PS.Z xmm xmm k xmm
// VFNMSUB231PS.Z ymm ymm k ymm
// VFNMSUB231PS.Z m512 zmm k zmm
// VFNMSUB231PS.Z zmm zmm k zmm
//
// Construct and append a VFNMSUB231PS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VFNMSUB231PS_Z(mxyz, xyz, k, xyz1) }
// VFNMSUB231SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SD m64 xmm xmm
// VFNMSUB231SD xmm xmm xmm
// VFNMSUB231SD m64 xmm k xmm
// VFNMSUB231SD xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD instruction to the active function.
func (c *Context) VFNMSUB231SD(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SD(ops...))
}
// VFNMSUB231SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SD m64 xmm xmm
// VFNMSUB231SD xmm xmm xmm
// VFNMSUB231SD m64 xmm k xmm
// VFNMSUB231SD xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD(ops ...operand.Op) { ctx.VFNMSUB231SD(ops...) }
// VFNMSUB231SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE xmm xmm k xmm
// VFNMSUB231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB231SD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RD_SAE(ops...))
}
// VFNMSUB231SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE xmm xmm k xmm
// VFNMSUB231SD.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB231SD_RD_SAE(ops...) }
// VFNMSUB231SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SD_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE xmm xmm k xmm
// VFNMSUB231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB231SD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RN_SAE(ops...))
}
// VFNMSUB231SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE xmm xmm k xmm
// VFNMSUB231SD.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB231SD_RN_SAE(ops...) }
// VFNMSUB231SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SD_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE xmm xmm k xmm
// VFNMSUB231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB231SD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RU_SAE(ops...))
}
// VFNMSUB231SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE xmm xmm k xmm
// VFNMSUB231SD.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB231SD_RU_SAE(ops...) }
// VFNMSUB231SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SD_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE xmm xmm k xmm
// VFNMSUB231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB231SD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RZ_SAE(ops...))
}
// VFNMSUB231SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE xmm xmm k xmm
// VFNMSUB231SD.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB231SD_RZ_SAE(ops...) }
// VFNMSUB231SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SD_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.Z m64 xmm k xmm
// VFNMSUB231SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.Z instruction to the active function.
func (c *Context) VFNMSUB231SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB231SD_Z(mx, x, k, x1))
}
// VFNMSUB231SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.Z m64 xmm k xmm
// VFNMSUB231SD.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SD.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SD_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB231SD_Z(mx, x, k, x1) }
// VFNMSUB231SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SS m32 xmm xmm
// VFNMSUB231SS xmm xmm xmm
// VFNMSUB231SS m32 xmm k xmm
// VFNMSUB231SS xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS instruction to the active function.
func (c *Context) VFNMSUB231SS(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SS(ops...))
}
// VFNMSUB231SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SS m32 xmm xmm
// VFNMSUB231SS xmm xmm xmm
// VFNMSUB231SS m32 xmm k xmm
// VFNMSUB231SS xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS(ops ...operand.Op) { ctx.VFNMSUB231SS(ops...) }
// VFNMSUB231SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE xmm xmm k xmm
// VFNMSUB231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RD_SAE instruction to the active function.
func (c *Context) VFNMSUB231SS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RD_SAE(ops...))
}
// VFNMSUB231SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE xmm xmm k xmm
// VFNMSUB231SS.RD_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RD_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RD_SAE(ops ...operand.Op) { ctx.VFNMSUB231SS_RD_SAE(ops...) }
// VFNMSUB231SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RD_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RD_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SS_RD_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE xmm xmm k xmm
// VFNMSUB231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RN_SAE instruction to the active function.
func (c *Context) VFNMSUB231SS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RN_SAE(ops...))
}
// VFNMSUB231SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE xmm xmm k xmm
// VFNMSUB231SS.RN_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RN_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RN_SAE(ops ...operand.Op) { ctx.VFNMSUB231SS_RN_SAE(ops...) }
// VFNMSUB231SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RN_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RN_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SS_RN_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE xmm xmm k xmm
// VFNMSUB231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RU_SAE instruction to the active function.
func (c *Context) VFNMSUB231SS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RU_SAE(ops...))
}
// VFNMSUB231SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE xmm xmm k xmm
// VFNMSUB231SS.RU_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RU_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RU_SAE(ops ...operand.Op) { ctx.VFNMSUB231SS_RU_SAE(ops...) }
// VFNMSUB231SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RU_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RU_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SS_RU_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE xmm xmm k xmm
// VFNMSUB231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RZ_SAE instruction to the active function.
func (c *Context) VFNMSUB231SS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RZ_SAE(ops...))
}
// VFNMSUB231SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE xmm xmm k xmm
// VFNMSUB231SS.RZ_SAE xmm xmm xmm
//
// Construct and append a VFNMSUB231SS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RZ_SAE(ops ...operand.Op) { ctx.VFNMSUB231SS_RZ_SAE(ops...) }
// VFNMSUB231SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RZ_SAE.Z instruction to the active function.
func (c *Context) VFNMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_RZ_SAE_Z(x, x1, k, x2))
}
// VFNMSUB231SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VFNMSUB231SS_RZ_SAE_Z(x, x1, k, x2) }
// VFNMSUB231SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.Z m32 xmm k xmm
// VFNMSUB231SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.Z instruction to the active function.
func (c *Context) VFNMSUB231SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VFNMSUB231SS_Z(mx, x, k, x1))
}
// VFNMSUB231SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.Z m32 xmm k xmm
// VFNMSUB231SS.Z xmm xmm k xmm
//
// Construct and append a VFNMSUB231SS.Z instruction to the active function.
// Operates on the global context.
func VFNMSUB231SS_Z(mx, x, k, x1 operand.Op) { ctx.VFNMSUB231SS_Z(mx, x, k, x1) }
// VFPCLASSPDX: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDX imm8 m128 k k
// VFPCLASSPDX imm8 m128 k
// VFPCLASSPDX imm8 xmm k k
// VFPCLASSPDX imm8 xmm k
//
// Construct and append a VFPCLASSPDX instruction to the active function.
func (c *Context) VFPCLASSPDX(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDX(ops...))
}
// VFPCLASSPDX: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDX imm8 m128 k k
// VFPCLASSPDX imm8 m128 k
// VFPCLASSPDX imm8 xmm k k
// VFPCLASSPDX imm8 xmm k
//
// Construct and append a VFPCLASSPDX instruction to the active function.
// Operates on the global context.
func VFPCLASSPDX(ops ...operand.Op) { ctx.VFPCLASSPDX(ops...) }
// VFPCLASSPDX_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDX.BCST imm8 m64 k k
// VFPCLASSPDX.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDX.BCST instruction to the active function.
func (c *Context) VFPCLASSPDX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDX_BCST(ops...))
}
// VFPCLASSPDX_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDX.BCST imm8 m64 k k
// VFPCLASSPDX.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDX.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPDX_BCST(ops ...operand.Op) { ctx.VFPCLASSPDX_BCST(ops...) }
// VFPCLASSPDY: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDY imm8 m256 k k
// VFPCLASSPDY imm8 m256 k
// VFPCLASSPDY imm8 ymm k k
// VFPCLASSPDY imm8 ymm k
//
// Construct and append a VFPCLASSPDY instruction to the active function.
func (c *Context) VFPCLASSPDY(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDY(ops...))
}
// VFPCLASSPDY: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDY imm8 m256 k k
// VFPCLASSPDY imm8 m256 k
// VFPCLASSPDY imm8 ymm k k
// VFPCLASSPDY imm8 ymm k
//
// Construct and append a VFPCLASSPDY instruction to the active function.
// Operates on the global context.
func VFPCLASSPDY(ops ...operand.Op) { ctx.VFPCLASSPDY(ops...) }
// VFPCLASSPDY_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDY.BCST imm8 m64 k k
// VFPCLASSPDY.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDY.BCST instruction to the active function.
func (c *Context) VFPCLASSPDY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDY_BCST(ops...))
}
// VFPCLASSPDY_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDY.BCST imm8 m64 k k
// VFPCLASSPDY.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDY.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPDY_BCST(ops ...operand.Op) { ctx.VFPCLASSPDY_BCST(ops...) }
// VFPCLASSPDZ: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDZ imm8 m512 k k
// VFPCLASSPDZ imm8 m512 k
// VFPCLASSPDZ imm8 zmm k k
// VFPCLASSPDZ imm8 zmm k
//
// Construct and append a VFPCLASSPDZ instruction to the active function.
func (c *Context) VFPCLASSPDZ(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDZ(ops...))
}
// VFPCLASSPDZ: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDZ imm8 m512 k k
// VFPCLASSPDZ imm8 m512 k
// VFPCLASSPDZ imm8 zmm k k
// VFPCLASSPDZ imm8 zmm k
//
// Construct and append a VFPCLASSPDZ instruction to the active function.
// Operates on the global context.
func VFPCLASSPDZ(ops ...operand.Op) { ctx.VFPCLASSPDZ(ops...) }
// VFPCLASSPDZ_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDZ.BCST imm8 m64 k k
// VFPCLASSPDZ.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDZ.BCST instruction to the active function.
func (c *Context) VFPCLASSPDZ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPDZ_BCST(ops...))
}
// VFPCLASSPDZ_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDZ.BCST imm8 m64 k k
// VFPCLASSPDZ.BCST imm8 m64 k
//
// Construct and append a VFPCLASSPDZ.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPDZ_BCST(ops ...operand.Op) { ctx.VFPCLASSPDZ_BCST(ops...) }
// VFPCLASSPSX: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSX imm8 m128 k k
// VFPCLASSPSX imm8 m128 k
// VFPCLASSPSX imm8 xmm k k
// VFPCLASSPSX imm8 xmm k
//
// Construct and append a VFPCLASSPSX instruction to the active function.
func (c *Context) VFPCLASSPSX(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSX(ops...))
}
// VFPCLASSPSX: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSX imm8 m128 k k
// VFPCLASSPSX imm8 m128 k
// VFPCLASSPSX imm8 xmm k k
// VFPCLASSPSX imm8 xmm k
//
// Construct and append a VFPCLASSPSX instruction to the active function.
// Operates on the global context.
func VFPCLASSPSX(ops ...operand.Op) { ctx.VFPCLASSPSX(ops...) }
// VFPCLASSPSX_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSX.BCST imm8 m32 k k
// VFPCLASSPSX.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSX.BCST instruction to the active function.
func (c *Context) VFPCLASSPSX_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSX_BCST(ops...))
}
// VFPCLASSPSX_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSX.BCST imm8 m32 k k
// VFPCLASSPSX.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSX.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPSX_BCST(ops ...operand.Op) { ctx.VFPCLASSPSX_BCST(ops...) }
// VFPCLASSPSY: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSY imm8 m256 k k
// VFPCLASSPSY imm8 m256 k
// VFPCLASSPSY imm8 ymm k k
// VFPCLASSPSY imm8 ymm k
//
// Construct and append a VFPCLASSPSY instruction to the active function.
func (c *Context) VFPCLASSPSY(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSY(ops...))
}
// VFPCLASSPSY: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSY imm8 m256 k k
// VFPCLASSPSY imm8 m256 k
// VFPCLASSPSY imm8 ymm k k
// VFPCLASSPSY imm8 ymm k
//
// Construct and append a VFPCLASSPSY instruction to the active function.
// Operates on the global context.
func VFPCLASSPSY(ops ...operand.Op) { ctx.VFPCLASSPSY(ops...) }
// VFPCLASSPSY_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSY.BCST imm8 m32 k k
// VFPCLASSPSY.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSY.BCST instruction to the active function.
func (c *Context) VFPCLASSPSY_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSY_BCST(ops...))
}
// VFPCLASSPSY_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSY.BCST imm8 m32 k k
// VFPCLASSPSY.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSY.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPSY_BCST(ops ...operand.Op) { ctx.VFPCLASSPSY_BCST(ops...) }
// VFPCLASSPSZ: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSZ imm8 m512 k k
// VFPCLASSPSZ imm8 m512 k
// VFPCLASSPSZ imm8 zmm k k
// VFPCLASSPSZ imm8 zmm k
//
// Construct and append a VFPCLASSPSZ instruction to the active function.
func (c *Context) VFPCLASSPSZ(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSZ(ops...))
}
// VFPCLASSPSZ: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSZ imm8 m512 k k
// VFPCLASSPSZ imm8 m512 k
// VFPCLASSPSZ imm8 zmm k k
// VFPCLASSPSZ imm8 zmm k
//
// Construct and append a VFPCLASSPSZ instruction to the active function.
// Operates on the global context.
func VFPCLASSPSZ(ops ...operand.Op) { ctx.VFPCLASSPSZ(ops...) }
// VFPCLASSPSZ_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSZ.BCST imm8 m32 k k
// VFPCLASSPSZ.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSZ.BCST instruction to the active function.
func (c *Context) VFPCLASSPSZ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSPSZ_BCST(ops...))
}
// VFPCLASSPSZ_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSZ.BCST imm8 m32 k k
// VFPCLASSPSZ.BCST imm8 m32 k
//
// Construct and append a VFPCLASSPSZ.BCST instruction to the active function.
// Operates on the global context.
func VFPCLASSPSZ_BCST(ops ...operand.Op) { ctx.VFPCLASSPSZ_BCST(ops...) }
// VFPCLASSSD: Test Class of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSD imm8 m64 k k
// VFPCLASSSD imm8 m64 k
// VFPCLASSSD imm8 xmm k k
// VFPCLASSSD imm8 xmm k
//
// Construct and append a VFPCLASSSD instruction to the active function.
func (c *Context) VFPCLASSSD(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSSD(ops...))
}
// VFPCLASSSD: Test Class of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSD imm8 m64 k k
// VFPCLASSSD imm8 m64 k
// VFPCLASSSD imm8 xmm k k
// VFPCLASSSD imm8 xmm k
//
// Construct and append a VFPCLASSSD instruction to the active function.
// Operates on the global context.
func VFPCLASSSD(ops ...operand.Op) { ctx.VFPCLASSSD(ops...) }
// VFPCLASSSS: Test Class of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSS imm8 m32 k k
// VFPCLASSSS imm8 m32 k
// VFPCLASSSS imm8 xmm k k
// VFPCLASSSS imm8 xmm k
//
// Construct and append a VFPCLASSSS instruction to the active function.
func (c *Context) VFPCLASSSS(ops ...operand.Op) {
c.addinstruction(x86.VFPCLASSSS(ops...))
}
// VFPCLASSSS: Test Class of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSS imm8 m32 k k
// VFPCLASSSS imm8 m32 k
// VFPCLASSSS imm8 xmm k k
// VFPCLASSSS imm8 xmm k
//
// Construct and append a VFPCLASSSS instruction to the active function.
// Operates on the global context.
func VFPCLASSSS(ops ...operand.Op) { ctx.VFPCLASSSS(ops...) }
// VGATHERDPD: Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPD xmm vm32x xmm
// VGATHERDPD ymm vm32x ymm
// VGATHERDPD vm32x k xmm
// VGATHERDPD vm32x k ymm
// VGATHERDPD vm32y k zmm
//
// Construct and append a VGATHERDPD instruction to the active function.
func (c *Context) VGATHERDPD(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VGATHERDPD(vxy, kv, xyz))
}
// VGATHERDPD: Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPD xmm vm32x xmm
// VGATHERDPD ymm vm32x ymm
// VGATHERDPD vm32x k xmm
// VGATHERDPD vm32x k ymm
// VGATHERDPD vm32y k zmm
//
// Construct and append a VGATHERDPD instruction to the active function.
// Operates on the global context.
func VGATHERDPD(vxy, kv, xyz operand.Op) { ctx.VGATHERDPD(vxy, kv, xyz) }
// VGATHERDPS: Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPS xmm vm32x xmm
// VGATHERDPS ymm vm32y ymm
// VGATHERDPS vm32x k xmm
// VGATHERDPS vm32y k ymm
// VGATHERDPS vm32z k zmm
//
// Construct and append a VGATHERDPS instruction to the active function.
func (c *Context) VGATHERDPS(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VGATHERDPS(vxy, kv, xyz))
}
// VGATHERDPS: Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPS xmm vm32x xmm
// VGATHERDPS ymm vm32y ymm
// VGATHERDPS vm32x k xmm
// VGATHERDPS vm32y k ymm
// VGATHERDPS vm32z k zmm
//
// Construct and append a VGATHERDPS instruction to the active function.
// Operates on the global context.
func VGATHERDPS(vxy, kv, xyz operand.Op) { ctx.VGATHERDPS(vxy, kv, xyz) }
// VGATHERQPD: Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPD xmm vm64x xmm
// VGATHERQPD ymm vm64y ymm
// VGATHERQPD vm64x k xmm
// VGATHERQPD vm64y k ymm
// VGATHERQPD vm64z k zmm
//
// Construct and append a VGATHERQPD instruction to the active function.
func (c *Context) VGATHERQPD(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VGATHERQPD(vxy, kv, xyz))
}
// VGATHERQPD: Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPD xmm vm64x xmm
// VGATHERQPD ymm vm64y ymm
// VGATHERQPD vm64x k xmm
// VGATHERQPD vm64y k ymm
// VGATHERQPD vm64z k zmm
//
// Construct and append a VGATHERQPD instruction to the active function.
// Operates on the global context.
func VGATHERQPD(vxy, kv, xyz operand.Op) { ctx.VGATHERQPD(vxy, kv, xyz) }
// VGATHERQPS: Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPS xmm vm64x xmm
// VGATHERQPS xmm vm64y xmm
// VGATHERQPS vm64x k xmm
// VGATHERQPS vm64y k xmm
// VGATHERQPS vm64z k ymm
//
// Construct and append a VGATHERQPS instruction to the active function.
func (c *Context) VGATHERQPS(vx, kv, xy operand.Op) {
c.addinstruction(x86.VGATHERQPS(vx, kv, xy))
}
// VGATHERQPS: Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPS xmm vm64x xmm
// VGATHERQPS xmm vm64y xmm
// VGATHERQPS vm64x k xmm
// VGATHERQPS vm64y k xmm
// VGATHERQPS vm64z k ymm
//
// Construct and append a VGATHERQPS instruction to the active function.
// Operates on the global context.
func VGATHERQPS(vx, kv, xy operand.Op) { ctx.VGATHERQPS(vx, kv, xy) }
// VGETEXPPD: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPD m128 k xmm
// VGETEXPPD m128 xmm
// VGETEXPPD m256 k ymm
// VGETEXPPD m256 ymm
// VGETEXPPD xmm k xmm
// VGETEXPPD xmm xmm
// VGETEXPPD ymm k ymm
// VGETEXPPD ymm ymm
// VGETEXPPD m512 k zmm
// VGETEXPPD m512 zmm
// VGETEXPPD zmm k zmm
// VGETEXPPD zmm zmm
//
// Construct and append a VGETEXPPD instruction to the active function.
func (c *Context) VGETEXPPD(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPD(ops...))
}
// VGETEXPPD: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPD m128 k xmm
// VGETEXPPD m128 xmm
// VGETEXPPD m256 k ymm
// VGETEXPPD m256 ymm
// VGETEXPPD xmm k xmm
// VGETEXPPD xmm xmm
// VGETEXPPD ymm k ymm
// VGETEXPPD ymm ymm
// VGETEXPPD m512 k zmm
// VGETEXPPD m512 zmm
// VGETEXPPD zmm k zmm
// VGETEXPPD zmm zmm
//
// Construct and append a VGETEXPPD instruction to the active function.
// Operates on the global context.
func VGETEXPPD(ops ...operand.Op) { ctx.VGETEXPPD(ops...) }
// VGETEXPPD_BCST: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPD.BCST m64 k xmm
// VGETEXPPD.BCST m64 k ymm
// VGETEXPPD.BCST m64 xmm
// VGETEXPPD.BCST m64 ymm
// VGETEXPPD.BCST m64 k zmm
// VGETEXPPD.BCST m64 zmm
//
// Construct and append a VGETEXPPD.BCST instruction to the active function.
func (c *Context) VGETEXPPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPD_BCST(ops...))
}
// VGETEXPPD_BCST: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPD.BCST m64 k xmm
// VGETEXPPD.BCST m64 k ymm
// VGETEXPPD.BCST m64 xmm
// VGETEXPPD.BCST m64 ymm
// VGETEXPPD.BCST m64 k zmm
// VGETEXPPD.BCST m64 zmm
//
// Construct and append a VGETEXPPD.BCST instruction to the active function.
// Operates on the global context.
func VGETEXPPD_BCST(ops ...operand.Op) { ctx.VGETEXPPD_BCST(ops...) }
// VGETEXPPD_BCST_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.BCST.Z m64 k xmm
// VGETEXPPD.BCST.Z m64 k ymm
// VGETEXPPD.BCST.Z m64 k zmm
//
// Construct and append a VGETEXPPD.BCST.Z instruction to the active function.
func (c *Context) VGETEXPPD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VGETEXPPD_BCST_Z(m, k, xyz))
}
// VGETEXPPD_BCST_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.BCST.Z m64 k xmm
// VGETEXPPD.BCST.Z m64 k ymm
// VGETEXPPD.BCST.Z m64 k zmm
//
// Construct and append a VGETEXPPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPD_BCST_Z(m, k, xyz operand.Op) { ctx.VGETEXPPD_BCST_Z(m, k, xyz) }
// VGETEXPPD_SAE: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPD.SAE zmm k zmm
// VGETEXPPD.SAE zmm zmm
//
// Construct and append a VGETEXPPD.SAE instruction to the active function.
func (c *Context) VGETEXPPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPD_SAE(ops...))
}
// VGETEXPPD_SAE: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPD.SAE zmm k zmm
// VGETEXPPD.SAE zmm zmm
//
// Construct and append a VGETEXPPD.SAE instruction to the active function.
// Operates on the global context.
func VGETEXPPD_SAE(ops ...operand.Op) { ctx.VGETEXPPD_SAE(ops...) }
// VGETEXPPD_SAE_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.SAE.Z zmm k zmm
//
// Construct and append a VGETEXPPD.SAE.Z instruction to the active function.
func (c *Context) VGETEXPPD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VGETEXPPD_SAE_Z(z, k, z1))
}
// VGETEXPPD_SAE_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.SAE.Z zmm k zmm
//
// Construct and append a VGETEXPPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPD_SAE_Z(z, k, z1 operand.Op) { ctx.VGETEXPPD_SAE_Z(z, k, z1) }
// VGETEXPPD_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.Z m128 k xmm
// VGETEXPPD.Z m256 k ymm
// VGETEXPPD.Z xmm k xmm
// VGETEXPPD.Z ymm k ymm
// VGETEXPPD.Z m512 k zmm
// VGETEXPPD.Z zmm k zmm
//
// Construct and append a VGETEXPPD.Z instruction to the active function.
func (c *Context) VGETEXPPD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VGETEXPPD_Z(mxyz, k, xyz))
}
// VGETEXPPD_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.Z m128 k xmm
// VGETEXPPD.Z m256 k ymm
// VGETEXPPD.Z xmm k xmm
// VGETEXPPD.Z ymm k ymm
// VGETEXPPD.Z m512 k zmm
// VGETEXPPD.Z zmm k zmm
//
// Construct and append a VGETEXPPD.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPD_Z(mxyz, k, xyz operand.Op) { ctx.VGETEXPPD_Z(mxyz, k, xyz) }
// VGETEXPPS: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPS m128 k xmm
// VGETEXPPS m128 xmm
// VGETEXPPS m256 k ymm
// VGETEXPPS m256 ymm
// VGETEXPPS xmm k xmm
// VGETEXPPS xmm xmm
// VGETEXPPS ymm k ymm
// VGETEXPPS ymm ymm
// VGETEXPPS m512 k zmm
// VGETEXPPS m512 zmm
// VGETEXPPS zmm k zmm
// VGETEXPPS zmm zmm
//
// Construct and append a VGETEXPPS instruction to the active function.
func (c *Context) VGETEXPPS(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPS(ops...))
}
// VGETEXPPS: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPS m128 k xmm
// VGETEXPPS m128 xmm
// VGETEXPPS m256 k ymm
// VGETEXPPS m256 ymm
// VGETEXPPS xmm k xmm
// VGETEXPPS xmm xmm
// VGETEXPPS ymm k ymm
// VGETEXPPS ymm ymm
// VGETEXPPS m512 k zmm
// VGETEXPPS m512 zmm
// VGETEXPPS zmm k zmm
// VGETEXPPS zmm zmm
//
// Construct and append a VGETEXPPS instruction to the active function.
// Operates on the global context.
func VGETEXPPS(ops ...operand.Op) { ctx.VGETEXPPS(ops...) }
// VGETEXPPS_BCST: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPS.BCST m32 k xmm
// VGETEXPPS.BCST m32 k ymm
// VGETEXPPS.BCST m32 xmm
// VGETEXPPS.BCST m32 ymm
// VGETEXPPS.BCST m32 k zmm
// VGETEXPPS.BCST m32 zmm
//
// Construct and append a VGETEXPPS.BCST instruction to the active function.
func (c *Context) VGETEXPPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPS_BCST(ops...))
}
// VGETEXPPS_BCST: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPS.BCST m32 k xmm
// VGETEXPPS.BCST m32 k ymm
// VGETEXPPS.BCST m32 xmm
// VGETEXPPS.BCST m32 ymm
// VGETEXPPS.BCST m32 k zmm
// VGETEXPPS.BCST m32 zmm
//
// Construct and append a VGETEXPPS.BCST instruction to the active function.
// Operates on the global context.
func VGETEXPPS_BCST(ops ...operand.Op) { ctx.VGETEXPPS_BCST(ops...) }
// VGETEXPPS_BCST_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.BCST.Z m32 k xmm
// VGETEXPPS.BCST.Z m32 k ymm
// VGETEXPPS.BCST.Z m32 k zmm
//
// Construct and append a VGETEXPPS.BCST.Z instruction to the active function.
func (c *Context) VGETEXPPS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VGETEXPPS_BCST_Z(m, k, xyz))
}
// VGETEXPPS_BCST_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.BCST.Z m32 k xmm
// VGETEXPPS.BCST.Z m32 k ymm
// VGETEXPPS.BCST.Z m32 k zmm
//
// Construct and append a VGETEXPPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPS_BCST_Z(m, k, xyz operand.Op) { ctx.VGETEXPPS_BCST_Z(m, k, xyz) }
// VGETEXPPS_SAE: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPS.SAE zmm k zmm
// VGETEXPPS.SAE zmm zmm
//
// Construct and append a VGETEXPPS.SAE instruction to the active function.
func (c *Context) VGETEXPPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPPS_SAE(ops...))
}
// VGETEXPPS_SAE: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPS.SAE zmm k zmm
// VGETEXPPS.SAE zmm zmm
//
// Construct and append a VGETEXPPS.SAE instruction to the active function.
// Operates on the global context.
func VGETEXPPS_SAE(ops ...operand.Op) { ctx.VGETEXPPS_SAE(ops...) }
// VGETEXPPS_SAE_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.SAE.Z zmm k zmm
//
// Construct and append a VGETEXPPS.SAE.Z instruction to the active function.
func (c *Context) VGETEXPPS_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VGETEXPPS_SAE_Z(z, k, z1))
}
// VGETEXPPS_SAE_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.SAE.Z zmm k zmm
//
// Construct and append a VGETEXPPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPS_SAE_Z(z, k, z1 operand.Op) { ctx.VGETEXPPS_SAE_Z(z, k, z1) }
// VGETEXPPS_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.Z m128 k xmm
// VGETEXPPS.Z m256 k ymm
// VGETEXPPS.Z xmm k xmm
// VGETEXPPS.Z ymm k ymm
// VGETEXPPS.Z m512 k zmm
// VGETEXPPS.Z zmm k zmm
//
// Construct and append a VGETEXPPS.Z instruction to the active function.
func (c *Context) VGETEXPPS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VGETEXPPS_Z(mxyz, k, xyz))
}
// VGETEXPPS_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.Z m128 k xmm
// VGETEXPPS.Z m256 k ymm
// VGETEXPPS.Z xmm k xmm
// VGETEXPPS.Z ymm k ymm
// VGETEXPPS.Z m512 k zmm
// VGETEXPPS.Z zmm k zmm
//
// Construct and append a VGETEXPPS.Z instruction to the active function.
// Operates on the global context.
func VGETEXPPS_Z(mxyz, k, xyz operand.Op) { ctx.VGETEXPPS_Z(mxyz, k, xyz) }
// VGETEXPSD: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSD m64 xmm k xmm
// VGETEXPSD m64 xmm xmm
// VGETEXPSD xmm xmm k xmm
// VGETEXPSD xmm xmm xmm
//
// Construct and append a VGETEXPSD instruction to the active function.
func (c *Context) VGETEXPSD(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPSD(ops...))
}
// VGETEXPSD: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSD m64 xmm k xmm
// VGETEXPSD m64 xmm xmm
// VGETEXPSD xmm xmm k xmm
// VGETEXPSD xmm xmm xmm
//
// Construct and append a VGETEXPSD instruction to the active function.
// Operates on the global context.
func VGETEXPSD(ops ...operand.Op) { ctx.VGETEXPSD(ops...) }
// VGETEXPSD_SAE: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSD.SAE xmm xmm k xmm
// VGETEXPSD.SAE xmm xmm xmm
//
// Construct and append a VGETEXPSD.SAE instruction to the active function.
func (c *Context) VGETEXPSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPSD_SAE(ops...))
}
// VGETEXPSD_SAE: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSD.SAE xmm xmm k xmm
// VGETEXPSD.SAE xmm xmm xmm
//
// Construct and append a VGETEXPSD.SAE instruction to the active function.
// Operates on the global context.
func VGETEXPSD_SAE(ops ...operand.Op) { ctx.VGETEXPSD_SAE(ops...) }
// VGETEXPSD_SAE_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSD.SAE.Z instruction to the active function.
func (c *Context) VGETEXPSD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VGETEXPSD_SAE_Z(x, x1, k, x2))
}
// VGETEXPSD_SAE_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSD.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETEXPSD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VGETEXPSD_SAE_Z(x, x1, k, x2) }
// VGETEXPSD_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.Z m64 xmm k xmm
// VGETEXPSD.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSD.Z instruction to the active function.
func (c *Context) VGETEXPSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VGETEXPSD_Z(mx, x, k, x1))
}
// VGETEXPSD_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.Z m64 xmm k xmm
// VGETEXPSD.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSD.Z instruction to the active function.
// Operates on the global context.
func VGETEXPSD_Z(mx, x, k, x1 operand.Op) { ctx.VGETEXPSD_Z(mx, x, k, x1) }
// VGETEXPSS: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSS m32 xmm k xmm
// VGETEXPSS m32 xmm xmm
// VGETEXPSS xmm xmm k xmm
// VGETEXPSS xmm xmm xmm
//
// Construct and append a VGETEXPSS instruction to the active function.
func (c *Context) VGETEXPSS(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPSS(ops...))
}
// VGETEXPSS: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSS m32 xmm k xmm
// VGETEXPSS m32 xmm xmm
// VGETEXPSS xmm xmm k xmm
// VGETEXPSS xmm xmm xmm
//
// Construct and append a VGETEXPSS instruction to the active function.
// Operates on the global context.
func VGETEXPSS(ops ...operand.Op) { ctx.VGETEXPSS(ops...) }
// VGETEXPSS_SAE: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSS.SAE xmm xmm k xmm
// VGETEXPSS.SAE xmm xmm xmm
//
// Construct and append a VGETEXPSS.SAE instruction to the active function.
func (c *Context) VGETEXPSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETEXPSS_SAE(ops...))
}
// VGETEXPSS_SAE: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSS.SAE xmm xmm k xmm
// VGETEXPSS.SAE xmm xmm xmm
//
// Construct and append a VGETEXPSS.SAE instruction to the active function.
// Operates on the global context.
func VGETEXPSS_SAE(ops ...operand.Op) { ctx.VGETEXPSS_SAE(ops...) }
// VGETEXPSS_SAE_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSS.SAE.Z instruction to the active function.
func (c *Context) VGETEXPSS_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VGETEXPSS_SAE_Z(x, x1, k, x2))
}
// VGETEXPSS_SAE_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSS.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETEXPSS_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VGETEXPSS_SAE_Z(x, x1, k, x2) }
// VGETEXPSS_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.Z m32 xmm k xmm
// VGETEXPSS.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSS.Z instruction to the active function.
func (c *Context) VGETEXPSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VGETEXPSS_Z(mx, x, k, x1))
}
// VGETEXPSS_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.Z m32 xmm k xmm
// VGETEXPSS.Z xmm xmm k xmm
//
// Construct and append a VGETEXPSS.Z instruction to the active function.
// Operates on the global context.
func VGETEXPSS_Z(mx, x, k, x1 operand.Op) { ctx.VGETEXPSS_Z(mx, x, k, x1) }
// VGETMANTPD: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPD imm8 m128 k xmm
// VGETMANTPD imm8 m128 xmm
// VGETMANTPD imm8 m256 k ymm
// VGETMANTPD imm8 m256 ymm
// VGETMANTPD imm8 xmm k xmm
// VGETMANTPD imm8 xmm xmm
// VGETMANTPD imm8 ymm k ymm
// VGETMANTPD imm8 ymm ymm
// VGETMANTPD imm8 m512 k zmm
// VGETMANTPD imm8 m512 zmm
// VGETMANTPD imm8 zmm k zmm
// VGETMANTPD imm8 zmm zmm
//
// Construct and append a VGETMANTPD instruction to the active function.
func (c *Context) VGETMANTPD(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPD(ops...))
}
// VGETMANTPD: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPD imm8 m128 k xmm
// VGETMANTPD imm8 m128 xmm
// VGETMANTPD imm8 m256 k ymm
// VGETMANTPD imm8 m256 ymm
// VGETMANTPD imm8 xmm k xmm
// VGETMANTPD imm8 xmm xmm
// VGETMANTPD imm8 ymm k ymm
// VGETMANTPD imm8 ymm ymm
// VGETMANTPD imm8 m512 k zmm
// VGETMANTPD imm8 m512 zmm
// VGETMANTPD imm8 zmm k zmm
// VGETMANTPD imm8 zmm zmm
//
// Construct and append a VGETMANTPD instruction to the active function.
// Operates on the global context.
func VGETMANTPD(ops ...operand.Op) { ctx.VGETMANTPD(ops...) }
// VGETMANTPD_BCST: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPD.BCST imm8 m64 k xmm
// VGETMANTPD.BCST imm8 m64 k ymm
// VGETMANTPD.BCST imm8 m64 xmm
// VGETMANTPD.BCST imm8 m64 ymm
// VGETMANTPD.BCST imm8 m64 k zmm
// VGETMANTPD.BCST imm8 m64 zmm
//
// Construct and append a VGETMANTPD.BCST instruction to the active function.
func (c *Context) VGETMANTPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPD_BCST(ops...))
}
// VGETMANTPD_BCST: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPD.BCST imm8 m64 k xmm
// VGETMANTPD.BCST imm8 m64 k ymm
// VGETMANTPD.BCST imm8 m64 xmm
// VGETMANTPD.BCST imm8 m64 ymm
// VGETMANTPD.BCST imm8 m64 k zmm
// VGETMANTPD.BCST imm8 m64 zmm
//
// Construct and append a VGETMANTPD.BCST instruction to the active function.
// Operates on the global context.
func VGETMANTPD_BCST(ops ...operand.Op) { ctx.VGETMANTPD_BCST(ops...) }
// VGETMANTPD_BCST_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.BCST.Z imm8 m64 k xmm
// VGETMANTPD.BCST.Z imm8 m64 k ymm
// VGETMANTPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VGETMANTPD.BCST.Z instruction to the active function.
func (c *Context) VGETMANTPD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VGETMANTPD_BCST_Z(i, m, k, xyz))
}
// VGETMANTPD_BCST_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.BCST.Z imm8 m64 k xmm
// VGETMANTPD.BCST.Z imm8 m64 k ymm
// VGETMANTPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VGETMANTPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VGETMANTPD_BCST_Z(i, m, k, xyz) }
// VGETMANTPD_SAE: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPD.SAE imm8 zmm k zmm
// VGETMANTPD.SAE imm8 zmm zmm
//
// Construct and append a VGETMANTPD.SAE instruction to the active function.
func (c *Context) VGETMANTPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPD_SAE(ops...))
}
// VGETMANTPD_SAE: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPD.SAE imm8 zmm k zmm
// VGETMANTPD.SAE imm8 zmm zmm
//
// Construct and append a VGETMANTPD.SAE instruction to the active function.
// Operates on the global context.
func VGETMANTPD_SAE(ops ...operand.Op) { ctx.VGETMANTPD_SAE(ops...) }
// VGETMANTPD_SAE_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.SAE.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPD.SAE.Z instruction to the active function.
func (c *Context) VGETMANTPD_SAE_Z(i, z, k, z1 operand.Op) {
c.addinstruction(x86.VGETMANTPD_SAE_Z(i, z, k, z1))
}
// VGETMANTPD_SAE_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.SAE.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPD_SAE_Z(i, z, k, z1 operand.Op) { ctx.VGETMANTPD_SAE_Z(i, z, k, z1) }
// VGETMANTPD_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.Z imm8 m128 k xmm
// VGETMANTPD.Z imm8 m256 k ymm
// VGETMANTPD.Z imm8 xmm k xmm
// VGETMANTPD.Z imm8 ymm k ymm
// VGETMANTPD.Z imm8 m512 k zmm
// VGETMANTPD.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPD.Z instruction to the active function.
func (c *Context) VGETMANTPD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VGETMANTPD_Z(i, mxyz, k, xyz))
}
// VGETMANTPD_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.Z imm8 m128 k xmm
// VGETMANTPD.Z imm8 m256 k ymm
// VGETMANTPD.Z imm8 xmm k xmm
// VGETMANTPD.Z imm8 ymm k ymm
// VGETMANTPD.Z imm8 m512 k zmm
// VGETMANTPD.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPD.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPD_Z(i, mxyz, k, xyz operand.Op) { ctx.VGETMANTPD_Z(i, mxyz, k, xyz) }
// VGETMANTPS: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPS imm8 m128 k xmm
// VGETMANTPS imm8 m128 xmm
// VGETMANTPS imm8 m256 k ymm
// VGETMANTPS imm8 m256 ymm
// VGETMANTPS imm8 xmm k xmm
// VGETMANTPS imm8 xmm xmm
// VGETMANTPS imm8 ymm k ymm
// VGETMANTPS imm8 ymm ymm
// VGETMANTPS imm8 m512 k zmm
// VGETMANTPS imm8 m512 zmm
// VGETMANTPS imm8 zmm k zmm
// VGETMANTPS imm8 zmm zmm
//
// Construct and append a VGETMANTPS instruction to the active function.
func (c *Context) VGETMANTPS(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPS(ops...))
}
// VGETMANTPS: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPS imm8 m128 k xmm
// VGETMANTPS imm8 m128 xmm
// VGETMANTPS imm8 m256 k ymm
// VGETMANTPS imm8 m256 ymm
// VGETMANTPS imm8 xmm k xmm
// VGETMANTPS imm8 xmm xmm
// VGETMANTPS imm8 ymm k ymm
// VGETMANTPS imm8 ymm ymm
// VGETMANTPS imm8 m512 k zmm
// VGETMANTPS imm8 m512 zmm
// VGETMANTPS imm8 zmm k zmm
// VGETMANTPS imm8 zmm zmm
//
// Construct and append a VGETMANTPS instruction to the active function.
// Operates on the global context.
func VGETMANTPS(ops ...operand.Op) { ctx.VGETMANTPS(ops...) }
// VGETMANTPS_BCST: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPS.BCST imm8 m32 k xmm
// VGETMANTPS.BCST imm8 m32 k ymm
// VGETMANTPS.BCST imm8 m32 xmm
// VGETMANTPS.BCST imm8 m32 ymm
// VGETMANTPS.BCST imm8 m32 k zmm
// VGETMANTPS.BCST imm8 m32 zmm
//
// Construct and append a VGETMANTPS.BCST instruction to the active function.
func (c *Context) VGETMANTPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPS_BCST(ops...))
}
// VGETMANTPS_BCST: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPS.BCST imm8 m32 k xmm
// VGETMANTPS.BCST imm8 m32 k ymm
// VGETMANTPS.BCST imm8 m32 xmm
// VGETMANTPS.BCST imm8 m32 ymm
// VGETMANTPS.BCST imm8 m32 k zmm
// VGETMANTPS.BCST imm8 m32 zmm
//
// Construct and append a VGETMANTPS.BCST instruction to the active function.
// Operates on the global context.
func VGETMANTPS_BCST(ops ...operand.Op) { ctx.VGETMANTPS_BCST(ops...) }
// VGETMANTPS_BCST_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.BCST.Z imm8 m32 k xmm
// VGETMANTPS.BCST.Z imm8 m32 k ymm
// VGETMANTPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VGETMANTPS.BCST.Z instruction to the active function.
func (c *Context) VGETMANTPS_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VGETMANTPS_BCST_Z(i, m, k, xyz))
}
// VGETMANTPS_BCST_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.BCST.Z imm8 m32 k xmm
// VGETMANTPS.BCST.Z imm8 m32 k ymm
// VGETMANTPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VGETMANTPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPS_BCST_Z(i, m, k, xyz operand.Op) { ctx.VGETMANTPS_BCST_Z(i, m, k, xyz) }
// VGETMANTPS_SAE: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPS.SAE imm8 zmm k zmm
// VGETMANTPS.SAE imm8 zmm zmm
//
// Construct and append a VGETMANTPS.SAE instruction to the active function.
func (c *Context) VGETMANTPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTPS_SAE(ops...))
}
// VGETMANTPS_SAE: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPS.SAE imm8 zmm k zmm
// VGETMANTPS.SAE imm8 zmm zmm
//
// Construct and append a VGETMANTPS.SAE instruction to the active function.
// Operates on the global context.
func VGETMANTPS_SAE(ops ...operand.Op) { ctx.VGETMANTPS_SAE(ops...) }
// VGETMANTPS_SAE_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.SAE.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPS.SAE.Z instruction to the active function.
func (c *Context) VGETMANTPS_SAE_Z(i, z, k, z1 operand.Op) {
c.addinstruction(x86.VGETMANTPS_SAE_Z(i, z, k, z1))
}
// VGETMANTPS_SAE_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.SAE.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPS_SAE_Z(i, z, k, z1 operand.Op) { ctx.VGETMANTPS_SAE_Z(i, z, k, z1) }
// VGETMANTPS_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.Z imm8 m128 k xmm
// VGETMANTPS.Z imm8 m256 k ymm
// VGETMANTPS.Z imm8 xmm k xmm
// VGETMANTPS.Z imm8 ymm k ymm
// VGETMANTPS.Z imm8 m512 k zmm
// VGETMANTPS.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPS.Z instruction to the active function.
func (c *Context) VGETMANTPS_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VGETMANTPS_Z(i, mxyz, k, xyz))
}
// VGETMANTPS_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.Z imm8 m128 k xmm
// VGETMANTPS.Z imm8 m256 k ymm
// VGETMANTPS.Z imm8 xmm k xmm
// VGETMANTPS.Z imm8 ymm k ymm
// VGETMANTPS.Z imm8 m512 k zmm
// VGETMANTPS.Z imm8 zmm k zmm
//
// Construct and append a VGETMANTPS.Z instruction to the active function.
// Operates on the global context.
func VGETMANTPS_Z(i, mxyz, k, xyz operand.Op) { ctx.VGETMANTPS_Z(i, mxyz, k, xyz) }
// VGETMANTSD: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSD imm8 m64 xmm k xmm
// VGETMANTSD imm8 m64 xmm xmm
// VGETMANTSD imm8 xmm xmm k xmm
// VGETMANTSD imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSD instruction to the active function.
func (c *Context) VGETMANTSD(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTSD(ops...))
}
// VGETMANTSD: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSD imm8 m64 xmm k xmm
// VGETMANTSD imm8 m64 xmm xmm
// VGETMANTSD imm8 xmm xmm k xmm
// VGETMANTSD imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSD instruction to the active function.
// Operates on the global context.
func VGETMANTSD(ops ...operand.Op) { ctx.VGETMANTSD(ops...) }
// VGETMANTSD_SAE: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSD.SAE imm8 xmm xmm k xmm
// VGETMANTSD.SAE imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSD.SAE instruction to the active function.
func (c *Context) VGETMANTSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTSD_SAE(ops...))
}
// VGETMANTSD_SAE: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSD.SAE imm8 xmm xmm k xmm
// VGETMANTSD.SAE imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSD.SAE instruction to the active function.
// Operates on the global context.
func VGETMANTSD_SAE(ops ...operand.Op) { ctx.VGETMANTSD_SAE(ops...) }
// VGETMANTSD_SAE_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSD.SAE.Z instruction to the active function.
func (c *Context) VGETMANTSD_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VGETMANTSD_SAE_Z(i, x, x1, k, x2))
}
// VGETMANTSD_SAE_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSD.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETMANTSD_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VGETMANTSD_SAE_Z(i, x, x1, k, x2) }
// VGETMANTSD_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.Z imm8 m64 xmm k xmm
// VGETMANTSD.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSD.Z instruction to the active function.
func (c *Context) VGETMANTSD_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VGETMANTSD_Z(i, mx, x, k, x1))
}
// VGETMANTSD_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.Z imm8 m64 xmm k xmm
// VGETMANTSD.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSD.Z instruction to the active function.
// Operates on the global context.
func VGETMANTSD_Z(i, mx, x, k, x1 operand.Op) { ctx.VGETMANTSD_Z(i, mx, x, k, x1) }
// VGETMANTSS: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSS imm8 m32 xmm k xmm
// VGETMANTSS imm8 m32 xmm xmm
// VGETMANTSS imm8 xmm xmm k xmm
// VGETMANTSS imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSS instruction to the active function.
func (c *Context) VGETMANTSS(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTSS(ops...))
}
// VGETMANTSS: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSS imm8 m32 xmm k xmm
// VGETMANTSS imm8 m32 xmm xmm
// VGETMANTSS imm8 xmm xmm k xmm
// VGETMANTSS imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSS instruction to the active function.
// Operates on the global context.
func VGETMANTSS(ops ...operand.Op) { ctx.VGETMANTSS(ops...) }
// VGETMANTSS_SAE: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSS.SAE imm8 xmm xmm k xmm
// VGETMANTSS.SAE imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSS.SAE instruction to the active function.
func (c *Context) VGETMANTSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VGETMANTSS_SAE(ops...))
}
// VGETMANTSS_SAE: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSS.SAE imm8 xmm xmm k xmm
// VGETMANTSS.SAE imm8 xmm xmm xmm
//
// Construct and append a VGETMANTSS.SAE instruction to the active function.
// Operates on the global context.
func VGETMANTSS_SAE(ops ...operand.Op) { ctx.VGETMANTSS_SAE(ops...) }
// VGETMANTSS_SAE_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSS.SAE.Z instruction to the active function.
func (c *Context) VGETMANTSS_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VGETMANTSS_SAE_Z(i, x, x1, k, x2))
}
// VGETMANTSS_SAE_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSS.SAE.Z instruction to the active function.
// Operates on the global context.
func VGETMANTSS_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VGETMANTSS_SAE_Z(i, x, x1, k, x2) }
// VGETMANTSS_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.Z imm8 m32 xmm k xmm
// VGETMANTSS.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSS.Z instruction to the active function.
func (c *Context) VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VGETMANTSS_Z(i, mx, x, k, x1))
}
// VGETMANTSS_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.Z imm8 m32 xmm k xmm
// VGETMANTSS.Z imm8 xmm xmm k xmm
//
// Construct and append a VGETMANTSS.Z instruction to the active function.
// Operates on the global context.
func VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) { ctx.VGETMANTSS_Z(i, mx, x, k, x1) }
// VHADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// VHADDPD m128 xmm xmm
// VHADDPD m256 ymm ymm
// VHADDPD xmm xmm xmm
// VHADDPD ymm ymm ymm
//
// Construct and append a VHADDPD instruction to the active function.
func (c *Context) VHADDPD(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VHADDPD(mxy, xy, xy1))
}
// VHADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// VHADDPD m128 xmm xmm
// VHADDPD m256 ymm ymm
// VHADDPD xmm xmm xmm
// VHADDPD ymm ymm ymm
//
// Construct and append a VHADDPD instruction to the active function.
// Operates on the global context.
func VHADDPD(mxy, xy, xy1 operand.Op) { ctx.VHADDPD(mxy, xy, xy1) }
// VHADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// VHADDPS m128 xmm xmm
// VHADDPS m256 ymm ymm
// VHADDPS xmm xmm xmm
// VHADDPS ymm ymm ymm
//
// Construct and append a VHADDPS instruction to the active function.
func (c *Context) VHADDPS(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VHADDPS(mxy, xy, xy1))
}
// VHADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// VHADDPS m128 xmm xmm
// VHADDPS m256 ymm ymm
// VHADDPS xmm xmm xmm
// VHADDPS ymm ymm ymm
//
// Construct and append a VHADDPS instruction to the active function.
// Operates on the global context.
func VHADDPS(mxy, xy, xy1 operand.Op) { ctx.VHADDPS(mxy, xy, xy1) }
// VHSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPD m128 xmm xmm
// VHSUBPD m256 ymm ymm
// VHSUBPD xmm xmm xmm
// VHSUBPD ymm ymm ymm
//
// Construct and append a VHSUBPD instruction to the active function.
func (c *Context) VHSUBPD(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VHSUBPD(mxy, xy, xy1))
}
// VHSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPD m128 xmm xmm
// VHSUBPD m256 ymm ymm
// VHSUBPD xmm xmm xmm
// VHSUBPD ymm ymm ymm
//
// Construct and append a VHSUBPD instruction to the active function.
// Operates on the global context.
func VHSUBPD(mxy, xy, xy1 operand.Op) { ctx.VHSUBPD(mxy, xy, xy1) }
// VHSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPS m128 xmm xmm
// VHSUBPS m256 ymm ymm
// VHSUBPS xmm xmm xmm
// VHSUBPS ymm ymm ymm
//
// Construct and append a VHSUBPS instruction to the active function.
func (c *Context) VHSUBPS(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VHSUBPS(mxy, xy, xy1))
}
// VHSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPS m128 xmm xmm
// VHSUBPS m256 ymm ymm
// VHSUBPS xmm xmm xmm
// VHSUBPS ymm ymm ymm
//
// Construct and append a VHSUBPS instruction to the active function.
// Operates on the global context.
func VHSUBPS(mxy, xy, xy1 operand.Op) { ctx.VHSUBPS(mxy, xy, xy1) }
// VINSERTF128: Insert Packed Floating-Point Values.
//
// Forms:
//
// VINSERTF128 imm8 m128 ymm ymm
// VINSERTF128 imm8 xmm ymm ymm
//
// Construct and append a VINSERTF128 instruction to the active function.
func (c *Context) VINSERTF128(i, mx, y, y1 operand.Op) {
c.addinstruction(x86.VINSERTF128(i, mx, y, y1))
}
// VINSERTF128: Insert Packed Floating-Point Values.
//
// Forms:
//
// VINSERTF128 imm8 m128 ymm ymm
// VINSERTF128 imm8 xmm ymm ymm
//
// Construct and append a VINSERTF128 instruction to the active function.
// Operates on the global context.
func VINSERTF128(i, mx, y, y1 operand.Op) { ctx.VINSERTF128(i, mx, y, y1) }
// VINSERTF32X4: Insert 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X4 imm8 m128 ymm k ymm
// VINSERTF32X4 imm8 m128 ymm ymm
// VINSERTF32X4 imm8 xmm ymm k ymm
// VINSERTF32X4 imm8 xmm ymm ymm
// VINSERTF32X4 imm8 m128 zmm k zmm
// VINSERTF32X4 imm8 m128 zmm zmm
// VINSERTF32X4 imm8 xmm zmm k zmm
// VINSERTF32X4 imm8 xmm zmm zmm
//
// Construct and append a VINSERTF32X4 instruction to the active function.
func (c *Context) VINSERTF32X4(ops ...operand.Op) {
c.addinstruction(x86.VINSERTF32X4(ops...))
}
// VINSERTF32X4: Insert 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X4 imm8 m128 ymm k ymm
// VINSERTF32X4 imm8 m128 ymm ymm
// VINSERTF32X4 imm8 xmm ymm k ymm
// VINSERTF32X4 imm8 xmm ymm ymm
// VINSERTF32X4 imm8 m128 zmm k zmm
// VINSERTF32X4 imm8 m128 zmm zmm
// VINSERTF32X4 imm8 xmm zmm k zmm
// VINSERTF32X4 imm8 xmm zmm zmm
//
// Construct and append a VINSERTF32X4 instruction to the active function.
// Operates on the global context.
func VINSERTF32X4(ops ...operand.Op) { ctx.VINSERTF32X4(ops...) }
// VINSERTF32X4_Z: Insert 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X4.Z imm8 m128 ymm k ymm
// VINSERTF32X4.Z imm8 xmm ymm k ymm
// VINSERTF32X4.Z imm8 m128 zmm k zmm
// VINSERTF32X4.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTF32X4.Z instruction to the active function.
func (c *Context) VINSERTF32X4_Z(i, mx, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VINSERTF32X4_Z(i, mx, yz, k, yz1))
}
// VINSERTF32X4_Z: Insert 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X4.Z imm8 m128 ymm k ymm
// VINSERTF32X4.Z imm8 xmm ymm k ymm
// VINSERTF32X4.Z imm8 m128 zmm k zmm
// VINSERTF32X4.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTF32X4.Z instruction to the active function.
// Operates on the global context.
func VINSERTF32X4_Z(i, mx, yz, k, yz1 operand.Op) { ctx.VINSERTF32X4_Z(i, mx, yz, k, yz1) }
// VINSERTF32X8: Insert 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X8 imm8 m256 zmm k zmm
// VINSERTF32X8 imm8 m256 zmm zmm
// VINSERTF32X8 imm8 ymm zmm k zmm
// VINSERTF32X8 imm8 ymm zmm zmm
//
// Construct and append a VINSERTF32X8 instruction to the active function.
func (c *Context) VINSERTF32X8(ops ...operand.Op) {
c.addinstruction(x86.VINSERTF32X8(ops...))
}
// VINSERTF32X8: Insert 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X8 imm8 m256 zmm k zmm
// VINSERTF32X8 imm8 m256 zmm zmm
// VINSERTF32X8 imm8 ymm zmm k zmm
// VINSERTF32X8 imm8 ymm zmm zmm
//
// Construct and append a VINSERTF32X8 instruction to the active function.
// Operates on the global context.
func VINSERTF32X8(ops ...operand.Op) { ctx.VINSERTF32X8(ops...) }
// VINSERTF32X8_Z: Insert 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X8.Z imm8 m256 zmm k zmm
// VINSERTF32X8.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTF32X8.Z instruction to the active function.
func (c *Context) VINSERTF32X8_Z(i, my, z, k, z1 operand.Op) {
c.addinstruction(x86.VINSERTF32X8_Z(i, my, z, k, z1))
}
// VINSERTF32X8_Z: Insert 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X8.Z imm8 m256 zmm k zmm
// VINSERTF32X8.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTF32X8.Z instruction to the active function.
// Operates on the global context.
func VINSERTF32X8_Z(i, my, z, k, z1 operand.Op) { ctx.VINSERTF32X8_Z(i, my, z, k, z1) }
// VINSERTF64X2: Insert 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X2 imm8 m128 ymm k ymm
// VINSERTF64X2 imm8 m128 ymm ymm
// VINSERTF64X2 imm8 xmm ymm k ymm
// VINSERTF64X2 imm8 xmm ymm ymm
// VINSERTF64X2 imm8 m128 zmm k zmm
// VINSERTF64X2 imm8 m128 zmm zmm
// VINSERTF64X2 imm8 xmm zmm k zmm
// VINSERTF64X2 imm8 xmm zmm zmm
//
// Construct and append a VINSERTF64X2 instruction to the active function.
func (c *Context) VINSERTF64X2(ops ...operand.Op) {
c.addinstruction(x86.VINSERTF64X2(ops...))
}
// VINSERTF64X2: Insert 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X2 imm8 m128 ymm k ymm
// VINSERTF64X2 imm8 m128 ymm ymm
// VINSERTF64X2 imm8 xmm ymm k ymm
// VINSERTF64X2 imm8 xmm ymm ymm
// VINSERTF64X2 imm8 m128 zmm k zmm
// VINSERTF64X2 imm8 m128 zmm zmm
// VINSERTF64X2 imm8 xmm zmm k zmm
// VINSERTF64X2 imm8 xmm zmm zmm
//
// Construct and append a VINSERTF64X2 instruction to the active function.
// Operates on the global context.
func VINSERTF64X2(ops ...operand.Op) { ctx.VINSERTF64X2(ops...) }
// VINSERTF64X2_Z: Insert 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X2.Z imm8 m128 ymm k ymm
// VINSERTF64X2.Z imm8 xmm ymm k ymm
// VINSERTF64X2.Z imm8 m128 zmm k zmm
// VINSERTF64X2.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTF64X2.Z instruction to the active function.
func (c *Context) VINSERTF64X2_Z(i, mx, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VINSERTF64X2_Z(i, mx, yz, k, yz1))
}
// VINSERTF64X2_Z: Insert 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X2.Z imm8 m128 ymm k ymm
// VINSERTF64X2.Z imm8 xmm ymm k ymm
// VINSERTF64X2.Z imm8 m128 zmm k zmm
// VINSERTF64X2.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTF64X2.Z instruction to the active function.
// Operates on the global context.
func VINSERTF64X2_Z(i, mx, yz, k, yz1 operand.Op) { ctx.VINSERTF64X2_Z(i, mx, yz, k, yz1) }
// VINSERTF64X4: Insert 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X4 imm8 m256 zmm k zmm
// VINSERTF64X4 imm8 m256 zmm zmm
// VINSERTF64X4 imm8 ymm zmm k zmm
// VINSERTF64X4 imm8 ymm zmm zmm
//
// Construct and append a VINSERTF64X4 instruction to the active function.
func (c *Context) VINSERTF64X4(ops ...operand.Op) {
c.addinstruction(x86.VINSERTF64X4(ops...))
}
// VINSERTF64X4: Insert 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X4 imm8 m256 zmm k zmm
// VINSERTF64X4 imm8 m256 zmm zmm
// VINSERTF64X4 imm8 ymm zmm k zmm
// VINSERTF64X4 imm8 ymm zmm zmm
//
// Construct and append a VINSERTF64X4 instruction to the active function.
// Operates on the global context.
func VINSERTF64X4(ops ...operand.Op) { ctx.VINSERTF64X4(ops...) }
// VINSERTF64X4_Z: Insert 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X4.Z imm8 m256 zmm k zmm
// VINSERTF64X4.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTF64X4.Z instruction to the active function.
func (c *Context) VINSERTF64X4_Z(i, my, z, k, z1 operand.Op) {
c.addinstruction(x86.VINSERTF64X4_Z(i, my, z, k, z1))
}
// VINSERTF64X4_Z: Insert 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X4.Z imm8 m256 zmm k zmm
// VINSERTF64X4.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTF64X4.Z instruction to the active function.
// Operates on the global context.
func VINSERTF64X4_Z(i, my, z, k, z1 operand.Op) { ctx.VINSERTF64X4_Z(i, my, z, k, z1) }
// VINSERTI128: Insert Packed Integer Values.
//
// Forms:
//
// VINSERTI128 imm8 m128 ymm ymm
// VINSERTI128 imm8 xmm ymm ymm
//
// Construct and append a VINSERTI128 instruction to the active function.
func (c *Context) VINSERTI128(i, mx, y, y1 operand.Op) {
c.addinstruction(x86.VINSERTI128(i, mx, y, y1))
}
// VINSERTI128: Insert Packed Integer Values.
//
// Forms:
//
// VINSERTI128 imm8 m128 ymm ymm
// VINSERTI128 imm8 xmm ymm ymm
//
// Construct and append a VINSERTI128 instruction to the active function.
// Operates on the global context.
func VINSERTI128(i, mx, y, y1 operand.Op) { ctx.VINSERTI128(i, mx, y, y1) }
// VINSERTI32X4: Insert 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X4 imm8 m128 ymm k ymm
// VINSERTI32X4 imm8 m128 ymm ymm
// VINSERTI32X4 imm8 xmm ymm k ymm
// VINSERTI32X4 imm8 xmm ymm ymm
// VINSERTI32X4 imm8 m128 zmm k zmm
// VINSERTI32X4 imm8 m128 zmm zmm
// VINSERTI32X4 imm8 xmm zmm k zmm
// VINSERTI32X4 imm8 xmm zmm zmm
//
// Construct and append a VINSERTI32X4 instruction to the active function.
func (c *Context) VINSERTI32X4(ops ...operand.Op) {
c.addinstruction(x86.VINSERTI32X4(ops...))
}
// VINSERTI32X4: Insert 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X4 imm8 m128 ymm k ymm
// VINSERTI32X4 imm8 m128 ymm ymm
// VINSERTI32X4 imm8 xmm ymm k ymm
// VINSERTI32X4 imm8 xmm ymm ymm
// VINSERTI32X4 imm8 m128 zmm k zmm
// VINSERTI32X4 imm8 m128 zmm zmm
// VINSERTI32X4 imm8 xmm zmm k zmm
// VINSERTI32X4 imm8 xmm zmm zmm
//
// Construct and append a VINSERTI32X4 instruction to the active function.
// Operates on the global context.
func VINSERTI32X4(ops ...operand.Op) { ctx.VINSERTI32X4(ops...) }
// VINSERTI32X4_Z: Insert 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X4.Z imm8 m128 ymm k ymm
// VINSERTI32X4.Z imm8 xmm ymm k ymm
// VINSERTI32X4.Z imm8 m128 zmm k zmm
// VINSERTI32X4.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTI32X4.Z instruction to the active function.
func (c *Context) VINSERTI32X4_Z(i, mx, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VINSERTI32X4_Z(i, mx, yz, k, yz1))
}
// VINSERTI32X4_Z: Insert 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X4.Z imm8 m128 ymm k ymm
// VINSERTI32X4.Z imm8 xmm ymm k ymm
// VINSERTI32X4.Z imm8 m128 zmm k zmm
// VINSERTI32X4.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTI32X4.Z instruction to the active function.
// Operates on the global context.
func VINSERTI32X4_Z(i, mx, yz, k, yz1 operand.Op) { ctx.VINSERTI32X4_Z(i, mx, yz, k, yz1) }
// VINSERTI32X8: Insert 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X8 imm8 m256 zmm k zmm
// VINSERTI32X8 imm8 m256 zmm zmm
// VINSERTI32X8 imm8 ymm zmm k zmm
// VINSERTI32X8 imm8 ymm zmm zmm
//
// Construct and append a VINSERTI32X8 instruction to the active function.
func (c *Context) VINSERTI32X8(ops ...operand.Op) {
c.addinstruction(x86.VINSERTI32X8(ops...))
}
// VINSERTI32X8: Insert 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X8 imm8 m256 zmm k zmm
// VINSERTI32X8 imm8 m256 zmm zmm
// VINSERTI32X8 imm8 ymm zmm k zmm
// VINSERTI32X8 imm8 ymm zmm zmm
//
// Construct and append a VINSERTI32X8 instruction to the active function.
// Operates on the global context.
func VINSERTI32X8(ops ...operand.Op) { ctx.VINSERTI32X8(ops...) }
// VINSERTI32X8_Z: Insert 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X8.Z imm8 m256 zmm k zmm
// VINSERTI32X8.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTI32X8.Z instruction to the active function.
func (c *Context) VINSERTI32X8_Z(i, my, z, k, z1 operand.Op) {
c.addinstruction(x86.VINSERTI32X8_Z(i, my, z, k, z1))
}
// VINSERTI32X8_Z: Insert 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X8.Z imm8 m256 zmm k zmm
// VINSERTI32X8.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTI32X8.Z instruction to the active function.
// Operates on the global context.
func VINSERTI32X8_Z(i, my, z, k, z1 operand.Op) { ctx.VINSERTI32X8_Z(i, my, z, k, z1) }
// VINSERTI64X2: Insert 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X2 imm8 m128 ymm k ymm
// VINSERTI64X2 imm8 m128 ymm ymm
// VINSERTI64X2 imm8 xmm ymm k ymm
// VINSERTI64X2 imm8 xmm ymm ymm
// VINSERTI64X2 imm8 m128 zmm k zmm
// VINSERTI64X2 imm8 m128 zmm zmm
// VINSERTI64X2 imm8 xmm zmm k zmm
// VINSERTI64X2 imm8 xmm zmm zmm
//
// Construct and append a VINSERTI64X2 instruction to the active function.
func (c *Context) VINSERTI64X2(ops ...operand.Op) {
c.addinstruction(x86.VINSERTI64X2(ops...))
}
// VINSERTI64X2: Insert 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X2 imm8 m128 ymm k ymm
// VINSERTI64X2 imm8 m128 ymm ymm
// VINSERTI64X2 imm8 xmm ymm k ymm
// VINSERTI64X2 imm8 xmm ymm ymm
// VINSERTI64X2 imm8 m128 zmm k zmm
// VINSERTI64X2 imm8 m128 zmm zmm
// VINSERTI64X2 imm8 xmm zmm k zmm
// VINSERTI64X2 imm8 xmm zmm zmm
//
// Construct and append a VINSERTI64X2 instruction to the active function.
// Operates on the global context.
func VINSERTI64X2(ops ...operand.Op) { ctx.VINSERTI64X2(ops...) }
// VINSERTI64X2_Z: Insert 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X2.Z imm8 m128 ymm k ymm
// VINSERTI64X2.Z imm8 xmm ymm k ymm
// VINSERTI64X2.Z imm8 m128 zmm k zmm
// VINSERTI64X2.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTI64X2.Z instruction to the active function.
func (c *Context) VINSERTI64X2_Z(i, mx, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VINSERTI64X2_Z(i, mx, yz, k, yz1))
}
// VINSERTI64X2_Z: Insert 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X2.Z imm8 m128 ymm k ymm
// VINSERTI64X2.Z imm8 xmm ymm k ymm
// VINSERTI64X2.Z imm8 m128 zmm k zmm
// VINSERTI64X2.Z imm8 xmm zmm k zmm
//
// Construct and append a VINSERTI64X2.Z instruction to the active function.
// Operates on the global context.
func VINSERTI64X2_Z(i, mx, yz, k, yz1 operand.Op) { ctx.VINSERTI64X2_Z(i, mx, yz, k, yz1) }
// VINSERTI64X4: Insert 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X4 imm8 m256 zmm k zmm
// VINSERTI64X4 imm8 m256 zmm zmm
// VINSERTI64X4 imm8 ymm zmm k zmm
// VINSERTI64X4 imm8 ymm zmm zmm
//
// Construct and append a VINSERTI64X4 instruction to the active function.
func (c *Context) VINSERTI64X4(ops ...operand.Op) {
c.addinstruction(x86.VINSERTI64X4(ops...))
}
// VINSERTI64X4: Insert 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X4 imm8 m256 zmm k zmm
// VINSERTI64X4 imm8 m256 zmm zmm
// VINSERTI64X4 imm8 ymm zmm k zmm
// VINSERTI64X4 imm8 ymm zmm zmm
//
// Construct and append a VINSERTI64X4 instruction to the active function.
// Operates on the global context.
func VINSERTI64X4(ops ...operand.Op) { ctx.VINSERTI64X4(ops...) }
// VINSERTI64X4_Z: Insert 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X4.Z imm8 m256 zmm k zmm
// VINSERTI64X4.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTI64X4.Z instruction to the active function.
func (c *Context) VINSERTI64X4_Z(i, my, z, k, z1 operand.Op) {
c.addinstruction(x86.VINSERTI64X4_Z(i, my, z, k, z1))
}
// VINSERTI64X4_Z: Insert 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X4.Z imm8 m256 zmm k zmm
// VINSERTI64X4.Z imm8 ymm zmm k zmm
//
// Construct and append a VINSERTI64X4.Z instruction to the active function.
// Operates on the global context.
func VINSERTI64X4_Z(i, my, z, k, z1 operand.Op) { ctx.VINSERTI64X4_Z(i, my, z, k, z1) }
// VINSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VINSERTPS imm8 m32 xmm xmm
// VINSERTPS imm8 xmm xmm xmm
//
// Construct and append a VINSERTPS instruction to the active function.
func (c *Context) VINSERTPS(i, mx, x, x1 operand.Op) {
c.addinstruction(x86.VINSERTPS(i, mx, x, x1))
}
// VINSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VINSERTPS imm8 m32 xmm xmm
// VINSERTPS imm8 xmm xmm xmm
//
// Construct and append a VINSERTPS instruction to the active function.
// Operates on the global context.
func VINSERTPS(i, mx, x, x1 operand.Op) { ctx.VINSERTPS(i, mx, x, x1) }
// VLDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// VLDDQU m128 xmm
// VLDDQU m256 ymm
//
// Construct and append a VLDDQU instruction to the active function.
func (c *Context) VLDDQU(m, xy operand.Op) {
c.addinstruction(x86.VLDDQU(m, xy))
}
// VLDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// VLDDQU m128 xmm
// VLDDQU m256 ymm
//
// Construct and append a VLDDQU instruction to the active function.
// Operates on the global context.
func VLDDQU(m, xy operand.Op) { ctx.VLDDQU(m, xy) }
// VLDMXCSR: Load MXCSR Register.
//
// Forms:
//
// VLDMXCSR m32
//
// Construct and append a VLDMXCSR instruction to the active function.
func (c *Context) VLDMXCSR(m operand.Op) {
c.addinstruction(x86.VLDMXCSR(m))
}
// VLDMXCSR: Load MXCSR Register.
//
// Forms:
//
// VLDMXCSR m32
//
// Construct and append a VLDMXCSR instruction to the active function.
// Operates on the global context.
func VLDMXCSR(m operand.Op) { ctx.VLDMXCSR(m) }
// VMASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// VMASKMOVDQU xmm xmm
//
// Construct and append a VMASKMOVDQU instruction to the active function.
func (c *Context) VMASKMOVDQU(x, x1 operand.Op) {
c.addinstruction(x86.VMASKMOVDQU(x, x1))
}
// VMASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// VMASKMOVDQU xmm xmm
//
// Construct and append a VMASKMOVDQU instruction to the active function.
// Operates on the global context.
func VMASKMOVDQU(x, x1 operand.Op) { ctx.VMASKMOVDQU(x, x1) }
// VMASKMOVPD: Conditional Move Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPD m128 xmm xmm
// VMASKMOVPD m256 ymm ymm
// VMASKMOVPD xmm xmm m128
// VMASKMOVPD ymm ymm m256
//
// Construct and append a VMASKMOVPD instruction to the active function.
func (c *Context) VMASKMOVPD(mxy, xy, mxy1 operand.Op) {
c.addinstruction(x86.VMASKMOVPD(mxy, xy, mxy1))
}
// VMASKMOVPD: Conditional Move Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPD m128 xmm xmm
// VMASKMOVPD m256 ymm ymm
// VMASKMOVPD xmm xmm m128
// VMASKMOVPD ymm ymm m256
//
// Construct and append a VMASKMOVPD instruction to the active function.
// Operates on the global context.
func VMASKMOVPD(mxy, xy, mxy1 operand.Op) { ctx.VMASKMOVPD(mxy, xy, mxy1) }
// VMASKMOVPS: Conditional Move Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPS m128 xmm xmm
// VMASKMOVPS m256 ymm ymm
// VMASKMOVPS xmm xmm m128
// VMASKMOVPS ymm ymm m256
//
// Construct and append a VMASKMOVPS instruction to the active function.
func (c *Context) VMASKMOVPS(mxy, xy, mxy1 operand.Op) {
c.addinstruction(x86.VMASKMOVPS(mxy, xy, mxy1))
}
// VMASKMOVPS: Conditional Move Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPS m128 xmm xmm
// VMASKMOVPS m256 ymm ymm
// VMASKMOVPS xmm xmm m128
// VMASKMOVPS ymm ymm m256
//
// Construct and append a VMASKMOVPS instruction to the active function.
// Operates on the global context.
func VMASKMOVPS(mxy, xy, mxy1 operand.Op) { ctx.VMASKMOVPS(mxy, xy, mxy1) }
// VMAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPD m128 xmm xmm
// VMAXPD m256 ymm ymm
// VMAXPD xmm xmm xmm
// VMAXPD ymm ymm ymm
// VMAXPD m128 xmm k xmm
// VMAXPD m256 ymm k ymm
// VMAXPD xmm xmm k xmm
// VMAXPD ymm ymm k ymm
// VMAXPD m512 zmm k zmm
// VMAXPD m512 zmm zmm
// VMAXPD zmm zmm k zmm
// VMAXPD zmm zmm zmm
//
// Construct and append a VMAXPD instruction to the active function.
func (c *Context) VMAXPD(ops ...operand.Op) {
c.addinstruction(x86.VMAXPD(ops...))
}
// VMAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPD m128 xmm xmm
// VMAXPD m256 ymm ymm
// VMAXPD xmm xmm xmm
// VMAXPD ymm ymm ymm
// VMAXPD m128 xmm k xmm
// VMAXPD m256 ymm k ymm
// VMAXPD xmm xmm k xmm
// VMAXPD ymm ymm k ymm
// VMAXPD m512 zmm k zmm
// VMAXPD m512 zmm zmm
// VMAXPD zmm zmm k zmm
// VMAXPD zmm zmm zmm
//
// Construct and append a VMAXPD instruction to the active function.
// Operates on the global context.
func VMAXPD(ops ...operand.Op) { ctx.VMAXPD(ops...) }
// VMAXPD_BCST: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPD.BCST m64 xmm k xmm
// VMAXPD.BCST m64 xmm xmm
// VMAXPD.BCST m64 ymm k ymm
// VMAXPD.BCST m64 ymm ymm
// VMAXPD.BCST m64 zmm k zmm
// VMAXPD.BCST m64 zmm zmm
//
// Construct and append a VMAXPD.BCST instruction to the active function.
func (c *Context) VMAXPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMAXPD_BCST(ops...))
}
// VMAXPD_BCST: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPD.BCST m64 xmm k xmm
// VMAXPD.BCST m64 xmm xmm
// VMAXPD.BCST m64 ymm k ymm
// VMAXPD.BCST m64 ymm ymm
// VMAXPD.BCST m64 zmm k zmm
// VMAXPD.BCST m64 zmm zmm
//
// Construct and append a VMAXPD.BCST instruction to the active function.
// Operates on the global context.
func VMAXPD_BCST(ops ...operand.Op) { ctx.VMAXPD_BCST(ops...) }
// VMAXPD_BCST_Z: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPD.BCST.Z m64 xmm k xmm
// VMAXPD.BCST.Z m64 ymm k ymm
// VMAXPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMAXPD.BCST.Z instruction to the active function.
func (c *Context) VMAXPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMAXPD_BCST_Z(m, xyz, k, xyz1))
}
// VMAXPD_BCST_Z: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPD.BCST.Z m64 xmm k xmm
// VMAXPD.BCST.Z m64 ymm k ymm
// VMAXPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMAXPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VMAXPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMAXPD_BCST_Z(m, xyz, k, xyz1) }
// VMAXPD_SAE: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPD.SAE zmm zmm k zmm
// VMAXPD.SAE zmm zmm zmm
//
// Construct and append a VMAXPD.SAE instruction to the active function.
func (c *Context) VMAXPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMAXPD_SAE(ops...))
}
// VMAXPD_SAE: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPD.SAE zmm zmm k zmm
// VMAXPD.SAE zmm zmm zmm
//
// Construct and append a VMAXPD.SAE instruction to the active function.
// Operates on the global context.
func VMAXPD_SAE(ops ...operand.Op) { ctx.VMAXPD_SAE(ops...) }
// VMAXPD_SAE_Z: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPD.SAE.Z zmm zmm k zmm
//
// Construct and append a VMAXPD.SAE.Z instruction to the active function.
func (c *Context) VMAXPD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMAXPD_SAE_Z(z, z1, k, z2))
}
// VMAXPD_SAE_Z: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPD.SAE.Z zmm zmm k zmm
//
// Construct and append a VMAXPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VMAXPD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMAXPD_SAE_Z(z, z1, k, z2) }
// VMAXPD_Z: Return Maximum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPD.Z m128 xmm k xmm
// VMAXPD.Z m256 ymm k ymm
// VMAXPD.Z xmm xmm k xmm
// VMAXPD.Z ymm ymm k ymm
// VMAXPD.Z m512 zmm k zmm
// VMAXPD.Z zmm zmm k zmm
//
// Construct and append a VMAXPD.Z instruction to the active function.
func (c *Context) VMAXPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMAXPD_Z(mxyz, xyz, k, xyz1))
}
// VMAXPD_Z: Return Maximum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPD.Z m128 xmm k xmm
// VMAXPD.Z m256 ymm k ymm
// VMAXPD.Z xmm xmm k xmm
// VMAXPD.Z ymm ymm k ymm
// VMAXPD.Z m512 zmm k zmm
// VMAXPD.Z zmm zmm k zmm
//
// Construct and append a VMAXPD.Z instruction to the active function.
// Operates on the global context.
func VMAXPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMAXPD_Z(mxyz, xyz, k, xyz1) }
// VMAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPS m128 xmm xmm
// VMAXPS m256 ymm ymm
// VMAXPS xmm xmm xmm
// VMAXPS ymm ymm ymm
// VMAXPS m128 xmm k xmm
// VMAXPS m256 ymm k ymm
// VMAXPS xmm xmm k xmm
// VMAXPS ymm ymm k ymm
// VMAXPS m512 zmm k zmm
// VMAXPS m512 zmm zmm
// VMAXPS zmm zmm k zmm
// VMAXPS zmm zmm zmm
//
// Construct and append a VMAXPS instruction to the active function.
func (c *Context) VMAXPS(ops ...operand.Op) {
c.addinstruction(x86.VMAXPS(ops...))
}
// VMAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPS m128 xmm xmm
// VMAXPS m256 ymm ymm
// VMAXPS xmm xmm xmm
// VMAXPS ymm ymm ymm
// VMAXPS m128 xmm k xmm
// VMAXPS m256 ymm k ymm
// VMAXPS xmm xmm k xmm
// VMAXPS ymm ymm k ymm
// VMAXPS m512 zmm k zmm
// VMAXPS m512 zmm zmm
// VMAXPS zmm zmm k zmm
// VMAXPS zmm zmm zmm
//
// Construct and append a VMAXPS instruction to the active function.
// Operates on the global context.
func VMAXPS(ops ...operand.Op) { ctx.VMAXPS(ops...) }
// VMAXPS_BCST: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPS.BCST m32 xmm k xmm
// VMAXPS.BCST m32 xmm xmm
// VMAXPS.BCST m32 ymm k ymm
// VMAXPS.BCST m32 ymm ymm
// VMAXPS.BCST m32 zmm k zmm
// VMAXPS.BCST m32 zmm zmm
//
// Construct and append a VMAXPS.BCST instruction to the active function.
func (c *Context) VMAXPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMAXPS_BCST(ops...))
}
// VMAXPS_BCST: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPS.BCST m32 xmm k xmm
// VMAXPS.BCST m32 xmm xmm
// VMAXPS.BCST m32 ymm k ymm
// VMAXPS.BCST m32 ymm ymm
// VMAXPS.BCST m32 zmm k zmm
// VMAXPS.BCST m32 zmm zmm
//
// Construct and append a VMAXPS.BCST instruction to the active function.
// Operates on the global context.
func VMAXPS_BCST(ops ...operand.Op) { ctx.VMAXPS_BCST(ops...) }
// VMAXPS_BCST_Z: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPS.BCST.Z m32 xmm k xmm
// VMAXPS.BCST.Z m32 ymm k ymm
// VMAXPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMAXPS.BCST.Z instruction to the active function.
func (c *Context) VMAXPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMAXPS_BCST_Z(m, xyz, k, xyz1))
}
// VMAXPS_BCST_Z: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPS.BCST.Z m32 xmm k xmm
// VMAXPS.BCST.Z m32 ymm k ymm
// VMAXPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMAXPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VMAXPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMAXPS_BCST_Z(m, xyz, k, xyz1) }
// VMAXPS_SAE: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPS.SAE zmm zmm k zmm
// VMAXPS.SAE zmm zmm zmm
//
// Construct and append a VMAXPS.SAE instruction to the active function.
func (c *Context) VMAXPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMAXPS_SAE(ops...))
}
// VMAXPS_SAE: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPS.SAE zmm zmm k zmm
// VMAXPS.SAE zmm zmm zmm
//
// Construct and append a VMAXPS.SAE instruction to the active function.
// Operates on the global context.
func VMAXPS_SAE(ops ...operand.Op) { ctx.VMAXPS_SAE(ops...) }
// VMAXPS_SAE_Z: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPS.SAE.Z zmm zmm k zmm
//
// Construct and append a VMAXPS.SAE.Z instruction to the active function.
func (c *Context) VMAXPS_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMAXPS_SAE_Z(z, z1, k, z2))
}
// VMAXPS_SAE_Z: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPS.SAE.Z zmm zmm k zmm
//
// Construct and append a VMAXPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VMAXPS_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMAXPS_SAE_Z(z, z1, k, z2) }
// VMAXPS_Z: Return Maximum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPS.Z m128 xmm k xmm
// VMAXPS.Z m256 ymm k ymm
// VMAXPS.Z xmm xmm k xmm
// VMAXPS.Z ymm ymm k ymm
// VMAXPS.Z m512 zmm k zmm
// VMAXPS.Z zmm zmm k zmm
//
// Construct and append a VMAXPS.Z instruction to the active function.
func (c *Context) VMAXPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMAXPS_Z(mxyz, xyz, k, xyz1))
}
// VMAXPS_Z: Return Maximum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPS.Z m128 xmm k xmm
// VMAXPS.Z m256 ymm k ymm
// VMAXPS.Z xmm xmm k xmm
// VMAXPS.Z ymm ymm k ymm
// VMAXPS.Z m512 zmm k zmm
// VMAXPS.Z zmm zmm k zmm
//
// Construct and append a VMAXPS.Z instruction to the active function.
// Operates on the global context.
func VMAXPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMAXPS_Z(mxyz, xyz, k, xyz1) }
// VMAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSD m64 xmm xmm
// VMAXSD xmm xmm xmm
// VMAXSD m64 xmm k xmm
// VMAXSD xmm xmm k xmm
//
// Construct and append a VMAXSD instruction to the active function.
func (c *Context) VMAXSD(ops ...operand.Op) {
c.addinstruction(x86.VMAXSD(ops...))
}
// VMAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSD m64 xmm xmm
// VMAXSD xmm xmm xmm
// VMAXSD m64 xmm k xmm
// VMAXSD xmm xmm k xmm
//
// Construct and append a VMAXSD instruction to the active function.
// Operates on the global context.
func VMAXSD(ops ...operand.Op) { ctx.VMAXSD(ops...) }
// VMAXSD_SAE: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSD.SAE xmm xmm k xmm
// VMAXSD.SAE xmm xmm xmm
//
// Construct and append a VMAXSD.SAE instruction to the active function.
func (c *Context) VMAXSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMAXSD_SAE(ops...))
}
// VMAXSD_SAE: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSD.SAE xmm xmm k xmm
// VMAXSD.SAE xmm xmm xmm
//
// Construct and append a VMAXSD.SAE instruction to the active function.
// Operates on the global context.
func VMAXSD_SAE(ops ...operand.Op) { ctx.VMAXSD_SAE(ops...) }
// VMAXSD_SAE_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VMAXSD.SAE.Z instruction to the active function.
func (c *Context) VMAXSD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMAXSD_SAE_Z(x, x1, k, x2))
}
// VMAXSD_SAE_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VMAXSD.SAE.Z instruction to the active function.
// Operates on the global context.
func VMAXSD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMAXSD_SAE_Z(x, x1, k, x2) }
// VMAXSD_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSD.Z m64 xmm k xmm
// VMAXSD.Z xmm xmm k xmm
//
// Construct and append a VMAXSD.Z instruction to the active function.
func (c *Context) VMAXSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMAXSD_Z(mx, x, k, x1))
}
// VMAXSD_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSD.Z m64 xmm k xmm
// VMAXSD.Z xmm xmm k xmm
//
// Construct and append a VMAXSD.Z instruction to the active function.
// Operates on the global context.
func VMAXSD_Z(mx, x, k, x1 operand.Op) { ctx.VMAXSD_Z(mx, x, k, x1) }
// VMAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSS m32 xmm xmm
// VMAXSS xmm xmm xmm
// VMAXSS m32 xmm k xmm
// VMAXSS xmm xmm k xmm
//
// Construct and append a VMAXSS instruction to the active function.
func (c *Context) VMAXSS(ops ...operand.Op) {
c.addinstruction(x86.VMAXSS(ops...))
}
// VMAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSS m32 xmm xmm
// VMAXSS xmm xmm xmm
// VMAXSS m32 xmm k xmm
// VMAXSS xmm xmm k xmm
//
// Construct and append a VMAXSS instruction to the active function.
// Operates on the global context.
func VMAXSS(ops ...operand.Op) { ctx.VMAXSS(ops...) }
// VMAXSS_SAE: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSS.SAE xmm xmm k xmm
// VMAXSS.SAE xmm xmm xmm
//
// Construct and append a VMAXSS.SAE instruction to the active function.
func (c *Context) VMAXSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMAXSS_SAE(ops...))
}
// VMAXSS_SAE: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSS.SAE xmm xmm k xmm
// VMAXSS.SAE xmm xmm xmm
//
// Construct and append a VMAXSS.SAE instruction to the active function.
// Operates on the global context.
func VMAXSS_SAE(ops ...operand.Op) { ctx.VMAXSS_SAE(ops...) }
// VMAXSS_SAE_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VMAXSS.SAE.Z instruction to the active function.
func (c *Context) VMAXSS_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMAXSS_SAE_Z(x, x1, k, x2))
}
// VMAXSS_SAE_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VMAXSS.SAE.Z instruction to the active function.
// Operates on the global context.
func VMAXSS_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMAXSS_SAE_Z(x, x1, k, x2) }
// VMAXSS_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSS.Z m32 xmm k xmm
// VMAXSS.Z xmm xmm k xmm
//
// Construct and append a VMAXSS.Z instruction to the active function.
func (c *Context) VMAXSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMAXSS_Z(mx, x, k, x1))
}
// VMAXSS_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSS.Z m32 xmm k xmm
// VMAXSS.Z xmm xmm k xmm
//
// Construct and append a VMAXSS.Z instruction to the active function.
// Operates on the global context.
func VMAXSS_Z(mx, x, k, x1 operand.Op) { ctx.VMAXSS_Z(mx, x, k, x1) }
// VMINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMINPD m128 xmm xmm
// VMINPD m256 ymm ymm
// VMINPD xmm xmm xmm
// VMINPD ymm ymm ymm
// VMINPD m128 xmm k xmm
// VMINPD m256 ymm k ymm
// VMINPD xmm xmm k xmm
// VMINPD ymm ymm k ymm
// VMINPD m512 zmm k zmm
// VMINPD m512 zmm zmm
// VMINPD zmm zmm k zmm
// VMINPD zmm zmm zmm
//
// Construct and append a VMINPD instruction to the active function.
func (c *Context) VMINPD(ops ...operand.Op) {
c.addinstruction(x86.VMINPD(ops...))
}
// VMINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMINPD m128 xmm xmm
// VMINPD m256 ymm ymm
// VMINPD xmm xmm xmm
// VMINPD ymm ymm ymm
// VMINPD m128 xmm k xmm
// VMINPD m256 ymm k ymm
// VMINPD xmm xmm k xmm
// VMINPD ymm ymm k ymm
// VMINPD m512 zmm k zmm
// VMINPD m512 zmm zmm
// VMINPD zmm zmm k zmm
// VMINPD zmm zmm zmm
//
// Construct and append a VMINPD instruction to the active function.
// Operates on the global context.
func VMINPD(ops ...operand.Op) { ctx.VMINPD(ops...) }
// VMINPD_BCST: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPD.BCST m64 xmm k xmm
// VMINPD.BCST m64 xmm xmm
// VMINPD.BCST m64 ymm k ymm
// VMINPD.BCST m64 ymm ymm
// VMINPD.BCST m64 zmm k zmm
// VMINPD.BCST m64 zmm zmm
//
// Construct and append a VMINPD.BCST instruction to the active function.
func (c *Context) VMINPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMINPD_BCST(ops...))
}
// VMINPD_BCST: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPD.BCST m64 xmm k xmm
// VMINPD.BCST m64 xmm xmm
// VMINPD.BCST m64 ymm k ymm
// VMINPD.BCST m64 ymm ymm
// VMINPD.BCST m64 zmm k zmm
// VMINPD.BCST m64 zmm zmm
//
// Construct and append a VMINPD.BCST instruction to the active function.
// Operates on the global context.
func VMINPD_BCST(ops ...operand.Op) { ctx.VMINPD_BCST(ops...) }
// VMINPD_BCST_Z: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPD.BCST.Z m64 xmm k xmm
// VMINPD.BCST.Z m64 ymm k ymm
// VMINPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMINPD.BCST.Z instruction to the active function.
func (c *Context) VMINPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMINPD_BCST_Z(m, xyz, k, xyz1))
}
// VMINPD_BCST_Z: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPD.BCST.Z m64 xmm k xmm
// VMINPD.BCST.Z m64 ymm k ymm
// VMINPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMINPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VMINPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMINPD_BCST_Z(m, xyz, k, xyz1) }
// VMINPD_SAE: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPD.SAE zmm zmm k zmm
// VMINPD.SAE zmm zmm zmm
//
// Construct and append a VMINPD.SAE instruction to the active function.
func (c *Context) VMINPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMINPD_SAE(ops...))
}
// VMINPD_SAE: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPD.SAE zmm zmm k zmm
// VMINPD.SAE zmm zmm zmm
//
// Construct and append a VMINPD.SAE instruction to the active function.
// Operates on the global context.
func VMINPD_SAE(ops ...operand.Op) { ctx.VMINPD_SAE(ops...) }
// VMINPD_SAE_Z: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPD.SAE.Z zmm zmm k zmm
//
// Construct and append a VMINPD.SAE.Z instruction to the active function.
func (c *Context) VMINPD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMINPD_SAE_Z(z, z1, k, z2))
}
// VMINPD_SAE_Z: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPD.SAE.Z zmm zmm k zmm
//
// Construct and append a VMINPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VMINPD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMINPD_SAE_Z(z, z1, k, z2) }
// VMINPD_Z: Return Minimum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPD.Z m128 xmm k xmm
// VMINPD.Z m256 ymm k ymm
// VMINPD.Z xmm xmm k xmm
// VMINPD.Z ymm ymm k ymm
// VMINPD.Z m512 zmm k zmm
// VMINPD.Z zmm zmm k zmm
//
// Construct and append a VMINPD.Z instruction to the active function.
func (c *Context) VMINPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMINPD_Z(mxyz, xyz, k, xyz1))
}
// VMINPD_Z: Return Minimum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPD.Z m128 xmm k xmm
// VMINPD.Z m256 ymm k ymm
// VMINPD.Z xmm xmm k xmm
// VMINPD.Z ymm ymm k ymm
// VMINPD.Z m512 zmm k zmm
// VMINPD.Z zmm zmm k zmm
//
// Construct and append a VMINPD.Z instruction to the active function.
// Operates on the global context.
func VMINPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMINPD_Z(mxyz, xyz, k, xyz1) }
// VMINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMINPS m128 xmm xmm
// VMINPS m256 ymm ymm
// VMINPS xmm xmm xmm
// VMINPS ymm ymm ymm
// VMINPS m128 xmm k xmm
// VMINPS m256 ymm k ymm
// VMINPS xmm xmm k xmm
// VMINPS ymm ymm k ymm
// VMINPS m512 zmm k zmm
// VMINPS m512 zmm zmm
// VMINPS zmm zmm k zmm
// VMINPS zmm zmm zmm
//
// Construct and append a VMINPS instruction to the active function.
func (c *Context) VMINPS(ops ...operand.Op) {
c.addinstruction(x86.VMINPS(ops...))
}
// VMINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMINPS m128 xmm xmm
// VMINPS m256 ymm ymm
// VMINPS xmm xmm xmm
// VMINPS ymm ymm ymm
// VMINPS m128 xmm k xmm
// VMINPS m256 ymm k ymm
// VMINPS xmm xmm k xmm
// VMINPS ymm ymm k ymm
// VMINPS m512 zmm k zmm
// VMINPS m512 zmm zmm
// VMINPS zmm zmm k zmm
// VMINPS zmm zmm zmm
//
// Construct and append a VMINPS instruction to the active function.
// Operates on the global context.
func VMINPS(ops ...operand.Op) { ctx.VMINPS(ops...) }
// VMINPS_BCST: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPS.BCST m32 xmm k xmm
// VMINPS.BCST m32 xmm xmm
// VMINPS.BCST m32 ymm k ymm
// VMINPS.BCST m32 ymm ymm
// VMINPS.BCST m32 zmm k zmm
// VMINPS.BCST m32 zmm zmm
//
// Construct and append a VMINPS.BCST instruction to the active function.
func (c *Context) VMINPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMINPS_BCST(ops...))
}
// VMINPS_BCST: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPS.BCST m32 xmm k xmm
// VMINPS.BCST m32 xmm xmm
// VMINPS.BCST m32 ymm k ymm
// VMINPS.BCST m32 ymm ymm
// VMINPS.BCST m32 zmm k zmm
// VMINPS.BCST m32 zmm zmm
//
// Construct and append a VMINPS.BCST instruction to the active function.
// Operates on the global context.
func VMINPS_BCST(ops ...operand.Op) { ctx.VMINPS_BCST(ops...) }
// VMINPS_BCST_Z: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPS.BCST.Z m32 xmm k xmm
// VMINPS.BCST.Z m32 ymm k ymm
// VMINPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMINPS.BCST.Z instruction to the active function.
func (c *Context) VMINPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMINPS_BCST_Z(m, xyz, k, xyz1))
}
// VMINPS_BCST_Z: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPS.BCST.Z m32 xmm k xmm
// VMINPS.BCST.Z m32 ymm k ymm
// VMINPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMINPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VMINPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMINPS_BCST_Z(m, xyz, k, xyz1) }
// VMINPS_SAE: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPS.SAE zmm zmm k zmm
// VMINPS.SAE zmm zmm zmm
//
// Construct and append a VMINPS.SAE instruction to the active function.
func (c *Context) VMINPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMINPS_SAE(ops...))
}
// VMINPS_SAE: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPS.SAE zmm zmm k zmm
// VMINPS.SAE zmm zmm zmm
//
// Construct and append a VMINPS.SAE instruction to the active function.
// Operates on the global context.
func VMINPS_SAE(ops ...operand.Op) { ctx.VMINPS_SAE(ops...) }
// VMINPS_SAE_Z: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPS.SAE.Z zmm zmm k zmm
//
// Construct and append a VMINPS.SAE.Z instruction to the active function.
func (c *Context) VMINPS_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMINPS_SAE_Z(z, z1, k, z2))
}
// VMINPS_SAE_Z: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPS.SAE.Z zmm zmm k zmm
//
// Construct and append a VMINPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VMINPS_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMINPS_SAE_Z(z, z1, k, z2) }
// VMINPS_Z: Return Minimum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPS.Z m128 xmm k xmm
// VMINPS.Z m256 ymm k ymm
// VMINPS.Z xmm xmm k xmm
// VMINPS.Z ymm ymm k ymm
// VMINPS.Z m512 zmm k zmm
// VMINPS.Z zmm zmm k zmm
//
// Construct and append a VMINPS.Z instruction to the active function.
func (c *Context) VMINPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMINPS_Z(mxyz, xyz, k, xyz1))
}
// VMINPS_Z: Return Minimum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPS.Z m128 xmm k xmm
// VMINPS.Z m256 ymm k ymm
// VMINPS.Z xmm xmm k xmm
// VMINPS.Z ymm ymm k ymm
// VMINPS.Z m512 zmm k zmm
// VMINPS.Z zmm zmm k zmm
//
// Construct and append a VMINPS.Z instruction to the active function.
// Operates on the global context.
func VMINPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMINPS_Z(mxyz, xyz, k, xyz1) }
// VMINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMINSD m64 xmm xmm
// VMINSD xmm xmm xmm
// VMINSD m64 xmm k xmm
// VMINSD xmm xmm k xmm
//
// Construct and append a VMINSD instruction to the active function.
func (c *Context) VMINSD(ops ...operand.Op) {
c.addinstruction(x86.VMINSD(ops...))
}
// VMINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMINSD m64 xmm xmm
// VMINSD xmm xmm xmm
// VMINSD m64 xmm k xmm
// VMINSD xmm xmm k xmm
//
// Construct and append a VMINSD instruction to the active function.
// Operates on the global context.
func VMINSD(ops ...operand.Op) { ctx.VMINSD(ops...) }
// VMINSD_SAE: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSD.SAE xmm xmm k xmm
// VMINSD.SAE xmm xmm xmm
//
// Construct and append a VMINSD.SAE instruction to the active function.
func (c *Context) VMINSD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMINSD_SAE(ops...))
}
// VMINSD_SAE: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSD.SAE xmm xmm k xmm
// VMINSD.SAE xmm xmm xmm
//
// Construct and append a VMINSD.SAE instruction to the active function.
// Operates on the global context.
func VMINSD_SAE(ops ...operand.Op) { ctx.VMINSD_SAE(ops...) }
// VMINSD_SAE_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VMINSD.SAE.Z instruction to the active function.
func (c *Context) VMINSD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMINSD_SAE_Z(x, x1, k, x2))
}
// VMINSD_SAE_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSD.SAE.Z xmm xmm k xmm
//
// Construct and append a VMINSD.SAE.Z instruction to the active function.
// Operates on the global context.
func VMINSD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMINSD_SAE_Z(x, x1, k, x2) }
// VMINSD_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSD.Z m64 xmm k xmm
// VMINSD.Z xmm xmm k xmm
//
// Construct and append a VMINSD.Z instruction to the active function.
func (c *Context) VMINSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMINSD_Z(mx, x, k, x1))
}
// VMINSD_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSD.Z m64 xmm k xmm
// VMINSD.Z xmm xmm k xmm
//
// Construct and append a VMINSD.Z instruction to the active function.
// Operates on the global context.
func VMINSD_Z(mx, x, k, x1 operand.Op) { ctx.VMINSD_Z(mx, x, k, x1) }
// VMINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMINSS m32 xmm xmm
// VMINSS xmm xmm xmm
// VMINSS m32 xmm k xmm
// VMINSS xmm xmm k xmm
//
// Construct and append a VMINSS instruction to the active function.
func (c *Context) VMINSS(ops ...operand.Op) {
c.addinstruction(x86.VMINSS(ops...))
}
// VMINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMINSS m32 xmm xmm
// VMINSS xmm xmm xmm
// VMINSS m32 xmm k xmm
// VMINSS xmm xmm k xmm
//
// Construct and append a VMINSS instruction to the active function.
// Operates on the global context.
func VMINSS(ops ...operand.Op) { ctx.VMINSS(ops...) }
// VMINSS_SAE: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSS.SAE xmm xmm k xmm
// VMINSS.SAE xmm xmm xmm
//
// Construct and append a VMINSS.SAE instruction to the active function.
func (c *Context) VMINSS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMINSS_SAE(ops...))
}
// VMINSS_SAE: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSS.SAE xmm xmm k xmm
// VMINSS.SAE xmm xmm xmm
//
// Construct and append a VMINSS.SAE instruction to the active function.
// Operates on the global context.
func VMINSS_SAE(ops ...operand.Op) { ctx.VMINSS_SAE(ops...) }
// VMINSS_SAE_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VMINSS.SAE.Z instruction to the active function.
func (c *Context) VMINSS_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMINSS_SAE_Z(x, x1, k, x2))
}
// VMINSS_SAE_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSS.SAE.Z xmm xmm k xmm
//
// Construct and append a VMINSS.SAE.Z instruction to the active function.
// Operates on the global context.
func VMINSS_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMINSS_SAE_Z(x, x1, k, x2) }
// VMINSS_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSS.Z m32 xmm k xmm
// VMINSS.Z xmm xmm k xmm
//
// Construct and append a VMINSS.Z instruction to the active function.
func (c *Context) VMINSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMINSS_Z(mx, x, k, x1))
}
// VMINSS_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSS.Z m32 xmm k xmm
// VMINSS.Z xmm xmm k xmm
//
// Construct and append a VMINSS.Z instruction to the active function.
// Operates on the global context.
func VMINSS_Z(mx, x, k, x1 operand.Op) { ctx.VMINSS_Z(mx, x, k, x1) }
// VMOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPD m128 xmm
// VMOVAPD m256 ymm
// VMOVAPD xmm m128
// VMOVAPD xmm xmm
// VMOVAPD ymm m256
// VMOVAPD ymm ymm
// VMOVAPD m128 k xmm
// VMOVAPD m256 k ymm
// VMOVAPD xmm k m128
// VMOVAPD xmm k xmm
// VMOVAPD ymm k m256
// VMOVAPD ymm k ymm
// VMOVAPD m512 k zmm
// VMOVAPD m512 zmm
// VMOVAPD zmm k m512
// VMOVAPD zmm k zmm
// VMOVAPD zmm m512
// VMOVAPD zmm zmm
//
// Construct and append a VMOVAPD instruction to the active function.
func (c *Context) VMOVAPD(ops ...operand.Op) {
c.addinstruction(x86.VMOVAPD(ops...))
}
// VMOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPD m128 xmm
// VMOVAPD m256 ymm
// VMOVAPD xmm m128
// VMOVAPD xmm xmm
// VMOVAPD ymm m256
// VMOVAPD ymm ymm
// VMOVAPD m128 k xmm
// VMOVAPD m256 k ymm
// VMOVAPD xmm k m128
// VMOVAPD xmm k xmm
// VMOVAPD ymm k m256
// VMOVAPD ymm k ymm
// VMOVAPD m512 k zmm
// VMOVAPD m512 zmm
// VMOVAPD zmm k m512
// VMOVAPD zmm k zmm
// VMOVAPD zmm m512
// VMOVAPD zmm zmm
//
// Construct and append a VMOVAPD instruction to the active function.
// Operates on the global context.
func VMOVAPD(ops ...operand.Op) { ctx.VMOVAPD(ops...) }
// VMOVAPD_Z: Move Aligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPD.Z m128 k xmm
// VMOVAPD.Z m256 k ymm
// VMOVAPD.Z xmm k m128
// VMOVAPD.Z xmm k xmm
// VMOVAPD.Z ymm k m256
// VMOVAPD.Z ymm k ymm
// VMOVAPD.Z m512 k zmm
// VMOVAPD.Z zmm k m512
// VMOVAPD.Z zmm k zmm
//
// Construct and append a VMOVAPD.Z instruction to the active function.
func (c *Context) VMOVAPD_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVAPD_Z(mxyz, k, mxyz1))
}
// VMOVAPD_Z: Move Aligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPD.Z m128 k xmm
// VMOVAPD.Z m256 k ymm
// VMOVAPD.Z xmm k m128
// VMOVAPD.Z xmm k xmm
// VMOVAPD.Z ymm k m256
// VMOVAPD.Z ymm k ymm
// VMOVAPD.Z m512 k zmm
// VMOVAPD.Z zmm k m512
// VMOVAPD.Z zmm k zmm
//
// Construct and append a VMOVAPD.Z instruction to the active function.
// Operates on the global context.
func VMOVAPD_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVAPD_Z(mxyz, k, mxyz1) }
// VMOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPS m128 xmm
// VMOVAPS m256 ymm
// VMOVAPS xmm m128
// VMOVAPS xmm xmm
// VMOVAPS ymm m256
// VMOVAPS ymm ymm
// VMOVAPS m128 k xmm
// VMOVAPS m256 k ymm
// VMOVAPS xmm k m128
// VMOVAPS xmm k xmm
// VMOVAPS ymm k m256
// VMOVAPS ymm k ymm
// VMOVAPS m512 k zmm
// VMOVAPS m512 zmm
// VMOVAPS zmm k m512
// VMOVAPS zmm k zmm
// VMOVAPS zmm m512
// VMOVAPS zmm zmm
//
// Construct and append a VMOVAPS instruction to the active function.
func (c *Context) VMOVAPS(ops ...operand.Op) {
c.addinstruction(x86.VMOVAPS(ops...))
}
// VMOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPS m128 xmm
// VMOVAPS m256 ymm
// VMOVAPS xmm m128
// VMOVAPS xmm xmm
// VMOVAPS ymm m256
// VMOVAPS ymm ymm
// VMOVAPS m128 k xmm
// VMOVAPS m256 k ymm
// VMOVAPS xmm k m128
// VMOVAPS xmm k xmm
// VMOVAPS ymm k m256
// VMOVAPS ymm k ymm
// VMOVAPS m512 k zmm
// VMOVAPS m512 zmm
// VMOVAPS zmm k m512
// VMOVAPS zmm k zmm
// VMOVAPS zmm m512
// VMOVAPS zmm zmm
//
// Construct and append a VMOVAPS instruction to the active function.
// Operates on the global context.
func VMOVAPS(ops ...operand.Op) { ctx.VMOVAPS(ops...) }
// VMOVAPS_Z: Move Aligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPS.Z m128 k xmm
// VMOVAPS.Z m256 k ymm
// VMOVAPS.Z xmm k m128
// VMOVAPS.Z xmm k xmm
// VMOVAPS.Z ymm k m256
// VMOVAPS.Z ymm k ymm
// VMOVAPS.Z m512 k zmm
// VMOVAPS.Z zmm k m512
// VMOVAPS.Z zmm k zmm
//
// Construct and append a VMOVAPS.Z instruction to the active function.
func (c *Context) VMOVAPS_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVAPS_Z(mxyz, k, mxyz1))
}
// VMOVAPS_Z: Move Aligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPS.Z m128 k xmm
// VMOVAPS.Z m256 k ymm
// VMOVAPS.Z xmm k m128
// VMOVAPS.Z xmm k xmm
// VMOVAPS.Z ymm k m256
// VMOVAPS.Z ymm k ymm
// VMOVAPS.Z m512 k zmm
// VMOVAPS.Z zmm k m512
// VMOVAPS.Z zmm k zmm
//
// Construct and append a VMOVAPS.Z instruction to the active function.
// Operates on the global context.
func VMOVAPS_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVAPS_Z(mxyz, k, mxyz1) }
// VMOVD: Move Doubleword.
//
// Forms:
//
// VMOVD m32 xmm
// VMOVD r32 xmm
// VMOVD xmm m32
// VMOVD xmm r32
//
// Construct and append a VMOVD instruction to the active function.
func (c *Context) VMOVD(mrx, mrx1 operand.Op) {
c.addinstruction(x86.VMOVD(mrx, mrx1))
}
// VMOVD: Move Doubleword.
//
// Forms:
//
// VMOVD m32 xmm
// VMOVD r32 xmm
// VMOVD xmm m32
// VMOVD xmm r32
//
// Construct and append a VMOVD instruction to the active function.
// Operates on the global context.
func VMOVD(mrx, mrx1 operand.Op) { ctx.VMOVD(mrx, mrx1) }
// VMOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// VMOVDDUP m256 ymm
// VMOVDDUP m64 xmm
// VMOVDDUP xmm xmm
// VMOVDDUP ymm ymm
// VMOVDDUP m256 k ymm
// VMOVDDUP m64 k xmm
// VMOVDDUP xmm k xmm
// VMOVDDUP ymm k ymm
// VMOVDDUP m512 k zmm
// VMOVDDUP m512 zmm
// VMOVDDUP zmm k zmm
// VMOVDDUP zmm zmm
//
// Construct and append a VMOVDDUP instruction to the active function.
func (c *Context) VMOVDDUP(ops ...operand.Op) {
c.addinstruction(x86.VMOVDDUP(ops...))
}
// VMOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// VMOVDDUP m256 ymm
// VMOVDDUP m64 xmm
// VMOVDDUP xmm xmm
// VMOVDDUP ymm ymm
// VMOVDDUP m256 k ymm
// VMOVDDUP m64 k xmm
// VMOVDDUP xmm k xmm
// VMOVDDUP ymm k ymm
// VMOVDDUP m512 k zmm
// VMOVDDUP m512 zmm
// VMOVDDUP zmm k zmm
// VMOVDDUP zmm zmm
//
// Construct and append a VMOVDDUP instruction to the active function.
// Operates on the global context.
func VMOVDDUP(ops ...operand.Op) { ctx.VMOVDDUP(ops...) }
// VMOVDDUP_Z: Move One Double-FP and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVDDUP.Z m256 k ymm
// VMOVDDUP.Z m64 k xmm
// VMOVDDUP.Z xmm k xmm
// VMOVDDUP.Z ymm k ymm
// VMOVDDUP.Z m512 k zmm
// VMOVDDUP.Z zmm k zmm
//
// Construct and append a VMOVDDUP.Z instruction to the active function.
func (c *Context) VMOVDDUP_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VMOVDDUP_Z(mxyz, k, xyz))
}
// VMOVDDUP_Z: Move One Double-FP and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVDDUP.Z m256 k ymm
// VMOVDDUP.Z m64 k xmm
// VMOVDDUP.Z xmm k xmm
// VMOVDDUP.Z ymm k ymm
// VMOVDDUP.Z m512 k zmm
// VMOVDDUP.Z zmm k zmm
//
// Construct and append a VMOVDDUP.Z instruction to the active function.
// Operates on the global context.
func VMOVDDUP_Z(mxyz, k, xyz operand.Op) { ctx.VMOVDDUP_Z(mxyz, k, xyz) }
// VMOVDQA: Move Aligned Double Quadword.
//
// Forms:
//
// VMOVDQA m128 xmm
// VMOVDQA m256 ymm
// VMOVDQA xmm m128
// VMOVDQA xmm xmm
// VMOVDQA ymm m256
// VMOVDQA ymm ymm
//
// Construct and append a VMOVDQA instruction to the active function.
func (c *Context) VMOVDQA(mxy, mxy1 operand.Op) {
c.addinstruction(x86.VMOVDQA(mxy, mxy1))
}
// VMOVDQA: Move Aligned Double Quadword.
//
// Forms:
//
// VMOVDQA m128 xmm
// VMOVDQA m256 ymm
// VMOVDQA xmm m128
// VMOVDQA xmm xmm
// VMOVDQA ymm m256
// VMOVDQA ymm ymm
//
// Construct and append a VMOVDQA instruction to the active function.
// Operates on the global context.
func VMOVDQA(mxy, mxy1 operand.Op) { ctx.VMOVDQA(mxy, mxy1) }
// VMOVDQA32: Move Aligned Doubleword Values.
//
// Forms:
//
// VMOVDQA32 m128 k xmm
// VMOVDQA32 m128 xmm
// VMOVDQA32 m256 k ymm
// VMOVDQA32 m256 ymm
// VMOVDQA32 xmm k m128
// VMOVDQA32 xmm k xmm
// VMOVDQA32 xmm m128
// VMOVDQA32 xmm xmm
// VMOVDQA32 ymm k m256
// VMOVDQA32 ymm k ymm
// VMOVDQA32 ymm m256
// VMOVDQA32 ymm ymm
// VMOVDQA32 m512 k zmm
// VMOVDQA32 m512 zmm
// VMOVDQA32 zmm k m512
// VMOVDQA32 zmm k zmm
// VMOVDQA32 zmm m512
// VMOVDQA32 zmm zmm
//
// Construct and append a VMOVDQA32 instruction to the active function.
func (c *Context) VMOVDQA32(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQA32(ops...))
}
// VMOVDQA32: Move Aligned Doubleword Values.
//
// Forms:
//
// VMOVDQA32 m128 k xmm
// VMOVDQA32 m128 xmm
// VMOVDQA32 m256 k ymm
// VMOVDQA32 m256 ymm
// VMOVDQA32 xmm k m128
// VMOVDQA32 xmm k xmm
// VMOVDQA32 xmm m128
// VMOVDQA32 xmm xmm
// VMOVDQA32 ymm k m256
// VMOVDQA32 ymm k ymm
// VMOVDQA32 ymm m256
// VMOVDQA32 ymm ymm
// VMOVDQA32 m512 k zmm
// VMOVDQA32 m512 zmm
// VMOVDQA32 zmm k m512
// VMOVDQA32 zmm k zmm
// VMOVDQA32 zmm m512
// VMOVDQA32 zmm zmm
//
// Construct and append a VMOVDQA32 instruction to the active function.
// Operates on the global context.
func VMOVDQA32(ops ...operand.Op) { ctx.VMOVDQA32(ops...) }
// VMOVDQA32_Z: Move Aligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA32.Z m128 k xmm
// VMOVDQA32.Z m256 k ymm
// VMOVDQA32.Z xmm k m128
// VMOVDQA32.Z xmm k xmm
// VMOVDQA32.Z ymm k m256
// VMOVDQA32.Z ymm k ymm
// VMOVDQA32.Z m512 k zmm
// VMOVDQA32.Z zmm k m512
// VMOVDQA32.Z zmm k zmm
//
// Construct and append a VMOVDQA32.Z instruction to the active function.
func (c *Context) VMOVDQA32_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQA32_Z(mxyz, k, mxyz1))
}
// VMOVDQA32_Z: Move Aligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA32.Z m128 k xmm
// VMOVDQA32.Z m256 k ymm
// VMOVDQA32.Z xmm k m128
// VMOVDQA32.Z xmm k xmm
// VMOVDQA32.Z ymm k m256
// VMOVDQA32.Z ymm k ymm
// VMOVDQA32.Z m512 k zmm
// VMOVDQA32.Z zmm k m512
// VMOVDQA32.Z zmm k zmm
//
// Construct and append a VMOVDQA32.Z instruction to the active function.
// Operates on the global context.
func VMOVDQA32_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQA32_Z(mxyz, k, mxyz1) }
// VMOVDQA64: Move Aligned Quadword Values.
//
// Forms:
//
// VMOVDQA64 m128 k xmm
// VMOVDQA64 m128 xmm
// VMOVDQA64 m256 k ymm
// VMOVDQA64 m256 ymm
// VMOVDQA64 xmm k m128
// VMOVDQA64 xmm k xmm
// VMOVDQA64 xmm m128
// VMOVDQA64 xmm xmm
// VMOVDQA64 ymm k m256
// VMOVDQA64 ymm k ymm
// VMOVDQA64 ymm m256
// VMOVDQA64 ymm ymm
// VMOVDQA64 m512 k zmm
// VMOVDQA64 m512 zmm
// VMOVDQA64 zmm k m512
// VMOVDQA64 zmm k zmm
// VMOVDQA64 zmm m512
// VMOVDQA64 zmm zmm
//
// Construct and append a VMOVDQA64 instruction to the active function.
func (c *Context) VMOVDQA64(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQA64(ops...))
}
// VMOVDQA64: Move Aligned Quadword Values.
//
// Forms:
//
// VMOVDQA64 m128 k xmm
// VMOVDQA64 m128 xmm
// VMOVDQA64 m256 k ymm
// VMOVDQA64 m256 ymm
// VMOVDQA64 xmm k m128
// VMOVDQA64 xmm k xmm
// VMOVDQA64 xmm m128
// VMOVDQA64 xmm xmm
// VMOVDQA64 ymm k m256
// VMOVDQA64 ymm k ymm
// VMOVDQA64 ymm m256
// VMOVDQA64 ymm ymm
// VMOVDQA64 m512 k zmm
// VMOVDQA64 m512 zmm
// VMOVDQA64 zmm k m512
// VMOVDQA64 zmm k zmm
// VMOVDQA64 zmm m512
// VMOVDQA64 zmm zmm
//
// Construct and append a VMOVDQA64 instruction to the active function.
// Operates on the global context.
func VMOVDQA64(ops ...operand.Op) { ctx.VMOVDQA64(ops...) }
// VMOVDQA64_Z: Move Aligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA64.Z m128 k xmm
// VMOVDQA64.Z m256 k ymm
// VMOVDQA64.Z xmm k m128
// VMOVDQA64.Z xmm k xmm
// VMOVDQA64.Z ymm k m256
// VMOVDQA64.Z ymm k ymm
// VMOVDQA64.Z m512 k zmm
// VMOVDQA64.Z zmm k m512
// VMOVDQA64.Z zmm k zmm
//
// Construct and append a VMOVDQA64.Z instruction to the active function.
func (c *Context) VMOVDQA64_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQA64_Z(mxyz, k, mxyz1))
}
// VMOVDQA64_Z: Move Aligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA64.Z m128 k xmm
// VMOVDQA64.Z m256 k ymm
// VMOVDQA64.Z xmm k m128
// VMOVDQA64.Z xmm k xmm
// VMOVDQA64.Z ymm k m256
// VMOVDQA64.Z ymm k ymm
// VMOVDQA64.Z m512 k zmm
// VMOVDQA64.Z zmm k m512
// VMOVDQA64.Z zmm k zmm
//
// Construct and append a VMOVDQA64.Z instruction to the active function.
// Operates on the global context.
func VMOVDQA64_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQA64_Z(mxyz, k, mxyz1) }
// VMOVDQU: Move Unaligned Double Quadword.
//
// Forms:
//
// VMOVDQU m128 xmm
// VMOVDQU m256 ymm
// VMOVDQU xmm m128
// VMOVDQU xmm xmm
// VMOVDQU ymm m256
// VMOVDQU ymm ymm
//
// Construct and append a VMOVDQU instruction to the active function.
func (c *Context) VMOVDQU(mxy, mxy1 operand.Op) {
c.addinstruction(x86.VMOVDQU(mxy, mxy1))
}
// VMOVDQU: Move Unaligned Double Quadword.
//
// Forms:
//
// VMOVDQU m128 xmm
// VMOVDQU m256 ymm
// VMOVDQU xmm m128
// VMOVDQU xmm xmm
// VMOVDQU ymm m256
// VMOVDQU ymm ymm
//
// Construct and append a VMOVDQU instruction to the active function.
// Operates on the global context.
func VMOVDQU(mxy, mxy1 operand.Op) { ctx.VMOVDQU(mxy, mxy1) }
// VMOVDQU16: Move Unaligned Word Values.
//
// Forms:
//
// VMOVDQU16 m128 k xmm
// VMOVDQU16 m128 xmm
// VMOVDQU16 m256 k ymm
// VMOVDQU16 m256 ymm
// VMOVDQU16 xmm k m128
// VMOVDQU16 xmm k xmm
// VMOVDQU16 xmm m128
// VMOVDQU16 xmm xmm
// VMOVDQU16 ymm k m256
// VMOVDQU16 ymm k ymm
// VMOVDQU16 ymm m256
// VMOVDQU16 ymm ymm
// VMOVDQU16 m512 k zmm
// VMOVDQU16 m512 zmm
// VMOVDQU16 zmm k m512
// VMOVDQU16 zmm k zmm
// VMOVDQU16 zmm m512
// VMOVDQU16 zmm zmm
//
// Construct and append a VMOVDQU16 instruction to the active function.
func (c *Context) VMOVDQU16(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQU16(ops...))
}
// VMOVDQU16: Move Unaligned Word Values.
//
// Forms:
//
// VMOVDQU16 m128 k xmm
// VMOVDQU16 m128 xmm
// VMOVDQU16 m256 k ymm
// VMOVDQU16 m256 ymm
// VMOVDQU16 xmm k m128
// VMOVDQU16 xmm k xmm
// VMOVDQU16 xmm m128
// VMOVDQU16 xmm xmm
// VMOVDQU16 ymm k m256
// VMOVDQU16 ymm k ymm
// VMOVDQU16 ymm m256
// VMOVDQU16 ymm ymm
// VMOVDQU16 m512 k zmm
// VMOVDQU16 m512 zmm
// VMOVDQU16 zmm k m512
// VMOVDQU16 zmm k zmm
// VMOVDQU16 zmm m512
// VMOVDQU16 zmm zmm
//
// Construct and append a VMOVDQU16 instruction to the active function.
// Operates on the global context.
func VMOVDQU16(ops ...operand.Op) { ctx.VMOVDQU16(ops...) }
// VMOVDQU16_Z: Move Unaligned Word Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU16.Z m128 k xmm
// VMOVDQU16.Z m256 k ymm
// VMOVDQU16.Z xmm k m128
// VMOVDQU16.Z xmm k xmm
// VMOVDQU16.Z ymm k m256
// VMOVDQU16.Z ymm k ymm
// VMOVDQU16.Z m512 k zmm
// VMOVDQU16.Z zmm k m512
// VMOVDQU16.Z zmm k zmm
//
// Construct and append a VMOVDQU16.Z instruction to the active function.
func (c *Context) VMOVDQU16_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQU16_Z(mxyz, k, mxyz1))
}
// VMOVDQU16_Z: Move Unaligned Word Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU16.Z m128 k xmm
// VMOVDQU16.Z m256 k ymm
// VMOVDQU16.Z xmm k m128
// VMOVDQU16.Z xmm k xmm
// VMOVDQU16.Z ymm k m256
// VMOVDQU16.Z ymm k ymm
// VMOVDQU16.Z m512 k zmm
// VMOVDQU16.Z zmm k m512
// VMOVDQU16.Z zmm k zmm
//
// Construct and append a VMOVDQU16.Z instruction to the active function.
// Operates on the global context.
func VMOVDQU16_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQU16_Z(mxyz, k, mxyz1) }
// VMOVDQU32: Move Unaligned Doubleword Values.
//
// Forms:
//
// VMOVDQU32 m128 k xmm
// VMOVDQU32 m128 xmm
// VMOVDQU32 m256 k ymm
// VMOVDQU32 m256 ymm
// VMOVDQU32 xmm k m128
// VMOVDQU32 xmm k xmm
// VMOVDQU32 xmm m128
// VMOVDQU32 xmm xmm
// VMOVDQU32 ymm k m256
// VMOVDQU32 ymm k ymm
// VMOVDQU32 ymm m256
// VMOVDQU32 ymm ymm
// VMOVDQU32 m512 k zmm
// VMOVDQU32 m512 zmm
// VMOVDQU32 zmm k m512
// VMOVDQU32 zmm k zmm
// VMOVDQU32 zmm m512
// VMOVDQU32 zmm zmm
//
// Construct and append a VMOVDQU32 instruction to the active function.
func (c *Context) VMOVDQU32(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQU32(ops...))
}
// VMOVDQU32: Move Unaligned Doubleword Values.
//
// Forms:
//
// VMOVDQU32 m128 k xmm
// VMOVDQU32 m128 xmm
// VMOVDQU32 m256 k ymm
// VMOVDQU32 m256 ymm
// VMOVDQU32 xmm k m128
// VMOVDQU32 xmm k xmm
// VMOVDQU32 xmm m128
// VMOVDQU32 xmm xmm
// VMOVDQU32 ymm k m256
// VMOVDQU32 ymm k ymm
// VMOVDQU32 ymm m256
// VMOVDQU32 ymm ymm
// VMOVDQU32 m512 k zmm
// VMOVDQU32 m512 zmm
// VMOVDQU32 zmm k m512
// VMOVDQU32 zmm k zmm
// VMOVDQU32 zmm m512
// VMOVDQU32 zmm zmm
//
// Construct and append a VMOVDQU32 instruction to the active function.
// Operates on the global context.
func VMOVDQU32(ops ...operand.Op) { ctx.VMOVDQU32(ops...) }
// VMOVDQU32_Z: Move Unaligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU32.Z m128 k xmm
// VMOVDQU32.Z m256 k ymm
// VMOVDQU32.Z xmm k m128
// VMOVDQU32.Z xmm k xmm
// VMOVDQU32.Z ymm k m256
// VMOVDQU32.Z ymm k ymm
// VMOVDQU32.Z m512 k zmm
// VMOVDQU32.Z zmm k m512
// VMOVDQU32.Z zmm k zmm
//
// Construct and append a VMOVDQU32.Z instruction to the active function.
func (c *Context) VMOVDQU32_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQU32_Z(mxyz, k, mxyz1))
}
// VMOVDQU32_Z: Move Unaligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU32.Z m128 k xmm
// VMOVDQU32.Z m256 k ymm
// VMOVDQU32.Z xmm k m128
// VMOVDQU32.Z xmm k xmm
// VMOVDQU32.Z ymm k m256
// VMOVDQU32.Z ymm k ymm
// VMOVDQU32.Z m512 k zmm
// VMOVDQU32.Z zmm k m512
// VMOVDQU32.Z zmm k zmm
//
// Construct and append a VMOVDQU32.Z instruction to the active function.
// Operates on the global context.
func VMOVDQU32_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQU32_Z(mxyz, k, mxyz1) }
// VMOVDQU64: Move Unaligned Quadword Values.
//
// Forms:
//
// VMOVDQU64 m128 k xmm
// VMOVDQU64 m128 xmm
// VMOVDQU64 m256 k ymm
// VMOVDQU64 m256 ymm
// VMOVDQU64 xmm k m128
// VMOVDQU64 xmm k xmm
// VMOVDQU64 xmm m128
// VMOVDQU64 xmm xmm
// VMOVDQU64 ymm k m256
// VMOVDQU64 ymm k ymm
// VMOVDQU64 ymm m256
// VMOVDQU64 ymm ymm
// VMOVDQU64 m512 k zmm
// VMOVDQU64 m512 zmm
// VMOVDQU64 zmm k m512
// VMOVDQU64 zmm k zmm
// VMOVDQU64 zmm m512
// VMOVDQU64 zmm zmm
//
// Construct and append a VMOVDQU64 instruction to the active function.
func (c *Context) VMOVDQU64(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQU64(ops...))
}
// VMOVDQU64: Move Unaligned Quadword Values.
//
// Forms:
//
// VMOVDQU64 m128 k xmm
// VMOVDQU64 m128 xmm
// VMOVDQU64 m256 k ymm
// VMOVDQU64 m256 ymm
// VMOVDQU64 xmm k m128
// VMOVDQU64 xmm k xmm
// VMOVDQU64 xmm m128
// VMOVDQU64 xmm xmm
// VMOVDQU64 ymm k m256
// VMOVDQU64 ymm k ymm
// VMOVDQU64 ymm m256
// VMOVDQU64 ymm ymm
// VMOVDQU64 m512 k zmm
// VMOVDQU64 m512 zmm
// VMOVDQU64 zmm k m512
// VMOVDQU64 zmm k zmm
// VMOVDQU64 zmm m512
// VMOVDQU64 zmm zmm
//
// Construct and append a VMOVDQU64 instruction to the active function.
// Operates on the global context.
func VMOVDQU64(ops ...operand.Op) { ctx.VMOVDQU64(ops...) }
// VMOVDQU64_Z: Move Unaligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU64.Z m128 k xmm
// VMOVDQU64.Z m256 k ymm
// VMOVDQU64.Z xmm k m128
// VMOVDQU64.Z xmm k xmm
// VMOVDQU64.Z ymm k m256
// VMOVDQU64.Z ymm k ymm
// VMOVDQU64.Z m512 k zmm
// VMOVDQU64.Z zmm k m512
// VMOVDQU64.Z zmm k zmm
//
// Construct and append a VMOVDQU64.Z instruction to the active function.
func (c *Context) VMOVDQU64_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQU64_Z(mxyz, k, mxyz1))
}
// VMOVDQU64_Z: Move Unaligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU64.Z m128 k xmm
// VMOVDQU64.Z m256 k ymm
// VMOVDQU64.Z xmm k m128
// VMOVDQU64.Z xmm k xmm
// VMOVDQU64.Z ymm k m256
// VMOVDQU64.Z ymm k ymm
// VMOVDQU64.Z m512 k zmm
// VMOVDQU64.Z zmm k m512
// VMOVDQU64.Z zmm k zmm
//
// Construct and append a VMOVDQU64.Z instruction to the active function.
// Operates on the global context.
func VMOVDQU64_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQU64_Z(mxyz, k, mxyz1) }
// VMOVDQU8: Move Unaligned Byte Values.
//
// Forms:
//
// VMOVDQU8 m128 k xmm
// VMOVDQU8 m128 xmm
// VMOVDQU8 m256 k ymm
// VMOVDQU8 m256 ymm
// VMOVDQU8 xmm k m128
// VMOVDQU8 xmm k xmm
// VMOVDQU8 xmm m128
// VMOVDQU8 xmm xmm
// VMOVDQU8 ymm k m256
// VMOVDQU8 ymm k ymm
// VMOVDQU8 ymm m256
// VMOVDQU8 ymm ymm
// VMOVDQU8 m512 k zmm
// VMOVDQU8 m512 zmm
// VMOVDQU8 zmm k m512
// VMOVDQU8 zmm k zmm
// VMOVDQU8 zmm m512
// VMOVDQU8 zmm zmm
//
// Construct and append a VMOVDQU8 instruction to the active function.
func (c *Context) VMOVDQU8(ops ...operand.Op) {
c.addinstruction(x86.VMOVDQU8(ops...))
}
// VMOVDQU8: Move Unaligned Byte Values.
//
// Forms:
//
// VMOVDQU8 m128 k xmm
// VMOVDQU8 m128 xmm
// VMOVDQU8 m256 k ymm
// VMOVDQU8 m256 ymm
// VMOVDQU8 xmm k m128
// VMOVDQU8 xmm k xmm
// VMOVDQU8 xmm m128
// VMOVDQU8 xmm xmm
// VMOVDQU8 ymm k m256
// VMOVDQU8 ymm k ymm
// VMOVDQU8 ymm m256
// VMOVDQU8 ymm ymm
// VMOVDQU8 m512 k zmm
// VMOVDQU8 m512 zmm
// VMOVDQU8 zmm k m512
// VMOVDQU8 zmm k zmm
// VMOVDQU8 zmm m512
// VMOVDQU8 zmm zmm
//
// Construct and append a VMOVDQU8 instruction to the active function.
// Operates on the global context.
func VMOVDQU8(ops ...operand.Op) { ctx.VMOVDQU8(ops...) }
// VMOVDQU8_Z: Move Unaligned Byte Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU8.Z m128 k xmm
// VMOVDQU8.Z m256 k ymm
// VMOVDQU8.Z xmm k m128
// VMOVDQU8.Z xmm k xmm
// VMOVDQU8.Z ymm k m256
// VMOVDQU8.Z ymm k ymm
// VMOVDQU8.Z m512 k zmm
// VMOVDQU8.Z zmm k m512
// VMOVDQU8.Z zmm k zmm
//
// Construct and append a VMOVDQU8.Z instruction to the active function.
func (c *Context) VMOVDQU8_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVDQU8_Z(mxyz, k, mxyz1))
}
// VMOVDQU8_Z: Move Unaligned Byte Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU8.Z m128 k xmm
// VMOVDQU8.Z m256 k ymm
// VMOVDQU8.Z xmm k m128
// VMOVDQU8.Z xmm k xmm
// VMOVDQU8.Z ymm k m256
// VMOVDQU8.Z ymm k ymm
// VMOVDQU8.Z m512 k zmm
// VMOVDQU8.Z zmm k m512
// VMOVDQU8.Z zmm k zmm
//
// Construct and append a VMOVDQU8.Z instruction to the active function.
// Operates on the global context.
func VMOVDQU8_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVDQU8_Z(mxyz, k, mxyz1) }
// VMOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// VMOVHLPS xmm xmm xmm
//
// Construct and append a VMOVHLPS instruction to the active function.
func (c *Context) VMOVHLPS(x, x1, x2 operand.Op) {
c.addinstruction(x86.VMOVHLPS(x, x1, x2))
}
// VMOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// VMOVHLPS xmm xmm xmm
//
// Construct and append a VMOVHLPS instruction to the active function.
// Operates on the global context.
func VMOVHLPS(x, x1, x2 operand.Op) { ctx.VMOVHLPS(x, x1, x2) }
// VMOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVHPD m64 xmm xmm
// VMOVHPD xmm m64
//
// Construct and append a VMOVHPD instruction to the active function.
func (c *Context) VMOVHPD(ops ...operand.Op) {
c.addinstruction(x86.VMOVHPD(ops...))
}
// VMOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVHPD m64 xmm xmm
// VMOVHPD xmm m64
//
// Construct and append a VMOVHPD instruction to the active function.
// Operates on the global context.
func VMOVHPD(ops ...operand.Op) { ctx.VMOVHPD(ops...) }
// VMOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVHPS m64 xmm xmm
// VMOVHPS xmm m64
//
// Construct and append a VMOVHPS instruction to the active function.
func (c *Context) VMOVHPS(ops ...operand.Op) {
c.addinstruction(x86.VMOVHPS(ops...))
}
// VMOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVHPS m64 xmm xmm
// VMOVHPS xmm m64
//
// Construct and append a VMOVHPS instruction to the active function.
// Operates on the global context.
func VMOVHPS(ops ...operand.Op) { ctx.VMOVHPS(ops...) }
// VMOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// VMOVLHPS xmm xmm xmm
//
// Construct and append a VMOVLHPS instruction to the active function.
func (c *Context) VMOVLHPS(x, x1, x2 operand.Op) {
c.addinstruction(x86.VMOVLHPS(x, x1, x2))
}
// VMOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// VMOVLHPS xmm xmm xmm
//
// Construct and append a VMOVLHPS instruction to the active function.
// Operates on the global context.
func VMOVLHPS(x, x1, x2 operand.Op) { ctx.VMOVLHPS(x, x1, x2) }
// VMOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVLPD m64 xmm xmm
// VMOVLPD xmm m64
//
// Construct and append a VMOVLPD instruction to the active function.
func (c *Context) VMOVLPD(ops ...operand.Op) {
c.addinstruction(x86.VMOVLPD(ops...))
}
// VMOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVLPD m64 xmm xmm
// VMOVLPD xmm m64
//
// Construct and append a VMOVLPD instruction to the active function.
// Operates on the global context.
func VMOVLPD(ops ...operand.Op) { ctx.VMOVLPD(ops...) }
// VMOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVLPS m64 xmm xmm
// VMOVLPS xmm m64
//
// Construct and append a VMOVLPS instruction to the active function.
func (c *Context) VMOVLPS(ops ...operand.Op) {
c.addinstruction(x86.VMOVLPS(ops...))
}
// VMOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVLPS m64 xmm xmm
// VMOVLPS xmm m64
//
// Construct and append a VMOVLPS instruction to the active function.
// Operates on the global context.
func VMOVLPS(ops ...operand.Op) { ctx.VMOVLPS(ops...) }
// VMOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPD xmm r32
// VMOVMSKPD ymm r32
//
// Construct and append a VMOVMSKPD instruction to the active function.
func (c *Context) VMOVMSKPD(xy, r operand.Op) {
c.addinstruction(x86.VMOVMSKPD(xy, r))
}
// VMOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPD xmm r32
// VMOVMSKPD ymm r32
//
// Construct and append a VMOVMSKPD instruction to the active function.
// Operates on the global context.
func VMOVMSKPD(xy, r operand.Op) { ctx.VMOVMSKPD(xy, r) }
// VMOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPS xmm r32
// VMOVMSKPS ymm r32
//
// Construct and append a VMOVMSKPS instruction to the active function.
func (c *Context) VMOVMSKPS(xy, r operand.Op) {
c.addinstruction(x86.VMOVMSKPS(xy, r))
}
// VMOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPS xmm r32
// VMOVMSKPS ymm r32
//
// Construct and append a VMOVMSKPS instruction to the active function.
// Operates on the global context.
func VMOVMSKPS(xy, r operand.Op) { ctx.VMOVMSKPS(xy, r) }
// VMOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTDQ xmm m128
// VMOVNTDQ ymm m256
// VMOVNTDQ zmm m512
//
// Construct and append a VMOVNTDQ instruction to the active function.
func (c *Context) VMOVNTDQ(xyz, m operand.Op) {
c.addinstruction(x86.VMOVNTDQ(xyz, m))
}
// VMOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTDQ xmm m128
// VMOVNTDQ ymm m256
// VMOVNTDQ zmm m512
//
// Construct and append a VMOVNTDQ instruction to the active function.
// Operates on the global context.
func VMOVNTDQ(xyz, m operand.Op) { ctx.VMOVNTDQ(xyz, m) }
// VMOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// VMOVNTDQA m256 ymm
// VMOVNTDQA m128 xmm
// VMOVNTDQA m512 zmm
//
// Construct and append a VMOVNTDQA instruction to the active function.
func (c *Context) VMOVNTDQA(m, xyz operand.Op) {
c.addinstruction(x86.VMOVNTDQA(m, xyz))
}
// VMOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// VMOVNTDQA m256 ymm
// VMOVNTDQA m128 xmm
// VMOVNTDQA m512 zmm
//
// Construct and append a VMOVNTDQA instruction to the active function.
// Operates on the global context.
func VMOVNTDQA(m, xyz operand.Op) { ctx.VMOVNTDQA(m, xyz) }
// VMOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPD xmm m128
// VMOVNTPD ymm m256
// VMOVNTPD zmm m512
//
// Construct and append a VMOVNTPD instruction to the active function.
func (c *Context) VMOVNTPD(xyz, m operand.Op) {
c.addinstruction(x86.VMOVNTPD(xyz, m))
}
// VMOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPD xmm m128
// VMOVNTPD ymm m256
// VMOVNTPD zmm m512
//
// Construct and append a VMOVNTPD instruction to the active function.
// Operates on the global context.
func VMOVNTPD(xyz, m operand.Op) { ctx.VMOVNTPD(xyz, m) }
// VMOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPS xmm m128
// VMOVNTPS ymm m256
// VMOVNTPS zmm m512
//
// Construct and append a VMOVNTPS instruction to the active function.
func (c *Context) VMOVNTPS(xyz, m operand.Op) {
c.addinstruction(x86.VMOVNTPS(xyz, m))
}
// VMOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPS xmm m128
// VMOVNTPS ymm m256
// VMOVNTPS zmm m512
//
// Construct and append a VMOVNTPS instruction to the active function.
// Operates on the global context.
func VMOVNTPS(xyz, m operand.Op) { ctx.VMOVNTPS(xyz, m) }
// VMOVQ: Move Quadword.
//
// Forms:
//
// VMOVQ m64 xmm
// VMOVQ r64 xmm
// VMOVQ xmm m64
// VMOVQ xmm r64
// VMOVQ xmm xmm
//
// Construct and append a VMOVQ instruction to the active function.
func (c *Context) VMOVQ(mrx, mrx1 operand.Op) {
c.addinstruction(x86.VMOVQ(mrx, mrx1))
}
// VMOVQ: Move Quadword.
//
// Forms:
//
// VMOVQ m64 xmm
// VMOVQ r64 xmm
// VMOVQ xmm m64
// VMOVQ xmm r64
// VMOVQ xmm xmm
//
// Construct and append a VMOVQ instruction to the active function.
// Operates on the global context.
func VMOVQ(mrx, mrx1 operand.Op) { ctx.VMOVQ(mrx, mrx1) }
// VMOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVSD m64 xmm
// VMOVSD xmm m64
// VMOVSD xmm xmm xmm
// VMOVSD m64 k xmm
// VMOVSD xmm k m64
// VMOVSD xmm xmm k xmm
//
// Construct and append a VMOVSD instruction to the active function.
func (c *Context) VMOVSD(ops ...operand.Op) {
c.addinstruction(x86.VMOVSD(ops...))
}
// VMOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVSD m64 xmm
// VMOVSD xmm m64
// VMOVSD xmm xmm xmm
// VMOVSD m64 k xmm
// VMOVSD xmm k m64
// VMOVSD xmm xmm k xmm
//
// Construct and append a VMOVSD instruction to the active function.
// Operates on the global context.
func VMOVSD(ops ...operand.Op) { ctx.VMOVSD(ops...) }
// VMOVSD_Z: Move Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMOVSD.Z m64 k xmm
// VMOVSD.Z xmm xmm k xmm
//
// Construct and append a VMOVSD.Z instruction to the active function.
func (c *Context) VMOVSD_Z(ops ...operand.Op) {
c.addinstruction(x86.VMOVSD_Z(ops...))
}
// VMOVSD_Z: Move Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMOVSD.Z m64 k xmm
// VMOVSD.Z xmm xmm k xmm
//
// Construct and append a VMOVSD.Z instruction to the active function.
// Operates on the global context.
func VMOVSD_Z(ops ...operand.Op) { ctx.VMOVSD_Z(ops...) }
// VMOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// VMOVSHDUP m128 xmm
// VMOVSHDUP m256 ymm
// VMOVSHDUP xmm xmm
// VMOVSHDUP ymm ymm
// VMOVSHDUP m128 k xmm
// VMOVSHDUP m256 k ymm
// VMOVSHDUP xmm k xmm
// VMOVSHDUP ymm k ymm
// VMOVSHDUP m512 k zmm
// VMOVSHDUP m512 zmm
// VMOVSHDUP zmm k zmm
// VMOVSHDUP zmm zmm
//
// Construct and append a VMOVSHDUP instruction to the active function.
func (c *Context) VMOVSHDUP(ops ...operand.Op) {
c.addinstruction(x86.VMOVSHDUP(ops...))
}
// VMOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// VMOVSHDUP m128 xmm
// VMOVSHDUP m256 ymm
// VMOVSHDUP xmm xmm
// VMOVSHDUP ymm ymm
// VMOVSHDUP m128 k xmm
// VMOVSHDUP m256 k ymm
// VMOVSHDUP xmm k xmm
// VMOVSHDUP ymm k ymm
// VMOVSHDUP m512 k zmm
// VMOVSHDUP m512 zmm
// VMOVSHDUP zmm k zmm
// VMOVSHDUP zmm zmm
//
// Construct and append a VMOVSHDUP instruction to the active function.
// Operates on the global context.
func VMOVSHDUP(ops ...operand.Op) { ctx.VMOVSHDUP(ops...) }
// VMOVSHDUP_Z: Move Packed Single-FP High and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSHDUP.Z m128 k xmm
// VMOVSHDUP.Z m256 k ymm
// VMOVSHDUP.Z xmm k xmm
// VMOVSHDUP.Z ymm k ymm
// VMOVSHDUP.Z m512 k zmm
// VMOVSHDUP.Z zmm k zmm
//
// Construct and append a VMOVSHDUP.Z instruction to the active function.
func (c *Context) VMOVSHDUP_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VMOVSHDUP_Z(mxyz, k, xyz))
}
// VMOVSHDUP_Z: Move Packed Single-FP High and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSHDUP.Z m128 k xmm
// VMOVSHDUP.Z m256 k ymm
// VMOVSHDUP.Z xmm k xmm
// VMOVSHDUP.Z ymm k ymm
// VMOVSHDUP.Z m512 k zmm
// VMOVSHDUP.Z zmm k zmm
//
// Construct and append a VMOVSHDUP.Z instruction to the active function.
// Operates on the global context.
func VMOVSHDUP_Z(mxyz, k, xyz operand.Op) { ctx.VMOVSHDUP_Z(mxyz, k, xyz) }
// VMOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// VMOVSLDUP m128 xmm
// VMOVSLDUP m256 ymm
// VMOVSLDUP xmm xmm
// VMOVSLDUP ymm ymm
// VMOVSLDUP m128 k xmm
// VMOVSLDUP m256 k ymm
// VMOVSLDUP xmm k xmm
// VMOVSLDUP ymm k ymm
// VMOVSLDUP m512 k zmm
// VMOVSLDUP m512 zmm
// VMOVSLDUP zmm k zmm
// VMOVSLDUP zmm zmm
//
// Construct and append a VMOVSLDUP instruction to the active function.
func (c *Context) VMOVSLDUP(ops ...operand.Op) {
c.addinstruction(x86.VMOVSLDUP(ops...))
}
// VMOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// VMOVSLDUP m128 xmm
// VMOVSLDUP m256 ymm
// VMOVSLDUP xmm xmm
// VMOVSLDUP ymm ymm
// VMOVSLDUP m128 k xmm
// VMOVSLDUP m256 k ymm
// VMOVSLDUP xmm k xmm
// VMOVSLDUP ymm k ymm
// VMOVSLDUP m512 k zmm
// VMOVSLDUP m512 zmm
// VMOVSLDUP zmm k zmm
// VMOVSLDUP zmm zmm
//
// Construct and append a VMOVSLDUP instruction to the active function.
// Operates on the global context.
func VMOVSLDUP(ops ...operand.Op) { ctx.VMOVSLDUP(ops...) }
// VMOVSLDUP_Z: Move Packed Single-FP Low and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSLDUP.Z m128 k xmm
// VMOVSLDUP.Z m256 k ymm
// VMOVSLDUP.Z xmm k xmm
// VMOVSLDUP.Z ymm k ymm
// VMOVSLDUP.Z m512 k zmm
// VMOVSLDUP.Z zmm k zmm
//
// Construct and append a VMOVSLDUP.Z instruction to the active function.
func (c *Context) VMOVSLDUP_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VMOVSLDUP_Z(mxyz, k, xyz))
}
// VMOVSLDUP_Z: Move Packed Single-FP Low and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSLDUP.Z m128 k xmm
// VMOVSLDUP.Z m256 k ymm
// VMOVSLDUP.Z xmm k xmm
// VMOVSLDUP.Z ymm k ymm
// VMOVSLDUP.Z m512 k zmm
// VMOVSLDUP.Z zmm k zmm
//
// Construct and append a VMOVSLDUP.Z instruction to the active function.
// Operates on the global context.
func VMOVSLDUP_Z(mxyz, k, xyz operand.Op) { ctx.VMOVSLDUP_Z(mxyz, k, xyz) }
// VMOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVSS m32 xmm
// VMOVSS xmm m32
// VMOVSS xmm xmm xmm
// VMOVSS m32 k xmm
// VMOVSS xmm k m32
// VMOVSS xmm xmm k xmm
//
// Construct and append a VMOVSS instruction to the active function.
func (c *Context) VMOVSS(ops ...operand.Op) {
c.addinstruction(x86.VMOVSS(ops...))
}
// VMOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVSS m32 xmm
// VMOVSS xmm m32
// VMOVSS xmm xmm xmm
// VMOVSS m32 k xmm
// VMOVSS xmm k m32
// VMOVSS xmm xmm k xmm
//
// Construct and append a VMOVSS instruction to the active function.
// Operates on the global context.
func VMOVSS(ops ...operand.Op) { ctx.VMOVSS(ops...) }
// VMOVSS_Z: Move Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVSS.Z m32 k xmm
// VMOVSS.Z xmm xmm k xmm
//
// Construct and append a VMOVSS.Z instruction to the active function.
func (c *Context) VMOVSS_Z(ops ...operand.Op) {
c.addinstruction(x86.VMOVSS_Z(ops...))
}
// VMOVSS_Z: Move Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVSS.Z m32 k xmm
// VMOVSS.Z xmm xmm k xmm
//
// Construct and append a VMOVSS.Z instruction to the active function.
// Operates on the global context.
func VMOVSS_Z(ops ...operand.Op) { ctx.VMOVSS_Z(ops...) }
// VMOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPD m128 xmm
// VMOVUPD m256 ymm
// VMOVUPD xmm m128
// VMOVUPD xmm xmm
// VMOVUPD ymm m256
// VMOVUPD ymm ymm
// VMOVUPD m128 k xmm
// VMOVUPD m256 k ymm
// VMOVUPD xmm k m128
// VMOVUPD xmm k xmm
// VMOVUPD ymm k m256
// VMOVUPD ymm k ymm
// VMOVUPD m512 k zmm
// VMOVUPD m512 zmm
// VMOVUPD zmm k m512
// VMOVUPD zmm k zmm
// VMOVUPD zmm m512
// VMOVUPD zmm zmm
//
// Construct and append a VMOVUPD instruction to the active function.
func (c *Context) VMOVUPD(ops ...operand.Op) {
c.addinstruction(x86.VMOVUPD(ops...))
}
// VMOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPD m128 xmm
// VMOVUPD m256 ymm
// VMOVUPD xmm m128
// VMOVUPD xmm xmm
// VMOVUPD ymm m256
// VMOVUPD ymm ymm
// VMOVUPD m128 k xmm
// VMOVUPD m256 k ymm
// VMOVUPD xmm k m128
// VMOVUPD xmm k xmm
// VMOVUPD ymm k m256
// VMOVUPD ymm k ymm
// VMOVUPD m512 k zmm
// VMOVUPD m512 zmm
// VMOVUPD zmm k m512
// VMOVUPD zmm k zmm
// VMOVUPD zmm m512
// VMOVUPD zmm zmm
//
// Construct and append a VMOVUPD instruction to the active function.
// Operates on the global context.
func VMOVUPD(ops ...operand.Op) { ctx.VMOVUPD(ops...) }
// VMOVUPD_Z: Move Unaligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPD.Z m128 k xmm
// VMOVUPD.Z m256 k ymm
// VMOVUPD.Z xmm k m128
// VMOVUPD.Z xmm k xmm
// VMOVUPD.Z ymm k m256
// VMOVUPD.Z ymm k ymm
// VMOVUPD.Z m512 k zmm
// VMOVUPD.Z zmm k m512
// VMOVUPD.Z zmm k zmm
//
// Construct and append a VMOVUPD.Z instruction to the active function.
func (c *Context) VMOVUPD_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVUPD_Z(mxyz, k, mxyz1))
}
// VMOVUPD_Z: Move Unaligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPD.Z m128 k xmm
// VMOVUPD.Z m256 k ymm
// VMOVUPD.Z xmm k m128
// VMOVUPD.Z xmm k xmm
// VMOVUPD.Z ymm k m256
// VMOVUPD.Z ymm k ymm
// VMOVUPD.Z m512 k zmm
// VMOVUPD.Z zmm k m512
// VMOVUPD.Z zmm k zmm
//
// Construct and append a VMOVUPD.Z instruction to the active function.
// Operates on the global context.
func VMOVUPD_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVUPD_Z(mxyz, k, mxyz1) }
// VMOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPS m128 xmm
// VMOVUPS m256 ymm
// VMOVUPS xmm m128
// VMOVUPS xmm xmm
// VMOVUPS ymm m256
// VMOVUPS ymm ymm
// VMOVUPS m128 k xmm
// VMOVUPS m256 k ymm
// VMOVUPS xmm k m128
// VMOVUPS xmm k xmm
// VMOVUPS ymm k m256
// VMOVUPS ymm k ymm
// VMOVUPS m512 k zmm
// VMOVUPS m512 zmm
// VMOVUPS zmm k m512
// VMOVUPS zmm k zmm
// VMOVUPS zmm m512
// VMOVUPS zmm zmm
//
// Construct and append a VMOVUPS instruction to the active function.
func (c *Context) VMOVUPS(ops ...operand.Op) {
c.addinstruction(x86.VMOVUPS(ops...))
}
// VMOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPS m128 xmm
// VMOVUPS m256 ymm
// VMOVUPS xmm m128
// VMOVUPS xmm xmm
// VMOVUPS ymm m256
// VMOVUPS ymm ymm
// VMOVUPS m128 k xmm
// VMOVUPS m256 k ymm
// VMOVUPS xmm k m128
// VMOVUPS xmm k xmm
// VMOVUPS ymm k m256
// VMOVUPS ymm k ymm
// VMOVUPS m512 k zmm
// VMOVUPS m512 zmm
// VMOVUPS zmm k m512
// VMOVUPS zmm k zmm
// VMOVUPS zmm m512
// VMOVUPS zmm zmm
//
// Construct and append a VMOVUPS instruction to the active function.
// Operates on the global context.
func VMOVUPS(ops ...operand.Op) { ctx.VMOVUPS(ops...) }
// VMOVUPS_Z: Move Unaligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPS.Z m128 k xmm
// VMOVUPS.Z m256 k ymm
// VMOVUPS.Z xmm k m128
// VMOVUPS.Z xmm k xmm
// VMOVUPS.Z ymm k m256
// VMOVUPS.Z ymm k ymm
// VMOVUPS.Z m512 k zmm
// VMOVUPS.Z zmm k m512
// VMOVUPS.Z zmm k zmm
//
// Construct and append a VMOVUPS.Z instruction to the active function.
func (c *Context) VMOVUPS_Z(mxyz, k, mxyz1 operand.Op) {
c.addinstruction(x86.VMOVUPS_Z(mxyz, k, mxyz1))
}
// VMOVUPS_Z: Move Unaligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPS.Z m128 k xmm
// VMOVUPS.Z m256 k ymm
// VMOVUPS.Z xmm k m128
// VMOVUPS.Z xmm k xmm
// VMOVUPS.Z ymm k m256
// VMOVUPS.Z ymm k ymm
// VMOVUPS.Z m512 k zmm
// VMOVUPS.Z zmm k m512
// VMOVUPS.Z zmm k zmm
//
// Construct and append a VMOVUPS.Z instruction to the active function.
// Operates on the global context.
func VMOVUPS_Z(mxyz, k, mxyz1 operand.Op) { ctx.VMOVUPS_Z(mxyz, k, mxyz1) }
// VMPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// VMPSADBW imm8 m256 ymm ymm
// VMPSADBW imm8 ymm ymm ymm
// VMPSADBW imm8 m128 xmm xmm
// VMPSADBW imm8 xmm xmm xmm
//
// Construct and append a VMPSADBW instruction to the active function.
func (c *Context) VMPSADBW(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VMPSADBW(i, mxy, xy, xy1))
}
// VMPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// VMPSADBW imm8 m256 ymm ymm
// VMPSADBW imm8 ymm ymm ymm
// VMPSADBW imm8 m128 xmm xmm
// VMPSADBW imm8 xmm xmm xmm
//
// Construct and append a VMPSADBW instruction to the active function.
// Operates on the global context.
func VMPSADBW(i, mxy, xy, xy1 operand.Op) { ctx.VMPSADBW(i, mxy, xy, xy1) }
// VMULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULPD m128 xmm xmm
// VMULPD m256 ymm ymm
// VMULPD xmm xmm xmm
// VMULPD ymm ymm ymm
// VMULPD m128 xmm k xmm
// VMULPD m256 ymm k ymm
// VMULPD xmm xmm k xmm
// VMULPD ymm ymm k ymm
// VMULPD m512 zmm k zmm
// VMULPD m512 zmm zmm
// VMULPD zmm zmm k zmm
// VMULPD zmm zmm zmm
//
// Construct and append a VMULPD instruction to the active function.
func (c *Context) VMULPD(ops ...operand.Op) {
c.addinstruction(x86.VMULPD(ops...))
}
// VMULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULPD m128 xmm xmm
// VMULPD m256 ymm ymm
// VMULPD xmm xmm xmm
// VMULPD ymm ymm ymm
// VMULPD m128 xmm k xmm
// VMULPD m256 ymm k ymm
// VMULPD xmm xmm k xmm
// VMULPD ymm ymm k ymm
// VMULPD m512 zmm k zmm
// VMULPD m512 zmm zmm
// VMULPD zmm zmm k zmm
// VMULPD zmm zmm zmm
//
// Construct and append a VMULPD instruction to the active function.
// Operates on the global context.
func VMULPD(ops ...operand.Op) { ctx.VMULPD(ops...) }
// VMULPD_BCST: Multiply Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPD.BCST m64 xmm k xmm
// VMULPD.BCST m64 xmm xmm
// VMULPD.BCST m64 ymm k ymm
// VMULPD.BCST m64 ymm ymm
// VMULPD.BCST m64 zmm k zmm
// VMULPD.BCST m64 zmm zmm
//
// Construct and append a VMULPD.BCST instruction to the active function.
func (c *Context) VMULPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMULPD_BCST(ops...))
}
// VMULPD_BCST: Multiply Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPD.BCST m64 xmm k xmm
// VMULPD.BCST m64 xmm xmm
// VMULPD.BCST m64 ymm k ymm
// VMULPD.BCST m64 ymm ymm
// VMULPD.BCST m64 zmm k zmm
// VMULPD.BCST m64 zmm zmm
//
// Construct and append a VMULPD.BCST instruction to the active function.
// Operates on the global context.
func VMULPD_BCST(ops ...operand.Op) { ctx.VMULPD_BCST(ops...) }
// VMULPD_BCST_Z: Multiply Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPD.BCST.Z m64 xmm k xmm
// VMULPD.BCST.Z m64 ymm k ymm
// VMULPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMULPD.BCST.Z instruction to the active function.
func (c *Context) VMULPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMULPD_BCST_Z(m, xyz, k, xyz1))
}
// VMULPD_BCST_Z: Multiply Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPD.BCST.Z m64 xmm k xmm
// VMULPD.BCST.Z m64 ymm k ymm
// VMULPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VMULPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VMULPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMULPD_BCST_Z(m, xyz, k, xyz1) }
// VMULPD_RD_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPD.RD_SAE zmm zmm k zmm
// VMULPD.RD_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RD_SAE instruction to the active function.
func (c *Context) VMULPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPD_RD_SAE(ops...))
}
// VMULPD_RD_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPD.RD_SAE zmm zmm k zmm
// VMULPD.RD_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VMULPD_RD_SAE(ops ...operand.Op) { ctx.VMULPD_RD_SAE(ops...) }
// VMULPD_RD_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RD_SAE.Z instruction to the active function.
func (c *Context) VMULPD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPD_RD_SAE_Z(z, z1, k, z2))
}
// VMULPD_RD_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPD_RD_SAE_Z(z, z1, k, z2) }
// VMULPD_RN_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPD.RN_SAE zmm zmm k zmm
// VMULPD.RN_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RN_SAE instruction to the active function.
func (c *Context) VMULPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPD_RN_SAE(ops...))
}
// VMULPD_RN_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPD.RN_SAE zmm zmm k zmm
// VMULPD.RN_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VMULPD_RN_SAE(ops ...operand.Op) { ctx.VMULPD_RN_SAE(ops...) }
// VMULPD_RN_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RN_SAE.Z instruction to the active function.
func (c *Context) VMULPD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPD_RN_SAE_Z(z, z1, k, z2))
}
// VMULPD_RN_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPD_RN_SAE_Z(z, z1, k, z2) }
// VMULPD_RU_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPD.RU_SAE zmm zmm k zmm
// VMULPD.RU_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RU_SAE instruction to the active function.
func (c *Context) VMULPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPD_RU_SAE(ops...))
}
// VMULPD_RU_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPD.RU_SAE zmm zmm k zmm
// VMULPD.RU_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VMULPD_RU_SAE(ops ...operand.Op) { ctx.VMULPD_RU_SAE(ops...) }
// VMULPD_RU_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RU_SAE.Z instruction to the active function.
func (c *Context) VMULPD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPD_RU_SAE_Z(z, z1, k, z2))
}
// VMULPD_RU_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPD_RU_SAE_Z(z, z1, k, z2) }
// VMULPD_RZ_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPD.RZ_SAE zmm zmm k zmm
// VMULPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RZ_SAE instruction to the active function.
func (c *Context) VMULPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPD_RZ_SAE(ops...))
}
// VMULPD_RZ_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPD.RZ_SAE zmm zmm k zmm
// VMULPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VMULPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VMULPD_RZ_SAE(ops ...operand.Op) { ctx.VMULPD_RZ_SAE(ops...) }
// VMULPD_RZ_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VMULPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPD_RZ_SAE_Z(z, z1, k, z2))
}
// VMULPD_RZ_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPD_RZ_SAE_Z(z, z1, k, z2) }
// VMULPD_Z: Multiply Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPD.Z m128 xmm k xmm
// VMULPD.Z m256 ymm k ymm
// VMULPD.Z xmm xmm k xmm
// VMULPD.Z ymm ymm k ymm
// VMULPD.Z m512 zmm k zmm
// VMULPD.Z zmm zmm k zmm
//
// Construct and append a VMULPD.Z instruction to the active function.
func (c *Context) VMULPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMULPD_Z(mxyz, xyz, k, xyz1))
}
// VMULPD_Z: Multiply Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPD.Z m128 xmm k xmm
// VMULPD.Z m256 ymm k ymm
// VMULPD.Z xmm xmm k xmm
// VMULPD.Z ymm ymm k ymm
// VMULPD.Z m512 zmm k zmm
// VMULPD.Z zmm zmm k zmm
//
// Construct and append a VMULPD.Z instruction to the active function.
// Operates on the global context.
func VMULPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMULPD_Z(mxyz, xyz, k, xyz1) }
// VMULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULPS m128 xmm xmm
// VMULPS m256 ymm ymm
// VMULPS xmm xmm xmm
// VMULPS ymm ymm ymm
// VMULPS m128 xmm k xmm
// VMULPS m256 ymm k ymm
// VMULPS xmm xmm k xmm
// VMULPS ymm ymm k ymm
// VMULPS m512 zmm k zmm
// VMULPS m512 zmm zmm
// VMULPS zmm zmm k zmm
// VMULPS zmm zmm zmm
//
// Construct and append a VMULPS instruction to the active function.
func (c *Context) VMULPS(ops ...operand.Op) {
c.addinstruction(x86.VMULPS(ops...))
}
// VMULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULPS m128 xmm xmm
// VMULPS m256 ymm ymm
// VMULPS xmm xmm xmm
// VMULPS ymm ymm ymm
// VMULPS m128 xmm k xmm
// VMULPS m256 ymm k ymm
// VMULPS xmm xmm k xmm
// VMULPS ymm ymm k ymm
// VMULPS m512 zmm k zmm
// VMULPS m512 zmm zmm
// VMULPS zmm zmm k zmm
// VMULPS zmm zmm zmm
//
// Construct and append a VMULPS instruction to the active function.
// Operates on the global context.
func VMULPS(ops ...operand.Op) { ctx.VMULPS(ops...) }
// VMULPS_BCST: Multiply Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPS.BCST m32 xmm k xmm
// VMULPS.BCST m32 xmm xmm
// VMULPS.BCST m32 ymm k ymm
// VMULPS.BCST m32 ymm ymm
// VMULPS.BCST m32 zmm k zmm
// VMULPS.BCST m32 zmm zmm
//
// Construct and append a VMULPS.BCST instruction to the active function.
func (c *Context) VMULPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VMULPS_BCST(ops...))
}
// VMULPS_BCST: Multiply Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPS.BCST m32 xmm k xmm
// VMULPS.BCST m32 xmm xmm
// VMULPS.BCST m32 ymm k ymm
// VMULPS.BCST m32 ymm ymm
// VMULPS.BCST m32 zmm k zmm
// VMULPS.BCST m32 zmm zmm
//
// Construct and append a VMULPS.BCST instruction to the active function.
// Operates on the global context.
func VMULPS_BCST(ops ...operand.Op) { ctx.VMULPS_BCST(ops...) }
// VMULPS_BCST_Z: Multiply Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPS.BCST.Z m32 xmm k xmm
// VMULPS.BCST.Z m32 ymm k ymm
// VMULPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMULPS.BCST.Z instruction to the active function.
func (c *Context) VMULPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMULPS_BCST_Z(m, xyz, k, xyz1))
}
// VMULPS_BCST_Z: Multiply Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPS.BCST.Z m32 xmm k xmm
// VMULPS.BCST.Z m32 ymm k ymm
// VMULPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VMULPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VMULPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VMULPS_BCST_Z(m, xyz, k, xyz1) }
// VMULPS_RD_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPS.RD_SAE zmm zmm k zmm
// VMULPS.RD_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RD_SAE instruction to the active function.
func (c *Context) VMULPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPS_RD_SAE(ops...))
}
// VMULPS_RD_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPS.RD_SAE zmm zmm k zmm
// VMULPS.RD_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VMULPS_RD_SAE(ops ...operand.Op) { ctx.VMULPS_RD_SAE(ops...) }
// VMULPS_RD_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RD_SAE.Z instruction to the active function.
func (c *Context) VMULPS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPS_RD_SAE_Z(z, z1, k, z2))
}
// VMULPS_RD_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPS_RD_SAE_Z(z, z1, k, z2) }
// VMULPS_RN_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPS.RN_SAE zmm zmm k zmm
// VMULPS.RN_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RN_SAE instruction to the active function.
func (c *Context) VMULPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPS_RN_SAE(ops...))
}
// VMULPS_RN_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPS.RN_SAE zmm zmm k zmm
// VMULPS.RN_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VMULPS_RN_SAE(ops ...operand.Op) { ctx.VMULPS_RN_SAE(ops...) }
// VMULPS_RN_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RN_SAE.Z instruction to the active function.
func (c *Context) VMULPS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPS_RN_SAE_Z(z, z1, k, z2))
}
// VMULPS_RN_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPS_RN_SAE_Z(z, z1, k, z2) }
// VMULPS_RU_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPS.RU_SAE zmm zmm k zmm
// VMULPS.RU_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RU_SAE instruction to the active function.
func (c *Context) VMULPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPS_RU_SAE(ops...))
}
// VMULPS_RU_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPS.RU_SAE zmm zmm k zmm
// VMULPS.RU_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VMULPS_RU_SAE(ops ...operand.Op) { ctx.VMULPS_RU_SAE(ops...) }
// VMULPS_RU_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RU_SAE.Z instruction to the active function.
func (c *Context) VMULPS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPS_RU_SAE_Z(z, z1, k, z2))
}
// VMULPS_RU_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPS_RU_SAE_Z(z, z1, k, z2) }
// VMULPS_RZ_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPS.RZ_SAE zmm zmm k zmm
// VMULPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RZ_SAE instruction to the active function.
func (c *Context) VMULPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULPS_RZ_SAE(ops...))
}
// VMULPS_RZ_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPS.RZ_SAE zmm zmm k zmm
// VMULPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VMULPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VMULPS_RZ_SAE(ops ...operand.Op) { ctx.VMULPS_RZ_SAE(ops...) }
// VMULPS_RZ_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VMULPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VMULPS_RZ_SAE_Z(z, z1, k, z2))
}
// VMULPS_RZ_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VMULPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VMULPS_RZ_SAE_Z(z, z1, k, z2) }
// VMULPS_Z: Multiply Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPS.Z m128 xmm k xmm
// VMULPS.Z m256 ymm k ymm
// VMULPS.Z xmm xmm k xmm
// VMULPS.Z ymm ymm k ymm
// VMULPS.Z m512 zmm k zmm
// VMULPS.Z zmm zmm k zmm
//
// Construct and append a VMULPS.Z instruction to the active function.
func (c *Context) VMULPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VMULPS_Z(mxyz, xyz, k, xyz1))
}
// VMULPS_Z: Multiply Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPS.Z m128 xmm k xmm
// VMULPS.Z m256 ymm k ymm
// VMULPS.Z xmm xmm k xmm
// VMULPS.Z ymm ymm k ymm
// VMULPS.Z m512 zmm k zmm
// VMULPS.Z zmm zmm k zmm
//
// Construct and append a VMULPS.Z instruction to the active function.
// Operates on the global context.
func VMULPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VMULPS_Z(mxyz, xyz, k, xyz1) }
// VMULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULSD m64 xmm xmm
// VMULSD xmm xmm xmm
// VMULSD m64 xmm k xmm
// VMULSD xmm xmm k xmm
//
// Construct and append a VMULSD instruction to the active function.
func (c *Context) VMULSD(ops ...operand.Op) {
c.addinstruction(x86.VMULSD(ops...))
}
// VMULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULSD m64 xmm xmm
// VMULSD xmm xmm xmm
// VMULSD m64 xmm k xmm
// VMULSD xmm xmm k xmm
//
// Construct and append a VMULSD instruction to the active function.
// Operates on the global context.
func VMULSD(ops ...operand.Op) { ctx.VMULSD(ops...) }
// VMULSD_RD_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSD.RD_SAE xmm xmm k xmm
// VMULSD.RD_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RD_SAE instruction to the active function.
func (c *Context) VMULSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSD_RD_SAE(ops...))
}
// VMULSD_RD_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSD.RD_SAE xmm xmm k xmm
// VMULSD.RD_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VMULSD_RD_SAE(ops ...operand.Op) { ctx.VMULSD_RD_SAE(ops...) }
// VMULSD_RD_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RD_SAE.Z instruction to the active function.
func (c *Context) VMULSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSD_RD_SAE_Z(x, x1, k, x2))
}
// VMULSD_RD_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSD_RD_SAE_Z(x, x1, k, x2) }
// VMULSD_RN_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSD.RN_SAE xmm xmm k xmm
// VMULSD.RN_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RN_SAE instruction to the active function.
func (c *Context) VMULSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSD_RN_SAE(ops...))
}
// VMULSD_RN_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSD.RN_SAE xmm xmm k xmm
// VMULSD.RN_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VMULSD_RN_SAE(ops ...operand.Op) { ctx.VMULSD_RN_SAE(ops...) }
// VMULSD_RN_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RN_SAE.Z instruction to the active function.
func (c *Context) VMULSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSD_RN_SAE_Z(x, x1, k, x2))
}
// VMULSD_RN_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSD_RN_SAE_Z(x, x1, k, x2) }
// VMULSD_RU_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSD.RU_SAE xmm xmm k xmm
// VMULSD.RU_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RU_SAE instruction to the active function.
func (c *Context) VMULSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSD_RU_SAE(ops...))
}
// VMULSD_RU_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSD.RU_SAE xmm xmm k xmm
// VMULSD.RU_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VMULSD_RU_SAE(ops ...operand.Op) { ctx.VMULSD_RU_SAE(ops...) }
// VMULSD_RU_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RU_SAE.Z instruction to the active function.
func (c *Context) VMULSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSD_RU_SAE_Z(x, x1, k, x2))
}
// VMULSD_RU_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSD_RU_SAE_Z(x, x1, k, x2) }
// VMULSD_RZ_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSD.RZ_SAE xmm xmm k xmm
// VMULSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RZ_SAE instruction to the active function.
func (c *Context) VMULSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSD_RZ_SAE(ops...))
}
// VMULSD_RZ_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSD.RZ_SAE xmm xmm k xmm
// VMULSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VMULSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VMULSD_RZ_SAE(ops ...operand.Op) { ctx.VMULSD_RZ_SAE(ops...) }
// VMULSD_RZ_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VMULSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSD_RZ_SAE_Z(x, x1, k, x2))
}
// VMULSD_RZ_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSD_RZ_SAE_Z(x, x1, k, x2) }
// VMULSD_Z: Multiply Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSD.Z m64 xmm k xmm
// VMULSD.Z xmm xmm k xmm
//
// Construct and append a VMULSD.Z instruction to the active function.
func (c *Context) VMULSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMULSD_Z(mx, x, k, x1))
}
// VMULSD_Z: Multiply Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSD.Z m64 xmm k xmm
// VMULSD.Z xmm xmm k xmm
//
// Construct and append a VMULSD.Z instruction to the active function.
// Operates on the global context.
func VMULSD_Z(mx, x, k, x1 operand.Op) { ctx.VMULSD_Z(mx, x, k, x1) }
// VMULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULSS m32 xmm xmm
// VMULSS xmm xmm xmm
// VMULSS m32 xmm k xmm
// VMULSS xmm xmm k xmm
//
// Construct and append a VMULSS instruction to the active function.
func (c *Context) VMULSS(ops ...operand.Op) {
c.addinstruction(x86.VMULSS(ops...))
}
// VMULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULSS m32 xmm xmm
// VMULSS xmm xmm xmm
// VMULSS m32 xmm k xmm
// VMULSS xmm xmm k xmm
//
// Construct and append a VMULSS instruction to the active function.
// Operates on the global context.
func VMULSS(ops ...operand.Op) { ctx.VMULSS(ops...) }
// VMULSS_RD_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSS.RD_SAE xmm xmm k xmm
// VMULSS.RD_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RD_SAE instruction to the active function.
func (c *Context) VMULSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSS_RD_SAE(ops...))
}
// VMULSS_RD_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSS.RD_SAE xmm xmm k xmm
// VMULSS.RD_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VMULSS_RD_SAE(ops ...operand.Op) { ctx.VMULSS_RD_SAE(ops...) }
// VMULSS_RD_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RD_SAE.Z instruction to the active function.
func (c *Context) VMULSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSS_RD_SAE_Z(x, x1, k, x2))
}
// VMULSS_RD_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSS_RD_SAE_Z(x, x1, k, x2) }
// VMULSS_RN_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSS.RN_SAE xmm xmm k xmm
// VMULSS.RN_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RN_SAE instruction to the active function.
func (c *Context) VMULSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSS_RN_SAE(ops...))
}
// VMULSS_RN_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSS.RN_SAE xmm xmm k xmm
// VMULSS.RN_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VMULSS_RN_SAE(ops ...operand.Op) { ctx.VMULSS_RN_SAE(ops...) }
// VMULSS_RN_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RN_SAE.Z instruction to the active function.
func (c *Context) VMULSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSS_RN_SAE_Z(x, x1, k, x2))
}
// VMULSS_RN_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSS_RN_SAE_Z(x, x1, k, x2) }
// VMULSS_RU_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSS.RU_SAE xmm xmm k xmm
// VMULSS.RU_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RU_SAE instruction to the active function.
func (c *Context) VMULSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSS_RU_SAE(ops...))
}
// VMULSS_RU_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSS.RU_SAE xmm xmm k xmm
// VMULSS.RU_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VMULSS_RU_SAE(ops ...operand.Op) { ctx.VMULSS_RU_SAE(ops...) }
// VMULSS_RU_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RU_SAE.Z instruction to the active function.
func (c *Context) VMULSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSS_RU_SAE_Z(x, x1, k, x2))
}
// VMULSS_RU_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSS_RU_SAE_Z(x, x1, k, x2) }
// VMULSS_RZ_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSS.RZ_SAE xmm xmm k xmm
// VMULSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RZ_SAE instruction to the active function.
func (c *Context) VMULSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VMULSS_RZ_SAE(ops...))
}
// VMULSS_RZ_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSS.RZ_SAE xmm xmm k xmm
// VMULSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VMULSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VMULSS_RZ_SAE(ops ...operand.Op) { ctx.VMULSS_RZ_SAE(ops...) }
// VMULSS_RZ_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VMULSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VMULSS_RZ_SAE_Z(x, x1, k, x2))
}
// VMULSS_RZ_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VMULSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VMULSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VMULSS_RZ_SAE_Z(x, x1, k, x2) }
// VMULSS_Z: Multiply Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSS.Z m32 xmm k xmm
// VMULSS.Z xmm xmm k xmm
//
// Construct and append a VMULSS.Z instruction to the active function.
func (c *Context) VMULSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VMULSS_Z(mx, x, k, x1))
}
// VMULSS_Z: Multiply Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSS.Z m32 xmm k xmm
// VMULSS.Z xmm xmm k xmm
//
// Construct and append a VMULSS.Z instruction to the active function.
// Operates on the global context.
func VMULSS_Z(mx, x, k, x1 operand.Op) { ctx.VMULSS_Z(mx, x, k, x1) }
// VORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// VORPD m128 xmm xmm
// VORPD m256 ymm ymm
// VORPD xmm xmm xmm
// VORPD ymm ymm ymm
// VORPD m128 xmm k xmm
// VORPD m256 ymm k ymm
// VORPD xmm xmm k xmm
// VORPD ymm ymm k ymm
// VORPD m512 zmm k zmm
// VORPD m512 zmm zmm
// VORPD zmm zmm k zmm
// VORPD zmm zmm zmm
//
// Construct and append a VORPD instruction to the active function.
func (c *Context) VORPD(ops ...operand.Op) {
c.addinstruction(x86.VORPD(ops...))
}
// VORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// VORPD m128 xmm xmm
// VORPD m256 ymm ymm
// VORPD xmm xmm xmm
// VORPD ymm ymm ymm
// VORPD m128 xmm k xmm
// VORPD m256 ymm k ymm
// VORPD xmm xmm k xmm
// VORPD ymm ymm k ymm
// VORPD m512 zmm k zmm
// VORPD m512 zmm zmm
// VORPD zmm zmm k zmm
// VORPD zmm zmm zmm
//
// Construct and append a VORPD instruction to the active function.
// Operates on the global context.
func VORPD(ops ...operand.Op) { ctx.VORPD(ops...) }
// VORPD_BCST: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPD.BCST m64 xmm k xmm
// VORPD.BCST m64 xmm xmm
// VORPD.BCST m64 ymm k ymm
// VORPD.BCST m64 ymm ymm
// VORPD.BCST m64 zmm k zmm
// VORPD.BCST m64 zmm zmm
//
// Construct and append a VORPD.BCST instruction to the active function.
func (c *Context) VORPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VORPD_BCST(ops...))
}
// VORPD_BCST: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPD.BCST m64 xmm k xmm
// VORPD.BCST m64 xmm xmm
// VORPD.BCST m64 ymm k ymm
// VORPD.BCST m64 ymm ymm
// VORPD.BCST m64 zmm k zmm
// VORPD.BCST m64 zmm zmm
//
// Construct and append a VORPD.BCST instruction to the active function.
// Operates on the global context.
func VORPD_BCST(ops ...operand.Op) { ctx.VORPD_BCST(ops...) }
// VORPD_BCST_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPD.BCST.Z m64 xmm k xmm
// VORPD.BCST.Z m64 ymm k ymm
// VORPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VORPD.BCST.Z instruction to the active function.
func (c *Context) VORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VORPD_BCST_Z(m, xyz, k, xyz1))
}
// VORPD_BCST_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPD.BCST.Z m64 xmm k xmm
// VORPD.BCST.Z m64 ymm k ymm
// VORPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VORPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VORPD_BCST_Z(m, xyz, k, xyz1) }
// VORPD_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPD.Z m128 xmm k xmm
// VORPD.Z m256 ymm k ymm
// VORPD.Z xmm xmm k xmm
// VORPD.Z ymm ymm k ymm
// VORPD.Z m512 zmm k zmm
// VORPD.Z zmm zmm k zmm
//
// Construct and append a VORPD.Z instruction to the active function.
func (c *Context) VORPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VORPD_Z(mxyz, xyz, k, xyz1))
}
// VORPD_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPD.Z m128 xmm k xmm
// VORPD.Z m256 ymm k ymm
// VORPD.Z xmm xmm k xmm
// VORPD.Z ymm ymm k ymm
// VORPD.Z m512 zmm k zmm
// VORPD.Z zmm zmm k zmm
//
// Construct and append a VORPD.Z instruction to the active function.
// Operates on the global context.
func VORPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VORPD_Z(mxyz, xyz, k, xyz1) }
// VORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// VORPS m128 xmm xmm
// VORPS m256 ymm ymm
// VORPS xmm xmm xmm
// VORPS ymm ymm ymm
// VORPS m128 xmm k xmm
// VORPS m256 ymm k ymm
// VORPS xmm xmm k xmm
// VORPS ymm ymm k ymm
// VORPS m512 zmm k zmm
// VORPS m512 zmm zmm
// VORPS zmm zmm k zmm
// VORPS zmm zmm zmm
//
// Construct and append a VORPS instruction to the active function.
func (c *Context) VORPS(ops ...operand.Op) {
c.addinstruction(x86.VORPS(ops...))
}
// VORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// VORPS m128 xmm xmm
// VORPS m256 ymm ymm
// VORPS xmm xmm xmm
// VORPS ymm ymm ymm
// VORPS m128 xmm k xmm
// VORPS m256 ymm k ymm
// VORPS xmm xmm k xmm
// VORPS ymm ymm k ymm
// VORPS m512 zmm k zmm
// VORPS m512 zmm zmm
// VORPS zmm zmm k zmm
// VORPS zmm zmm zmm
//
// Construct and append a VORPS instruction to the active function.
// Operates on the global context.
func VORPS(ops ...operand.Op) { ctx.VORPS(ops...) }
// VORPS_BCST: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPS.BCST m32 xmm k xmm
// VORPS.BCST m32 xmm xmm
// VORPS.BCST m32 ymm k ymm
// VORPS.BCST m32 ymm ymm
// VORPS.BCST m32 zmm k zmm
// VORPS.BCST m32 zmm zmm
//
// Construct and append a VORPS.BCST instruction to the active function.
func (c *Context) VORPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VORPS_BCST(ops...))
}
// VORPS_BCST: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPS.BCST m32 xmm k xmm
// VORPS.BCST m32 xmm xmm
// VORPS.BCST m32 ymm k ymm
// VORPS.BCST m32 ymm ymm
// VORPS.BCST m32 zmm k zmm
// VORPS.BCST m32 zmm zmm
//
// Construct and append a VORPS.BCST instruction to the active function.
// Operates on the global context.
func VORPS_BCST(ops ...operand.Op) { ctx.VORPS_BCST(ops...) }
// VORPS_BCST_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPS.BCST.Z m32 xmm k xmm
// VORPS.BCST.Z m32 ymm k ymm
// VORPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VORPS.BCST.Z instruction to the active function.
func (c *Context) VORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VORPS_BCST_Z(m, xyz, k, xyz1))
}
// VORPS_BCST_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPS.BCST.Z m32 xmm k xmm
// VORPS.BCST.Z m32 ymm k ymm
// VORPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VORPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VORPS_BCST_Z(m, xyz, k, xyz1) }
// VORPS_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPS.Z m128 xmm k xmm
// VORPS.Z m256 ymm k ymm
// VORPS.Z xmm xmm k xmm
// VORPS.Z ymm ymm k ymm
// VORPS.Z m512 zmm k zmm
// VORPS.Z zmm zmm k zmm
//
// Construct and append a VORPS.Z instruction to the active function.
func (c *Context) VORPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VORPS_Z(mxyz, xyz, k, xyz1))
}
// VORPS_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPS.Z m128 xmm k xmm
// VORPS.Z m256 ymm k ymm
// VORPS.Z xmm xmm k xmm
// VORPS.Z ymm ymm k ymm
// VORPS.Z m512 zmm k zmm
// VORPS.Z zmm zmm k zmm
//
// Construct and append a VORPS.Z instruction to the active function.
// Operates on the global context.
func VORPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VORPS_Z(mxyz, xyz, k, xyz1) }
// VPABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// VPABSB m256 ymm
// VPABSB ymm ymm
// VPABSB m128 xmm
// VPABSB xmm xmm
// VPABSB m128 k xmm
// VPABSB m256 k ymm
// VPABSB xmm k xmm
// VPABSB ymm k ymm
// VPABSB m512 k zmm
// VPABSB m512 zmm
// VPABSB zmm k zmm
// VPABSB zmm zmm
//
// Construct and append a VPABSB instruction to the active function.
func (c *Context) VPABSB(ops ...operand.Op) {
c.addinstruction(x86.VPABSB(ops...))
}
// VPABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// VPABSB m256 ymm
// VPABSB ymm ymm
// VPABSB m128 xmm
// VPABSB xmm xmm
// VPABSB m128 k xmm
// VPABSB m256 k ymm
// VPABSB xmm k xmm
// VPABSB ymm k ymm
// VPABSB m512 k zmm
// VPABSB m512 zmm
// VPABSB zmm k zmm
// VPABSB zmm zmm
//
// Construct and append a VPABSB instruction to the active function.
// Operates on the global context.
func VPABSB(ops ...operand.Op) { ctx.VPABSB(ops...) }
// VPABSB_Z: Packed Absolute Value of Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPABSB.Z m128 k xmm
// VPABSB.Z m256 k ymm
// VPABSB.Z xmm k xmm
// VPABSB.Z ymm k ymm
// VPABSB.Z m512 k zmm
// VPABSB.Z zmm k zmm
//
// Construct and append a VPABSB.Z instruction to the active function.
func (c *Context) VPABSB_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPABSB_Z(mxyz, k, xyz))
}
// VPABSB_Z: Packed Absolute Value of Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPABSB.Z m128 k xmm
// VPABSB.Z m256 k ymm
// VPABSB.Z xmm k xmm
// VPABSB.Z ymm k ymm
// VPABSB.Z m512 k zmm
// VPABSB.Z zmm k zmm
//
// Construct and append a VPABSB.Z instruction to the active function.
// Operates on the global context.
func VPABSB_Z(mxyz, k, xyz operand.Op) { ctx.VPABSB_Z(mxyz, k, xyz) }
// VPABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// VPABSD m256 ymm
// VPABSD ymm ymm
// VPABSD m128 xmm
// VPABSD xmm xmm
// VPABSD m128 k xmm
// VPABSD m256 k ymm
// VPABSD xmm k xmm
// VPABSD ymm k ymm
// VPABSD m512 k zmm
// VPABSD m512 zmm
// VPABSD zmm k zmm
// VPABSD zmm zmm
//
// Construct and append a VPABSD instruction to the active function.
func (c *Context) VPABSD(ops ...operand.Op) {
c.addinstruction(x86.VPABSD(ops...))
}
// VPABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// VPABSD m256 ymm
// VPABSD ymm ymm
// VPABSD m128 xmm
// VPABSD xmm xmm
// VPABSD m128 k xmm
// VPABSD m256 k ymm
// VPABSD xmm k xmm
// VPABSD ymm k ymm
// VPABSD m512 k zmm
// VPABSD m512 zmm
// VPABSD zmm k zmm
// VPABSD zmm zmm
//
// Construct and append a VPABSD instruction to the active function.
// Operates on the global context.
func VPABSD(ops ...operand.Op) { ctx.VPABSD(ops...) }
// VPABSD_BCST: Packed Absolute Value of Doubleword Integers (Broadcast).
//
// Forms:
//
// VPABSD.BCST m32 k xmm
// VPABSD.BCST m32 k ymm
// VPABSD.BCST m32 xmm
// VPABSD.BCST m32 ymm
// VPABSD.BCST m32 k zmm
// VPABSD.BCST m32 zmm
//
// Construct and append a VPABSD.BCST instruction to the active function.
func (c *Context) VPABSD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPABSD_BCST(ops...))
}
// VPABSD_BCST: Packed Absolute Value of Doubleword Integers (Broadcast).
//
// Forms:
//
// VPABSD.BCST m32 k xmm
// VPABSD.BCST m32 k ymm
// VPABSD.BCST m32 xmm
// VPABSD.BCST m32 ymm
// VPABSD.BCST m32 k zmm
// VPABSD.BCST m32 zmm
//
// Construct and append a VPABSD.BCST instruction to the active function.
// Operates on the global context.
func VPABSD_BCST(ops ...operand.Op) { ctx.VPABSD_BCST(ops...) }
// VPABSD_BCST_Z: Packed Absolute Value of Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSD.BCST.Z m32 k xmm
// VPABSD.BCST.Z m32 k ymm
// VPABSD.BCST.Z m32 k zmm
//
// Construct and append a VPABSD.BCST.Z instruction to the active function.
func (c *Context) VPABSD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPABSD_BCST_Z(m, k, xyz))
}
// VPABSD_BCST_Z: Packed Absolute Value of Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSD.BCST.Z m32 k xmm
// VPABSD.BCST.Z m32 k ymm
// VPABSD.BCST.Z m32 k zmm
//
// Construct and append a VPABSD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPABSD_BCST_Z(m, k, xyz operand.Op) { ctx.VPABSD_BCST_Z(m, k, xyz) }
// VPABSD_Z: Packed Absolute Value of Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSD.Z m128 k xmm
// VPABSD.Z m256 k ymm
// VPABSD.Z xmm k xmm
// VPABSD.Z ymm k ymm
// VPABSD.Z m512 k zmm
// VPABSD.Z zmm k zmm
//
// Construct and append a VPABSD.Z instruction to the active function.
func (c *Context) VPABSD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPABSD_Z(mxyz, k, xyz))
}
// VPABSD_Z: Packed Absolute Value of Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSD.Z m128 k xmm
// VPABSD.Z m256 k ymm
// VPABSD.Z xmm k xmm
// VPABSD.Z ymm k ymm
// VPABSD.Z m512 k zmm
// VPABSD.Z zmm k zmm
//
// Construct and append a VPABSD.Z instruction to the active function.
// Operates on the global context.
func VPABSD_Z(mxyz, k, xyz operand.Op) { ctx.VPABSD_Z(mxyz, k, xyz) }
// VPABSQ: Packed Absolute Value of Quadword Integers.
//
// Forms:
//
// VPABSQ m128 k xmm
// VPABSQ m128 xmm
// VPABSQ m256 k ymm
// VPABSQ m256 ymm
// VPABSQ xmm k xmm
// VPABSQ xmm xmm
// VPABSQ ymm k ymm
// VPABSQ ymm ymm
// VPABSQ m512 k zmm
// VPABSQ m512 zmm
// VPABSQ zmm k zmm
// VPABSQ zmm zmm
//
// Construct and append a VPABSQ instruction to the active function.
func (c *Context) VPABSQ(ops ...operand.Op) {
c.addinstruction(x86.VPABSQ(ops...))
}
// VPABSQ: Packed Absolute Value of Quadword Integers.
//
// Forms:
//
// VPABSQ m128 k xmm
// VPABSQ m128 xmm
// VPABSQ m256 k ymm
// VPABSQ m256 ymm
// VPABSQ xmm k xmm
// VPABSQ xmm xmm
// VPABSQ ymm k ymm
// VPABSQ ymm ymm
// VPABSQ m512 k zmm
// VPABSQ m512 zmm
// VPABSQ zmm k zmm
// VPABSQ zmm zmm
//
// Construct and append a VPABSQ instruction to the active function.
// Operates on the global context.
func VPABSQ(ops ...operand.Op) { ctx.VPABSQ(ops...) }
// VPABSQ_BCST: Packed Absolute Value of Quadword Integers (Broadcast).
//
// Forms:
//
// VPABSQ.BCST m64 k xmm
// VPABSQ.BCST m64 k ymm
// VPABSQ.BCST m64 xmm
// VPABSQ.BCST m64 ymm
// VPABSQ.BCST m64 k zmm
// VPABSQ.BCST m64 zmm
//
// Construct and append a VPABSQ.BCST instruction to the active function.
func (c *Context) VPABSQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPABSQ_BCST(ops...))
}
// VPABSQ_BCST: Packed Absolute Value of Quadword Integers (Broadcast).
//
// Forms:
//
// VPABSQ.BCST m64 k xmm
// VPABSQ.BCST m64 k ymm
// VPABSQ.BCST m64 xmm
// VPABSQ.BCST m64 ymm
// VPABSQ.BCST m64 k zmm
// VPABSQ.BCST m64 zmm
//
// Construct and append a VPABSQ.BCST instruction to the active function.
// Operates on the global context.
func VPABSQ_BCST(ops ...operand.Op) { ctx.VPABSQ_BCST(ops...) }
// VPABSQ_BCST_Z: Packed Absolute Value of Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSQ.BCST.Z m64 k xmm
// VPABSQ.BCST.Z m64 k ymm
// VPABSQ.BCST.Z m64 k zmm
//
// Construct and append a VPABSQ.BCST.Z instruction to the active function.
func (c *Context) VPABSQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPABSQ_BCST_Z(m, k, xyz))
}
// VPABSQ_BCST_Z: Packed Absolute Value of Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSQ.BCST.Z m64 k xmm
// VPABSQ.BCST.Z m64 k ymm
// VPABSQ.BCST.Z m64 k zmm
//
// Construct and append a VPABSQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPABSQ_BCST_Z(m, k, xyz operand.Op) { ctx.VPABSQ_BCST_Z(m, k, xyz) }
// VPABSQ_Z: Packed Absolute Value of Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSQ.Z m128 k xmm
// VPABSQ.Z m256 k ymm
// VPABSQ.Z xmm k xmm
// VPABSQ.Z ymm k ymm
// VPABSQ.Z m512 k zmm
// VPABSQ.Z zmm k zmm
//
// Construct and append a VPABSQ.Z instruction to the active function.
func (c *Context) VPABSQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPABSQ_Z(mxyz, k, xyz))
}
// VPABSQ_Z: Packed Absolute Value of Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSQ.Z m128 k xmm
// VPABSQ.Z m256 k ymm
// VPABSQ.Z xmm k xmm
// VPABSQ.Z ymm k ymm
// VPABSQ.Z m512 k zmm
// VPABSQ.Z zmm k zmm
//
// Construct and append a VPABSQ.Z instruction to the active function.
// Operates on the global context.
func VPABSQ_Z(mxyz, k, xyz operand.Op) { ctx.VPABSQ_Z(mxyz, k, xyz) }
// VPABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// VPABSW m256 ymm
// VPABSW ymm ymm
// VPABSW m128 xmm
// VPABSW xmm xmm
// VPABSW m128 k xmm
// VPABSW m256 k ymm
// VPABSW xmm k xmm
// VPABSW ymm k ymm
// VPABSW m512 k zmm
// VPABSW m512 zmm
// VPABSW zmm k zmm
// VPABSW zmm zmm
//
// Construct and append a VPABSW instruction to the active function.
func (c *Context) VPABSW(ops ...operand.Op) {
c.addinstruction(x86.VPABSW(ops...))
}
// VPABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// VPABSW m256 ymm
// VPABSW ymm ymm
// VPABSW m128 xmm
// VPABSW xmm xmm
// VPABSW m128 k xmm
// VPABSW m256 k ymm
// VPABSW xmm k xmm
// VPABSW ymm k ymm
// VPABSW m512 k zmm
// VPABSW m512 zmm
// VPABSW zmm k zmm
// VPABSW zmm zmm
//
// Construct and append a VPABSW instruction to the active function.
// Operates on the global context.
func VPABSW(ops ...operand.Op) { ctx.VPABSW(ops...) }
// VPABSW_Z: Packed Absolute Value of Word Integers (Zeroing Masking).
//
// Forms:
//
// VPABSW.Z m128 k xmm
// VPABSW.Z m256 k ymm
// VPABSW.Z xmm k xmm
// VPABSW.Z ymm k ymm
// VPABSW.Z m512 k zmm
// VPABSW.Z zmm k zmm
//
// Construct and append a VPABSW.Z instruction to the active function.
func (c *Context) VPABSW_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPABSW_Z(mxyz, k, xyz))
}
// VPABSW_Z: Packed Absolute Value of Word Integers (Zeroing Masking).
//
// Forms:
//
// VPABSW.Z m128 k xmm
// VPABSW.Z m256 k ymm
// VPABSW.Z xmm k xmm
// VPABSW.Z ymm k ymm
// VPABSW.Z m512 k zmm
// VPABSW.Z zmm k zmm
//
// Construct and append a VPABSW.Z instruction to the active function.
// Operates on the global context.
func VPABSW_Z(mxyz, k, xyz operand.Op) { ctx.VPABSW_Z(mxyz, k, xyz) }
// VPACKSSDW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// VPACKSSDW m256 ymm ymm
// VPACKSSDW ymm ymm ymm
// VPACKSSDW m128 xmm xmm
// VPACKSSDW xmm xmm xmm
// VPACKSSDW m128 xmm k xmm
// VPACKSSDW m256 ymm k ymm
// VPACKSSDW xmm xmm k xmm
// VPACKSSDW ymm ymm k ymm
// VPACKSSDW m512 zmm k zmm
// VPACKSSDW m512 zmm zmm
// VPACKSSDW zmm zmm k zmm
// VPACKSSDW zmm zmm zmm
//
// Construct and append a VPACKSSDW instruction to the active function.
func (c *Context) VPACKSSDW(ops ...operand.Op) {
c.addinstruction(x86.VPACKSSDW(ops...))
}
// VPACKSSDW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// VPACKSSDW m256 ymm ymm
// VPACKSSDW ymm ymm ymm
// VPACKSSDW m128 xmm xmm
// VPACKSSDW xmm xmm xmm
// VPACKSSDW m128 xmm k xmm
// VPACKSSDW m256 ymm k ymm
// VPACKSSDW xmm xmm k xmm
// VPACKSSDW ymm ymm k ymm
// VPACKSSDW m512 zmm k zmm
// VPACKSSDW m512 zmm zmm
// VPACKSSDW zmm zmm k zmm
// VPACKSSDW zmm zmm zmm
//
// Construct and append a VPACKSSDW instruction to the active function.
// Operates on the global context.
func VPACKSSDW(ops ...operand.Op) { ctx.VPACKSSDW(ops...) }
// VPACKSSDW_BCST: Pack Doublewords into Words with Signed Saturation (Broadcast).
//
// Forms:
//
// VPACKSSDW.BCST m32 xmm k xmm
// VPACKSSDW.BCST m32 xmm xmm
// VPACKSSDW.BCST m32 ymm k ymm
// VPACKSSDW.BCST m32 ymm ymm
// VPACKSSDW.BCST m32 zmm k zmm
// VPACKSSDW.BCST m32 zmm zmm
//
// Construct and append a VPACKSSDW.BCST instruction to the active function.
func (c *Context) VPACKSSDW_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPACKSSDW_BCST(ops...))
}
// VPACKSSDW_BCST: Pack Doublewords into Words with Signed Saturation (Broadcast).
//
// Forms:
//
// VPACKSSDW.BCST m32 xmm k xmm
// VPACKSSDW.BCST m32 xmm xmm
// VPACKSSDW.BCST m32 ymm k ymm
// VPACKSSDW.BCST m32 ymm ymm
// VPACKSSDW.BCST m32 zmm k zmm
// VPACKSSDW.BCST m32 zmm zmm
//
// Construct and append a VPACKSSDW.BCST instruction to the active function.
// Operates on the global context.
func VPACKSSDW_BCST(ops ...operand.Op) { ctx.VPACKSSDW_BCST(ops...) }
// VPACKSSDW_BCST_Z: Pack Doublewords into Words with Signed Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.BCST.Z m32 xmm k xmm
// VPACKSSDW.BCST.Z m32 ymm k ymm
// VPACKSSDW.BCST.Z m32 zmm k zmm
//
// Construct and append a VPACKSSDW.BCST.Z instruction to the active function.
func (c *Context) VPACKSSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKSSDW_BCST_Z(m, xyz, k, xyz1))
}
// VPACKSSDW_BCST_Z: Pack Doublewords into Words with Signed Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.BCST.Z m32 xmm k xmm
// VPACKSSDW.BCST.Z m32 ymm k ymm
// VPACKSSDW.BCST.Z m32 zmm k zmm
//
// Construct and append a VPACKSSDW.BCST.Z instruction to the active function.
// Operates on the global context.
func VPACKSSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPACKSSDW_BCST_Z(m, xyz, k, xyz1) }
// VPACKSSDW_Z: Pack Doublewords into Words with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.Z m128 xmm k xmm
// VPACKSSDW.Z m256 ymm k ymm
// VPACKSSDW.Z xmm xmm k xmm
// VPACKSSDW.Z ymm ymm k ymm
// VPACKSSDW.Z m512 zmm k zmm
// VPACKSSDW.Z zmm zmm k zmm
//
// Construct and append a VPACKSSDW.Z instruction to the active function.
func (c *Context) VPACKSSDW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKSSDW_Z(mxyz, xyz, k, xyz1))
}
// VPACKSSDW_Z: Pack Doublewords into Words with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.Z m128 xmm k xmm
// VPACKSSDW.Z m256 ymm k ymm
// VPACKSSDW.Z xmm xmm k xmm
// VPACKSSDW.Z ymm ymm k ymm
// VPACKSSDW.Z m512 zmm k zmm
// VPACKSSDW.Z zmm zmm k zmm
//
// Construct and append a VPACKSSDW.Z instruction to the active function.
// Operates on the global context.
func VPACKSSDW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPACKSSDW_Z(mxyz, xyz, k, xyz1) }
// VPACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// VPACKSSWB m256 ymm ymm
// VPACKSSWB ymm ymm ymm
// VPACKSSWB m128 xmm xmm
// VPACKSSWB xmm xmm xmm
// VPACKSSWB m128 xmm k xmm
// VPACKSSWB m256 ymm k ymm
// VPACKSSWB xmm xmm k xmm
// VPACKSSWB ymm ymm k ymm
// VPACKSSWB m512 zmm k zmm
// VPACKSSWB m512 zmm zmm
// VPACKSSWB zmm zmm k zmm
// VPACKSSWB zmm zmm zmm
//
// Construct and append a VPACKSSWB instruction to the active function.
func (c *Context) VPACKSSWB(ops ...operand.Op) {
c.addinstruction(x86.VPACKSSWB(ops...))
}
// VPACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// VPACKSSWB m256 ymm ymm
// VPACKSSWB ymm ymm ymm
// VPACKSSWB m128 xmm xmm
// VPACKSSWB xmm xmm xmm
// VPACKSSWB m128 xmm k xmm
// VPACKSSWB m256 ymm k ymm
// VPACKSSWB xmm xmm k xmm
// VPACKSSWB ymm ymm k ymm
// VPACKSSWB m512 zmm k zmm
// VPACKSSWB m512 zmm zmm
// VPACKSSWB zmm zmm k zmm
// VPACKSSWB zmm zmm zmm
//
// Construct and append a VPACKSSWB instruction to the active function.
// Operates on the global context.
func VPACKSSWB(ops ...operand.Op) { ctx.VPACKSSWB(ops...) }
// VPACKSSWB_Z: Pack Words into Bytes with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSWB.Z m128 xmm k xmm
// VPACKSSWB.Z m256 ymm k ymm
// VPACKSSWB.Z xmm xmm k xmm
// VPACKSSWB.Z ymm ymm k ymm
// VPACKSSWB.Z m512 zmm k zmm
// VPACKSSWB.Z zmm zmm k zmm
//
// Construct and append a VPACKSSWB.Z instruction to the active function.
func (c *Context) VPACKSSWB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKSSWB_Z(mxyz, xyz, k, xyz1))
}
// VPACKSSWB_Z: Pack Words into Bytes with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSWB.Z m128 xmm k xmm
// VPACKSSWB.Z m256 ymm k ymm
// VPACKSSWB.Z xmm xmm k xmm
// VPACKSSWB.Z ymm ymm k ymm
// VPACKSSWB.Z m512 zmm k zmm
// VPACKSSWB.Z zmm zmm k zmm
//
// Construct and append a VPACKSSWB.Z instruction to the active function.
// Operates on the global context.
func VPACKSSWB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPACKSSWB_Z(mxyz, xyz, k, xyz1) }
// VPACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// VPACKUSDW m256 ymm ymm
// VPACKUSDW ymm ymm ymm
// VPACKUSDW m128 xmm xmm
// VPACKUSDW xmm xmm xmm
// VPACKUSDW m128 xmm k xmm
// VPACKUSDW m256 ymm k ymm
// VPACKUSDW xmm xmm k xmm
// VPACKUSDW ymm ymm k ymm
// VPACKUSDW m512 zmm k zmm
// VPACKUSDW m512 zmm zmm
// VPACKUSDW zmm zmm k zmm
// VPACKUSDW zmm zmm zmm
//
// Construct and append a VPACKUSDW instruction to the active function.
func (c *Context) VPACKUSDW(ops ...operand.Op) {
c.addinstruction(x86.VPACKUSDW(ops...))
}
// VPACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// VPACKUSDW m256 ymm ymm
// VPACKUSDW ymm ymm ymm
// VPACKUSDW m128 xmm xmm
// VPACKUSDW xmm xmm xmm
// VPACKUSDW m128 xmm k xmm
// VPACKUSDW m256 ymm k ymm
// VPACKUSDW xmm xmm k xmm
// VPACKUSDW ymm ymm k ymm
// VPACKUSDW m512 zmm k zmm
// VPACKUSDW m512 zmm zmm
// VPACKUSDW zmm zmm k zmm
// VPACKUSDW zmm zmm zmm
//
// Construct and append a VPACKUSDW instruction to the active function.
// Operates on the global context.
func VPACKUSDW(ops ...operand.Op) { ctx.VPACKUSDW(ops...) }
// VPACKUSDW_BCST: Pack Doublewords into Words with Unsigned Saturation (Broadcast).
//
// Forms:
//
// VPACKUSDW.BCST m32 xmm k xmm
// VPACKUSDW.BCST m32 xmm xmm
// VPACKUSDW.BCST m32 ymm k ymm
// VPACKUSDW.BCST m32 ymm ymm
// VPACKUSDW.BCST m32 zmm k zmm
// VPACKUSDW.BCST m32 zmm zmm
//
// Construct and append a VPACKUSDW.BCST instruction to the active function.
func (c *Context) VPACKUSDW_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPACKUSDW_BCST(ops...))
}
// VPACKUSDW_BCST: Pack Doublewords into Words with Unsigned Saturation (Broadcast).
//
// Forms:
//
// VPACKUSDW.BCST m32 xmm k xmm
// VPACKUSDW.BCST m32 xmm xmm
// VPACKUSDW.BCST m32 ymm k ymm
// VPACKUSDW.BCST m32 ymm ymm
// VPACKUSDW.BCST m32 zmm k zmm
// VPACKUSDW.BCST m32 zmm zmm
//
// Construct and append a VPACKUSDW.BCST instruction to the active function.
// Operates on the global context.
func VPACKUSDW_BCST(ops ...operand.Op) { ctx.VPACKUSDW_BCST(ops...) }
// VPACKUSDW_BCST_Z: Pack Doublewords into Words with Unsigned Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.BCST.Z m32 xmm k xmm
// VPACKUSDW.BCST.Z m32 ymm k ymm
// VPACKUSDW.BCST.Z m32 zmm k zmm
//
// Construct and append a VPACKUSDW.BCST.Z instruction to the active function.
func (c *Context) VPACKUSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKUSDW_BCST_Z(m, xyz, k, xyz1))
}
// VPACKUSDW_BCST_Z: Pack Doublewords into Words with Unsigned Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.BCST.Z m32 xmm k xmm
// VPACKUSDW.BCST.Z m32 ymm k ymm
// VPACKUSDW.BCST.Z m32 zmm k zmm
//
// Construct and append a VPACKUSDW.BCST.Z instruction to the active function.
// Operates on the global context.
func VPACKUSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPACKUSDW_BCST_Z(m, xyz, k, xyz1) }
// VPACKUSDW_Z: Pack Doublewords into Words with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.Z m128 xmm k xmm
// VPACKUSDW.Z m256 ymm k ymm
// VPACKUSDW.Z xmm xmm k xmm
// VPACKUSDW.Z ymm ymm k ymm
// VPACKUSDW.Z m512 zmm k zmm
// VPACKUSDW.Z zmm zmm k zmm
//
// Construct and append a VPACKUSDW.Z instruction to the active function.
func (c *Context) VPACKUSDW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKUSDW_Z(mxyz, xyz, k, xyz1))
}
// VPACKUSDW_Z: Pack Doublewords into Words with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.Z m128 xmm k xmm
// VPACKUSDW.Z m256 ymm k ymm
// VPACKUSDW.Z xmm xmm k xmm
// VPACKUSDW.Z ymm ymm k ymm
// VPACKUSDW.Z m512 zmm k zmm
// VPACKUSDW.Z zmm zmm k zmm
//
// Construct and append a VPACKUSDW.Z instruction to the active function.
// Operates on the global context.
func VPACKUSDW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPACKUSDW_Z(mxyz, xyz, k, xyz1) }
// VPACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// VPACKUSWB m256 ymm ymm
// VPACKUSWB ymm ymm ymm
// VPACKUSWB m128 xmm xmm
// VPACKUSWB xmm xmm xmm
// VPACKUSWB m128 xmm k xmm
// VPACKUSWB m256 ymm k ymm
// VPACKUSWB xmm xmm k xmm
// VPACKUSWB ymm ymm k ymm
// VPACKUSWB m512 zmm k zmm
// VPACKUSWB m512 zmm zmm
// VPACKUSWB zmm zmm k zmm
// VPACKUSWB zmm zmm zmm
//
// Construct and append a VPACKUSWB instruction to the active function.
func (c *Context) VPACKUSWB(ops ...operand.Op) {
c.addinstruction(x86.VPACKUSWB(ops...))
}
// VPACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// VPACKUSWB m256 ymm ymm
// VPACKUSWB ymm ymm ymm
// VPACKUSWB m128 xmm xmm
// VPACKUSWB xmm xmm xmm
// VPACKUSWB m128 xmm k xmm
// VPACKUSWB m256 ymm k ymm
// VPACKUSWB xmm xmm k xmm
// VPACKUSWB ymm ymm k ymm
// VPACKUSWB m512 zmm k zmm
// VPACKUSWB m512 zmm zmm
// VPACKUSWB zmm zmm k zmm
// VPACKUSWB zmm zmm zmm
//
// Construct and append a VPACKUSWB instruction to the active function.
// Operates on the global context.
func VPACKUSWB(ops ...operand.Op) { ctx.VPACKUSWB(ops...) }
// VPACKUSWB_Z: Pack Words into Bytes with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSWB.Z m128 xmm k xmm
// VPACKUSWB.Z m256 ymm k ymm
// VPACKUSWB.Z xmm xmm k xmm
// VPACKUSWB.Z ymm ymm k ymm
// VPACKUSWB.Z m512 zmm k zmm
// VPACKUSWB.Z zmm zmm k zmm
//
// Construct and append a VPACKUSWB.Z instruction to the active function.
func (c *Context) VPACKUSWB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPACKUSWB_Z(mxyz, xyz, k, xyz1))
}
// VPACKUSWB_Z: Pack Words into Bytes with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSWB.Z m128 xmm k xmm
// VPACKUSWB.Z m256 ymm k ymm
// VPACKUSWB.Z xmm xmm k xmm
// VPACKUSWB.Z ymm ymm k ymm
// VPACKUSWB.Z m512 zmm k zmm
// VPACKUSWB.Z zmm zmm k zmm
//
// Construct and append a VPACKUSWB.Z instruction to the active function.
// Operates on the global context.
func VPACKUSWB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPACKUSWB_Z(mxyz, xyz, k, xyz1) }
// VPADDB: Add Packed Byte Integers.
//
// Forms:
//
// VPADDB m256 ymm ymm
// VPADDB ymm ymm ymm
// VPADDB m128 xmm xmm
// VPADDB xmm xmm xmm
// VPADDB m128 xmm k xmm
// VPADDB m256 ymm k ymm
// VPADDB xmm xmm k xmm
// VPADDB ymm ymm k ymm
// VPADDB m512 zmm k zmm
// VPADDB m512 zmm zmm
// VPADDB zmm zmm k zmm
// VPADDB zmm zmm zmm
//
// Construct and append a VPADDB instruction to the active function.
func (c *Context) VPADDB(ops ...operand.Op) {
c.addinstruction(x86.VPADDB(ops...))
}
// VPADDB: Add Packed Byte Integers.
//
// Forms:
//
// VPADDB m256 ymm ymm
// VPADDB ymm ymm ymm
// VPADDB m128 xmm xmm
// VPADDB xmm xmm xmm
// VPADDB m128 xmm k xmm
// VPADDB m256 ymm k ymm
// VPADDB xmm xmm k xmm
// VPADDB ymm ymm k ymm
// VPADDB m512 zmm k zmm
// VPADDB m512 zmm zmm
// VPADDB zmm zmm k zmm
// VPADDB zmm zmm zmm
//
// Construct and append a VPADDB instruction to the active function.
// Operates on the global context.
func VPADDB(ops ...operand.Op) { ctx.VPADDB(ops...) }
// VPADDB_Z: Add Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPADDB.Z m128 xmm k xmm
// VPADDB.Z m256 ymm k ymm
// VPADDB.Z xmm xmm k xmm
// VPADDB.Z ymm ymm k ymm
// VPADDB.Z m512 zmm k zmm
// VPADDB.Z zmm zmm k zmm
//
// Construct and append a VPADDB.Z instruction to the active function.
func (c *Context) VPADDB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDB_Z(mxyz, xyz, k, xyz1))
}
// VPADDB_Z: Add Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPADDB.Z m128 xmm k xmm
// VPADDB.Z m256 ymm k ymm
// VPADDB.Z xmm xmm k xmm
// VPADDB.Z ymm ymm k ymm
// VPADDB.Z m512 zmm k zmm
// VPADDB.Z zmm zmm k zmm
//
// Construct and append a VPADDB.Z instruction to the active function.
// Operates on the global context.
func VPADDB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDB_Z(mxyz, xyz, k, xyz1) }
// VPADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// VPADDD m256 ymm ymm
// VPADDD ymm ymm ymm
// VPADDD m128 xmm xmm
// VPADDD xmm xmm xmm
// VPADDD m128 xmm k xmm
// VPADDD m256 ymm k ymm
// VPADDD xmm xmm k xmm
// VPADDD ymm ymm k ymm
// VPADDD m512 zmm k zmm
// VPADDD m512 zmm zmm
// VPADDD zmm zmm k zmm
// VPADDD zmm zmm zmm
//
// Construct and append a VPADDD instruction to the active function.
func (c *Context) VPADDD(ops ...operand.Op) {
c.addinstruction(x86.VPADDD(ops...))
}
// VPADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// VPADDD m256 ymm ymm
// VPADDD ymm ymm ymm
// VPADDD m128 xmm xmm
// VPADDD xmm xmm xmm
// VPADDD m128 xmm k xmm
// VPADDD m256 ymm k ymm
// VPADDD xmm xmm k xmm
// VPADDD ymm ymm k ymm
// VPADDD m512 zmm k zmm
// VPADDD m512 zmm zmm
// VPADDD zmm zmm k zmm
// VPADDD zmm zmm zmm
//
// Construct and append a VPADDD instruction to the active function.
// Operates on the global context.
func VPADDD(ops ...operand.Op) { ctx.VPADDD(ops...) }
// VPADDD_BCST: Add Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPADDD.BCST m32 xmm k xmm
// VPADDD.BCST m32 xmm xmm
// VPADDD.BCST m32 ymm k ymm
// VPADDD.BCST m32 ymm ymm
// VPADDD.BCST m32 zmm k zmm
// VPADDD.BCST m32 zmm zmm
//
// Construct and append a VPADDD.BCST instruction to the active function.
func (c *Context) VPADDD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPADDD_BCST(ops...))
}
// VPADDD_BCST: Add Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPADDD.BCST m32 xmm k xmm
// VPADDD.BCST m32 xmm xmm
// VPADDD.BCST m32 ymm k ymm
// VPADDD.BCST m32 ymm ymm
// VPADDD.BCST m32 zmm k zmm
// VPADDD.BCST m32 zmm zmm
//
// Construct and append a VPADDD.BCST instruction to the active function.
// Operates on the global context.
func VPADDD_BCST(ops ...operand.Op) { ctx.VPADDD_BCST(ops...) }
// VPADDD_BCST_Z: Add Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDD.BCST.Z m32 xmm k xmm
// VPADDD.BCST.Z m32 ymm k ymm
// VPADDD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPADDD.BCST.Z instruction to the active function.
func (c *Context) VPADDD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDD_BCST_Z(m, xyz, k, xyz1))
}
// VPADDD_BCST_Z: Add Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDD.BCST.Z m32 xmm k xmm
// VPADDD.BCST.Z m32 ymm k ymm
// VPADDD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPADDD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPADDD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPADDD_BCST_Z(m, xyz, k, xyz1) }
// VPADDD_Z: Add Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDD.Z m128 xmm k xmm
// VPADDD.Z m256 ymm k ymm
// VPADDD.Z xmm xmm k xmm
// VPADDD.Z ymm ymm k ymm
// VPADDD.Z m512 zmm k zmm
// VPADDD.Z zmm zmm k zmm
//
// Construct and append a VPADDD.Z instruction to the active function.
func (c *Context) VPADDD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDD_Z(mxyz, xyz, k, xyz1))
}
// VPADDD_Z: Add Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDD.Z m128 xmm k xmm
// VPADDD.Z m256 ymm k ymm
// VPADDD.Z xmm xmm k xmm
// VPADDD.Z ymm ymm k ymm
// VPADDD.Z m512 zmm k zmm
// VPADDD.Z zmm zmm k zmm
//
// Construct and append a VPADDD.Z instruction to the active function.
// Operates on the global context.
func VPADDD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDD_Z(mxyz, xyz, k, xyz1) }
// VPADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// VPADDQ m256 ymm ymm
// VPADDQ ymm ymm ymm
// VPADDQ m128 xmm xmm
// VPADDQ xmm xmm xmm
// VPADDQ m128 xmm k xmm
// VPADDQ m256 ymm k ymm
// VPADDQ xmm xmm k xmm
// VPADDQ ymm ymm k ymm
// VPADDQ m512 zmm k zmm
// VPADDQ m512 zmm zmm
// VPADDQ zmm zmm k zmm
// VPADDQ zmm zmm zmm
//
// Construct and append a VPADDQ instruction to the active function.
func (c *Context) VPADDQ(ops ...operand.Op) {
c.addinstruction(x86.VPADDQ(ops...))
}
// VPADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// VPADDQ m256 ymm ymm
// VPADDQ ymm ymm ymm
// VPADDQ m128 xmm xmm
// VPADDQ xmm xmm xmm
// VPADDQ m128 xmm k xmm
// VPADDQ m256 ymm k ymm
// VPADDQ xmm xmm k xmm
// VPADDQ ymm ymm k ymm
// VPADDQ m512 zmm k zmm
// VPADDQ m512 zmm zmm
// VPADDQ zmm zmm k zmm
// VPADDQ zmm zmm zmm
//
// Construct and append a VPADDQ instruction to the active function.
// Operates on the global context.
func VPADDQ(ops ...operand.Op) { ctx.VPADDQ(ops...) }
// VPADDQ_BCST: Add Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPADDQ.BCST m64 xmm k xmm
// VPADDQ.BCST m64 xmm xmm
// VPADDQ.BCST m64 ymm k ymm
// VPADDQ.BCST m64 ymm ymm
// VPADDQ.BCST m64 zmm k zmm
// VPADDQ.BCST m64 zmm zmm
//
// Construct and append a VPADDQ.BCST instruction to the active function.
func (c *Context) VPADDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPADDQ_BCST(ops...))
}
// VPADDQ_BCST: Add Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPADDQ.BCST m64 xmm k xmm
// VPADDQ.BCST m64 xmm xmm
// VPADDQ.BCST m64 ymm k ymm
// VPADDQ.BCST m64 ymm ymm
// VPADDQ.BCST m64 zmm k zmm
// VPADDQ.BCST m64 zmm zmm
//
// Construct and append a VPADDQ.BCST instruction to the active function.
// Operates on the global context.
func VPADDQ_BCST(ops ...operand.Op) { ctx.VPADDQ_BCST(ops...) }
// VPADDQ_BCST_Z: Add Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDQ.BCST.Z m64 xmm k xmm
// VPADDQ.BCST.Z m64 ymm k ymm
// VPADDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPADDQ.BCST.Z instruction to the active function.
func (c *Context) VPADDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPADDQ_BCST_Z: Add Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDQ.BCST.Z m64 xmm k xmm
// VPADDQ.BCST.Z m64 ymm k ymm
// VPADDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPADDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPADDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPADDQ_BCST_Z(m, xyz, k, xyz1) }
// VPADDQ_Z: Add Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDQ.Z m128 xmm k xmm
// VPADDQ.Z m256 ymm k ymm
// VPADDQ.Z xmm xmm k xmm
// VPADDQ.Z ymm ymm k ymm
// VPADDQ.Z m512 zmm k zmm
// VPADDQ.Z zmm zmm k zmm
//
// Construct and append a VPADDQ.Z instruction to the active function.
func (c *Context) VPADDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDQ_Z(mxyz, xyz, k, xyz1))
}
// VPADDQ_Z: Add Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDQ.Z m128 xmm k xmm
// VPADDQ.Z m256 ymm k ymm
// VPADDQ.Z xmm xmm k xmm
// VPADDQ.Z ymm ymm k ymm
// VPADDQ.Z m512 zmm k zmm
// VPADDQ.Z zmm zmm k zmm
//
// Construct and append a VPADDQ.Z instruction to the active function.
// Operates on the global context.
func VPADDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDQ_Z(mxyz, xyz, k, xyz1) }
// VPADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPADDSB m256 ymm ymm
// VPADDSB ymm ymm ymm
// VPADDSB m128 xmm xmm
// VPADDSB xmm xmm xmm
// VPADDSB m128 xmm k xmm
// VPADDSB m256 ymm k ymm
// VPADDSB xmm xmm k xmm
// VPADDSB ymm ymm k ymm
// VPADDSB m512 zmm k zmm
// VPADDSB m512 zmm zmm
// VPADDSB zmm zmm k zmm
// VPADDSB zmm zmm zmm
//
// Construct and append a VPADDSB instruction to the active function.
func (c *Context) VPADDSB(ops ...operand.Op) {
c.addinstruction(x86.VPADDSB(ops...))
}
// VPADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPADDSB m256 ymm ymm
// VPADDSB ymm ymm ymm
// VPADDSB m128 xmm xmm
// VPADDSB xmm xmm xmm
// VPADDSB m128 xmm k xmm
// VPADDSB m256 ymm k ymm
// VPADDSB xmm xmm k xmm
// VPADDSB ymm ymm k ymm
// VPADDSB m512 zmm k zmm
// VPADDSB m512 zmm zmm
// VPADDSB zmm zmm k zmm
// VPADDSB zmm zmm zmm
//
// Construct and append a VPADDSB instruction to the active function.
// Operates on the global context.
func VPADDSB(ops ...operand.Op) { ctx.VPADDSB(ops...) }
// VPADDSB_Z: Add Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSB.Z m128 xmm k xmm
// VPADDSB.Z m256 ymm k ymm
// VPADDSB.Z xmm xmm k xmm
// VPADDSB.Z ymm ymm k ymm
// VPADDSB.Z m512 zmm k zmm
// VPADDSB.Z zmm zmm k zmm
//
// Construct and append a VPADDSB.Z instruction to the active function.
func (c *Context) VPADDSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDSB_Z(mxyz, xyz, k, xyz1))
}
// VPADDSB_Z: Add Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSB.Z m128 xmm k xmm
// VPADDSB.Z m256 ymm k ymm
// VPADDSB.Z xmm xmm k xmm
// VPADDSB.Z ymm ymm k ymm
// VPADDSB.Z m512 zmm k zmm
// VPADDSB.Z zmm zmm k zmm
//
// Construct and append a VPADDSB.Z instruction to the active function.
// Operates on the global context.
func VPADDSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDSB_Z(mxyz, xyz, k, xyz1) }
// VPADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPADDSW m256 ymm ymm
// VPADDSW ymm ymm ymm
// VPADDSW m128 xmm xmm
// VPADDSW xmm xmm xmm
// VPADDSW m128 xmm k xmm
// VPADDSW m256 ymm k ymm
// VPADDSW xmm xmm k xmm
// VPADDSW ymm ymm k ymm
// VPADDSW m512 zmm k zmm
// VPADDSW m512 zmm zmm
// VPADDSW zmm zmm k zmm
// VPADDSW zmm zmm zmm
//
// Construct and append a VPADDSW instruction to the active function.
func (c *Context) VPADDSW(ops ...operand.Op) {
c.addinstruction(x86.VPADDSW(ops...))
}
// VPADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPADDSW m256 ymm ymm
// VPADDSW ymm ymm ymm
// VPADDSW m128 xmm xmm
// VPADDSW xmm xmm xmm
// VPADDSW m128 xmm k xmm
// VPADDSW m256 ymm k ymm
// VPADDSW xmm xmm k xmm
// VPADDSW ymm ymm k ymm
// VPADDSW m512 zmm k zmm
// VPADDSW m512 zmm zmm
// VPADDSW zmm zmm k zmm
// VPADDSW zmm zmm zmm
//
// Construct and append a VPADDSW instruction to the active function.
// Operates on the global context.
func VPADDSW(ops ...operand.Op) { ctx.VPADDSW(ops...) }
// VPADDSW_Z: Add Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSW.Z m128 xmm k xmm
// VPADDSW.Z m256 ymm k ymm
// VPADDSW.Z xmm xmm k xmm
// VPADDSW.Z ymm ymm k ymm
// VPADDSW.Z m512 zmm k zmm
// VPADDSW.Z zmm zmm k zmm
//
// Construct and append a VPADDSW.Z instruction to the active function.
func (c *Context) VPADDSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDSW_Z(mxyz, xyz, k, xyz1))
}
// VPADDSW_Z: Add Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSW.Z m128 xmm k xmm
// VPADDSW.Z m256 ymm k ymm
// VPADDSW.Z xmm xmm k xmm
// VPADDSW.Z ymm ymm k ymm
// VPADDSW.Z m512 zmm k zmm
// VPADDSW.Z zmm zmm k zmm
//
// Construct and append a VPADDSW.Z instruction to the active function.
// Operates on the global context.
func VPADDSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDSW_Z(mxyz, xyz, k, xyz1) }
// VPADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSB m256 ymm ymm
// VPADDUSB ymm ymm ymm
// VPADDUSB m128 xmm xmm
// VPADDUSB xmm xmm xmm
// VPADDUSB m128 xmm k xmm
// VPADDUSB m256 ymm k ymm
// VPADDUSB xmm xmm k xmm
// VPADDUSB ymm ymm k ymm
// VPADDUSB m512 zmm k zmm
// VPADDUSB m512 zmm zmm
// VPADDUSB zmm zmm k zmm
// VPADDUSB zmm zmm zmm
//
// Construct and append a VPADDUSB instruction to the active function.
func (c *Context) VPADDUSB(ops ...operand.Op) {
c.addinstruction(x86.VPADDUSB(ops...))
}
// VPADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSB m256 ymm ymm
// VPADDUSB ymm ymm ymm
// VPADDUSB m128 xmm xmm
// VPADDUSB xmm xmm xmm
// VPADDUSB m128 xmm k xmm
// VPADDUSB m256 ymm k ymm
// VPADDUSB xmm xmm k xmm
// VPADDUSB ymm ymm k ymm
// VPADDUSB m512 zmm k zmm
// VPADDUSB m512 zmm zmm
// VPADDUSB zmm zmm k zmm
// VPADDUSB zmm zmm zmm
//
// Construct and append a VPADDUSB instruction to the active function.
// Operates on the global context.
func VPADDUSB(ops ...operand.Op) { ctx.VPADDUSB(ops...) }
// VPADDUSB_Z: Add Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSB.Z m128 xmm k xmm
// VPADDUSB.Z m256 ymm k ymm
// VPADDUSB.Z xmm xmm k xmm
// VPADDUSB.Z ymm ymm k ymm
// VPADDUSB.Z m512 zmm k zmm
// VPADDUSB.Z zmm zmm k zmm
//
// Construct and append a VPADDUSB.Z instruction to the active function.
func (c *Context) VPADDUSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDUSB_Z(mxyz, xyz, k, xyz1))
}
// VPADDUSB_Z: Add Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSB.Z m128 xmm k xmm
// VPADDUSB.Z m256 ymm k ymm
// VPADDUSB.Z xmm xmm k xmm
// VPADDUSB.Z ymm ymm k ymm
// VPADDUSB.Z m512 zmm k zmm
// VPADDUSB.Z zmm zmm k zmm
//
// Construct and append a VPADDUSB.Z instruction to the active function.
// Operates on the global context.
func VPADDUSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDUSB_Z(mxyz, xyz, k, xyz1) }
// VPADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSW m256 ymm ymm
// VPADDUSW ymm ymm ymm
// VPADDUSW m128 xmm xmm
// VPADDUSW xmm xmm xmm
// VPADDUSW m128 xmm k xmm
// VPADDUSW m256 ymm k ymm
// VPADDUSW xmm xmm k xmm
// VPADDUSW ymm ymm k ymm
// VPADDUSW m512 zmm k zmm
// VPADDUSW m512 zmm zmm
// VPADDUSW zmm zmm k zmm
// VPADDUSW zmm zmm zmm
//
// Construct and append a VPADDUSW instruction to the active function.
func (c *Context) VPADDUSW(ops ...operand.Op) {
c.addinstruction(x86.VPADDUSW(ops...))
}
// VPADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSW m256 ymm ymm
// VPADDUSW ymm ymm ymm
// VPADDUSW m128 xmm xmm
// VPADDUSW xmm xmm xmm
// VPADDUSW m128 xmm k xmm
// VPADDUSW m256 ymm k ymm
// VPADDUSW xmm xmm k xmm
// VPADDUSW ymm ymm k ymm
// VPADDUSW m512 zmm k zmm
// VPADDUSW m512 zmm zmm
// VPADDUSW zmm zmm k zmm
// VPADDUSW zmm zmm zmm
//
// Construct and append a VPADDUSW instruction to the active function.
// Operates on the global context.
func VPADDUSW(ops ...operand.Op) { ctx.VPADDUSW(ops...) }
// VPADDUSW_Z: Add Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSW.Z m128 xmm k xmm
// VPADDUSW.Z m256 ymm k ymm
// VPADDUSW.Z xmm xmm k xmm
// VPADDUSW.Z ymm ymm k ymm
// VPADDUSW.Z m512 zmm k zmm
// VPADDUSW.Z zmm zmm k zmm
//
// Construct and append a VPADDUSW.Z instruction to the active function.
func (c *Context) VPADDUSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDUSW_Z(mxyz, xyz, k, xyz1))
}
// VPADDUSW_Z: Add Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSW.Z m128 xmm k xmm
// VPADDUSW.Z m256 ymm k ymm
// VPADDUSW.Z xmm xmm k xmm
// VPADDUSW.Z ymm ymm k ymm
// VPADDUSW.Z m512 zmm k zmm
// VPADDUSW.Z zmm zmm k zmm
//
// Construct and append a VPADDUSW.Z instruction to the active function.
// Operates on the global context.
func VPADDUSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDUSW_Z(mxyz, xyz, k, xyz1) }
// VPADDW: Add Packed Word Integers.
//
// Forms:
//
// VPADDW m256 ymm ymm
// VPADDW ymm ymm ymm
// VPADDW m128 xmm xmm
// VPADDW xmm xmm xmm
// VPADDW m128 xmm k xmm
// VPADDW m256 ymm k ymm
// VPADDW xmm xmm k xmm
// VPADDW ymm ymm k ymm
// VPADDW m512 zmm k zmm
// VPADDW m512 zmm zmm
// VPADDW zmm zmm k zmm
// VPADDW zmm zmm zmm
//
// Construct and append a VPADDW instruction to the active function.
func (c *Context) VPADDW(ops ...operand.Op) {
c.addinstruction(x86.VPADDW(ops...))
}
// VPADDW: Add Packed Word Integers.
//
// Forms:
//
// VPADDW m256 ymm ymm
// VPADDW ymm ymm ymm
// VPADDW m128 xmm xmm
// VPADDW xmm xmm xmm
// VPADDW m128 xmm k xmm
// VPADDW m256 ymm k ymm
// VPADDW xmm xmm k xmm
// VPADDW ymm ymm k ymm
// VPADDW m512 zmm k zmm
// VPADDW m512 zmm zmm
// VPADDW zmm zmm k zmm
// VPADDW zmm zmm zmm
//
// Construct and append a VPADDW instruction to the active function.
// Operates on the global context.
func VPADDW(ops ...operand.Op) { ctx.VPADDW(ops...) }
// VPADDW_Z: Add Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPADDW.Z m128 xmm k xmm
// VPADDW.Z m256 ymm k ymm
// VPADDW.Z xmm xmm k xmm
// VPADDW.Z ymm ymm k ymm
// VPADDW.Z m512 zmm k zmm
// VPADDW.Z zmm zmm k zmm
//
// Construct and append a VPADDW.Z instruction to the active function.
func (c *Context) VPADDW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPADDW_Z(mxyz, xyz, k, xyz1))
}
// VPADDW_Z: Add Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPADDW.Z m128 xmm k xmm
// VPADDW.Z m256 ymm k ymm
// VPADDW.Z xmm xmm k xmm
// VPADDW.Z ymm ymm k ymm
// VPADDW.Z m512 zmm k zmm
// VPADDW.Z zmm zmm k zmm
//
// Construct and append a VPADDW.Z instruction to the active function.
// Operates on the global context.
func VPADDW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPADDW_Z(mxyz, xyz, k, xyz1) }
// VPALIGNR: Packed Align Right.
//
// Forms:
//
// VPALIGNR imm8 m256 ymm ymm
// VPALIGNR imm8 ymm ymm ymm
// VPALIGNR imm8 m128 xmm xmm
// VPALIGNR imm8 xmm xmm xmm
// VPALIGNR imm8 m128 xmm k xmm
// VPALIGNR imm8 m256 ymm k ymm
// VPALIGNR imm8 xmm xmm k xmm
// VPALIGNR imm8 ymm ymm k ymm
// VPALIGNR imm8 m512 zmm k zmm
// VPALIGNR imm8 m512 zmm zmm
// VPALIGNR imm8 zmm zmm k zmm
// VPALIGNR imm8 zmm zmm zmm
//
// Construct and append a VPALIGNR instruction to the active function.
func (c *Context) VPALIGNR(ops ...operand.Op) {
c.addinstruction(x86.VPALIGNR(ops...))
}
// VPALIGNR: Packed Align Right.
//
// Forms:
//
// VPALIGNR imm8 m256 ymm ymm
// VPALIGNR imm8 ymm ymm ymm
// VPALIGNR imm8 m128 xmm xmm
// VPALIGNR imm8 xmm xmm xmm
// VPALIGNR imm8 m128 xmm k xmm
// VPALIGNR imm8 m256 ymm k ymm
// VPALIGNR imm8 xmm xmm k xmm
// VPALIGNR imm8 ymm ymm k ymm
// VPALIGNR imm8 m512 zmm k zmm
// VPALIGNR imm8 m512 zmm zmm
// VPALIGNR imm8 zmm zmm k zmm
// VPALIGNR imm8 zmm zmm zmm
//
// Construct and append a VPALIGNR instruction to the active function.
// Operates on the global context.
func VPALIGNR(ops ...operand.Op) { ctx.VPALIGNR(ops...) }
// VPALIGNR_Z: Packed Align Right (Zeroing Masking).
//
// Forms:
//
// VPALIGNR.Z imm8 m128 xmm k xmm
// VPALIGNR.Z imm8 m256 ymm k ymm
// VPALIGNR.Z imm8 xmm xmm k xmm
// VPALIGNR.Z imm8 ymm ymm k ymm
// VPALIGNR.Z imm8 m512 zmm k zmm
// VPALIGNR.Z imm8 zmm zmm k zmm
//
// Construct and append a VPALIGNR.Z instruction to the active function.
func (c *Context) VPALIGNR_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPALIGNR_Z(i, mxyz, xyz, k, xyz1))
}
// VPALIGNR_Z: Packed Align Right (Zeroing Masking).
//
// Forms:
//
// VPALIGNR.Z imm8 m128 xmm k xmm
// VPALIGNR.Z imm8 m256 ymm k ymm
// VPALIGNR.Z imm8 xmm xmm k xmm
// VPALIGNR.Z imm8 ymm ymm k ymm
// VPALIGNR.Z imm8 m512 zmm k zmm
// VPALIGNR.Z imm8 zmm zmm k zmm
//
// Construct and append a VPALIGNR.Z instruction to the active function.
// Operates on the global context.
func VPALIGNR_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPALIGNR_Z(i, mxyz, xyz, k, xyz1) }
// VPAND: Packed Bitwise Logical AND.
//
// Forms:
//
// VPAND m256 ymm ymm
// VPAND ymm ymm ymm
// VPAND m128 xmm xmm
// VPAND xmm xmm xmm
//
// Construct and append a VPAND instruction to the active function.
func (c *Context) VPAND(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPAND(mxy, xy, xy1))
}
// VPAND: Packed Bitwise Logical AND.
//
// Forms:
//
// VPAND m256 ymm ymm
// VPAND ymm ymm ymm
// VPAND m128 xmm xmm
// VPAND xmm xmm xmm
//
// Construct and append a VPAND instruction to the active function.
// Operates on the global context.
func VPAND(mxy, xy, xy1 operand.Op) { ctx.VPAND(mxy, xy, xy1) }
// VPANDD: Bitwise Logical AND of Packed Doubleword Integers.
//
// Forms:
//
// VPANDD m128 xmm k xmm
// VPANDD m128 xmm xmm
// VPANDD m256 ymm k ymm
// VPANDD m256 ymm ymm
// VPANDD xmm xmm k xmm
// VPANDD xmm xmm xmm
// VPANDD ymm ymm k ymm
// VPANDD ymm ymm ymm
// VPANDD m512 zmm k zmm
// VPANDD m512 zmm zmm
// VPANDD zmm zmm k zmm
// VPANDD zmm zmm zmm
//
// Construct and append a VPANDD instruction to the active function.
func (c *Context) VPANDD(ops ...operand.Op) {
c.addinstruction(x86.VPANDD(ops...))
}
// VPANDD: Bitwise Logical AND of Packed Doubleword Integers.
//
// Forms:
//
// VPANDD m128 xmm k xmm
// VPANDD m128 xmm xmm
// VPANDD m256 ymm k ymm
// VPANDD m256 ymm ymm
// VPANDD xmm xmm k xmm
// VPANDD xmm xmm xmm
// VPANDD ymm ymm k ymm
// VPANDD ymm ymm ymm
// VPANDD m512 zmm k zmm
// VPANDD m512 zmm zmm
// VPANDD zmm zmm k zmm
// VPANDD zmm zmm zmm
//
// Construct and append a VPANDD instruction to the active function.
// Operates on the global context.
func VPANDD(ops ...operand.Op) { ctx.VPANDD(ops...) }
// VPANDD_BCST: Bitwise Logical AND of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDD.BCST m32 xmm k xmm
// VPANDD.BCST m32 xmm xmm
// VPANDD.BCST m32 ymm k ymm
// VPANDD.BCST m32 ymm ymm
// VPANDD.BCST m32 zmm k zmm
// VPANDD.BCST m32 zmm zmm
//
// Construct and append a VPANDD.BCST instruction to the active function.
func (c *Context) VPANDD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPANDD_BCST(ops...))
}
// VPANDD_BCST: Bitwise Logical AND of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDD.BCST m32 xmm k xmm
// VPANDD.BCST m32 xmm xmm
// VPANDD.BCST m32 ymm k ymm
// VPANDD.BCST m32 ymm ymm
// VPANDD.BCST m32 zmm k zmm
// VPANDD.BCST m32 zmm zmm
//
// Construct and append a VPANDD.BCST instruction to the active function.
// Operates on the global context.
func VPANDD_BCST(ops ...operand.Op) { ctx.VPANDD_BCST(ops...) }
// VPANDD_BCST_Z: Bitwise Logical AND of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDD.BCST.Z m32 xmm k xmm
// VPANDD.BCST.Z m32 ymm k ymm
// VPANDD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPANDD.BCST.Z instruction to the active function.
func (c *Context) VPANDD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDD_BCST_Z(m, xyz, k, xyz1))
}
// VPANDD_BCST_Z: Bitwise Logical AND of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDD.BCST.Z m32 xmm k xmm
// VPANDD.BCST.Z m32 ymm k ymm
// VPANDD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPANDD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPANDD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPANDD_BCST_Z(m, xyz, k, xyz1) }
// VPANDD_Z: Bitwise Logical AND of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDD.Z m128 xmm k xmm
// VPANDD.Z m256 ymm k ymm
// VPANDD.Z xmm xmm k xmm
// VPANDD.Z ymm ymm k ymm
// VPANDD.Z m512 zmm k zmm
// VPANDD.Z zmm zmm k zmm
//
// Construct and append a VPANDD.Z instruction to the active function.
func (c *Context) VPANDD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDD_Z(mxyz, xyz, k, xyz1))
}
// VPANDD_Z: Bitwise Logical AND of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDD.Z m128 xmm k xmm
// VPANDD.Z m256 ymm k ymm
// VPANDD.Z xmm xmm k xmm
// VPANDD.Z ymm ymm k ymm
// VPANDD.Z m512 zmm k zmm
// VPANDD.Z zmm zmm k zmm
//
// Construct and append a VPANDD.Z instruction to the active function.
// Operates on the global context.
func VPANDD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPANDD_Z(mxyz, xyz, k, xyz1) }
// VPANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// VPANDN m256 ymm ymm
// VPANDN ymm ymm ymm
// VPANDN m128 xmm xmm
// VPANDN xmm xmm xmm
//
// Construct and append a VPANDN instruction to the active function.
func (c *Context) VPANDN(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPANDN(mxy, xy, xy1))
}
// VPANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// VPANDN m256 ymm ymm
// VPANDN ymm ymm ymm
// VPANDN m128 xmm xmm
// VPANDN xmm xmm xmm
//
// Construct and append a VPANDN instruction to the active function.
// Operates on the global context.
func VPANDN(mxy, xy, xy1 operand.Op) { ctx.VPANDN(mxy, xy, xy1) }
// VPANDND: Bitwise Logical AND NOT of Packed Doubleword Integers.
//
// Forms:
//
// VPANDND m128 xmm k xmm
// VPANDND m128 xmm xmm
// VPANDND m256 ymm k ymm
// VPANDND m256 ymm ymm
// VPANDND xmm xmm k xmm
// VPANDND xmm xmm xmm
// VPANDND ymm ymm k ymm
// VPANDND ymm ymm ymm
// VPANDND m512 zmm k zmm
// VPANDND m512 zmm zmm
// VPANDND zmm zmm k zmm
// VPANDND zmm zmm zmm
//
// Construct and append a VPANDND instruction to the active function.
func (c *Context) VPANDND(ops ...operand.Op) {
c.addinstruction(x86.VPANDND(ops...))
}
// VPANDND: Bitwise Logical AND NOT of Packed Doubleword Integers.
//
// Forms:
//
// VPANDND m128 xmm k xmm
// VPANDND m128 xmm xmm
// VPANDND m256 ymm k ymm
// VPANDND m256 ymm ymm
// VPANDND xmm xmm k xmm
// VPANDND xmm xmm xmm
// VPANDND ymm ymm k ymm
// VPANDND ymm ymm ymm
// VPANDND m512 zmm k zmm
// VPANDND m512 zmm zmm
// VPANDND zmm zmm k zmm
// VPANDND zmm zmm zmm
//
// Construct and append a VPANDND instruction to the active function.
// Operates on the global context.
func VPANDND(ops ...operand.Op) { ctx.VPANDND(ops...) }
// VPANDND_BCST: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDND.BCST m32 xmm k xmm
// VPANDND.BCST m32 xmm xmm
// VPANDND.BCST m32 ymm k ymm
// VPANDND.BCST m32 ymm ymm
// VPANDND.BCST m32 zmm k zmm
// VPANDND.BCST m32 zmm zmm
//
// Construct and append a VPANDND.BCST instruction to the active function.
func (c *Context) VPANDND_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPANDND_BCST(ops...))
}
// VPANDND_BCST: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDND.BCST m32 xmm k xmm
// VPANDND.BCST m32 xmm xmm
// VPANDND.BCST m32 ymm k ymm
// VPANDND.BCST m32 ymm ymm
// VPANDND.BCST m32 zmm k zmm
// VPANDND.BCST m32 zmm zmm
//
// Construct and append a VPANDND.BCST instruction to the active function.
// Operates on the global context.
func VPANDND_BCST(ops ...operand.Op) { ctx.VPANDND_BCST(ops...) }
// VPANDND_BCST_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDND.BCST.Z m32 xmm k xmm
// VPANDND.BCST.Z m32 ymm k ymm
// VPANDND.BCST.Z m32 zmm k zmm
//
// Construct and append a VPANDND.BCST.Z instruction to the active function.
func (c *Context) VPANDND_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDND_BCST_Z(m, xyz, k, xyz1))
}
// VPANDND_BCST_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDND.BCST.Z m32 xmm k xmm
// VPANDND.BCST.Z m32 ymm k ymm
// VPANDND.BCST.Z m32 zmm k zmm
//
// Construct and append a VPANDND.BCST.Z instruction to the active function.
// Operates on the global context.
func VPANDND_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPANDND_BCST_Z(m, xyz, k, xyz1) }
// VPANDND_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDND.Z m128 xmm k xmm
// VPANDND.Z m256 ymm k ymm
// VPANDND.Z xmm xmm k xmm
// VPANDND.Z ymm ymm k ymm
// VPANDND.Z m512 zmm k zmm
// VPANDND.Z zmm zmm k zmm
//
// Construct and append a VPANDND.Z instruction to the active function.
func (c *Context) VPANDND_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDND_Z(mxyz, xyz, k, xyz1))
}
// VPANDND_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDND.Z m128 xmm k xmm
// VPANDND.Z m256 ymm k ymm
// VPANDND.Z xmm xmm k xmm
// VPANDND.Z ymm ymm k ymm
// VPANDND.Z m512 zmm k zmm
// VPANDND.Z zmm zmm k zmm
//
// Construct and append a VPANDND.Z instruction to the active function.
// Operates on the global context.
func VPANDND_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPANDND_Z(mxyz, xyz, k, xyz1) }
// VPANDNQ: Bitwise Logical AND NOT of Packed Quadword Integers.
//
// Forms:
//
// VPANDNQ m128 xmm k xmm
// VPANDNQ m128 xmm xmm
// VPANDNQ m256 ymm k ymm
// VPANDNQ m256 ymm ymm
// VPANDNQ xmm xmm k xmm
// VPANDNQ xmm xmm xmm
// VPANDNQ ymm ymm k ymm
// VPANDNQ ymm ymm ymm
// VPANDNQ m512 zmm k zmm
// VPANDNQ m512 zmm zmm
// VPANDNQ zmm zmm k zmm
// VPANDNQ zmm zmm zmm
//
// Construct and append a VPANDNQ instruction to the active function.
func (c *Context) VPANDNQ(ops ...operand.Op) {
c.addinstruction(x86.VPANDNQ(ops...))
}
// VPANDNQ: Bitwise Logical AND NOT of Packed Quadword Integers.
//
// Forms:
//
// VPANDNQ m128 xmm k xmm
// VPANDNQ m128 xmm xmm
// VPANDNQ m256 ymm k ymm
// VPANDNQ m256 ymm ymm
// VPANDNQ xmm xmm k xmm
// VPANDNQ xmm xmm xmm
// VPANDNQ ymm ymm k ymm
// VPANDNQ ymm ymm ymm
// VPANDNQ m512 zmm k zmm
// VPANDNQ m512 zmm zmm
// VPANDNQ zmm zmm k zmm
// VPANDNQ zmm zmm zmm
//
// Construct and append a VPANDNQ instruction to the active function.
// Operates on the global context.
func VPANDNQ(ops ...operand.Op) { ctx.VPANDNQ(ops...) }
// VPANDNQ_BCST: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDNQ.BCST m64 xmm k xmm
// VPANDNQ.BCST m64 xmm xmm
// VPANDNQ.BCST m64 ymm k ymm
// VPANDNQ.BCST m64 ymm ymm
// VPANDNQ.BCST m64 zmm k zmm
// VPANDNQ.BCST m64 zmm zmm
//
// Construct and append a VPANDNQ.BCST instruction to the active function.
func (c *Context) VPANDNQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPANDNQ_BCST(ops...))
}
// VPANDNQ_BCST: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDNQ.BCST m64 xmm k xmm
// VPANDNQ.BCST m64 xmm xmm
// VPANDNQ.BCST m64 ymm k ymm
// VPANDNQ.BCST m64 ymm ymm
// VPANDNQ.BCST m64 zmm k zmm
// VPANDNQ.BCST m64 zmm zmm
//
// Construct and append a VPANDNQ.BCST instruction to the active function.
// Operates on the global context.
func VPANDNQ_BCST(ops ...operand.Op) { ctx.VPANDNQ_BCST(ops...) }
// VPANDNQ_BCST_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDNQ.BCST.Z m64 xmm k xmm
// VPANDNQ.BCST.Z m64 ymm k ymm
// VPANDNQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPANDNQ.BCST.Z instruction to the active function.
func (c *Context) VPANDNQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDNQ_BCST_Z(m, xyz, k, xyz1))
}
// VPANDNQ_BCST_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDNQ.BCST.Z m64 xmm k xmm
// VPANDNQ.BCST.Z m64 ymm k ymm
// VPANDNQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPANDNQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPANDNQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPANDNQ_BCST_Z(m, xyz, k, xyz1) }
// VPANDNQ_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDNQ.Z m128 xmm k xmm
// VPANDNQ.Z m256 ymm k ymm
// VPANDNQ.Z xmm xmm k xmm
// VPANDNQ.Z ymm ymm k ymm
// VPANDNQ.Z m512 zmm k zmm
// VPANDNQ.Z zmm zmm k zmm
//
// Construct and append a VPANDNQ.Z instruction to the active function.
func (c *Context) VPANDNQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDNQ_Z(mxyz, xyz, k, xyz1))
}
// VPANDNQ_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDNQ.Z m128 xmm k xmm
// VPANDNQ.Z m256 ymm k ymm
// VPANDNQ.Z xmm xmm k xmm
// VPANDNQ.Z ymm ymm k ymm
// VPANDNQ.Z m512 zmm k zmm
// VPANDNQ.Z zmm zmm k zmm
//
// Construct and append a VPANDNQ.Z instruction to the active function.
// Operates on the global context.
func VPANDNQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPANDNQ_Z(mxyz, xyz, k, xyz1) }
// VPANDQ: Bitwise Logical AND of Packed Quadword Integers.
//
// Forms:
//
// VPANDQ m128 xmm k xmm
// VPANDQ m128 xmm xmm
// VPANDQ m256 ymm k ymm
// VPANDQ m256 ymm ymm
// VPANDQ xmm xmm k xmm
// VPANDQ xmm xmm xmm
// VPANDQ ymm ymm k ymm
// VPANDQ ymm ymm ymm
// VPANDQ m512 zmm k zmm
// VPANDQ m512 zmm zmm
// VPANDQ zmm zmm k zmm
// VPANDQ zmm zmm zmm
//
// Construct and append a VPANDQ instruction to the active function.
func (c *Context) VPANDQ(ops ...operand.Op) {
c.addinstruction(x86.VPANDQ(ops...))
}
// VPANDQ: Bitwise Logical AND of Packed Quadword Integers.
//
// Forms:
//
// VPANDQ m128 xmm k xmm
// VPANDQ m128 xmm xmm
// VPANDQ m256 ymm k ymm
// VPANDQ m256 ymm ymm
// VPANDQ xmm xmm k xmm
// VPANDQ xmm xmm xmm
// VPANDQ ymm ymm k ymm
// VPANDQ ymm ymm ymm
// VPANDQ m512 zmm k zmm
// VPANDQ m512 zmm zmm
// VPANDQ zmm zmm k zmm
// VPANDQ zmm zmm zmm
//
// Construct and append a VPANDQ instruction to the active function.
// Operates on the global context.
func VPANDQ(ops ...operand.Op) { ctx.VPANDQ(ops...) }
// VPANDQ_BCST: Bitwise Logical AND of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDQ.BCST m64 xmm k xmm
// VPANDQ.BCST m64 xmm xmm
// VPANDQ.BCST m64 ymm k ymm
// VPANDQ.BCST m64 ymm ymm
// VPANDQ.BCST m64 zmm k zmm
// VPANDQ.BCST m64 zmm zmm
//
// Construct and append a VPANDQ.BCST instruction to the active function.
func (c *Context) VPANDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPANDQ_BCST(ops...))
}
// VPANDQ_BCST: Bitwise Logical AND of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDQ.BCST m64 xmm k xmm
// VPANDQ.BCST m64 xmm xmm
// VPANDQ.BCST m64 ymm k ymm
// VPANDQ.BCST m64 ymm ymm
// VPANDQ.BCST m64 zmm k zmm
// VPANDQ.BCST m64 zmm zmm
//
// Construct and append a VPANDQ.BCST instruction to the active function.
// Operates on the global context.
func VPANDQ_BCST(ops ...operand.Op) { ctx.VPANDQ_BCST(ops...) }
// VPANDQ_BCST_Z: Bitwise Logical AND of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDQ.BCST.Z m64 xmm k xmm
// VPANDQ.BCST.Z m64 ymm k ymm
// VPANDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPANDQ.BCST.Z instruction to the active function.
func (c *Context) VPANDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPANDQ_BCST_Z: Bitwise Logical AND of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDQ.BCST.Z m64 xmm k xmm
// VPANDQ.BCST.Z m64 ymm k ymm
// VPANDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPANDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPANDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPANDQ_BCST_Z(m, xyz, k, xyz1) }
// VPANDQ_Z: Bitwise Logical AND of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDQ.Z m128 xmm k xmm
// VPANDQ.Z m256 ymm k ymm
// VPANDQ.Z xmm xmm k xmm
// VPANDQ.Z ymm ymm k ymm
// VPANDQ.Z m512 zmm k zmm
// VPANDQ.Z zmm zmm k zmm
//
// Construct and append a VPANDQ.Z instruction to the active function.
func (c *Context) VPANDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPANDQ_Z(mxyz, xyz, k, xyz1))
}
// VPANDQ_Z: Bitwise Logical AND of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDQ.Z m128 xmm k xmm
// VPANDQ.Z m256 ymm k ymm
// VPANDQ.Z xmm xmm k xmm
// VPANDQ.Z ymm ymm k ymm
// VPANDQ.Z m512 zmm k zmm
// VPANDQ.Z zmm zmm k zmm
//
// Construct and append a VPANDQ.Z instruction to the active function.
// Operates on the global context.
func VPANDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPANDQ_Z(mxyz, xyz, k, xyz1) }
// VPAVGB: Average Packed Byte Integers.
//
// Forms:
//
// VPAVGB m256 ymm ymm
// VPAVGB ymm ymm ymm
// VPAVGB m128 xmm xmm
// VPAVGB xmm xmm xmm
// VPAVGB m128 xmm k xmm
// VPAVGB m256 ymm k ymm
// VPAVGB xmm xmm k xmm
// VPAVGB ymm ymm k ymm
// VPAVGB m512 zmm k zmm
// VPAVGB m512 zmm zmm
// VPAVGB zmm zmm k zmm
// VPAVGB zmm zmm zmm
//
// Construct and append a VPAVGB instruction to the active function.
func (c *Context) VPAVGB(ops ...operand.Op) {
c.addinstruction(x86.VPAVGB(ops...))
}
// VPAVGB: Average Packed Byte Integers.
//
// Forms:
//
// VPAVGB m256 ymm ymm
// VPAVGB ymm ymm ymm
// VPAVGB m128 xmm xmm
// VPAVGB xmm xmm xmm
// VPAVGB m128 xmm k xmm
// VPAVGB m256 ymm k ymm
// VPAVGB xmm xmm k xmm
// VPAVGB ymm ymm k ymm
// VPAVGB m512 zmm k zmm
// VPAVGB m512 zmm zmm
// VPAVGB zmm zmm k zmm
// VPAVGB zmm zmm zmm
//
// Construct and append a VPAVGB instruction to the active function.
// Operates on the global context.
func VPAVGB(ops ...operand.Op) { ctx.VPAVGB(ops...) }
// VPAVGB_Z: Average Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGB.Z m128 xmm k xmm
// VPAVGB.Z m256 ymm k ymm
// VPAVGB.Z xmm xmm k xmm
// VPAVGB.Z ymm ymm k ymm
// VPAVGB.Z m512 zmm k zmm
// VPAVGB.Z zmm zmm k zmm
//
// Construct and append a VPAVGB.Z instruction to the active function.
func (c *Context) VPAVGB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPAVGB_Z(mxyz, xyz, k, xyz1))
}
// VPAVGB_Z: Average Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGB.Z m128 xmm k xmm
// VPAVGB.Z m256 ymm k ymm
// VPAVGB.Z xmm xmm k xmm
// VPAVGB.Z ymm ymm k ymm
// VPAVGB.Z m512 zmm k zmm
// VPAVGB.Z zmm zmm k zmm
//
// Construct and append a VPAVGB.Z instruction to the active function.
// Operates on the global context.
func VPAVGB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPAVGB_Z(mxyz, xyz, k, xyz1) }
// VPAVGW: Average Packed Word Integers.
//
// Forms:
//
// VPAVGW m256 ymm ymm
// VPAVGW ymm ymm ymm
// VPAVGW m128 xmm xmm
// VPAVGW xmm xmm xmm
// VPAVGW m128 xmm k xmm
// VPAVGW m256 ymm k ymm
// VPAVGW xmm xmm k xmm
// VPAVGW ymm ymm k ymm
// VPAVGW m512 zmm k zmm
// VPAVGW m512 zmm zmm
// VPAVGW zmm zmm k zmm
// VPAVGW zmm zmm zmm
//
// Construct and append a VPAVGW instruction to the active function.
func (c *Context) VPAVGW(ops ...operand.Op) {
c.addinstruction(x86.VPAVGW(ops...))
}
// VPAVGW: Average Packed Word Integers.
//
// Forms:
//
// VPAVGW m256 ymm ymm
// VPAVGW ymm ymm ymm
// VPAVGW m128 xmm xmm
// VPAVGW xmm xmm xmm
// VPAVGW m128 xmm k xmm
// VPAVGW m256 ymm k ymm
// VPAVGW xmm xmm k xmm
// VPAVGW ymm ymm k ymm
// VPAVGW m512 zmm k zmm
// VPAVGW m512 zmm zmm
// VPAVGW zmm zmm k zmm
// VPAVGW zmm zmm zmm
//
// Construct and append a VPAVGW instruction to the active function.
// Operates on the global context.
func VPAVGW(ops ...operand.Op) { ctx.VPAVGW(ops...) }
// VPAVGW_Z: Average Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGW.Z m128 xmm k xmm
// VPAVGW.Z m256 ymm k ymm
// VPAVGW.Z xmm xmm k xmm
// VPAVGW.Z ymm ymm k ymm
// VPAVGW.Z m512 zmm k zmm
// VPAVGW.Z zmm zmm k zmm
//
// Construct and append a VPAVGW.Z instruction to the active function.
func (c *Context) VPAVGW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPAVGW_Z(mxyz, xyz, k, xyz1))
}
// VPAVGW_Z: Average Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGW.Z m128 xmm k xmm
// VPAVGW.Z m256 ymm k ymm
// VPAVGW.Z xmm xmm k xmm
// VPAVGW.Z ymm ymm k ymm
// VPAVGW.Z m512 zmm k zmm
// VPAVGW.Z zmm zmm k zmm
//
// Construct and append a VPAVGW.Z instruction to the active function.
// Operates on the global context.
func VPAVGW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPAVGW_Z(mxyz, xyz, k, xyz1) }
// VPBLENDD: Blend Packed Doublewords.
//
// Forms:
//
// VPBLENDD imm8 m128 xmm xmm
// VPBLENDD imm8 m256 ymm ymm
// VPBLENDD imm8 xmm xmm xmm
// VPBLENDD imm8 ymm ymm ymm
//
// Construct and append a VPBLENDD instruction to the active function.
func (c *Context) VPBLENDD(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPBLENDD(i, mxy, xy, xy1))
}
// VPBLENDD: Blend Packed Doublewords.
//
// Forms:
//
// VPBLENDD imm8 m128 xmm xmm
// VPBLENDD imm8 m256 ymm ymm
// VPBLENDD imm8 xmm xmm xmm
// VPBLENDD imm8 ymm ymm ymm
//
// Construct and append a VPBLENDD instruction to the active function.
// Operates on the global context.
func VPBLENDD(i, mxy, xy, xy1 operand.Op) { ctx.VPBLENDD(i, mxy, xy, xy1) }
// VPBLENDMB: Blend Byte Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMB m128 xmm k xmm
// VPBLENDMB m128 xmm xmm
// VPBLENDMB m256 ymm k ymm
// VPBLENDMB m256 ymm ymm
// VPBLENDMB xmm xmm k xmm
// VPBLENDMB xmm xmm xmm
// VPBLENDMB ymm ymm k ymm
// VPBLENDMB ymm ymm ymm
// VPBLENDMB m512 zmm k zmm
// VPBLENDMB m512 zmm zmm
// VPBLENDMB zmm zmm k zmm
// VPBLENDMB zmm zmm zmm
//
// Construct and append a VPBLENDMB instruction to the active function.
func (c *Context) VPBLENDMB(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMB(ops...))
}
// VPBLENDMB: Blend Byte Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMB m128 xmm k xmm
// VPBLENDMB m128 xmm xmm
// VPBLENDMB m256 ymm k ymm
// VPBLENDMB m256 ymm ymm
// VPBLENDMB xmm xmm k xmm
// VPBLENDMB xmm xmm xmm
// VPBLENDMB ymm ymm k ymm
// VPBLENDMB ymm ymm ymm
// VPBLENDMB m512 zmm k zmm
// VPBLENDMB m512 zmm zmm
// VPBLENDMB zmm zmm k zmm
// VPBLENDMB zmm zmm zmm
//
// Construct and append a VPBLENDMB instruction to the active function.
// Operates on the global context.
func VPBLENDMB(ops ...operand.Op) { ctx.VPBLENDMB(ops...) }
// VPBLENDMB_Z: Blend Byte Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMB.Z m128 xmm k xmm
// VPBLENDMB.Z m256 ymm k ymm
// VPBLENDMB.Z xmm xmm k xmm
// VPBLENDMB.Z ymm ymm k ymm
// VPBLENDMB.Z m512 zmm k zmm
// VPBLENDMB.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMB.Z instruction to the active function.
func (c *Context) VPBLENDMB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMB_Z(mxyz, xyz, k, xyz1))
}
// VPBLENDMB_Z: Blend Byte Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMB.Z m128 xmm k xmm
// VPBLENDMB.Z m256 ymm k ymm
// VPBLENDMB.Z xmm xmm k xmm
// VPBLENDMB.Z ymm ymm k ymm
// VPBLENDMB.Z m512 zmm k zmm
// VPBLENDMB.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMB.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMB_Z(mxyz, xyz, k, xyz1) }
// VPBLENDMD: Blend Doubleword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMD m128 xmm k xmm
// VPBLENDMD m128 xmm xmm
// VPBLENDMD m256 ymm k ymm
// VPBLENDMD m256 ymm ymm
// VPBLENDMD xmm xmm k xmm
// VPBLENDMD xmm xmm xmm
// VPBLENDMD ymm ymm k ymm
// VPBLENDMD ymm ymm ymm
// VPBLENDMD m512 zmm k zmm
// VPBLENDMD m512 zmm zmm
// VPBLENDMD zmm zmm k zmm
// VPBLENDMD zmm zmm zmm
//
// Construct and append a VPBLENDMD instruction to the active function.
func (c *Context) VPBLENDMD(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMD(ops...))
}
// VPBLENDMD: Blend Doubleword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMD m128 xmm k xmm
// VPBLENDMD m128 xmm xmm
// VPBLENDMD m256 ymm k ymm
// VPBLENDMD m256 ymm ymm
// VPBLENDMD xmm xmm k xmm
// VPBLENDMD xmm xmm xmm
// VPBLENDMD ymm ymm k ymm
// VPBLENDMD ymm ymm ymm
// VPBLENDMD m512 zmm k zmm
// VPBLENDMD m512 zmm zmm
// VPBLENDMD zmm zmm k zmm
// VPBLENDMD zmm zmm zmm
//
// Construct and append a VPBLENDMD instruction to the active function.
// Operates on the global context.
func VPBLENDMD(ops ...operand.Op) { ctx.VPBLENDMD(ops...) }
// VPBLENDMD_BCST: Blend Doubleword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMD.BCST m32 xmm k xmm
// VPBLENDMD.BCST m32 xmm xmm
// VPBLENDMD.BCST m32 ymm k ymm
// VPBLENDMD.BCST m32 ymm ymm
// VPBLENDMD.BCST m32 zmm k zmm
// VPBLENDMD.BCST m32 zmm zmm
//
// Construct and append a VPBLENDMD.BCST instruction to the active function.
func (c *Context) VPBLENDMD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMD_BCST(ops...))
}
// VPBLENDMD_BCST: Blend Doubleword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMD.BCST m32 xmm k xmm
// VPBLENDMD.BCST m32 xmm xmm
// VPBLENDMD.BCST m32 ymm k ymm
// VPBLENDMD.BCST m32 ymm ymm
// VPBLENDMD.BCST m32 zmm k zmm
// VPBLENDMD.BCST m32 zmm zmm
//
// Construct and append a VPBLENDMD.BCST instruction to the active function.
// Operates on the global context.
func VPBLENDMD_BCST(ops ...operand.Op) { ctx.VPBLENDMD_BCST(ops...) }
// VPBLENDMD_BCST_Z: Blend Doubleword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.BCST.Z m32 xmm k xmm
// VPBLENDMD.BCST.Z m32 ymm k ymm
// VPBLENDMD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPBLENDMD.BCST.Z instruction to the active function.
func (c *Context) VPBLENDMD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMD_BCST_Z(m, xyz, k, xyz1))
}
// VPBLENDMD_BCST_Z: Blend Doubleword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.BCST.Z m32 xmm k xmm
// VPBLENDMD.BCST.Z m32 ymm k ymm
// VPBLENDMD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPBLENDMD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMD_BCST_Z(m, xyz, k, xyz1) }
// VPBLENDMD_Z: Blend Doubleword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.Z m128 xmm k xmm
// VPBLENDMD.Z m256 ymm k ymm
// VPBLENDMD.Z xmm xmm k xmm
// VPBLENDMD.Z ymm ymm k ymm
// VPBLENDMD.Z m512 zmm k zmm
// VPBLENDMD.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMD.Z instruction to the active function.
func (c *Context) VPBLENDMD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMD_Z(mxyz, xyz, k, xyz1))
}
// VPBLENDMD_Z: Blend Doubleword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.Z m128 xmm k xmm
// VPBLENDMD.Z m256 ymm k ymm
// VPBLENDMD.Z xmm xmm k xmm
// VPBLENDMD.Z ymm ymm k ymm
// VPBLENDMD.Z m512 zmm k zmm
// VPBLENDMD.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMD.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMD_Z(mxyz, xyz, k, xyz1) }
// VPBLENDMQ: Blend Quadword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMQ m128 xmm k xmm
// VPBLENDMQ m128 xmm xmm
// VPBLENDMQ m256 ymm k ymm
// VPBLENDMQ m256 ymm ymm
// VPBLENDMQ xmm xmm k xmm
// VPBLENDMQ xmm xmm xmm
// VPBLENDMQ ymm ymm k ymm
// VPBLENDMQ ymm ymm ymm
// VPBLENDMQ m512 zmm k zmm
// VPBLENDMQ m512 zmm zmm
// VPBLENDMQ zmm zmm k zmm
// VPBLENDMQ zmm zmm zmm
//
// Construct and append a VPBLENDMQ instruction to the active function.
func (c *Context) VPBLENDMQ(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMQ(ops...))
}
// VPBLENDMQ: Blend Quadword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMQ m128 xmm k xmm
// VPBLENDMQ m128 xmm xmm
// VPBLENDMQ m256 ymm k ymm
// VPBLENDMQ m256 ymm ymm
// VPBLENDMQ xmm xmm k xmm
// VPBLENDMQ xmm xmm xmm
// VPBLENDMQ ymm ymm k ymm
// VPBLENDMQ ymm ymm ymm
// VPBLENDMQ m512 zmm k zmm
// VPBLENDMQ m512 zmm zmm
// VPBLENDMQ zmm zmm k zmm
// VPBLENDMQ zmm zmm zmm
//
// Construct and append a VPBLENDMQ instruction to the active function.
// Operates on the global context.
func VPBLENDMQ(ops ...operand.Op) { ctx.VPBLENDMQ(ops...) }
// VPBLENDMQ_BCST: Blend Quadword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMQ.BCST m64 xmm k xmm
// VPBLENDMQ.BCST m64 xmm xmm
// VPBLENDMQ.BCST m64 ymm k ymm
// VPBLENDMQ.BCST m64 ymm ymm
// VPBLENDMQ.BCST m64 zmm k zmm
// VPBLENDMQ.BCST m64 zmm zmm
//
// Construct and append a VPBLENDMQ.BCST instruction to the active function.
func (c *Context) VPBLENDMQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMQ_BCST(ops...))
}
// VPBLENDMQ_BCST: Blend Quadword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMQ.BCST m64 xmm k xmm
// VPBLENDMQ.BCST m64 xmm xmm
// VPBLENDMQ.BCST m64 ymm k ymm
// VPBLENDMQ.BCST m64 ymm ymm
// VPBLENDMQ.BCST m64 zmm k zmm
// VPBLENDMQ.BCST m64 zmm zmm
//
// Construct and append a VPBLENDMQ.BCST instruction to the active function.
// Operates on the global context.
func VPBLENDMQ_BCST(ops ...operand.Op) { ctx.VPBLENDMQ_BCST(ops...) }
// VPBLENDMQ_BCST_Z: Blend Quadword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.BCST.Z m64 xmm k xmm
// VPBLENDMQ.BCST.Z m64 ymm k ymm
// VPBLENDMQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPBLENDMQ.BCST.Z instruction to the active function.
func (c *Context) VPBLENDMQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMQ_BCST_Z(m, xyz, k, xyz1))
}
// VPBLENDMQ_BCST_Z: Blend Quadword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.BCST.Z m64 xmm k xmm
// VPBLENDMQ.BCST.Z m64 ymm k ymm
// VPBLENDMQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPBLENDMQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMQ_BCST_Z(m, xyz, k, xyz1) }
// VPBLENDMQ_Z: Blend Quadword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.Z m128 xmm k xmm
// VPBLENDMQ.Z m256 ymm k ymm
// VPBLENDMQ.Z xmm xmm k xmm
// VPBLENDMQ.Z ymm ymm k ymm
// VPBLENDMQ.Z m512 zmm k zmm
// VPBLENDMQ.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMQ.Z instruction to the active function.
func (c *Context) VPBLENDMQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMQ_Z(mxyz, xyz, k, xyz1))
}
// VPBLENDMQ_Z: Blend Quadword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.Z m128 xmm k xmm
// VPBLENDMQ.Z m256 ymm k ymm
// VPBLENDMQ.Z xmm xmm k xmm
// VPBLENDMQ.Z ymm ymm k ymm
// VPBLENDMQ.Z m512 zmm k zmm
// VPBLENDMQ.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMQ.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMQ_Z(mxyz, xyz, k, xyz1) }
// VPBLENDMW: Blend Word Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMW m128 xmm k xmm
// VPBLENDMW m128 xmm xmm
// VPBLENDMW m256 ymm k ymm
// VPBLENDMW m256 ymm ymm
// VPBLENDMW xmm xmm k xmm
// VPBLENDMW xmm xmm xmm
// VPBLENDMW ymm ymm k ymm
// VPBLENDMW ymm ymm ymm
// VPBLENDMW m512 zmm k zmm
// VPBLENDMW m512 zmm zmm
// VPBLENDMW zmm zmm k zmm
// VPBLENDMW zmm zmm zmm
//
// Construct and append a VPBLENDMW instruction to the active function.
func (c *Context) VPBLENDMW(ops ...operand.Op) {
c.addinstruction(x86.VPBLENDMW(ops...))
}
// VPBLENDMW: Blend Word Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMW m128 xmm k xmm
// VPBLENDMW m128 xmm xmm
// VPBLENDMW m256 ymm k ymm
// VPBLENDMW m256 ymm ymm
// VPBLENDMW xmm xmm k xmm
// VPBLENDMW xmm xmm xmm
// VPBLENDMW ymm ymm k ymm
// VPBLENDMW ymm ymm ymm
// VPBLENDMW m512 zmm k zmm
// VPBLENDMW m512 zmm zmm
// VPBLENDMW zmm zmm k zmm
// VPBLENDMW zmm zmm zmm
//
// Construct and append a VPBLENDMW instruction to the active function.
// Operates on the global context.
func VPBLENDMW(ops ...operand.Op) { ctx.VPBLENDMW(ops...) }
// VPBLENDMW_Z: Blend Word Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMW.Z m128 xmm k xmm
// VPBLENDMW.Z m256 ymm k ymm
// VPBLENDMW.Z xmm xmm k xmm
// VPBLENDMW.Z ymm ymm k ymm
// VPBLENDMW.Z m512 zmm k zmm
// VPBLENDMW.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMW.Z instruction to the active function.
func (c *Context) VPBLENDMW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPBLENDMW_Z(mxyz, xyz, k, xyz1))
}
// VPBLENDMW_Z: Blend Word Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMW.Z m128 xmm k xmm
// VPBLENDMW.Z m256 ymm k ymm
// VPBLENDMW.Z xmm xmm k xmm
// VPBLENDMW.Z ymm ymm k ymm
// VPBLENDMW.Z m512 zmm k zmm
// VPBLENDMW.Z zmm zmm k zmm
//
// Construct and append a VPBLENDMW.Z instruction to the active function.
// Operates on the global context.
func VPBLENDMW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPBLENDMW_Z(mxyz, xyz, k, xyz1) }
// VPBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// VPBLENDVB ymm m256 ymm ymm
// VPBLENDVB ymm ymm ymm ymm
// VPBLENDVB xmm m128 xmm xmm
// VPBLENDVB xmm xmm xmm xmm
//
// Construct and append a VPBLENDVB instruction to the active function.
func (c *Context) VPBLENDVB(xy, mxy, xy1, xy2 operand.Op) {
c.addinstruction(x86.VPBLENDVB(xy, mxy, xy1, xy2))
}
// VPBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// VPBLENDVB ymm m256 ymm ymm
// VPBLENDVB ymm ymm ymm ymm
// VPBLENDVB xmm m128 xmm xmm
// VPBLENDVB xmm xmm xmm xmm
//
// Construct and append a VPBLENDVB instruction to the active function.
// Operates on the global context.
func VPBLENDVB(xy, mxy, xy1, xy2 operand.Op) { ctx.VPBLENDVB(xy, mxy, xy1, xy2) }
// VPBLENDW: Blend Packed Words.
//
// Forms:
//
// VPBLENDW imm8 m256 ymm ymm
// VPBLENDW imm8 ymm ymm ymm
// VPBLENDW imm8 m128 xmm xmm
// VPBLENDW imm8 xmm xmm xmm
//
// Construct and append a VPBLENDW instruction to the active function.
func (c *Context) VPBLENDW(i, mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPBLENDW(i, mxy, xy, xy1))
}
// VPBLENDW: Blend Packed Words.
//
// Forms:
//
// VPBLENDW imm8 m256 ymm ymm
// VPBLENDW imm8 ymm ymm ymm
// VPBLENDW imm8 m128 xmm xmm
// VPBLENDW imm8 xmm xmm xmm
//
// Construct and append a VPBLENDW instruction to the active function.
// Operates on the global context.
func VPBLENDW(i, mxy, xy, xy1 operand.Op) { ctx.VPBLENDW(i, mxy, xy, xy1) }
// VPBROADCASTB: Broadcast Byte Integer.
//
// Forms:
//
// VPBROADCASTB m8 xmm
// VPBROADCASTB m8 ymm
// VPBROADCASTB xmm xmm
// VPBROADCASTB xmm ymm
// VPBROADCASTB m8 k xmm
// VPBROADCASTB m8 k ymm
// VPBROADCASTB r32 k xmm
// VPBROADCASTB r32 k ymm
// VPBROADCASTB r32 xmm
// VPBROADCASTB r32 ymm
// VPBROADCASTB xmm k xmm
// VPBROADCASTB xmm k ymm
// VPBROADCASTB m8 k zmm
// VPBROADCASTB m8 zmm
// VPBROADCASTB r32 k zmm
// VPBROADCASTB r32 zmm
// VPBROADCASTB xmm k zmm
// VPBROADCASTB xmm zmm
//
// Construct and append a VPBROADCASTB instruction to the active function.
func (c *Context) VPBROADCASTB(ops ...operand.Op) {
c.addinstruction(x86.VPBROADCASTB(ops...))
}
// VPBROADCASTB: Broadcast Byte Integer.
//
// Forms:
//
// VPBROADCASTB m8 xmm
// VPBROADCASTB m8 ymm
// VPBROADCASTB xmm xmm
// VPBROADCASTB xmm ymm
// VPBROADCASTB m8 k xmm
// VPBROADCASTB m8 k ymm
// VPBROADCASTB r32 k xmm
// VPBROADCASTB r32 k ymm
// VPBROADCASTB r32 xmm
// VPBROADCASTB r32 ymm
// VPBROADCASTB xmm k xmm
// VPBROADCASTB xmm k ymm
// VPBROADCASTB m8 k zmm
// VPBROADCASTB m8 zmm
// VPBROADCASTB r32 k zmm
// VPBROADCASTB r32 zmm
// VPBROADCASTB xmm k zmm
// VPBROADCASTB xmm zmm
//
// Construct and append a VPBROADCASTB instruction to the active function.
// Operates on the global context.
func VPBROADCASTB(ops ...operand.Op) { ctx.VPBROADCASTB(ops...) }
// VPBROADCASTB_Z: Broadcast Byte Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTB.Z m8 k xmm
// VPBROADCASTB.Z m8 k ymm
// VPBROADCASTB.Z r32 k xmm
// VPBROADCASTB.Z r32 k ymm
// VPBROADCASTB.Z xmm k xmm
// VPBROADCASTB.Z xmm k ymm
// VPBROADCASTB.Z m8 k zmm
// VPBROADCASTB.Z r32 k zmm
// VPBROADCASTB.Z xmm k zmm
//
// Construct and append a VPBROADCASTB.Z instruction to the active function.
func (c *Context) VPBROADCASTB_Z(mrx, k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTB_Z(mrx, k, xyz))
}
// VPBROADCASTB_Z: Broadcast Byte Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTB.Z m8 k xmm
// VPBROADCASTB.Z m8 k ymm
// VPBROADCASTB.Z r32 k xmm
// VPBROADCASTB.Z r32 k ymm
// VPBROADCASTB.Z xmm k xmm
// VPBROADCASTB.Z xmm k ymm
// VPBROADCASTB.Z m8 k zmm
// VPBROADCASTB.Z r32 k zmm
// VPBROADCASTB.Z xmm k zmm
//
// Construct and append a VPBROADCASTB.Z instruction to the active function.
// Operates on the global context.
func VPBROADCASTB_Z(mrx, k, xyz operand.Op) { ctx.VPBROADCASTB_Z(mrx, k, xyz) }
// VPBROADCASTD: Broadcast Doubleword Integer.
//
// Forms:
//
// VPBROADCASTD m32 xmm
// VPBROADCASTD m32 ymm
// VPBROADCASTD xmm xmm
// VPBROADCASTD xmm ymm
// VPBROADCASTD m32 k xmm
// VPBROADCASTD m32 k ymm
// VPBROADCASTD r32 k xmm
// VPBROADCASTD r32 k ymm
// VPBROADCASTD r32 xmm
// VPBROADCASTD r32 ymm
// VPBROADCASTD xmm k xmm
// VPBROADCASTD xmm k ymm
// VPBROADCASTD m32 k zmm
// VPBROADCASTD m32 zmm
// VPBROADCASTD r32 k zmm
// VPBROADCASTD r32 zmm
// VPBROADCASTD xmm k zmm
// VPBROADCASTD xmm zmm
//
// Construct and append a VPBROADCASTD instruction to the active function.
func (c *Context) VPBROADCASTD(ops ...operand.Op) {
c.addinstruction(x86.VPBROADCASTD(ops...))
}
// VPBROADCASTD: Broadcast Doubleword Integer.
//
// Forms:
//
// VPBROADCASTD m32 xmm
// VPBROADCASTD m32 ymm
// VPBROADCASTD xmm xmm
// VPBROADCASTD xmm ymm
// VPBROADCASTD m32 k xmm
// VPBROADCASTD m32 k ymm
// VPBROADCASTD r32 k xmm
// VPBROADCASTD r32 k ymm
// VPBROADCASTD r32 xmm
// VPBROADCASTD r32 ymm
// VPBROADCASTD xmm k xmm
// VPBROADCASTD xmm k ymm
// VPBROADCASTD m32 k zmm
// VPBROADCASTD m32 zmm
// VPBROADCASTD r32 k zmm
// VPBROADCASTD r32 zmm
// VPBROADCASTD xmm k zmm
// VPBROADCASTD xmm zmm
//
// Construct and append a VPBROADCASTD instruction to the active function.
// Operates on the global context.
func VPBROADCASTD(ops ...operand.Op) { ctx.VPBROADCASTD(ops...) }
// VPBROADCASTD_Z: Broadcast Doubleword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTD.Z m32 k xmm
// VPBROADCASTD.Z m32 k ymm
// VPBROADCASTD.Z r32 k xmm
// VPBROADCASTD.Z r32 k ymm
// VPBROADCASTD.Z xmm k xmm
// VPBROADCASTD.Z xmm k ymm
// VPBROADCASTD.Z m32 k zmm
// VPBROADCASTD.Z r32 k zmm
// VPBROADCASTD.Z xmm k zmm
//
// Construct and append a VPBROADCASTD.Z instruction to the active function.
func (c *Context) VPBROADCASTD_Z(mrx, k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTD_Z(mrx, k, xyz))
}
// VPBROADCASTD_Z: Broadcast Doubleword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTD.Z m32 k xmm
// VPBROADCASTD.Z m32 k ymm
// VPBROADCASTD.Z r32 k xmm
// VPBROADCASTD.Z r32 k ymm
// VPBROADCASTD.Z xmm k xmm
// VPBROADCASTD.Z xmm k ymm
// VPBROADCASTD.Z m32 k zmm
// VPBROADCASTD.Z r32 k zmm
// VPBROADCASTD.Z xmm k zmm
//
// Construct and append a VPBROADCASTD.Z instruction to the active function.
// Operates on the global context.
func VPBROADCASTD_Z(mrx, k, xyz operand.Op) { ctx.VPBROADCASTD_Z(mrx, k, xyz) }
// VPBROADCASTMB2Q: Broadcast Low Byte of Mask Register to Packed Quadword Values.
//
// Forms:
//
// VPBROADCASTMB2Q k xmm
// VPBROADCASTMB2Q k ymm
// VPBROADCASTMB2Q k zmm
//
// Construct and append a VPBROADCASTMB2Q instruction to the active function.
func (c *Context) VPBROADCASTMB2Q(k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTMB2Q(k, xyz))
}
// VPBROADCASTMB2Q: Broadcast Low Byte of Mask Register to Packed Quadword Values.
//
// Forms:
//
// VPBROADCASTMB2Q k xmm
// VPBROADCASTMB2Q k ymm
// VPBROADCASTMB2Q k zmm
//
// Construct and append a VPBROADCASTMB2Q instruction to the active function.
// Operates on the global context.
func VPBROADCASTMB2Q(k, xyz operand.Op) { ctx.VPBROADCASTMB2Q(k, xyz) }
// VPBROADCASTMW2D: Broadcast Low Word of Mask Register to Packed Doubleword Values.
//
// Forms:
//
// VPBROADCASTMW2D k xmm
// VPBROADCASTMW2D k ymm
// VPBROADCASTMW2D k zmm
//
// Construct and append a VPBROADCASTMW2D instruction to the active function.
func (c *Context) VPBROADCASTMW2D(k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTMW2D(k, xyz))
}
// VPBROADCASTMW2D: Broadcast Low Word of Mask Register to Packed Doubleword Values.
//
// Forms:
//
// VPBROADCASTMW2D k xmm
// VPBROADCASTMW2D k ymm
// VPBROADCASTMW2D k zmm
//
// Construct and append a VPBROADCASTMW2D instruction to the active function.
// Operates on the global context.
func VPBROADCASTMW2D(k, xyz operand.Op) { ctx.VPBROADCASTMW2D(k, xyz) }
// VPBROADCASTQ: Broadcast Quadword Integer.
//
// Forms:
//
// VPBROADCASTQ m64 xmm
// VPBROADCASTQ m64 ymm
// VPBROADCASTQ xmm xmm
// VPBROADCASTQ xmm ymm
// VPBROADCASTQ m64 k xmm
// VPBROADCASTQ m64 k ymm
// VPBROADCASTQ r64 k xmm
// VPBROADCASTQ r64 k ymm
// VPBROADCASTQ r64 xmm
// VPBROADCASTQ r64 ymm
// VPBROADCASTQ xmm k xmm
// VPBROADCASTQ xmm k ymm
// VPBROADCASTQ m64 k zmm
// VPBROADCASTQ m64 zmm
// VPBROADCASTQ r64 k zmm
// VPBROADCASTQ r64 zmm
// VPBROADCASTQ xmm k zmm
// VPBROADCASTQ xmm zmm
//
// Construct and append a VPBROADCASTQ instruction to the active function.
func (c *Context) VPBROADCASTQ(ops ...operand.Op) {
c.addinstruction(x86.VPBROADCASTQ(ops...))
}
// VPBROADCASTQ: Broadcast Quadword Integer.
//
// Forms:
//
// VPBROADCASTQ m64 xmm
// VPBROADCASTQ m64 ymm
// VPBROADCASTQ xmm xmm
// VPBROADCASTQ xmm ymm
// VPBROADCASTQ m64 k xmm
// VPBROADCASTQ m64 k ymm
// VPBROADCASTQ r64 k xmm
// VPBROADCASTQ r64 k ymm
// VPBROADCASTQ r64 xmm
// VPBROADCASTQ r64 ymm
// VPBROADCASTQ xmm k xmm
// VPBROADCASTQ xmm k ymm
// VPBROADCASTQ m64 k zmm
// VPBROADCASTQ m64 zmm
// VPBROADCASTQ r64 k zmm
// VPBROADCASTQ r64 zmm
// VPBROADCASTQ xmm k zmm
// VPBROADCASTQ xmm zmm
//
// Construct and append a VPBROADCASTQ instruction to the active function.
// Operates on the global context.
func VPBROADCASTQ(ops ...operand.Op) { ctx.VPBROADCASTQ(ops...) }
// VPBROADCASTQ_Z: Broadcast Quadword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTQ.Z m64 k xmm
// VPBROADCASTQ.Z m64 k ymm
// VPBROADCASTQ.Z r64 k xmm
// VPBROADCASTQ.Z r64 k ymm
// VPBROADCASTQ.Z xmm k xmm
// VPBROADCASTQ.Z xmm k ymm
// VPBROADCASTQ.Z m64 k zmm
// VPBROADCASTQ.Z r64 k zmm
// VPBROADCASTQ.Z xmm k zmm
//
// Construct and append a VPBROADCASTQ.Z instruction to the active function.
func (c *Context) VPBROADCASTQ_Z(mrx, k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTQ_Z(mrx, k, xyz))
}
// VPBROADCASTQ_Z: Broadcast Quadword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTQ.Z m64 k xmm
// VPBROADCASTQ.Z m64 k ymm
// VPBROADCASTQ.Z r64 k xmm
// VPBROADCASTQ.Z r64 k ymm
// VPBROADCASTQ.Z xmm k xmm
// VPBROADCASTQ.Z xmm k ymm
// VPBROADCASTQ.Z m64 k zmm
// VPBROADCASTQ.Z r64 k zmm
// VPBROADCASTQ.Z xmm k zmm
//
// Construct and append a VPBROADCASTQ.Z instruction to the active function.
// Operates on the global context.
func VPBROADCASTQ_Z(mrx, k, xyz operand.Op) { ctx.VPBROADCASTQ_Z(mrx, k, xyz) }
// VPBROADCASTW: Broadcast Word Integer.
//
// Forms:
//
// VPBROADCASTW m16 xmm
// VPBROADCASTW m16 ymm
// VPBROADCASTW xmm xmm
// VPBROADCASTW xmm ymm
// VPBROADCASTW m16 k xmm
// VPBROADCASTW m16 k ymm
// VPBROADCASTW r32 k xmm
// VPBROADCASTW r32 k ymm
// VPBROADCASTW r32 xmm
// VPBROADCASTW r32 ymm
// VPBROADCASTW xmm k xmm
// VPBROADCASTW xmm k ymm
// VPBROADCASTW m16 k zmm
// VPBROADCASTW m16 zmm
// VPBROADCASTW r32 k zmm
// VPBROADCASTW r32 zmm
// VPBROADCASTW xmm k zmm
// VPBROADCASTW xmm zmm
//
// Construct and append a VPBROADCASTW instruction to the active function.
func (c *Context) VPBROADCASTW(ops ...operand.Op) {
c.addinstruction(x86.VPBROADCASTW(ops...))
}
// VPBROADCASTW: Broadcast Word Integer.
//
// Forms:
//
// VPBROADCASTW m16 xmm
// VPBROADCASTW m16 ymm
// VPBROADCASTW xmm xmm
// VPBROADCASTW xmm ymm
// VPBROADCASTW m16 k xmm
// VPBROADCASTW m16 k ymm
// VPBROADCASTW r32 k xmm
// VPBROADCASTW r32 k ymm
// VPBROADCASTW r32 xmm
// VPBROADCASTW r32 ymm
// VPBROADCASTW xmm k xmm
// VPBROADCASTW xmm k ymm
// VPBROADCASTW m16 k zmm
// VPBROADCASTW m16 zmm
// VPBROADCASTW r32 k zmm
// VPBROADCASTW r32 zmm
// VPBROADCASTW xmm k zmm
// VPBROADCASTW xmm zmm
//
// Construct and append a VPBROADCASTW instruction to the active function.
// Operates on the global context.
func VPBROADCASTW(ops ...operand.Op) { ctx.VPBROADCASTW(ops...) }
// VPBROADCASTW_Z: Broadcast Word Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTW.Z m16 k xmm
// VPBROADCASTW.Z m16 k ymm
// VPBROADCASTW.Z r32 k xmm
// VPBROADCASTW.Z r32 k ymm
// VPBROADCASTW.Z xmm k xmm
// VPBROADCASTW.Z xmm k ymm
// VPBROADCASTW.Z m16 k zmm
// VPBROADCASTW.Z r32 k zmm
// VPBROADCASTW.Z xmm k zmm
//
// Construct and append a VPBROADCASTW.Z instruction to the active function.
func (c *Context) VPBROADCASTW_Z(mrx, k, xyz operand.Op) {
c.addinstruction(x86.VPBROADCASTW_Z(mrx, k, xyz))
}
// VPBROADCASTW_Z: Broadcast Word Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTW.Z m16 k xmm
// VPBROADCASTW.Z m16 k ymm
// VPBROADCASTW.Z r32 k xmm
// VPBROADCASTW.Z r32 k ymm
// VPBROADCASTW.Z xmm k xmm
// VPBROADCASTW.Z xmm k ymm
// VPBROADCASTW.Z m16 k zmm
// VPBROADCASTW.Z r32 k zmm
// VPBROADCASTW.Z xmm k zmm
//
// Construct and append a VPBROADCASTW.Z instruction to the active function.
// Operates on the global context.
func VPBROADCASTW_Z(mrx, k, xyz operand.Op) { ctx.VPBROADCASTW_Z(mrx, k, xyz) }
// VPCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// VPCLMULQDQ imm8 m128 xmm xmm
// VPCLMULQDQ imm8 xmm xmm xmm
//
// Construct and append a VPCLMULQDQ instruction to the active function.
func (c *Context) VPCLMULQDQ(i, mx, x, x1 operand.Op) {
c.addinstruction(x86.VPCLMULQDQ(i, mx, x, x1))
}
// VPCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// VPCLMULQDQ imm8 m128 xmm xmm
// VPCLMULQDQ imm8 xmm xmm xmm
//
// Construct and append a VPCLMULQDQ instruction to the active function.
// Operates on the global context.
func VPCLMULQDQ(i, mx, x, x1 operand.Op) { ctx.VPCLMULQDQ(i, mx, x, x1) }
// VPCMPB: Compare Packed Signed Byte Values.
//
// Forms:
//
// VPCMPB imm8 m128 xmm k k
// VPCMPB imm8 m128 xmm k
// VPCMPB imm8 m256 ymm k k
// VPCMPB imm8 m256 ymm k
// VPCMPB imm8 xmm xmm k k
// VPCMPB imm8 xmm xmm k
// VPCMPB imm8 ymm ymm k k
// VPCMPB imm8 ymm ymm k
// VPCMPB imm8 m512 zmm k k
// VPCMPB imm8 m512 zmm k
// VPCMPB imm8 zmm zmm k k
// VPCMPB imm8 zmm zmm k
//
// Construct and append a VPCMPB instruction to the active function.
func (c *Context) VPCMPB(ops ...operand.Op) {
c.addinstruction(x86.VPCMPB(ops...))
}
// VPCMPB: Compare Packed Signed Byte Values.
//
// Forms:
//
// VPCMPB imm8 m128 xmm k k
// VPCMPB imm8 m128 xmm k
// VPCMPB imm8 m256 ymm k k
// VPCMPB imm8 m256 ymm k
// VPCMPB imm8 xmm xmm k k
// VPCMPB imm8 xmm xmm k
// VPCMPB imm8 ymm ymm k k
// VPCMPB imm8 ymm ymm k
// VPCMPB imm8 m512 zmm k k
// VPCMPB imm8 m512 zmm k
// VPCMPB imm8 zmm zmm k k
// VPCMPB imm8 zmm zmm k
//
// Construct and append a VPCMPB instruction to the active function.
// Operates on the global context.
func VPCMPB(ops ...operand.Op) { ctx.VPCMPB(ops...) }
// VPCMPD: Compare Packed Signed Doubleword Values.
//
// Forms:
//
// VPCMPD imm8 m128 xmm k k
// VPCMPD imm8 m128 xmm k
// VPCMPD imm8 m256 ymm k k
// VPCMPD imm8 m256 ymm k
// VPCMPD imm8 xmm xmm k k
// VPCMPD imm8 xmm xmm k
// VPCMPD imm8 ymm ymm k k
// VPCMPD imm8 ymm ymm k
// VPCMPD imm8 m512 zmm k k
// VPCMPD imm8 m512 zmm k
// VPCMPD imm8 zmm zmm k k
// VPCMPD imm8 zmm zmm k
//
// Construct and append a VPCMPD instruction to the active function.
func (c *Context) VPCMPD(ops ...operand.Op) {
c.addinstruction(x86.VPCMPD(ops...))
}
// VPCMPD: Compare Packed Signed Doubleword Values.
//
// Forms:
//
// VPCMPD imm8 m128 xmm k k
// VPCMPD imm8 m128 xmm k
// VPCMPD imm8 m256 ymm k k
// VPCMPD imm8 m256 ymm k
// VPCMPD imm8 xmm xmm k k
// VPCMPD imm8 xmm xmm k
// VPCMPD imm8 ymm ymm k k
// VPCMPD imm8 ymm ymm k
// VPCMPD imm8 m512 zmm k k
// VPCMPD imm8 m512 zmm k
// VPCMPD imm8 zmm zmm k k
// VPCMPD imm8 zmm zmm k
//
// Construct and append a VPCMPD instruction to the active function.
// Operates on the global context.
func VPCMPD(ops ...operand.Op) { ctx.VPCMPD(ops...) }
// VPCMPD_BCST: Compare Packed Signed Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPD.BCST imm8 m32 xmm k k
// VPCMPD.BCST imm8 m32 xmm k
// VPCMPD.BCST imm8 m32 ymm k k
// VPCMPD.BCST imm8 m32 ymm k
// VPCMPD.BCST imm8 m32 zmm k k
// VPCMPD.BCST imm8 m32 zmm k
//
// Construct and append a VPCMPD.BCST instruction to the active function.
func (c *Context) VPCMPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPD_BCST(ops...))
}
// VPCMPD_BCST: Compare Packed Signed Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPD.BCST imm8 m32 xmm k k
// VPCMPD.BCST imm8 m32 xmm k
// VPCMPD.BCST imm8 m32 ymm k k
// VPCMPD.BCST imm8 m32 ymm k
// VPCMPD.BCST imm8 m32 zmm k k
// VPCMPD.BCST imm8 m32 zmm k
//
// Construct and append a VPCMPD.BCST instruction to the active function.
// Operates on the global context.
func VPCMPD_BCST(ops ...operand.Op) { ctx.VPCMPD_BCST(ops...) }
// VPCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// VPCMPEQB m256 ymm ymm
// VPCMPEQB ymm ymm ymm
// VPCMPEQB m128 xmm xmm
// VPCMPEQB xmm xmm xmm
// VPCMPEQB m128 xmm k k
// VPCMPEQB m128 xmm k
// VPCMPEQB m256 ymm k k
// VPCMPEQB m256 ymm k
// VPCMPEQB xmm xmm k k
// VPCMPEQB xmm xmm k
// VPCMPEQB ymm ymm k k
// VPCMPEQB ymm ymm k
// VPCMPEQB m512 zmm k k
// VPCMPEQB m512 zmm k
// VPCMPEQB zmm zmm k k
// VPCMPEQB zmm zmm k
//
// Construct and append a VPCMPEQB instruction to the active function.
func (c *Context) VPCMPEQB(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQB(ops...))
}
// VPCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// VPCMPEQB m256 ymm ymm
// VPCMPEQB ymm ymm ymm
// VPCMPEQB m128 xmm xmm
// VPCMPEQB xmm xmm xmm
// VPCMPEQB m128 xmm k k
// VPCMPEQB m128 xmm k
// VPCMPEQB m256 ymm k k
// VPCMPEQB m256 ymm k
// VPCMPEQB xmm xmm k k
// VPCMPEQB xmm xmm k
// VPCMPEQB ymm ymm k k
// VPCMPEQB ymm ymm k
// VPCMPEQB m512 zmm k k
// VPCMPEQB m512 zmm k
// VPCMPEQB zmm zmm k k
// VPCMPEQB zmm zmm k
//
// Construct and append a VPCMPEQB instruction to the active function.
// Operates on the global context.
func VPCMPEQB(ops ...operand.Op) { ctx.VPCMPEQB(ops...) }
// VPCMPEQD: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// VPCMPEQD m256 ymm ymm
// VPCMPEQD ymm ymm ymm
// VPCMPEQD m128 xmm xmm
// VPCMPEQD xmm xmm xmm
// VPCMPEQD m128 xmm k k
// VPCMPEQD m128 xmm k
// VPCMPEQD m256 ymm k k
// VPCMPEQD m256 ymm k
// VPCMPEQD xmm xmm k k
// VPCMPEQD xmm xmm k
// VPCMPEQD ymm ymm k k
// VPCMPEQD ymm ymm k
// VPCMPEQD m512 zmm k k
// VPCMPEQD m512 zmm k
// VPCMPEQD zmm zmm k k
// VPCMPEQD zmm zmm k
//
// Construct and append a VPCMPEQD instruction to the active function.
func (c *Context) VPCMPEQD(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQD(ops...))
}
// VPCMPEQD: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// VPCMPEQD m256 ymm ymm
// VPCMPEQD ymm ymm ymm
// VPCMPEQD m128 xmm xmm
// VPCMPEQD xmm xmm xmm
// VPCMPEQD m128 xmm k k
// VPCMPEQD m128 xmm k
// VPCMPEQD m256 ymm k k
// VPCMPEQD m256 ymm k
// VPCMPEQD xmm xmm k k
// VPCMPEQD xmm xmm k
// VPCMPEQD ymm ymm k k
// VPCMPEQD ymm ymm k
// VPCMPEQD m512 zmm k k
// VPCMPEQD m512 zmm k
// VPCMPEQD zmm zmm k k
// VPCMPEQD zmm zmm k
//
// Construct and append a VPCMPEQD instruction to the active function.
// Operates on the global context.
func VPCMPEQD(ops ...operand.Op) { ctx.VPCMPEQD(ops...) }
// VPCMPEQD_BCST: Compare Packed Doubleword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQD.BCST m32 xmm k k
// VPCMPEQD.BCST m32 xmm k
// VPCMPEQD.BCST m32 ymm k k
// VPCMPEQD.BCST m32 ymm k
// VPCMPEQD.BCST m32 zmm k k
// VPCMPEQD.BCST m32 zmm k
//
// Construct and append a VPCMPEQD.BCST instruction to the active function.
func (c *Context) VPCMPEQD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQD_BCST(ops...))
}
// VPCMPEQD_BCST: Compare Packed Doubleword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQD.BCST m32 xmm k k
// VPCMPEQD.BCST m32 xmm k
// VPCMPEQD.BCST m32 ymm k k
// VPCMPEQD.BCST m32 ymm k
// VPCMPEQD.BCST m32 zmm k k
// VPCMPEQD.BCST m32 zmm k
//
// Construct and append a VPCMPEQD.BCST instruction to the active function.
// Operates on the global context.
func VPCMPEQD_BCST(ops ...operand.Op) { ctx.VPCMPEQD_BCST(ops...) }
// VPCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// VPCMPEQQ m256 ymm ymm
// VPCMPEQQ ymm ymm ymm
// VPCMPEQQ m128 xmm xmm
// VPCMPEQQ xmm xmm xmm
// VPCMPEQQ m128 xmm k k
// VPCMPEQQ m128 xmm k
// VPCMPEQQ m256 ymm k k
// VPCMPEQQ m256 ymm k
// VPCMPEQQ xmm xmm k k
// VPCMPEQQ xmm xmm k
// VPCMPEQQ ymm ymm k k
// VPCMPEQQ ymm ymm k
// VPCMPEQQ m512 zmm k k
// VPCMPEQQ m512 zmm k
// VPCMPEQQ zmm zmm k k
// VPCMPEQQ zmm zmm k
//
// Construct and append a VPCMPEQQ instruction to the active function.
func (c *Context) VPCMPEQQ(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQQ(ops...))
}
// VPCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// VPCMPEQQ m256 ymm ymm
// VPCMPEQQ ymm ymm ymm
// VPCMPEQQ m128 xmm xmm
// VPCMPEQQ xmm xmm xmm
// VPCMPEQQ m128 xmm k k
// VPCMPEQQ m128 xmm k
// VPCMPEQQ m256 ymm k k
// VPCMPEQQ m256 ymm k
// VPCMPEQQ xmm xmm k k
// VPCMPEQQ xmm xmm k
// VPCMPEQQ ymm ymm k k
// VPCMPEQQ ymm ymm k
// VPCMPEQQ m512 zmm k k
// VPCMPEQQ m512 zmm k
// VPCMPEQQ zmm zmm k k
// VPCMPEQQ zmm zmm k
//
// Construct and append a VPCMPEQQ instruction to the active function.
// Operates on the global context.
func VPCMPEQQ(ops ...operand.Op) { ctx.VPCMPEQQ(ops...) }
// VPCMPEQQ_BCST: Compare Packed Quadword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQQ.BCST m64 xmm k k
// VPCMPEQQ.BCST m64 xmm k
// VPCMPEQQ.BCST m64 ymm k k
// VPCMPEQQ.BCST m64 ymm k
// VPCMPEQQ.BCST m64 zmm k k
// VPCMPEQQ.BCST m64 zmm k
//
// Construct and append a VPCMPEQQ.BCST instruction to the active function.
func (c *Context) VPCMPEQQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQQ_BCST(ops...))
}
// VPCMPEQQ_BCST: Compare Packed Quadword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQQ.BCST m64 xmm k k
// VPCMPEQQ.BCST m64 xmm k
// VPCMPEQQ.BCST m64 ymm k k
// VPCMPEQQ.BCST m64 ymm k
// VPCMPEQQ.BCST m64 zmm k k
// VPCMPEQQ.BCST m64 zmm k
//
// Construct and append a VPCMPEQQ.BCST instruction to the active function.
// Operates on the global context.
func VPCMPEQQ_BCST(ops ...operand.Op) { ctx.VPCMPEQQ_BCST(ops...) }
// VPCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// VPCMPEQW m256 ymm ymm
// VPCMPEQW ymm ymm ymm
// VPCMPEQW m128 xmm xmm
// VPCMPEQW xmm xmm xmm
// VPCMPEQW m128 xmm k k
// VPCMPEQW m128 xmm k
// VPCMPEQW m256 ymm k k
// VPCMPEQW m256 ymm k
// VPCMPEQW xmm xmm k k
// VPCMPEQW xmm xmm k
// VPCMPEQW ymm ymm k k
// VPCMPEQW ymm ymm k
// VPCMPEQW m512 zmm k k
// VPCMPEQW m512 zmm k
// VPCMPEQW zmm zmm k k
// VPCMPEQW zmm zmm k
//
// Construct and append a VPCMPEQW instruction to the active function.
func (c *Context) VPCMPEQW(ops ...operand.Op) {
c.addinstruction(x86.VPCMPEQW(ops...))
}
// VPCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// VPCMPEQW m256 ymm ymm
// VPCMPEQW ymm ymm ymm
// VPCMPEQW m128 xmm xmm
// VPCMPEQW xmm xmm xmm
// VPCMPEQW m128 xmm k k
// VPCMPEQW m128 xmm k
// VPCMPEQW m256 ymm k k
// VPCMPEQW m256 ymm k
// VPCMPEQW xmm xmm k k
// VPCMPEQW xmm xmm k
// VPCMPEQW ymm ymm k k
// VPCMPEQW ymm ymm k
// VPCMPEQW m512 zmm k k
// VPCMPEQW m512 zmm k
// VPCMPEQW zmm zmm k k
// VPCMPEQW zmm zmm k
//
// Construct and append a VPCMPEQW instruction to the active function.
// Operates on the global context.
func VPCMPEQW(ops ...operand.Op) { ctx.VPCMPEQW(ops...) }
// VPCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPESTRI imm8 m128 xmm
// VPCMPESTRI imm8 xmm xmm
//
// Construct and append a VPCMPESTRI instruction to the active function.
func (c *Context) VPCMPESTRI(i, mx, x operand.Op) {
c.addinstruction(x86.VPCMPESTRI(i, mx, x))
}
// VPCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPESTRI imm8 m128 xmm
// VPCMPESTRI imm8 xmm xmm
//
// Construct and append a VPCMPESTRI instruction to the active function.
// Operates on the global context.
func VPCMPESTRI(i, mx, x operand.Op) { ctx.VPCMPESTRI(i, mx, x) }
// VPCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPESTRM imm8 m128 xmm
// VPCMPESTRM imm8 xmm xmm
//
// Construct and append a VPCMPESTRM instruction to the active function.
func (c *Context) VPCMPESTRM(i, mx, x operand.Op) {
c.addinstruction(x86.VPCMPESTRM(i, mx, x))
}
// VPCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPESTRM imm8 m128 xmm
// VPCMPESTRM imm8 xmm xmm
//
// Construct and append a VPCMPESTRM instruction to the active function.
// Operates on the global context.
func VPCMPESTRM(i, mx, x operand.Op) { ctx.VPCMPESTRM(i, mx, x) }
// VPCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// VPCMPGTB m256 ymm ymm
// VPCMPGTB ymm ymm ymm
// VPCMPGTB m128 xmm xmm
// VPCMPGTB xmm xmm xmm
// VPCMPGTB m128 xmm k k
// VPCMPGTB m128 xmm k
// VPCMPGTB m256 ymm k k
// VPCMPGTB m256 ymm k
// VPCMPGTB xmm xmm k k
// VPCMPGTB xmm xmm k
// VPCMPGTB ymm ymm k k
// VPCMPGTB ymm ymm k
// VPCMPGTB m512 zmm k k
// VPCMPGTB m512 zmm k
// VPCMPGTB zmm zmm k k
// VPCMPGTB zmm zmm k
//
// Construct and append a VPCMPGTB instruction to the active function.
func (c *Context) VPCMPGTB(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTB(ops...))
}
// VPCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// VPCMPGTB m256 ymm ymm
// VPCMPGTB ymm ymm ymm
// VPCMPGTB m128 xmm xmm
// VPCMPGTB xmm xmm xmm
// VPCMPGTB m128 xmm k k
// VPCMPGTB m128 xmm k
// VPCMPGTB m256 ymm k k
// VPCMPGTB m256 ymm k
// VPCMPGTB xmm xmm k k
// VPCMPGTB xmm xmm k
// VPCMPGTB ymm ymm k k
// VPCMPGTB ymm ymm k
// VPCMPGTB m512 zmm k k
// VPCMPGTB m512 zmm k
// VPCMPGTB zmm zmm k k
// VPCMPGTB zmm zmm k
//
// Construct and append a VPCMPGTB instruction to the active function.
// Operates on the global context.
func VPCMPGTB(ops ...operand.Op) { ctx.VPCMPGTB(ops...) }
// VPCMPGTD: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// VPCMPGTD m256 ymm ymm
// VPCMPGTD ymm ymm ymm
// VPCMPGTD m128 xmm xmm
// VPCMPGTD xmm xmm xmm
// VPCMPGTD m128 xmm k k
// VPCMPGTD m128 xmm k
// VPCMPGTD m256 ymm k k
// VPCMPGTD m256 ymm k
// VPCMPGTD xmm xmm k k
// VPCMPGTD xmm xmm k
// VPCMPGTD ymm ymm k k
// VPCMPGTD ymm ymm k
// VPCMPGTD m512 zmm k k
// VPCMPGTD m512 zmm k
// VPCMPGTD zmm zmm k k
// VPCMPGTD zmm zmm k
//
// Construct and append a VPCMPGTD instruction to the active function.
func (c *Context) VPCMPGTD(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTD(ops...))
}
// VPCMPGTD: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// VPCMPGTD m256 ymm ymm
// VPCMPGTD ymm ymm ymm
// VPCMPGTD m128 xmm xmm
// VPCMPGTD xmm xmm xmm
// VPCMPGTD m128 xmm k k
// VPCMPGTD m128 xmm k
// VPCMPGTD m256 ymm k k
// VPCMPGTD m256 ymm k
// VPCMPGTD xmm xmm k k
// VPCMPGTD xmm xmm k
// VPCMPGTD ymm ymm k k
// VPCMPGTD ymm ymm k
// VPCMPGTD m512 zmm k k
// VPCMPGTD m512 zmm k
// VPCMPGTD zmm zmm k k
// VPCMPGTD zmm zmm k
//
// Construct and append a VPCMPGTD instruction to the active function.
// Operates on the global context.
func VPCMPGTD(ops ...operand.Op) { ctx.VPCMPGTD(ops...) }
// VPCMPGTD_BCST: Compare Packed Signed Doubleword Integers for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTD.BCST m32 xmm k k
// VPCMPGTD.BCST m32 xmm k
// VPCMPGTD.BCST m32 ymm k k
// VPCMPGTD.BCST m32 ymm k
// VPCMPGTD.BCST m32 zmm k k
// VPCMPGTD.BCST m32 zmm k
//
// Construct and append a VPCMPGTD.BCST instruction to the active function.
func (c *Context) VPCMPGTD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTD_BCST(ops...))
}
// VPCMPGTD_BCST: Compare Packed Signed Doubleword Integers for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTD.BCST m32 xmm k k
// VPCMPGTD.BCST m32 xmm k
// VPCMPGTD.BCST m32 ymm k k
// VPCMPGTD.BCST m32 ymm k
// VPCMPGTD.BCST m32 zmm k k
// VPCMPGTD.BCST m32 zmm k
//
// Construct and append a VPCMPGTD.BCST instruction to the active function.
// Operates on the global context.
func VPCMPGTD_BCST(ops ...operand.Op) { ctx.VPCMPGTD_BCST(ops...) }
// VPCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// VPCMPGTQ m256 ymm ymm
// VPCMPGTQ ymm ymm ymm
// VPCMPGTQ m128 xmm xmm
// VPCMPGTQ xmm xmm xmm
// VPCMPGTQ m128 xmm k k
// VPCMPGTQ m128 xmm k
// VPCMPGTQ m256 ymm k k
// VPCMPGTQ m256 ymm k
// VPCMPGTQ xmm xmm k k
// VPCMPGTQ xmm xmm k
// VPCMPGTQ ymm ymm k k
// VPCMPGTQ ymm ymm k
// VPCMPGTQ m512 zmm k k
// VPCMPGTQ m512 zmm k
// VPCMPGTQ zmm zmm k k
// VPCMPGTQ zmm zmm k
//
// Construct and append a VPCMPGTQ instruction to the active function.
func (c *Context) VPCMPGTQ(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTQ(ops...))
}
// VPCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// VPCMPGTQ m256 ymm ymm
// VPCMPGTQ ymm ymm ymm
// VPCMPGTQ m128 xmm xmm
// VPCMPGTQ xmm xmm xmm
// VPCMPGTQ m128 xmm k k
// VPCMPGTQ m128 xmm k
// VPCMPGTQ m256 ymm k k
// VPCMPGTQ m256 ymm k
// VPCMPGTQ xmm xmm k k
// VPCMPGTQ xmm xmm k
// VPCMPGTQ ymm ymm k k
// VPCMPGTQ ymm ymm k
// VPCMPGTQ m512 zmm k k
// VPCMPGTQ m512 zmm k
// VPCMPGTQ zmm zmm k k
// VPCMPGTQ zmm zmm k
//
// Construct and append a VPCMPGTQ instruction to the active function.
// Operates on the global context.
func VPCMPGTQ(ops ...operand.Op) { ctx.VPCMPGTQ(ops...) }
// VPCMPGTQ_BCST: Compare Packed Data for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTQ.BCST m64 xmm k k
// VPCMPGTQ.BCST m64 xmm k
// VPCMPGTQ.BCST m64 ymm k k
// VPCMPGTQ.BCST m64 ymm k
// VPCMPGTQ.BCST m64 zmm k k
// VPCMPGTQ.BCST m64 zmm k
//
// Construct and append a VPCMPGTQ.BCST instruction to the active function.
func (c *Context) VPCMPGTQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTQ_BCST(ops...))
}
// VPCMPGTQ_BCST: Compare Packed Data for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTQ.BCST m64 xmm k k
// VPCMPGTQ.BCST m64 xmm k
// VPCMPGTQ.BCST m64 ymm k k
// VPCMPGTQ.BCST m64 ymm k
// VPCMPGTQ.BCST m64 zmm k k
// VPCMPGTQ.BCST m64 zmm k
//
// Construct and append a VPCMPGTQ.BCST instruction to the active function.
// Operates on the global context.
func VPCMPGTQ_BCST(ops ...operand.Op) { ctx.VPCMPGTQ_BCST(ops...) }
// VPCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// VPCMPGTW m256 ymm ymm
// VPCMPGTW ymm ymm ymm
// VPCMPGTW m128 xmm xmm
// VPCMPGTW xmm xmm xmm
// VPCMPGTW m128 xmm k k
// VPCMPGTW m128 xmm k
// VPCMPGTW m256 ymm k k
// VPCMPGTW m256 ymm k
// VPCMPGTW xmm xmm k k
// VPCMPGTW xmm xmm k
// VPCMPGTW ymm ymm k k
// VPCMPGTW ymm ymm k
// VPCMPGTW m512 zmm k k
// VPCMPGTW m512 zmm k
// VPCMPGTW zmm zmm k k
// VPCMPGTW zmm zmm k
//
// Construct and append a VPCMPGTW instruction to the active function.
func (c *Context) VPCMPGTW(ops ...operand.Op) {
c.addinstruction(x86.VPCMPGTW(ops...))
}
// VPCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// VPCMPGTW m256 ymm ymm
// VPCMPGTW ymm ymm ymm
// VPCMPGTW m128 xmm xmm
// VPCMPGTW xmm xmm xmm
// VPCMPGTW m128 xmm k k
// VPCMPGTW m128 xmm k
// VPCMPGTW m256 ymm k k
// VPCMPGTW m256 ymm k
// VPCMPGTW xmm xmm k k
// VPCMPGTW xmm xmm k
// VPCMPGTW ymm ymm k k
// VPCMPGTW ymm ymm k
// VPCMPGTW m512 zmm k k
// VPCMPGTW m512 zmm k
// VPCMPGTW zmm zmm k k
// VPCMPGTW zmm zmm k
//
// Construct and append a VPCMPGTW instruction to the active function.
// Operates on the global context.
func VPCMPGTW(ops ...operand.Op) { ctx.VPCMPGTW(ops...) }
// VPCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPISTRI imm8 m128 xmm
// VPCMPISTRI imm8 xmm xmm
//
// Construct and append a VPCMPISTRI instruction to the active function.
func (c *Context) VPCMPISTRI(i, mx, x operand.Op) {
c.addinstruction(x86.VPCMPISTRI(i, mx, x))
}
// VPCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPISTRI imm8 m128 xmm
// VPCMPISTRI imm8 xmm xmm
//
// Construct and append a VPCMPISTRI instruction to the active function.
// Operates on the global context.
func VPCMPISTRI(i, mx, x operand.Op) { ctx.VPCMPISTRI(i, mx, x) }
// VPCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPISTRM imm8 m128 xmm
// VPCMPISTRM imm8 xmm xmm
//
// Construct and append a VPCMPISTRM instruction to the active function.
func (c *Context) VPCMPISTRM(i, mx, x operand.Op) {
c.addinstruction(x86.VPCMPISTRM(i, mx, x))
}
// VPCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPISTRM imm8 m128 xmm
// VPCMPISTRM imm8 xmm xmm
//
// Construct and append a VPCMPISTRM instruction to the active function.
// Operates on the global context.
func VPCMPISTRM(i, mx, x operand.Op) { ctx.VPCMPISTRM(i, mx, x) }
// VPCMPQ: Compare Packed Signed Quadword Values.
//
// Forms:
//
// VPCMPQ imm8 m128 xmm k k
// VPCMPQ imm8 m128 xmm k
// VPCMPQ imm8 m256 ymm k k
// VPCMPQ imm8 m256 ymm k
// VPCMPQ imm8 xmm xmm k k
// VPCMPQ imm8 xmm xmm k
// VPCMPQ imm8 ymm ymm k k
// VPCMPQ imm8 ymm ymm k
// VPCMPQ imm8 m512 zmm k k
// VPCMPQ imm8 m512 zmm k
// VPCMPQ imm8 zmm zmm k k
// VPCMPQ imm8 zmm zmm k
//
// Construct and append a VPCMPQ instruction to the active function.
func (c *Context) VPCMPQ(ops ...operand.Op) {
c.addinstruction(x86.VPCMPQ(ops...))
}
// VPCMPQ: Compare Packed Signed Quadword Values.
//
// Forms:
//
// VPCMPQ imm8 m128 xmm k k
// VPCMPQ imm8 m128 xmm k
// VPCMPQ imm8 m256 ymm k k
// VPCMPQ imm8 m256 ymm k
// VPCMPQ imm8 xmm xmm k k
// VPCMPQ imm8 xmm xmm k
// VPCMPQ imm8 ymm ymm k k
// VPCMPQ imm8 ymm ymm k
// VPCMPQ imm8 m512 zmm k k
// VPCMPQ imm8 m512 zmm k
// VPCMPQ imm8 zmm zmm k k
// VPCMPQ imm8 zmm zmm k
//
// Construct and append a VPCMPQ instruction to the active function.
// Operates on the global context.
func VPCMPQ(ops ...operand.Op) { ctx.VPCMPQ(ops...) }
// VPCMPQ_BCST: Compare Packed Signed Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPQ.BCST imm8 m64 xmm k k
// VPCMPQ.BCST imm8 m64 xmm k
// VPCMPQ.BCST imm8 m64 ymm k k
// VPCMPQ.BCST imm8 m64 ymm k
// VPCMPQ.BCST imm8 m64 zmm k k
// VPCMPQ.BCST imm8 m64 zmm k
//
// Construct and append a VPCMPQ.BCST instruction to the active function.
func (c *Context) VPCMPQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPQ_BCST(ops...))
}
// VPCMPQ_BCST: Compare Packed Signed Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPQ.BCST imm8 m64 xmm k k
// VPCMPQ.BCST imm8 m64 xmm k
// VPCMPQ.BCST imm8 m64 ymm k k
// VPCMPQ.BCST imm8 m64 ymm k
// VPCMPQ.BCST imm8 m64 zmm k k
// VPCMPQ.BCST imm8 m64 zmm k
//
// Construct and append a VPCMPQ.BCST instruction to the active function.
// Operates on the global context.
func VPCMPQ_BCST(ops ...operand.Op) { ctx.VPCMPQ_BCST(ops...) }
// VPCMPUB: Compare Packed Unsigned Byte Values.
//
// Forms:
//
// VPCMPUB imm8 m128 xmm k k
// VPCMPUB imm8 m128 xmm k
// VPCMPUB imm8 m256 ymm k k
// VPCMPUB imm8 m256 ymm k
// VPCMPUB imm8 xmm xmm k k
// VPCMPUB imm8 xmm xmm k
// VPCMPUB imm8 ymm ymm k k
// VPCMPUB imm8 ymm ymm k
// VPCMPUB imm8 m512 zmm k k
// VPCMPUB imm8 m512 zmm k
// VPCMPUB imm8 zmm zmm k k
// VPCMPUB imm8 zmm zmm k
//
// Construct and append a VPCMPUB instruction to the active function.
func (c *Context) VPCMPUB(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUB(ops...))
}
// VPCMPUB: Compare Packed Unsigned Byte Values.
//
// Forms:
//
// VPCMPUB imm8 m128 xmm k k
// VPCMPUB imm8 m128 xmm k
// VPCMPUB imm8 m256 ymm k k
// VPCMPUB imm8 m256 ymm k
// VPCMPUB imm8 xmm xmm k k
// VPCMPUB imm8 xmm xmm k
// VPCMPUB imm8 ymm ymm k k
// VPCMPUB imm8 ymm ymm k
// VPCMPUB imm8 m512 zmm k k
// VPCMPUB imm8 m512 zmm k
// VPCMPUB imm8 zmm zmm k k
// VPCMPUB imm8 zmm zmm k
//
// Construct and append a VPCMPUB instruction to the active function.
// Operates on the global context.
func VPCMPUB(ops ...operand.Op) { ctx.VPCMPUB(ops...) }
// VPCMPUD: Compare Packed Unsigned Doubleword Values.
//
// Forms:
//
// VPCMPUD imm8 m128 xmm k k
// VPCMPUD imm8 m128 xmm k
// VPCMPUD imm8 m256 ymm k k
// VPCMPUD imm8 m256 ymm k
// VPCMPUD imm8 xmm xmm k k
// VPCMPUD imm8 xmm xmm k
// VPCMPUD imm8 ymm ymm k k
// VPCMPUD imm8 ymm ymm k
// VPCMPUD imm8 m512 zmm k k
// VPCMPUD imm8 m512 zmm k
// VPCMPUD imm8 zmm zmm k k
// VPCMPUD imm8 zmm zmm k
//
// Construct and append a VPCMPUD instruction to the active function.
func (c *Context) VPCMPUD(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUD(ops...))
}
// VPCMPUD: Compare Packed Unsigned Doubleword Values.
//
// Forms:
//
// VPCMPUD imm8 m128 xmm k k
// VPCMPUD imm8 m128 xmm k
// VPCMPUD imm8 m256 ymm k k
// VPCMPUD imm8 m256 ymm k
// VPCMPUD imm8 xmm xmm k k
// VPCMPUD imm8 xmm xmm k
// VPCMPUD imm8 ymm ymm k k
// VPCMPUD imm8 ymm ymm k
// VPCMPUD imm8 m512 zmm k k
// VPCMPUD imm8 m512 zmm k
// VPCMPUD imm8 zmm zmm k k
// VPCMPUD imm8 zmm zmm k
//
// Construct and append a VPCMPUD instruction to the active function.
// Operates on the global context.
func VPCMPUD(ops ...operand.Op) { ctx.VPCMPUD(ops...) }
// VPCMPUD_BCST: Compare Packed Unsigned Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPUD.BCST imm8 m32 xmm k k
// VPCMPUD.BCST imm8 m32 xmm k
// VPCMPUD.BCST imm8 m32 ymm k k
// VPCMPUD.BCST imm8 m32 ymm k
// VPCMPUD.BCST imm8 m32 zmm k k
// VPCMPUD.BCST imm8 m32 zmm k
//
// Construct and append a VPCMPUD.BCST instruction to the active function.
func (c *Context) VPCMPUD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUD_BCST(ops...))
}
// VPCMPUD_BCST: Compare Packed Unsigned Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPUD.BCST imm8 m32 xmm k k
// VPCMPUD.BCST imm8 m32 xmm k
// VPCMPUD.BCST imm8 m32 ymm k k
// VPCMPUD.BCST imm8 m32 ymm k
// VPCMPUD.BCST imm8 m32 zmm k k
// VPCMPUD.BCST imm8 m32 zmm k
//
// Construct and append a VPCMPUD.BCST instruction to the active function.
// Operates on the global context.
func VPCMPUD_BCST(ops ...operand.Op) { ctx.VPCMPUD_BCST(ops...) }
// VPCMPUQ: Compare Packed Unsigned Quadword Values.
//
// Forms:
//
// VPCMPUQ imm8 m128 xmm k k
// VPCMPUQ imm8 m128 xmm k
// VPCMPUQ imm8 m256 ymm k k
// VPCMPUQ imm8 m256 ymm k
// VPCMPUQ imm8 xmm xmm k k
// VPCMPUQ imm8 xmm xmm k
// VPCMPUQ imm8 ymm ymm k k
// VPCMPUQ imm8 ymm ymm k
// VPCMPUQ imm8 m512 zmm k k
// VPCMPUQ imm8 m512 zmm k
// VPCMPUQ imm8 zmm zmm k k
// VPCMPUQ imm8 zmm zmm k
//
// Construct and append a VPCMPUQ instruction to the active function.
func (c *Context) VPCMPUQ(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUQ(ops...))
}
// VPCMPUQ: Compare Packed Unsigned Quadword Values.
//
// Forms:
//
// VPCMPUQ imm8 m128 xmm k k
// VPCMPUQ imm8 m128 xmm k
// VPCMPUQ imm8 m256 ymm k k
// VPCMPUQ imm8 m256 ymm k
// VPCMPUQ imm8 xmm xmm k k
// VPCMPUQ imm8 xmm xmm k
// VPCMPUQ imm8 ymm ymm k k
// VPCMPUQ imm8 ymm ymm k
// VPCMPUQ imm8 m512 zmm k k
// VPCMPUQ imm8 m512 zmm k
// VPCMPUQ imm8 zmm zmm k k
// VPCMPUQ imm8 zmm zmm k
//
// Construct and append a VPCMPUQ instruction to the active function.
// Operates on the global context.
func VPCMPUQ(ops ...operand.Op) { ctx.VPCMPUQ(ops...) }
// VPCMPUQ_BCST: Compare Packed Unsigned Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPUQ.BCST imm8 m64 xmm k k
// VPCMPUQ.BCST imm8 m64 xmm k
// VPCMPUQ.BCST imm8 m64 ymm k k
// VPCMPUQ.BCST imm8 m64 ymm k
// VPCMPUQ.BCST imm8 m64 zmm k k
// VPCMPUQ.BCST imm8 m64 zmm k
//
// Construct and append a VPCMPUQ.BCST instruction to the active function.
func (c *Context) VPCMPUQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUQ_BCST(ops...))
}
// VPCMPUQ_BCST: Compare Packed Unsigned Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPUQ.BCST imm8 m64 xmm k k
// VPCMPUQ.BCST imm8 m64 xmm k
// VPCMPUQ.BCST imm8 m64 ymm k k
// VPCMPUQ.BCST imm8 m64 ymm k
// VPCMPUQ.BCST imm8 m64 zmm k k
// VPCMPUQ.BCST imm8 m64 zmm k
//
// Construct and append a VPCMPUQ.BCST instruction to the active function.
// Operates on the global context.
func VPCMPUQ_BCST(ops ...operand.Op) { ctx.VPCMPUQ_BCST(ops...) }
// VPCMPUW: Compare Packed Unsigned Word Values.
//
// Forms:
//
// VPCMPUW imm8 m128 xmm k k
// VPCMPUW imm8 m128 xmm k
// VPCMPUW imm8 m256 ymm k k
// VPCMPUW imm8 m256 ymm k
// VPCMPUW imm8 xmm xmm k k
// VPCMPUW imm8 xmm xmm k
// VPCMPUW imm8 ymm ymm k k
// VPCMPUW imm8 ymm ymm k
// VPCMPUW imm8 m512 zmm k k
// VPCMPUW imm8 m512 zmm k
// VPCMPUW imm8 zmm zmm k k
// VPCMPUW imm8 zmm zmm k
//
// Construct and append a VPCMPUW instruction to the active function.
func (c *Context) VPCMPUW(ops ...operand.Op) {
c.addinstruction(x86.VPCMPUW(ops...))
}
// VPCMPUW: Compare Packed Unsigned Word Values.
//
// Forms:
//
// VPCMPUW imm8 m128 xmm k k
// VPCMPUW imm8 m128 xmm k
// VPCMPUW imm8 m256 ymm k k
// VPCMPUW imm8 m256 ymm k
// VPCMPUW imm8 xmm xmm k k
// VPCMPUW imm8 xmm xmm k
// VPCMPUW imm8 ymm ymm k k
// VPCMPUW imm8 ymm ymm k
// VPCMPUW imm8 m512 zmm k k
// VPCMPUW imm8 m512 zmm k
// VPCMPUW imm8 zmm zmm k k
// VPCMPUW imm8 zmm zmm k
//
// Construct and append a VPCMPUW instruction to the active function.
// Operates on the global context.
func VPCMPUW(ops ...operand.Op) { ctx.VPCMPUW(ops...) }
// VPCMPW: Compare Packed Signed Word Values.
//
// Forms:
//
// VPCMPW imm8 m128 xmm k k
// VPCMPW imm8 m128 xmm k
// VPCMPW imm8 m256 ymm k k
// VPCMPW imm8 m256 ymm k
// VPCMPW imm8 xmm xmm k k
// VPCMPW imm8 xmm xmm k
// VPCMPW imm8 ymm ymm k k
// VPCMPW imm8 ymm ymm k
// VPCMPW imm8 m512 zmm k k
// VPCMPW imm8 m512 zmm k
// VPCMPW imm8 zmm zmm k k
// VPCMPW imm8 zmm zmm k
//
// Construct and append a VPCMPW instruction to the active function.
func (c *Context) VPCMPW(ops ...operand.Op) {
c.addinstruction(x86.VPCMPW(ops...))
}
// VPCMPW: Compare Packed Signed Word Values.
//
// Forms:
//
// VPCMPW imm8 m128 xmm k k
// VPCMPW imm8 m128 xmm k
// VPCMPW imm8 m256 ymm k k
// VPCMPW imm8 m256 ymm k
// VPCMPW imm8 xmm xmm k k
// VPCMPW imm8 xmm xmm k
// VPCMPW imm8 ymm ymm k k
// VPCMPW imm8 ymm ymm k
// VPCMPW imm8 m512 zmm k k
// VPCMPW imm8 m512 zmm k
// VPCMPW imm8 zmm zmm k k
// VPCMPW imm8 zmm zmm k
//
// Construct and append a VPCMPW instruction to the active function.
// Operates on the global context.
func VPCMPW(ops ...operand.Op) { ctx.VPCMPW(ops...) }
// VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSD xmm k m128
// VPCOMPRESSD xmm k xmm
// VPCOMPRESSD xmm m128
// VPCOMPRESSD xmm xmm
// VPCOMPRESSD ymm k m256
// VPCOMPRESSD ymm k ymm
// VPCOMPRESSD ymm m256
// VPCOMPRESSD ymm ymm
// VPCOMPRESSD zmm k m512
// VPCOMPRESSD zmm k zmm
// VPCOMPRESSD zmm m512
// VPCOMPRESSD zmm zmm
//
// Construct and append a VPCOMPRESSD instruction to the active function.
func (c *Context) VPCOMPRESSD(ops ...operand.Op) {
c.addinstruction(x86.VPCOMPRESSD(ops...))
}
// VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSD xmm k m128
// VPCOMPRESSD xmm k xmm
// VPCOMPRESSD xmm m128
// VPCOMPRESSD xmm xmm
// VPCOMPRESSD ymm k m256
// VPCOMPRESSD ymm k ymm
// VPCOMPRESSD ymm m256
// VPCOMPRESSD ymm ymm
// VPCOMPRESSD zmm k m512
// VPCOMPRESSD zmm k zmm
// VPCOMPRESSD zmm m512
// VPCOMPRESSD zmm zmm
//
// Construct and append a VPCOMPRESSD instruction to the active function.
// Operates on the global context.
func VPCOMPRESSD(ops ...operand.Op) { ctx.VPCOMPRESSD(ops...) }
// VPCOMPRESSD_Z: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSD.Z xmm k m128
// VPCOMPRESSD.Z xmm k xmm
// VPCOMPRESSD.Z ymm k m256
// VPCOMPRESSD.Z ymm k ymm
// VPCOMPRESSD.Z zmm k m512
// VPCOMPRESSD.Z zmm k zmm
//
// Construct and append a VPCOMPRESSD.Z instruction to the active function.
func (c *Context) VPCOMPRESSD_Z(xyz, k, mxyz operand.Op) {
c.addinstruction(x86.VPCOMPRESSD_Z(xyz, k, mxyz))
}
// VPCOMPRESSD_Z: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSD.Z xmm k m128
// VPCOMPRESSD.Z xmm k xmm
// VPCOMPRESSD.Z ymm k m256
// VPCOMPRESSD.Z ymm k ymm
// VPCOMPRESSD.Z zmm k m512
// VPCOMPRESSD.Z zmm k zmm
//
// Construct and append a VPCOMPRESSD.Z instruction to the active function.
// Operates on the global context.
func VPCOMPRESSD_Z(xyz, k, mxyz operand.Op) { ctx.VPCOMPRESSD_Z(xyz, k, mxyz) }
// VPCOMPRESSQ: Store Sparse Packed Quadword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSQ xmm k m128
// VPCOMPRESSQ xmm k xmm
// VPCOMPRESSQ xmm m128
// VPCOMPRESSQ xmm xmm
// VPCOMPRESSQ ymm k m256
// VPCOMPRESSQ ymm k ymm
// VPCOMPRESSQ ymm m256
// VPCOMPRESSQ ymm ymm
// VPCOMPRESSQ zmm k m512
// VPCOMPRESSQ zmm k zmm
// VPCOMPRESSQ zmm m512
// VPCOMPRESSQ zmm zmm
//
// Construct and append a VPCOMPRESSQ instruction to the active function.
func (c *Context) VPCOMPRESSQ(ops ...operand.Op) {
c.addinstruction(x86.VPCOMPRESSQ(ops...))
}
// VPCOMPRESSQ: Store Sparse Packed Quadword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSQ xmm k m128
// VPCOMPRESSQ xmm k xmm
// VPCOMPRESSQ xmm m128
// VPCOMPRESSQ xmm xmm
// VPCOMPRESSQ ymm k m256
// VPCOMPRESSQ ymm k ymm
// VPCOMPRESSQ ymm m256
// VPCOMPRESSQ ymm ymm
// VPCOMPRESSQ zmm k m512
// VPCOMPRESSQ zmm k zmm
// VPCOMPRESSQ zmm m512
// VPCOMPRESSQ zmm zmm
//
// Construct and append a VPCOMPRESSQ instruction to the active function.
// Operates on the global context.
func VPCOMPRESSQ(ops ...operand.Op) { ctx.VPCOMPRESSQ(ops...) }
// VPCOMPRESSQ_Z: Store Sparse Packed Quadword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSQ.Z xmm k m128
// VPCOMPRESSQ.Z xmm k xmm
// VPCOMPRESSQ.Z ymm k m256
// VPCOMPRESSQ.Z ymm k ymm
// VPCOMPRESSQ.Z zmm k m512
// VPCOMPRESSQ.Z zmm k zmm
//
// Construct and append a VPCOMPRESSQ.Z instruction to the active function.
func (c *Context) VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) {
c.addinstruction(x86.VPCOMPRESSQ_Z(xyz, k, mxyz))
}
// VPCOMPRESSQ_Z: Store Sparse Packed Quadword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSQ.Z xmm k m128
// VPCOMPRESSQ.Z xmm k xmm
// VPCOMPRESSQ.Z ymm k m256
// VPCOMPRESSQ.Z ymm k ymm
// VPCOMPRESSQ.Z zmm k m512
// VPCOMPRESSQ.Z zmm k zmm
//
// Construct and append a VPCOMPRESSQ.Z instruction to the active function.
// Operates on the global context.
func VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) { ctx.VPCOMPRESSQ_Z(xyz, k, mxyz) }
// VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTD m128 k xmm
// VPCONFLICTD m128 xmm
// VPCONFLICTD m256 k ymm
// VPCONFLICTD m256 ymm
// VPCONFLICTD xmm k xmm
// VPCONFLICTD xmm xmm
// VPCONFLICTD ymm k ymm
// VPCONFLICTD ymm ymm
// VPCONFLICTD m512 k zmm
// VPCONFLICTD m512 zmm
// VPCONFLICTD zmm k zmm
// VPCONFLICTD zmm zmm
//
// Construct and append a VPCONFLICTD instruction to the active function.
func (c *Context) VPCONFLICTD(ops ...operand.Op) {
c.addinstruction(x86.VPCONFLICTD(ops...))
}
// VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTD m128 k xmm
// VPCONFLICTD m128 xmm
// VPCONFLICTD m256 k ymm
// VPCONFLICTD m256 ymm
// VPCONFLICTD xmm k xmm
// VPCONFLICTD xmm xmm
// VPCONFLICTD ymm k ymm
// VPCONFLICTD ymm ymm
// VPCONFLICTD m512 k zmm
// VPCONFLICTD m512 zmm
// VPCONFLICTD zmm k zmm
// VPCONFLICTD zmm zmm
//
// Construct and append a VPCONFLICTD instruction to the active function.
// Operates on the global context.
func VPCONFLICTD(ops ...operand.Op) { ctx.VPCONFLICTD(ops...) }
// VPCONFLICTD_BCST: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTD.BCST m32 k xmm
// VPCONFLICTD.BCST m32 k ymm
// VPCONFLICTD.BCST m32 xmm
// VPCONFLICTD.BCST m32 ymm
// VPCONFLICTD.BCST m32 k zmm
// VPCONFLICTD.BCST m32 zmm
//
// Construct and append a VPCONFLICTD.BCST instruction to the active function.
func (c *Context) VPCONFLICTD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCONFLICTD_BCST(ops...))
}
// VPCONFLICTD_BCST: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTD.BCST m32 k xmm
// VPCONFLICTD.BCST m32 k ymm
// VPCONFLICTD.BCST m32 xmm
// VPCONFLICTD.BCST m32 ymm
// VPCONFLICTD.BCST m32 k zmm
// VPCONFLICTD.BCST m32 zmm
//
// Construct and append a VPCONFLICTD.BCST instruction to the active function.
// Operates on the global context.
func VPCONFLICTD_BCST(ops ...operand.Op) { ctx.VPCONFLICTD_BCST(ops...) }
// VPCONFLICTD_BCST_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.BCST.Z m32 k xmm
// VPCONFLICTD.BCST.Z m32 k ymm
// VPCONFLICTD.BCST.Z m32 k zmm
//
// Construct and append a VPCONFLICTD.BCST.Z instruction to the active function.
func (c *Context) VPCONFLICTD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPCONFLICTD_BCST_Z(m, k, xyz))
}
// VPCONFLICTD_BCST_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.BCST.Z m32 k xmm
// VPCONFLICTD.BCST.Z m32 k ymm
// VPCONFLICTD.BCST.Z m32 k zmm
//
// Construct and append a VPCONFLICTD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPCONFLICTD_BCST_Z(m, k, xyz operand.Op) { ctx.VPCONFLICTD_BCST_Z(m, k, xyz) }
// VPCONFLICTD_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.Z m128 k xmm
// VPCONFLICTD.Z m256 k ymm
// VPCONFLICTD.Z xmm k xmm
// VPCONFLICTD.Z ymm k ymm
// VPCONFLICTD.Z m512 k zmm
// VPCONFLICTD.Z zmm k zmm
//
// Construct and append a VPCONFLICTD.Z instruction to the active function.
func (c *Context) VPCONFLICTD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPCONFLICTD_Z(mxyz, k, xyz))
}
// VPCONFLICTD_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.Z m128 k xmm
// VPCONFLICTD.Z m256 k ymm
// VPCONFLICTD.Z xmm k xmm
// VPCONFLICTD.Z ymm k ymm
// VPCONFLICTD.Z m512 k zmm
// VPCONFLICTD.Z zmm k zmm
//
// Construct and append a VPCONFLICTD.Z instruction to the active function.
// Operates on the global context.
func VPCONFLICTD_Z(mxyz, k, xyz operand.Op) { ctx.VPCONFLICTD_Z(mxyz, k, xyz) }
// VPCONFLICTQ: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTQ m128 k xmm
// VPCONFLICTQ m128 xmm
// VPCONFLICTQ m256 k ymm
// VPCONFLICTQ m256 ymm
// VPCONFLICTQ xmm k xmm
// VPCONFLICTQ xmm xmm
// VPCONFLICTQ ymm k ymm
// VPCONFLICTQ ymm ymm
// VPCONFLICTQ m512 k zmm
// VPCONFLICTQ m512 zmm
// VPCONFLICTQ zmm k zmm
// VPCONFLICTQ zmm zmm
//
// Construct and append a VPCONFLICTQ instruction to the active function.
func (c *Context) VPCONFLICTQ(ops ...operand.Op) {
c.addinstruction(x86.VPCONFLICTQ(ops...))
}
// VPCONFLICTQ: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTQ m128 k xmm
// VPCONFLICTQ m128 xmm
// VPCONFLICTQ m256 k ymm
// VPCONFLICTQ m256 ymm
// VPCONFLICTQ xmm k xmm
// VPCONFLICTQ xmm xmm
// VPCONFLICTQ ymm k ymm
// VPCONFLICTQ ymm ymm
// VPCONFLICTQ m512 k zmm
// VPCONFLICTQ m512 zmm
// VPCONFLICTQ zmm k zmm
// VPCONFLICTQ zmm zmm
//
// Construct and append a VPCONFLICTQ instruction to the active function.
// Operates on the global context.
func VPCONFLICTQ(ops ...operand.Op) { ctx.VPCONFLICTQ(ops...) }
// VPCONFLICTQ_BCST: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTQ.BCST m64 k xmm
// VPCONFLICTQ.BCST m64 k ymm
// VPCONFLICTQ.BCST m64 xmm
// VPCONFLICTQ.BCST m64 ymm
// VPCONFLICTQ.BCST m64 k zmm
// VPCONFLICTQ.BCST m64 zmm
//
// Construct and append a VPCONFLICTQ.BCST instruction to the active function.
func (c *Context) VPCONFLICTQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPCONFLICTQ_BCST(ops...))
}
// VPCONFLICTQ_BCST: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTQ.BCST m64 k xmm
// VPCONFLICTQ.BCST m64 k ymm
// VPCONFLICTQ.BCST m64 xmm
// VPCONFLICTQ.BCST m64 ymm
// VPCONFLICTQ.BCST m64 k zmm
// VPCONFLICTQ.BCST m64 zmm
//
// Construct and append a VPCONFLICTQ.BCST instruction to the active function.
// Operates on the global context.
func VPCONFLICTQ_BCST(ops ...operand.Op) { ctx.VPCONFLICTQ_BCST(ops...) }
// VPCONFLICTQ_BCST_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.BCST.Z m64 k xmm
// VPCONFLICTQ.BCST.Z m64 k ymm
// VPCONFLICTQ.BCST.Z m64 k zmm
//
// Construct and append a VPCONFLICTQ.BCST.Z instruction to the active function.
func (c *Context) VPCONFLICTQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPCONFLICTQ_BCST_Z(m, k, xyz))
}
// VPCONFLICTQ_BCST_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.BCST.Z m64 k xmm
// VPCONFLICTQ.BCST.Z m64 k ymm
// VPCONFLICTQ.BCST.Z m64 k zmm
//
// Construct and append a VPCONFLICTQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPCONFLICTQ_BCST_Z(m, k, xyz operand.Op) { ctx.VPCONFLICTQ_BCST_Z(m, k, xyz) }
// VPCONFLICTQ_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.Z m128 k xmm
// VPCONFLICTQ.Z m256 k ymm
// VPCONFLICTQ.Z xmm k xmm
// VPCONFLICTQ.Z ymm k ymm
// VPCONFLICTQ.Z m512 k zmm
// VPCONFLICTQ.Z zmm k zmm
//
// Construct and append a VPCONFLICTQ.Z instruction to the active function.
func (c *Context) VPCONFLICTQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPCONFLICTQ_Z(mxyz, k, xyz))
}
// VPCONFLICTQ_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.Z m128 k xmm
// VPCONFLICTQ.Z m256 k ymm
// VPCONFLICTQ.Z xmm k xmm
// VPCONFLICTQ.Z ymm k ymm
// VPCONFLICTQ.Z m512 k zmm
// VPCONFLICTQ.Z zmm k zmm
//
// Construct and append a VPCONFLICTQ.Z instruction to the active function.
// Operates on the global context.
func VPCONFLICTQ_Z(mxyz, k, xyz operand.Op) { ctx.VPCONFLICTQ_Z(mxyz, k, xyz) }
// VPERM2F128: Permute Floating-Point Values.
//
// Forms:
//
// VPERM2F128 imm8 m256 ymm ymm
// VPERM2F128 imm8 ymm ymm ymm
//
// Construct and append a VPERM2F128 instruction to the active function.
func (c *Context) VPERM2F128(i, my, y, y1 operand.Op) {
c.addinstruction(x86.VPERM2F128(i, my, y, y1))
}
// VPERM2F128: Permute Floating-Point Values.
//
// Forms:
//
// VPERM2F128 imm8 m256 ymm ymm
// VPERM2F128 imm8 ymm ymm ymm
//
// Construct and append a VPERM2F128 instruction to the active function.
// Operates on the global context.
func VPERM2F128(i, my, y, y1 operand.Op) { ctx.VPERM2F128(i, my, y, y1) }
// VPERM2I128: Permute 128-Bit Integer Values.
//
// Forms:
//
// VPERM2I128 imm8 m256 ymm ymm
// VPERM2I128 imm8 ymm ymm ymm
//
// Construct and append a VPERM2I128 instruction to the active function.
func (c *Context) VPERM2I128(i, my, y, y1 operand.Op) {
c.addinstruction(x86.VPERM2I128(i, my, y, y1))
}
// VPERM2I128: Permute 128-Bit Integer Values.
//
// Forms:
//
// VPERM2I128 imm8 m256 ymm ymm
// VPERM2I128 imm8 ymm ymm ymm
//
// Construct and append a VPERM2I128 instruction to the active function.
// Operates on the global context.
func VPERM2I128(i, my, y, y1 operand.Op) { ctx.VPERM2I128(i, my, y, y1) }
// VPERMB: Permute Byte Integers.
//
// Forms:
//
// VPERMB m128 xmm k xmm
// VPERMB m128 xmm xmm
// VPERMB m256 ymm k ymm
// VPERMB m256 ymm ymm
// VPERMB xmm xmm k xmm
// VPERMB xmm xmm xmm
// VPERMB ymm ymm k ymm
// VPERMB ymm ymm ymm
// VPERMB m512 zmm k zmm
// VPERMB m512 zmm zmm
// VPERMB zmm zmm k zmm
// VPERMB zmm zmm zmm
//
// Construct and append a VPERMB instruction to the active function.
func (c *Context) VPERMB(ops ...operand.Op) {
c.addinstruction(x86.VPERMB(ops...))
}
// VPERMB: Permute Byte Integers.
//
// Forms:
//
// VPERMB m128 xmm k xmm
// VPERMB m128 xmm xmm
// VPERMB m256 ymm k ymm
// VPERMB m256 ymm ymm
// VPERMB xmm xmm k xmm
// VPERMB xmm xmm xmm
// VPERMB ymm ymm k ymm
// VPERMB ymm ymm ymm
// VPERMB m512 zmm k zmm
// VPERMB m512 zmm zmm
// VPERMB zmm zmm k zmm
// VPERMB zmm zmm zmm
//
// Construct and append a VPERMB instruction to the active function.
// Operates on the global context.
func VPERMB(ops ...operand.Op) { ctx.VPERMB(ops...) }
// VPERMB_Z: Permute Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPERMB.Z m128 xmm k xmm
// VPERMB.Z m256 ymm k ymm
// VPERMB.Z xmm xmm k xmm
// VPERMB.Z ymm ymm k ymm
// VPERMB.Z m512 zmm k zmm
// VPERMB.Z zmm zmm k zmm
//
// Construct and append a VPERMB.Z instruction to the active function.
func (c *Context) VPERMB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMB_Z(mxyz, xyz, k, xyz1))
}
// VPERMB_Z: Permute Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPERMB.Z m128 xmm k xmm
// VPERMB.Z m256 ymm k ymm
// VPERMB.Z xmm xmm k xmm
// VPERMB.Z ymm ymm k ymm
// VPERMB.Z m512 zmm k zmm
// VPERMB.Z zmm zmm k zmm
//
// Construct and append a VPERMB.Z instruction to the active function.
// Operates on the global context.
func VPERMB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMB_Z(mxyz, xyz, k, xyz1) }
// VPERMD: Permute Doubleword Integers.
//
// Forms:
//
// VPERMD m256 ymm ymm
// VPERMD ymm ymm ymm
// VPERMD m256 ymm k ymm
// VPERMD ymm ymm k ymm
// VPERMD m512 zmm k zmm
// VPERMD m512 zmm zmm
// VPERMD zmm zmm k zmm
// VPERMD zmm zmm zmm
//
// Construct and append a VPERMD instruction to the active function.
func (c *Context) VPERMD(ops ...operand.Op) {
c.addinstruction(x86.VPERMD(ops...))
}
// VPERMD: Permute Doubleword Integers.
//
// Forms:
//
// VPERMD m256 ymm ymm
// VPERMD ymm ymm ymm
// VPERMD m256 ymm k ymm
// VPERMD ymm ymm k ymm
// VPERMD m512 zmm k zmm
// VPERMD m512 zmm zmm
// VPERMD zmm zmm k zmm
// VPERMD zmm zmm zmm
//
// Construct and append a VPERMD instruction to the active function.
// Operates on the global context.
func VPERMD(ops ...operand.Op) { ctx.VPERMD(ops...) }
// VPERMD_BCST: Permute Doubleword Integers (Broadcast).
//
// Forms:
//
// VPERMD.BCST m32 ymm k ymm
// VPERMD.BCST m32 ymm ymm
// VPERMD.BCST m32 zmm k zmm
// VPERMD.BCST m32 zmm zmm
//
// Construct and append a VPERMD.BCST instruction to the active function.
func (c *Context) VPERMD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMD_BCST(ops...))
}
// VPERMD_BCST: Permute Doubleword Integers (Broadcast).
//
// Forms:
//
// VPERMD.BCST m32 ymm k ymm
// VPERMD.BCST m32 ymm ymm
// VPERMD.BCST m32 zmm k zmm
// VPERMD.BCST m32 zmm zmm
//
// Construct and append a VPERMD.BCST instruction to the active function.
// Operates on the global context.
func VPERMD_BCST(ops ...operand.Op) { ctx.VPERMD_BCST(ops...) }
// VPERMD_BCST_Z: Permute Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMD.BCST.Z m32 ymm k ymm
// VPERMD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMD.BCST.Z instruction to the active function.
func (c *Context) VPERMD_BCST_Z(m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VPERMD_BCST_Z(m, yz, k, yz1))
}
// VPERMD_BCST_Z: Permute Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMD.BCST.Z m32 ymm k ymm
// VPERMD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMD_BCST_Z(m, yz, k, yz1 operand.Op) { ctx.VPERMD_BCST_Z(m, yz, k, yz1) }
// VPERMD_Z: Permute Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMD.Z m256 ymm k ymm
// VPERMD.Z ymm ymm k ymm
// VPERMD.Z m512 zmm k zmm
// VPERMD.Z zmm zmm k zmm
//
// Construct and append a VPERMD.Z instruction to the active function.
func (c *Context) VPERMD_Z(myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VPERMD_Z(myz, yz, k, yz1))
}
// VPERMD_Z: Permute Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMD.Z m256 ymm k ymm
// VPERMD.Z ymm ymm k ymm
// VPERMD.Z m512 zmm k zmm
// VPERMD.Z zmm zmm k zmm
//
// Construct and append a VPERMD.Z instruction to the active function.
// Operates on the global context.
func VPERMD_Z(myz, yz, k, yz1 operand.Op) { ctx.VPERMD_Z(myz, yz, k, yz1) }
// VPERMI2B: Full Permute of Bytes From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2B m128 xmm k xmm
// VPERMI2B m128 xmm xmm
// VPERMI2B m256 ymm k ymm
// VPERMI2B m256 ymm ymm
// VPERMI2B xmm xmm k xmm
// VPERMI2B xmm xmm xmm
// VPERMI2B ymm ymm k ymm
// VPERMI2B ymm ymm ymm
// VPERMI2B m512 zmm k zmm
// VPERMI2B m512 zmm zmm
// VPERMI2B zmm zmm k zmm
// VPERMI2B zmm zmm zmm
//
// Construct and append a VPERMI2B instruction to the active function.
func (c *Context) VPERMI2B(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2B(ops...))
}
// VPERMI2B: Full Permute of Bytes From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2B m128 xmm k xmm
// VPERMI2B m128 xmm xmm
// VPERMI2B m256 ymm k ymm
// VPERMI2B m256 ymm ymm
// VPERMI2B xmm xmm k xmm
// VPERMI2B xmm xmm xmm
// VPERMI2B ymm ymm k ymm
// VPERMI2B ymm ymm ymm
// VPERMI2B m512 zmm k zmm
// VPERMI2B m512 zmm zmm
// VPERMI2B zmm zmm k zmm
// VPERMI2B zmm zmm zmm
//
// Construct and append a VPERMI2B instruction to the active function.
// Operates on the global context.
func VPERMI2B(ops ...operand.Op) { ctx.VPERMI2B(ops...) }
// VPERMI2B_Z: Full Permute of Bytes From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2B.Z m128 xmm k xmm
// VPERMI2B.Z m256 ymm k ymm
// VPERMI2B.Z xmm xmm k xmm
// VPERMI2B.Z ymm ymm k ymm
// VPERMI2B.Z m512 zmm k zmm
// VPERMI2B.Z zmm zmm k zmm
//
// Construct and append a VPERMI2B.Z instruction to the active function.
func (c *Context) VPERMI2B_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2B_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2B_Z: Full Permute of Bytes From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2B.Z m128 xmm k xmm
// VPERMI2B.Z m256 ymm k ymm
// VPERMI2B.Z xmm xmm k xmm
// VPERMI2B.Z ymm ymm k ymm
// VPERMI2B.Z m512 zmm k zmm
// VPERMI2B.Z zmm zmm k zmm
//
// Construct and append a VPERMI2B.Z instruction to the active function.
// Operates on the global context.
func VPERMI2B_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2B_Z(mxyz, xyz, k, xyz1) }
// VPERMI2D: Full Permute of Doublewords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2D m128 xmm k xmm
// VPERMI2D m128 xmm xmm
// VPERMI2D m256 ymm k ymm
// VPERMI2D m256 ymm ymm
// VPERMI2D xmm xmm k xmm
// VPERMI2D xmm xmm xmm
// VPERMI2D ymm ymm k ymm
// VPERMI2D ymm ymm ymm
// VPERMI2D m512 zmm k zmm
// VPERMI2D m512 zmm zmm
// VPERMI2D zmm zmm k zmm
// VPERMI2D zmm zmm zmm
//
// Construct and append a VPERMI2D instruction to the active function.
func (c *Context) VPERMI2D(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2D(ops...))
}
// VPERMI2D: Full Permute of Doublewords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2D m128 xmm k xmm
// VPERMI2D m128 xmm xmm
// VPERMI2D m256 ymm k ymm
// VPERMI2D m256 ymm ymm
// VPERMI2D xmm xmm k xmm
// VPERMI2D xmm xmm xmm
// VPERMI2D ymm ymm k ymm
// VPERMI2D ymm ymm ymm
// VPERMI2D m512 zmm k zmm
// VPERMI2D m512 zmm zmm
// VPERMI2D zmm zmm k zmm
// VPERMI2D zmm zmm zmm
//
// Construct and append a VPERMI2D instruction to the active function.
// Operates on the global context.
func VPERMI2D(ops ...operand.Op) { ctx.VPERMI2D(ops...) }
// VPERMI2D_BCST: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2D.BCST m32 xmm k xmm
// VPERMI2D.BCST m32 xmm xmm
// VPERMI2D.BCST m32 ymm k ymm
// VPERMI2D.BCST m32 ymm ymm
// VPERMI2D.BCST m32 zmm k zmm
// VPERMI2D.BCST m32 zmm zmm
//
// Construct and append a VPERMI2D.BCST instruction to the active function.
func (c *Context) VPERMI2D_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2D_BCST(ops...))
}
// VPERMI2D_BCST: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2D.BCST m32 xmm k xmm
// VPERMI2D.BCST m32 xmm xmm
// VPERMI2D.BCST m32 ymm k ymm
// VPERMI2D.BCST m32 ymm ymm
// VPERMI2D.BCST m32 zmm k zmm
// VPERMI2D.BCST m32 zmm zmm
//
// Construct and append a VPERMI2D.BCST instruction to the active function.
// Operates on the global context.
func VPERMI2D_BCST(ops ...operand.Op) { ctx.VPERMI2D_BCST(ops...) }
// VPERMI2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2D.BCST.Z m32 xmm k xmm
// VPERMI2D.BCST.Z m32 ymm k ymm
// VPERMI2D.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMI2D.BCST.Z instruction to the active function.
func (c *Context) VPERMI2D_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2D_BCST_Z(m, xyz, k, xyz1))
}
// VPERMI2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2D.BCST.Z m32 xmm k xmm
// VPERMI2D.BCST.Z m32 ymm k ymm
// VPERMI2D.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMI2D.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMI2D_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMI2D_BCST_Z(m, xyz, k, xyz1) }
// VPERMI2D_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2D.Z m128 xmm k xmm
// VPERMI2D.Z m256 ymm k ymm
// VPERMI2D.Z xmm xmm k xmm
// VPERMI2D.Z ymm ymm k ymm
// VPERMI2D.Z m512 zmm k zmm
// VPERMI2D.Z zmm zmm k zmm
//
// Construct and append a VPERMI2D.Z instruction to the active function.
func (c *Context) VPERMI2D_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2D_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2D_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2D.Z m128 xmm k xmm
// VPERMI2D.Z m256 ymm k ymm
// VPERMI2D.Z xmm xmm k xmm
// VPERMI2D.Z ymm ymm k ymm
// VPERMI2D.Z m512 zmm k zmm
// VPERMI2D.Z zmm zmm k zmm
//
// Construct and append a VPERMI2D.Z instruction to the active function.
// Operates on the global context.
func VPERMI2D_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2D_Z(mxyz, xyz, k, xyz1) }
// VPERMI2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PD m128 xmm k xmm
// VPERMI2PD m128 xmm xmm
// VPERMI2PD m256 ymm k ymm
// VPERMI2PD m256 ymm ymm
// VPERMI2PD xmm xmm k xmm
// VPERMI2PD xmm xmm xmm
// VPERMI2PD ymm ymm k ymm
// VPERMI2PD ymm ymm ymm
// VPERMI2PD m512 zmm k zmm
// VPERMI2PD m512 zmm zmm
// VPERMI2PD zmm zmm k zmm
// VPERMI2PD zmm zmm zmm
//
// Construct and append a VPERMI2PD instruction to the active function.
func (c *Context) VPERMI2PD(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2PD(ops...))
}
// VPERMI2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PD m128 xmm k xmm
// VPERMI2PD m128 xmm xmm
// VPERMI2PD m256 ymm k ymm
// VPERMI2PD m256 ymm ymm
// VPERMI2PD xmm xmm k xmm
// VPERMI2PD xmm xmm xmm
// VPERMI2PD ymm ymm k ymm
// VPERMI2PD ymm ymm ymm
// VPERMI2PD m512 zmm k zmm
// VPERMI2PD m512 zmm zmm
// VPERMI2PD zmm zmm k zmm
// VPERMI2PD zmm zmm zmm
//
// Construct and append a VPERMI2PD instruction to the active function.
// Operates on the global context.
func VPERMI2PD(ops ...operand.Op) { ctx.VPERMI2PD(ops...) }
// VPERMI2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PD.BCST m64 xmm k xmm
// VPERMI2PD.BCST m64 xmm xmm
// VPERMI2PD.BCST m64 ymm k ymm
// VPERMI2PD.BCST m64 ymm ymm
// VPERMI2PD.BCST m64 zmm k zmm
// VPERMI2PD.BCST m64 zmm zmm
//
// Construct and append a VPERMI2PD.BCST instruction to the active function.
func (c *Context) VPERMI2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2PD_BCST(ops...))
}
// VPERMI2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PD.BCST m64 xmm k xmm
// VPERMI2PD.BCST m64 xmm xmm
// VPERMI2PD.BCST m64 ymm k ymm
// VPERMI2PD.BCST m64 ymm ymm
// VPERMI2PD.BCST m64 zmm k zmm
// VPERMI2PD.BCST m64 zmm zmm
//
// Construct and append a VPERMI2PD.BCST instruction to the active function.
// Operates on the global context.
func VPERMI2PD_BCST(ops ...operand.Op) { ctx.VPERMI2PD_BCST(ops...) }
// VPERMI2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.BCST.Z m64 xmm k xmm
// VPERMI2PD.BCST.Z m64 ymm k ymm
// VPERMI2PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMI2PD.BCST.Z instruction to the active function.
func (c *Context) VPERMI2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2PD_BCST_Z(m, xyz, k, xyz1))
}
// VPERMI2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.BCST.Z m64 xmm k xmm
// VPERMI2PD.BCST.Z m64 ymm k ymm
// VPERMI2PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMI2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMI2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMI2PD_BCST_Z(m, xyz, k, xyz1) }
// VPERMI2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.Z m128 xmm k xmm
// VPERMI2PD.Z m256 ymm k ymm
// VPERMI2PD.Z xmm xmm k xmm
// VPERMI2PD.Z ymm ymm k ymm
// VPERMI2PD.Z m512 zmm k zmm
// VPERMI2PD.Z zmm zmm k zmm
//
// Construct and append a VPERMI2PD.Z instruction to the active function.
func (c *Context) VPERMI2PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2PD_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.Z m128 xmm k xmm
// VPERMI2PD.Z m256 ymm k ymm
// VPERMI2PD.Z xmm xmm k xmm
// VPERMI2PD.Z ymm ymm k ymm
// VPERMI2PD.Z m512 zmm k zmm
// VPERMI2PD.Z zmm zmm k zmm
//
// Construct and append a VPERMI2PD.Z instruction to the active function.
// Operates on the global context.
func VPERMI2PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2PD_Z(mxyz, xyz, k, xyz1) }
// VPERMI2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PS m128 xmm k xmm
// VPERMI2PS m128 xmm xmm
// VPERMI2PS m256 ymm k ymm
// VPERMI2PS m256 ymm ymm
// VPERMI2PS xmm xmm k xmm
// VPERMI2PS xmm xmm xmm
// VPERMI2PS ymm ymm k ymm
// VPERMI2PS ymm ymm ymm
// VPERMI2PS m512 zmm k zmm
// VPERMI2PS m512 zmm zmm
// VPERMI2PS zmm zmm k zmm
// VPERMI2PS zmm zmm zmm
//
// Construct and append a VPERMI2PS instruction to the active function.
func (c *Context) VPERMI2PS(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2PS(ops...))
}
// VPERMI2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PS m128 xmm k xmm
// VPERMI2PS m128 xmm xmm
// VPERMI2PS m256 ymm k ymm
// VPERMI2PS m256 ymm ymm
// VPERMI2PS xmm xmm k xmm
// VPERMI2PS xmm xmm xmm
// VPERMI2PS ymm ymm k ymm
// VPERMI2PS ymm ymm ymm
// VPERMI2PS m512 zmm k zmm
// VPERMI2PS m512 zmm zmm
// VPERMI2PS zmm zmm k zmm
// VPERMI2PS zmm zmm zmm
//
// Construct and append a VPERMI2PS instruction to the active function.
// Operates on the global context.
func VPERMI2PS(ops ...operand.Op) { ctx.VPERMI2PS(ops...) }
// VPERMI2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PS.BCST m32 xmm k xmm
// VPERMI2PS.BCST m32 xmm xmm
// VPERMI2PS.BCST m32 ymm k ymm
// VPERMI2PS.BCST m32 ymm ymm
// VPERMI2PS.BCST m32 zmm k zmm
// VPERMI2PS.BCST m32 zmm zmm
//
// Construct and append a VPERMI2PS.BCST instruction to the active function.
func (c *Context) VPERMI2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2PS_BCST(ops...))
}
// VPERMI2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PS.BCST m32 xmm k xmm
// VPERMI2PS.BCST m32 xmm xmm
// VPERMI2PS.BCST m32 ymm k ymm
// VPERMI2PS.BCST m32 ymm ymm
// VPERMI2PS.BCST m32 zmm k zmm
// VPERMI2PS.BCST m32 zmm zmm
//
// Construct and append a VPERMI2PS.BCST instruction to the active function.
// Operates on the global context.
func VPERMI2PS_BCST(ops ...operand.Op) { ctx.VPERMI2PS_BCST(ops...) }
// VPERMI2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.BCST.Z m32 xmm k xmm
// VPERMI2PS.BCST.Z m32 ymm k ymm
// VPERMI2PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMI2PS.BCST.Z instruction to the active function.
func (c *Context) VPERMI2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2PS_BCST_Z(m, xyz, k, xyz1))
}
// VPERMI2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.BCST.Z m32 xmm k xmm
// VPERMI2PS.BCST.Z m32 ymm k ymm
// VPERMI2PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMI2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMI2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMI2PS_BCST_Z(m, xyz, k, xyz1) }
// VPERMI2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.Z m128 xmm k xmm
// VPERMI2PS.Z m256 ymm k ymm
// VPERMI2PS.Z xmm xmm k xmm
// VPERMI2PS.Z ymm ymm k ymm
// VPERMI2PS.Z m512 zmm k zmm
// VPERMI2PS.Z zmm zmm k zmm
//
// Construct and append a VPERMI2PS.Z instruction to the active function.
func (c *Context) VPERMI2PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2PS_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.Z m128 xmm k xmm
// VPERMI2PS.Z m256 ymm k ymm
// VPERMI2PS.Z xmm xmm k xmm
// VPERMI2PS.Z ymm ymm k ymm
// VPERMI2PS.Z m512 zmm k zmm
// VPERMI2PS.Z zmm zmm k zmm
//
// Construct and append a VPERMI2PS.Z instruction to the active function.
// Operates on the global context.
func VPERMI2PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2PS_Z(mxyz, xyz, k, xyz1) }
// VPERMI2Q: Full Permute of Quadwords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2Q m128 xmm k xmm
// VPERMI2Q m128 xmm xmm
// VPERMI2Q m256 ymm k ymm
// VPERMI2Q m256 ymm ymm
// VPERMI2Q xmm xmm k xmm
// VPERMI2Q xmm xmm xmm
// VPERMI2Q ymm ymm k ymm
// VPERMI2Q ymm ymm ymm
// VPERMI2Q m512 zmm k zmm
// VPERMI2Q m512 zmm zmm
// VPERMI2Q zmm zmm k zmm
// VPERMI2Q zmm zmm zmm
//
// Construct and append a VPERMI2Q instruction to the active function.
func (c *Context) VPERMI2Q(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2Q(ops...))
}
// VPERMI2Q: Full Permute of Quadwords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2Q m128 xmm k xmm
// VPERMI2Q m128 xmm xmm
// VPERMI2Q m256 ymm k ymm
// VPERMI2Q m256 ymm ymm
// VPERMI2Q xmm xmm k xmm
// VPERMI2Q xmm xmm xmm
// VPERMI2Q ymm ymm k ymm
// VPERMI2Q ymm ymm ymm
// VPERMI2Q m512 zmm k zmm
// VPERMI2Q m512 zmm zmm
// VPERMI2Q zmm zmm k zmm
// VPERMI2Q zmm zmm zmm
//
// Construct and append a VPERMI2Q instruction to the active function.
// Operates on the global context.
func VPERMI2Q(ops ...operand.Op) { ctx.VPERMI2Q(ops...) }
// VPERMI2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2Q.BCST m64 xmm k xmm
// VPERMI2Q.BCST m64 xmm xmm
// VPERMI2Q.BCST m64 ymm k ymm
// VPERMI2Q.BCST m64 ymm ymm
// VPERMI2Q.BCST m64 zmm k zmm
// VPERMI2Q.BCST m64 zmm zmm
//
// Construct and append a VPERMI2Q.BCST instruction to the active function.
func (c *Context) VPERMI2Q_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2Q_BCST(ops...))
}
// VPERMI2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2Q.BCST m64 xmm k xmm
// VPERMI2Q.BCST m64 xmm xmm
// VPERMI2Q.BCST m64 ymm k ymm
// VPERMI2Q.BCST m64 ymm ymm
// VPERMI2Q.BCST m64 zmm k zmm
// VPERMI2Q.BCST m64 zmm zmm
//
// Construct and append a VPERMI2Q.BCST instruction to the active function.
// Operates on the global context.
func VPERMI2Q_BCST(ops ...operand.Op) { ctx.VPERMI2Q_BCST(ops...) }
// VPERMI2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.BCST.Z m64 xmm k xmm
// VPERMI2Q.BCST.Z m64 ymm k ymm
// VPERMI2Q.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMI2Q.BCST.Z instruction to the active function.
func (c *Context) VPERMI2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2Q_BCST_Z(m, xyz, k, xyz1))
}
// VPERMI2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.BCST.Z m64 xmm k xmm
// VPERMI2Q.BCST.Z m64 ymm k ymm
// VPERMI2Q.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMI2Q.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMI2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMI2Q_BCST_Z(m, xyz, k, xyz1) }
// VPERMI2Q_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.Z m128 xmm k xmm
// VPERMI2Q.Z m256 ymm k ymm
// VPERMI2Q.Z xmm xmm k xmm
// VPERMI2Q.Z ymm ymm k ymm
// VPERMI2Q.Z m512 zmm k zmm
// VPERMI2Q.Z zmm zmm k zmm
//
// Construct and append a VPERMI2Q.Z instruction to the active function.
func (c *Context) VPERMI2Q_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2Q_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2Q_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.Z m128 xmm k xmm
// VPERMI2Q.Z m256 ymm k ymm
// VPERMI2Q.Z xmm xmm k xmm
// VPERMI2Q.Z ymm ymm k ymm
// VPERMI2Q.Z m512 zmm k zmm
// VPERMI2Q.Z zmm zmm k zmm
//
// Construct and append a VPERMI2Q.Z instruction to the active function.
// Operates on the global context.
func VPERMI2Q_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2Q_Z(mxyz, xyz, k, xyz1) }
// VPERMI2W: Full Permute of Words From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2W m128 xmm k xmm
// VPERMI2W m128 xmm xmm
// VPERMI2W m256 ymm k ymm
// VPERMI2W m256 ymm ymm
// VPERMI2W xmm xmm k xmm
// VPERMI2W xmm xmm xmm
// VPERMI2W ymm ymm k ymm
// VPERMI2W ymm ymm ymm
// VPERMI2W m512 zmm k zmm
// VPERMI2W m512 zmm zmm
// VPERMI2W zmm zmm k zmm
// VPERMI2W zmm zmm zmm
//
// Construct and append a VPERMI2W instruction to the active function.
func (c *Context) VPERMI2W(ops ...operand.Op) {
c.addinstruction(x86.VPERMI2W(ops...))
}
// VPERMI2W: Full Permute of Words From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2W m128 xmm k xmm
// VPERMI2W m128 xmm xmm
// VPERMI2W m256 ymm k ymm
// VPERMI2W m256 ymm ymm
// VPERMI2W xmm xmm k xmm
// VPERMI2W xmm xmm xmm
// VPERMI2W ymm ymm k ymm
// VPERMI2W ymm ymm ymm
// VPERMI2W m512 zmm k zmm
// VPERMI2W m512 zmm zmm
// VPERMI2W zmm zmm k zmm
// VPERMI2W zmm zmm zmm
//
// Construct and append a VPERMI2W instruction to the active function.
// Operates on the global context.
func VPERMI2W(ops ...operand.Op) { ctx.VPERMI2W(ops...) }
// VPERMI2W_Z: Full Permute of Words From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2W.Z m128 xmm k xmm
// VPERMI2W.Z m256 ymm k ymm
// VPERMI2W.Z xmm xmm k xmm
// VPERMI2W.Z ymm ymm k ymm
// VPERMI2W.Z m512 zmm k zmm
// VPERMI2W.Z zmm zmm k zmm
//
// Construct and append a VPERMI2W.Z instruction to the active function.
func (c *Context) VPERMI2W_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMI2W_Z(mxyz, xyz, k, xyz1))
}
// VPERMI2W_Z: Full Permute of Words From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2W.Z m128 xmm k xmm
// VPERMI2W.Z m256 ymm k ymm
// VPERMI2W.Z xmm xmm k xmm
// VPERMI2W.Z ymm ymm k ymm
// VPERMI2W.Z m512 zmm k zmm
// VPERMI2W.Z zmm zmm k zmm
//
// Construct and append a VPERMI2W.Z instruction to the active function.
// Operates on the global context.
func VPERMI2W_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMI2W_Z(mxyz, xyz, k, xyz1) }
// VPERMILPD: Permute Double-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPD imm8 m128 xmm
// VPERMILPD imm8 m256 ymm
// VPERMILPD imm8 xmm xmm
// VPERMILPD imm8 ymm ymm
// VPERMILPD m128 xmm xmm
// VPERMILPD m256 ymm ymm
// VPERMILPD xmm xmm xmm
// VPERMILPD ymm ymm ymm
// VPERMILPD imm8 m128 k xmm
// VPERMILPD imm8 m256 k ymm
// VPERMILPD imm8 xmm k xmm
// VPERMILPD imm8 ymm k ymm
// VPERMILPD m128 xmm k xmm
// VPERMILPD m256 ymm k ymm
// VPERMILPD xmm xmm k xmm
// VPERMILPD ymm ymm k ymm
// VPERMILPD imm8 m512 k zmm
// VPERMILPD imm8 m512 zmm
// VPERMILPD imm8 zmm k zmm
// VPERMILPD imm8 zmm zmm
// VPERMILPD m512 zmm k zmm
// VPERMILPD m512 zmm zmm
// VPERMILPD zmm zmm k zmm
// VPERMILPD zmm zmm zmm
//
// Construct and append a VPERMILPD instruction to the active function.
func (c *Context) VPERMILPD(ops ...operand.Op) {
c.addinstruction(x86.VPERMILPD(ops...))
}
// VPERMILPD: Permute Double-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPD imm8 m128 xmm
// VPERMILPD imm8 m256 ymm
// VPERMILPD imm8 xmm xmm
// VPERMILPD imm8 ymm ymm
// VPERMILPD m128 xmm xmm
// VPERMILPD m256 ymm ymm
// VPERMILPD xmm xmm xmm
// VPERMILPD ymm ymm ymm
// VPERMILPD imm8 m128 k xmm
// VPERMILPD imm8 m256 k ymm
// VPERMILPD imm8 xmm k xmm
// VPERMILPD imm8 ymm k ymm
// VPERMILPD m128 xmm k xmm
// VPERMILPD m256 ymm k ymm
// VPERMILPD xmm xmm k xmm
// VPERMILPD ymm ymm k ymm
// VPERMILPD imm8 m512 k zmm
// VPERMILPD imm8 m512 zmm
// VPERMILPD imm8 zmm k zmm
// VPERMILPD imm8 zmm zmm
// VPERMILPD m512 zmm k zmm
// VPERMILPD m512 zmm zmm
// VPERMILPD zmm zmm k zmm
// VPERMILPD zmm zmm zmm
//
// Construct and append a VPERMILPD instruction to the active function.
// Operates on the global context.
func VPERMILPD(ops ...operand.Op) { ctx.VPERMILPD(ops...) }
// VPERMILPD_BCST: Permute Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPD.BCST imm8 m64 k xmm
// VPERMILPD.BCST imm8 m64 k ymm
// VPERMILPD.BCST imm8 m64 xmm
// VPERMILPD.BCST imm8 m64 ymm
// VPERMILPD.BCST m64 xmm k xmm
// VPERMILPD.BCST m64 xmm xmm
// VPERMILPD.BCST m64 ymm k ymm
// VPERMILPD.BCST m64 ymm ymm
// VPERMILPD.BCST imm8 m64 k zmm
// VPERMILPD.BCST imm8 m64 zmm
// VPERMILPD.BCST m64 zmm k zmm
// VPERMILPD.BCST m64 zmm zmm
//
// Construct and append a VPERMILPD.BCST instruction to the active function.
func (c *Context) VPERMILPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMILPD_BCST(ops...))
}
// VPERMILPD_BCST: Permute Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPD.BCST imm8 m64 k xmm
// VPERMILPD.BCST imm8 m64 k ymm
// VPERMILPD.BCST imm8 m64 xmm
// VPERMILPD.BCST imm8 m64 ymm
// VPERMILPD.BCST m64 xmm k xmm
// VPERMILPD.BCST m64 xmm xmm
// VPERMILPD.BCST m64 ymm k ymm
// VPERMILPD.BCST m64 ymm ymm
// VPERMILPD.BCST imm8 m64 k zmm
// VPERMILPD.BCST imm8 m64 zmm
// VPERMILPD.BCST m64 zmm k zmm
// VPERMILPD.BCST m64 zmm zmm
//
// Construct and append a VPERMILPD.BCST instruction to the active function.
// Operates on the global context.
func VPERMILPD_BCST(ops ...operand.Op) { ctx.VPERMILPD_BCST(ops...) }
// VPERMILPD_BCST_Z: Permute Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPD.BCST.Z imm8 m64 k xmm
// VPERMILPD.BCST.Z imm8 m64 k ymm
// VPERMILPD.BCST.Z m64 xmm k xmm
// VPERMILPD.BCST.Z m64 ymm k ymm
// VPERMILPD.BCST.Z imm8 m64 k zmm
// VPERMILPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMILPD.BCST.Z instruction to the active function.
func (c *Context) VPERMILPD_BCST_Z(im, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPERMILPD_BCST_Z(im, mxyz, k, xyz))
}
// VPERMILPD_BCST_Z: Permute Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPD.BCST.Z imm8 m64 k xmm
// VPERMILPD.BCST.Z imm8 m64 k ymm
// VPERMILPD.BCST.Z m64 xmm k xmm
// VPERMILPD.BCST.Z m64 ymm k ymm
// VPERMILPD.BCST.Z imm8 m64 k zmm
// VPERMILPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMILPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMILPD_BCST_Z(im, mxyz, k, xyz operand.Op) { ctx.VPERMILPD_BCST_Z(im, mxyz, k, xyz) }
// VPERMILPD_Z: Permute Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPD.Z imm8 m128 k xmm
// VPERMILPD.Z imm8 m256 k ymm
// VPERMILPD.Z imm8 xmm k xmm
// VPERMILPD.Z imm8 ymm k ymm
// VPERMILPD.Z m128 xmm k xmm
// VPERMILPD.Z m256 ymm k ymm
// VPERMILPD.Z xmm xmm k xmm
// VPERMILPD.Z ymm ymm k ymm
// VPERMILPD.Z imm8 m512 k zmm
// VPERMILPD.Z imm8 zmm k zmm
// VPERMILPD.Z m512 zmm k zmm
// VPERMILPD.Z zmm zmm k zmm
//
// Construct and append a VPERMILPD.Z instruction to the active function.
func (c *Context) VPERMILPD_Z(imxyz, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPERMILPD_Z(imxyz, mxyz, k, xyz))
}
// VPERMILPD_Z: Permute Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPD.Z imm8 m128 k xmm
// VPERMILPD.Z imm8 m256 k ymm
// VPERMILPD.Z imm8 xmm k xmm
// VPERMILPD.Z imm8 ymm k ymm
// VPERMILPD.Z m128 xmm k xmm
// VPERMILPD.Z m256 ymm k ymm
// VPERMILPD.Z xmm xmm k xmm
// VPERMILPD.Z ymm ymm k ymm
// VPERMILPD.Z imm8 m512 k zmm
// VPERMILPD.Z imm8 zmm k zmm
// VPERMILPD.Z m512 zmm k zmm
// VPERMILPD.Z zmm zmm k zmm
//
// Construct and append a VPERMILPD.Z instruction to the active function.
// Operates on the global context.
func VPERMILPD_Z(imxyz, mxyz, k, xyz operand.Op) { ctx.VPERMILPD_Z(imxyz, mxyz, k, xyz) }
// VPERMILPS: Permute Single-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPS imm8 m128 xmm
// VPERMILPS imm8 m256 ymm
// VPERMILPS imm8 xmm xmm
// VPERMILPS imm8 ymm ymm
// VPERMILPS m128 xmm xmm
// VPERMILPS m256 ymm ymm
// VPERMILPS xmm xmm xmm
// VPERMILPS ymm ymm ymm
// VPERMILPS imm8 m128 k xmm
// VPERMILPS imm8 m256 k ymm
// VPERMILPS imm8 xmm k xmm
// VPERMILPS imm8 ymm k ymm
// VPERMILPS m128 xmm k xmm
// VPERMILPS m256 ymm k ymm
// VPERMILPS xmm xmm k xmm
// VPERMILPS ymm ymm k ymm
// VPERMILPS imm8 m512 k zmm
// VPERMILPS imm8 m512 zmm
// VPERMILPS imm8 zmm k zmm
// VPERMILPS imm8 zmm zmm
// VPERMILPS m512 zmm k zmm
// VPERMILPS m512 zmm zmm
// VPERMILPS zmm zmm k zmm
// VPERMILPS zmm zmm zmm
//
// Construct and append a VPERMILPS instruction to the active function.
func (c *Context) VPERMILPS(ops ...operand.Op) {
c.addinstruction(x86.VPERMILPS(ops...))
}
// VPERMILPS: Permute Single-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPS imm8 m128 xmm
// VPERMILPS imm8 m256 ymm
// VPERMILPS imm8 xmm xmm
// VPERMILPS imm8 ymm ymm
// VPERMILPS m128 xmm xmm
// VPERMILPS m256 ymm ymm
// VPERMILPS xmm xmm xmm
// VPERMILPS ymm ymm ymm
// VPERMILPS imm8 m128 k xmm
// VPERMILPS imm8 m256 k ymm
// VPERMILPS imm8 xmm k xmm
// VPERMILPS imm8 ymm k ymm
// VPERMILPS m128 xmm k xmm
// VPERMILPS m256 ymm k ymm
// VPERMILPS xmm xmm k xmm
// VPERMILPS ymm ymm k ymm
// VPERMILPS imm8 m512 k zmm
// VPERMILPS imm8 m512 zmm
// VPERMILPS imm8 zmm k zmm
// VPERMILPS imm8 zmm zmm
// VPERMILPS m512 zmm k zmm
// VPERMILPS m512 zmm zmm
// VPERMILPS zmm zmm k zmm
// VPERMILPS zmm zmm zmm
//
// Construct and append a VPERMILPS instruction to the active function.
// Operates on the global context.
func VPERMILPS(ops ...operand.Op) { ctx.VPERMILPS(ops...) }
// VPERMILPS_BCST: Permute Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPS.BCST imm8 m32 k xmm
// VPERMILPS.BCST imm8 m32 k ymm
// VPERMILPS.BCST imm8 m32 xmm
// VPERMILPS.BCST imm8 m32 ymm
// VPERMILPS.BCST m32 xmm k xmm
// VPERMILPS.BCST m32 xmm xmm
// VPERMILPS.BCST m32 ymm k ymm
// VPERMILPS.BCST m32 ymm ymm
// VPERMILPS.BCST imm8 m32 k zmm
// VPERMILPS.BCST imm8 m32 zmm
// VPERMILPS.BCST m32 zmm k zmm
// VPERMILPS.BCST m32 zmm zmm
//
// Construct and append a VPERMILPS.BCST instruction to the active function.
func (c *Context) VPERMILPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMILPS_BCST(ops...))
}
// VPERMILPS_BCST: Permute Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPS.BCST imm8 m32 k xmm
// VPERMILPS.BCST imm8 m32 k ymm
// VPERMILPS.BCST imm8 m32 xmm
// VPERMILPS.BCST imm8 m32 ymm
// VPERMILPS.BCST m32 xmm k xmm
// VPERMILPS.BCST m32 xmm xmm
// VPERMILPS.BCST m32 ymm k ymm
// VPERMILPS.BCST m32 ymm ymm
// VPERMILPS.BCST imm8 m32 k zmm
// VPERMILPS.BCST imm8 m32 zmm
// VPERMILPS.BCST m32 zmm k zmm
// VPERMILPS.BCST m32 zmm zmm
//
// Construct and append a VPERMILPS.BCST instruction to the active function.
// Operates on the global context.
func VPERMILPS_BCST(ops ...operand.Op) { ctx.VPERMILPS_BCST(ops...) }
// VPERMILPS_BCST_Z: Permute Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPS.BCST.Z imm8 m32 k xmm
// VPERMILPS.BCST.Z imm8 m32 k ymm
// VPERMILPS.BCST.Z m32 xmm k xmm
// VPERMILPS.BCST.Z m32 ymm k ymm
// VPERMILPS.BCST.Z imm8 m32 k zmm
// VPERMILPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMILPS.BCST.Z instruction to the active function.
func (c *Context) VPERMILPS_BCST_Z(im, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPERMILPS_BCST_Z(im, mxyz, k, xyz))
}
// VPERMILPS_BCST_Z: Permute Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPS.BCST.Z imm8 m32 k xmm
// VPERMILPS.BCST.Z imm8 m32 k ymm
// VPERMILPS.BCST.Z m32 xmm k xmm
// VPERMILPS.BCST.Z m32 ymm k ymm
// VPERMILPS.BCST.Z imm8 m32 k zmm
// VPERMILPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMILPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMILPS_BCST_Z(im, mxyz, k, xyz operand.Op) { ctx.VPERMILPS_BCST_Z(im, mxyz, k, xyz) }
// VPERMILPS_Z: Permute Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPS.Z imm8 m128 k xmm
// VPERMILPS.Z imm8 m256 k ymm
// VPERMILPS.Z imm8 xmm k xmm
// VPERMILPS.Z imm8 ymm k ymm
// VPERMILPS.Z m128 xmm k xmm
// VPERMILPS.Z m256 ymm k ymm
// VPERMILPS.Z xmm xmm k xmm
// VPERMILPS.Z ymm ymm k ymm
// VPERMILPS.Z imm8 m512 k zmm
// VPERMILPS.Z imm8 zmm k zmm
// VPERMILPS.Z m512 zmm k zmm
// VPERMILPS.Z zmm zmm k zmm
//
// Construct and append a VPERMILPS.Z instruction to the active function.
func (c *Context) VPERMILPS_Z(imxyz, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPERMILPS_Z(imxyz, mxyz, k, xyz))
}
// VPERMILPS_Z: Permute Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPS.Z imm8 m128 k xmm
// VPERMILPS.Z imm8 m256 k ymm
// VPERMILPS.Z imm8 xmm k xmm
// VPERMILPS.Z imm8 ymm k ymm
// VPERMILPS.Z m128 xmm k xmm
// VPERMILPS.Z m256 ymm k ymm
// VPERMILPS.Z xmm xmm k xmm
// VPERMILPS.Z ymm ymm k ymm
// VPERMILPS.Z imm8 m512 k zmm
// VPERMILPS.Z imm8 zmm k zmm
// VPERMILPS.Z m512 zmm k zmm
// VPERMILPS.Z zmm zmm k zmm
//
// Construct and append a VPERMILPS.Z instruction to the active function.
// Operates on the global context.
func VPERMILPS_Z(imxyz, mxyz, k, xyz operand.Op) { ctx.VPERMILPS_Z(imxyz, mxyz, k, xyz) }
// VPERMPD: Permute Double-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPD imm8 m256 ymm
// VPERMPD imm8 ymm ymm
// VPERMPD imm8 m256 k ymm
// VPERMPD imm8 ymm k ymm
// VPERMPD m256 ymm k ymm
// VPERMPD m256 ymm ymm
// VPERMPD ymm ymm k ymm
// VPERMPD ymm ymm ymm
// VPERMPD imm8 m512 k zmm
// VPERMPD imm8 m512 zmm
// VPERMPD imm8 zmm k zmm
// VPERMPD imm8 zmm zmm
// VPERMPD m512 zmm k zmm
// VPERMPD m512 zmm zmm
// VPERMPD zmm zmm k zmm
// VPERMPD zmm zmm zmm
//
// Construct and append a VPERMPD instruction to the active function.
func (c *Context) VPERMPD(ops ...operand.Op) {
c.addinstruction(x86.VPERMPD(ops...))
}
// VPERMPD: Permute Double-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPD imm8 m256 ymm
// VPERMPD imm8 ymm ymm
// VPERMPD imm8 m256 k ymm
// VPERMPD imm8 ymm k ymm
// VPERMPD m256 ymm k ymm
// VPERMPD m256 ymm ymm
// VPERMPD ymm ymm k ymm
// VPERMPD ymm ymm ymm
// VPERMPD imm8 m512 k zmm
// VPERMPD imm8 m512 zmm
// VPERMPD imm8 zmm k zmm
// VPERMPD imm8 zmm zmm
// VPERMPD m512 zmm k zmm
// VPERMPD m512 zmm zmm
// VPERMPD zmm zmm k zmm
// VPERMPD zmm zmm zmm
//
// Construct and append a VPERMPD instruction to the active function.
// Operates on the global context.
func VPERMPD(ops ...operand.Op) { ctx.VPERMPD(ops...) }
// VPERMPD_BCST: Permute Double-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPD.BCST imm8 m64 k ymm
// VPERMPD.BCST imm8 m64 ymm
// VPERMPD.BCST m64 ymm k ymm
// VPERMPD.BCST m64 ymm ymm
// VPERMPD.BCST imm8 m64 k zmm
// VPERMPD.BCST imm8 m64 zmm
// VPERMPD.BCST m64 zmm k zmm
// VPERMPD.BCST m64 zmm zmm
//
// Construct and append a VPERMPD.BCST instruction to the active function.
func (c *Context) VPERMPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMPD_BCST(ops...))
}
// VPERMPD_BCST: Permute Double-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPD.BCST imm8 m64 k ymm
// VPERMPD.BCST imm8 m64 ymm
// VPERMPD.BCST m64 ymm k ymm
// VPERMPD.BCST m64 ymm ymm
// VPERMPD.BCST imm8 m64 k zmm
// VPERMPD.BCST imm8 m64 zmm
// VPERMPD.BCST m64 zmm k zmm
// VPERMPD.BCST m64 zmm zmm
//
// Construct and append a VPERMPD.BCST instruction to the active function.
// Operates on the global context.
func VPERMPD_BCST(ops ...operand.Op) { ctx.VPERMPD_BCST(ops...) }
// VPERMPD_BCST_Z: Permute Double-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPD.BCST.Z imm8 m64 k ymm
// VPERMPD.BCST.Z m64 ymm k ymm
// VPERMPD.BCST.Z imm8 m64 k zmm
// VPERMPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMPD.BCST.Z instruction to the active function.
func (c *Context) VPERMPD_BCST_Z(im, myz, k, yz operand.Op) {
c.addinstruction(x86.VPERMPD_BCST_Z(im, myz, k, yz))
}
// VPERMPD_BCST_Z: Permute Double-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPD.BCST.Z imm8 m64 k ymm
// VPERMPD.BCST.Z m64 ymm k ymm
// VPERMPD.BCST.Z imm8 m64 k zmm
// VPERMPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMPD_BCST_Z(im, myz, k, yz operand.Op) { ctx.VPERMPD_BCST_Z(im, myz, k, yz) }
// VPERMPD_Z: Permute Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPD.Z imm8 m256 k ymm
// VPERMPD.Z imm8 ymm k ymm
// VPERMPD.Z m256 ymm k ymm
// VPERMPD.Z ymm ymm k ymm
// VPERMPD.Z imm8 m512 k zmm
// VPERMPD.Z imm8 zmm k zmm
// VPERMPD.Z m512 zmm k zmm
// VPERMPD.Z zmm zmm k zmm
//
// Construct and append a VPERMPD.Z instruction to the active function.
func (c *Context) VPERMPD_Z(imyz, myz, k, yz operand.Op) {
c.addinstruction(x86.VPERMPD_Z(imyz, myz, k, yz))
}
// VPERMPD_Z: Permute Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPD.Z imm8 m256 k ymm
// VPERMPD.Z imm8 ymm k ymm
// VPERMPD.Z m256 ymm k ymm
// VPERMPD.Z ymm ymm k ymm
// VPERMPD.Z imm8 m512 k zmm
// VPERMPD.Z imm8 zmm k zmm
// VPERMPD.Z m512 zmm k zmm
// VPERMPD.Z zmm zmm k zmm
//
// Construct and append a VPERMPD.Z instruction to the active function.
// Operates on the global context.
func VPERMPD_Z(imyz, myz, k, yz operand.Op) { ctx.VPERMPD_Z(imyz, myz, k, yz) }
// VPERMPS: Permute Single-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPS m256 ymm ymm
// VPERMPS ymm ymm ymm
// VPERMPS m256 ymm k ymm
// VPERMPS ymm ymm k ymm
// VPERMPS m512 zmm k zmm
// VPERMPS m512 zmm zmm
// VPERMPS zmm zmm k zmm
// VPERMPS zmm zmm zmm
//
// Construct and append a VPERMPS instruction to the active function.
func (c *Context) VPERMPS(ops ...operand.Op) {
c.addinstruction(x86.VPERMPS(ops...))
}
// VPERMPS: Permute Single-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPS m256 ymm ymm
// VPERMPS ymm ymm ymm
// VPERMPS m256 ymm k ymm
// VPERMPS ymm ymm k ymm
// VPERMPS m512 zmm k zmm
// VPERMPS m512 zmm zmm
// VPERMPS zmm zmm k zmm
// VPERMPS zmm zmm zmm
//
// Construct and append a VPERMPS instruction to the active function.
// Operates on the global context.
func VPERMPS(ops ...operand.Op) { ctx.VPERMPS(ops...) }
// VPERMPS_BCST: Permute Single-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPS.BCST m32 ymm k ymm
// VPERMPS.BCST m32 ymm ymm
// VPERMPS.BCST m32 zmm k zmm
// VPERMPS.BCST m32 zmm zmm
//
// Construct and append a VPERMPS.BCST instruction to the active function.
func (c *Context) VPERMPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMPS_BCST(ops...))
}
// VPERMPS_BCST: Permute Single-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPS.BCST m32 ymm k ymm
// VPERMPS.BCST m32 ymm ymm
// VPERMPS.BCST m32 zmm k zmm
// VPERMPS.BCST m32 zmm zmm
//
// Construct and append a VPERMPS.BCST instruction to the active function.
// Operates on the global context.
func VPERMPS_BCST(ops ...operand.Op) { ctx.VPERMPS_BCST(ops...) }
// VPERMPS_BCST_Z: Permute Single-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPS.BCST.Z m32 ymm k ymm
// VPERMPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMPS.BCST.Z instruction to the active function.
func (c *Context) VPERMPS_BCST_Z(m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VPERMPS_BCST_Z(m, yz, k, yz1))
}
// VPERMPS_BCST_Z: Permute Single-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPS.BCST.Z m32 ymm k ymm
// VPERMPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMPS_BCST_Z(m, yz, k, yz1 operand.Op) { ctx.VPERMPS_BCST_Z(m, yz, k, yz1) }
// VPERMPS_Z: Permute Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPS.Z m256 ymm k ymm
// VPERMPS.Z ymm ymm k ymm
// VPERMPS.Z m512 zmm k zmm
// VPERMPS.Z zmm zmm k zmm
//
// Construct and append a VPERMPS.Z instruction to the active function.
func (c *Context) VPERMPS_Z(myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VPERMPS_Z(myz, yz, k, yz1))
}
// VPERMPS_Z: Permute Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPS.Z m256 ymm k ymm
// VPERMPS.Z ymm ymm k ymm
// VPERMPS.Z m512 zmm k zmm
// VPERMPS.Z zmm zmm k zmm
//
// Construct and append a VPERMPS.Z instruction to the active function.
// Operates on the global context.
func VPERMPS_Z(myz, yz, k, yz1 operand.Op) { ctx.VPERMPS_Z(myz, yz, k, yz1) }
// VPERMQ: Permute Quadword Integers.
//
// Forms:
//
// VPERMQ imm8 m256 ymm
// VPERMQ imm8 ymm ymm
// VPERMQ imm8 m256 k ymm
// VPERMQ imm8 ymm k ymm
// VPERMQ m256 ymm k ymm
// VPERMQ m256 ymm ymm
// VPERMQ ymm ymm k ymm
// VPERMQ ymm ymm ymm
// VPERMQ imm8 m512 k zmm
// VPERMQ imm8 m512 zmm
// VPERMQ imm8 zmm k zmm
// VPERMQ imm8 zmm zmm
// VPERMQ m512 zmm k zmm
// VPERMQ m512 zmm zmm
// VPERMQ zmm zmm k zmm
// VPERMQ zmm zmm zmm
//
// Construct and append a VPERMQ instruction to the active function.
func (c *Context) VPERMQ(ops ...operand.Op) {
c.addinstruction(x86.VPERMQ(ops...))
}
// VPERMQ: Permute Quadword Integers.
//
// Forms:
//
// VPERMQ imm8 m256 ymm
// VPERMQ imm8 ymm ymm
// VPERMQ imm8 m256 k ymm
// VPERMQ imm8 ymm k ymm
// VPERMQ m256 ymm k ymm
// VPERMQ m256 ymm ymm
// VPERMQ ymm ymm k ymm
// VPERMQ ymm ymm ymm
// VPERMQ imm8 m512 k zmm
// VPERMQ imm8 m512 zmm
// VPERMQ imm8 zmm k zmm
// VPERMQ imm8 zmm zmm
// VPERMQ m512 zmm k zmm
// VPERMQ m512 zmm zmm
// VPERMQ zmm zmm k zmm
// VPERMQ zmm zmm zmm
//
// Construct and append a VPERMQ instruction to the active function.
// Operates on the global context.
func VPERMQ(ops ...operand.Op) { ctx.VPERMQ(ops...) }
// VPERMQ_BCST: Permute Quadword Integers (Broadcast).
//
// Forms:
//
// VPERMQ.BCST imm8 m64 k ymm
// VPERMQ.BCST imm8 m64 ymm
// VPERMQ.BCST m64 ymm k ymm
// VPERMQ.BCST m64 ymm ymm
// VPERMQ.BCST imm8 m64 k zmm
// VPERMQ.BCST imm8 m64 zmm
// VPERMQ.BCST m64 zmm k zmm
// VPERMQ.BCST m64 zmm zmm
//
// Construct and append a VPERMQ.BCST instruction to the active function.
func (c *Context) VPERMQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMQ_BCST(ops...))
}
// VPERMQ_BCST: Permute Quadword Integers (Broadcast).
//
// Forms:
//
// VPERMQ.BCST imm8 m64 k ymm
// VPERMQ.BCST imm8 m64 ymm
// VPERMQ.BCST m64 ymm k ymm
// VPERMQ.BCST m64 ymm ymm
// VPERMQ.BCST imm8 m64 k zmm
// VPERMQ.BCST imm8 m64 zmm
// VPERMQ.BCST m64 zmm k zmm
// VPERMQ.BCST m64 zmm zmm
//
// Construct and append a VPERMQ.BCST instruction to the active function.
// Operates on the global context.
func VPERMQ_BCST(ops ...operand.Op) { ctx.VPERMQ_BCST(ops...) }
// VPERMQ_BCST_Z: Permute Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMQ.BCST.Z imm8 m64 k ymm
// VPERMQ.BCST.Z m64 ymm k ymm
// VPERMQ.BCST.Z imm8 m64 k zmm
// VPERMQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMQ.BCST.Z instruction to the active function.
func (c *Context) VPERMQ_BCST_Z(im, myz, k, yz operand.Op) {
c.addinstruction(x86.VPERMQ_BCST_Z(im, myz, k, yz))
}
// VPERMQ_BCST_Z: Permute Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMQ.BCST.Z imm8 m64 k ymm
// VPERMQ.BCST.Z m64 ymm k ymm
// VPERMQ.BCST.Z imm8 m64 k zmm
// VPERMQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMQ_BCST_Z(im, myz, k, yz operand.Op) { ctx.VPERMQ_BCST_Z(im, myz, k, yz) }
// VPERMQ_Z: Permute Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMQ.Z imm8 m256 k ymm
// VPERMQ.Z imm8 ymm k ymm
// VPERMQ.Z m256 ymm k ymm
// VPERMQ.Z ymm ymm k ymm
// VPERMQ.Z imm8 m512 k zmm
// VPERMQ.Z imm8 zmm k zmm
// VPERMQ.Z m512 zmm k zmm
// VPERMQ.Z zmm zmm k zmm
//
// Construct and append a VPERMQ.Z instruction to the active function.
func (c *Context) VPERMQ_Z(imyz, myz, k, yz operand.Op) {
c.addinstruction(x86.VPERMQ_Z(imyz, myz, k, yz))
}
// VPERMQ_Z: Permute Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMQ.Z imm8 m256 k ymm
// VPERMQ.Z imm8 ymm k ymm
// VPERMQ.Z m256 ymm k ymm
// VPERMQ.Z ymm ymm k ymm
// VPERMQ.Z imm8 m512 k zmm
// VPERMQ.Z imm8 zmm k zmm
// VPERMQ.Z m512 zmm k zmm
// VPERMQ.Z zmm zmm k zmm
//
// Construct and append a VPERMQ.Z instruction to the active function.
// Operates on the global context.
func VPERMQ_Z(imyz, myz, k, yz operand.Op) { ctx.VPERMQ_Z(imyz, myz, k, yz) }
// VPERMT2B: Full Permute of Bytes From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2B m128 xmm k xmm
// VPERMT2B m128 xmm xmm
// VPERMT2B m256 ymm k ymm
// VPERMT2B m256 ymm ymm
// VPERMT2B xmm xmm k xmm
// VPERMT2B xmm xmm xmm
// VPERMT2B ymm ymm k ymm
// VPERMT2B ymm ymm ymm
// VPERMT2B m512 zmm k zmm
// VPERMT2B m512 zmm zmm
// VPERMT2B zmm zmm k zmm
// VPERMT2B zmm zmm zmm
//
// Construct and append a VPERMT2B instruction to the active function.
func (c *Context) VPERMT2B(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2B(ops...))
}
// VPERMT2B: Full Permute of Bytes From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2B m128 xmm k xmm
// VPERMT2B m128 xmm xmm
// VPERMT2B m256 ymm k ymm
// VPERMT2B m256 ymm ymm
// VPERMT2B xmm xmm k xmm
// VPERMT2B xmm xmm xmm
// VPERMT2B ymm ymm k ymm
// VPERMT2B ymm ymm ymm
// VPERMT2B m512 zmm k zmm
// VPERMT2B m512 zmm zmm
// VPERMT2B zmm zmm k zmm
// VPERMT2B zmm zmm zmm
//
// Construct and append a VPERMT2B instruction to the active function.
// Operates on the global context.
func VPERMT2B(ops ...operand.Op) { ctx.VPERMT2B(ops...) }
// VPERMT2B_Z: Full Permute of Bytes From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2B.Z m128 xmm k xmm
// VPERMT2B.Z m256 ymm k ymm
// VPERMT2B.Z xmm xmm k xmm
// VPERMT2B.Z ymm ymm k ymm
// VPERMT2B.Z m512 zmm k zmm
// VPERMT2B.Z zmm zmm k zmm
//
// Construct and append a VPERMT2B.Z instruction to the active function.
func (c *Context) VPERMT2B_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2B_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2B_Z: Full Permute of Bytes From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2B.Z m128 xmm k xmm
// VPERMT2B.Z m256 ymm k ymm
// VPERMT2B.Z xmm xmm k xmm
// VPERMT2B.Z ymm ymm k ymm
// VPERMT2B.Z m512 zmm k zmm
// VPERMT2B.Z zmm zmm k zmm
//
// Construct and append a VPERMT2B.Z instruction to the active function.
// Operates on the global context.
func VPERMT2B_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2B_Z(mxyz, xyz, k, xyz1) }
// VPERMT2D: Full Permute of Doublewords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2D m128 xmm k xmm
// VPERMT2D m128 xmm xmm
// VPERMT2D m256 ymm k ymm
// VPERMT2D m256 ymm ymm
// VPERMT2D xmm xmm k xmm
// VPERMT2D xmm xmm xmm
// VPERMT2D ymm ymm k ymm
// VPERMT2D ymm ymm ymm
// VPERMT2D m512 zmm k zmm
// VPERMT2D m512 zmm zmm
// VPERMT2D zmm zmm k zmm
// VPERMT2D zmm zmm zmm
//
// Construct and append a VPERMT2D instruction to the active function.
func (c *Context) VPERMT2D(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2D(ops...))
}
// VPERMT2D: Full Permute of Doublewords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2D m128 xmm k xmm
// VPERMT2D m128 xmm xmm
// VPERMT2D m256 ymm k ymm
// VPERMT2D m256 ymm ymm
// VPERMT2D xmm xmm k xmm
// VPERMT2D xmm xmm xmm
// VPERMT2D ymm ymm k ymm
// VPERMT2D ymm ymm ymm
// VPERMT2D m512 zmm k zmm
// VPERMT2D m512 zmm zmm
// VPERMT2D zmm zmm k zmm
// VPERMT2D zmm zmm zmm
//
// Construct and append a VPERMT2D instruction to the active function.
// Operates on the global context.
func VPERMT2D(ops ...operand.Op) { ctx.VPERMT2D(ops...) }
// VPERMT2D_BCST: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2D.BCST m32 xmm k xmm
// VPERMT2D.BCST m32 xmm xmm
// VPERMT2D.BCST m32 ymm k ymm
// VPERMT2D.BCST m32 ymm ymm
// VPERMT2D.BCST m32 zmm k zmm
// VPERMT2D.BCST m32 zmm zmm
//
// Construct and append a VPERMT2D.BCST instruction to the active function.
func (c *Context) VPERMT2D_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2D_BCST(ops...))
}
// VPERMT2D_BCST: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2D.BCST m32 xmm k xmm
// VPERMT2D.BCST m32 xmm xmm
// VPERMT2D.BCST m32 ymm k ymm
// VPERMT2D.BCST m32 ymm ymm
// VPERMT2D.BCST m32 zmm k zmm
// VPERMT2D.BCST m32 zmm zmm
//
// Construct and append a VPERMT2D.BCST instruction to the active function.
// Operates on the global context.
func VPERMT2D_BCST(ops ...operand.Op) { ctx.VPERMT2D_BCST(ops...) }
// VPERMT2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2D.BCST.Z m32 xmm k xmm
// VPERMT2D.BCST.Z m32 ymm k ymm
// VPERMT2D.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMT2D.BCST.Z instruction to the active function.
func (c *Context) VPERMT2D_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2D_BCST_Z(m, xyz, k, xyz1))
}
// VPERMT2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2D.BCST.Z m32 xmm k xmm
// VPERMT2D.BCST.Z m32 ymm k ymm
// VPERMT2D.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMT2D.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMT2D_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMT2D_BCST_Z(m, xyz, k, xyz1) }
// VPERMT2D_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2D.Z m128 xmm k xmm
// VPERMT2D.Z m256 ymm k ymm
// VPERMT2D.Z xmm xmm k xmm
// VPERMT2D.Z ymm ymm k ymm
// VPERMT2D.Z m512 zmm k zmm
// VPERMT2D.Z zmm zmm k zmm
//
// Construct and append a VPERMT2D.Z instruction to the active function.
func (c *Context) VPERMT2D_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2D_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2D_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2D.Z m128 xmm k xmm
// VPERMT2D.Z m256 ymm k ymm
// VPERMT2D.Z xmm xmm k xmm
// VPERMT2D.Z ymm ymm k ymm
// VPERMT2D.Z m512 zmm k zmm
// VPERMT2D.Z zmm zmm k zmm
//
// Construct and append a VPERMT2D.Z instruction to the active function.
// Operates on the global context.
func VPERMT2D_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2D_Z(mxyz, xyz, k, xyz1) }
// VPERMT2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PD m128 xmm k xmm
// VPERMT2PD m128 xmm xmm
// VPERMT2PD m256 ymm k ymm
// VPERMT2PD m256 ymm ymm
// VPERMT2PD xmm xmm k xmm
// VPERMT2PD xmm xmm xmm
// VPERMT2PD ymm ymm k ymm
// VPERMT2PD ymm ymm ymm
// VPERMT2PD m512 zmm k zmm
// VPERMT2PD m512 zmm zmm
// VPERMT2PD zmm zmm k zmm
// VPERMT2PD zmm zmm zmm
//
// Construct and append a VPERMT2PD instruction to the active function.
func (c *Context) VPERMT2PD(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2PD(ops...))
}
// VPERMT2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PD m128 xmm k xmm
// VPERMT2PD m128 xmm xmm
// VPERMT2PD m256 ymm k ymm
// VPERMT2PD m256 ymm ymm
// VPERMT2PD xmm xmm k xmm
// VPERMT2PD xmm xmm xmm
// VPERMT2PD ymm ymm k ymm
// VPERMT2PD ymm ymm ymm
// VPERMT2PD m512 zmm k zmm
// VPERMT2PD m512 zmm zmm
// VPERMT2PD zmm zmm k zmm
// VPERMT2PD zmm zmm zmm
//
// Construct and append a VPERMT2PD instruction to the active function.
// Operates on the global context.
func VPERMT2PD(ops ...operand.Op) { ctx.VPERMT2PD(ops...) }
// VPERMT2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PD.BCST m64 xmm k xmm
// VPERMT2PD.BCST m64 xmm xmm
// VPERMT2PD.BCST m64 ymm k ymm
// VPERMT2PD.BCST m64 ymm ymm
// VPERMT2PD.BCST m64 zmm k zmm
// VPERMT2PD.BCST m64 zmm zmm
//
// Construct and append a VPERMT2PD.BCST instruction to the active function.
func (c *Context) VPERMT2PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2PD_BCST(ops...))
}
// VPERMT2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PD.BCST m64 xmm k xmm
// VPERMT2PD.BCST m64 xmm xmm
// VPERMT2PD.BCST m64 ymm k ymm
// VPERMT2PD.BCST m64 ymm ymm
// VPERMT2PD.BCST m64 zmm k zmm
// VPERMT2PD.BCST m64 zmm zmm
//
// Construct and append a VPERMT2PD.BCST instruction to the active function.
// Operates on the global context.
func VPERMT2PD_BCST(ops ...operand.Op) { ctx.VPERMT2PD_BCST(ops...) }
// VPERMT2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.BCST.Z m64 xmm k xmm
// VPERMT2PD.BCST.Z m64 ymm k ymm
// VPERMT2PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMT2PD.BCST.Z instruction to the active function.
func (c *Context) VPERMT2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2PD_BCST_Z(m, xyz, k, xyz1))
}
// VPERMT2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.BCST.Z m64 xmm k xmm
// VPERMT2PD.BCST.Z m64 ymm k ymm
// VPERMT2PD.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMT2PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMT2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMT2PD_BCST_Z(m, xyz, k, xyz1) }
// VPERMT2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.Z m128 xmm k xmm
// VPERMT2PD.Z m256 ymm k ymm
// VPERMT2PD.Z xmm xmm k xmm
// VPERMT2PD.Z ymm ymm k ymm
// VPERMT2PD.Z m512 zmm k zmm
// VPERMT2PD.Z zmm zmm k zmm
//
// Construct and append a VPERMT2PD.Z instruction to the active function.
func (c *Context) VPERMT2PD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2PD_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.Z m128 xmm k xmm
// VPERMT2PD.Z m256 ymm k ymm
// VPERMT2PD.Z xmm xmm k xmm
// VPERMT2PD.Z ymm ymm k ymm
// VPERMT2PD.Z m512 zmm k zmm
// VPERMT2PD.Z zmm zmm k zmm
//
// Construct and append a VPERMT2PD.Z instruction to the active function.
// Operates on the global context.
func VPERMT2PD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2PD_Z(mxyz, xyz, k, xyz1) }
// VPERMT2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PS m128 xmm k xmm
// VPERMT2PS m128 xmm xmm
// VPERMT2PS m256 ymm k ymm
// VPERMT2PS m256 ymm ymm
// VPERMT2PS xmm xmm k xmm
// VPERMT2PS xmm xmm xmm
// VPERMT2PS ymm ymm k ymm
// VPERMT2PS ymm ymm ymm
// VPERMT2PS m512 zmm k zmm
// VPERMT2PS m512 zmm zmm
// VPERMT2PS zmm zmm k zmm
// VPERMT2PS zmm zmm zmm
//
// Construct and append a VPERMT2PS instruction to the active function.
func (c *Context) VPERMT2PS(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2PS(ops...))
}
// VPERMT2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PS m128 xmm k xmm
// VPERMT2PS m128 xmm xmm
// VPERMT2PS m256 ymm k ymm
// VPERMT2PS m256 ymm ymm
// VPERMT2PS xmm xmm k xmm
// VPERMT2PS xmm xmm xmm
// VPERMT2PS ymm ymm k ymm
// VPERMT2PS ymm ymm ymm
// VPERMT2PS m512 zmm k zmm
// VPERMT2PS m512 zmm zmm
// VPERMT2PS zmm zmm k zmm
// VPERMT2PS zmm zmm zmm
//
// Construct and append a VPERMT2PS instruction to the active function.
// Operates on the global context.
func VPERMT2PS(ops ...operand.Op) { ctx.VPERMT2PS(ops...) }
// VPERMT2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PS.BCST m32 xmm k xmm
// VPERMT2PS.BCST m32 xmm xmm
// VPERMT2PS.BCST m32 ymm k ymm
// VPERMT2PS.BCST m32 ymm ymm
// VPERMT2PS.BCST m32 zmm k zmm
// VPERMT2PS.BCST m32 zmm zmm
//
// Construct and append a VPERMT2PS.BCST instruction to the active function.
func (c *Context) VPERMT2PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2PS_BCST(ops...))
}
// VPERMT2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PS.BCST m32 xmm k xmm
// VPERMT2PS.BCST m32 xmm xmm
// VPERMT2PS.BCST m32 ymm k ymm
// VPERMT2PS.BCST m32 ymm ymm
// VPERMT2PS.BCST m32 zmm k zmm
// VPERMT2PS.BCST m32 zmm zmm
//
// Construct and append a VPERMT2PS.BCST instruction to the active function.
// Operates on the global context.
func VPERMT2PS_BCST(ops ...operand.Op) { ctx.VPERMT2PS_BCST(ops...) }
// VPERMT2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.BCST.Z m32 xmm k xmm
// VPERMT2PS.BCST.Z m32 ymm k ymm
// VPERMT2PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMT2PS.BCST.Z instruction to the active function.
func (c *Context) VPERMT2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2PS_BCST_Z(m, xyz, k, xyz1))
}
// VPERMT2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.BCST.Z m32 xmm k xmm
// VPERMT2PS.BCST.Z m32 ymm k ymm
// VPERMT2PS.BCST.Z m32 zmm k zmm
//
// Construct and append a VPERMT2PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMT2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMT2PS_BCST_Z(m, xyz, k, xyz1) }
// VPERMT2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.Z m128 xmm k xmm
// VPERMT2PS.Z m256 ymm k ymm
// VPERMT2PS.Z xmm xmm k xmm
// VPERMT2PS.Z ymm ymm k ymm
// VPERMT2PS.Z m512 zmm k zmm
// VPERMT2PS.Z zmm zmm k zmm
//
// Construct and append a VPERMT2PS.Z instruction to the active function.
func (c *Context) VPERMT2PS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2PS_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.Z m128 xmm k xmm
// VPERMT2PS.Z m256 ymm k ymm
// VPERMT2PS.Z xmm xmm k xmm
// VPERMT2PS.Z ymm ymm k ymm
// VPERMT2PS.Z m512 zmm k zmm
// VPERMT2PS.Z zmm zmm k zmm
//
// Construct and append a VPERMT2PS.Z instruction to the active function.
// Operates on the global context.
func VPERMT2PS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2PS_Z(mxyz, xyz, k, xyz1) }
// VPERMT2Q: Full Permute of Quadwords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2Q m128 xmm k xmm
// VPERMT2Q m128 xmm xmm
// VPERMT2Q m256 ymm k ymm
// VPERMT2Q m256 ymm ymm
// VPERMT2Q xmm xmm k xmm
// VPERMT2Q xmm xmm xmm
// VPERMT2Q ymm ymm k ymm
// VPERMT2Q ymm ymm ymm
// VPERMT2Q m512 zmm k zmm
// VPERMT2Q m512 zmm zmm
// VPERMT2Q zmm zmm k zmm
// VPERMT2Q zmm zmm zmm
//
// Construct and append a VPERMT2Q instruction to the active function.
func (c *Context) VPERMT2Q(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2Q(ops...))
}
// VPERMT2Q: Full Permute of Quadwords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2Q m128 xmm k xmm
// VPERMT2Q m128 xmm xmm
// VPERMT2Q m256 ymm k ymm
// VPERMT2Q m256 ymm ymm
// VPERMT2Q xmm xmm k xmm
// VPERMT2Q xmm xmm xmm
// VPERMT2Q ymm ymm k ymm
// VPERMT2Q ymm ymm ymm
// VPERMT2Q m512 zmm k zmm
// VPERMT2Q m512 zmm zmm
// VPERMT2Q zmm zmm k zmm
// VPERMT2Q zmm zmm zmm
//
// Construct and append a VPERMT2Q instruction to the active function.
// Operates on the global context.
func VPERMT2Q(ops ...operand.Op) { ctx.VPERMT2Q(ops...) }
// VPERMT2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2Q.BCST m64 xmm k xmm
// VPERMT2Q.BCST m64 xmm xmm
// VPERMT2Q.BCST m64 ymm k ymm
// VPERMT2Q.BCST m64 ymm ymm
// VPERMT2Q.BCST m64 zmm k zmm
// VPERMT2Q.BCST m64 zmm zmm
//
// Construct and append a VPERMT2Q.BCST instruction to the active function.
func (c *Context) VPERMT2Q_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2Q_BCST(ops...))
}
// VPERMT2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2Q.BCST m64 xmm k xmm
// VPERMT2Q.BCST m64 xmm xmm
// VPERMT2Q.BCST m64 ymm k ymm
// VPERMT2Q.BCST m64 ymm ymm
// VPERMT2Q.BCST m64 zmm k zmm
// VPERMT2Q.BCST m64 zmm zmm
//
// Construct and append a VPERMT2Q.BCST instruction to the active function.
// Operates on the global context.
func VPERMT2Q_BCST(ops ...operand.Op) { ctx.VPERMT2Q_BCST(ops...) }
// VPERMT2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.BCST.Z m64 xmm k xmm
// VPERMT2Q.BCST.Z m64 ymm k ymm
// VPERMT2Q.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMT2Q.BCST.Z instruction to the active function.
func (c *Context) VPERMT2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2Q_BCST_Z(m, xyz, k, xyz1))
}
// VPERMT2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.BCST.Z m64 xmm k xmm
// VPERMT2Q.BCST.Z m64 ymm k ymm
// VPERMT2Q.BCST.Z m64 zmm k zmm
//
// Construct and append a VPERMT2Q.BCST.Z instruction to the active function.
// Operates on the global context.
func VPERMT2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPERMT2Q_BCST_Z(m, xyz, k, xyz1) }
// VPERMT2Q_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.Z m128 xmm k xmm
// VPERMT2Q.Z m256 ymm k ymm
// VPERMT2Q.Z xmm xmm k xmm
// VPERMT2Q.Z ymm ymm k ymm
// VPERMT2Q.Z m512 zmm k zmm
// VPERMT2Q.Z zmm zmm k zmm
//
// Construct and append a VPERMT2Q.Z instruction to the active function.
func (c *Context) VPERMT2Q_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2Q_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2Q_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.Z m128 xmm k xmm
// VPERMT2Q.Z m256 ymm k ymm
// VPERMT2Q.Z xmm xmm k xmm
// VPERMT2Q.Z ymm ymm k ymm
// VPERMT2Q.Z m512 zmm k zmm
// VPERMT2Q.Z zmm zmm k zmm
//
// Construct and append a VPERMT2Q.Z instruction to the active function.
// Operates on the global context.
func VPERMT2Q_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2Q_Z(mxyz, xyz, k, xyz1) }
// VPERMT2W: Full Permute of Words From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2W m128 xmm k xmm
// VPERMT2W m128 xmm xmm
// VPERMT2W m256 ymm k ymm
// VPERMT2W m256 ymm ymm
// VPERMT2W xmm xmm k xmm
// VPERMT2W xmm xmm xmm
// VPERMT2W ymm ymm k ymm
// VPERMT2W ymm ymm ymm
// VPERMT2W m512 zmm k zmm
// VPERMT2W m512 zmm zmm
// VPERMT2W zmm zmm k zmm
// VPERMT2W zmm zmm zmm
//
// Construct and append a VPERMT2W instruction to the active function.
func (c *Context) VPERMT2W(ops ...operand.Op) {
c.addinstruction(x86.VPERMT2W(ops...))
}
// VPERMT2W: Full Permute of Words From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2W m128 xmm k xmm
// VPERMT2W m128 xmm xmm
// VPERMT2W m256 ymm k ymm
// VPERMT2W m256 ymm ymm
// VPERMT2W xmm xmm k xmm
// VPERMT2W xmm xmm xmm
// VPERMT2W ymm ymm k ymm
// VPERMT2W ymm ymm ymm
// VPERMT2W m512 zmm k zmm
// VPERMT2W m512 zmm zmm
// VPERMT2W zmm zmm k zmm
// VPERMT2W zmm zmm zmm
//
// Construct and append a VPERMT2W instruction to the active function.
// Operates on the global context.
func VPERMT2W(ops ...operand.Op) { ctx.VPERMT2W(ops...) }
// VPERMT2W_Z: Full Permute of Words From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2W.Z m128 xmm k xmm
// VPERMT2W.Z m256 ymm k ymm
// VPERMT2W.Z xmm xmm k xmm
// VPERMT2W.Z ymm ymm k ymm
// VPERMT2W.Z m512 zmm k zmm
// VPERMT2W.Z zmm zmm k zmm
//
// Construct and append a VPERMT2W.Z instruction to the active function.
func (c *Context) VPERMT2W_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMT2W_Z(mxyz, xyz, k, xyz1))
}
// VPERMT2W_Z: Full Permute of Words From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2W.Z m128 xmm k xmm
// VPERMT2W.Z m256 ymm k ymm
// VPERMT2W.Z xmm xmm k xmm
// VPERMT2W.Z ymm ymm k ymm
// VPERMT2W.Z m512 zmm k zmm
// VPERMT2W.Z zmm zmm k zmm
//
// Construct and append a VPERMT2W.Z instruction to the active function.
// Operates on the global context.
func VPERMT2W_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMT2W_Z(mxyz, xyz, k, xyz1) }
// VPERMW: Permute Word Integers.
//
// Forms:
//
// VPERMW m128 xmm k xmm
// VPERMW m128 xmm xmm
// VPERMW m256 ymm k ymm
// VPERMW m256 ymm ymm
// VPERMW xmm xmm k xmm
// VPERMW xmm xmm xmm
// VPERMW ymm ymm k ymm
// VPERMW ymm ymm ymm
// VPERMW m512 zmm k zmm
// VPERMW m512 zmm zmm
// VPERMW zmm zmm k zmm
// VPERMW zmm zmm zmm
//
// Construct and append a VPERMW instruction to the active function.
func (c *Context) VPERMW(ops ...operand.Op) {
c.addinstruction(x86.VPERMW(ops...))
}
// VPERMW: Permute Word Integers.
//
// Forms:
//
// VPERMW m128 xmm k xmm
// VPERMW m128 xmm xmm
// VPERMW m256 ymm k ymm
// VPERMW m256 ymm ymm
// VPERMW xmm xmm k xmm
// VPERMW xmm xmm xmm
// VPERMW ymm ymm k ymm
// VPERMW ymm ymm ymm
// VPERMW m512 zmm k zmm
// VPERMW m512 zmm zmm
// VPERMW zmm zmm k zmm
// VPERMW zmm zmm zmm
//
// Construct and append a VPERMW instruction to the active function.
// Operates on the global context.
func VPERMW(ops ...operand.Op) { ctx.VPERMW(ops...) }
// VPERMW_Z: Permute Word Integers (Zeroing Masking).
//
// Forms:
//
// VPERMW.Z m128 xmm k xmm
// VPERMW.Z m256 ymm k ymm
// VPERMW.Z xmm xmm k xmm
// VPERMW.Z ymm ymm k ymm
// VPERMW.Z m512 zmm k zmm
// VPERMW.Z zmm zmm k zmm
//
// Construct and append a VPERMW.Z instruction to the active function.
func (c *Context) VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPERMW_Z(mxyz, xyz, k, xyz1))
}
// VPERMW_Z: Permute Word Integers (Zeroing Masking).
//
// Forms:
//
// VPERMW.Z m128 xmm k xmm
// VPERMW.Z m256 ymm k ymm
// VPERMW.Z xmm xmm k xmm
// VPERMW.Z ymm ymm k ymm
// VPERMW.Z m512 zmm k zmm
// VPERMW.Z zmm zmm k zmm
//
// Construct and append a VPERMW.Z instruction to the active function.
// Operates on the global context.
func VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMW_Z(mxyz, xyz, k, xyz1) }
// VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDD m128 k xmm
// VPEXPANDD m128 xmm
// VPEXPANDD m256 k ymm
// VPEXPANDD m256 ymm
// VPEXPANDD xmm k xmm
// VPEXPANDD xmm xmm
// VPEXPANDD ymm k ymm
// VPEXPANDD ymm ymm
// VPEXPANDD m512 k zmm
// VPEXPANDD m512 zmm
// VPEXPANDD zmm k zmm
// VPEXPANDD zmm zmm
//
// Construct and append a VPEXPANDD instruction to the active function.
func (c *Context) VPEXPANDD(ops ...operand.Op) {
c.addinstruction(x86.VPEXPANDD(ops...))
}
// VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDD m128 k xmm
// VPEXPANDD m128 xmm
// VPEXPANDD m256 k ymm
// VPEXPANDD m256 ymm
// VPEXPANDD xmm k xmm
// VPEXPANDD xmm xmm
// VPEXPANDD ymm k ymm
// VPEXPANDD ymm ymm
// VPEXPANDD m512 k zmm
// VPEXPANDD m512 zmm
// VPEXPANDD zmm k zmm
// VPEXPANDD zmm zmm
//
// Construct and append a VPEXPANDD instruction to the active function.
// Operates on the global context.
func VPEXPANDD(ops ...operand.Op) { ctx.VPEXPANDD(ops...) }
// VPEXPANDD_Z: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDD.Z m128 k xmm
// VPEXPANDD.Z m256 k ymm
// VPEXPANDD.Z xmm k xmm
// VPEXPANDD.Z ymm k ymm
// VPEXPANDD.Z m512 k zmm
// VPEXPANDD.Z zmm k zmm
//
// Construct and append a VPEXPANDD.Z instruction to the active function.
func (c *Context) VPEXPANDD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPEXPANDD_Z(mxyz, k, xyz))
}
// VPEXPANDD_Z: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDD.Z m128 k xmm
// VPEXPANDD.Z m256 k ymm
// VPEXPANDD.Z xmm k xmm
// VPEXPANDD.Z ymm k ymm
// VPEXPANDD.Z m512 k zmm
// VPEXPANDD.Z zmm k zmm
//
// Construct and append a VPEXPANDD.Z instruction to the active function.
// Operates on the global context.
func VPEXPANDD_Z(mxyz, k, xyz operand.Op) { ctx.VPEXPANDD_Z(mxyz, k, xyz) }
// VPEXPANDQ: Load Sparse Packed Quadword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDQ m128 k xmm
// VPEXPANDQ m128 xmm
// VPEXPANDQ m256 k ymm
// VPEXPANDQ m256 ymm
// VPEXPANDQ xmm k xmm
// VPEXPANDQ xmm xmm
// VPEXPANDQ ymm k ymm
// VPEXPANDQ ymm ymm
// VPEXPANDQ m512 k zmm
// VPEXPANDQ m512 zmm
// VPEXPANDQ zmm k zmm
// VPEXPANDQ zmm zmm
//
// Construct and append a VPEXPANDQ instruction to the active function.
func (c *Context) VPEXPANDQ(ops ...operand.Op) {
c.addinstruction(x86.VPEXPANDQ(ops...))
}
// VPEXPANDQ: Load Sparse Packed Quadword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDQ m128 k xmm
// VPEXPANDQ m128 xmm
// VPEXPANDQ m256 k ymm
// VPEXPANDQ m256 ymm
// VPEXPANDQ xmm k xmm
// VPEXPANDQ xmm xmm
// VPEXPANDQ ymm k ymm
// VPEXPANDQ ymm ymm
// VPEXPANDQ m512 k zmm
// VPEXPANDQ m512 zmm
// VPEXPANDQ zmm k zmm
// VPEXPANDQ zmm zmm
//
// Construct and append a VPEXPANDQ instruction to the active function.
// Operates on the global context.
func VPEXPANDQ(ops ...operand.Op) { ctx.VPEXPANDQ(ops...) }
// VPEXPANDQ_Z: Load Sparse Packed Quadword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDQ.Z m128 k xmm
// VPEXPANDQ.Z m256 k ymm
// VPEXPANDQ.Z xmm k xmm
// VPEXPANDQ.Z ymm k ymm
// VPEXPANDQ.Z m512 k zmm
// VPEXPANDQ.Z zmm k zmm
//
// Construct and append a VPEXPANDQ.Z instruction to the active function.
func (c *Context) VPEXPANDQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPEXPANDQ_Z(mxyz, k, xyz))
}
// VPEXPANDQ_Z: Load Sparse Packed Quadword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDQ.Z m128 k xmm
// VPEXPANDQ.Z m256 k ymm
// VPEXPANDQ.Z xmm k xmm
// VPEXPANDQ.Z ymm k ymm
// VPEXPANDQ.Z m512 k zmm
// VPEXPANDQ.Z zmm k zmm
//
// Construct and append a VPEXPANDQ.Z instruction to the active function.
// Operates on the global context.
func VPEXPANDQ_Z(mxyz, k, xyz operand.Op) { ctx.VPEXPANDQ_Z(mxyz, k, xyz) }
// VPEXTRB: Extract Byte.
//
// Forms:
//
// VPEXTRB imm8 xmm m8
// VPEXTRB imm8 xmm r32
//
// Construct and append a VPEXTRB instruction to the active function.
func (c *Context) VPEXTRB(i, x, mr operand.Op) {
c.addinstruction(x86.VPEXTRB(i, x, mr))
}
// VPEXTRB: Extract Byte.
//
// Forms:
//
// VPEXTRB imm8 xmm m8
// VPEXTRB imm8 xmm r32
//
// Construct and append a VPEXTRB instruction to the active function.
// Operates on the global context.
func VPEXTRB(i, x, mr operand.Op) { ctx.VPEXTRB(i, x, mr) }
// VPEXTRD: Extract Doubleword.
//
// Forms:
//
// VPEXTRD imm8 xmm m32
// VPEXTRD imm8 xmm r32
//
// Construct and append a VPEXTRD instruction to the active function.
func (c *Context) VPEXTRD(i, x, mr operand.Op) {
c.addinstruction(x86.VPEXTRD(i, x, mr))
}
// VPEXTRD: Extract Doubleword.
//
// Forms:
//
// VPEXTRD imm8 xmm m32
// VPEXTRD imm8 xmm r32
//
// Construct and append a VPEXTRD instruction to the active function.
// Operates on the global context.
func VPEXTRD(i, x, mr operand.Op) { ctx.VPEXTRD(i, x, mr) }
// VPEXTRQ: Extract Quadword.
//
// Forms:
//
// VPEXTRQ imm8 xmm m64
// VPEXTRQ imm8 xmm r64
//
// Construct and append a VPEXTRQ instruction to the active function.
func (c *Context) VPEXTRQ(i, x, mr operand.Op) {
c.addinstruction(x86.VPEXTRQ(i, x, mr))
}
// VPEXTRQ: Extract Quadword.
//
// Forms:
//
// VPEXTRQ imm8 xmm m64
// VPEXTRQ imm8 xmm r64
//
// Construct and append a VPEXTRQ instruction to the active function.
// Operates on the global context.
func VPEXTRQ(i, x, mr operand.Op) { ctx.VPEXTRQ(i, x, mr) }
// VPEXTRW: Extract Word.
//
// Forms:
//
// VPEXTRW imm8 xmm m16
// VPEXTRW imm8 xmm r32
//
// Construct and append a VPEXTRW instruction to the active function.
func (c *Context) VPEXTRW(i, x, mr operand.Op) {
c.addinstruction(x86.VPEXTRW(i, x, mr))
}
// VPEXTRW: Extract Word.
//
// Forms:
//
// VPEXTRW imm8 xmm m16
// VPEXTRW imm8 xmm r32
//
// Construct and append a VPEXTRW instruction to the active function.
// Operates on the global context.
func VPEXTRW(i, x, mr operand.Op) { ctx.VPEXTRW(i, x, mr) }
// VPGATHERDD: Gather Packed Doubleword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDD xmm vm32x xmm
// VPGATHERDD ymm vm32y ymm
// VPGATHERDD vm32x k xmm
// VPGATHERDD vm32y k ymm
// VPGATHERDD vm32z k zmm
//
// Construct and append a VPGATHERDD instruction to the active function.
func (c *Context) VPGATHERDD(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VPGATHERDD(vxy, kv, xyz))
}
// VPGATHERDD: Gather Packed Doubleword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDD xmm vm32x xmm
// VPGATHERDD ymm vm32y ymm
// VPGATHERDD vm32x k xmm
// VPGATHERDD vm32y k ymm
// VPGATHERDD vm32z k zmm
//
// Construct and append a VPGATHERDD instruction to the active function.
// Operates on the global context.
func VPGATHERDD(vxy, kv, xyz operand.Op) { ctx.VPGATHERDD(vxy, kv, xyz) }
// VPGATHERDQ: Gather Packed Quadword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDQ xmm vm32x xmm
// VPGATHERDQ ymm vm32x ymm
// VPGATHERDQ vm32x k xmm
// VPGATHERDQ vm32x k ymm
// VPGATHERDQ vm32y k zmm
//
// Construct and append a VPGATHERDQ instruction to the active function.
func (c *Context) VPGATHERDQ(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VPGATHERDQ(vxy, kv, xyz))
}
// VPGATHERDQ: Gather Packed Quadword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDQ xmm vm32x xmm
// VPGATHERDQ ymm vm32x ymm
// VPGATHERDQ vm32x k xmm
// VPGATHERDQ vm32x k ymm
// VPGATHERDQ vm32y k zmm
//
// Construct and append a VPGATHERDQ instruction to the active function.
// Operates on the global context.
func VPGATHERDQ(vxy, kv, xyz operand.Op) { ctx.VPGATHERDQ(vxy, kv, xyz) }
// VPGATHERQD: Gather Packed Doubleword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQD xmm vm64x xmm
// VPGATHERQD xmm vm64y xmm
// VPGATHERQD vm64x k xmm
// VPGATHERQD vm64y k xmm
// VPGATHERQD vm64z k ymm
//
// Construct and append a VPGATHERQD instruction to the active function.
func (c *Context) VPGATHERQD(vx, kv, xy operand.Op) {
c.addinstruction(x86.VPGATHERQD(vx, kv, xy))
}
// VPGATHERQD: Gather Packed Doubleword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQD xmm vm64x xmm
// VPGATHERQD xmm vm64y xmm
// VPGATHERQD vm64x k xmm
// VPGATHERQD vm64y k xmm
// VPGATHERQD vm64z k ymm
//
// Construct and append a VPGATHERQD instruction to the active function.
// Operates on the global context.
func VPGATHERQD(vx, kv, xy operand.Op) { ctx.VPGATHERQD(vx, kv, xy) }
// VPGATHERQQ: Gather Packed Quadword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQQ xmm vm64x xmm
// VPGATHERQQ ymm vm64y ymm
// VPGATHERQQ vm64x k xmm
// VPGATHERQQ vm64y k ymm
// VPGATHERQQ vm64z k zmm
//
// Construct and append a VPGATHERQQ instruction to the active function.
func (c *Context) VPGATHERQQ(vxy, kv, xyz operand.Op) {
c.addinstruction(x86.VPGATHERQQ(vxy, kv, xyz))
}
// VPGATHERQQ: Gather Packed Quadword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQQ xmm vm64x xmm
// VPGATHERQQ ymm vm64y ymm
// VPGATHERQQ vm64x k xmm
// VPGATHERQQ vm64y k ymm
// VPGATHERQQ vm64z k zmm
//
// Construct and append a VPGATHERQQ instruction to the active function.
// Operates on the global context.
func VPGATHERQQ(vxy, kv, xyz operand.Op) { ctx.VPGATHERQQ(vxy, kv, xyz) }
// VPHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// VPHADDD m256 ymm ymm
// VPHADDD ymm ymm ymm
// VPHADDD m128 xmm xmm
// VPHADDD xmm xmm xmm
//
// Construct and append a VPHADDD instruction to the active function.
func (c *Context) VPHADDD(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHADDD(mxy, xy, xy1))
}
// VPHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// VPHADDD m256 ymm ymm
// VPHADDD ymm ymm ymm
// VPHADDD m128 xmm xmm
// VPHADDD xmm xmm xmm
//
// Construct and append a VPHADDD instruction to the active function.
// Operates on the global context.
func VPHADDD(mxy, xy, xy1 operand.Op) { ctx.VPHADDD(mxy, xy, xy1) }
// VPHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHADDSW m256 ymm ymm
// VPHADDSW ymm ymm ymm
// VPHADDSW m128 xmm xmm
// VPHADDSW xmm xmm xmm
//
// Construct and append a VPHADDSW instruction to the active function.
func (c *Context) VPHADDSW(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHADDSW(mxy, xy, xy1))
}
// VPHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHADDSW m256 ymm ymm
// VPHADDSW ymm ymm ymm
// VPHADDSW m128 xmm xmm
// VPHADDSW xmm xmm xmm
//
// Construct and append a VPHADDSW instruction to the active function.
// Operates on the global context.
func VPHADDSW(mxy, xy, xy1 operand.Op) { ctx.VPHADDSW(mxy, xy, xy1) }
// VPHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// VPHADDW m256 ymm ymm
// VPHADDW ymm ymm ymm
// VPHADDW m128 xmm xmm
// VPHADDW xmm xmm xmm
//
// Construct and append a VPHADDW instruction to the active function.
func (c *Context) VPHADDW(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHADDW(mxy, xy, xy1))
}
// VPHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// VPHADDW m256 ymm ymm
// VPHADDW ymm ymm ymm
// VPHADDW m128 xmm xmm
// VPHADDW xmm xmm xmm
//
// Construct and append a VPHADDW instruction to the active function.
// Operates on the global context.
func VPHADDW(mxy, xy, xy1 operand.Op) { ctx.VPHADDW(mxy, xy, xy1) }
// VPHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// VPHMINPOSUW m128 xmm
// VPHMINPOSUW xmm xmm
//
// Construct and append a VPHMINPOSUW instruction to the active function.
func (c *Context) VPHMINPOSUW(mx, x operand.Op) {
c.addinstruction(x86.VPHMINPOSUW(mx, x))
}
// VPHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// VPHMINPOSUW m128 xmm
// VPHMINPOSUW xmm xmm
//
// Construct and append a VPHMINPOSUW instruction to the active function.
// Operates on the global context.
func VPHMINPOSUW(mx, x operand.Op) { ctx.VPHMINPOSUW(mx, x) }
// VPHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// VPHSUBD m256 ymm ymm
// VPHSUBD ymm ymm ymm
// VPHSUBD m128 xmm xmm
// VPHSUBD xmm xmm xmm
//
// Construct and append a VPHSUBD instruction to the active function.
func (c *Context) VPHSUBD(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHSUBD(mxy, xy, xy1))
}
// VPHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// VPHSUBD m256 ymm ymm
// VPHSUBD ymm ymm ymm
// VPHSUBD m128 xmm xmm
// VPHSUBD xmm xmm xmm
//
// Construct and append a VPHSUBD instruction to the active function.
// Operates on the global context.
func VPHSUBD(mxy, xy, xy1 operand.Op) { ctx.VPHSUBD(mxy, xy, xy1) }
// VPHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHSUBSW m256 ymm ymm
// VPHSUBSW ymm ymm ymm
// VPHSUBSW m128 xmm xmm
// VPHSUBSW xmm xmm xmm
//
// Construct and append a VPHSUBSW instruction to the active function.
func (c *Context) VPHSUBSW(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHSUBSW(mxy, xy, xy1))
}
// VPHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHSUBSW m256 ymm ymm
// VPHSUBSW ymm ymm ymm
// VPHSUBSW m128 xmm xmm
// VPHSUBSW xmm xmm xmm
//
// Construct and append a VPHSUBSW instruction to the active function.
// Operates on the global context.
func VPHSUBSW(mxy, xy, xy1 operand.Op) { ctx.VPHSUBSW(mxy, xy, xy1) }
// VPHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// VPHSUBW m256 ymm ymm
// VPHSUBW ymm ymm ymm
// VPHSUBW m128 xmm xmm
// VPHSUBW xmm xmm xmm
//
// Construct and append a VPHSUBW instruction to the active function.
func (c *Context) VPHSUBW(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPHSUBW(mxy, xy, xy1))
}
// VPHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// VPHSUBW m256 ymm ymm
// VPHSUBW ymm ymm ymm
// VPHSUBW m128 xmm xmm
// VPHSUBW xmm xmm xmm
//
// Construct and append a VPHSUBW instruction to the active function.
// Operates on the global context.
func VPHSUBW(mxy, xy, xy1 operand.Op) { ctx.VPHSUBW(mxy, xy, xy1) }
// VPINSRB: Insert Byte.
//
// Forms:
//
// VPINSRB imm8 m8 xmm xmm
// VPINSRB imm8 r32 xmm xmm
//
// Construct and append a VPINSRB instruction to the active function.
func (c *Context) VPINSRB(i, mr, x, x1 operand.Op) {
c.addinstruction(x86.VPINSRB(i, mr, x, x1))
}
// VPINSRB: Insert Byte.
//
// Forms:
//
// VPINSRB imm8 m8 xmm xmm
// VPINSRB imm8 r32 xmm xmm
//
// Construct and append a VPINSRB instruction to the active function.
// Operates on the global context.
func VPINSRB(i, mr, x, x1 operand.Op) { ctx.VPINSRB(i, mr, x, x1) }
// VPINSRD: Insert Doubleword.
//
// Forms:
//
// VPINSRD imm8 m32 xmm xmm
// VPINSRD imm8 r32 xmm xmm
//
// Construct and append a VPINSRD instruction to the active function.
func (c *Context) VPINSRD(i, mr, x, x1 operand.Op) {
c.addinstruction(x86.VPINSRD(i, mr, x, x1))
}
// VPINSRD: Insert Doubleword.
//
// Forms:
//
// VPINSRD imm8 m32 xmm xmm
// VPINSRD imm8 r32 xmm xmm
//
// Construct and append a VPINSRD instruction to the active function.
// Operates on the global context.
func VPINSRD(i, mr, x, x1 operand.Op) { ctx.VPINSRD(i, mr, x, x1) }
// VPINSRQ: Insert Quadword.
//
// Forms:
//
// VPINSRQ imm8 m64 xmm xmm
// VPINSRQ imm8 r64 xmm xmm
//
// Construct and append a VPINSRQ instruction to the active function.
func (c *Context) VPINSRQ(i, mr, x, x1 operand.Op) {
c.addinstruction(x86.VPINSRQ(i, mr, x, x1))
}
// VPINSRQ: Insert Quadword.
//
// Forms:
//
// VPINSRQ imm8 m64 xmm xmm
// VPINSRQ imm8 r64 xmm xmm
//
// Construct and append a VPINSRQ instruction to the active function.
// Operates on the global context.
func VPINSRQ(i, mr, x, x1 operand.Op) { ctx.VPINSRQ(i, mr, x, x1) }
// VPINSRW: Insert Word.
//
// Forms:
//
// VPINSRW imm8 m16 xmm xmm
// VPINSRW imm8 r32 xmm xmm
//
// Construct and append a VPINSRW instruction to the active function.
func (c *Context) VPINSRW(i, mr, x, x1 operand.Op) {
c.addinstruction(x86.VPINSRW(i, mr, x, x1))
}
// VPINSRW: Insert Word.
//
// Forms:
//
// VPINSRW imm8 m16 xmm xmm
// VPINSRW imm8 r32 xmm xmm
//
// Construct and append a VPINSRW instruction to the active function.
// Operates on the global context.
func VPINSRW(i, mr, x, x1 operand.Op) { ctx.VPINSRW(i, mr, x, x1) }
// VPLZCNTD: Count the Number of Leading Zero Bits for Packed Doubleword Values.
//
// Forms:
//
// VPLZCNTD m128 k xmm
// VPLZCNTD m128 xmm
// VPLZCNTD m256 k ymm
// VPLZCNTD m256 ymm
// VPLZCNTD xmm k xmm
// VPLZCNTD xmm xmm
// VPLZCNTD ymm k ymm
// VPLZCNTD ymm ymm
// VPLZCNTD m512 k zmm
// VPLZCNTD m512 zmm
// VPLZCNTD zmm k zmm
// VPLZCNTD zmm zmm
//
// Construct and append a VPLZCNTD instruction to the active function.
func (c *Context) VPLZCNTD(ops ...operand.Op) {
c.addinstruction(x86.VPLZCNTD(ops...))
}
// VPLZCNTD: Count the Number of Leading Zero Bits for Packed Doubleword Values.
//
// Forms:
//
// VPLZCNTD m128 k xmm
// VPLZCNTD m128 xmm
// VPLZCNTD m256 k ymm
// VPLZCNTD m256 ymm
// VPLZCNTD xmm k xmm
// VPLZCNTD xmm xmm
// VPLZCNTD ymm k ymm
// VPLZCNTD ymm ymm
// VPLZCNTD m512 k zmm
// VPLZCNTD m512 zmm
// VPLZCNTD zmm k zmm
// VPLZCNTD zmm zmm
//
// Construct and append a VPLZCNTD instruction to the active function.
// Operates on the global context.
func VPLZCNTD(ops ...operand.Op) { ctx.VPLZCNTD(ops...) }
// VPLZCNTD_BCST: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast).
//
// Forms:
//
// VPLZCNTD.BCST m32 k xmm
// VPLZCNTD.BCST m32 k ymm
// VPLZCNTD.BCST m32 xmm
// VPLZCNTD.BCST m32 ymm
// VPLZCNTD.BCST m32 k zmm
// VPLZCNTD.BCST m32 zmm
//
// Construct and append a VPLZCNTD.BCST instruction to the active function.
func (c *Context) VPLZCNTD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPLZCNTD_BCST(ops...))
}
// VPLZCNTD_BCST: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast).
//
// Forms:
//
// VPLZCNTD.BCST m32 k xmm
// VPLZCNTD.BCST m32 k ymm
// VPLZCNTD.BCST m32 xmm
// VPLZCNTD.BCST m32 ymm
// VPLZCNTD.BCST m32 k zmm
// VPLZCNTD.BCST m32 zmm
//
// Construct and append a VPLZCNTD.BCST instruction to the active function.
// Operates on the global context.
func VPLZCNTD_BCST(ops ...operand.Op) { ctx.VPLZCNTD_BCST(ops...) }
// VPLZCNTD_BCST_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.BCST.Z m32 k xmm
// VPLZCNTD.BCST.Z m32 k ymm
// VPLZCNTD.BCST.Z m32 k zmm
//
// Construct and append a VPLZCNTD.BCST.Z instruction to the active function.
func (c *Context) VPLZCNTD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPLZCNTD_BCST_Z(m, k, xyz))
}
// VPLZCNTD_BCST_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.BCST.Z m32 k xmm
// VPLZCNTD.BCST.Z m32 k ymm
// VPLZCNTD.BCST.Z m32 k zmm
//
// Construct and append a VPLZCNTD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPLZCNTD_BCST_Z(m, k, xyz operand.Op) { ctx.VPLZCNTD_BCST_Z(m, k, xyz) }
// VPLZCNTD_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.Z m128 k xmm
// VPLZCNTD.Z m256 k ymm
// VPLZCNTD.Z xmm k xmm
// VPLZCNTD.Z ymm k ymm
// VPLZCNTD.Z m512 k zmm
// VPLZCNTD.Z zmm k zmm
//
// Construct and append a VPLZCNTD.Z instruction to the active function.
func (c *Context) VPLZCNTD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPLZCNTD_Z(mxyz, k, xyz))
}
// VPLZCNTD_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.Z m128 k xmm
// VPLZCNTD.Z m256 k ymm
// VPLZCNTD.Z xmm k xmm
// VPLZCNTD.Z ymm k ymm
// VPLZCNTD.Z m512 k zmm
// VPLZCNTD.Z zmm k zmm
//
// Construct and append a VPLZCNTD.Z instruction to the active function.
// Operates on the global context.
func VPLZCNTD_Z(mxyz, k, xyz operand.Op) { ctx.VPLZCNTD_Z(mxyz, k, xyz) }
// VPLZCNTQ: Count the Number of Leading Zero Bits for Packed Quadword Values.
//
// Forms:
//
// VPLZCNTQ m128 k xmm
// VPLZCNTQ m128 xmm
// VPLZCNTQ m256 k ymm
// VPLZCNTQ m256 ymm
// VPLZCNTQ xmm k xmm
// VPLZCNTQ xmm xmm
// VPLZCNTQ ymm k ymm
// VPLZCNTQ ymm ymm
// VPLZCNTQ m512 k zmm
// VPLZCNTQ m512 zmm
// VPLZCNTQ zmm k zmm
// VPLZCNTQ zmm zmm
//
// Construct and append a VPLZCNTQ instruction to the active function.
func (c *Context) VPLZCNTQ(ops ...operand.Op) {
c.addinstruction(x86.VPLZCNTQ(ops...))
}
// VPLZCNTQ: Count the Number of Leading Zero Bits for Packed Quadword Values.
//
// Forms:
//
// VPLZCNTQ m128 k xmm
// VPLZCNTQ m128 xmm
// VPLZCNTQ m256 k ymm
// VPLZCNTQ m256 ymm
// VPLZCNTQ xmm k xmm
// VPLZCNTQ xmm xmm
// VPLZCNTQ ymm k ymm
// VPLZCNTQ ymm ymm
// VPLZCNTQ m512 k zmm
// VPLZCNTQ m512 zmm
// VPLZCNTQ zmm k zmm
// VPLZCNTQ zmm zmm
//
// Construct and append a VPLZCNTQ instruction to the active function.
// Operates on the global context.
func VPLZCNTQ(ops ...operand.Op) { ctx.VPLZCNTQ(ops...) }
// VPLZCNTQ_BCST: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast).
//
// Forms:
//
// VPLZCNTQ.BCST m64 k xmm
// VPLZCNTQ.BCST m64 k ymm
// VPLZCNTQ.BCST m64 xmm
// VPLZCNTQ.BCST m64 ymm
// VPLZCNTQ.BCST m64 k zmm
// VPLZCNTQ.BCST m64 zmm
//
// Construct and append a VPLZCNTQ.BCST instruction to the active function.
func (c *Context) VPLZCNTQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPLZCNTQ_BCST(ops...))
}
// VPLZCNTQ_BCST: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast).
//
// Forms:
//
// VPLZCNTQ.BCST m64 k xmm
// VPLZCNTQ.BCST m64 k ymm
// VPLZCNTQ.BCST m64 xmm
// VPLZCNTQ.BCST m64 ymm
// VPLZCNTQ.BCST m64 k zmm
// VPLZCNTQ.BCST m64 zmm
//
// Construct and append a VPLZCNTQ.BCST instruction to the active function.
// Operates on the global context.
func VPLZCNTQ_BCST(ops ...operand.Op) { ctx.VPLZCNTQ_BCST(ops...) }
// VPLZCNTQ_BCST_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.BCST.Z m64 k xmm
// VPLZCNTQ.BCST.Z m64 k ymm
// VPLZCNTQ.BCST.Z m64 k zmm
//
// Construct and append a VPLZCNTQ.BCST.Z instruction to the active function.
func (c *Context) VPLZCNTQ_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VPLZCNTQ_BCST_Z(m, k, xyz))
}
// VPLZCNTQ_BCST_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.BCST.Z m64 k xmm
// VPLZCNTQ.BCST.Z m64 k ymm
// VPLZCNTQ.BCST.Z m64 k zmm
//
// Construct and append a VPLZCNTQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPLZCNTQ_BCST_Z(m, k, xyz operand.Op) { ctx.VPLZCNTQ_BCST_Z(m, k, xyz) }
// VPLZCNTQ_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.Z m128 k xmm
// VPLZCNTQ.Z m256 k ymm
// VPLZCNTQ.Z xmm k xmm
// VPLZCNTQ.Z ymm k ymm
// VPLZCNTQ.Z m512 k zmm
// VPLZCNTQ.Z zmm k zmm
//
// Construct and append a VPLZCNTQ.Z instruction to the active function.
func (c *Context) VPLZCNTQ_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPLZCNTQ_Z(mxyz, k, xyz))
}
// VPLZCNTQ_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.Z m128 k xmm
// VPLZCNTQ.Z m256 k ymm
// VPLZCNTQ.Z xmm k xmm
// VPLZCNTQ.Z ymm k ymm
// VPLZCNTQ.Z m512 k zmm
// VPLZCNTQ.Z zmm k zmm
//
// Construct and append a VPLZCNTQ.Z instruction to the active function.
// Operates on the global context.
func VPLZCNTQ_Z(mxyz, k, xyz operand.Op) { ctx.VPLZCNTQ_Z(mxyz, k, xyz) }
// VPMADD52HUQ: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52HUQ m128 xmm k xmm
// VPMADD52HUQ m128 xmm xmm
// VPMADD52HUQ m256 ymm k ymm
// VPMADD52HUQ m256 ymm ymm
// VPMADD52HUQ xmm xmm k xmm
// VPMADD52HUQ xmm xmm xmm
// VPMADD52HUQ ymm ymm k ymm
// VPMADD52HUQ ymm ymm ymm
// VPMADD52HUQ m512 zmm k zmm
// VPMADD52HUQ m512 zmm zmm
// VPMADD52HUQ zmm zmm k zmm
// VPMADD52HUQ zmm zmm zmm
//
// Construct and append a VPMADD52HUQ instruction to the active function.
func (c *Context) VPMADD52HUQ(ops ...operand.Op) {
c.addinstruction(x86.VPMADD52HUQ(ops...))
}
// VPMADD52HUQ: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52HUQ m128 xmm k xmm
// VPMADD52HUQ m128 xmm xmm
// VPMADD52HUQ m256 ymm k ymm
// VPMADD52HUQ m256 ymm ymm
// VPMADD52HUQ xmm xmm k xmm
// VPMADD52HUQ xmm xmm xmm
// VPMADD52HUQ ymm ymm k ymm
// VPMADD52HUQ ymm ymm ymm
// VPMADD52HUQ m512 zmm k zmm
// VPMADD52HUQ m512 zmm zmm
// VPMADD52HUQ zmm zmm k zmm
// VPMADD52HUQ zmm zmm zmm
//
// Construct and append a VPMADD52HUQ instruction to the active function.
// Operates on the global context.
func VPMADD52HUQ(ops ...operand.Op) { ctx.VPMADD52HUQ(ops...) }
// VPMADD52HUQ_BCST: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52HUQ.BCST m64 xmm k xmm
// VPMADD52HUQ.BCST m64 xmm xmm
// VPMADD52HUQ.BCST m64 ymm k ymm
// VPMADD52HUQ.BCST m64 ymm ymm
// VPMADD52HUQ.BCST m64 zmm k zmm
// VPMADD52HUQ.BCST m64 zmm zmm
//
// Construct and append a VPMADD52HUQ.BCST instruction to the active function.
func (c *Context) VPMADD52HUQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMADD52HUQ_BCST(ops...))
}
// VPMADD52HUQ_BCST: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52HUQ.BCST m64 xmm k xmm
// VPMADD52HUQ.BCST m64 xmm xmm
// VPMADD52HUQ.BCST m64 ymm k ymm
// VPMADD52HUQ.BCST m64 ymm ymm
// VPMADD52HUQ.BCST m64 zmm k zmm
// VPMADD52HUQ.BCST m64 zmm zmm
//
// Construct and append a VPMADD52HUQ.BCST instruction to the active function.
// Operates on the global context.
func VPMADD52HUQ_BCST(ops ...operand.Op) { ctx.VPMADD52HUQ_BCST(ops...) }
// VPMADD52HUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.BCST.Z m64 xmm k xmm
// VPMADD52HUQ.BCST.Z m64 ymm k ymm
// VPMADD52HUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMADD52HUQ.BCST.Z instruction to the active function.
func (c *Context) VPMADD52HUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADD52HUQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMADD52HUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.BCST.Z m64 xmm k xmm
// VPMADD52HUQ.BCST.Z m64 ymm k ymm
// VPMADD52HUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMADD52HUQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMADD52HUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMADD52HUQ_BCST_Z(m, xyz, k, xyz1) }
// VPMADD52HUQ_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.Z m128 xmm k xmm
// VPMADD52HUQ.Z m256 ymm k ymm
// VPMADD52HUQ.Z xmm xmm k xmm
// VPMADD52HUQ.Z ymm ymm k ymm
// VPMADD52HUQ.Z m512 zmm k zmm
// VPMADD52HUQ.Z zmm zmm k zmm
//
// Construct and append a VPMADD52HUQ.Z instruction to the active function.
func (c *Context) VPMADD52HUQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADD52HUQ_Z(mxyz, xyz, k, xyz1))
}
// VPMADD52HUQ_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.Z m128 xmm k xmm
// VPMADD52HUQ.Z m256 ymm k ymm
// VPMADD52HUQ.Z xmm xmm k xmm
// VPMADD52HUQ.Z ymm ymm k ymm
// VPMADD52HUQ.Z m512 zmm k zmm
// VPMADD52HUQ.Z zmm zmm k zmm
//
// Construct and append a VPMADD52HUQ.Z instruction to the active function.
// Operates on the global context.
func VPMADD52HUQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMADD52HUQ_Z(mxyz, xyz, k, xyz1) }
// VPMADD52LUQ: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52LUQ m128 xmm k xmm
// VPMADD52LUQ m128 xmm xmm
// VPMADD52LUQ m256 ymm k ymm
// VPMADD52LUQ m256 ymm ymm
// VPMADD52LUQ xmm xmm k xmm
// VPMADD52LUQ xmm xmm xmm
// VPMADD52LUQ ymm ymm k ymm
// VPMADD52LUQ ymm ymm ymm
// VPMADD52LUQ m512 zmm k zmm
// VPMADD52LUQ m512 zmm zmm
// VPMADD52LUQ zmm zmm k zmm
// VPMADD52LUQ zmm zmm zmm
//
// Construct and append a VPMADD52LUQ instruction to the active function.
func (c *Context) VPMADD52LUQ(ops ...operand.Op) {
c.addinstruction(x86.VPMADD52LUQ(ops...))
}
// VPMADD52LUQ: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52LUQ m128 xmm k xmm
// VPMADD52LUQ m128 xmm xmm
// VPMADD52LUQ m256 ymm k ymm
// VPMADD52LUQ m256 ymm ymm
// VPMADD52LUQ xmm xmm k xmm
// VPMADD52LUQ xmm xmm xmm
// VPMADD52LUQ ymm ymm k ymm
// VPMADD52LUQ ymm ymm ymm
// VPMADD52LUQ m512 zmm k zmm
// VPMADD52LUQ m512 zmm zmm
// VPMADD52LUQ zmm zmm k zmm
// VPMADD52LUQ zmm zmm zmm
//
// Construct and append a VPMADD52LUQ instruction to the active function.
// Operates on the global context.
func VPMADD52LUQ(ops ...operand.Op) { ctx.VPMADD52LUQ(ops...) }
// VPMADD52LUQ_BCST: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52LUQ.BCST m64 xmm k xmm
// VPMADD52LUQ.BCST m64 xmm xmm
// VPMADD52LUQ.BCST m64 ymm k ymm
// VPMADD52LUQ.BCST m64 ymm ymm
// VPMADD52LUQ.BCST m64 zmm k zmm
// VPMADD52LUQ.BCST m64 zmm zmm
//
// Construct and append a VPMADD52LUQ.BCST instruction to the active function.
func (c *Context) VPMADD52LUQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMADD52LUQ_BCST(ops...))
}
// VPMADD52LUQ_BCST: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52LUQ.BCST m64 xmm k xmm
// VPMADD52LUQ.BCST m64 xmm xmm
// VPMADD52LUQ.BCST m64 ymm k ymm
// VPMADD52LUQ.BCST m64 ymm ymm
// VPMADD52LUQ.BCST m64 zmm k zmm
// VPMADD52LUQ.BCST m64 zmm zmm
//
// Construct and append a VPMADD52LUQ.BCST instruction to the active function.
// Operates on the global context.
func VPMADD52LUQ_BCST(ops ...operand.Op) { ctx.VPMADD52LUQ_BCST(ops...) }
// VPMADD52LUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.BCST.Z m64 xmm k xmm
// VPMADD52LUQ.BCST.Z m64 ymm k ymm
// VPMADD52LUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMADD52LUQ.BCST.Z instruction to the active function.
func (c *Context) VPMADD52LUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADD52LUQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMADD52LUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.BCST.Z m64 xmm k xmm
// VPMADD52LUQ.BCST.Z m64 ymm k ymm
// VPMADD52LUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMADD52LUQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMADD52LUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMADD52LUQ_BCST_Z(m, xyz, k, xyz1) }
// VPMADD52LUQ_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.Z m128 xmm k xmm
// VPMADD52LUQ.Z m256 ymm k ymm
// VPMADD52LUQ.Z xmm xmm k xmm
// VPMADD52LUQ.Z ymm ymm k ymm
// VPMADD52LUQ.Z m512 zmm k zmm
// VPMADD52LUQ.Z zmm zmm k zmm
//
// Construct and append a VPMADD52LUQ.Z instruction to the active function.
func (c *Context) VPMADD52LUQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADD52LUQ_Z(mxyz, xyz, k, xyz1))
}
// VPMADD52LUQ_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.Z m128 xmm k xmm
// VPMADD52LUQ.Z m256 ymm k ymm
// VPMADD52LUQ.Z xmm xmm k xmm
// VPMADD52LUQ.Z ymm ymm k ymm
// VPMADD52LUQ.Z m512 zmm k zmm
// VPMADD52LUQ.Z zmm zmm k zmm
//
// Construct and append a VPMADD52LUQ.Z instruction to the active function.
// Operates on the global context.
func VPMADD52LUQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMADD52LUQ_Z(mxyz, xyz, k, xyz1) }
// VPMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// VPMADDUBSW m256 ymm ymm
// VPMADDUBSW ymm ymm ymm
// VPMADDUBSW m128 xmm xmm
// VPMADDUBSW xmm xmm xmm
// VPMADDUBSW m128 xmm k xmm
// VPMADDUBSW m256 ymm k ymm
// VPMADDUBSW xmm xmm k xmm
// VPMADDUBSW ymm ymm k ymm
// VPMADDUBSW m512 zmm k zmm
// VPMADDUBSW m512 zmm zmm
// VPMADDUBSW zmm zmm k zmm
// VPMADDUBSW zmm zmm zmm
//
// Construct and append a VPMADDUBSW instruction to the active function.
func (c *Context) VPMADDUBSW(ops ...operand.Op) {
c.addinstruction(x86.VPMADDUBSW(ops...))
}
// VPMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// VPMADDUBSW m256 ymm ymm
// VPMADDUBSW ymm ymm ymm
// VPMADDUBSW m128 xmm xmm
// VPMADDUBSW xmm xmm xmm
// VPMADDUBSW m128 xmm k xmm
// VPMADDUBSW m256 ymm k ymm
// VPMADDUBSW xmm xmm k xmm
// VPMADDUBSW ymm ymm k ymm
// VPMADDUBSW m512 zmm k zmm
// VPMADDUBSW m512 zmm zmm
// VPMADDUBSW zmm zmm k zmm
// VPMADDUBSW zmm zmm zmm
//
// Construct and append a VPMADDUBSW instruction to the active function.
// Operates on the global context.
func VPMADDUBSW(ops ...operand.Op) { ctx.VPMADDUBSW(ops...) }
// VPMADDUBSW_Z: Multiply and Add Packed Signed and Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDUBSW.Z m128 xmm k xmm
// VPMADDUBSW.Z m256 ymm k ymm
// VPMADDUBSW.Z xmm xmm k xmm
// VPMADDUBSW.Z ymm ymm k ymm
// VPMADDUBSW.Z m512 zmm k zmm
// VPMADDUBSW.Z zmm zmm k zmm
//
// Construct and append a VPMADDUBSW.Z instruction to the active function.
func (c *Context) VPMADDUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADDUBSW_Z(mxyz, xyz, k, xyz1))
}
// VPMADDUBSW_Z: Multiply and Add Packed Signed and Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDUBSW.Z m128 xmm k xmm
// VPMADDUBSW.Z m256 ymm k ymm
// VPMADDUBSW.Z xmm xmm k xmm
// VPMADDUBSW.Z ymm ymm k ymm
// VPMADDUBSW.Z m512 zmm k zmm
// VPMADDUBSW.Z zmm zmm k zmm
//
// Construct and append a VPMADDUBSW.Z instruction to the active function.
// Operates on the global context.
func VPMADDUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMADDUBSW_Z(mxyz, xyz, k, xyz1) }
// VPMADDWD: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// VPMADDWD m256 ymm ymm
// VPMADDWD ymm ymm ymm
// VPMADDWD m128 xmm xmm
// VPMADDWD xmm xmm xmm
// VPMADDWD m128 xmm k xmm
// VPMADDWD m256 ymm k ymm
// VPMADDWD xmm xmm k xmm
// VPMADDWD ymm ymm k ymm
// VPMADDWD m512 zmm k zmm
// VPMADDWD m512 zmm zmm
// VPMADDWD zmm zmm k zmm
// VPMADDWD zmm zmm zmm
//
// Construct and append a VPMADDWD instruction to the active function.
func (c *Context) VPMADDWD(ops ...operand.Op) {
c.addinstruction(x86.VPMADDWD(ops...))
}
// VPMADDWD: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// VPMADDWD m256 ymm ymm
// VPMADDWD ymm ymm ymm
// VPMADDWD m128 xmm xmm
// VPMADDWD xmm xmm xmm
// VPMADDWD m128 xmm k xmm
// VPMADDWD m256 ymm k ymm
// VPMADDWD xmm xmm k xmm
// VPMADDWD ymm ymm k ymm
// VPMADDWD m512 zmm k zmm
// VPMADDWD m512 zmm zmm
// VPMADDWD zmm zmm k zmm
// VPMADDWD zmm zmm zmm
//
// Construct and append a VPMADDWD instruction to the active function.
// Operates on the global context.
func VPMADDWD(ops ...operand.Op) { ctx.VPMADDWD(ops...) }
// VPMADDWD_Z: Multiply and Add Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDWD.Z m128 xmm k xmm
// VPMADDWD.Z m256 ymm k ymm
// VPMADDWD.Z xmm xmm k xmm
// VPMADDWD.Z ymm ymm k ymm
// VPMADDWD.Z m512 zmm k zmm
// VPMADDWD.Z zmm zmm k zmm
//
// Construct and append a VPMADDWD.Z instruction to the active function.
func (c *Context) VPMADDWD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMADDWD_Z(mxyz, xyz, k, xyz1))
}
// VPMADDWD_Z: Multiply and Add Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDWD.Z m128 xmm k xmm
// VPMADDWD.Z m256 ymm k ymm
// VPMADDWD.Z xmm xmm k xmm
// VPMADDWD.Z ymm ymm k ymm
// VPMADDWD.Z m512 zmm k zmm
// VPMADDWD.Z zmm zmm k zmm
//
// Construct and append a VPMADDWD.Z instruction to the active function.
// Operates on the global context.
func VPMADDWD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMADDWD_Z(mxyz, xyz, k, xyz1) }
// VPMASKMOVD: Conditional Move Packed Doubleword Integers.
//
// Forms:
//
// VPMASKMOVD m128 xmm xmm
// VPMASKMOVD m256 ymm ymm
// VPMASKMOVD xmm xmm m128
// VPMASKMOVD ymm ymm m256
//
// Construct and append a VPMASKMOVD instruction to the active function.
func (c *Context) VPMASKMOVD(mxy, xy, mxy1 operand.Op) {
c.addinstruction(x86.VPMASKMOVD(mxy, xy, mxy1))
}
// VPMASKMOVD: Conditional Move Packed Doubleword Integers.
//
// Forms:
//
// VPMASKMOVD m128 xmm xmm
// VPMASKMOVD m256 ymm ymm
// VPMASKMOVD xmm xmm m128
// VPMASKMOVD ymm ymm m256
//
// Construct and append a VPMASKMOVD instruction to the active function.
// Operates on the global context.
func VPMASKMOVD(mxy, xy, mxy1 operand.Op) { ctx.VPMASKMOVD(mxy, xy, mxy1) }
// VPMASKMOVQ: Conditional Move Packed Quadword Integers.
//
// Forms:
//
// VPMASKMOVQ m128 xmm xmm
// VPMASKMOVQ m256 ymm ymm
// VPMASKMOVQ xmm xmm m128
// VPMASKMOVQ ymm ymm m256
//
// Construct and append a VPMASKMOVQ instruction to the active function.
func (c *Context) VPMASKMOVQ(mxy, xy, mxy1 operand.Op) {
c.addinstruction(x86.VPMASKMOVQ(mxy, xy, mxy1))
}
// VPMASKMOVQ: Conditional Move Packed Quadword Integers.
//
// Forms:
//
// VPMASKMOVQ m128 xmm xmm
// VPMASKMOVQ m256 ymm ymm
// VPMASKMOVQ xmm xmm m128
// VPMASKMOVQ ymm ymm m256
//
// Construct and append a VPMASKMOVQ instruction to the active function.
// Operates on the global context.
func VPMASKMOVQ(mxy, xy, mxy1 operand.Op) { ctx.VPMASKMOVQ(mxy, xy, mxy1) }
// VPMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMAXSB m256 ymm ymm
// VPMAXSB ymm ymm ymm
// VPMAXSB m128 xmm xmm
// VPMAXSB xmm xmm xmm
// VPMAXSB m128 xmm k xmm
// VPMAXSB m256 ymm k ymm
// VPMAXSB xmm xmm k xmm
// VPMAXSB ymm ymm k ymm
// VPMAXSB m512 zmm k zmm
// VPMAXSB m512 zmm zmm
// VPMAXSB zmm zmm k zmm
// VPMAXSB zmm zmm zmm
//
// Construct and append a VPMAXSB instruction to the active function.
func (c *Context) VPMAXSB(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSB(ops...))
}
// VPMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMAXSB m256 ymm ymm
// VPMAXSB ymm ymm ymm
// VPMAXSB m128 xmm xmm
// VPMAXSB xmm xmm xmm
// VPMAXSB m128 xmm k xmm
// VPMAXSB m256 ymm k ymm
// VPMAXSB xmm xmm k xmm
// VPMAXSB ymm ymm k ymm
// VPMAXSB m512 zmm k zmm
// VPMAXSB m512 zmm zmm
// VPMAXSB zmm zmm k zmm
// VPMAXSB zmm zmm zmm
//
// Construct and append a VPMAXSB instruction to the active function.
// Operates on the global context.
func VPMAXSB(ops ...operand.Op) { ctx.VPMAXSB(ops...) }
// VPMAXSB_Z: Maximum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSB.Z m128 xmm k xmm
// VPMAXSB.Z m256 ymm k ymm
// VPMAXSB.Z xmm xmm k xmm
// VPMAXSB.Z ymm ymm k ymm
// VPMAXSB.Z m512 zmm k zmm
// VPMAXSB.Z zmm zmm k zmm
//
// Construct and append a VPMAXSB.Z instruction to the active function.
func (c *Context) VPMAXSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSB_Z(mxyz, xyz, k, xyz1))
}
// VPMAXSB_Z: Maximum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSB.Z m128 xmm k xmm
// VPMAXSB.Z m256 ymm k ymm
// VPMAXSB.Z xmm xmm k xmm
// VPMAXSB.Z ymm ymm k ymm
// VPMAXSB.Z m512 zmm k zmm
// VPMAXSB.Z zmm zmm k zmm
//
// Construct and append a VPMAXSB.Z instruction to the active function.
// Operates on the global context.
func VPMAXSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXSB_Z(mxyz, xyz, k, xyz1) }
// VPMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMAXSD m256 ymm ymm
// VPMAXSD ymm ymm ymm
// VPMAXSD m128 xmm xmm
// VPMAXSD xmm xmm xmm
// VPMAXSD m128 xmm k xmm
// VPMAXSD m256 ymm k ymm
// VPMAXSD xmm xmm k xmm
// VPMAXSD ymm ymm k ymm
// VPMAXSD m512 zmm k zmm
// VPMAXSD m512 zmm zmm
// VPMAXSD zmm zmm k zmm
// VPMAXSD zmm zmm zmm
//
// Construct and append a VPMAXSD instruction to the active function.
func (c *Context) VPMAXSD(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSD(ops...))
}
// VPMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMAXSD m256 ymm ymm
// VPMAXSD ymm ymm ymm
// VPMAXSD m128 xmm xmm
// VPMAXSD xmm xmm xmm
// VPMAXSD m128 xmm k xmm
// VPMAXSD m256 ymm k ymm
// VPMAXSD xmm xmm k xmm
// VPMAXSD ymm ymm k ymm
// VPMAXSD m512 zmm k zmm
// VPMAXSD m512 zmm zmm
// VPMAXSD zmm zmm k zmm
// VPMAXSD zmm zmm zmm
//
// Construct and append a VPMAXSD instruction to the active function.
// Operates on the global context.
func VPMAXSD(ops ...operand.Op) { ctx.VPMAXSD(ops...) }
// VPMAXSD_BCST: Maximum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXSD.BCST m32 xmm k xmm
// VPMAXSD.BCST m32 xmm xmm
// VPMAXSD.BCST m32 ymm k ymm
// VPMAXSD.BCST m32 ymm ymm
// VPMAXSD.BCST m32 zmm k zmm
// VPMAXSD.BCST m32 zmm zmm
//
// Construct and append a VPMAXSD.BCST instruction to the active function.
func (c *Context) VPMAXSD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSD_BCST(ops...))
}
// VPMAXSD_BCST: Maximum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXSD.BCST m32 xmm k xmm
// VPMAXSD.BCST m32 xmm xmm
// VPMAXSD.BCST m32 ymm k ymm
// VPMAXSD.BCST m32 ymm ymm
// VPMAXSD.BCST m32 zmm k zmm
// VPMAXSD.BCST m32 zmm zmm
//
// Construct and append a VPMAXSD.BCST instruction to the active function.
// Operates on the global context.
func VPMAXSD_BCST(ops ...operand.Op) { ctx.VPMAXSD_BCST(ops...) }
// VPMAXSD_BCST_Z: Maximum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSD.BCST.Z m32 xmm k xmm
// VPMAXSD.BCST.Z m32 ymm k ymm
// VPMAXSD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMAXSD.BCST.Z instruction to the active function.
func (c *Context) VPMAXSD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSD_BCST_Z(m, xyz, k, xyz1))
}
// VPMAXSD_BCST_Z: Maximum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSD.BCST.Z m32 xmm k xmm
// VPMAXSD.BCST.Z m32 ymm k ymm
// VPMAXSD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMAXSD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMAXSD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMAXSD_BCST_Z(m, xyz, k, xyz1) }
// VPMAXSD_Z: Maximum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSD.Z m128 xmm k xmm
// VPMAXSD.Z m256 ymm k ymm
// VPMAXSD.Z xmm xmm k xmm
// VPMAXSD.Z ymm ymm k ymm
// VPMAXSD.Z m512 zmm k zmm
// VPMAXSD.Z zmm zmm k zmm
//
// Construct and append a VPMAXSD.Z instruction to the active function.
func (c *Context) VPMAXSD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSD_Z(mxyz, xyz, k, xyz1))
}
// VPMAXSD_Z: Maximum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSD.Z m128 xmm k xmm
// VPMAXSD.Z m256 ymm k ymm
// VPMAXSD.Z xmm xmm k xmm
// VPMAXSD.Z ymm ymm k ymm
// VPMAXSD.Z m512 zmm k zmm
// VPMAXSD.Z zmm zmm k zmm
//
// Construct and append a VPMAXSD.Z instruction to the active function.
// Operates on the global context.
func VPMAXSD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXSD_Z(mxyz, xyz, k, xyz1) }
// VPMAXSQ: Maximum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMAXSQ m128 xmm k xmm
// VPMAXSQ m128 xmm xmm
// VPMAXSQ m256 ymm k ymm
// VPMAXSQ m256 ymm ymm
// VPMAXSQ xmm xmm k xmm
// VPMAXSQ xmm xmm xmm
// VPMAXSQ ymm ymm k ymm
// VPMAXSQ ymm ymm ymm
// VPMAXSQ m512 zmm k zmm
// VPMAXSQ m512 zmm zmm
// VPMAXSQ zmm zmm k zmm
// VPMAXSQ zmm zmm zmm
//
// Construct and append a VPMAXSQ instruction to the active function.
func (c *Context) VPMAXSQ(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSQ(ops...))
}
// VPMAXSQ: Maximum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMAXSQ m128 xmm k xmm
// VPMAXSQ m128 xmm xmm
// VPMAXSQ m256 ymm k ymm
// VPMAXSQ m256 ymm ymm
// VPMAXSQ xmm xmm k xmm
// VPMAXSQ xmm xmm xmm
// VPMAXSQ ymm ymm k ymm
// VPMAXSQ ymm ymm ymm
// VPMAXSQ m512 zmm k zmm
// VPMAXSQ m512 zmm zmm
// VPMAXSQ zmm zmm k zmm
// VPMAXSQ zmm zmm zmm
//
// Construct and append a VPMAXSQ instruction to the active function.
// Operates on the global context.
func VPMAXSQ(ops ...operand.Op) { ctx.VPMAXSQ(ops...) }
// VPMAXSQ_BCST: Maximum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXSQ.BCST m64 xmm k xmm
// VPMAXSQ.BCST m64 xmm xmm
// VPMAXSQ.BCST m64 ymm k ymm
// VPMAXSQ.BCST m64 ymm ymm
// VPMAXSQ.BCST m64 zmm k zmm
// VPMAXSQ.BCST m64 zmm zmm
//
// Construct and append a VPMAXSQ.BCST instruction to the active function.
func (c *Context) VPMAXSQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSQ_BCST(ops...))
}
// VPMAXSQ_BCST: Maximum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXSQ.BCST m64 xmm k xmm
// VPMAXSQ.BCST m64 xmm xmm
// VPMAXSQ.BCST m64 ymm k ymm
// VPMAXSQ.BCST m64 ymm ymm
// VPMAXSQ.BCST m64 zmm k zmm
// VPMAXSQ.BCST m64 zmm zmm
//
// Construct and append a VPMAXSQ.BCST instruction to the active function.
// Operates on the global context.
func VPMAXSQ_BCST(ops ...operand.Op) { ctx.VPMAXSQ_BCST(ops...) }
// VPMAXSQ_BCST_Z: Maximum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.BCST.Z m64 xmm k xmm
// VPMAXSQ.BCST.Z m64 ymm k ymm
// VPMAXSQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMAXSQ.BCST.Z instruction to the active function.
func (c *Context) VPMAXSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMAXSQ_BCST_Z: Maximum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.BCST.Z m64 xmm k xmm
// VPMAXSQ.BCST.Z m64 ymm k ymm
// VPMAXSQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMAXSQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMAXSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMAXSQ_BCST_Z(m, xyz, k, xyz1) }
// VPMAXSQ_Z: Maximum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.Z m128 xmm k xmm
// VPMAXSQ.Z m256 ymm k ymm
// VPMAXSQ.Z xmm xmm k xmm
// VPMAXSQ.Z ymm ymm k ymm
// VPMAXSQ.Z m512 zmm k zmm
// VPMAXSQ.Z zmm zmm k zmm
//
// Construct and append a VPMAXSQ.Z instruction to the active function.
func (c *Context) VPMAXSQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSQ_Z(mxyz, xyz, k, xyz1))
}
// VPMAXSQ_Z: Maximum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.Z m128 xmm k xmm
// VPMAXSQ.Z m256 ymm k ymm
// VPMAXSQ.Z xmm xmm k xmm
// VPMAXSQ.Z ymm ymm k ymm
// VPMAXSQ.Z m512 zmm k zmm
// VPMAXSQ.Z zmm zmm k zmm
//
// Construct and append a VPMAXSQ.Z instruction to the active function.
// Operates on the global context.
func VPMAXSQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXSQ_Z(mxyz, xyz, k, xyz1) }
// VPMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// VPMAXSW m256 ymm ymm
// VPMAXSW ymm ymm ymm
// VPMAXSW m128 xmm xmm
// VPMAXSW xmm xmm xmm
// VPMAXSW m128 xmm k xmm
// VPMAXSW m256 ymm k ymm
// VPMAXSW xmm xmm k xmm
// VPMAXSW ymm ymm k ymm
// VPMAXSW m512 zmm k zmm
// VPMAXSW m512 zmm zmm
// VPMAXSW zmm zmm k zmm
// VPMAXSW zmm zmm zmm
//
// Construct and append a VPMAXSW instruction to the active function.
func (c *Context) VPMAXSW(ops ...operand.Op) {
c.addinstruction(x86.VPMAXSW(ops...))
}
// VPMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// VPMAXSW m256 ymm ymm
// VPMAXSW ymm ymm ymm
// VPMAXSW m128 xmm xmm
// VPMAXSW xmm xmm xmm
// VPMAXSW m128 xmm k xmm
// VPMAXSW m256 ymm k ymm
// VPMAXSW xmm xmm k xmm
// VPMAXSW ymm ymm k ymm
// VPMAXSW m512 zmm k zmm
// VPMAXSW m512 zmm zmm
// VPMAXSW zmm zmm k zmm
// VPMAXSW zmm zmm zmm
//
// Construct and append a VPMAXSW instruction to the active function.
// Operates on the global context.
func VPMAXSW(ops ...operand.Op) { ctx.VPMAXSW(ops...) }
// VPMAXSW_Z: Maximum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSW.Z m128 xmm k xmm
// VPMAXSW.Z m256 ymm k ymm
// VPMAXSW.Z xmm xmm k xmm
// VPMAXSW.Z ymm ymm k ymm
// VPMAXSW.Z m512 zmm k zmm
// VPMAXSW.Z zmm zmm k zmm
//
// Construct and append a VPMAXSW.Z instruction to the active function.
func (c *Context) VPMAXSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXSW_Z(mxyz, xyz, k, xyz1))
}
// VPMAXSW_Z: Maximum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSW.Z m128 xmm k xmm
// VPMAXSW.Z m256 ymm k ymm
// VPMAXSW.Z xmm xmm k xmm
// VPMAXSW.Z ymm ymm k ymm
// VPMAXSW.Z m512 zmm k zmm
// VPMAXSW.Z zmm zmm k zmm
//
// Construct and append a VPMAXSW.Z instruction to the active function.
// Operates on the global context.
func VPMAXSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXSW_Z(mxyz, xyz, k, xyz1) }
// VPMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMAXUB m256 ymm ymm
// VPMAXUB ymm ymm ymm
// VPMAXUB m128 xmm xmm
// VPMAXUB xmm xmm xmm
// VPMAXUB m128 xmm k xmm
// VPMAXUB m256 ymm k ymm
// VPMAXUB xmm xmm k xmm
// VPMAXUB ymm ymm k ymm
// VPMAXUB m512 zmm k zmm
// VPMAXUB m512 zmm zmm
// VPMAXUB zmm zmm k zmm
// VPMAXUB zmm zmm zmm
//
// Construct and append a VPMAXUB instruction to the active function.
func (c *Context) VPMAXUB(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUB(ops...))
}
// VPMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMAXUB m256 ymm ymm
// VPMAXUB ymm ymm ymm
// VPMAXUB m128 xmm xmm
// VPMAXUB xmm xmm xmm
// VPMAXUB m128 xmm k xmm
// VPMAXUB m256 ymm k ymm
// VPMAXUB xmm xmm k xmm
// VPMAXUB ymm ymm k ymm
// VPMAXUB m512 zmm k zmm
// VPMAXUB m512 zmm zmm
// VPMAXUB zmm zmm k zmm
// VPMAXUB zmm zmm zmm
//
// Construct and append a VPMAXUB instruction to the active function.
// Operates on the global context.
func VPMAXUB(ops ...operand.Op) { ctx.VPMAXUB(ops...) }
// VPMAXUB_Z: Maximum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUB.Z m128 xmm k xmm
// VPMAXUB.Z m256 ymm k ymm
// VPMAXUB.Z xmm xmm k xmm
// VPMAXUB.Z ymm ymm k ymm
// VPMAXUB.Z m512 zmm k zmm
// VPMAXUB.Z zmm zmm k zmm
//
// Construct and append a VPMAXUB.Z instruction to the active function.
func (c *Context) VPMAXUB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUB_Z(mxyz, xyz, k, xyz1))
}
// VPMAXUB_Z: Maximum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUB.Z m128 xmm k xmm
// VPMAXUB.Z m256 ymm k ymm
// VPMAXUB.Z xmm xmm k xmm
// VPMAXUB.Z ymm ymm k ymm
// VPMAXUB.Z m512 zmm k zmm
// VPMAXUB.Z zmm zmm k zmm
//
// Construct and append a VPMAXUB.Z instruction to the active function.
// Operates on the global context.
func VPMAXUB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXUB_Z(mxyz, xyz, k, xyz1) }
// VPMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMAXUD m256 ymm ymm
// VPMAXUD ymm ymm ymm
// VPMAXUD m128 xmm xmm
// VPMAXUD xmm xmm xmm
// VPMAXUD m128 xmm k xmm
// VPMAXUD m256 ymm k ymm
// VPMAXUD xmm xmm k xmm
// VPMAXUD ymm ymm k ymm
// VPMAXUD m512 zmm k zmm
// VPMAXUD m512 zmm zmm
// VPMAXUD zmm zmm k zmm
// VPMAXUD zmm zmm zmm
//
// Construct and append a VPMAXUD instruction to the active function.
func (c *Context) VPMAXUD(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUD(ops...))
}
// VPMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMAXUD m256 ymm ymm
// VPMAXUD ymm ymm ymm
// VPMAXUD m128 xmm xmm
// VPMAXUD xmm xmm xmm
// VPMAXUD m128 xmm k xmm
// VPMAXUD m256 ymm k ymm
// VPMAXUD xmm xmm k xmm
// VPMAXUD ymm ymm k ymm
// VPMAXUD m512 zmm k zmm
// VPMAXUD m512 zmm zmm
// VPMAXUD zmm zmm k zmm
// VPMAXUD zmm zmm zmm
//
// Construct and append a VPMAXUD instruction to the active function.
// Operates on the global context.
func VPMAXUD(ops ...operand.Op) { ctx.VPMAXUD(ops...) }
// VPMAXUD_BCST: Maximum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXUD.BCST m32 xmm k xmm
// VPMAXUD.BCST m32 xmm xmm
// VPMAXUD.BCST m32 ymm k ymm
// VPMAXUD.BCST m32 ymm ymm
// VPMAXUD.BCST m32 zmm k zmm
// VPMAXUD.BCST m32 zmm zmm
//
// Construct and append a VPMAXUD.BCST instruction to the active function.
func (c *Context) VPMAXUD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUD_BCST(ops...))
}
// VPMAXUD_BCST: Maximum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXUD.BCST m32 xmm k xmm
// VPMAXUD.BCST m32 xmm xmm
// VPMAXUD.BCST m32 ymm k ymm
// VPMAXUD.BCST m32 ymm ymm
// VPMAXUD.BCST m32 zmm k zmm
// VPMAXUD.BCST m32 zmm zmm
//
// Construct and append a VPMAXUD.BCST instruction to the active function.
// Operates on the global context.
func VPMAXUD_BCST(ops ...operand.Op) { ctx.VPMAXUD_BCST(ops...) }
// VPMAXUD_BCST_Z: Maximum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUD.BCST.Z m32 xmm k xmm
// VPMAXUD.BCST.Z m32 ymm k ymm
// VPMAXUD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMAXUD.BCST.Z instruction to the active function.
func (c *Context) VPMAXUD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUD_BCST_Z(m, xyz, k, xyz1))
}
// VPMAXUD_BCST_Z: Maximum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUD.BCST.Z m32 xmm k xmm
// VPMAXUD.BCST.Z m32 ymm k ymm
// VPMAXUD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMAXUD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMAXUD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMAXUD_BCST_Z(m, xyz, k, xyz1) }
// VPMAXUD_Z: Maximum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUD.Z m128 xmm k xmm
// VPMAXUD.Z m256 ymm k ymm
// VPMAXUD.Z xmm xmm k xmm
// VPMAXUD.Z ymm ymm k ymm
// VPMAXUD.Z m512 zmm k zmm
// VPMAXUD.Z zmm zmm k zmm
//
// Construct and append a VPMAXUD.Z instruction to the active function.
func (c *Context) VPMAXUD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUD_Z(mxyz, xyz, k, xyz1))
}
// VPMAXUD_Z: Maximum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUD.Z m128 xmm k xmm
// VPMAXUD.Z m256 ymm k ymm
// VPMAXUD.Z xmm xmm k xmm
// VPMAXUD.Z ymm ymm k ymm
// VPMAXUD.Z m512 zmm k zmm
// VPMAXUD.Z zmm zmm k zmm
//
// Construct and append a VPMAXUD.Z instruction to the active function.
// Operates on the global context.
func VPMAXUD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXUD_Z(mxyz, xyz, k, xyz1) }
// VPMAXUQ: Maximum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMAXUQ m128 xmm k xmm
// VPMAXUQ m128 xmm xmm
// VPMAXUQ m256 ymm k ymm
// VPMAXUQ m256 ymm ymm
// VPMAXUQ xmm xmm k xmm
// VPMAXUQ xmm xmm xmm
// VPMAXUQ ymm ymm k ymm
// VPMAXUQ ymm ymm ymm
// VPMAXUQ m512 zmm k zmm
// VPMAXUQ m512 zmm zmm
// VPMAXUQ zmm zmm k zmm
// VPMAXUQ zmm zmm zmm
//
// Construct and append a VPMAXUQ instruction to the active function.
func (c *Context) VPMAXUQ(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUQ(ops...))
}
// VPMAXUQ: Maximum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMAXUQ m128 xmm k xmm
// VPMAXUQ m128 xmm xmm
// VPMAXUQ m256 ymm k ymm
// VPMAXUQ m256 ymm ymm
// VPMAXUQ xmm xmm k xmm
// VPMAXUQ xmm xmm xmm
// VPMAXUQ ymm ymm k ymm
// VPMAXUQ ymm ymm ymm
// VPMAXUQ m512 zmm k zmm
// VPMAXUQ m512 zmm zmm
// VPMAXUQ zmm zmm k zmm
// VPMAXUQ zmm zmm zmm
//
// Construct and append a VPMAXUQ instruction to the active function.
// Operates on the global context.
func VPMAXUQ(ops ...operand.Op) { ctx.VPMAXUQ(ops...) }
// VPMAXUQ_BCST: Maximum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXUQ.BCST m64 xmm k xmm
// VPMAXUQ.BCST m64 xmm xmm
// VPMAXUQ.BCST m64 ymm k ymm
// VPMAXUQ.BCST m64 ymm ymm
// VPMAXUQ.BCST m64 zmm k zmm
// VPMAXUQ.BCST m64 zmm zmm
//
// Construct and append a VPMAXUQ.BCST instruction to the active function.
func (c *Context) VPMAXUQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUQ_BCST(ops...))
}
// VPMAXUQ_BCST: Maximum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXUQ.BCST m64 xmm k xmm
// VPMAXUQ.BCST m64 xmm xmm
// VPMAXUQ.BCST m64 ymm k ymm
// VPMAXUQ.BCST m64 ymm ymm
// VPMAXUQ.BCST m64 zmm k zmm
// VPMAXUQ.BCST m64 zmm zmm
//
// Construct and append a VPMAXUQ.BCST instruction to the active function.
// Operates on the global context.
func VPMAXUQ_BCST(ops ...operand.Op) { ctx.VPMAXUQ_BCST(ops...) }
// VPMAXUQ_BCST_Z: Maximum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.BCST.Z m64 xmm k xmm
// VPMAXUQ.BCST.Z m64 ymm k ymm
// VPMAXUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMAXUQ.BCST.Z instruction to the active function.
func (c *Context) VPMAXUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMAXUQ_BCST_Z: Maximum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.BCST.Z m64 xmm k xmm
// VPMAXUQ.BCST.Z m64 ymm k ymm
// VPMAXUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMAXUQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMAXUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMAXUQ_BCST_Z(m, xyz, k, xyz1) }
// VPMAXUQ_Z: Maximum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.Z m128 xmm k xmm
// VPMAXUQ.Z m256 ymm k ymm
// VPMAXUQ.Z xmm xmm k xmm
// VPMAXUQ.Z ymm ymm k ymm
// VPMAXUQ.Z m512 zmm k zmm
// VPMAXUQ.Z zmm zmm k zmm
//
// Construct and append a VPMAXUQ.Z instruction to the active function.
func (c *Context) VPMAXUQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUQ_Z(mxyz, xyz, k, xyz1))
}
// VPMAXUQ_Z: Maximum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.Z m128 xmm k xmm
// VPMAXUQ.Z m256 ymm k ymm
// VPMAXUQ.Z xmm xmm k xmm
// VPMAXUQ.Z ymm ymm k ymm
// VPMAXUQ.Z m512 zmm k zmm
// VPMAXUQ.Z zmm zmm k zmm
//
// Construct and append a VPMAXUQ.Z instruction to the active function.
// Operates on the global context.
func VPMAXUQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXUQ_Z(mxyz, xyz, k, xyz1) }
// VPMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMAXUW m256 ymm ymm
// VPMAXUW ymm ymm ymm
// VPMAXUW m128 xmm xmm
// VPMAXUW xmm xmm xmm
// VPMAXUW m128 xmm k xmm
// VPMAXUW m256 ymm k ymm
// VPMAXUW xmm xmm k xmm
// VPMAXUW ymm ymm k ymm
// VPMAXUW m512 zmm k zmm
// VPMAXUW m512 zmm zmm
// VPMAXUW zmm zmm k zmm
// VPMAXUW zmm zmm zmm
//
// Construct and append a VPMAXUW instruction to the active function.
func (c *Context) VPMAXUW(ops ...operand.Op) {
c.addinstruction(x86.VPMAXUW(ops...))
}
// VPMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMAXUW m256 ymm ymm
// VPMAXUW ymm ymm ymm
// VPMAXUW m128 xmm xmm
// VPMAXUW xmm xmm xmm
// VPMAXUW m128 xmm k xmm
// VPMAXUW m256 ymm k ymm
// VPMAXUW xmm xmm k xmm
// VPMAXUW ymm ymm k ymm
// VPMAXUW m512 zmm k zmm
// VPMAXUW m512 zmm zmm
// VPMAXUW zmm zmm k zmm
// VPMAXUW zmm zmm zmm
//
// Construct and append a VPMAXUW instruction to the active function.
// Operates on the global context.
func VPMAXUW(ops ...operand.Op) { ctx.VPMAXUW(ops...) }
// VPMAXUW_Z: Maximum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUW.Z m128 xmm k xmm
// VPMAXUW.Z m256 ymm k ymm
// VPMAXUW.Z xmm xmm k xmm
// VPMAXUW.Z ymm ymm k ymm
// VPMAXUW.Z m512 zmm k zmm
// VPMAXUW.Z zmm zmm k zmm
//
// Construct and append a VPMAXUW.Z instruction to the active function.
func (c *Context) VPMAXUW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMAXUW_Z(mxyz, xyz, k, xyz1))
}
// VPMAXUW_Z: Maximum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUW.Z m128 xmm k xmm
// VPMAXUW.Z m256 ymm k ymm
// VPMAXUW.Z xmm xmm k xmm
// VPMAXUW.Z ymm ymm k ymm
// VPMAXUW.Z m512 zmm k zmm
// VPMAXUW.Z zmm zmm k zmm
//
// Construct and append a VPMAXUW.Z instruction to the active function.
// Operates on the global context.
func VPMAXUW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMAXUW_Z(mxyz, xyz, k, xyz1) }
// VPMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMINSB m256 ymm ymm
// VPMINSB ymm ymm ymm
// VPMINSB m128 xmm xmm
// VPMINSB xmm xmm xmm
// VPMINSB m128 xmm k xmm
// VPMINSB m256 ymm k ymm
// VPMINSB xmm xmm k xmm
// VPMINSB ymm ymm k ymm
// VPMINSB m512 zmm k zmm
// VPMINSB m512 zmm zmm
// VPMINSB zmm zmm k zmm
// VPMINSB zmm zmm zmm
//
// Construct and append a VPMINSB instruction to the active function.
func (c *Context) VPMINSB(ops ...operand.Op) {
c.addinstruction(x86.VPMINSB(ops...))
}
// VPMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMINSB m256 ymm ymm
// VPMINSB ymm ymm ymm
// VPMINSB m128 xmm xmm
// VPMINSB xmm xmm xmm
// VPMINSB m128 xmm k xmm
// VPMINSB m256 ymm k ymm
// VPMINSB xmm xmm k xmm
// VPMINSB ymm ymm k ymm
// VPMINSB m512 zmm k zmm
// VPMINSB m512 zmm zmm
// VPMINSB zmm zmm k zmm
// VPMINSB zmm zmm zmm
//
// Construct and append a VPMINSB instruction to the active function.
// Operates on the global context.
func VPMINSB(ops ...operand.Op) { ctx.VPMINSB(ops...) }
// VPMINSB_Z: Minimum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSB.Z m128 xmm k xmm
// VPMINSB.Z m256 ymm k ymm
// VPMINSB.Z xmm xmm k xmm
// VPMINSB.Z ymm ymm k ymm
// VPMINSB.Z m512 zmm k zmm
// VPMINSB.Z zmm zmm k zmm
//
// Construct and append a VPMINSB.Z instruction to the active function.
func (c *Context) VPMINSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSB_Z(mxyz, xyz, k, xyz1))
}
// VPMINSB_Z: Minimum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSB.Z m128 xmm k xmm
// VPMINSB.Z m256 ymm k ymm
// VPMINSB.Z xmm xmm k xmm
// VPMINSB.Z ymm ymm k ymm
// VPMINSB.Z m512 zmm k zmm
// VPMINSB.Z zmm zmm k zmm
//
// Construct and append a VPMINSB.Z instruction to the active function.
// Operates on the global context.
func VPMINSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINSB_Z(mxyz, xyz, k, xyz1) }
// VPMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMINSD m256 ymm ymm
// VPMINSD ymm ymm ymm
// VPMINSD m128 xmm xmm
// VPMINSD xmm xmm xmm
// VPMINSD m128 xmm k xmm
// VPMINSD m256 ymm k ymm
// VPMINSD xmm xmm k xmm
// VPMINSD ymm ymm k ymm
// VPMINSD m512 zmm k zmm
// VPMINSD m512 zmm zmm
// VPMINSD zmm zmm k zmm
// VPMINSD zmm zmm zmm
//
// Construct and append a VPMINSD instruction to the active function.
func (c *Context) VPMINSD(ops ...operand.Op) {
c.addinstruction(x86.VPMINSD(ops...))
}
// VPMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMINSD m256 ymm ymm
// VPMINSD ymm ymm ymm
// VPMINSD m128 xmm xmm
// VPMINSD xmm xmm xmm
// VPMINSD m128 xmm k xmm
// VPMINSD m256 ymm k ymm
// VPMINSD xmm xmm k xmm
// VPMINSD ymm ymm k ymm
// VPMINSD m512 zmm k zmm
// VPMINSD m512 zmm zmm
// VPMINSD zmm zmm k zmm
// VPMINSD zmm zmm zmm
//
// Construct and append a VPMINSD instruction to the active function.
// Operates on the global context.
func VPMINSD(ops ...operand.Op) { ctx.VPMINSD(ops...) }
// VPMINSD_BCST: Minimum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINSD.BCST m32 xmm k xmm
// VPMINSD.BCST m32 xmm xmm
// VPMINSD.BCST m32 ymm k ymm
// VPMINSD.BCST m32 ymm ymm
// VPMINSD.BCST m32 zmm k zmm
// VPMINSD.BCST m32 zmm zmm
//
// Construct and append a VPMINSD.BCST instruction to the active function.
func (c *Context) VPMINSD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMINSD_BCST(ops...))
}
// VPMINSD_BCST: Minimum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINSD.BCST m32 xmm k xmm
// VPMINSD.BCST m32 xmm xmm
// VPMINSD.BCST m32 ymm k ymm
// VPMINSD.BCST m32 ymm ymm
// VPMINSD.BCST m32 zmm k zmm
// VPMINSD.BCST m32 zmm zmm
//
// Construct and append a VPMINSD.BCST instruction to the active function.
// Operates on the global context.
func VPMINSD_BCST(ops ...operand.Op) { ctx.VPMINSD_BCST(ops...) }
// VPMINSD_BCST_Z: Minimum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSD.BCST.Z m32 xmm k xmm
// VPMINSD.BCST.Z m32 ymm k ymm
// VPMINSD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMINSD.BCST.Z instruction to the active function.
func (c *Context) VPMINSD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSD_BCST_Z(m, xyz, k, xyz1))
}
// VPMINSD_BCST_Z: Minimum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSD.BCST.Z m32 xmm k xmm
// VPMINSD.BCST.Z m32 ymm k ymm
// VPMINSD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMINSD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMINSD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMINSD_BCST_Z(m, xyz, k, xyz1) }
// VPMINSD_Z: Minimum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSD.Z m128 xmm k xmm
// VPMINSD.Z m256 ymm k ymm
// VPMINSD.Z xmm xmm k xmm
// VPMINSD.Z ymm ymm k ymm
// VPMINSD.Z m512 zmm k zmm
// VPMINSD.Z zmm zmm k zmm
//
// Construct and append a VPMINSD.Z instruction to the active function.
func (c *Context) VPMINSD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSD_Z(mxyz, xyz, k, xyz1))
}
// VPMINSD_Z: Minimum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSD.Z m128 xmm k xmm
// VPMINSD.Z m256 ymm k ymm
// VPMINSD.Z xmm xmm k xmm
// VPMINSD.Z ymm ymm k ymm
// VPMINSD.Z m512 zmm k zmm
// VPMINSD.Z zmm zmm k zmm
//
// Construct and append a VPMINSD.Z instruction to the active function.
// Operates on the global context.
func VPMINSD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINSD_Z(mxyz, xyz, k, xyz1) }
// VPMINSQ: Minimum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMINSQ m128 xmm k xmm
// VPMINSQ m128 xmm xmm
// VPMINSQ m256 ymm k ymm
// VPMINSQ m256 ymm ymm
// VPMINSQ xmm xmm k xmm
// VPMINSQ xmm xmm xmm
// VPMINSQ ymm ymm k ymm
// VPMINSQ ymm ymm ymm
// VPMINSQ m512 zmm k zmm
// VPMINSQ m512 zmm zmm
// VPMINSQ zmm zmm k zmm
// VPMINSQ zmm zmm zmm
//
// Construct and append a VPMINSQ instruction to the active function.
func (c *Context) VPMINSQ(ops ...operand.Op) {
c.addinstruction(x86.VPMINSQ(ops...))
}
// VPMINSQ: Minimum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMINSQ m128 xmm k xmm
// VPMINSQ m128 xmm xmm
// VPMINSQ m256 ymm k ymm
// VPMINSQ m256 ymm ymm
// VPMINSQ xmm xmm k xmm
// VPMINSQ xmm xmm xmm
// VPMINSQ ymm ymm k ymm
// VPMINSQ ymm ymm ymm
// VPMINSQ m512 zmm k zmm
// VPMINSQ m512 zmm zmm
// VPMINSQ zmm zmm k zmm
// VPMINSQ zmm zmm zmm
//
// Construct and append a VPMINSQ instruction to the active function.
// Operates on the global context.
func VPMINSQ(ops ...operand.Op) { ctx.VPMINSQ(ops...) }
// VPMINSQ_BCST: Minimum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINSQ.BCST m64 xmm k xmm
// VPMINSQ.BCST m64 xmm xmm
// VPMINSQ.BCST m64 ymm k ymm
// VPMINSQ.BCST m64 ymm ymm
// VPMINSQ.BCST m64 zmm k zmm
// VPMINSQ.BCST m64 zmm zmm
//
// Construct and append a VPMINSQ.BCST instruction to the active function.
func (c *Context) VPMINSQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMINSQ_BCST(ops...))
}
// VPMINSQ_BCST: Minimum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINSQ.BCST m64 xmm k xmm
// VPMINSQ.BCST m64 xmm xmm
// VPMINSQ.BCST m64 ymm k ymm
// VPMINSQ.BCST m64 ymm ymm
// VPMINSQ.BCST m64 zmm k zmm
// VPMINSQ.BCST m64 zmm zmm
//
// Construct and append a VPMINSQ.BCST instruction to the active function.
// Operates on the global context.
func VPMINSQ_BCST(ops ...operand.Op) { ctx.VPMINSQ_BCST(ops...) }
// VPMINSQ_BCST_Z: Minimum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSQ.BCST.Z m64 xmm k xmm
// VPMINSQ.BCST.Z m64 ymm k ymm
// VPMINSQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMINSQ.BCST.Z instruction to the active function.
func (c *Context) VPMINSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMINSQ_BCST_Z: Minimum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSQ.BCST.Z m64 xmm k xmm
// VPMINSQ.BCST.Z m64 ymm k ymm
// VPMINSQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMINSQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMINSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMINSQ_BCST_Z(m, xyz, k, xyz1) }
// VPMINSQ_Z: Minimum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSQ.Z m128 xmm k xmm
// VPMINSQ.Z m256 ymm k ymm
// VPMINSQ.Z xmm xmm k xmm
// VPMINSQ.Z ymm ymm k ymm
// VPMINSQ.Z m512 zmm k zmm
// VPMINSQ.Z zmm zmm k zmm
//
// Construct and append a VPMINSQ.Z instruction to the active function.
func (c *Context) VPMINSQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSQ_Z(mxyz, xyz, k, xyz1))
}
// VPMINSQ_Z: Minimum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSQ.Z m128 xmm k xmm
// VPMINSQ.Z m256 ymm k ymm
// VPMINSQ.Z xmm xmm k xmm
// VPMINSQ.Z ymm ymm k ymm
// VPMINSQ.Z m512 zmm k zmm
// VPMINSQ.Z zmm zmm k zmm
//
// Construct and append a VPMINSQ.Z instruction to the active function.
// Operates on the global context.
func VPMINSQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINSQ_Z(mxyz, xyz, k, xyz1) }
// VPMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// VPMINSW m256 ymm ymm
// VPMINSW ymm ymm ymm
// VPMINSW m128 xmm xmm
// VPMINSW xmm xmm xmm
// VPMINSW m128 xmm k xmm
// VPMINSW m256 ymm k ymm
// VPMINSW xmm xmm k xmm
// VPMINSW ymm ymm k ymm
// VPMINSW m512 zmm k zmm
// VPMINSW m512 zmm zmm
// VPMINSW zmm zmm k zmm
// VPMINSW zmm zmm zmm
//
// Construct and append a VPMINSW instruction to the active function.
func (c *Context) VPMINSW(ops ...operand.Op) {
c.addinstruction(x86.VPMINSW(ops...))
}
// VPMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// VPMINSW m256 ymm ymm
// VPMINSW ymm ymm ymm
// VPMINSW m128 xmm xmm
// VPMINSW xmm xmm xmm
// VPMINSW m128 xmm k xmm
// VPMINSW m256 ymm k ymm
// VPMINSW xmm xmm k xmm
// VPMINSW ymm ymm k ymm
// VPMINSW m512 zmm k zmm
// VPMINSW m512 zmm zmm
// VPMINSW zmm zmm k zmm
// VPMINSW zmm zmm zmm
//
// Construct and append a VPMINSW instruction to the active function.
// Operates on the global context.
func VPMINSW(ops ...operand.Op) { ctx.VPMINSW(ops...) }
// VPMINSW_Z: Minimum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSW.Z m128 xmm k xmm
// VPMINSW.Z m256 ymm k ymm
// VPMINSW.Z xmm xmm k xmm
// VPMINSW.Z ymm ymm k ymm
// VPMINSW.Z m512 zmm k zmm
// VPMINSW.Z zmm zmm k zmm
//
// Construct and append a VPMINSW.Z instruction to the active function.
func (c *Context) VPMINSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINSW_Z(mxyz, xyz, k, xyz1))
}
// VPMINSW_Z: Minimum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSW.Z m128 xmm k xmm
// VPMINSW.Z m256 ymm k ymm
// VPMINSW.Z xmm xmm k xmm
// VPMINSW.Z ymm ymm k ymm
// VPMINSW.Z m512 zmm k zmm
// VPMINSW.Z zmm zmm k zmm
//
// Construct and append a VPMINSW.Z instruction to the active function.
// Operates on the global context.
func VPMINSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINSW_Z(mxyz, xyz, k, xyz1) }
// VPMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMINUB m256 ymm ymm
// VPMINUB ymm ymm ymm
// VPMINUB m128 xmm xmm
// VPMINUB xmm xmm xmm
// VPMINUB m128 xmm k xmm
// VPMINUB m256 ymm k ymm
// VPMINUB xmm xmm k xmm
// VPMINUB ymm ymm k ymm
// VPMINUB m512 zmm k zmm
// VPMINUB m512 zmm zmm
// VPMINUB zmm zmm k zmm
// VPMINUB zmm zmm zmm
//
// Construct and append a VPMINUB instruction to the active function.
func (c *Context) VPMINUB(ops ...operand.Op) {
c.addinstruction(x86.VPMINUB(ops...))
}
// VPMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMINUB m256 ymm ymm
// VPMINUB ymm ymm ymm
// VPMINUB m128 xmm xmm
// VPMINUB xmm xmm xmm
// VPMINUB m128 xmm k xmm
// VPMINUB m256 ymm k ymm
// VPMINUB xmm xmm k xmm
// VPMINUB ymm ymm k ymm
// VPMINUB m512 zmm k zmm
// VPMINUB m512 zmm zmm
// VPMINUB zmm zmm k zmm
// VPMINUB zmm zmm zmm
//
// Construct and append a VPMINUB instruction to the active function.
// Operates on the global context.
func VPMINUB(ops ...operand.Op) { ctx.VPMINUB(ops...) }
// VPMINUB_Z: Minimum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUB.Z m128 xmm k xmm
// VPMINUB.Z m256 ymm k ymm
// VPMINUB.Z xmm xmm k xmm
// VPMINUB.Z ymm ymm k ymm
// VPMINUB.Z m512 zmm k zmm
// VPMINUB.Z zmm zmm k zmm
//
// Construct and append a VPMINUB.Z instruction to the active function.
func (c *Context) VPMINUB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUB_Z(mxyz, xyz, k, xyz1))
}
// VPMINUB_Z: Minimum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUB.Z m128 xmm k xmm
// VPMINUB.Z m256 ymm k ymm
// VPMINUB.Z xmm xmm k xmm
// VPMINUB.Z ymm ymm k ymm
// VPMINUB.Z m512 zmm k zmm
// VPMINUB.Z zmm zmm k zmm
//
// Construct and append a VPMINUB.Z instruction to the active function.
// Operates on the global context.
func VPMINUB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINUB_Z(mxyz, xyz, k, xyz1) }
// VPMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMINUD m256 ymm ymm
// VPMINUD ymm ymm ymm
// VPMINUD m128 xmm xmm
// VPMINUD xmm xmm xmm
// VPMINUD m128 xmm k xmm
// VPMINUD m256 ymm k ymm
// VPMINUD xmm xmm k xmm
// VPMINUD ymm ymm k ymm
// VPMINUD m512 zmm k zmm
// VPMINUD m512 zmm zmm
// VPMINUD zmm zmm k zmm
// VPMINUD zmm zmm zmm
//
// Construct and append a VPMINUD instruction to the active function.
func (c *Context) VPMINUD(ops ...operand.Op) {
c.addinstruction(x86.VPMINUD(ops...))
}
// VPMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMINUD m256 ymm ymm
// VPMINUD ymm ymm ymm
// VPMINUD m128 xmm xmm
// VPMINUD xmm xmm xmm
// VPMINUD m128 xmm k xmm
// VPMINUD m256 ymm k ymm
// VPMINUD xmm xmm k xmm
// VPMINUD ymm ymm k ymm
// VPMINUD m512 zmm k zmm
// VPMINUD m512 zmm zmm
// VPMINUD zmm zmm k zmm
// VPMINUD zmm zmm zmm
//
// Construct and append a VPMINUD instruction to the active function.
// Operates on the global context.
func VPMINUD(ops ...operand.Op) { ctx.VPMINUD(ops...) }
// VPMINUD_BCST: Minimum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINUD.BCST m32 xmm k xmm
// VPMINUD.BCST m32 xmm xmm
// VPMINUD.BCST m32 ymm k ymm
// VPMINUD.BCST m32 ymm ymm
// VPMINUD.BCST m32 zmm k zmm
// VPMINUD.BCST m32 zmm zmm
//
// Construct and append a VPMINUD.BCST instruction to the active function.
func (c *Context) VPMINUD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMINUD_BCST(ops...))
}
// VPMINUD_BCST: Minimum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINUD.BCST m32 xmm k xmm
// VPMINUD.BCST m32 xmm xmm
// VPMINUD.BCST m32 ymm k ymm
// VPMINUD.BCST m32 ymm ymm
// VPMINUD.BCST m32 zmm k zmm
// VPMINUD.BCST m32 zmm zmm
//
// Construct and append a VPMINUD.BCST instruction to the active function.
// Operates on the global context.
func VPMINUD_BCST(ops ...operand.Op) { ctx.VPMINUD_BCST(ops...) }
// VPMINUD_BCST_Z: Minimum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUD.BCST.Z m32 xmm k xmm
// VPMINUD.BCST.Z m32 ymm k ymm
// VPMINUD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMINUD.BCST.Z instruction to the active function.
func (c *Context) VPMINUD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUD_BCST_Z(m, xyz, k, xyz1))
}
// VPMINUD_BCST_Z: Minimum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUD.BCST.Z m32 xmm k xmm
// VPMINUD.BCST.Z m32 ymm k ymm
// VPMINUD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMINUD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMINUD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMINUD_BCST_Z(m, xyz, k, xyz1) }
// VPMINUD_Z: Minimum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUD.Z m128 xmm k xmm
// VPMINUD.Z m256 ymm k ymm
// VPMINUD.Z xmm xmm k xmm
// VPMINUD.Z ymm ymm k ymm
// VPMINUD.Z m512 zmm k zmm
// VPMINUD.Z zmm zmm k zmm
//
// Construct and append a VPMINUD.Z instruction to the active function.
func (c *Context) VPMINUD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUD_Z(mxyz, xyz, k, xyz1))
}
// VPMINUD_Z: Minimum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUD.Z m128 xmm k xmm
// VPMINUD.Z m256 ymm k ymm
// VPMINUD.Z xmm xmm k xmm
// VPMINUD.Z ymm ymm k ymm
// VPMINUD.Z m512 zmm k zmm
// VPMINUD.Z zmm zmm k zmm
//
// Construct and append a VPMINUD.Z instruction to the active function.
// Operates on the global context.
func VPMINUD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINUD_Z(mxyz, xyz, k, xyz1) }
// VPMINUQ: Minimum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMINUQ m128 xmm k xmm
// VPMINUQ m128 xmm xmm
// VPMINUQ m256 ymm k ymm
// VPMINUQ m256 ymm ymm
// VPMINUQ xmm xmm k xmm
// VPMINUQ xmm xmm xmm
// VPMINUQ ymm ymm k ymm
// VPMINUQ ymm ymm ymm
// VPMINUQ m512 zmm k zmm
// VPMINUQ m512 zmm zmm
// VPMINUQ zmm zmm k zmm
// VPMINUQ zmm zmm zmm
//
// Construct and append a VPMINUQ instruction to the active function.
func (c *Context) VPMINUQ(ops ...operand.Op) {
c.addinstruction(x86.VPMINUQ(ops...))
}
// VPMINUQ: Minimum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMINUQ m128 xmm k xmm
// VPMINUQ m128 xmm xmm
// VPMINUQ m256 ymm k ymm
// VPMINUQ m256 ymm ymm
// VPMINUQ xmm xmm k xmm
// VPMINUQ xmm xmm xmm
// VPMINUQ ymm ymm k ymm
// VPMINUQ ymm ymm ymm
// VPMINUQ m512 zmm k zmm
// VPMINUQ m512 zmm zmm
// VPMINUQ zmm zmm k zmm
// VPMINUQ zmm zmm zmm
//
// Construct and append a VPMINUQ instruction to the active function.
// Operates on the global context.
func VPMINUQ(ops ...operand.Op) { ctx.VPMINUQ(ops...) }
// VPMINUQ_BCST: Minimum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINUQ.BCST m64 xmm k xmm
// VPMINUQ.BCST m64 xmm xmm
// VPMINUQ.BCST m64 ymm k ymm
// VPMINUQ.BCST m64 ymm ymm
// VPMINUQ.BCST m64 zmm k zmm
// VPMINUQ.BCST m64 zmm zmm
//
// Construct and append a VPMINUQ.BCST instruction to the active function.
func (c *Context) VPMINUQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMINUQ_BCST(ops...))
}
// VPMINUQ_BCST: Minimum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINUQ.BCST m64 xmm k xmm
// VPMINUQ.BCST m64 xmm xmm
// VPMINUQ.BCST m64 ymm k ymm
// VPMINUQ.BCST m64 ymm ymm
// VPMINUQ.BCST m64 zmm k zmm
// VPMINUQ.BCST m64 zmm zmm
//
// Construct and append a VPMINUQ.BCST instruction to the active function.
// Operates on the global context.
func VPMINUQ_BCST(ops ...operand.Op) { ctx.VPMINUQ_BCST(ops...) }
// VPMINUQ_BCST_Z: Minimum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUQ.BCST.Z m64 xmm k xmm
// VPMINUQ.BCST.Z m64 ymm k ymm
// VPMINUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMINUQ.BCST.Z instruction to the active function.
func (c *Context) VPMINUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMINUQ_BCST_Z: Minimum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUQ.BCST.Z m64 xmm k xmm
// VPMINUQ.BCST.Z m64 ymm k ymm
// VPMINUQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMINUQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMINUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMINUQ_BCST_Z(m, xyz, k, xyz1) }
// VPMINUQ_Z: Minimum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUQ.Z m128 xmm k xmm
// VPMINUQ.Z m256 ymm k ymm
// VPMINUQ.Z xmm xmm k xmm
// VPMINUQ.Z ymm ymm k ymm
// VPMINUQ.Z m512 zmm k zmm
// VPMINUQ.Z zmm zmm k zmm
//
// Construct and append a VPMINUQ.Z instruction to the active function.
func (c *Context) VPMINUQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUQ_Z(mxyz, xyz, k, xyz1))
}
// VPMINUQ_Z: Minimum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUQ.Z m128 xmm k xmm
// VPMINUQ.Z m256 ymm k ymm
// VPMINUQ.Z xmm xmm k xmm
// VPMINUQ.Z ymm ymm k ymm
// VPMINUQ.Z m512 zmm k zmm
// VPMINUQ.Z zmm zmm k zmm
//
// Construct and append a VPMINUQ.Z instruction to the active function.
// Operates on the global context.
func VPMINUQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINUQ_Z(mxyz, xyz, k, xyz1) }
// VPMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMINUW m256 ymm ymm
// VPMINUW ymm ymm ymm
// VPMINUW m128 xmm xmm
// VPMINUW xmm xmm xmm
// VPMINUW m128 xmm k xmm
// VPMINUW m256 ymm k ymm
// VPMINUW xmm xmm k xmm
// VPMINUW ymm ymm k ymm
// VPMINUW m512 zmm k zmm
// VPMINUW m512 zmm zmm
// VPMINUW zmm zmm k zmm
// VPMINUW zmm zmm zmm
//
// Construct and append a VPMINUW instruction to the active function.
func (c *Context) VPMINUW(ops ...operand.Op) {
c.addinstruction(x86.VPMINUW(ops...))
}
// VPMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMINUW m256 ymm ymm
// VPMINUW ymm ymm ymm
// VPMINUW m128 xmm xmm
// VPMINUW xmm xmm xmm
// VPMINUW m128 xmm k xmm
// VPMINUW m256 ymm k ymm
// VPMINUW xmm xmm k xmm
// VPMINUW ymm ymm k ymm
// VPMINUW m512 zmm k zmm
// VPMINUW m512 zmm zmm
// VPMINUW zmm zmm k zmm
// VPMINUW zmm zmm zmm
//
// Construct and append a VPMINUW instruction to the active function.
// Operates on the global context.
func VPMINUW(ops ...operand.Op) { ctx.VPMINUW(ops...) }
// VPMINUW_Z: Minimum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUW.Z m128 xmm k xmm
// VPMINUW.Z m256 ymm k ymm
// VPMINUW.Z xmm xmm k xmm
// VPMINUW.Z ymm ymm k ymm
// VPMINUW.Z m512 zmm k zmm
// VPMINUW.Z zmm zmm k zmm
//
// Construct and append a VPMINUW.Z instruction to the active function.
func (c *Context) VPMINUW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMINUW_Z(mxyz, xyz, k, xyz1))
}
// VPMINUW_Z: Minimum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUW.Z m128 xmm k xmm
// VPMINUW.Z m256 ymm k ymm
// VPMINUW.Z xmm xmm k xmm
// VPMINUW.Z ymm ymm k ymm
// VPMINUW.Z m512 zmm k zmm
// VPMINUW.Z zmm zmm k zmm
//
// Construct and append a VPMINUW.Z instruction to the active function.
// Operates on the global context.
func VPMINUW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMINUW_Z(mxyz, xyz, k, xyz1) }
// VPMOVB2M: Move Signs of Packed Byte Integers to Mask Register.
//
// Forms:
//
// VPMOVB2M xmm k
// VPMOVB2M ymm k
// VPMOVB2M zmm k
//
// Construct and append a VPMOVB2M instruction to the active function.
func (c *Context) VPMOVB2M(xyz, k operand.Op) {
c.addinstruction(x86.VPMOVB2M(xyz, k))
}
// VPMOVB2M: Move Signs of Packed Byte Integers to Mask Register.
//
// Forms:
//
// VPMOVB2M xmm k
// VPMOVB2M ymm k
// VPMOVB2M zmm k
//
// Construct and append a VPMOVB2M instruction to the active function.
// Operates on the global context.
func VPMOVB2M(xyz, k operand.Op) { ctx.VPMOVB2M(xyz, k) }
// VPMOVD2M: Move Signs of Packed Doubleword Integers to Mask Register.
//
// Forms:
//
// VPMOVD2M xmm k
// VPMOVD2M ymm k
// VPMOVD2M zmm k
//
// Construct and append a VPMOVD2M instruction to the active function.
func (c *Context) VPMOVD2M(xyz, k operand.Op) {
c.addinstruction(x86.VPMOVD2M(xyz, k))
}
// VPMOVD2M: Move Signs of Packed Doubleword Integers to Mask Register.
//
// Forms:
//
// VPMOVD2M xmm k
// VPMOVD2M ymm k
// VPMOVD2M zmm k
//
// Construct and append a VPMOVD2M instruction to the active function.
// Operates on the global context.
func VPMOVD2M(xyz, k operand.Op) { ctx.VPMOVD2M(xyz, k) }
// VPMOVDB: Down Convert Packed Doubleword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVDB xmm k m32
// VPMOVDB xmm k xmm
// VPMOVDB xmm m32
// VPMOVDB xmm xmm
// VPMOVDB ymm k m64
// VPMOVDB ymm k xmm
// VPMOVDB ymm m64
// VPMOVDB ymm xmm
// VPMOVDB zmm k m128
// VPMOVDB zmm k xmm
// VPMOVDB zmm m128
// VPMOVDB zmm xmm
//
// Construct and append a VPMOVDB instruction to the active function.
func (c *Context) VPMOVDB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVDB(ops...))
}
// VPMOVDB: Down Convert Packed Doubleword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVDB xmm k m32
// VPMOVDB xmm k xmm
// VPMOVDB xmm m32
// VPMOVDB xmm xmm
// VPMOVDB ymm k m64
// VPMOVDB ymm k xmm
// VPMOVDB ymm m64
// VPMOVDB ymm xmm
// VPMOVDB zmm k m128
// VPMOVDB zmm k xmm
// VPMOVDB zmm m128
// VPMOVDB zmm xmm
//
// Construct and append a VPMOVDB instruction to the active function.
// Operates on the global context.
func VPMOVDB(ops ...operand.Op) { ctx.VPMOVDB(ops...) }
// VPMOVDB_Z: Down Convert Packed Doubleword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDB.Z xmm k m32
// VPMOVDB.Z xmm k xmm
// VPMOVDB.Z ymm k m64
// VPMOVDB.Z ymm k xmm
// VPMOVDB.Z zmm k m128
// VPMOVDB.Z zmm k xmm
//
// Construct and append a VPMOVDB.Z instruction to the active function.
func (c *Context) VPMOVDB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVDB_Z(xyz, k, mx))
}
// VPMOVDB_Z: Down Convert Packed Doubleword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDB.Z xmm k m32
// VPMOVDB.Z xmm k xmm
// VPMOVDB.Z ymm k m64
// VPMOVDB.Z ymm k xmm
// VPMOVDB.Z zmm k m128
// VPMOVDB.Z zmm k xmm
//
// Construct and append a VPMOVDB.Z instruction to the active function.
// Operates on the global context.
func VPMOVDB_Z(xyz, k, mx operand.Op) { ctx.VPMOVDB_Z(xyz, k, mx) }
// VPMOVDW: Down Convert Packed Doubleword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVDW xmm k m64
// VPMOVDW xmm k xmm
// VPMOVDW xmm m64
// VPMOVDW xmm xmm
// VPMOVDW ymm k m128
// VPMOVDW ymm k xmm
// VPMOVDW ymm m128
// VPMOVDW ymm xmm
// VPMOVDW zmm k m256
// VPMOVDW zmm k ymm
// VPMOVDW zmm m256
// VPMOVDW zmm ymm
//
// Construct and append a VPMOVDW instruction to the active function.
func (c *Context) VPMOVDW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVDW(ops...))
}
// VPMOVDW: Down Convert Packed Doubleword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVDW xmm k m64
// VPMOVDW xmm k xmm
// VPMOVDW xmm m64
// VPMOVDW xmm xmm
// VPMOVDW ymm k m128
// VPMOVDW ymm k xmm
// VPMOVDW ymm m128
// VPMOVDW ymm xmm
// VPMOVDW zmm k m256
// VPMOVDW zmm k ymm
// VPMOVDW zmm m256
// VPMOVDW zmm ymm
//
// Construct and append a VPMOVDW instruction to the active function.
// Operates on the global context.
func VPMOVDW(ops ...operand.Op) { ctx.VPMOVDW(ops...) }
// VPMOVDW_Z: Down Convert Packed Doubleword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDW.Z xmm k m64
// VPMOVDW.Z xmm k xmm
// VPMOVDW.Z ymm k m128
// VPMOVDW.Z ymm k xmm
// VPMOVDW.Z zmm k m256
// VPMOVDW.Z zmm k ymm
//
// Construct and append a VPMOVDW.Z instruction to the active function.
func (c *Context) VPMOVDW_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVDW_Z(xyz, k, mxy))
}
// VPMOVDW_Z: Down Convert Packed Doubleword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDW.Z xmm k m64
// VPMOVDW.Z xmm k xmm
// VPMOVDW.Z ymm k m128
// VPMOVDW.Z ymm k xmm
// VPMOVDW.Z zmm k m256
// VPMOVDW.Z zmm k ymm
//
// Construct and append a VPMOVDW.Z instruction to the active function.
// Operates on the global context.
func VPMOVDW_Z(xyz, k, mxy operand.Op) { ctx.VPMOVDW_Z(xyz, k, mxy) }
// VPMOVM2B: Expand Bits of Mask Register to Packed Byte Integers.
//
// Forms:
//
// VPMOVM2B k xmm
// VPMOVM2B k ymm
// VPMOVM2B k zmm
//
// Construct and append a VPMOVM2B instruction to the active function.
func (c *Context) VPMOVM2B(k, xyz operand.Op) {
c.addinstruction(x86.VPMOVM2B(k, xyz))
}
// VPMOVM2B: Expand Bits of Mask Register to Packed Byte Integers.
//
// Forms:
//
// VPMOVM2B k xmm
// VPMOVM2B k ymm
// VPMOVM2B k zmm
//
// Construct and append a VPMOVM2B instruction to the active function.
// Operates on the global context.
func VPMOVM2B(k, xyz operand.Op) { ctx.VPMOVM2B(k, xyz) }
// VPMOVM2D: Expand Bits of Mask Register to Packed Doubleword Integers.
//
// Forms:
//
// VPMOVM2D k xmm
// VPMOVM2D k ymm
// VPMOVM2D k zmm
//
// Construct and append a VPMOVM2D instruction to the active function.
func (c *Context) VPMOVM2D(k, xyz operand.Op) {
c.addinstruction(x86.VPMOVM2D(k, xyz))
}
// VPMOVM2D: Expand Bits of Mask Register to Packed Doubleword Integers.
//
// Forms:
//
// VPMOVM2D k xmm
// VPMOVM2D k ymm
// VPMOVM2D k zmm
//
// Construct and append a VPMOVM2D instruction to the active function.
// Operates on the global context.
func VPMOVM2D(k, xyz operand.Op) { ctx.VPMOVM2D(k, xyz) }
// VPMOVM2Q: Expand Bits of Mask Register to Packed Quadword Integers.
//
// Forms:
//
// VPMOVM2Q k xmm
// VPMOVM2Q k ymm
// VPMOVM2Q k zmm
//
// Construct and append a VPMOVM2Q instruction to the active function.
func (c *Context) VPMOVM2Q(k, xyz operand.Op) {
c.addinstruction(x86.VPMOVM2Q(k, xyz))
}
// VPMOVM2Q: Expand Bits of Mask Register to Packed Quadword Integers.
//
// Forms:
//
// VPMOVM2Q k xmm
// VPMOVM2Q k ymm
// VPMOVM2Q k zmm
//
// Construct and append a VPMOVM2Q instruction to the active function.
// Operates on the global context.
func VPMOVM2Q(k, xyz operand.Op) { ctx.VPMOVM2Q(k, xyz) }
// VPMOVM2W: Expand Bits of Mask Register to Packed Word Integers.
//
// Forms:
//
// VPMOVM2W k xmm
// VPMOVM2W k ymm
// VPMOVM2W k zmm
//
// Construct and append a VPMOVM2W instruction to the active function.
func (c *Context) VPMOVM2W(k, xyz operand.Op) {
c.addinstruction(x86.VPMOVM2W(k, xyz))
}
// VPMOVM2W: Expand Bits of Mask Register to Packed Word Integers.
//
// Forms:
//
// VPMOVM2W k xmm
// VPMOVM2W k ymm
// VPMOVM2W k zmm
//
// Construct and append a VPMOVM2W instruction to the active function.
// Operates on the global context.
func VPMOVM2W(k, xyz operand.Op) { ctx.VPMOVM2W(k, xyz) }
// VPMOVMSKB: Move Byte Mask.
//
// Forms:
//
// VPMOVMSKB ymm r32
// VPMOVMSKB xmm r32
//
// Construct and append a VPMOVMSKB instruction to the active function.
func (c *Context) VPMOVMSKB(xy, r operand.Op) {
c.addinstruction(x86.VPMOVMSKB(xy, r))
}
// VPMOVMSKB: Move Byte Mask.
//
// Forms:
//
// VPMOVMSKB ymm r32
// VPMOVMSKB xmm r32
//
// Construct and append a VPMOVMSKB instruction to the active function.
// Operates on the global context.
func VPMOVMSKB(xy, r operand.Op) { ctx.VPMOVMSKB(xy, r) }
// VPMOVQ2M: Move Signs of Packed Quadword Integers to Mask Register.
//
// Forms:
//
// VPMOVQ2M xmm k
// VPMOVQ2M ymm k
// VPMOVQ2M zmm k
//
// Construct and append a VPMOVQ2M instruction to the active function.
func (c *Context) VPMOVQ2M(xyz, k operand.Op) {
c.addinstruction(x86.VPMOVQ2M(xyz, k))
}
// VPMOVQ2M: Move Signs of Packed Quadword Integers to Mask Register.
//
// Forms:
//
// VPMOVQ2M xmm k
// VPMOVQ2M ymm k
// VPMOVQ2M zmm k
//
// Construct and append a VPMOVQ2M instruction to the active function.
// Operates on the global context.
func VPMOVQ2M(xyz, k operand.Op) { ctx.VPMOVQ2M(xyz, k) }
// VPMOVQB: Down Convert Packed Quadword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVQB xmm k m16
// VPMOVQB xmm k xmm
// VPMOVQB xmm m16
// VPMOVQB xmm xmm
// VPMOVQB ymm k m32
// VPMOVQB ymm k xmm
// VPMOVQB ymm m32
// VPMOVQB ymm xmm
// VPMOVQB zmm k m64
// VPMOVQB zmm k xmm
// VPMOVQB zmm m64
// VPMOVQB zmm xmm
//
// Construct and append a VPMOVQB instruction to the active function.
func (c *Context) VPMOVQB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVQB(ops...))
}
// VPMOVQB: Down Convert Packed Quadword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVQB xmm k m16
// VPMOVQB xmm k xmm
// VPMOVQB xmm m16
// VPMOVQB xmm xmm
// VPMOVQB ymm k m32
// VPMOVQB ymm k xmm
// VPMOVQB ymm m32
// VPMOVQB ymm xmm
// VPMOVQB zmm k m64
// VPMOVQB zmm k xmm
// VPMOVQB zmm m64
// VPMOVQB zmm xmm
//
// Construct and append a VPMOVQB instruction to the active function.
// Operates on the global context.
func VPMOVQB(ops ...operand.Op) { ctx.VPMOVQB(ops...) }
// VPMOVQB_Z: Down Convert Packed Quadword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQB.Z xmm k m16
// VPMOVQB.Z xmm k xmm
// VPMOVQB.Z ymm k m32
// VPMOVQB.Z ymm k xmm
// VPMOVQB.Z zmm k m64
// VPMOVQB.Z zmm k xmm
//
// Construct and append a VPMOVQB.Z instruction to the active function.
func (c *Context) VPMOVQB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVQB_Z(xyz, k, mx))
}
// VPMOVQB_Z: Down Convert Packed Quadword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQB.Z xmm k m16
// VPMOVQB.Z xmm k xmm
// VPMOVQB.Z ymm k m32
// VPMOVQB.Z ymm k xmm
// VPMOVQB.Z zmm k m64
// VPMOVQB.Z zmm k xmm
//
// Construct and append a VPMOVQB.Z instruction to the active function.
// Operates on the global context.
func VPMOVQB_Z(xyz, k, mx operand.Op) { ctx.VPMOVQB_Z(xyz, k, mx) }
// VPMOVQD: Down Convert Packed Quadword Values to Doubleword Values with Truncation.
//
// Forms:
//
// VPMOVQD xmm k m64
// VPMOVQD xmm k xmm
// VPMOVQD xmm m64
// VPMOVQD xmm xmm
// VPMOVQD ymm k m128
// VPMOVQD ymm k xmm
// VPMOVQD ymm m128
// VPMOVQD ymm xmm
// VPMOVQD zmm k m256
// VPMOVQD zmm k ymm
// VPMOVQD zmm m256
// VPMOVQD zmm ymm
//
// Construct and append a VPMOVQD instruction to the active function.
func (c *Context) VPMOVQD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVQD(ops...))
}
// VPMOVQD: Down Convert Packed Quadword Values to Doubleword Values with Truncation.
//
// Forms:
//
// VPMOVQD xmm k m64
// VPMOVQD xmm k xmm
// VPMOVQD xmm m64
// VPMOVQD xmm xmm
// VPMOVQD ymm k m128
// VPMOVQD ymm k xmm
// VPMOVQD ymm m128
// VPMOVQD ymm xmm
// VPMOVQD zmm k m256
// VPMOVQD zmm k ymm
// VPMOVQD zmm m256
// VPMOVQD zmm ymm
//
// Construct and append a VPMOVQD instruction to the active function.
// Operates on the global context.
func VPMOVQD(ops ...operand.Op) { ctx.VPMOVQD(ops...) }
// VPMOVQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQD.Z xmm k m64
// VPMOVQD.Z xmm k xmm
// VPMOVQD.Z ymm k m128
// VPMOVQD.Z ymm k xmm
// VPMOVQD.Z zmm k m256
// VPMOVQD.Z zmm k ymm
//
// Construct and append a VPMOVQD.Z instruction to the active function.
func (c *Context) VPMOVQD_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVQD_Z(xyz, k, mxy))
}
// VPMOVQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQD.Z xmm k m64
// VPMOVQD.Z xmm k xmm
// VPMOVQD.Z ymm k m128
// VPMOVQD.Z ymm k xmm
// VPMOVQD.Z zmm k m256
// VPMOVQD.Z zmm k ymm
//
// Construct and append a VPMOVQD.Z instruction to the active function.
// Operates on the global context.
func VPMOVQD_Z(xyz, k, mxy operand.Op) { ctx.VPMOVQD_Z(xyz, k, mxy) }
// VPMOVQW: Down Convert Packed Quadword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVQW xmm k m32
// VPMOVQW xmm k xmm
// VPMOVQW xmm m32
// VPMOVQW xmm xmm
// VPMOVQW ymm k m64
// VPMOVQW ymm k xmm
// VPMOVQW ymm m64
// VPMOVQW ymm xmm
// VPMOVQW zmm k m128
// VPMOVQW zmm k xmm
// VPMOVQW zmm m128
// VPMOVQW zmm xmm
//
// Construct and append a VPMOVQW instruction to the active function.
func (c *Context) VPMOVQW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVQW(ops...))
}
// VPMOVQW: Down Convert Packed Quadword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVQW xmm k m32
// VPMOVQW xmm k xmm
// VPMOVQW xmm m32
// VPMOVQW xmm xmm
// VPMOVQW ymm k m64
// VPMOVQW ymm k xmm
// VPMOVQW ymm m64
// VPMOVQW ymm xmm
// VPMOVQW zmm k m128
// VPMOVQW zmm k xmm
// VPMOVQW zmm m128
// VPMOVQW zmm xmm
//
// Construct and append a VPMOVQW instruction to the active function.
// Operates on the global context.
func VPMOVQW(ops ...operand.Op) { ctx.VPMOVQW(ops...) }
// VPMOVQW_Z: Down Convert Packed Quadword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQW.Z xmm k m32
// VPMOVQW.Z xmm k xmm
// VPMOVQW.Z ymm k m64
// VPMOVQW.Z ymm k xmm
// VPMOVQW.Z zmm k m128
// VPMOVQW.Z zmm k xmm
//
// Construct and append a VPMOVQW.Z instruction to the active function.
func (c *Context) VPMOVQW_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVQW_Z(xyz, k, mx))
}
// VPMOVQW_Z: Down Convert Packed Quadword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQW.Z xmm k m32
// VPMOVQW.Z xmm k xmm
// VPMOVQW.Z ymm k m64
// VPMOVQW.Z ymm k xmm
// VPMOVQW.Z zmm k m128
// VPMOVQW.Z zmm k xmm
//
// Construct and append a VPMOVQW.Z instruction to the active function.
// Operates on the global context.
func VPMOVQW_Z(xyz, k, mx operand.Op) { ctx.VPMOVQW_Z(xyz, k, mx) }
// VPMOVSDB: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDB xmm k m32
// VPMOVSDB xmm k xmm
// VPMOVSDB xmm m32
// VPMOVSDB xmm xmm
// VPMOVSDB ymm k m64
// VPMOVSDB ymm k xmm
// VPMOVSDB ymm m64
// VPMOVSDB ymm xmm
// VPMOVSDB zmm k m128
// VPMOVSDB zmm k xmm
// VPMOVSDB zmm m128
// VPMOVSDB zmm xmm
//
// Construct and append a VPMOVSDB instruction to the active function.
func (c *Context) VPMOVSDB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSDB(ops...))
}
// VPMOVSDB: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDB xmm k m32
// VPMOVSDB xmm k xmm
// VPMOVSDB xmm m32
// VPMOVSDB xmm xmm
// VPMOVSDB ymm k m64
// VPMOVSDB ymm k xmm
// VPMOVSDB ymm m64
// VPMOVSDB ymm xmm
// VPMOVSDB zmm k m128
// VPMOVSDB zmm k xmm
// VPMOVSDB zmm m128
// VPMOVSDB zmm xmm
//
// Construct and append a VPMOVSDB instruction to the active function.
// Operates on the global context.
func VPMOVSDB(ops ...operand.Op) { ctx.VPMOVSDB(ops...) }
// VPMOVSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDB.Z xmm k m32
// VPMOVSDB.Z xmm k xmm
// VPMOVSDB.Z ymm k m64
// VPMOVSDB.Z ymm k xmm
// VPMOVSDB.Z zmm k m128
// VPMOVSDB.Z zmm k xmm
//
// Construct and append a VPMOVSDB.Z instruction to the active function.
func (c *Context) VPMOVSDB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVSDB_Z(xyz, k, mx))
}
// VPMOVSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDB.Z xmm k m32
// VPMOVSDB.Z xmm k xmm
// VPMOVSDB.Z ymm k m64
// VPMOVSDB.Z ymm k xmm
// VPMOVSDB.Z zmm k m128
// VPMOVSDB.Z zmm k xmm
//
// Construct and append a VPMOVSDB.Z instruction to the active function.
// Operates on the global context.
func VPMOVSDB_Z(xyz, k, mx operand.Op) { ctx.VPMOVSDB_Z(xyz, k, mx) }
// VPMOVSDW: Down Convert Packed Doubleword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDW xmm k m64
// VPMOVSDW xmm k xmm
// VPMOVSDW xmm m64
// VPMOVSDW xmm xmm
// VPMOVSDW ymm k m128
// VPMOVSDW ymm k xmm
// VPMOVSDW ymm m128
// VPMOVSDW ymm xmm
// VPMOVSDW zmm k m256
// VPMOVSDW zmm k ymm
// VPMOVSDW zmm m256
// VPMOVSDW zmm ymm
//
// Construct and append a VPMOVSDW instruction to the active function.
func (c *Context) VPMOVSDW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSDW(ops...))
}
// VPMOVSDW: Down Convert Packed Doubleword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDW xmm k m64
// VPMOVSDW xmm k xmm
// VPMOVSDW xmm m64
// VPMOVSDW xmm xmm
// VPMOVSDW ymm k m128
// VPMOVSDW ymm k xmm
// VPMOVSDW ymm m128
// VPMOVSDW ymm xmm
// VPMOVSDW zmm k m256
// VPMOVSDW zmm k ymm
// VPMOVSDW zmm m256
// VPMOVSDW zmm ymm
//
// Construct and append a VPMOVSDW instruction to the active function.
// Operates on the global context.
func VPMOVSDW(ops ...operand.Op) { ctx.VPMOVSDW(ops...) }
// VPMOVSDW_Z: Down Convert Packed Doubleword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDW.Z xmm k m64
// VPMOVSDW.Z xmm k xmm
// VPMOVSDW.Z ymm k m128
// VPMOVSDW.Z ymm k xmm
// VPMOVSDW.Z zmm k m256
// VPMOVSDW.Z zmm k ymm
//
// Construct and append a VPMOVSDW.Z instruction to the active function.
func (c *Context) VPMOVSDW_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVSDW_Z(xyz, k, mxy))
}
// VPMOVSDW_Z: Down Convert Packed Doubleword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDW.Z xmm k m64
// VPMOVSDW.Z xmm k xmm
// VPMOVSDW.Z ymm k m128
// VPMOVSDW.Z ymm k xmm
// VPMOVSDW.Z zmm k m256
// VPMOVSDW.Z zmm k ymm
//
// Construct and append a VPMOVSDW.Z instruction to the active function.
// Operates on the global context.
func VPMOVSDW_Z(xyz, k, mxy operand.Op) { ctx.VPMOVSDW_Z(xyz, k, mxy) }
// VPMOVSQB: Down Convert Packed Quadword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQB xmm k m16
// VPMOVSQB xmm k xmm
// VPMOVSQB xmm m16
// VPMOVSQB xmm xmm
// VPMOVSQB ymm k m32
// VPMOVSQB ymm k xmm
// VPMOVSQB ymm m32
// VPMOVSQB ymm xmm
// VPMOVSQB zmm k m64
// VPMOVSQB zmm k xmm
// VPMOVSQB zmm m64
// VPMOVSQB zmm xmm
//
// Construct and append a VPMOVSQB instruction to the active function.
func (c *Context) VPMOVSQB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSQB(ops...))
}
// VPMOVSQB: Down Convert Packed Quadword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQB xmm k m16
// VPMOVSQB xmm k xmm
// VPMOVSQB xmm m16
// VPMOVSQB xmm xmm
// VPMOVSQB ymm k m32
// VPMOVSQB ymm k xmm
// VPMOVSQB ymm m32
// VPMOVSQB ymm xmm
// VPMOVSQB zmm k m64
// VPMOVSQB zmm k xmm
// VPMOVSQB zmm m64
// VPMOVSQB zmm xmm
//
// Construct and append a VPMOVSQB instruction to the active function.
// Operates on the global context.
func VPMOVSQB(ops ...operand.Op) { ctx.VPMOVSQB(ops...) }
// VPMOVSQB_Z: Down Convert Packed Quadword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQB.Z xmm k m16
// VPMOVSQB.Z xmm k xmm
// VPMOVSQB.Z ymm k m32
// VPMOVSQB.Z ymm k xmm
// VPMOVSQB.Z zmm k m64
// VPMOVSQB.Z zmm k xmm
//
// Construct and append a VPMOVSQB.Z instruction to the active function.
func (c *Context) VPMOVSQB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVSQB_Z(xyz, k, mx))
}
// VPMOVSQB_Z: Down Convert Packed Quadword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQB.Z xmm k m16
// VPMOVSQB.Z xmm k xmm
// VPMOVSQB.Z ymm k m32
// VPMOVSQB.Z ymm k xmm
// VPMOVSQB.Z zmm k m64
// VPMOVSQB.Z zmm k xmm
//
// Construct and append a VPMOVSQB.Z instruction to the active function.
// Operates on the global context.
func VPMOVSQB_Z(xyz, k, mx operand.Op) { ctx.VPMOVSQB_Z(xyz, k, mx) }
// VPMOVSQD: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQD xmm k m64
// VPMOVSQD xmm k xmm
// VPMOVSQD xmm m64
// VPMOVSQD xmm xmm
// VPMOVSQD ymm k m128
// VPMOVSQD ymm k xmm
// VPMOVSQD ymm m128
// VPMOVSQD ymm xmm
// VPMOVSQD zmm k m256
// VPMOVSQD zmm k ymm
// VPMOVSQD zmm m256
// VPMOVSQD zmm ymm
//
// Construct and append a VPMOVSQD instruction to the active function.
func (c *Context) VPMOVSQD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSQD(ops...))
}
// VPMOVSQD: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQD xmm k m64
// VPMOVSQD xmm k xmm
// VPMOVSQD xmm m64
// VPMOVSQD xmm xmm
// VPMOVSQD ymm k m128
// VPMOVSQD ymm k xmm
// VPMOVSQD ymm m128
// VPMOVSQD ymm xmm
// VPMOVSQD zmm k m256
// VPMOVSQD zmm k ymm
// VPMOVSQD zmm m256
// VPMOVSQD zmm ymm
//
// Construct and append a VPMOVSQD instruction to the active function.
// Operates on the global context.
func VPMOVSQD(ops ...operand.Op) { ctx.VPMOVSQD(ops...) }
// VPMOVSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQD.Z xmm k m64
// VPMOVSQD.Z xmm k xmm
// VPMOVSQD.Z ymm k m128
// VPMOVSQD.Z ymm k xmm
// VPMOVSQD.Z zmm k m256
// VPMOVSQD.Z zmm k ymm
//
// Construct and append a VPMOVSQD.Z instruction to the active function.
func (c *Context) VPMOVSQD_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVSQD_Z(xyz, k, mxy))
}
// VPMOVSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQD.Z xmm k m64
// VPMOVSQD.Z xmm k xmm
// VPMOVSQD.Z ymm k m128
// VPMOVSQD.Z ymm k xmm
// VPMOVSQD.Z zmm k m256
// VPMOVSQD.Z zmm k ymm
//
// Construct and append a VPMOVSQD.Z instruction to the active function.
// Operates on the global context.
func VPMOVSQD_Z(xyz, k, mxy operand.Op) { ctx.VPMOVSQD_Z(xyz, k, mxy) }
// VPMOVSQW: Down Convert Packed Quadword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQW xmm k m32
// VPMOVSQW xmm k xmm
// VPMOVSQW xmm m32
// VPMOVSQW xmm xmm
// VPMOVSQW ymm k m64
// VPMOVSQW ymm k xmm
// VPMOVSQW ymm m64
// VPMOVSQW ymm xmm
// VPMOVSQW zmm k m128
// VPMOVSQW zmm k xmm
// VPMOVSQW zmm m128
// VPMOVSQW zmm xmm
//
// Construct and append a VPMOVSQW instruction to the active function.
func (c *Context) VPMOVSQW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSQW(ops...))
}
// VPMOVSQW: Down Convert Packed Quadword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQW xmm k m32
// VPMOVSQW xmm k xmm
// VPMOVSQW xmm m32
// VPMOVSQW xmm xmm
// VPMOVSQW ymm k m64
// VPMOVSQW ymm k xmm
// VPMOVSQW ymm m64
// VPMOVSQW ymm xmm
// VPMOVSQW zmm k m128
// VPMOVSQW zmm k xmm
// VPMOVSQW zmm m128
// VPMOVSQW zmm xmm
//
// Construct and append a VPMOVSQW instruction to the active function.
// Operates on the global context.
func VPMOVSQW(ops ...operand.Op) { ctx.VPMOVSQW(ops...) }
// VPMOVSQW_Z: Down Convert Packed Quadword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQW.Z xmm k m32
// VPMOVSQW.Z xmm k xmm
// VPMOVSQW.Z ymm k m64
// VPMOVSQW.Z ymm k xmm
// VPMOVSQW.Z zmm k m128
// VPMOVSQW.Z zmm k xmm
//
// Construct and append a VPMOVSQW.Z instruction to the active function.
func (c *Context) VPMOVSQW_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVSQW_Z(xyz, k, mx))
}
// VPMOVSQW_Z: Down Convert Packed Quadword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQW.Z xmm k m32
// VPMOVSQW.Z xmm k xmm
// VPMOVSQW.Z ymm k m64
// VPMOVSQW.Z ymm k xmm
// VPMOVSQW.Z zmm k m128
// VPMOVSQW.Z zmm k xmm
//
// Construct and append a VPMOVSQW.Z instruction to the active function.
// Operates on the global context.
func VPMOVSQW_Z(xyz, k, mx operand.Op) { ctx.VPMOVSQW_Z(xyz, k, mx) }
// VPMOVSWB: Down Convert Packed Word Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSWB xmm k m64
// VPMOVSWB xmm k xmm
// VPMOVSWB xmm m64
// VPMOVSWB xmm xmm
// VPMOVSWB ymm k m128
// VPMOVSWB ymm k xmm
// VPMOVSWB ymm m128
// VPMOVSWB ymm xmm
// VPMOVSWB zmm k m256
// VPMOVSWB zmm k ymm
// VPMOVSWB zmm m256
// VPMOVSWB zmm ymm
//
// Construct and append a VPMOVSWB instruction to the active function.
func (c *Context) VPMOVSWB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSWB(ops...))
}
// VPMOVSWB: Down Convert Packed Word Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSWB xmm k m64
// VPMOVSWB xmm k xmm
// VPMOVSWB xmm m64
// VPMOVSWB xmm xmm
// VPMOVSWB ymm k m128
// VPMOVSWB ymm k xmm
// VPMOVSWB ymm m128
// VPMOVSWB ymm xmm
// VPMOVSWB zmm k m256
// VPMOVSWB zmm k ymm
// VPMOVSWB zmm m256
// VPMOVSWB zmm ymm
//
// Construct and append a VPMOVSWB instruction to the active function.
// Operates on the global context.
func VPMOVSWB(ops ...operand.Op) { ctx.VPMOVSWB(ops...) }
// VPMOVSWB_Z: Down Convert Packed Word Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSWB.Z xmm k m64
// VPMOVSWB.Z xmm k xmm
// VPMOVSWB.Z ymm k m128
// VPMOVSWB.Z ymm k xmm
// VPMOVSWB.Z zmm k m256
// VPMOVSWB.Z zmm k ymm
//
// Construct and append a VPMOVSWB.Z instruction to the active function.
func (c *Context) VPMOVSWB_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVSWB_Z(xyz, k, mxy))
}
// VPMOVSWB_Z: Down Convert Packed Word Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSWB.Z xmm k m64
// VPMOVSWB.Z xmm k xmm
// VPMOVSWB.Z ymm k m128
// VPMOVSWB.Z ymm k xmm
// VPMOVSWB.Z zmm k m256
// VPMOVSWB.Z zmm k ymm
//
// Construct and append a VPMOVSWB.Z instruction to the active function.
// Operates on the global context.
func VPMOVSWB_Z(xyz, k, mxy operand.Op) { ctx.VPMOVSWB_Z(xyz, k, mxy) }
// VPMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBD m64 ymm
// VPMOVSXBD xmm ymm
// VPMOVSXBD m32 xmm
// VPMOVSXBD xmm xmm
// VPMOVSXBD m32 k xmm
// VPMOVSXBD m64 k ymm
// VPMOVSXBD xmm k xmm
// VPMOVSXBD xmm k ymm
// VPMOVSXBD m128 k zmm
// VPMOVSXBD m128 zmm
// VPMOVSXBD xmm k zmm
// VPMOVSXBD xmm zmm
//
// Construct and append a VPMOVSXBD instruction to the active function.
func (c *Context) VPMOVSXBD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXBD(ops...))
}
// VPMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBD m64 ymm
// VPMOVSXBD xmm ymm
// VPMOVSXBD m32 xmm
// VPMOVSXBD xmm xmm
// VPMOVSXBD m32 k xmm
// VPMOVSXBD m64 k ymm
// VPMOVSXBD xmm k xmm
// VPMOVSXBD xmm k ymm
// VPMOVSXBD m128 k zmm
// VPMOVSXBD m128 zmm
// VPMOVSXBD xmm k zmm
// VPMOVSXBD xmm zmm
//
// Construct and append a VPMOVSXBD instruction to the active function.
// Operates on the global context.
func VPMOVSXBD(ops ...operand.Op) { ctx.VPMOVSXBD(ops...) }
// VPMOVSXBD_Z: Move Packed Byte Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBD.Z m32 k xmm
// VPMOVSXBD.Z m64 k ymm
// VPMOVSXBD.Z xmm k xmm
// VPMOVSXBD.Z xmm k ymm
// VPMOVSXBD.Z m128 k zmm
// VPMOVSXBD.Z xmm k zmm
//
// Construct and append a VPMOVSXBD.Z instruction to the active function.
func (c *Context) VPMOVSXBD_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXBD_Z(mx, k, xyz))
}
// VPMOVSXBD_Z: Move Packed Byte Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBD.Z m32 k xmm
// VPMOVSXBD.Z m64 k ymm
// VPMOVSXBD.Z xmm k xmm
// VPMOVSXBD.Z xmm k ymm
// VPMOVSXBD.Z m128 k zmm
// VPMOVSXBD.Z xmm k zmm
//
// Construct and append a VPMOVSXBD.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXBD_Z(mx, k, xyz operand.Op) { ctx.VPMOVSXBD_Z(mx, k, xyz) }
// VPMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBQ m32 ymm
// VPMOVSXBQ xmm ymm
// VPMOVSXBQ m16 xmm
// VPMOVSXBQ xmm xmm
// VPMOVSXBQ m16 k xmm
// VPMOVSXBQ m32 k ymm
// VPMOVSXBQ xmm k xmm
// VPMOVSXBQ xmm k ymm
// VPMOVSXBQ m64 k zmm
// VPMOVSXBQ m64 zmm
// VPMOVSXBQ xmm k zmm
// VPMOVSXBQ xmm zmm
//
// Construct and append a VPMOVSXBQ instruction to the active function.
func (c *Context) VPMOVSXBQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXBQ(ops...))
}
// VPMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBQ m32 ymm
// VPMOVSXBQ xmm ymm
// VPMOVSXBQ m16 xmm
// VPMOVSXBQ xmm xmm
// VPMOVSXBQ m16 k xmm
// VPMOVSXBQ m32 k ymm
// VPMOVSXBQ xmm k xmm
// VPMOVSXBQ xmm k ymm
// VPMOVSXBQ m64 k zmm
// VPMOVSXBQ m64 zmm
// VPMOVSXBQ xmm k zmm
// VPMOVSXBQ xmm zmm
//
// Construct and append a VPMOVSXBQ instruction to the active function.
// Operates on the global context.
func VPMOVSXBQ(ops ...operand.Op) { ctx.VPMOVSXBQ(ops...) }
// VPMOVSXBQ_Z: Move Packed Byte Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBQ.Z m16 k xmm
// VPMOVSXBQ.Z m32 k ymm
// VPMOVSXBQ.Z xmm k xmm
// VPMOVSXBQ.Z xmm k ymm
// VPMOVSXBQ.Z m64 k zmm
// VPMOVSXBQ.Z xmm k zmm
//
// Construct and append a VPMOVSXBQ.Z instruction to the active function.
func (c *Context) VPMOVSXBQ_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXBQ_Z(mx, k, xyz))
}
// VPMOVSXBQ_Z: Move Packed Byte Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBQ.Z m16 k xmm
// VPMOVSXBQ.Z m32 k ymm
// VPMOVSXBQ.Z xmm k xmm
// VPMOVSXBQ.Z xmm k ymm
// VPMOVSXBQ.Z m64 k zmm
// VPMOVSXBQ.Z xmm k zmm
//
// Construct and append a VPMOVSXBQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXBQ_Z(mx, k, xyz operand.Op) { ctx.VPMOVSXBQ_Z(mx, k, xyz) }
// VPMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBW m128 ymm
// VPMOVSXBW xmm ymm
// VPMOVSXBW m64 xmm
// VPMOVSXBW xmm xmm
// VPMOVSXBW m128 k ymm
// VPMOVSXBW m64 k xmm
// VPMOVSXBW xmm k xmm
// VPMOVSXBW xmm k ymm
// VPMOVSXBW m256 k zmm
// VPMOVSXBW m256 zmm
// VPMOVSXBW ymm k zmm
// VPMOVSXBW ymm zmm
//
// Construct and append a VPMOVSXBW instruction to the active function.
func (c *Context) VPMOVSXBW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXBW(ops...))
}
// VPMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBW m128 ymm
// VPMOVSXBW xmm ymm
// VPMOVSXBW m64 xmm
// VPMOVSXBW xmm xmm
// VPMOVSXBW m128 k ymm
// VPMOVSXBW m64 k xmm
// VPMOVSXBW xmm k xmm
// VPMOVSXBW xmm k ymm
// VPMOVSXBW m256 k zmm
// VPMOVSXBW m256 zmm
// VPMOVSXBW ymm k zmm
// VPMOVSXBW ymm zmm
//
// Construct and append a VPMOVSXBW instruction to the active function.
// Operates on the global context.
func VPMOVSXBW(ops ...operand.Op) { ctx.VPMOVSXBW(ops...) }
// VPMOVSXBW_Z: Move Packed Byte Integers to Word Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBW.Z m128 k ymm
// VPMOVSXBW.Z m64 k xmm
// VPMOVSXBW.Z xmm k xmm
// VPMOVSXBW.Z xmm k ymm
// VPMOVSXBW.Z m256 k zmm
// VPMOVSXBW.Z ymm k zmm
//
// Construct and append a VPMOVSXBW.Z instruction to the active function.
func (c *Context) VPMOVSXBW_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXBW_Z(mxy, k, xyz))
}
// VPMOVSXBW_Z: Move Packed Byte Integers to Word Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBW.Z m128 k ymm
// VPMOVSXBW.Z m64 k xmm
// VPMOVSXBW.Z xmm k xmm
// VPMOVSXBW.Z xmm k ymm
// VPMOVSXBW.Z m256 k zmm
// VPMOVSXBW.Z ymm k zmm
//
// Construct and append a VPMOVSXBW.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXBW_Z(mxy, k, xyz operand.Op) { ctx.VPMOVSXBW_Z(mxy, k, xyz) }
// VPMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXDQ m128 ymm
// VPMOVSXDQ xmm ymm
// VPMOVSXDQ m64 xmm
// VPMOVSXDQ xmm xmm
// VPMOVSXDQ m128 k ymm
// VPMOVSXDQ m64 k xmm
// VPMOVSXDQ xmm k xmm
// VPMOVSXDQ xmm k ymm
// VPMOVSXDQ m256 k zmm
// VPMOVSXDQ m256 zmm
// VPMOVSXDQ ymm k zmm
// VPMOVSXDQ ymm zmm
//
// Construct and append a VPMOVSXDQ instruction to the active function.
func (c *Context) VPMOVSXDQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXDQ(ops...))
}
// VPMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXDQ m128 ymm
// VPMOVSXDQ xmm ymm
// VPMOVSXDQ m64 xmm
// VPMOVSXDQ xmm xmm
// VPMOVSXDQ m128 k ymm
// VPMOVSXDQ m64 k xmm
// VPMOVSXDQ xmm k xmm
// VPMOVSXDQ xmm k ymm
// VPMOVSXDQ m256 k zmm
// VPMOVSXDQ m256 zmm
// VPMOVSXDQ ymm k zmm
// VPMOVSXDQ ymm zmm
//
// Construct and append a VPMOVSXDQ instruction to the active function.
// Operates on the global context.
func VPMOVSXDQ(ops ...operand.Op) { ctx.VPMOVSXDQ(ops...) }
// VPMOVSXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXDQ.Z m128 k ymm
// VPMOVSXDQ.Z m64 k xmm
// VPMOVSXDQ.Z xmm k xmm
// VPMOVSXDQ.Z xmm k ymm
// VPMOVSXDQ.Z m256 k zmm
// VPMOVSXDQ.Z ymm k zmm
//
// Construct and append a VPMOVSXDQ.Z instruction to the active function.
func (c *Context) VPMOVSXDQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXDQ_Z(mxy, k, xyz))
}
// VPMOVSXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXDQ.Z m128 k ymm
// VPMOVSXDQ.Z m64 k xmm
// VPMOVSXDQ.Z xmm k xmm
// VPMOVSXDQ.Z xmm k ymm
// VPMOVSXDQ.Z m256 k zmm
// VPMOVSXDQ.Z ymm k zmm
//
// Construct and append a VPMOVSXDQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXDQ_Z(mxy, k, xyz operand.Op) { ctx.VPMOVSXDQ_Z(mxy, k, xyz) }
// VPMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWD m128 ymm
// VPMOVSXWD xmm ymm
// VPMOVSXWD m64 xmm
// VPMOVSXWD xmm xmm
// VPMOVSXWD m128 k ymm
// VPMOVSXWD m64 k xmm
// VPMOVSXWD xmm k xmm
// VPMOVSXWD xmm k ymm
// VPMOVSXWD m256 k zmm
// VPMOVSXWD m256 zmm
// VPMOVSXWD ymm k zmm
// VPMOVSXWD ymm zmm
//
// Construct and append a VPMOVSXWD instruction to the active function.
func (c *Context) VPMOVSXWD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXWD(ops...))
}
// VPMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWD m128 ymm
// VPMOVSXWD xmm ymm
// VPMOVSXWD m64 xmm
// VPMOVSXWD xmm xmm
// VPMOVSXWD m128 k ymm
// VPMOVSXWD m64 k xmm
// VPMOVSXWD xmm k xmm
// VPMOVSXWD xmm k ymm
// VPMOVSXWD m256 k zmm
// VPMOVSXWD m256 zmm
// VPMOVSXWD ymm k zmm
// VPMOVSXWD ymm zmm
//
// Construct and append a VPMOVSXWD instruction to the active function.
// Operates on the global context.
func VPMOVSXWD(ops ...operand.Op) { ctx.VPMOVSXWD(ops...) }
// VPMOVSXWD_Z: Move Packed Word Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWD.Z m128 k ymm
// VPMOVSXWD.Z m64 k xmm
// VPMOVSXWD.Z xmm k xmm
// VPMOVSXWD.Z xmm k ymm
// VPMOVSXWD.Z m256 k zmm
// VPMOVSXWD.Z ymm k zmm
//
// Construct and append a VPMOVSXWD.Z instruction to the active function.
func (c *Context) VPMOVSXWD_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXWD_Z(mxy, k, xyz))
}
// VPMOVSXWD_Z: Move Packed Word Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWD.Z m128 k ymm
// VPMOVSXWD.Z m64 k xmm
// VPMOVSXWD.Z xmm k xmm
// VPMOVSXWD.Z xmm k ymm
// VPMOVSXWD.Z m256 k zmm
// VPMOVSXWD.Z ymm k zmm
//
// Construct and append a VPMOVSXWD.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXWD_Z(mxy, k, xyz operand.Op) { ctx.VPMOVSXWD_Z(mxy, k, xyz) }
// VPMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWQ m64 ymm
// VPMOVSXWQ xmm ymm
// VPMOVSXWQ m32 xmm
// VPMOVSXWQ xmm xmm
// VPMOVSXWQ m32 k xmm
// VPMOVSXWQ m64 k ymm
// VPMOVSXWQ xmm k xmm
// VPMOVSXWQ xmm k ymm
// VPMOVSXWQ m128 k zmm
// VPMOVSXWQ m128 zmm
// VPMOVSXWQ xmm k zmm
// VPMOVSXWQ xmm zmm
//
// Construct and append a VPMOVSXWQ instruction to the active function.
func (c *Context) VPMOVSXWQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVSXWQ(ops...))
}
// VPMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWQ m64 ymm
// VPMOVSXWQ xmm ymm
// VPMOVSXWQ m32 xmm
// VPMOVSXWQ xmm xmm
// VPMOVSXWQ m32 k xmm
// VPMOVSXWQ m64 k ymm
// VPMOVSXWQ xmm k xmm
// VPMOVSXWQ xmm k ymm
// VPMOVSXWQ m128 k zmm
// VPMOVSXWQ m128 zmm
// VPMOVSXWQ xmm k zmm
// VPMOVSXWQ xmm zmm
//
// Construct and append a VPMOVSXWQ instruction to the active function.
// Operates on the global context.
func VPMOVSXWQ(ops ...operand.Op) { ctx.VPMOVSXWQ(ops...) }
// VPMOVSXWQ_Z: Move Packed Word Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWQ.Z m32 k xmm
// VPMOVSXWQ.Z m64 k ymm
// VPMOVSXWQ.Z xmm k xmm
// VPMOVSXWQ.Z xmm k ymm
// VPMOVSXWQ.Z m128 k zmm
// VPMOVSXWQ.Z xmm k zmm
//
// Construct and append a VPMOVSXWQ.Z instruction to the active function.
func (c *Context) VPMOVSXWQ_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVSXWQ_Z(mx, k, xyz))
}
// VPMOVSXWQ_Z: Move Packed Word Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWQ.Z m32 k xmm
// VPMOVSXWQ.Z m64 k ymm
// VPMOVSXWQ.Z xmm k xmm
// VPMOVSXWQ.Z xmm k ymm
// VPMOVSXWQ.Z m128 k zmm
// VPMOVSXWQ.Z xmm k zmm
//
// Construct and append a VPMOVSXWQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVSXWQ_Z(mx, k, xyz operand.Op) { ctx.VPMOVSXWQ_Z(mx, k, xyz) }
// VPMOVUSDB: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDB xmm k m32
// VPMOVUSDB xmm k xmm
// VPMOVUSDB xmm m32
// VPMOVUSDB xmm xmm
// VPMOVUSDB ymm k m64
// VPMOVUSDB ymm k xmm
// VPMOVUSDB ymm m64
// VPMOVUSDB ymm xmm
// VPMOVUSDB zmm k m128
// VPMOVUSDB zmm k xmm
// VPMOVUSDB zmm m128
// VPMOVUSDB zmm xmm
//
// Construct and append a VPMOVUSDB instruction to the active function.
func (c *Context) VPMOVUSDB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSDB(ops...))
}
// VPMOVUSDB: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDB xmm k m32
// VPMOVUSDB xmm k xmm
// VPMOVUSDB xmm m32
// VPMOVUSDB xmm xmm
// VPMOVUSDB ymm k m64
// VPMOVUSDB ymm k xmm
// VPMOVUSDB ymm m64
// VPMOVUSDB ymm xmm
// VPMOVUSDB zmm k m128
// VPMOVUSDB zmm k xmm
// VPMOVUSDB zmm m128
// VPMOVUSDB zmm xmm
//
// Construct and append a VPMOVUSDB instruction to the active function.
// Operates on the global context.
func VPMOVUSDB(ops ...operand.Op) { ctx.VPMOVUSDB(ops...) }
// VPMOVUSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDB.Z xmm k m32
// VPMOVUSDB.Z xmm k xmm
// VPMOVUSDB.Z ymm k m64
// VPMOVUSDB.Z ymm k xmm
// VPMOVUSDB.Z zmm k m128
// VPMOVUSDB.Z zmm k xmm
//
// Construct and append a VPMOVUSDB.Z instruction to the active function.
func (c *Context) VPMOVUSDB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVUSDB_Z(xyz, k, mx))
}
// VPMOVUSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDB.Z xmm k m32
// VPMOVUSDB.Z xmm k xmm
// VPMOVUSDB.Z ymm k m64
// VPMOVUSDB.Z ymm k xmm
// VPMOVUSDB.Z zmm k m128
// VPMOVUSDB.Z zmm k xmm
//
// Construct and append a VPMOVUSDB.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSDB_Z(xyz, k, mx operand.Op) { ctx.VPMOVUSDB_Z(xyz, k, mx) }
// VPMOVUSDW: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDW xmm k m64
// VPMOVUSDW xmm k xmm
// VPMOVUSDW xmm m64
// VPMOVUSDW xmm xmm
// VPMOVUSDW ymm k m128
// VPMOVUSDW ymm k xmm
// VPMOVUSDW ymm m128
// VPMOVUSDW ymm xmm
// VPMOVUSDW zmm k m256
// VPMOVUSDW zmm k ymm
// VPMOVUSDW zmm m256
// VPMOVUSDW zmm ymm
//
// Construct and append a VPMOVUSDW instruction to the active function.
func (c *Context) VPMOVUSDW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSDW(ops...))
}
// VPMOVUSDW: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDW xmm k m64
// VPMOVUSDW xmm k xmm
// VPMOVUSDW xmm m64
// VPMOVUSDW xmm xmm
// VPMOVUSDW ymm k m128
// VPMOVUSDW ymm k xmm
// VPMOVUSDW ymm m128
// VPMOVUSDW ymm xmm
// VPMOVUSDW zmm k m256
// VPMOVUSDW zmm k ymm
// VPMOVUSDW zmm m256
// VPMOVUSDW zmm ymm
//
// Construct and append a VPMOVUSDW instruction to the active function.
// Operates on the global context.
func VPMOVUSDW(ops ...operand.Op) { ctx.VPMOVUSDW(ops...) }
// VPMOVUSDW_Z: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDW.Z xmm k m64
// VPMOVUSDW.Z xmm k xmm
// VPMOVUSDW.Z ymm k m128
// VPMOVUSDW.Z ymm k xmm
// VPMOVUSDW.Z zmm k m256
// VPMOVUSDW.Z zmm k ymm
//
// Construct and append a VPMOVUSDW.Z instruction to the active function.
func (c *Context) VPMOVUSDW_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVUSDW_Z(xyz, k, mxy))
}
// VPMOVUSDW_Z: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDW.Z xmm k m64
// VPMOVUSDW.Z xmm k xmm
// VPMOVUSDW.Z ymm k m128
// VPMOVUSDW.Z ymm k xmm
// VPMOVUSDW.Z zmm k m256
// VPMOVUSDW.Z zmm k ymm
//
// Construct and append a VPMOVUSDW.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSDW_Z(xyz, k, mxy operand.Op) { ctx.VPMOVUSDW_Z(xyz, k, mxy) }
// VPMOVUSQB: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQB xmm k m16
// VPMOVUSQB xmm k xmm
// VPMOVUSQB xmm m16
// VPMOVUSQB xmm xmm
// VPMOVUSQB ymm k m32
// VPMOVUSQB ymm k xmm
// VPMOVUSQB ymm m32
// VPMOVUSQB ymm xmm
// VPMOVUSQB zmm k m64
// VPMOVUSQB zmm k xmm
// VPMOVUSQB zmm m64
// VPMOVUSQB zmm xmm
//
// Construct and append a VPMOVUSQB instruction to the active function.
func (c *Context) VPMOVUSQB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSQB(ops...))
}
// VPMOVUSQB: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQB xmm k m16
// VPMOVUSQB xmm k xmm
// VPMOVUSQB xmm m16
// VPMOVUSQB xmm xmm
// VPMOVUSQB ymm k m32
// VPMOVUSQB ymm k xmm
// VPMOVUSQB ymm m32
// VPMOVUSQB ymm xmm
// VPMOVUSQB zmm k m64
// VPMOVUSQB zmm k xmm
// VPMOVUSQB zmm m64
// VPMOVUSQB zmm xmm
//
// Construct and append a VPMOVUSQB instruction to the active function.
// Operates on the global context.
func VPMOVUSQB(ops ...operand.Op) { ctx.VPMOVUSQB(ops...) }
// VPMOVUSQB_Z: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQB.Z xmm k m16
// VPMOVUSQB.Z xmm k xmm
// VPMOVUSQB.Z ymm k m32
// VPMOVUSQB.Z ymm k xmm
// VPMOVUSQB.Z zmm k m64
// VPMOVUSQB.Z zmm k xmm
//
// Construct and append a VPMOVUSQB.Z instruction to the active function.
func (c *Context) VPMOVUSQB_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVUSQB_Z(xyz, k, mx))
}
// VPMOVUSQB_Z: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQB.Z xmm k m16
// VPMOVUSQB.Z xmm k xmm
// VPMOVUSQB.Z ymm k m32
// VPMOVUSQB.Z ymm k xmm
// VPMOVUSQB.Z zmm k m64
// VPMOVUSQB.Z zmm k xmm
//
// Construct and append a VPMOVUSQB.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSQB_Z(xyz, k, mx operand.Op) { ctx.VPMOVUSQB_Z(xyz, k, mx) }
// VPMOVUSQD: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQD xmm k m64
// VPMOVUSQD xmm k xmm
// VPMOVUSQD xmm m64
// VPMOVUSQD xmm xmm
// VPMOVUSQD ymm k m128
// VPMOVUSQD ymm k xmm
// VPMOVUSQD ymm m128
// VPMOVUSQD ymm xmm
// VPMOVUSQD zmm k m256
// VPMOVUSQD zmm k ymm
// VPMOVUSQD zmm m256
// VPMOVUSQD zmm ymm
//
// Construct and append a VPMOVUSQD instruction to the active function.
func (c *Context) VPMOVUSQD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSQD(ops...))
}
// VPMOVUSQD: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQD xmm k m64
// VPMOVUSQD xmm k xmm
// VPMOVUSQD xmm m64
// VPMOVUSQD xmm xmm
// VPMOVUSQD ymm k m128
// VPMOVUSQD ymm k xmm
// VPMOVUSQD ymm m128
// VPMOVUSQD ymm xmm
// VPMOVUSQD zmm k m256
// VPMOVUSQD zmm k ymm
// VPMOVUSQD zmm m256
// VPMOVUSQD zmm ymm
//
// Construct and append a VPMOVUSQD instruction to the active function.
// Operates on the global context.
func VPMOVUSQD(ops ...operand.Op) { ctx.VPMOVUSQD(ops...) }
// VPMOVUSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQD.Z xmm k m64
// VPMOVUSQD.Z xmm k xmm
// VPMOVUSQD.Z ymm k m128
// VPMOVUSQD.Z ymm k xmm
// VPMOVUSQD.Z zmm k m256
// VPMOVUSQD.Z zmm k ymm
//
// Construct and append a VPMOVUSQD.Z instruction to the active function.
func (c *Context) VPMOVUSQD_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVUSQD_Z(xyz, k, mxy))
}
// VPMOVUSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQD.Z xmm k m64
// VPMOVUSQD.Z xmm k xmm
// VPMOVUSQD.Z ymm k m128
// VPMOVUSQD.Z ymm k xmm
// VPMOVUSQD.Z zmm k m256
// VPMOVUSQD.Z zmm k ymm
//
// Construct and append a VPMOVUSQD.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSQD_Z(xyz, k, mxy operand.Op) { ctx.VPMOVUSQD_Z(xyz, k, mxy) }
// VPMOVUSQW: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQW xmm k m32
// VPMOVUSQW xmm k xmm
// VPMOVUSQW xmm m32
// VPMOVUSQW xmm xmm
// VPMOVUSQW ymm k m64
// VPMOVUSQW ymm k xmm
// VPMOVUSQW ymm m64
// VPMOVUSQW ymm xmm
// VPMOVUSQW zmm k m128
// VPMOVUSQW zmm k xmm
// VPMOVUSQW zmm m128
// VPMOVUSQW zmm xmm
//
// Construct and append a VPMOVUSQW instruction to the active function.
func (c *Context) VPMOVUSQW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSQW(ops...))
}
// VPMOVUSQW: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQW xmm k m32
// VPMOVUSQW xmm k xmm
// VPMOVUSQW xmm m32
// VPMOVUSQW xmm xmm
// VPMOVUSQW ymm k m64
// VPMOVUSQW ymm k xmm
// VPMOVUSQW ymm m64
// VPMOVUSQW ymm xmm
// VPMOVUSQW zmm k m128
// VPMOVUSQW zmm k xmm
// VPMOVUSQW zmm m128
// VPMOVUSQW zmm xmm
//
// Construct and append a VPMOVUSQW instruction to the active function.
// Operates on the global context.
func VPMOVUSQW(ops ...operand.Op) { ctx.VPMOVUSQW(ops...) }
// VPMOVUSQW_Z: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQW.Z xmm k m32
// VPMOVUSQW.Z xmm k xmm
// VPMOVUSQW.Z ymm k m64
// VPMOVUSQW.Z ymm k xmm
// VPMOVUSQW.Z zmm k m128
// VPMOVUSQW.Z zmm k xmm
//
// Construct and append a VPMOVUSQW.Z instruction to the active function.
func (c *Context) VPMOVUSQW_Z(xyz, k, mx operand.Op) {
c.addinstruction(x86.VPMOVUSQW_Z(xyz, k, mx))
}
// VPMOVUSQW_Z: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQW.Z xmm k m32
// VPMOVUSQW.Z xmm k xmm
// VPMOVUSQW.Z ymm k m64
// VPMOVUSQW.Z ymm k xmm
// VPMOVUSQW.Z zmm k m128
// VPMOVUSQW.Z zmm k xmm
//
// Construct and append a VPMOVUSQW.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSQW_Z(xyz, k, mx operand.Op) { ctx.VPMOVUSQW_Z(xyz, k, mx) }
// VPMOVUSWB: Down Convert Packed Word Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSWB xmm k m64
// VPMOVUSWB xmm k xmm
// VPMOVUSWB xmm m64
// VPMOVUSWB xmm xmm
// VPMOVUSWB ymm k m128
// VPMOVUSWB ymm k xmm
// VPMOVUSWB ymm m128
// VPMOVUSWB ymm xmm
// VPMOVUSWB zmm k m256
// VPMOVUSWB zmm k ymm
// VPMOVUSWB zmm m256
// VPMOVUSWB zmm ymm
//
// Construct and append a VPMOVUSWB instruction to the active function.
func (c *Context) VPMOVUSWB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVUSWB(ops...))
}
// VPMOVUSWB: Down Convert Packed Word Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSWB xmm k m64
// VPMOVUSWB xmm k xmm
// VPMOVUSWB xmm m64
// VPMOVUSWB xmm xmm
// VPMOVUSWB ymm k m128
// VPMOVUSWB ymm k xmm
// VPMOVUSWB ymm m128
// VPMOVUSWB ymm xmm
// VPMOVUSWB zmm k m256
// VPMOVUSWB zmm k ymm
// VPMOVUSWB zmm m256
// VPMOVUSWB zmm ymm
//
// Construct and append a VPMOVUSWB instruction to the active function.
// Operates on the global context.
func VPMOVUSWB(ops ...operand.Op) { ctx.VPMOVUSWB(ops...) }
// VPMOVUSWB_Z: Down Convert Packed Word Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSWB.Z xmm k m64
// VPMOVUSWB.Z xmm k xmm
// VPMOVUSWB.Z ymm k m128
// VPMOVUSWB.Z ymm k xmm
// VPMOVUSWB.Z zmm k m256
// VPMOVUSWB.Z zmm k ymm
//
// Construct and append a VPMOVUSWB.Z instruction to the active function.
func (c *Context) VPMOVUSWB_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVUSWB_Z(xyz, k, mxy))
}
// VPMOVUSWB_Z: Down Convert Packed Word Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSWB.Z xmm k m64
// VPMOVUSWB.Z xmm k xmm
// VPMOVUSWB.Z ymm k m128
// VPMOVUSWB.Z ymm k xmm
// VPMOVUSWB.Z zmm k m256
// VPMOVUSWB.Z zmm k ymm
//
// Construct and append a VPMOVUSWB.Z instruction to the active function.
// Operates on the global context.
func VPMOVUSWB_Z(xyz, k, mxy operand.Op) { ctx.VPMOVUSWB_Z(xyz, k, mxy) }
// VPMOVW2M: Move Signs of Packed Word Integers to Mask Register.
//
// Forms:
//
// VPMOVW2M xmm k
// VPMOVW2M ymm k
// VPMOVW2M zmm k
//
// Construct and append a VPMOVW2M instruction to the active function.
func (c *Context) VPMOVW2M(xyz, k operand.Op) {
c.addinstruction(x86.VPMOVW2M(xyz, k))
}
// VPMOVW2M: Move Signs of Packed Word Integers to Mask Register.
//
// Forms:
//
// VPMOVW2M xmm k
// VPMOVW2M ymm k
// VPMOVW2M zmm k
//
// Construct and append a VPMOVW2M instruction to the active function.
// Operates on the global context.
func VPMOVW2M(xyz, k operand.Op) { ctx.VPMOVW2M(xyz, k) }
// VPMOVWB: Down Convert Packed Word Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVWB xmm k m64
// VPMOVWB xmm k xmm
// VPMOVWB xmm m64
// VPMOVWB xmm xmm
// VPMOVWB ymm k m128
// VPMOVWB ymm k xmm
// VPMOVWB ymm m128
// VPMOVWB ymm xmm
// VPMOVWB zmm k m256
// VPMOVWB zmm k ymm
// VPMOVWB zmm m256
// VPMOVWB zmm ymm
//
// Construct and append a VPMOVWB instruction to the active function.
func (c *Context) VPMOVWB(ops ...operand.Op) {
c.addinstruction(x86.VPMOVWB(ops...))
}
// VPMOVWB: Down Convert Packed Word Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVWB xmm k m64
// VPMOVWB xmm k xmm
// VPMOVWB xmm m64
// VPMOVWB xmm xmm
// VPMOVWB ymm k m128
// VPMOVWB ymm k xmm
// VPMOVWB ymm m128
// VPMOVWB ymm xmm
// VPMOVWB zmm k m256
// VPMOVWB zmm k ymm
// VPMOVWB zmm m256
// VPMOVWB zmm ymm
//
// Construct and append a VPMOVWB instruction to the active function.
// Operates on the global context.
func VPMOVWB(ops ...operand.Op) { ctx.VPMOVWB(ops...) }
// VPMOVWB_Z: Down Convert Packed Word Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVWB.Z xmm k m64
// VPMOVWB.Z xmm k xmm
// VPMOVWB.Z ymm k m128
// VPMOVWB.Z ymm k xmm
// VPMOVWB.Z zmm k m256
// VPMOVWB.Z zmm k ymm
//
// Construct and append a VPMOVWB.Z instruction to the active function.
func (c *Context) VPMOVWB_Z(xyz, k, mxy operand.Op) {
c.addinstruction(x86.VPMOVWB_Z(xyz, k, mxy))
}
// VPMOVWB_Z: Down Convert Packed Word Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVWB.Z xmm k m64
// VPMOVWB.Z xmm k xmm
// VPMOVWB.Z ymm k m128
// VPMOVWB.Z ymm k xmm
// VPMOVWB.Z zmm k m256
// VPMOVWB.Z zmm k ymm
//
// Construct and append a VPMOVWB.Z instruction to the active function.
// Operates on the global context.
func VPMOVWB_Z(xyz, k, mxy operand.Op) { ctx.VPMOVWB_Z(xyz, k, mxy) }
// VPMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBD m64 ymm
// VPMOVZXBD xmm ymm
// VPMOVZXBD m32 xmm
// VPMOVZXBD xmm xmm
// VPMOVZXBD m32 k xmm
// VPMOVZXBD m64 k ymm
// VPMOVZXBD xmm k xmm
// VPMOVZXBD xmm k ymm
// VPMOVZXBD m128 k zmm
// VPMOVZXBD m128 zmm
// VPMOVZXBD xmm k zmm
// VPMOVZXBD xmm zmm
//
// Construct and append a VPMOVZXBD instruction to the active function.
func (c *Context) VPMOVZXBD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXBD(ops...))
}
// VPMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBD m64 ymm
// VPMOVZXBD xmm ymm
// VPMOVZXBD m32 xmm
// VPMOVZXBD xmm xmm
// VPMOVZXBD m32 k xmm
// VPMOVZXBD m64 k ymm
// VPMOVZXBD xmm k xmm
// VPMOVZXBD xmm k ymm
// VPMOVZXBD m128 k zmm
// VPMOVZXBD m128 zmm
// VPMOVZXBD xmm k zmm
// VPMOVZXBD xmm zmm
//
// Construct and append a VPMOVZXBD instruction to the active function.
// Operates on the global context.
func VPMOVZXBD(ops ...operand.Op) { ctx.VPMOVZXBD(ops...) }
// VPMOVZXBD_Z: Move Packed Byte Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBD.Z m32 k xmm
// VPMOVZXBD.Z m64 k ymm
// VPMOVZXBD.Z xmm k xmm
// VPMOVZXBD.Z xmm k ymm
// VPMOVZXBD.Z m128 k zmm
// VPMOVZXBD.Z xmm k zmm
//
// Construct and append a VPMOVZXBD.Z instruction to the active function.
func (c *Context) VPMOVZXBD_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXBD_Z(mx, k, xyz))
}
// VPMOVZXBD_Z: Move Packed Byte Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBD.Z m32 k xmm
// VPMOVZXBD.Z m64 k ymm
// VPMOVZXBD.Z xmm k xmm
// VPMOVZXBD.Z xmm k ymm
// VPMOVZXBD.Z m128 k zmm
// VPMOVZXBD.Z xmm k zmm
//
// Construct and append a VPMOVZXBD.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXBD_Z(mx, k, xyz operand.Op) { ctx.VPMOVZXBD_Z(mx, k, xyz) }
// VPMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBQ m32 ymm
// VPMOVZXBQ xmm ymm
// VPMOVZXBQ m16 xmm
// VPMOVZXBQ xmm xmm
// VPMOVZXBQ m16 k xmm
// VPMOVZXBQ m32 k ymm
// VPMOVZXBQ xmm k xmm
// VPMOVZXBQ xmm k ymm
// VPMOVZXBQ m64 k zmm
// VPMOVZXBQ m64 zmm
// VPMOVZXBQ xmm k zmm
// VPMOVZXBQ xmm zmm
//
// Construct and append a VPMOVZXBQ instruction to the active function.
func (c *Context) VPMOVZXBQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXBQ(ops...))
}
// VPMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBQ m32 ymm
// VPMOVZXBQ xmm ymm
// VPMOVZXBQ m16 xmm
// VPMOVZXBQ xmm xmm
// VPMOVZXBQ m16 k xmm
// VPMOVZXBQ m32 k ymm
// VPMOVZXBQ xmm k xmm
// VPMOVZXBQ xmm k ymm
// VPMOVZXBQ m64 k zmm
// VPMOVZXBQ m64 zmm
// VPMOVZXBQ xmm k zmm
// VPMOVZXBQ xmm zmm
//
// Construct and append a VPMOVZXBQ instruction to the active function.
// Operates on the global context.
func VPMOVZXBQ(ops ...operand.Op) { ctx.VPMOVZXBQ(ops...) }
// VPMOVZXBQ_Z: Move Packed Byte Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBQ.Z m16 k xmm
// VPMOVZXBQ.Z m32 k ymm
// VPMOVZXBQ.Z xmm k xmm
// VPMOVZXBQ.Z xmm k ymm
// VPMOVZXBQ.Z m64 k zmm
// VPMOVZXBQ.Z xmm k zmm
//
// Construct and append a VPMOVZXBQ.Z instruction to the active function.
func (c *Context) VPMOVZXBQ_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXBQ_Z(mx, k, xyz))
}
// VPMOVZXBQ_Z: Move Packed Byte Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBQ.Z m16 k xmm
// VPMOVZXBQ.Z m32 k ymm
// VPMOVZXBQ.Z xmm k xmm
// VPMOVZXBQ.Z xmm k ymm
// VPMOVZXBQ.Z m64 k zmm
// VPMOVZXBQ.Z xmm k zmm
//
// Construct and append a VPMOVZXBQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXBQ_Z(mx, k, xyz operand.Op) { ctx.VPMOVZXBQ_Z(mx, k, xyz) }
// VPMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBW m128 ymm
// VPMOVZXBW xmm ymm
// VPMOVZXBW m64 xmm
// VPMOVZXBW xmm xmm
// VPMOVZXBW m128 k ymm
// VPMOVZXBW m64 k xmm
// VPMOVZXBW xmm k xmm
// VPMOVZXBW xmm k ymm
// VPMOVZXBW m256 k zmm
// VPMOVZXBW m256 zmm
// VPMOVZXBW ymm k zmm
// VPMOVZXBW ymm zmm
//
// Construct and append a VPMOVZXBW instruction to the active function.
func (c *Context) VPMOVZXBW(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXBW(ops...))
}
// VPMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBW m128 ymm
// VPMOVZXBW xmm ymm
// VPMOVZXBW m64 xmm
// VPMOVZXBW xmm xmm
// VPMOVZXBW m128 k ymm
// VPMOVZXBW m64 k xmm
// VPMOVZXBW xmm k xmm
// VPMOVZXBW xmm k ymm
// VPMOVZXBW m256 k zmm
// VPMOVZXBW m256 zmm
// VPMOVZXBW ymm k zmm
// VPMOVZXBW ymm zmm
//
// Construct and append a VPMOVZXBW instruction to the active function.
// Operates on the global context.
func VPMOVZXBW(ops ...operand.Op) { ctx.VPMOVZXBW(ops...) }
// VPMOVZXBW_Z: Move Packed Byte Integers to Word Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBW.Z m128 k ymm
// VPMOVZXBW.Z m64 k xmm
// VPMOVZXBW.Z xmm k xmm
// VPMOVZXBW.Z xmm k ymm
// VPMOVZXBW.Z m256 k zmm
// VPMOVZXBW.Z ymm k zmm
//
// Construct and append a VPMOVZXBW.Z instruction to the active function.
func (c *Context) VPMOVZXBW_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXBW_Z(mxy, k, xyz))
}
// VPMOVZXBW_Z: Move Packed Byte Integers to Word Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBW.Z m128 k ymm
// VPMOVZXBW.Z m64 k xmm
// VPMOVZXBW.Z xmm k xmm
// VPMOVZXBW.Z xmm k ymm
// VPMOVZXBW.Z m256 k zmm
// VPMOVZXBW.Z ymm k zmm
//
// Construct and append a VPMOVZXBW.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXBW_Z(mxy, k, xyz operand.Op) { ctx.VPMOVZXBW_Z(mxy, k, xyz) }
// VPMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXDQ m128 ymm
// VPMOVZXDQ xmm ymm
// VPMOVZXDQ m64 xmm
// VPMOVZXDQ xmm xmm
// VPMOVZXDQ m128 k ymm
// VPMOVZXDQ m64 k xmm
// VPMOVZXDQ xmm k xmm
// VPMOVZXDQ xmm k ymm
// VPMOVZXDQ m256 k zmm
// VPMOVZXDQ m256 zmm
// VPMOVZXDQ ymm k zmm
// VPMOVZXDQ ymm zmm
//
// Construct and append a VPMOVZXDQ instruction to the active function.
func (c *Context) VPMOVZXDQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXDQ(ops...))
}
// VPMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXDQ m128 ymm
// VPMOVZXDQ xmm ymm
// VPMOVZXDQ m64 xmm
// VPMOVZXDQ xmm xmm
// VPMOVZXDQ m128 k ymm
// VPMOVZXDQ m64 k xmm
// VPMOVZXDQ xmm k xmm
// VPMOVZXDQ xmm k ymm
// VPMOVZXDQ m256 k zmm
// VPMOVZXDQ m256 zmm
// VPMOVZXDQ ymm k zmm
// VPMOVZXDQ ymm zmm
//
// Construct and append a VPMOVZXDQ instruction to the active function.
// Operates on the global context.
func VPMOVZXDQ(ops ...operand.Op) { ctx.VPMOVZXDQ(ops...) }
// VPMOVZXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXDQ.Z m128 k ymm
// VPMOVZXDQ.Z m64 k xmm
// VPMOVZXDQ.Z xmm k xmm
// VPMOVZXDQ.Z xmm k ymm
// VPMOVZXDQ.Z m256 k zmm
// VPMOVZXDQ.Z ymm k zmm
//
// Construct and append a VPMOVZXDQ.Z instruction to the active function.
func (c *Context) VPMOVZXDQ_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXDQ_Z(mxy, k, xyz))
}
// VPMOVZXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXDQ.Z m128 k ymm
// VPMOVZXDQ.Z m64 k xmm
// VPMOVZXDQ.Z xmm k xmm
// VPMOVZXDQ.Z xmm k ymm
// VPMOVZXDQ.Z m256 k zmm
// VPMOVZXDQ.Z ymm k zmm
//
// Construct and append a VPMOVZXDQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXDQ_Z(mxy, k, xyz operand.Op) { ctx.VPMOVZXDQ_Z(mxy, k, xyz) }
// VPMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWD m128 ymm
// VPMOVZXWD xmm ymm
// VPMOVZXWD m64 xmm
// VPMOVZXWD xmm xmm
// VPMOVZXWD m128 k ymm
// VPMOVZXWD m64 k xmm
// VPMOVZXWD xmm k xmm
// VPMOVZXWD xmm k ymm
// VPMOVZXWD m256 k zmm
// VPMOVZXWD m256 zmm
// VPMOVZXWD ymm k zmm
// VPMOVZXWD ymm zmm
//
// Construct and append a VPMOVZXWD instruction to the active function.
func (c *Context) VPMOVZXWD(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXWD(ops...))
}
// VPMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWD m128 ymm
// VPMOVZXWD xmm ymm
// VPMOVZXWD m64 xmm
// VPMOVZXWD xmm xmm
// VPMOVZXWD m128 k ymm
// VPMOVZXWD m64 k xmm
// VPMOVZXWD xmm k xmm
// VPMOVZXWD xmm k ymm
// VPMOVZXWD m256 k zmm
// VPMOVZXWD m256 zmm
// VPMOVZXWD ymm k zmm
// VPMOVZXWD ymm zmm
//
// Construct and append a VPMOVZXWD instruction to the active function.
// Operates on the global context.
func VPMOVZXWD(ops ...operand.Op) { ctx.VPMOVZXWD(ops...) }
// VPMOVZXWD_Z: Move Packed Word Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWD.Z m128 k ymm
// VPMOVZXWD.Z m64 k xmm
// VPMOVZXWD.Z xmm k xmm
// VPMOVZXWD.Z xmm k ymm
// VPMOVZXWD.Z m256 k zmm
// VPMOVZXWD.Z ymm k zmm
//
// Construct and append a VPMOVZXWD.Z instruction to the active function.
func (c *Context) VPMOVZXWD_Z(mxy, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXWD_Z(mxy, k, xyz))
}
// VPMOVZXWD_Z: Move Packed Word Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWD.Z m128 k ymm
// VPMOVZXWD.Z m64 k xmm
// VPMOVZXWD.Z xmm k xmm
// VPMOVZXWD.Z xmm k ymm
// VPMOVZXWD.Z m256 k zmm
// VPMOVZXWD.Z ymm k zmm
//
// Construct and append a VPMOVZXWD.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXWD_Z(mxy, k, xyz operand.Op) { ctx.VPMOVZXWD_Z(mxy, k, xyz) }
// VPMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWQ m64 ymm
// VPMOVZXWQ xmm ymm
// VPMOVZXWQ m32 xmm
// VPMOVZXWQ xmm xmm
// VPMOVZXWQ m32 k xmm
// VPMOVZXWQ m64 k ymm
// VPMOVZXWQ xmm k xmm
// VPMOVZXWQ xmm k ymm
// VPMOVZXWQ m128 k zmm
// VPMOVZXWQ m128 zmm
// VPMOVZXWQ xmm k zmm
// VPMOVZXWQ xmm zmm
//
// Construct and append a VPMOVZXWQ instruction to the active function.
func (c *Context) VPMOVZXWQ(ops ...operand.Op) {
c.addinstruction(x86.VPMOVZXWQ(ops...))
}
// VPMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWQ m64 ymm
// VPMOVZXWQ xmm ymm
// VPMOVZXWQ m32 xmm
// VPMOVZXWQ xmm xmm
// VPMOVZXWQ m32 k xmm
// VPMOVZXWQ m64 k ymm
// VPMOVZXWQ xmm k xmm
// VPMOVZXWQ xmm k ymm
// VPMOVZXWQ m128 k zmm
// VPMOVZXWQ m128 zmm
// VPMOVZXWQ xmm k zmm
// VPMOVZXWQ xmm zmm
//
// Construct and append a VPMOVZXWQ instruction to the active function.
// Operates on the global context.
func VPMOVZXWQ(ops ...operand.Op) { ctx.VPMOVZXWQ(ops...) }
// VPMOVZXWQ_Z: Move Packed Word Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWQ.Z m32 k xmm
// VPMOVZXWQ.Z m64 k ymm
// VPMOVZXWQ.Z xmm k xmm
// VPMOVZXWQ.Z xmm k ymm
// VPMOVZXWQ.Z m128 k zmm
// VPMOVZXWQ.Z xmm k zmm
//
// Construct and append a VPMOVZXWQ.Z instruction to the active function.
func (c *Context) VPMOVZXWQ_Z(mx, k, xyz operand.Op) {
c.addinstruction(x86.VPMOVZXWQ_Z(mx, k, xyz))
}
// VPMOVZXWQ_Z: Move Packed Word Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWQ.Z m32 k xmm
// VPMOVZXWQ.Z m64 k ymm
// VPMOVZXWQ.Z xmm k xmm
// VPMOVZXWQ.Z xmm k ymm
// VPMOVZXWQ.Z m128 k zmm
// VPMOVZXWQ.Z xmm k zmm
//
// Construct and append a VPMOVZXWQ.Z instruction to the active function.
// Operates on the global context.
func VPMOVZXWQ_Z(mx, k, xyz operand.Op) { ctx.VPMOVZXWQ_Z(mx, k, xyz) }
// VPMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// VPMULDQ m256 ymm ymm
// VPMULDQ ymm ymm ymm
// VPMULDQ m128 xmm xmm
// VPMULDQ xmm xmm xmm
// VPMULDQ m128 xmm k xmm
// VPMULDQ m256 ymm k ymm
// VPMULDQ xmm xmm k xmm
// VPMULDQ ymm ymm k ymm
// VPMULDQ m512 zmm k zmm
// VPMULDQ m512 zmm zmm
// VPMULDQ zmm zmm k zmm
// VPMULDQ zmm zmm zmm
//
// Construct and append a VPMULDQ instruction to the active function.
func (c *Context) VPMULDQ(ops ...operand.Op) {
c.addinstruction(x86.VPMULDQ(ops...))
}
// VPMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// VPMULDQ m256 ymm ymm
// VPMULDQ ymm ymm ymm
// VPMULDQ m128 xmm xmm
// VPMULDQ xmm xmm xmm
// VPMULDQ m128 xmm k xmm
// VPMULDQ m256 ymm k ymm
// VPMULDQ xmm xmm k xmm
// VPMULDQ ymm ymm k ymm
// VPMULDQ m512 zmm k zmm
// VPMULDQ m512 zmm zmm
// VPMULDQ zmm zmm k zmm
// VPMULDQ zmm zmm zmm
//
// Construct and append a VPMULDQ instruction to the active function.
// Operates on the global context.
func VPMULDQ(ops ...operand.Op) { ctx.VPMULDQ(ops...) }
// VPMULDQ_BCST: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast).
//
// Forms:
//
// VPMULDQ.BCST m64 xmm k xmm
// VPMULDQ.BCST m64 xmm xmm
// VPMULDQ.BCST m64 ymm k ymm
// VPMULDQ.BCST m64 ymm ymm
// VPMULDQ.BCST m64 zmm k zmm
// VPMULDQ.BCST m64 zmm zmm
//
// Construct and append a VPMULDQ.BCST instruction to the active function.
func (c *Context) VPMULDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMULDQ_BCST(ops...))
}
// VPMULDQ_BCST: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast).
//
// Forms:
//
// VPMULDQ.BCST m64 xmm k xmm
// VPMULDQ.BCST m64 xmm xmm
// VPMULDQ.BCST m64 ymm k ymm
// VPMULDQ.BCST m64 ymm ymm
// VPMULDQ.BCST m64 zmm k zmm
// VPMULDQ.BCST m64 zmm zmm
//
// Construct and append a VPMULDQ.BCST instruction to the active function.
// Operates on the global context.
func VPMULDQ_BCST(ops ...operand.Op) { ctx.VPMULDQ_BCST(ops...) }
// VPMULDQ_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULDQ.BCST.Z m64 xmm k xmm
// VPMULDQ.BCST.Z m64 ymm k ymm
// VPMULDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULDQ.BCST.Z instruction to the active function.
func (c *Context) VPMULDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMULDQ_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULDQ.BCST.Z m64 xmm k xmm
// VPMULDQ.BCST.Z m64 ymm k ymm
// VPMULDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMULDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMULDQ_BCST_Z(m, xyz, k, xyz1) }
// VPMULDQ_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Zeroing Masking).
//
// Forms:
//
// VPMULDQ.Z m128 xmm k xmm
// VPMULDQ.Z m256 ymm k ymm
// VPMULDQ.Z xmm xmm k xmm
// VPMULDQ.Z ymm ymm k ymm
// VPMULDQ.Z m512 zmm k zmm
// VPMULDQ.Z zmm zmm k zmm
//
// Construct and append a VPMULDQ.Z instruction to the active function.
func (c *Context) VPMULDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULDQ_Z(mxyz, xyz, k, xyz1))
}
// VPMULDQ_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Zeroing Masking).
//
// Forms:
//
// VPMULDQ.Z m128 xmm k xmm
// VPMULDQ.Z m256 ymm k ymm
// VPMULDQ.Z xmm xmm k xmm
// VPMULDQ.Z ymm ymm k ymm
// VPMULDQ.Z m512 zmm k zmm
// VPMULDQ.Z zmm zmm k zmm
//
// Construct and append a VPMULDQ.Z instruction to the active function.
// Operates on the global context.
func VPMULDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULDQ_Z(mxyz, xyz, k, xyz1) }
// VPMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// VPMULHRSW m256 ymm ymm
// VPMULHRSW ymm ymm ymm
// VPMULHRSW m128 xmm xmm
// VPMULHRSW xmm xmm xmm
// VPMULHRSW m128 xmm k xmm
// VPMULHRSW m256 ymm k ymm
// VPMULHRSW xmm xmm k xmm
// VPMULHRSW ymm ymm k ymm
// VPMULHRSW m512 zmm k zmm
// VPMULHRSW m512 zmm zmm
// VPMULHRSW zmm zmm k zmm
// VPMULHRSW zmm zmm zmm
//
// Construct and append a VPMULHRSW instruction to the active function.
func (c *Context) VPMULHRSW(ops ...operand.Op) {
c.addinstruction(x86.VPMULHRSW(ops...))
}
// VPMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// VPMULHRSW m256 ymm ymm
// VPMULHRSW ymm ymm ymm
// VPMULHRSW m128 xmm xmm
// VPMULHRSW xmm xmm xmm
// VPMULHRSW m128 xmm k xmm
// VPMULHRSW m256 ymm k ymm
// VPMULHRSW xmm xmm k xmm
// VPMULHRSW ymm ymm k ymm
// VPMULHRSW m512 zmm k zmm
// VPMULHRSW m512 zmm zmm
// VPMULHRSW zmm zmm k zmm
// VPMULHRSW zmm zmm zmm
//
// Construct and append a VPMULHRSW instruction to the active function.
// Operates on the global context.
func VPMULHRSW(ops ...operand.Op) { ctx.VPMULHRSW(ops...) }
// VPMULHRSW_Z: Packed Multiply Signed Word Integers and Store High Result with Round and Scale (Zeroing Masking).
//
// Forms:
//
// VPMULHRSW.Z m128 xmm k xmm
// VPMULHRSW.Z m256 ymm k ymm
// VPMULHRSW.Z xmm xmm k xmm
// VPMULHRSW.Z ymm ymm k ymm
// VPMULHRSW.Z m512 zmm k zmm
// VPMULHRSW.Z zmm zmm k zmm
//
// Construct and append a VPMULHRSW.Z instruction to the active function.
func (c *Context) VPMULHRSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULHRSW_Z(mxyz, xyz, k, xyz1))
}
// VPMULHRSW_Z: Packed Multiply Signed Word Integers and Store High Result with Round and Scale (Zeroing Masking).
//
// Forms:
//
// VPMULHRSW.Z m128 xmm k xmm
// VPMULHRSW.Z m256 ymm k ymm
// VPMULHRSW.Z xmm xmm k xmm
// VPMULHRSW.Z ymm ymm k ymm
// VPMULHRSW.Z m512 zmm k zmm
// VPMULHRSW.Z zmm zmm k zmm
//
// Construct and append a VPMULHRSW.Z instruction to the active function.
// Operates on the global context.
func VPMULHRSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULHRSW_Z(mxyz, xyz, k, xyz1) }
// VPMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// VPMULHUW m256 ymm ymm
// VPMULHUW ymm ymm ymm
// VPMULHUW m128 xmm xmm
// VPMULHUW xmm xmm xmm
// VPMULHUW m128 xmm k xmm
// VPMULHUW m256 ymm k ymm
// VPMULHUW xmm xmm k xmm
// VPMULHUW ymm ymm k ymm
// VPMULHUW m512 zmm k zmm
// VPMULHUW m512 zmm zmm
// VPMULHUW zmm zmm k zmm
// VPMULHUW zmm zmm zmm
//
// Construct and append a VPMULHUW instruction to the active function.
func (c *Context) VPMULHUW(ops ...operand.Op) {
c.addinstruction(x86.VPMULHUW(ops...))
}
// VPMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// VPMULHUW m256 ymm ymm
// VPMULHUW ymm ymm ymm
// VPMULHUW m128 xmm xmm
// VPMULHUW xmm xmm xmm
// VPMULHUW m128 xmm k xmm
// VPMULHUW m256 ymm k ymm
// VPMULHUW xmm xmm k xmm
// VPMULHUW ymm ymm k ymm
// VPMULHUW m512 zmm k zmm
// VPMULHUW m512 zmm zmm
// VPMULHUW zmm zmm k zmm
// VPMULHUW zmm zmm zmm
//
// Construct and append a VPMULHUW instruction to the active function.
// Operates on the global context.
func VPMULHUW(ops ...operand.Op) { ctx.VPMULHUW(ops...) }
// VPMULHUW_Z: Multiply Packed Unsigned Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHUW.Z m128 xmm k xmm
// VPMULHUW.Z m256 ymm k ymm
// VPMULHUW.Z xmm xmm k xmm
// VPMULHUW.Z ymm ymm k ymm
// VPMULHUW.Z m512 zmm k zmm
// VPMULHUW.Z zmm zmm k zmm
//
// Construct and append a VPMULHUW.Z instruction to the active function.
func (c *Context) VPMULHUW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULHUW_Z(mxyz, xyz, k, xyz1))
}
// VPMULHUW_Z: Multiply Packed Unsigned Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHUW.Z m128 xmm k xmm
// VPMULHUW.Z m256 ymm k ymm
// VPMULHUW.Z xmm xmm k xmm
// VPMULHUW.Z ymm ymm k ymm
// VPMULHUW.Z m512 zmm k zmm
// VPMULHUW.Z zmm zmm k zmm
//
// Construct and append a VPMULHUW.Z instruction to the active function.
// Operates on the global context.
func VPMULHUW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULHUW_Z(mxyz, xyz, k, xyz1) }
// VPMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// VPMULHW m256 ymm ymm
// VPMULHW ymm ymm ymm
// VPMULHW m128 xmm xmm
// VPMULHW xmm xmm xmm
// VPMULHW m128 xmm k xmm
// VPMULHW m256 ymm k ymm
// VPMULHW xmm xmm k xmm
// VPMULHW ymm ymm k ymm
// VPMULHW m512 zmm k zmm
// VPMULHW m512 zmm zmm
// VPMULHW zmm zmm k zmm
// VPMULHW zmm zmm zmm
//
// Construct and append a VPMULHW instruction to the active function.
func (c *Context) VPMULHW(ops ...operand.Op) {
c.addinstruction(x86.VPMULHW(ops...))
}
// VPMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// VPMULHW m256 ymm ymm
// VPMULHW ymm ymm ymm
// VPMULHW m128 xmm xmm
// VPMULHW xmm xmm xmm
// VPMULHW m128 xmm k xmm
// VPMULHW m256 ymm k ymm
// VPMULHW xmm xmm k xmm
// VPMULHW ymm ymm k ymm
// VPMULHW m512 zmm k zmm
// VPMULHW m512 zmm zmm
// VPMULHW zmm zmm k zmm
// VPMULHW zmm zmm zmm
//
// Construct and append a VPMULHW instruction to the active function.
// Operates on the global context.
func VPMULHW(ops ...operand.Op) { ctx.VPMULHW(ops...) }
// VPMULHW_Z: Multiply Packed Signed Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHW.Z m128 xmm k xmm
// VPMULHW.Z m256 ymm k ymm
// VPMULHW.Z xmm xmm k xmm
// VPMULHW.Z ymm ymm k ymm
// VPMULHW.Z m512 zmm k zmm
// VPMULHW.Z zmm zmm k zmm
//
// Construct and append a VPMULHW.Z instruction to the active function.
func (c *Context) VPMULHW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULHW_Z(mxyz, xyz, k, xyz1))
}
// VPMULHW_Z: Multiply Packed Signed Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHW.Z m128 xmm k xmm
// VPMULHW.Z m256 ymm k ymm
// VPMULHW.Z xmm xmm k xmm
// VPMULHW.Z ymm ymm k ymm
// VPMULHW.Z m512 zmm k zmm
// VPMULHW.Z zmm zmm k zmm
//
// Construct and append a VPMULHW.Z instruction to the active function.
// Operates on the global context.
func VPMULHW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULHW_Z(mxyz, xyz, k, xyz1) }
// VPMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// VPMULLD m256 ymm ymm
// VPMULLD ymm ymm ymm
// VPMULLD m128 xmm xmm
// VPMULLD xmm xmm xmm
// VPMULLD m128 xmm k xmm
// VPMULLD m256 ymm k ymm
// VPMULLD xmm xmm k xmm
// VPMULLD ymm ymm k ymm
// VPMULLD m512 zmm k zmm
// VPMULLD m512 zmm zmm
// VPMULLD zmm zmm k zmm
// VPMULLD zmm zmm zmm
//
// Construct and append a VPMULLD instruction to the active function.
func (c *Context) VPMULLD(ops ...operand.Op) {
c.addinstruction(x86.VPMULLD(ops...))
}
// VPMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// VPMULLD m256 ymm ymm
// VPMULLD ymm ymm ymm
// VPMULLD m128 xmm xmm
// VPMULLD xmm xmm xmm
// VPMULLD m128 xmm k xmm
// VPMULLD m256 ymm k ymm
// VPMULLD xmm xmm k xmm
// VPMULLD ymm ymm k ymm
// VPMULLD m512 zmm k zmm
// VPMULLD m512 zmm zmm
// VPMULLD zmm zmm k zmm
// VPMULLD zmm zmm zmm
//
// Construct and append a VPMULLD instruction to the active function.
// Operates on the global context.
func VPMULLD(ops ...operand.Op) { ctx.VPMULLD(ops...) }
// VPMULLD_BCST: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLD.BCST m32 xmm k xmm
// VPMULLD.BCST m32 xmm xmm
// VPMULLD.BCST m32 ymm k ymm
// VPMULLD.BCST m32 ymm ymm
// VPMULLD.BCST m32 zmm k zmm
// VPMULLD.BCST m32 zmm zmm
//
// Construct and append a VPMULLD.BCST instruction to the active function.
func (c *Context) VPMULLD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMULLD_BCST(ops...))
}
// VPMULLD_BCST: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLD.BCST m32 xmm k xmm
// VPMULLD.BCST m32 xmm xmm
// VPMULLD.BCST m32 ymm k ymm
// VPMULLD.BCST m32 ymm ymm
// VPMULLD.BCST m32 zmm k zmm
// VPMULLD.BCST m32 zmm zmm
//
// Construct and append a VPMULLD.BCST instruction to the active function.
// Operates on the global context.
func VPMULLD_BCST(ops ...operand.Op) { ctx.VPMULLD_BCST(ops...) }
// VPMULLD_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLD.BCST.Z m32 xmm k xmm
// VPMULLD.BCST.Z m32 ymm k ymm
// VPMULLD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMULLD.BCST.Z instruction to the active function.
func (c *Context) VPMULLD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULLD_BCST_Z(m, xyz, k, xyz1))
}
// VPMULLD_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLD.BCST.Z m32 xmm k xmm
// VPMULLD.BCST.Z m32 ymm k ymm
// VPMULLD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPMULLD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMULLD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMULLD_BCST_Z(m, xyz, k, xyz1) }
// VPMULLD_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLD.Z m128 xmm k xmm
// VPMULLD.Z m256 ymm k ymm
// VPMULLD.Z xmm xmm k xmm
// VPMULLD.Z ymm ymm k ymm
// VPMULLD.Z m512 zmm k zmm
// VPMULLD.Z zmm zmm k zmm
//
// Construct and append a VPMULLD.Z instruction to the active function.
func (c *Context) VPMULLD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULLD_Z(mxyz, xyz, k, xyz1))
}
// VPMULLD_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLD.Z m128 xmm k xmm
// VPMULLD.Z m256 ymm k ymm
// VPMULLD.Z xmm xmm k xmm
// VPMULLD.Z ymm ymm k ymm
// VPMULLD.Z m512 zmm k zmm
// VPMULLD.Z zmm zmm k zmm
//
// Construct and append a VPMULLD.Z instruction to the active function.
// Operates on the global context.
func VPMULLD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULLD_Z(mxyz, xyz, k, xyz1) }
// VPMULLQ: Multiply Packed Signed Quadword Integers and Store Low Result.
//
// Forms:
//
// VPMULLQ m128 xmm k xmm
// VPMULLQ m128 xmm xmm
// VPMULLQ m256 ymm k ymm
// VPMULLQ m256 ymm ymm
// VPMULLQ xmm xmm k xmm
// VPMULLQ xmm xmm xmm
// VPMULLQ ymm ymm k ymm
// VPMULLQ ymm ymm ymm
// VPMULLQ m512 zmm k zmm
// VPMULLQ m512 zmm zmm
// VPMULLQ zmm zmm k zmm
// VPMULLQ zmm zmm zmm
//
// Construct and append a VPMULLQ instruction to the active function.
func (c *Context) VPMULLQ(ops ...operand.Op) {
c.addinstruction(x86.VPMULLQ(ops...))
}
// VPMULLQ: Multiply Packed Signed Quadword Integers and Store Low Result.
//
// Forms:
//
// VPMULLQ m128 xmm k xmm
// VPMULLQ m128 xmm xmm
// VPMULLQ m256 ymm k ymm
// VPMULLQ m256 ymm ymm
// VPMULLQ xmm xmm k xmm
// VPMULLQ xmm xmm xmm
// VPMULLQ ymm ymm k ymm
// VPMULLQ ymm ymm ymm
// VPMULLQ m512 zmm k zmm
// VPMULLQ m512 zmm zmm
// VPMULLQ zmm zmm k zmm
// VPMULLQ zmm zmm zmm
//
// Construct and append a VPMULLQ instruction to the active function.
// Operates on the global context.
func VPMULLQ(ops ...operand.Op) { ctx.VPMULLQ(ops...) }
// VPMULLQ_BCST: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLQ.BCST m64 xmm k xmm
// VPMULLQ.BCST m64 xmm xmm
// VPMULLQ.BCST m64 ymm k ymm
// VPMULLQ.BCST m64 ymm ymm
// VPMULLQ.BCST m64 zmm k zmm
// VPMULLQ.BCST m64 zmm zmm
//
// Construct and append a VPMULLQ.BCST instruction to the active function.
func (c *Context) VPMULLQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMULLQ_BCST(ops...))
}
// VPMULLQ_BCST: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLQ.BCST m64 xmm k xmm
// VPMULLQ.BCST m64 xmm xmm
// VPMULLQ.BCST m64 ymm k ymm
// VPMULLQ.BCST m64 ymm ymm
// VPMULLQ.BCST m64 zmm k zmm
// VPMULLQ.BCST m64 zmm zmm
//
// Construct and append a VPMULLQ.BCST instruction to the active function.
// Operates on the global context.
func VPMULLQ_BCST(ops ...operand.Op) { ctx.VPMULLQ_BCST(ops...) }
// VPMULLQ_BCST_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLQ.BCST.Z m64 xmm k xmm
// VPMULLQ.BCST.Z m64 ymm k ymm
// VPMULLQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULLQ.BCST.Z instruction to the active function.
func (c *Context) VPMULLQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULLQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMULLQ_BCST_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLQ.BCST.Z m64 xmm k xmm
// VPMULLQ.BCST.Z m64 ymm k ymm
// VPMULLQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULLQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMULLQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMULLQ_BCST_Z(m, xyz, k, xyz1) }
// VPMULLQ_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLQ.Z m128 xmm k xmm
// VPMULLQ.Z m256 ymm k ymm
// VPMULLQ.Z xmm xmm k xmm
// VPMULLQ.Z ymm ymm k ymm
// VPMULLQ.Z m512 zmm k zmm
// VPMULLQ.Z zmm zmm k zmm
//
// Construct and append a VPMULLQ.Z instruction to the active function.
func (c *Context) VPMULLQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULLQ_Z(mxyz, xyz, k, xyz1))
}
// VPMULLQ_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLQ.Z m128 xmm k xmm
// VPMULLQ.Z m256 ymm k ymm
// VPMULLQ.Z xmm xmm k xmm
// VPMULLQ.Z ymm ymm k ymm
// VPMULLQ.Z m512 zmm k zmm
// VPMULLQ.Z zmm zmm k zmm
//
// Construct and append a VPMULLQ.Z instruction to the active function.
// Operates on the global context.
func VPMULLQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULLQ_Z(mxyz, xyz, k, xyz1) }
// VPMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// VPMULLW m256 ymm ymm
// VPMULLW ymm ymm ymm
// VPMULLW m128 xmm xmm
// VPMULLW xmm xmm xmm
// VPMULLW m128 xmm k xmm
// VPMULLW m256 ymm k ymm
// VPMULLW xmm xmm k xmm
// VPMULLW ymm ymm k ymm
// VPMULLW m512 zmm k zmm
// VPMULLW m512 zmm zmm
// VPMULLW zmm zmm k zmm
// VPMULLW zmm zmm zmm
//
// Construct and append a VPMULLW instruction to the active function.
func (c *Context) VPMULLW(ops ...operand.Op) {
c.addinstruction(x86.VPMULLW(ops...))
}
// VPMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// VPMULLW m256 ymm ymm
// VPMULLW ymm ymm ymm
// VPMULLW m128 xmm xmm
// VPMULLW xmm xmm xmm
// VPMULLW m128 xmm k xmm
// VPMULLW m256 ymm k ymm
// VPMULLW xmm xmm k xmm
// VPMULLW ymm ymm k ymm
// VPMULLW m512 zmm k zmm
// VPMULLW m512 zmm zmm
// VPMULLW zmm zmm k zmm
// VPMULLW zmm zmm zmm
//
// Construct and append a VPMULLW instruction to the active function.
// Operates on the global context.
func VPMULLW(ops ...operand.Op) { ctx.VPMULLW(ops...) }
// VPMULLW_Z: Multiply Packed Signed Word Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLW.Z m128 xmm k xmm
// VPMULLW.Z m256 ymm k ymm
// VPMULLW.Z xmm xmm k xmm
// VPMULLW.Z ymm ymm k ymm
// VPMULLW.Z m512 zmm k zmm
// VPMULLW.Z zmm zmm k zmm
//
// Construct and append a VPMULLW.Z instruction to the active function.
func (c *Context) VPMULLW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULLW_Z(mxyz, xyz, k, xyz1))
}
// VPMULLW_Z: Multiply Packed Signed Word Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLW.Z m128 xmm k xmm
// VPMULLW.Z m256 ymm k ymm
// VPMULLW.Z xmm xmm k xmm
// VPMULLW.Z ymm ymm k ymm
// VPMULLW.Z m512 zmm k zmm
// VPMULLW.Z zmm zmm k zmm
//
// Construct and append a VPMULLW.Z instruction to the active function.
// Operates on the global context.
func VPMULLW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULLW_Z(mxyz, xyz, k, xyz1) }
// VPMULTISHIFTQB: Select Packed Unaligned Bytes from Quadword Sources.
//
// Forms:
//
// VPMULTISHIFTQB m128 xmm k xmm
// VPMULTISHIFTQB m128 xmm xmm
// VPMULTISHIFTQB m256 ymm k ymm
// VPMULTISHIFTQB m256 ymm ymm
// VPMULTISHIFTQB xmm xmm k xmm
// VPMULTISHIFTQB xmm xmm xmm
// VPMULTISHIFTQB ymm ymm k ymm
// VPMULTISHIFTQB ymm ymm ymm
// VPMULTISHIFTQB m512 zmm k zmm
// VPMULTISHIFTQB m512 zmm zmm
// VPMULTISHIFTQB zmm zmm k zmm
// VPMULTISHIFTQB zmm zmm zmm
//
// Construct and append a VPMULTISHIFTQB instruction to the active function.
func (c *Context) VPMULTISHIFTQB(ops ...operand.Op) {
c.addinstruction(x86.VPMULTISHIFTQB(ops...))
}
// VPMULTISHIFTQB: Select Packed Unaligned Bytes from Quadword Sources.
//
// Forms:
//
// VPMULTISHIFTQB m128 xmm k xmm
// VPMULTISHIFTQB m128 xmm xmm
// VPMULTISHIFTQB m256 ymm k ymm
// VPMULTISHIFTQB m256 ymm ymm
// VPMULTISHIFTQB xmm xmm k xmm
// VPMULTISHIFTQB xmm xmm xmm
// VPMULTISHIFTQB ymm ymm k ymm
// VPMULTISHIFTQB ymm ymm ymm
// VPMULTISHIFTQB m512 zmm k zmm
// VPMULTISHIFTQB m512 zmm zmm
// VPMULTISHIFTQB zmm zmm k zmm
// VPMULTISHIFTQB zmm zmm zmm
//
// Construct and append a VPMULTISHIFTQB instruction to the active function.
// Operates on the global context.
func VPMULTISHIFTQB(ops ...operand.Op) { ctx.VPMULTISHIFTQB(ops...) }
// VPMULTISHIFTQB_BCST: Select Packed Unaligned Bytes from Quadword Sources (Broadcast).
//
// Forms:
//
// VPMULTISHIFTQB.BCST m64 xmm k xmm
// VPMULTISHIFTQB.BCST m64 xmm xmm
// VPMULTISHIFTQB.BCST m64 ymm k ymm
// VPMULTISHIFTQB.BCST m64 ymm ymm
// VPMULTISHIFTQB.BCST m64 zmm k zmm
// VPMULTISHIFTQB.BCST m64 zmm zmm
//
// Construct and append a VPMULTISHIFTQB.BCST instruction to the active function.
func (c *Context) VPMULTISHIFTQB_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMULTISHIFTQB_BCST(ops...))
}
// VPMULTISHIFTQB_BCST: Select Packed Unaligned Bytes from Quadword Sources (Broadcast).
//
// Forms:
//
// VPMULTISHIFTQB.BCST m64 xmm k xmm
// VPMULTISHIFTQB.BCST m64 xmm xmm
// VPMULTISHIFTQB.BCST m64 ymm k ymm
// VPMULTISHIFTQB.BCST m64 ymm ymm
// VPMULTISHIFTQB.BCST m64 zmm k zmm
// VPMULTISHIFTQB.BCST m64 zmm zmm
//
// Construct and append a VPMULTISHIFTQB.BCST instruction to the active function.
// Operates on the global context.
func VPMULTISHIFTQB_BCST(ops ...operand.Op) { ctx.VPMULTISHIFTQB_BCST(ops...) }
// VPMULTISHIFTQB_BCST_Z: Select Packed Unaligned Bytes from Quadword Sources (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.BCST.Z m64 xmm k xmm
// VPMULTISHIFTQB.BCST.Z m64 ymm k ymm
// VPMULTISHIFTQB.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULTISHIFTQB.BCST.Z instruction to the active function.
func (c *Context) VPMULTISHIFTQB_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULTISHIFTQB_BCST_Z(m, xyz, k, xyz1))
}
// VPMULTISHIFTQB_BCST_Z: Select Packed Unaligned Bytes from Quadword Sources (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.BCST.Z m64 xmm k xmm
// VPMULTISHIFTQB.BCST.Z m64 ymm k ymm
// VPMULTISHIFTQB.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULTISHIFTQB.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMULTISHIFTQB_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMULTISHIFTQB_BCST_Z(m, xyz, k, xyz1) }
// VPMULTISHIFTQB_Z: Select Packed Unaligned Bytes from Quadword Sources (Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.Z m128 xmm k xmm
// VPMULTISHIFTQB.Z m256 ymm k ymm
// VPMULTISHIFTQB.Z xmm xmm k xmm
// VPMULTISHIFTQB.Z ymm ymm k ymm
// VPMULTISHIFTQB.Z m512 zmm k zmm
// VPMULTISHIFTQB.Z zmm zmm k zmm
//
// Construct and append a VPMULTISHIFTQB.Z instruction to the active function.
func (c *Context) VPMULTISHIFTQB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULTISHIFTQB_Z(mxyz, xyz, k, xyz1))
}
// VPMULTISHIFTQB_Z: Select Packed Unaligned Bytes from Quadword Sources (Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.Z m128 xmm k xmm
// VPMULTISHIFTQB.Z m256 ymm k ymm
// VPMULTISHIFTQB.Z xmm xmm k xmm
// VPMULTISHIFTQB.Z ymm ymm k ymm
// VPMULTISHIFTQB.Z m512 zmm k zmm
// VPMULTISHIFTQB.Z zmm zmm k zmm
//
// Construct and append a VPMULTISHIFTQB.Z instruction to the active function.
// Operates on the global context.
func VPMULTISHIFTQB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULTISHIFTQB_Z(mxyz, xyz, k, xyz1) }
// VPMULUDQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMULUDQ m256 ymm ymm
// VPMULUDQ ymm ymm ymm
// VPMULUDQ m128 xmm xmm
// VPMULUDQ xmm xmm xmm
// VPMULUDQ m128 xmm k xmm
// VPMULUDQ m256 ymm k ymm
// VPMULUDQ xmm xmm k xmm
// VPMULUDQ ymm ymm k ymm
// VPMULUDQ m512 zmm k zmm
// VPMULUDQ m512 zmm zmm
// VPMULUDQ zmm zmm k zmm
// VPMULUDQ zmm zmm zmm
//
// Construct and append a VPMULUDQ instruction to the active function.
func (c *Context) VPMULUDQ(ops ...operand.Op) {
c.addinstruction(x86.VPMULUDQ(ops...))
}
// VPMULUDQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMULUDQ m256 ymm ymm
// VPMULUDQ ymm ymm ymm
// VPMULUDQ m128 xmm xmm
// VPMULUDQ xmm xmm xmm
// VPMULUDQ m128 xmm k xmm
// VPMULUDQ m256 ymm k ymm
// VPMULUDQ xmm xmm k xmm
// VPMULUDQ ymm ymm k ymm
// VPMULUDQ m512 zmm k zmm
// VPMULUDQ m512 zmm zmm
// VPMULUDQ zmm zmm k zmm
// VPMULUDQ zmm zmm zmm
//
// Construct and append a VPMULUDQ instruction to the active function.
// Operates on the global context.
func VPMULUDQ(ops ...operand.Op) { ctx.VPMULUDQ(ops...) }
// VPMULUDQ_BCST: Multiply Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMULUDQ.BCST m64 xmm k xmm
// VPMULUDQ.BCST m64 xmm xmm
// VPMULUDQ.BCST m64 ymm k ymm
// VPMULUDQ.BCST m64 ymm ymm
// VPMULUDQ.BCST m64 zmm k zmm
// VPMULUDQ.BCST m64 zmm zmm
//
// Construct and append a VPMULUDQ.BCST instruction to the active function.
func (c *Context) VPMULUDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPMULUDQ_BCST(ops...))
}
// VPMULUDQ_BCST: Multiply Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMULUDQ.BCST m64 xmm k xmm
// VPMULUDQ.BCST m64 xmm xmm
// VPMULUDQ.BCST m64 ymm k ymm
// VPMULUDQ.BCST m64 ymm ymm
// VPMULUDQ.BCST m64 zmm k zmm
// VPMULUDQ.BCST m64 zmm zmm
//
// Construct and append a VPMULUDQ.BCST instruction to the active function.
// Operates on the global context.
func VPMULUDQ_BCST(ops ...operand.Op) { ctx.VPMULUDQ_BCST(ops...) }
// VPMULUDQ_BCST_Z: Multiply Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.BCST.Z m64 xmm k xmm
// VPMULUDQ.BCST.Z m64 ymm k ymm
// VPMULUDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULUDQ.BCST.Z instruction to the active function.
func (c *Context) VPMULUDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULUDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPMULUDQ_BCST_Z: Multiply Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.BCST.Z m64 xmm k xmm
// VPMULUDQ.BCST.Z m64 ymm k ymm
// VPMULUDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPMULUDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPMULUDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPMULUDQ_BCST_Z(m, xyz, k, xyz1) }
// VPMULUDQ_Z: Multiply Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.Z m128 xmm k xmm
// VPMULUDQ.Z m256 ymm k ymm
// VPMULUDQ.Z xmm xmm k xmm
// VPMULUDQ.Z ymm ymm k ymm
// VPMULUDQ.Z m512 zmm k zmm
// VPMULUDQ.Z zmm zmm k zmm
//
// Construct and append a VPMULUDQ.Z instruction to the active function.
func (c *Context) VPMULUDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPMULUDQ_Z(mxyz, xyz, k, xyz1))
}
// VPMULUDQ_Z: Multiply Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.Z m128 xmm k xmm
// VPMULUDQ.Z m256 ymm k ymm
// VPMULUDQ.Z xmm xmm k xmm
// VPMULUDQ.Z ymm ymm k ymm
// VPMULUDQ.Z m512 zmm k zmm
// VPMULUDQ.Z zmm zmm k zmm
//
// Construct and append a VPMULUDQ.Z instruction to the active function.
// Operates on the global context.
func VPMULUDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULUDQ_Z(mxyz, xyz, k, xyz1) }
// VPOPCNTD: Packed Population Count for Doubleword Integers.
//
// Forms:
//
// VPOPCNTD m512 k zmm
// VPOPCNTD m512 zmm
// VPOPCNTD zmm k zmm
// VPOPCNTD zmm zmm
//
// Construct and append a VPOPCNTD instruction to the active function.
func (c *Context) VPOPCNTD(ops ...operand.Op) {
c.addinstruction(x86.VPOPCNTD(ops...))
}
// VPOPCNTD: Packed Population Count for Doubleword Integers.
//
// Forms:
//
// VPOPCNTD m512 k zmm
// VPOPCNTD m512 zmm
// VPOPCNTD zmm k zmm
// VPOPCNTD zmm zmm
//
// Construct and append a VPOPCNTD instruction to the active function.
// Operates on the global context.
func VPOPCNTD(ops ...operand.Op) { ctx.VPOPCNTD(ops...) }
// VPOPCNTD_BCST: Packed Population Count for Doubleword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTD.BCST m32 k zmm
// VPOPCNTD.BCST m32 zmm
//
// Construct and append a VPOPCNTD.BCST instruction to the active function.
func (c *Context) VPOPCNTD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPOPCNTD_BCST(ops...))
}
// VPOPCNTD_BCST: Packed Population Count for Doubleword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTD.BCST m32 k zmm
// VPOPCNTD.BCST m32 zmm
//
// Construct and append a VPOPCNTD.BCST instruction to the active function.
// Operates on the global context.
func VPOPCNTD_BCST(ops ...operand.Op) { ctx.VPOPCNTD_BCST(ops...) }
// VPOPCNTD_BCST_Z: Packed Population Count for Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.BCST.Z m32 k zmm
//
// Construct and append a VPOPCNTD.BCST.Z instruction to the active function.
func (c *Context) VPOPCNTD_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VPOPCNTD_BCST_Z(m, k, z))
}
// VPOPCNTD_BCST_Z: Packed Population Count for Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.BCST.Z m32 k zmm
//
// Construct and append a VPOPCNTD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPOPCNTD_BCST_Z(m, k, z operand.Op) { ctx.VPOPCNTD_BCST_Z(m, k, z) }
// VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.Z m512 k zmm
// VPOPCNTD.Z zmm k zmm
//
// Construct and append a VPOPCNTD.Z instruction to the active function.
func (c *Context) VPOPCNTD_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VPOPCNTD_Z(mz, k, z))
}
// VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.Z m512 k zmm
// VPOPCNTD.Z zmm k zmm
//
// Construct and append a VPOPCNTD.Z instruction to the active function.
// Operates on the global context.
func VPOPCNTD_Z(mz, k, z operand.Op) { ctx.VPOPCNTD_Z(mz, k, z) }
// VPOPCNTQ: Packed Population Count for Quadword Integers.
//
// Forms:
//
// VPOPCNTQ m512 k zmm
// VPOPCNTQ m512 zmm
// VPOPCNTQ zmm k zmm
// VPOPCNTQ zmm zmm
//
// Construct and append a VPOPCNTQ instruction to the active function.
func (c *Context) VPOPCNTQ(ops ...operand.Op) {
c.addinstruction(x86.VPOPCNTQ(ops...))
}
// VPOPCNTQ: Packed Population Count for Quadword Integers.
//
// Forms:
//
// VPOPCNTQ m512 k zmm
// VPOPCNTQ m512 zmm
// VPOPCNTQ zmm k zmm
// VPOPCNTQ zmm zmm
//
// Construct and append a VPOPCNTQ instruction to the active function.
// Operates on the global context.
func VPOPCNTQ(ops ...operand.Op) { ctx.VPOPCNTQ(ops...) }
// VPOPCNTQ_BCST: Packed Population Count for Quadword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTQ.BCST m64 k zmm
// VPOPCNTQ.BCST m64 zmm
//
// Construct and append a VPOPCNTQ.BCST instruction to the active function.
func (c *Context) VPOPCNTQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPOPCNTQ_BCST(ops...))
}
// VPOPCNTQ_BCST: Packed Population Count for Quadword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTQ.BCST m64 k zmm
// VPOPCNTQ.BCST m64 zmm
//
// Construct and append a VPOPCNTQ.BCST instruction to the active function.
// Operates on the global context.
func VPOPCNTQ_BCST(ops ...operand.Op) { ctx.VPOPCNTQ_BCST(ops...) }
// VPOPCNTQ_BCST_Z: Packed Population Count for Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.BCST.Z m64 k zmm
//
// Construct and append a VPOPCNTQ.BCST.Z instruction to the active function.
func (c *Context) VPOPCNTQ_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VPOPCNTQ_BCST_Z(m, k, z))
}
// VPOPCNTQ_BCST_Z: Packed Population Count for Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.BCST.Z m64 k zmm
//
// Construct and append a VPOPCNTQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPOPCNTQ_BCST_Z(m, k, z operand.Op) { ctx.VPOPCNTQ_BCST_Z(m, k, z) }
// VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.Z m512 k zmm
// VPOPCNTQ.Z zmm k zmm
//
// Construct and append a VPOPCNTQ.Z instruction to the active function.
func (c *Context) VPOPCNTQ_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VPOPCNTQ_Z(mz, k, z))
}
// VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.Z m512 k zmm
// VPOPCNTQ.Z zmm k zmm
//
// Construct and append a VPOPCNTQ.Z instruction to the active function.
// Operates on the global context.
func VPOPCNTQ_Z(mz, k, z operand.Op) { ctx.VPOPCNTQ_Z(mz, k, z) }
// VPOR: Packed Bitwise Logical OR.
//
// Forms:
//
// VPOR m256 ymm ymm
// VPOR ymm ymm ymm
// VPOR m128 xmm xmm
// VPOR xmm xmm xmm
//
// Construct and append a VPOR instruction to the active function.
func (c *Context) VPOR(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPOR(mxy, xy, xy1))
}
// VPOR: Packed Bitwise Logical OR.
//
// Forms:
//
// VPOR m256 ymm ymm
// VPOR ymm ymm ymm
// VPOR m128 xmm xmm
// VPOR xmm xmm xmm
//
// Construct and append a VPOR instruction to the active function.
// Operates on the global context.
func VPOR(mxy, xy, xy1 operand.Op) { ctx.VPOR(mxy, xy, xy1) }
// VPORD: Bitwise Logical OR of Packed Doubleword Integers.
//
// Forms:
//
// VPORD m128 xmm k xmm
// VPORD m128 xmm xmm
// VPORD m256 ymm k ymm
// VPORD m256 ymm ymm
// VPORD xmm xmm k xmm
// VPORD xmm xmm xmm
// VPORD ymm ymm k ymm
// VPORD ymm ymm ymm
// VPORD m512 zmm k zmm
// VPORD m512 zmm zmm
// VPORD zmm zmm k zmm
// VPORD zmm zmm zmm
//
// Construct and append a VPORD instruction to the active function.
func (c *Context) VPORD(ops ...operand.Op) {
c.addinstruction(x86.VPORD(ops...))
}
// VPORD: Bitwise Logical OR of Packed Doubleword Integers.
//
// Forms:
//
// VPORD m128 xmm k xmm
// VPORD m128 xmm xmm
// VPORD m256 ymm k ymm
// VPORD m256 ymm ymm
// VPORD xmm xmm k xmm
// VPORD xmm xmm xmm
// VPORD ymm ymm k ymm
// VPORD ymm ymm ymm
// VPORD m512 zmm k zmm
// VPORD m512 zmm zmm
// VPORD zmm zmm k zmm
// VPORD zmm zmm zmm
//
// Construct and append a VPORD instruction to the active function.
// Operates on the global context.
func VPORD(ops ...operand.Op) { ctx.VPORD(ops...) }
// VPORD_BCST: Bitwise Logical OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPORD.BCST m32 xmm k xmm
// VPORD.BCST m32 xmm xmm
// VPORD.BCST m32 ymm k ymm
// VPORD.BCST m32 ymm ymm
// VPORD.BCST m32 zmm k zmm
// VPORD.BCST m32 zmm zmm
//
// Construct and append a VPORD.BCST instruction to the active function.
func (c *Context) VPORD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPORD_BCST(ops...))
}
// VPORD_BCST: Bitwise Logical OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPORD.BCST m32 xmm k xmm
// VPORD.BCST m32 xmm xmm
// VPORD.BCST m32 ymm k ymm
// VPORD.BCST m32 ymm ymm
// VPORD.BCST m32 zmm k zmm
// VPORD.BCST m32 zmm zmm
//
// Construct and append a VPORD.BCST instruction to the active function.
// Operates on the global context.
func VPORD_BCST(ops ...operand.Op) { ctx.VPORD_BCST(ops...) }
// VPORD_BCST_Z: Bitwise Logical OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORD.BCST.Z m32 xmm k xmm
// VPORD.BCST.Z m32 ymm k ymm
// VPORD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPORD.BCST.Z instruction to the active function.
func (c *Context) VPORD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPORD_BCST_Z(m, xyz, k, xyz1))
}
// VPORD_BCST_Z: Bitwise Logical OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORD.BCST.Z m32 xmm k xmm
// VPORD.BCST.Z m32 ymm k ymm
// VPORD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPORD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPORD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPORD_BCST_Z(m, xyz, k, xyz1) }
// VPORD_Z: Bitwise Logical OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPORD.Z m128 xmm k xmm
// VPORD.Z m256 ymm k ymm
// VPORD.Z xmm xmm k xmm
// VPORD.Z ymm ymm k ymm
// VPORD.Z m512 zmm k zmm
// VPORD.Z zmm zmm k zmm
//
// Construct and append a VPORD.Z instruction to the active function.
func (c *Context) VPORD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPORD_Z(mxyz, xyz, k, xyz1))
}
// VPORD_Z: Bitwise Logical OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPORD.Z m128 xmm k xmm
// VPORD.Z m256 ymm k ymm
// VPORD.Z xmm xmm k xmm
// VPORD.Z ymm ymm k ymm
// VPORD.Z m512 zmm k zmm
// VPORD.Z zmm zmm k zmm
//
// Construct and append a VPORD.Z instruction to the active function.
// Operates on the global context.
func VPORD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPORD_Z(mxyz, xyz, k, xyz1) }
// VPORQ: Bitwise Logical OR of Packed Quadword Integers.
//
// Forms:
//
// VPORQ m128 xmm k xmm
// VPORQ m128 xmm xmm
// VPORQ m256 ymm k ymm
// VPORQ m256 ymm ymm
// VPORQ xmm xmm k xmm
// VPORQ xmm xmm xmm
// VPORQ ymm ymm k ymm
// VPORQ ymm ymm ymm
// VPORQ m512 zmm k zmm
// VPORQ m512 zmm zmm
// VPORQ zmm zmm k zmm
// VPORQ zmm zmm zmm
//
// Construct and append a VPORQ instruction to the active function.
func (c *Context) VPORQ(ops ...operand.Op) {
c.addinstruction(x86.VPORQ(ops...))
}
// VPORQ: Bitwise Logical OR of Packed Quadword Integers.
//
// Forms:
//
// VPORQ m128 xmm k xmm
// VPORQ m128 xmm xmm
// VPORQ m256 ymm k ymm
// VPORQ m256 ymm ymm
// VPORQ xmm xmm k xmm
// VPORQ xmm xmm xmm
// VPORQ ymm ymm k ymm
// VPORQ ymm ymm ymm
// VPORQ m512 zmm k zmm
// VPORQ m512 zmm zmm
// VPORQ zmm zmm k zmm
// VPORQ zmm zmm zmm
//
// Construct and append a VPORQ instruction to the active function.
// Operates on the global context.
func VPORQ(ops ...operand.Op) { ctx.VPORQ(ops...) }
// VPORQ_BCST: Bitwise Logical OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPORQ.BCST m64 xmm k xmm
// VPORQ.BCST m64 xmm xmm
// VPORQ.BCST m64 ymm k ymm
// VPORQ.BCST m64 ymm ymm
// VPORQ.BCST m64 zmm k zmm
// VPORQ.BCST m64 zmm zmm
//
// Construct and append a VPORQ.BCST instruction to the active function.
func (c *Context) VPORQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPORQ_BCST(ops...))
}
// VPORQ_BCST: Bitwise Logical OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPORQ.BCST m64 xmm k xmm
// VPORQ.BCST m64 xmm xmm
// VPORQ.BCST m64 ymm k ymm
// VPORQ.BCST m64 ymm ymm
// VPORQ.BCST m64 zmm k zmm
// VPORQ.BCST m64 zmm zmm
//
// Construct and append a VPORQ.BCST instruction to the active function.
// Operates on the global context.
func VPORQ_BCST(ops ...operand.Op) { ctx.VPORQ_BCST(ops...) }
// VPORQ_BCST_Z: Bitwise Logical OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORQ.BCST.Z m64 xmm k xmm
// VPORQ.BCST.Z m64 ymm k ymm
// VPORQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPORQ.BCST.Z instruction to the active function.
func (c *Context) VPORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPORQ_BCST_Z(m, xyz, k, xyz1))
}
// VPORQ_BCST_Z: Bitwise Logical OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORQ.BCST.Z m64 xmm k xmm
// VPORQ.BCST.Z m64 ymm k ymm
// VPORQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPORQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPORQ_BCST_Z(m, xyz, k, xyz1) }
// VPORQ_Z: Bitwise Logical OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPORQ.Z m128 xmm k xmm
// VPORQ.Z m256 ymm k ymm
// VPORQ.Z xmm xmm k xmm
// VPORQ.Z ymm ymm k ymm
// VPORQ.Z m512 zmm k zmm
// VPORQ.Z zmm zmm k zmm
//
// Construct and append a VPORQ.Z instruction to the active function.
func (c *Context) VPORQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPORQ_Z(mxyz, xyz, k, xyz1))
}
// VPORQ_Z: Bitwise Logical OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPORQ.Z m128 xmm k xmm
// VPORQ.Z m256 ymm k ymm
// VPORQ.Z xmm xmm k xmm
// VPORQ.Z ymm ymm k ymm
// VPORQ.Z m512 zmm k zmm
// VPORQ.Z zmm zmm k zmm
//
// Construct and append a VPORQ.Z instruction to the active function.
// Operates on the global context.
func VPORQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPORQ_Z(mxyz, xyz, k, xyz1) }
// VPROLD: Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLD imm8 m128 k xmm
// VPROLD imm8 m128 xmm
// VPROLD imm8 m256 k ymm
// VPROLD imm8 m256 ymm
// VPROLD imm8 xmm k xmm
// VPROLD imm8 xmm xmm
// VPROLD imm8 ymm k ymm
// VPROLD imm8 ymm ymm
// VPROLD imm8 m512 k zmm
// VPROLD imm8 m512 zmm
// VPROLD imm8 zmm k zmm
// VPROLD imm8 zmm zmm
//
// Construct and append a VPROLD instruction to the active function.
func (c *Context) VPROLD(ops ...operand.Op) {
c.addinstruction(x86.VPROLD(ops...))
}
// VPROLD: Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLD imm8 m128 k xmm
// VPROLD imm8 m128 xmm
// VPROLD imm8 m256 k ymm
// VPROLD imm8 m256 ymm
// VPROLD imm8 xmm k xmm
// VPROLD imm8 xmm xmm
// VPROLD imm8 ymm k ymm
// VPROLD imm8 ymm ymm
// VPROLD imm8 m512 k zmm
// VPROLD imm8 m512 zmm
// VPROLD imm8 zmm k zmm
// VPROLD imm8 zmm zmm
//
// Construct and append a VPROLD instruction to the active function.
// Operates on the global context.
func VPROLD(ops ...operand.Op) { ctx.VPROLD(ops...) }
// VPROLD_BCST: Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLD.BCST imm8 m32 k xmm
// VPROLD.BCST imm8 m32 k ymm
// VPROLD.BCST imm8 m32 xmm
// VPROLD.BCST imm8 m32 ymm
// VPROLD.BCST imm8 m32 k zmm
// VPROLD.BCST imm8 m32 zmm
//
// Construct and append a VPROLD.BCST instruction to the active function.
func (c *Context) VPROLD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPROLD_BCST(ops...))
}
// VPROLD_BCST: Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLD.BCST imm8 m32 k xmm
// VPROLD.BCST imm8 m32 k ymm
// VPROLD.BCST imm8 m32 xmm
// VPROLD.BCST imm8 m32 ymm
// VPROLD.BCST imm8 m32 k zmm
// VPROLD.BCST imm8 m32 zmm
//
// Construct and append a VPROLD.BCST instruction to the active function.
// Operates on the global context.
func VPROLD_BCST(ops ...operand.Op) { ctx.VPROLD_BCST(ops...) }
// VPROLD_BCST_Z: Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLD.BCST.Z imm8 m32 k xmm
// VPROLD.BCST.Z imm8 m32 k ymm
// VPROLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPROLD.BCST.Z instruction to the active function.
func (c *Context) VPROLD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPROLD_BCST_Z(i, m, k, xyz))
}
// VPROLD_BCST_Z: Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLD.BCST.Z imm8 m32 k xmm
// VPROLD.BCST.Z imm8 m32 k ymm
// VPROLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPROLD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPROLD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPROLD_BCST_Z(i, m, k, xyz) }
// VPROLD_Z: Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLD.Z imm8 m128 k xmm
// VPROLD.Z imm8 m256 k ymm
// VPROLD.Z imm8 xmm k xmm
// VPROLD.Z imm8 ymm k ymm
// VPROLD.Z imm8 m512 k zmm
// VPROLD.Z imm8 zmm k zmm
//
// Construct and append a VPROLD.Z instruction to the active function.
func (c *Context) VPROLD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPROLD_Z(i, mxyz, k, xyz))
}
// VPROLD_Z: Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLD.Z imm8 m128 k xmm
// VPROLD.Z imm8 m256 k ymm
// VPROLD.Z imm8 xmm k xmm
// VPROLD.Z imm8 ymm k ymm
// VPROLD.Z imm8 m512 k zmm
// VPROLD.Z imm8 zmm k zmm
//
// Construct and append a VPROLD.Z instruction to the active function.
// Operates on the global context.
func VPROLD_Z(i, mxyz, k, xyz operand.Op) { ctx.VPROLD_Z(i, mxyz, k, xyz) }
// VPROLQ: Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLQ imm8 m128 k xmm
// VPROLQ imm8 m128 xmm
// VPROLQ imm8 m256 k ymm
// VPROLQ imm8 m256 ymm
// VPROLQ imm8 xmm k xmm
// VPROLQ imm8 xmm xmm
// VPROLQ imm8 ymm k ymm
// VPROLQ imm8 ymm ymm
// VPROLQ imm8 m512 k zmm
// VPROLQ imm8 m512 zmm
// VPROLQ imm8 zmm k zmm
// VPROLQ imm8 zmm zmm
//
// Construct and append a VPROLQ instruction to the active function.
func (c *Context) VPROLQ(ops ...operand.Op) {
c.addinstruction(x86.VPROLQ(ops...))
}
// VPROLQ: Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLQ imm8 m128 k xmm
// VPROLQ imm8 m128 xmm
// VPROLQ imm8 m256 k ymm
// VPROLQ imm8 m256 ymm
// VPROLQ imm8 xmm k xmm
// VPROLQ imm8 xmm xmm
// VPROLQ imm8 ymm k ymm
// VPROLQ imm8 ymm ymm
// VPROLQ imm8 m512 k zmm
// VPROLQ imm8 m512 zmm
// VPROLQ imm8 zmm k zmm
// VPROLQ imm8 zmm zmm
//
// Construct and append a VPROLQ instruction to the active function.
// Operates on the global context.
func VPROLQ(ops ...operand.Op) { ctx.VPROLQ(ops...) }
// VPROLQ_BCST: Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLQ.BCST imm8 m64 k xmm
// VPROLQ.BCST imm8 m64 k ymm
// VPROLQ.BCST imm8 m64 xmm
// VPROLQ.BCST imm8 m64 ymm
// VPROLQ.BCST imm8 m64 k zmm
// VPROLQ.BCST imm8 m64 zmm
//
// Construct and append a VPROLQ.BCST instruction to the active function.
func (c *Context) VPROLQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPROLQ_BCST(ops...))
}
// VPROLQ_BCST: Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLQ.BCST imm8 m64 k xmm
// VPROLQ.BCST imm8 m64 k ymm
// VPROLQ.BCST imm8 m64 xmm
// VPROLQ.BCST imm8 m64 ymm
// VPROLQ.BCST imm8 m64 k zmm
// VPROLQ.BCST imm8 m64 zmm
//
// Construct and append a VPROLQ.BCST instruction to the active function.
// Operates on the global context.
func VPROLQ_BCST(ops ...operand.Op) { ctx.VPROLQ_BCST(ops...) }
// VPROLQ_BCST_Z: Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLQ.BCST.Z imm8 m64 k xmm
// VPROLQ.BCST.Z imm8 m64 k ymm
// VPROLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPROLQ.BCST.Z instruction to the active function.
func (c *Context) VPROLQ_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPROLQ_BCST_Z(i, m, k, xyz))
}
// VPROLQ_BCST_Z: Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLQ.BCST.Z imm8 m64 k xmm
// VPROLQ.BCST.Z imm8 m64 k ymm
// VPROLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPROLQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPROLQ_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPROLQ_BCST_Z(i, m, k, xyz) }
// VPROLQ_Z: Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLQ.Z imm8 m128 k xmm
// VPROLQ.Z imm8 m256 k ymm
// VPROLQ.Z imm8 xmm k xmm
// VPROLQ.Z imm8 ymm k ymm
// VPROLQ.Z imm8 m512 k zmm
// VPROLQ.Z imm8 zmm k zmm
//
// Construct and append a VPROLQ.Z instruction to the active function.
func (c *Context) VPROLQ_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPROLQ_Z(i, mxyz, k, xyz))
}
// VPROLQ_Z: Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLQ.Z imm8 m128 k xmm
// VPROLQ.Z imm8 m256 k ymm
// VPROLQ.Z imm8 xmm k xmm
// VPROLQ.Z imm8 ymm k ymm
// VPROLQ.Z imm8 m512 k zmm
// VPROLQ.Z imm8 zmm k zmm
//
// Construct and append a VPROLQ.Z instruction to the active function.
// Operates on the global context.
func VPROLQ_Z(i, mxyz, k, xyz operand.Op) { ctx.VPROLQ_Z(i, mxyz, k, xyz) }
// VPROLVD: Variable Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLVD m128 xmm k xmm
// VPROLVD m128 xmm xmm
// VPROLVD m256 ymm k ymm
// VPROLVD m256 ymm ymm
// VPROLVD xmm xmm k xmm
// VPROLVD xmm xmm xmm
// VPROLVD ymm ymm k ymm
// VPROLVD ymm ymm ymm
// VPROLVD m512 zmm k zmm
// VPROLVD m512 zmm zmm
// VPROLVD zmm zmm k zmm
// VPROLVD zmm zmm zmm
//
// Construct and append a VPROLVD instruction to the active function.
func (c *Context) VPROLVD(ops ...operand.Op) {
c.addinstruction(x86.VPROLVD(ops...))
}
// VPROLVD: Variable Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLVD m128 xmm k xmm
// VPROLVD m128 xmm xmm
// VPROLVD m256 ymm k ymm
// VPROLVD m256 ymm ymm
// VPROLVD xmm xmm k xmm
// VPROLVD xmm xmm xmm
// VPROLVD ymm ymm k ymm
// VPROLVD ymm ymm ymm
// VPROLVD m512 zmm k zmm
// VPROLVD m512 zmm zmm
// VPROLVD zmm zmm k zmm
// VPROLVD zmm zmm zmm
//
// Construct and append a VPROLVD instruction to the active function.
// Operates on the global context.
func VPROLVD(ops ...operand.Op) { ctx.VPROLVD(ops...) }
// VPROLVD_BCST: Variable Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLVD.BCST m32 xmm k xmm
// VPROLVD.BCST m32 xmm xmm
// VPROLVD.BCST m32 ymm k ymm
// VPROLVD.BCST m32 ymm ymm
// VPROLVD.BCST m32 zmm k zmm
// VPROLVD.BCST m32 zmm zmm
//
// Construct and append a VPROLVD.BCST instruction to the active function.
func (c *Context) VPROLVD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPROLVD_BCST(ops...))
}
// VPROLVD_BCST: Variable Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLVD.BCST m32 xmm k xmm
// VPROLVD.BCST m32 xmm xmm
// VPROLVD.BCST m32 ymm k ymm
// VPROLVD.BCST m32 ymm ymm
// VPROLVD.BCST m32 zmm k zmm
// VPROLVD.BCST m32 zmm zmm
//
// Construct and append a VPROLVD.BCST instruction to the active function.
// Operates on the global context.
func VPROLVD_BCST(ops ...operand.Op) { ctx.VPROLVD_BCST(ops...) }
// VPROLVD_BCST_Z: Variable Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVD.BCST.Z m32 xmm k xmm
// VPROLVD.BCST.Z m32 ymm k ymm
// VPROLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPROLVD.BCST.Z instruction to the active function.
func (c *Context) VPROLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPROLVD_BCST_Z(m, xyz, k, xyz1))
}
// VPROLVD_BCST_Z: Variable Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVD.BCST.Z m32 xmm k xmm
// VPROLVD.BCST.Z m32 ymm k ymm
// VPROLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPROLVD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPROLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPROLVD_BCST_Z(m, xyz, k, xyz1) }
// VPROLVD_Z: Variable Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVD.Z m128 xmm k xmm
// VPROLVD.Z m256 ymm k ymm
// VPROLVD.Z xmm xmm k xmm
// VPROLVD.Z ymm ymm k ymm
// VPROLVD.Z m512 zmm k zmm
// VPROLVD.Z zmm zmm k zmm
//
// Construct and append a VPROLVD.Z instruction to the active function.
func (c *Context) VPROLVD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPROLVD_Z(mxyz, xyz, k, xyz1))
}
// VPROLVD_Z: Variable Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVD.Z m128 xmm k xmm
// VPROLVD.Z m256 ymm k ymm
// VPROLVD.Z xmm xmm k xmm
// VPROLVD.Z ymm ymm k ymm
// VPROLVD.Z m512 zmm k zmm
// VPROLVD.Z zmm zmm k zmm
//
// Construct and append a VPROLVD.Z instruction to the active function.
// Operates on the global context.
func VPROLVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPROLVD_Z(mxyz, xyz, k, xyz1) }
// VPROLVQ: Variable Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLVQ m128 xmm k xmm
// VPROLVQ m128 xmm xmm
// VPROLVQ m256 ymm k ymm
// VPROLVQ m256 ymm ymm
// VPROLVQ xmm xmm k xmm
// VPROLVQ xmm xmm xmm
// VPROLVQ ymm ymm k ymm
// VPROLVQ ymm ymm ymm
// VPROLVQ m512 zmm k zmm
// VPROLVQ m512 zmm zmm
// VPROLVQ zmm zmm k zmm
// VPROLVQ zmm zmm zmm
//
// Construct and append a VPROLVQ instruction to the active function.
func (c *Context) VPROLVQ(ops ...operand.Op) {
c.addinstruction(x86.VPROLVQ(ops...))
}
// VPROLVQ: Variable Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLVQ m128 xmm k xmm
// VPROLVQ m128 xmm xmm
// VPROLVQ m256 ymm k ymm
// VPROLVQ m256 ymm ymm
// VPROLVQ xmm xmm k xmm
// VPROLVQ xmm xmm xmm
// VPROLVQ ymm ymm k ymm
// VPROLVQ ymm ymm ymm
// VPROLVQ m512 zmm k zmm
// VPROLVQ m512 zmm zmm
// VPROLVQ zmm zmm k zmm
// VPROLVQ zmm zmm zmm
//
// Construct and append a VPROLVQ instruction to the active function.
// Operates on the global context.
func VPROLVQ(ops ...operand.Op) { ctx.VPROLVQ(ops...) }
// VPROLVQ_BCST: Variable Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLVQ.BCST m64 xmm k xmm
// VPROLVQ.BCST m64 xmm xmm
// VPROLVQ.BCST m64 ymm k ymm
// VPROLVQ.BCST m64 ymm ymm
// VPROLVQ.BCST m64 zmm k zmm
// VPROLVQ.BCST m64 zmm zmm
//
// Construct and append a VPROLVQ.BCST instruction to the active function.
func (c *Context) VPROLVQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPROLVQ_BCST(ops...))
}
// VPROLVQ_BCST: Variable Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLVQ.BCST m64 xmm k xmm
// VPROLVQ.BCST m64 xmm xmm
// VPROLVQ.BCST m64 ymm k ymm
// VPROLVQ.BCST m64 ymm ymm
// VPROLVQ.BCST m64 zmm k zmm
// VPROLVQ.BCST m64 zmm zmm
//
// Construct and append a VPROLVQ.BCST instruction to the active function.
// Operates on the global context.
func VPROLVQ_BCST(ops ...operand.Op) { ctx.VPROLVQ_BCST(ops...) }
// VPROLVQ_BCST_Z: Variable Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVQ.BCST.Z m64 xmm k xmm
// VPROLVQ.BCST.Z m64 ymm k ymm
// VPROLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPROLVQ.BCST.Z instruction to the active function.
func (c *Context) VPROLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPROLVQ_BCST_Z(m, xyz, k, xyz1))
}
// VPROLVQ_BCST_Z: Variable Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVQ.BCST.Z m64 xmm k xmm
// VPROLVQ.BCST.Z m64 ymm k ymm
// VPROLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPROLVQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPROLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPROLVQ_BCST_Z(m, xyz, k, xyz1) }
// VPROLVQ_Z: Variable Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVQ.Z m128 xmm k xmm
// VPROLVQ.Z m256 ymm k ymm
// VPROLVQ.Z xmm xmm k xmm
// VPROLVQ.Z ymm ymm k ymm
// VPROLVQ.Z m512 zmm k zmm
// VPROLVQ.Z zmm zmm k zmm
//
// Construct and append a VPROLVQ.Z instruction to the active function.
func (c *Context) VPROLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPROLVQ_Z(mxyz, xyz, k, xyz1))
}
// VPROLVQ_Z: Variable Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVQ.Z m128 xmm k xmm
// VPROLVQ.Z m256 ymm k ymm
// VPROLVQ.Z xmm xmm k xmm
// VPROLVQ.Z ymm ymm k ymm
// VPROLVQ.Z m512 zmm k zmm
// VPROLVQ.Z zmm zmm k zmm
//
// Construct and append a VPROLVQ.Z instruction to the active function.
// Operates on the global context.
func VPROLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPROLVQ_Z(mxyz, xyz, k, xyz1) }
// VPRORD: Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORD imm8 m128 k xmm
// VPRORD imm8 m128 xmm
// VPRORD imm8 m256 k ymm
// VPRORD imm8 m256 ymm
// VPRORD imm8 xmm k xmm
// VPRORD imm8 xmm xmm
// VPRORD imm8 ymm k ymm
// VPRORD imm8 ymm ymm
// VPRORD imm8 m512 k zmm
// VPRORD imm8 m512 zmm
// VPRORD imm8 zmm k zmm
// VPRORD imm8 zmm zmm
//
// Construct and append a VPRORD instruction to the active function.
func (c *Context) VPRORD(ops ...operand.Op) {
c.addinstruction(x86.VPRORD(ops...))
}
// VPRORD: Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORD imm8 m128 k xmm
// VPRORD imm8 m128 xmm
// VPRORD imm8 m256 k ymm
// VPRORD imm8 m256 ymm
// VPRORD imm8 xmm k xmm
// VPRORD imm8 xmm xmm
// VPRORD imm8 ymm k ymm
// VPRORD imm8 ymm ymm
// VPRORD imm8 m512 k zmm
// VPRORD imm8 m512 zmm
// VPRORD imm8 zmm k zmm
// VPRORD imm8 zmm zmm
//
// Construct and append a VPRORD instruction to the active function.
// Operates on the global context.
func VPRORD(ops ...operand.Op) { ctx.VPRORD(ops...) }
// VPRORD_BCST: Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORD.BCST imm8 m32 k xmm
// VPRORD.BCST imm8 m32 k ymm
// VPRORD.BCST imm8 m32 xmm
// VPRORD.BCST imm8 m32 ymm
// VPRORD.BCST imm8 m32 k zmm
// VPRORD.BCST imm8 m32 zmm
//
// Construct and append a VPRORD.BCST instruction to the active function.
func (c *Context) VPRORD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPRORD_BCST(ops...))
}
// VPRORD_BCST: Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORD.BCST imm8 m32 k xmm
// VPRORD.BCST imm8 m32 k ymm
// VPRORD.BCST imm8 m32 xmm
// VPRORD.BCST imm8 m32 ymm
// VPRORD.BCST imm8 m32 k zmm
// VPRORD.BCST imm8 m32 zmm
//
// Construct and append a VPRORD.BCST instruction to the active function.
// Operates on the global context.
func VPRORD_BCST(ops ...operand.Op) { ctx.VPRORD_BCST(ops...) }
// VPRORD_BCST_Z: Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORD.BCST.Z imm8 m32 k xmm
// VPRORD.BCST.Z imm8 m32 k ymm
// VPRORD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPRORD.BCST.Z instruction to the active function.
func (c *Context) VPRORD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPRORD_BCST_Z(i, m, k, xyz))
}
// VPRORD_BCST_Z: Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORD.BCST.Z imm8 m32 k xmm
// VPRORD.BCST.Z imm8 m32 k ymm
// VPRORD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPRORD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPRORD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPRORD_BCST_Z(i, m, k, xyz) }
// VPRORD_Z: Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORD.Z imm8 m128 k xmm
// VPRORD.Z imm8 m256 k ymm
// VPRORD.Z imm8 xmm k xmm
// VPRORD.Z imm8 ymm k ymm
// VPRORD.Z imm8 m512 k zmm
// VPRORD.Z imm8 zmm k zmm
//
// Construct and append a VPRORD.Z instruction to the active function.
func (c *Context) VPRORD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPRORD_Z(i, mxyz, k, xyz))
}
// VPRORD_Z: Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORD.Z imm8 m128 k xmm
// VPRORD.Z imm8 m256 k ymm
// VPRORD.Z imm8 xmm k xmm
// VPRORD.Z imm8 ymm k ymm
// VPRORD.Z imm8 m512 k zmm
// VPRORD.Z imm8 zmm k zmm
//
// Construct and append a VPRORD.Z instruction to the active function.
// Operates on the global context.
func VPRORD_Z(i, mxyz, k, xyz operand.Op) { ctx.VPRORD_Z(i, mxyz, k, xyz) }
// VPRORQ: Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORQ imm8 m128 k xmm
// VPRORQ imm8 m128 xmm
// VPRORQ imm8 m256 k ymm
// VPRORQ imm8 m256 ymm
// VPRORQ imm8 xmm k xmm
// VPRORQ imm8 xmm xmm
// VPRORQ imm8 ymm k ymm
// VPRORQ imm8 ymm ymm
// VPRORQ imm8 m512 k zmm
// VPRORQ imm8 m512 zmm
// VPRORQ imm8 zmm k zmm
// VPRORQ imm8 zmm zmm
//
// Construct and append a VPRORQ instruction to the active function.
func (c *Context) VPRORQ(ops ...operand.Op) {
c.addinstruction(x86.VPRORQ(ops...))
}
// VPRORQ: Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORQ imm8 m128 k xmm
// VPRORQ imm8 m128 xmm
// VPRORQ imm8 m256 k ymm
// VPRORQ imm8 m256 ymm
// VPRORQ imm8 xmm k xmm
// VPRORQ imm8 xmm xmm
// VPRORQ imm8 ymm k ymm
// VPRORQ imm8 ymm ymm
// VPRORQ imm8 m512 k zmm
// VPRORQ imm8 m512 zmm
// VPRORQ imm8 zmm k zmm
// VPRORQ imm8 zmm zmm
//
// Construct and append a VPRORQ instruction to the active function.
// Operates on the global context.
func VPRORQ(ops ...operand.Op) { ctx.VPRORQ(ops...) }
// VPRORQ_BCST: Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORQ.BCST imm8 m64 k xmm
// VPRORQ.BCST imm8 m64 k ymm
// VPRORQ.BCST imm8 m64 xmm
// VPRORQ.BCST imm8 m64 ymm
// VPRORQ.BCST imm8 m64 k zmm
// VPRORQ.BCST imm8 m64 zmm
//
// Construct and append a VPRORQ.BCST instruction to the active function.
func (c *Context) VPRORQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPRORQ_BCST(ops...))
}
// VPRORQ_BCST: Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORQ.BCST imm8 m64 k xmm
// VPRORQ.BCST imm8 m64 k ymm
// VPRORQ.BCST imm8 m64 xmm
// VPRORQ.BCST imm8 m64 ymm
// VPRORQ.BCST imm8 m64 k zmm
// VPRORQ.BCST imm8 m64 zmm
//
// Construct and append a VPRORQ.BCST instruction to the active function.
// Operates on the global context.
func VPRORQ_BCST(ops ...operand.Op) { ctx.VPRORQ_BCST(ops...) }
// VPRORQ_BCST_Z: Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORQ.BCST.Z imm8 m64 k xmm
// VPRORQ.BCST.Z imm8 m64 k ymm
// VPRORQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPRORQ.BCST.Z instruction to the active function.
func (c *Context) VPRORQ_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPRORQ_BCST_Z(i, m, k, xyz))
}
// VPRORQ_BCST_Z: Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORQ.BCST.Z imm8 m64 k xmm
// VPRORQ.BCST.Z imm8 m64 k ymm
// VPRORQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPRORQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPRORQ_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPRORQ_BCST_Z(i, m, k, xyz) }
// VPRORQ_Z: Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORQ.Z imm8 m128 k xmm
// VPRORQ.Z imm8 m256 k ymm
// VPRORQ.Z imm8 xmm k xmm
// VPRORQ.Z imm8 ymm k ymm
// VPRORQ.Z imm8 m512 k zmm
// VPRORQ.Z imm8 zmm k zmm
//
// Construct and append a VPRORQ.Z instruction to the active function.
func (c *Context) VPRORQ_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPRORQ_Z(i, mxyz, k, xyz))
}
// VPRORQ_Z: Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORQ.Z imm8 m128 k xmm
// VPRORQ.Z imm8 m256 k ymm
// VPRORQ.Z imm8 xmm k xmm
// VPRORQ.Z imm8 ymm k ymm
// VPRORQ.Z imm8 m512 k zmm
// VPRORQ.Z imm8 zmm k zmm
//
// Construct and append a VPRORQ.Z instruction to the active function.
// Operates on the global context.
func VPRORQ_Z(i, mxyz, k, xyz operand.Op) { ctx.VPRORQ_Z(i, mxyz, k, xyz) }
// VPRORVD: Variable Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORVD m128 xmm k xmm
// VPRORVD m128 xmm xmm
// VPRORVD m256 ymm k ymm
// VPRORVD m256 ymm ymm
// VPRORVD xmm xmm k xmm
// VPRORVD xmm xmm xmm
// VPRORVD ymm ymm k ymm
// VPRORVD ymm ymm ymm
// VPRORVD m512 zmm k zmm
// VPRORVD m512 zmm zmm
// VPRORVD zmm zmm k zmm
// VPRORVD zmm zmm zmm
//
// Construct and append a VPRORVD instruction to the active function.
func (c *Context) VPRORVD(ops ...operand.Op) {
c.addinstruction(x86.VPRORVD(ops...))
}
// VPRORVD: Variable Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORVD m128 xmm k xmm
// VPRORVD m128 xmm xmm
// VPRORVD m256 ymm k ymm
// VPRORVD m256 ymm ymm
// VPRORVD xmm xmm k xmm
// VPRORVD xmm xmm xmm
// VPRORVD ymm ymm k ymm
// VPRORVD ymm ymm ymm
// VPRORVD m512 zmm k zmm
// VPRORVD m512 zmm zmm
// VPRORVD zmm zmm k zmm
// VPRORVD zmm zmm zmm
//
// Construct and append a VPRORVD instruction to the active function.
// Operates on the global context.
func VPRORVD(ops ...operand.Op) { ctx.VPRORVD(ops...) }
// VPRORVD_BCST: Variable Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORVD.BCST m32 xmm k xmm
// VPRORVD.BCST m32 xmm xmm
// VPRORVD.BCST m32 ymm k ymm
// VPRORVD.BCST m32 ymm ymm
// VPRORVD.BCST m32 zmm k zmm
// VPRORVD.BCST m32 zmm zmm
//
// Construct and append a VPRORVD.BCST instruction to the active function.
func (c *Context) VPRORVD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPRORVD_BCST(ops...))
}
// VPRORVD_BCST: Variable Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORVD.BCST m32 xmm k xmm
// VPRORVD.BCST m32 xmm xmm
// VPRORVD.BCST m32 ymm k ymm
// VPRORVD.BCST m32 ymm ymm
// VPRORVD.BCST m32 zmm k zmm
// VPRORVD.BCST m32 zmm zmm
//
// Construct and append a VPRORVD.BCST instruction to the active function.
// Operates on the global context.
func VPRORVD_BCST(ops ...operand.Op) { ctx.VPRORVD_BCST(ops...) }
// VPRORVD_BCST_Z: Variable Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVD.BCST.Z m32 xmm k xmm
// VPRORVD.BCST.Z m32 ymm k ymm
// VPRORVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPRORVD.BCST.Z instruction to the active function.
func (c *Context) VPRORVD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPRORVD_BCST_Z(m, xyz, k, xyz1))
}
// VPRORVD_BCST_Z: Variable Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVD.BCST.Z m32 xmm k xmm
// VPRORVD.BCST.Z m32 ymm k ymm
// VPRORVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPRORVD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPRORVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPRORVD_BCST_Z(m, xyz, k, xyz1) }
// VPRORVD_Z: Variable Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVD.Z m128 xmm k xmm
// VPRORVD.Z m256 ymm k ymm
// VPRORVD.Z xmm xmm k xmm
// VPRORVD.Z ymm ymm k ymm
// VPRORVD.Z m512 zmm k zmm
// VPRORVD.Z zmm zmm k zmm
//
// Construct and append a VPRORVD.Z instruction to the active function.
func (c *Context) VPRORVD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPRORVD_Z(mxyz, xyz, k, xyz1))
}
// VPRORVD_Z: Variable Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVD.Z m128 xmm k xmm
// VPRORVD.Z m256 ymm k ymm
// VPRORVD.Z xmm xmm k xmm
// VPRORVD.Z ymm ymm k ymm
// VPRORVD.Z m512 zmm k zmm
// VPRORVD.Z zmm zmm k zmm
//
// Construct and append a VPRORVD.Z instruction to the active function.
// Operates on the global context.
func VPRORVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPRORVD_Z(mxyz, xyz, k, xyz1) }
// VPRORVQ: Variable Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORVQ m128 xmm k xmm
// VPRORVQ m128 xmm xmm
// VPRORVQ m256 ymm k ymm
// VPRORVQ m256 ymm ymm
// VPRORVQ xmm xmm k xmm
// VPRORVQ xmm xmm xmm
// VPRORVQ ymm ymm k ymm
// VPRORVQ ymm ymm ymm
// VPRORVQ m512 zmm k zmm
// VPRORVQ m512 zmm zmm
// VPRORVQ zmm zmm k zmm
// VPRORVQ zmm zmm zmm
//
// Construct and append a VPRORVQ instruction to the active function.
func (c *Context) VPRORVQ(ops ...operand.Op) {
c.addinstruction(x86.VPRORVQ(ops...))
}
// VPRORVQ: Variable Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORVQ m128 xmm k xmm
// VPRORVQ m128 xmm xmm
// VPRORVQ m256 ymm k ymm
// VPRORVQ m256 ymm ymm
// VPRORVQ xmm xmm k xmm
// VPRORVQ xmm xmm xmm
// VPRORVQ ymm ymm k ymm
// VPRORVQ ymm ymm ymm
// VPRORVQ m512 zmm k zmm
// VPRORVQ m512 zmm zmm
// VPRORVQ zmm zmm k zmm
// VPRORVQ zmm zmm zmm
//
// Construct and append a VPRORVQ instruction to the active function.
// Operates on the global context.
func VPRORVQ(ops ...operand.Op) { ctx.VPRORVQ(ops...) }
// VPRORVQ_BCST: Variable Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORVQ.BCST m64 xmm k xmm
// VPRORVQ.BCST m64 xmm xmm
// VPRORVQ.BCST m64 ymm k ymm
// VPRORVQ.BCST m64 ymm ymm
// VPRORVQ.BCST m64 zmm k zmm
// VPRORVQ.BCST m64 zmm zmm
//
// Construct and append a VPRORVQ.BCST instruction to the active function.
func (c *Context) VPRORVQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPRORVQ_BCST(ops...))
}
// VPRORVQ_BCST: Variable Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORVQ.BCST m64 xmm k xmm
// VPRORVQ.BCST m64 xmm xmm
// VPRORVQ.BCST m64 ymm k ymm
// VPRORVQ.BCST m64 ymm ymm
// VPRORVQ.BCST m64 zmm k zmm
// VPRORVQ.BCST m64 zmm zmm
//
// Construct and append a VPRORVQ.BCST instruction to the active function.
// Operates on the global context.
func VPRORVQ_BCST(ops ...operand.Op) { ctx.VPRORVQ_BCST(ops...) }
// VPRORVQ_BCST_Z: Variable Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVQ.BCST.Z m64 xmm k xmm
// VPRORVQ.BCST.Z m64 ymm k ymm
// VPRORVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPRORVQ.BCST.Z instruction to the active function.
func (c *Context) VPRORVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPRORVQ_BCST_Z(m, xyz, k, xyz1))
}
// VPRORVQ_BCST_Z: Variable Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVQ.BCST.Z m64 xmm k xmm
// VPRORVQ.BCST.Z m64 ymm k ymm
// VPRORVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPRORVQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPRORVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPRORVQ_BCST_Z(m, xyz, k, xyz1) }
// VPRORVQ_Z: Variable Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVQ.Z m128 xmm k xmm
// VPRORVQ.Z m256 ymm k ymm
// VPRORVQ.Z xmm xmm k xmm
// VPRORVQ.Z ymm ymm k ymm
// VPRORVQ.Z m512 zmm k zmm
// VPRORVQ.Z zmm zmm k zmm
//
// Construct and append a VPRORVQ.Z instruction to the active function.
func (c *Context) VPRORVQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPRORVQ_Z(mxyz, xyz, k, xyz1))
}
// VPRORVQ_Z: Variable Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVQ.Z m128 xmm k xmm
// VPRORVQ.Z m256 ymm k ymm
// VPRORVQ.Z xmm xmm k xmm
// VPRORVQ.Z ymm ymm k ymm
// VPRORVQ.Z m512 zmm k zmm
// VPRORVQ.Z zmm zmm k zmm
//
// Construct and append a VPRORVQ.Z instruction to the active function.
// Operates on the global context.
func VPRORVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPRORVQ_Z(mxyz, xyz, k, xyz1) }
// VPSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// VPSADBW m256 ymm ymm
// VPSADBW ymm ymm ymm
// VPSADBW m128 xmm xmm
// VPSADBW xmm xmm xmm
// VPSADBW m512 zmm zmm
// VPSADBW zmm zmm zmm
//
// Construct and append a VPSADBW instruction to the active function.
func (c *Context) VPSADBW(mxyz, xyz, xyz1 operand.Op) {
c.addinstruction(x86.VPSADBW(mxyz, xyz, xyz1))
}
// VPSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// VPSADBW m256 ymm ymm
// VPSADBW ymm ymm ymm
// VPSADBW m128 xmm xmm
// VPSADBW xmm xmm xmm
// VPSADBW m512 zmm zmm
// VPSADBW zmm zmm zmm
//
// Construct and append a VPSADBW instruction to the active function.
// Operates on the global context.
func VPSADBW(mxyz, xyz, xyz1 operand.Op) { ctx.VPSADBW(mxyz, xyz, xyz1) }
// VPSCATTERDD: Scatter Packed Doubleword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDD xmm k vm32x
// VPSCATTERDD ymm k vm32y
// VPSCATTERDD zmm k vm32z
//
// Construct and append a VPSCATTERDD instruction to the active function.
func (c *Context) VPSCATTERDD(xyz, k, v operand.Op) {
c.addinstruction(x86.VPSCATTERDD(xyz, k, v))
}
// VPSCATTERDD: Scatter Packed Doubleword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDD xmm k vm32x
// VPSCATTERDD ymm k vm32y
// VPSCATTERDD zmm k vm32z
//
// Construct and append a VPSCATTERDD instruction to the active function.
// Operates on the global context.
func VPSCATTERDD(xyz, k, v operand.Op) { ctx.VPSCATTERDD(xyz, k, v) }
// VPSCATTERDQ: Scatter Packed Quadword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDQ xmm k vm32x
// VPSCATTERDQ ymm k vm32x
// VPSCATTERDQ zmm k vm32y
//
// Construct and append a VPSCATTERDQ instruction to the active function.
func (c *Context) VPSCATTERDQ(xyz, k, v operand.Op) {
c.addinstruction(x86.VPSCATTERDQ(xyz, k, v))
}
// VPSCATTERDQ: Scatter Packed Quadword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDQ xmm k vm32x
// VPSCATTERDQ ymm k vm32x
// VPSCATTERDQ zmm k vm32y
//
// Construct and append a VPSCATTERDQ instruction to the active function.
// Operates on the global context.
func VPSCATTERDQ(xyz, k, v operand.Op) { ctx.VPSCATTERDQ(xyz, k, v) }
// VPSCATTERQD: Scatter Packed Doubleword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQD xmm k vm64x
// VPSCATTERQD xmm k vm64y
// VPSCATTERQD ymm k vm64z
//
// Construct and append a VPSCATTERQD instruction to the active function.
func (c *Context) VPSCATTERQD(xy, k, v operand.Op) {
c.addinstruction(x86.VPSCATTERQD(xy, k, v))
}
// VPSCATTERQD: Scatter Packed Doubleword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQD xmm k vm64x
// VPSCATTERQD xmm k vm64y
// VPSCATTERQD ymm k vm64z
//
// Construct and append a VPSCATTERQD instruction to the active function.
// Operates on the global context.
func VPSCATTERQD(xy, k, v operand.Op) { ctx.VPSCATTERQD(xy, k, v) }
// VPSCATTERQQ: Scatter Packed Quadword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQQ xmm k vm64x
// VPSCATTERQQ ymm k vm64y
// VPSCATTERQQ zmm k vm64z
//
// Construct and append a VPSCATTERQQ instruction to the active function.
func (c *Context) VPSCATTERQQ(xyz, k, v operand.Op) {
c.addinstruction(x86.VPSCATTERQQ(xyz, k, v))
}
// VPSCATTERQQ: Scatter Packed Quadword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQQ xmm k vm64x
// VPSCATTERQQ ymm k vm64y
// VPSCATTERQQ zmm k vm64z
//
// Construct and append a VPSCATTERQQ instruction to the active function.
// Operates on the global context.
func VPSCATTERQQ(xyz, k, v operand.Op) { ctx.VPSCATTERQQ(xyz, k, v) }
// VPSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// VPSHUFB m256 ymm ymm
// VPSHUFB ymm ymm ymm
// VPSHUFB m128 xmm xmm
// VPSHUFB xmm xmm xmm
// VPSHUFB m128 xmm k xmm
// VPSHUFB m256 ymm k ymm
// VPSHUFB xmm xmm k xmm
// VPSHUFB ymm ymm k ymm
// VPSHUFB m512 zmm k zmm
// VPSHUFB m512 zmm zmm
// VPSHUFB zmm zmm k zmm
// VPSHUFB zmm zmm zmm
//
// Construct and append a VPSHUFB instruction to the active function.
func (c *Context) VPSHUFB(ops ...operand.Op) {
c.addinstruction(x86.VPSHUFB(ops...))
}
// VPSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// VPSHUFB m256 ymm ymm
// VPSHUFB ymm ymm ymm
// VPSHUFB m128 xmm xmm
// VPSHUFB xmm xmm xmm
// VPSHUFB m128 xmm k xmm
// VPSHUFB m256 ymm k ymm
// VPSHUFB xmm xmm k xmm
// VPSHUFB ymm ymm k ymm
// VPSHUFB m512 zmm k zmm
// VPSHUFB m512 zmm zmm
// VPSHUFB zmm zmm k zmm
// VPSHUFB zmm zmm zmm
//
// Construct and append a VPSHUFB instruction to the active function.
// Operates on the global context.
func VPSHUFB(ops ...operand.Op) { ctx.VPSHUFB(ops...) }
// VPSHUFB_Z: Packed Shuffle Bytes (Zeroing Masking).
//
// Forms:
//
// VPSHUFB.Z m128 xmm k xmm
// VPSHUFB.Z m256 ymm k ymm
// VPSHUFB.Z xmm xmm k xmm
// VPSHUFB.Z ymm ymm k ymm
// VPSHUFB.Z m512 zmm k zmm
// VPSHUFB.Z zmm zmm k zmm
//
// Construct and append a VPSHUFB.Z instruction to the active function.
func (c *Context) VPSHUFB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSHUFB_Z(mxyz, xyz, k, xyz1))
}
// VPSHUFB_Z: Packed Shuffle Bytes (Zeroing Masking).
//
// Forms:
//
// VPSHUFB.Z m128 xmm k xmm
// VPSHUFB.Z m256 ymm k ymm
// VPSHUFB.Z xmm xmm k xmm
// VPSHUFB.Z ymm ymm k ymm
// VPSHUFB.Z m512 zmm k zmm
// VPSHUFB.Z zmm zmm k zmm
//
// Construct and append a VPSHUFB.Z instruction to the active function.
// Operates on the global context.
func VPSHUFB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHUFB_Z(mxyz, xyz, k, xyz1) }
// VPSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// VPSHUFD imm8 m256 ymm
// VPSHUFD imm8 ymm ymm
// VPSHUFD imm8 m128 xmm
// VPSHUFD imm8 xmm xmm
// VPSHUFD imm8 m128 k xmm
// VPSHUFD imm8 m256 k ymm
// VPSHUFD imm8 xmm k xmm
// VPSHUFD imm8 ymm k ymm
// VPSHUFD imm8 m512 k zmm
// VPSHUFD imm8 m512 zmm
// VPSHUFD imm8 zmm k zmm
// VPSHUFD imm8 zmm zmm
//
// Construct and append a VPSHUFD instruction to the active function.
func (c *Context) VPSHUFD(ops ...operand.Op) {
c.addinstruction(x86.VPSHUFD(ops...))
}
// VPSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// VPSHUFD imm8 m256 ymm
// VPSHUFD imm8 ymm ymm
// VPSHUFD imm8 m128 xmm
// VPSHUFD imm8 xmm xmm
// VPSHUFD imm8 m128 k xmm
// VPSHUFD imm8 m256 k ymm
// VPSHUFD imm8 xmm k xmm
// VPSHUFD imm8 ymm k ymm
// VPSHUFD imm8 m512 k zmm
// VPSHUFD imm8 m512 zmm
// VPSHUFD imm8 zmm k zmm
// VPSHUFD imm8 zmm zmm
//
// Construct and append a VPSHUFD instruction to the active function.
// Operates on the global context.
func VPSHUFD(ops ...operand.Op) { ctx.VPSHUFD(ops...) }
// VPSHUFD_BCST: Shuffle Packed Doublewords (Broadcast).
//
// Forms:
//
// VPSHUFD.BCST imm8 m32 k xmm
// VPSHUFD.BCST imm8 m32 k ymm
// VPSHUFD.BCST imm8 m32 xmm
// VPSHUFD.BCST imm8 m32 ymm
// VPSHUFD.BCST imm8 m32 k zmm
// VPSHUFD.BCST imm8 m32 zmm
//
// Construct and append a VPSHUFD.BCST instruction to the active function.
func (c *Context) VPSHUFD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSHUFD_BCST(ops...))
}
// VPSHUFD_BCST: Shuffle Packed Doublewords (Broadcast).
//
// Forms:
//
// VPSHUFD.BCST imm8 m32 k xmm
// VPSHUFD.BCST imm8 m32 k ymm
// VPSHUFD.BCST imm8 m32 xmm
// VPSHUFD.BCST imm8 m32 ymm
// VPSHUFD.BCST imm8 m32 k zmm
// VPSHUFD.BCST imm8 m32 zmm
//
// Construct and append a VPSHUFD.BCST instruction to the active function.
// Operates on the global context.
func VPSHUFD_BCST(ops ...operand.Op) { ctx.VPSHUFD_BCST(ops...) }
// VPSHUFD_BCST_Z: Shuffle Packed Doublewords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSHUFD.BCST.Z imm8 m32 k xmm
// VPSHUFD.BCST.Z imm8 m32 k ymm
// VPSHUFD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSHUFD.BCST.Z instruction to the active function.
func (c *Context) VPSHUFD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSHUFD_BCST_Z(i, m, k, xyz))
}
// VPSHUFD_BCST_Z: Shuffle Packed Doublewords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSHUFD.BCST.Z imm8 m32 k xmm
// VPSHUFD.BCST.Z imm8 m32 k ymm
// VPSHUFD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSHUFD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSHUFD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSHUFD_BCST_Z(i, m, k, xyz) }
// VPSHUFD_Z: Shuffle Packed Doublewords (Zeroing Masking).
//
// Forms:
//
// VPSHUFD.Z imm8 m128 k xmm
// VPSHUFD.Z imm8 m256 k ymm
// VPSHUFD.Z imm8 xmm k xmm
// VPSHUFD.Z imm8 ymm k ymm
// VPSHUFD.Z imm8 m512 k zmm
// VPSHUFD.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFD.Z instruction to the active function.
func (c *Context) VPSHUFD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSHUFD_Z(i, mxyz, k, xyz))
}
// VPSHUFD_Z: Shuffle Packed Doublewords (Zeroing Masking).
//
// Forms:
//
// VPSHUFD.Z imm8 m128 k xmm
// VPSHUFD.Z imm8 m256 k ymm
// VPSHUFD.Z imm8 xmm k xmm
// VPSHUFD.Z imm8 ymm k ymm
// VPSHUFD.Z imm8 m512 k zmm
// VPSHUFD.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFD.Z instruction to the active function.
// Operates on the global context.
func VPSHUFD_Z(i, mxyz, k, xyz operand.Op) { ctx.VPSHUFD_Z(i, mxyz, k, xyz) }
// VPSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// VPSHUFHW imm8 m256 ymm
// VPSHUFHW imm8 ymm ymm
// VPSHUFHW imm8 m128 xmm
// VPSHUFHW imm8 xmm xmm
// VPSHUFHW imm8 m128 k xmm
// VPSHUFHW imm8 m256 k ymm
// VPSHUFHW imm8 xmm k xmm
// VPSHUFHW imm8 ymm k ymm
// VPSHUFHW imm8 m512 k zmm
// VPSHUFHW imm8 m512 zmm
// VPSHUFHW imm8 zmm k zmm
// VPSHUFHW imm8 zmm zmm
//
// Construct and append a VPSHUFHW instruction to the active function.
func (c *Context) VPSHUFHW(ops ...operand.Op) {
c.addinstruction(x86.VPSHUFHW(ops...))
}
// VPSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// VPSHUFHW imm8 m256 ymm
// VPSHUFHW imm8 ymm ymm
// VPSHUFHW imm8 m128 xmm
// VPSHUFHW imm8 xmm xmm
// VPSHUFHW imm8 m128 k xmm
// VPSHUFHW imm8 m256 k ymm
// VPSHUFHW imm8 xmm k xmm
// VPSHUFHW imm8 ymm k ymm
// VPSHUFHW imm8 m512 k zmm
// VPSHUFHW imm8 m512 zmm
// VPSHUFHW imm8 zmm k zmm
// VPSHUFHW imm8 zmm zmm
//
// Construct and append a VPSHUFHW instruction to the active function.
// Operates on the global context.
func VPSHUFHW(ops ...operand.Op) { ctx.VPSHUFHW(ops...) }
// VPSHUFHW_Z: Shuffle Packed High Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFHW.Z imm8 m128 k xmm
// VPSHUFHW.Z imm8 m256 k ymm
// VPSHUFHW.Z imm8 xmm k xmm
// VPSHUFHW.Z imm8 ymm k ymm
// VPSHUFHW.Z imm8 m512 k zmm
// VPSHUFHW.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFHW.Z instruction to the active function.
func (c *Context) VPSHUFHW_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSHUFHW_Z(i, mxyz, k, xyz))
}
// VPSHUFHW_Z: Shuffle Packed High Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFHW.Z imm8 m128 k xmm
// VPSHUFHW.Z imm8 m256 k ymm
// VPSHUFHW.Z imm8 xmm k xmm
// VPSHUFHW.Z imm8 ymm k ymm
// VPSHUFHW.Z imm8 m512 k zmm
// VPSHUFHW.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFHW.Z instruction to the active function.
// Operates on the global context.
func VPSHUFHW_Z(i, mxyz, k, xyz operand.Op) { ctx.VPSHUFHW_Z(i, mxyz, k, xyz) }
// VPSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// VPSHUFLW imm8 m256 ymm
// VPSHUFLW imm8 ymm ymm
// VPSHUFLW imm8 m128 xmm
// VPSHUFLW imm8 xmm xmm
// VPSHUFLW imm8 m128 k xmm
// VPSHUFLW imm8 m256 k ymm
// VPSHUFLW imm8 xmm k xmm
// VPSHUFLW imm8 ymm k ymm
// VPSHUFLW imm8 m512 k zmm
// VPSHUFLW imm8 m512 zmm
// VPSHUFLW imm8 zmm k zmm
// VPSHUFLW imm8 zmm zmm
//
// Construct and append a VPSHUFLW instruction to the active function.
func (c *Context) VPSHUFLW(ops ...operand.Op) {
c.addinstruction(x86.VPSHUFLW(ops...))
}
// VPSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// VPSHUFLW imm8 m256 ymm
// VPSHUFLW imm8 ymm ymm
// VPSHUFLW imm8 m128 xmm
// VPSHUFLW imm8 xmm xmm
// VPSHUFLW imm8 m128 k xmm
// VPSHUFLW imm8 m256 k ymm
// VPSHUFLW imm8 xmm k xmm
// VPSHUFLW imm8 ymm k ymm
// VPSHUFLW imm8 m512 k zmm
// VPSHUFLW imm8 m512 zmm
// VPSHUFLW imm8 zmm k zmm
// VPSHUFLW imm8 zmm zmm
//
// Construct and append a VPSHUFLW instruction to the active function.
// Operates on the global context.
func VPSHUFLW(ops ...operand.Op) { ctx.VPSHUFLW(ops...) }
// VPSHUFLW_Z: Shuffle Packed Low Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFLW.Z imm8 m128 k xmm
// VPSHUFLW.Z imm8 m256 k ymm
// VPSHUFLW.Z imm8 xmm k xmm
// VPSHUFLW.Z imm8 ymm k ymm
// VPSHUFLW.Z imm8 m512 k zmm
// VPSHUFLW.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFLW.Z instruction to the active function.
func (c *Context) VPSHUFLW_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSHUFLW_Z(i, mxyz, k, xyz))
}
// VPSHUFLW_Z: Shuffle Packed Low Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFLW.Z imm8 m128 k xmm
// VPSHUFLW.Z imm8 m256 k ymm
// VPSHUFLW.Z imm8 xmm k xmm
// VPSHUFLW.Z imm8 ymm k ymm
// VPSHUFLW.Z imm8 m512 k zmm
// VPSHUFLW.Z imm8 zmm k zmm
//
// Construct and append a VPSHUFLW.Z instruction to the active function.
// Operates on the global context.
func VPSHUFLW_Z(i, mxyz, k, xyz operand.Op) { ctx.VPSHUFLW_Z(i, mxyz, k, xyz) }
// VPSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// VPSIGNB m256 ymm ymm
// VPSIGNB ymm ymm ymm
// VPSIGNB m128 xmm xmm
// VPSIGNB xmm xmm xmm
//
// Construct and append a VPSIGNB instruction to the active function.
func (c *Context) VPSIGNB(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPSIGNB(mxy, xy, xy1))
}
// VPSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// VPSIGNB m256 ymm ymm
// VPSIGNB ymm ymm ymm
// VPSIGNB m128 xmm xmm
// VPSIGNB xmm xmm xmm
//
// Construct and append a VPSIGNB instruction to the active function.
// Operates on the global context.
func VPSIGNB(mxy, xy, xy1 operand.Op) { ctx.VPSIGNB(mxy, xy, xy1) }
// VPSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// VPSIGND m256 ymm ymm
// VPSIGND ymm ymm ymm
// VPSIGND m128 xmm xmm
// VPSIGND xmm xmm xmm
//
// Construct and append a VPSIGND instruction to the active function.
func (c *Context) VPSIGND(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPSIGND(mxy, xy, xy1))
}
// VPSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// VPSIGND m256 ymm ymm
// VPSIGND ymm ymm ymm
// VPSIGND m128 xmm xmm
// VPSIGND xmm xmm xmm
//
// Construct and append a VPSIGND instruction to the active function.
// Operates on the global context.
func VPSIGND(mxy, xy, xy1 operand.Op) { ctx.VPSIGND(mxy, xy, xy1) }
// VPSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// VPSIGNW m256 ymm ymm
// VPSIGNW ymm ymm ymm
// VPSIGNW m128 xmm xmm
// VPSIGNW xmm xmm xmm
//
// Construct and append a VPSIGNW instruction to the active function.
func (c *Context) VPSIGNW(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPSIGNW(mxy, xy, xy1))
}
// VPSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// VPSIGNW m256 ymm ymm
// VPSIGNW ymm ymm ymm
// VPSIGNW m128 xmm xmm
// VPSIGNW xmm xmm xmm
//
// Construct and append a VPSIGNW instruction to the active function.
// Operates on the global context.
func VPSIGNW(mxy, xy, xy1 operand.Op) { ctx.VPSIGNW(mxy, xy, xy1) }
// VPSLLD: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLD imm8 ymm ymm
// VPSLLD m128 ymm ymm
// VPSLLD xmm ymm ymm
// VPSLLD imm8 xmm xmm
// VPSLLD m128 xmm xmm
// VPSLLD xmm xmm xmm
// VPSLLD imm8 m128 k xmm
// VPSLLD imm8 m128 xmm
// VPSLLD imm8 m256 k ymm
// VPSLLD imm8 m256 ymm
// VPSLLD imm8 xmm k xmm
// VPSLLD imm8 ymm k ymm
// VPSLLD m128 xmm k xmm
// VPSLLD m128 ymm k ymm
// VPSLLD xmm xmm k xmm
// VPSLLD xmm ymm k ymm
// VPSLLD imm8 m512 k zmm
// VPSLLD imm8 m512 zmm
// VPSLLD imm8 zmm k zmm
// VPSLLD imm8 zmm zmm
// VPSLLD m128 zmm k zmm
// VPSLLD m128 zmm zmm
// VPSLLD xmm zmm k zmm
// VPSLLD xmm zmm zmm
//
// Construct and append a VPSLLD instruction to the active function.
func (c *Context) VPSLLD(ops ...operand.Op) {
c.addinstruction(x86.VPSLLD(ops...))
}
// VPSLLD: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLD imm8 ymm ymm
// VPSLLD m128 ymm ymm
// VPSLLD xmm ymm ymm
// VPSLLD imm8 xmm xmm
// VPSLLD m128 xmm xmm
// VPSLLD xmm xmm xmm
// VPSLLD imm8 m128 k xmm
// VPSLLD imm8 m128 xmm
// VPSLLD imm8 m256 k ymm
// VPSLLD imm8 m256 ymm
// VPSLLD imm8 xmm k xmm
// VPSLLD imm8 ymm k ymm
// VPSLLD m128 xmm k xmm
// VPSLLD m128 ymm k ymm
// VPSLLD xmm xmm k xmm
// VPSLLD xmm ymm k ymm
// VPSLLD imm8 m512 k zmm
// VPSLLD imm8 m512 zmm
// VPSLLD imm8 zmm k zmm
// VPSLLD imm8 zmm zmm
// VPSLLD m128 zmm k zmm
// VPSLLD m128 zmm zmm
// VPSLLD xmm zmm k zmm
// VPSLLD xmm zmm zmm
//
// Construct and append a VPSLLD instruction to the active function.
// Operates on the global context.
func VPSLLD(ops ...operand.Op) { ctx.VPSLLD(ops...) }
// VPSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// VPSLLDQ imm8 ymm ymm
// VPSLLDQ imm8 xmm xmm
// VPSLLDQ imm8 m128 xmm
// VPSLLDQ imm8 m256 ymm
// VPSLLDQ imm8 m512 zmm
// VPSLLDQ imm8 zmm zmm
//
// Construct and append a VPSLLDQ instruction to the active function.
func (c *Context) VPSLLDQ(i, mxyz, xyz operand.Op) {
c.addinstruction(x86.VPSLLDQ(i, mxyz, xyz))
}
// VPSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// VPSLLDQ imm8 ymm ymm
// VPSLLDQ imm8 xmm xmm
// VPSLLDQ imm8 m128 xmm
// VPSLLDQ imm8 m256 ymm
// VPSLLDQ imm8 m512 zmm
// VPSLLDQ imm8 zmm zmm
//
// Construct and append a VPSLLDQ instruction to the active function.
// Operates on the global context.
func VPSLLDQ(i, mxyz, xyz operand.Op) { ctx.VPSLLDQ(i, mxyz, xyz) }
// VPSLLD_BCST: Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLD.BCST imm8 m32 k xmm
// VPSLLD.BCST imm8 m32 k ymm
// VPSLLD.BCST imm8 m32 xmm
// VPSLLD.BCST imm8 m32 ymm
// VPSLLD.BCST imm8 m32 k zmm
// VPSLLD.BCST imm8 m32 zmm
//
// Construct and append a VPSLLD.BCST instruction to the active function.
func (c *Context) VPSLLD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSLLD_BCST(ops...))
}
// VPSLLD_BCST: Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLD.BCST imm8 m32 k xmm
// VPSLLD.BCST imm8 m32 k ymm
// VPSLLD.BCST imm8 m32 xmm
// VPSLLD.BCST imm8 m32 ymm
// VPSLLD.BCST imm8 m32 k zmm
// VPSLLD.BCST imm8 m32 zmm
//
// Construct and append a VPSLLD.BCST instruction to the active function.
// Operates on the global context.
func VPSLLD_BCST(ops ...operand.Op) { ctx.VPSLLD_BCST(ops...) }
// VPSLLD_BCST_Z: Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLD.BCST.Z imm8 m32 k xmm
// VPSLLD.BCST.Z imm8 m32 k ymm
// VPSLLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSLLD.BCST.Z instruction to the active function.
func (c *Context) VPSLLD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSLLD_BCST_Z(i, m, k, xyz))
}
// VPSLLD_BCST_Z: Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLD.BCST.Z imm8 m32 k xmm
// VPSLLD.BCST.Z imm8 m32 k ymm
// VPSLLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSLLD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSLLD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSLLD_BCST_Z(i, m, k, xyz) }
// VPSLLD_Z: Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLD.Z imm8 m128 k xmm
// VPSLLD.Z imm8 m256 k ymm
// VPSLLD.Z imm8 xmm k xmm
// VPSLLD.Z imm8 ymm k ymm
// VPSLLD.Z m128 xmm k xmm
// VPSLLD.Z m128 ymm k ymm
// VPSLLD.Z xmm xmm k xmm
// VPSLLD.Z xmm ymm k ymm
// VPSLLD.Z imm8 m512 k zmm
// VPSLLD.Z imm8 zmm k zmm
// VPSLLD.Z m128 zmm k zmm
// VPSLLD.Z xmm zmm k zmm
//
// Construct and append a VPSLLD.Z instruction to the active function.
func (c *Context) VPSLLD_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSLLD_Z(imx, mxyz, k, xyz))
}
// VPSLLD_Z: Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLD.Z imm8 m128 k xmm
// VPSLLD.Z imm8 m256 k ymm
// VPSLLD.Z imm8 xmm k xmm
// VPSLLD.Z imm8 ymm k ymm
// VPSLLD.Z m128 xmm k xmm
// VPSLLD.Z m128 ymm k ymm
// VPSLLD.Z xmm xmm k xmm
// VPSLLD.Z xmm ymm k ymm
// VPSLLD.Z imm8 m512 k zmm
// VPSLLD.Z imm8 zmm k zmm
// VPSLLD.Z m128 zmm k zmm
// VPSLLD.Z xmm zmm k zmm
//
// Construct and append a VPSLLD.Z instruction to the active function.
// Operates on the global context.
func VPSLLD_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSLLD_Z(imx, mxyz, k, xyz) }
// VPSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLQ imm8 ymm ymm
// VPSLLQ m128 ymm ymm
// VPSLLQ xmm ymm ymm
// VPSLLQ imm8 xmm xmm
// VPSLLQ m128 xmm xmm
// VPSLLQ xmm xmm xmm
// VPSLLQ imm8 m128 k xmm
// VPSLLQ imm8 m128 xmm
// VPSLLQ imm8 m256 k ymm
// VPSLLQ imm8 m256 ymm
// VPSLLQ imm8 xmm k xmm
// VPSLLQ imm8 ymm k ymm
// VPSLLQ m128 xmm k xmm
// VPSLLQ m128 ymm k ymm
// VPSLLQ xmm xmm k xmm
// VPSLLQ xmm ymm k ymm
// VPSLLQ imm8 m512 k zmm
// VPSLLQ imm8 m512 zmm
// VPSLLQ imm8 zmm k zmm
// VPSLLQ imm8 zmm zmm
// VPSLLQ m128 zmm k zmm
// VPSLLQ m128 zmm zmm
// VPSLLQ xmm zmm k zmm
// VPSLLQ xmm zmm zmm
//
// Construct and append a VPSLLQ instruction to the active function.
func (c *Context) VPSLLQ(ops ...operand.Op) {
c.addinstruction(x86.VPSLLQ(ops...))
}
// VPSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLQ imm8 ymm ymm
// VPSLLQ m128 ymm ymm
// VPSLLQ xmm ymm ymm
// VPSLLQ imm8 xmm xmm
// VPSLLQ m128 xmm xmm
// VPSLLQ xmm xmm xmm
// VPSLLQ imm8 m128 k xmm
// VPSLLQ imm8 m128 xmm
// VPSLLQ imm8 m256 k ymm
// VPSLLQ imm8 m256 ymm
// VPSLLQ imm8 xmm k xmm
// VPSLLQ imm8 ymm k ymm
// VPSLLQ m128 xmm k xmm
// VPSLLQ m128 ymm k ymm
// VPSLLQ xmm xmm k xmm
// VPSLLQ xmm ymm k ymm
// VPSLLQ imm8 m512 k zmm
// VPSLLQ imm8 m512 zmm
// VPSLLQ imm8 zmm k zmm
// VPSLLQ imm8 zmm zmm
// VPSLLQ m128 zmm k zmm
// VPSLLQ m128 zmm zmm
// VPSLLQ xmm zmm k zmm
// VPSLLQ xmm zmm zmm
//
// Construct and append a VPSLLQ instruction to the active function.
// Operates on the global context.
func VPSLLQ(ops ...operand.Op) { ctx.VPSLLQ(ops...) }
// VPSLLQ_BCST: Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLQ.BCST imm8 m64 k xmm
// VPSLLQ.BCST imm8 m64 k ymm
// VPSLLQ.BCST imm8 m64 xmm
// VPSLLQ.BCST imm8 m64 ymm
// VPSLLQ.BCST imm8 m64 k zmm
// VPSLLQ.BCST imm8 m64 zmm
//
// Construct and append a VPSLLQ.BCST instruction to the active function.
func (c *Context) VPSLLQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSLLQ_BCST(ops...))
}
// VPSLLQ_BCST: Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLQ.BCST imm8 m64 k xmm
// VPSLLQ.BCST imm8 m64 k ymm
// VPSLLQ.BCST imm8 m64 xmm
// VPSLLQ.BCST imm8 m64 ymm
// VPSLLQ.BCST imm8 m64 k zmm
// VPSLLQ.BCST imm8 m64 zmm
//
// Construct and append a VPSLLQ.BCST instruction to the active function.
// Operates on the global context.
func VPSLLQ_BCST(ops ...operand.Op) { ctx.VPSLLQ_BCST(ops...) }
// VPSLLQ_BCST_Z: Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLQ.BCST.Z imm8 m64 k xmm
// VPSLLQ.BCST.Z imm8 m64 k ymm
// VPSLLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSLLQ.BCST.Z instruction to the active function.
func (c *Context) VPSLLQ_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSLLQ_BCST_Z(i, m, k, xyz))
}
// VPSLLQ_BCST_Z: Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLQ.BCST.Z imm8 m64 k xmm
// VPSLLQ.BCST.Z imm8 m64 k ymm
// VPSLLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSLLQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSLLQ_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSLLQ_BCST_Z(i, m, k, xyz) }
// VPSLLQ_Z: Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLQ.Z imm8 m128 k xmm
// VPSLLQ.Z imm8 m256 k ymm
// VPSLLQ.Z imm8 xmm k xmm
// VPSLLQ.Z imm8 ymm k ymm
// VPSLLQ.Z m128 xmm k xmm
// VPSLLQ.Z m128 ymm k ymm
// VPSLLQ.Z xmm xmm k xmm
// VPSLLQ.Z xmm ymm k ymm
// VPSLLQ.Z imm8 m512 k zmm
// VPSLLQ.Z imm8 zmm k zmm
// VPSLLQ.Z m128 zmm k zmm
// VPSLLQ.Z xmm zmm k zmm
//
// Construct and append a VPSLLQ.Z instruction to the active function.
func (c *Context) VPSLLQ_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSLLQ_Z(imx, mxyz, k, xyz))
}
// VPSLLQ_Z: Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLQ.Z imm8 m128 k xmm
// VPSLLQ.Z imm8 m256 k ymm
// VPSLLQ.Z imm8 xmm k xmm
// VPSLLQ.Z imm8 ymm k ymm
// VPSLLQ.Z m128 xmm k xmm
// VPSLLQ.Z m128 ymm k ymm
// VPSLLQ.Z xmm xmm k xmm
// VPSLLQ.Z xmm ymm k ymm
// VPSLLQ.Z imm8 m512 k zmm
// VPSLLQ.Z imm8 zmm k zmm
// VPSLLQ.Z m128 zmm k zmm
// VPSLLQ.Z xmm zmm k zmm
//
// Construct and append a VPSLLQ.Z instruction to the active function.
// Operates on the global context.
func VPSLLQ_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSLLQ_Z(imx, mxyz, k, xyz) }
// VPSLLVD: Variable Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLVD m128 xmm xmm
// VPSLLVD m256 ymm ymm
// VPSLLVD xmm xmm xmm
// VPSLLVD ymm ymm ymm
// VPSLLVD m128 xmm k xmm
// VPSLLVD m256 ymm k ymm
// VPSLLVD xmm xmm k xmm
// VPSLLVD ymm ymm k ymm
// VPSLLVD m512 zmm k zmm
// VPSLLVD m512 zmm zmm
// VPSLLVD zmm zmm k zmm
// VPSLLVD zmm zmm zmm
//
// Construct and append a VPSLLVD instruction to the active function.
func (c *Context) VPSLLVD(ops ...operand.Op) {
c.addinstruction(x86.VPSLLVD(ops...))
}
// VPSLLVD: Variable Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLVD m128 xmm xmm
// VPSLLVD m256 ymm ymm
// VPSLLVD xmm xmm xmm
// VPSLLVD ymm ymm ymm
// VPSLLVD m128 xmm k xmm
// VPSLLVD m256 ymm k ymm
// VPSLLVD xmm xmm k xmm
// VPSLLVD ymm ymm k ymm
// VPSLLVD m512 zmm k zmm
// VPSLLVD m512 zmm zmm
// VPSLLVD zmm zmm k zmm
// VPSLLVD zmm zmm zmm
//
// Construct and append a VPSLLVD instruction to the active function.
// Operates on the global context.
func VPSLLVD(ops ...operand.Op) { ctx.VPSLLVD(ops...) }
// VPSLLVD_BCST: Variable Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVD.BCST m32 xmm k xmm
// VPSLLVD.BCST m32 xmm xmm
// VPSLLVD.BCST m32 ymm k ymm
// VPSLLVD.BCST m32 ymm ymm
// VPSLLVD.BCST m32 zmm k zmm
// VPSLLVD.BCST m32 zmm zmm
//
// Construct and append a VPSLLVD.BCST instruction to the active function.
func (c *Context) VPSLLVD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSLLVD_BCST(ops...))
}
// VPSLLVD_BCST: Variable Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVD.BCST m32 xmm k xmm
// VPSLLVD.BCST m32 xmm xmm
// VPSLLVD.BCST m32 ymm k ymm
// VPSLLVD.BCST m32 ymm ymm
// VPSLLVD.BCST m32 zmm k zmm
// VPSLLVD.BCST m32 zmm zmm
//
// Construct and append a VPSLLVD.BCST instruction to the active function.
// Operates on the global context.
func VPSLLVD_BCST(ops ...operand.Op) { ctx.VPSLLVD_BCST(ops...) }
// VPSLLVD_BCST_Z: Variable Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVD.BCST.Z m32 xmm k xmm
// VPSLLVD.BCST.Z m32 ymm k ymm
// VPSLLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSLLVD.BCST.Z instruction to the active function.
func (c *Context) VPSLLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSLLVD_BCST_Z(m, xyz, k, xyz1))
}
// VPSLLVD_BCST_Z: Variable Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVD.BCST.Z m32 xmm k xmm
// VPSLLVD.BCST.Z m32 ymm k ymm
// VPSLLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSLLVD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSLLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSLLVD_BCST_Z(m, xyz, k, xyz1) }
// VPSLLVD_Z: Variable Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVD.Z m128 xmm k xmm
// VPSLLVD.Z m256 ymm k ymm
// VPSLLVD.Z xmm xmm k xmm
// VPSLLVD.Z ymm ymm k ymm
// VPSLLVD.Z m512 zmm k zmm
// VPSLLVD.Z zmm zmm k zmm
//
// Construct and append a VPSLLVD.Z instruction to the active function.
func (c *Context) VPSLLVD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSLLVD_Z(mxyz, xyz, k, xyz1))
}
// VPSLLVD_Z: Variable Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVD.Z m128 xmm k xmm
// VPSLLVD.Z m256 ymm k ymm
// VPSLLVD.Z xmm xmm k xmm
// VPSLLVD.Z ymm ymm k ymm
// VPSLLVD.Z m512 zmm k zmm
// VPSLLVD.Z zmm zmm k zmm
//
// Construct and append a VPSLLVD.Z instruction to the active function.
// Operates on the global context.
func VPSLLVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSLLVD_Z(mxyz, xyz, k, xyz1) }
// VPSLLVQ: Variable Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLVQ m128 xmm xmm
// VPSLLVQ m256 ymm ymm
// VPSLLVQ xmm xmm xmm
// VPSLLVQ ymm ymm ymm
// VPSLLVQ m128 xmm k xmm
// VPSLLVQ m256 ymm k ymm
// VPSLLVQ xmm xmm k xmm
// VPSLLVQ ymm ymm k ymm
// VPSLLVQ m512 zmm k zmm
// VPSLLVQ m512 zmm zmm
// VPSLLVQ zmm zmm k zmm
// VPSLLVQ zmm zmm zmm
//
// Construct and append a VPSLLVQ instruction to the active function.
func (c *Context) VPSLLVQ(ops ...operand.Op) {
c.addinstruction(x86.VPSLLVQ(ops...))
}
// VPSLLVQ: Variable Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLVQ m128 xmm xmm
// VPSLLVQ m256 ymm ymm
// VPSLLVQ xmm xmm xmm
// VPSLLVQ ymm ymm ymm
// VPSLLVQ m128 xmm k xmm
// VPSLLVQ m256 ymm k ymm
// VPSLLVQ xmm xmm k xmm
// VPSLLVQ ymm ymm k ymm
// VPSLLVQ m512 zmm k zmm
// VPSLLVQ m512 zmm zmm
// VPSLLVQ zmm zmm k zmm
// VPSLLVQ zmm zmm zmm
//
// Construct and append a VPSLLVQ instruction to the active function.
// Operates on the global context.
func VPSLLVQ(ops ...operand.Op) { ctx.VPSLLVQ(ops...) }
// VPSLLVQ_BCST: Variable Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVQ.BCST m64 xmm k xmm
// VPSLLVQ.BCST m64 xmm xmm
// VPSLLVQ.BCST m64 ymm k ymm
// VPSLLVQ.BCST m64 ymm ymm
// VPSLLVQ.BCST m64 zmm k zmm
// VPSLLVQ.BCST m64 zmm zmm
//
// Construct and append a VPSLLVQ.BCST instruction to the active function.
func (c *Context) VPSLLVQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSLLVQ_BCST(ops...))
}
// VPSLLVQ_BCST: Variable Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVQ.BCST m64 xmm k xmm
// VPSLLVQ.BCST m64 xmm xmm
// VPSLLVQ.BCST m64 ymm k ymm
// VPSLLVQ.BCST m64 ymm ymm
// VPSLLVQ.BCST m64 zmm k zmm
// VPSLLVQ.BCST m64 zmm zmm
//
// Construct and append a VPSLLVQ.BCST instruction to the active function.
// Operates on the global context.
func VPSLLVQ_BCST(ops ...operand.Op) { ctx.VPSLLVQ_BCST(ops...) }
// VPSLLVQ_BCST_Z: Variable Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.BCST.Z m64 xmm k xmm
// VPSLLVQ.BCST.Z m64 ymm k ymm
// VPSLLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSLLVQ.BCST.Z instruction to the active function.
func (c *Context) VPSLLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSLLVQ_BCST_Z(m, xyz, k, xyz1))
}
// VPSLLVQ_BCST_Z: Variable Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.BCST.Z m64 xmm k xmm
// VPSLLVQ.BCST.Z m64 ymm k ymm
// VPSLLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSLLVQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSLLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSLLVQ_BCST_Z(m, xyz, k, xyz1) }
// VPSLLVQ_Z: Variable Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.Z m128 xmm k xmm
// VPSLLVQ.Z m256 ymm k ymm
// VPSLLVQ.Z xmm xmm k xmm
// VPSLLVQ.Z ymm ymm k ymm
// VPSLLVQ.Z m512 zmm k zmm
// VPSLLVQ.Z zmm zmm k zmm
//
// Construct and append a VPSLLVQ.Z instruction to the active function.
func (c *Context) VPSLLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSLLVQ_Z(mxyz, xyz, k, xyz1))
}
// VPSLLVQ_Z: Variable Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.Z m128 xmm k xmm
// VPSLLVQ.Z m256 ymm k ymm
// VPSLLVQ.Z xmm xmm k xmm
// VPSLLVQ.Z ymm ymm k ymm
// VPSLLVQ.Z m512 zmm k zmm
// VPSLLVQ.Z zmm zmm k zmm
//
// Construct and append a VPSLLVQ.Z instruction to the active function.
// Operates on the global context.
func VPSLLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSLLVQ_Z(mxyz, xyz, k, xyz1) }
// VPSLLVW: Variable Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLVW m128 xmm k xmm
// VPSLLVW m128 xmm xmm
// VPSLLVW m256 ymm k ymm
// VPSLLVW m256 ymm ymm
// VPSLLVW xmm xmm k xmm
// VPSLLVW xmm xmm xmm
// VPSLLVW ymm ymm k ymm
// VPSLLVW ymm ymm ymm
// VPSLLVW m512 zmm k zmm
// VPSLLVW m512 zmm zmm
// VPSLLVW zmm zmm k zmm
// VPSLLVW zmm zmm zmm
//
// Construct and append a VPSLLVW instruction to the active function.
func (c *Context) VPSLLVW(ops ...operand.Op) {
c.addinstruction(x86.VPSLLVW(ops...))
}
// VPSLLVW: Variable Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLVW m128 xmm k xmm
// VPSLLVW m128 xmm xmm
// VPSLLVW m256 ymm k ymm
// VPSLLVW m256 ymm ymm
// VPSLLVW xmm xmm k xmm
// VPSLLVW xmm xmm xmm
// VPSLLVW ymm ymm k ymm
// VPSLLVW ymm ymm ymm
// VPSLLVW m512 zmm k zmm
// VPSLLVW m512 zmm zmm
// VPSLLVW zmm zmm k zmm
// VPSLLVW zmm zmm zmm
//
// Construct and append a VPSLLVW instruction to the active function.
// Operates on the global context.
func VPSLLVW(ops ...operand.Op) { ctx.VPSLLVW(ops...) }
// VPSLLVW_Z: Variable Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVW.Z m128 xmm k xmm
// VPSLLVW.Z m256 ymm k ymm
// VPSLLVW.Z xmm xmm k xmm
// VPSLLVW.Z ymm ymm k ymm
// VPSLLVW.Z m512 zmm k zmm
// VPSLLVW.Z zmm zmm k zmm
//
// Construct and append a VPSLLVW.Z instruction to the active function.
func (c *Context) VPSLLVW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSLLVW_Z(mxyz, xyz, k, xyz1))
}
// VPSLLVW_Z: Variable Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVW.Z m128 xmm k xmm
// VPSLLVW.Z m256 ymm k ymm
// VPSLLVW.Z xmm xmm k xmm
// VPSLLVW.Z ymm ymm k ymm
// VPSLLVW.Z m512 zmm k zmm
// VPSLLVW.Z zmm zmm k zmm
//
// Construct and append a VPSLLVW.Z instruction to the active function.
// Operates on the global context.
func VPSLLVW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSLLVW_Z(mxyz, xyz, k, xyz1) }
// VPSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLW imm8 ymm ymm
// VPSLLW m128 ymm ymm
// VPSLLW xmm ymm ymm
// VPSLLW imm8 xmm xmm
// VPSLLW m128 xmm xmm
// VPSLLW xmm xmm xmm
// VPSLLW imm8 m128 k xmm
// VPSLLW imm8 m128 xmm
// VPSLLW imm8 m256 k ymm
// VPSLLW imm8 m256 ymm
// VPSLLW imm8 xmm k xmm
// VPSLLW imm8 ymm k ymm
// VPSLLW m128 xmm k xmm
// VPSLLW m128 ymm k ymm
// VPSLLW xmm xmm k xmm
// VPSLLW xmm ymm k ymm
// VPSLLW imm8 m512 k zmm
// VPSLLW imm8 m512 zmm
// VPSLLW imm8 zmm k zmm
// VPSLLW imm8 zmm zmm
// VPSLLW m128 zmm k zmm
// VPSLLW m128 zmm zmm
// VPSLLW xmm zmm k zmm
// VPSLLW xmm zmm zmm
//
// Construct and append a VPSLLW instruction to the active function.
func (c *Context) VPSLLW(ops ...operand.Op) {
c.addinstruction(x86.VPSLLW(ops...))
}
// VPSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLW imm8 ymm ymm
// VPSLLW m128 ymm ymm
// VPSLLW xmm ymm ymm
// VPSLLW imm8 xmm xmm
// VPSLLW m128 xmm xmm
// VPSLLW xmm xmm xmm
// VPSLLW imm8 m128 k xmm
// VPSLLW imm8 m128 xmm
// VPSLLW imm8 m256 k ymm
// VPSLLW imm8 m256 ymm
// VPSLLW imm8 xmm k xmm
// VPSLLW imm8 ymm k ymm
// VPSLLW m128 xmm k xmm
// VPSLLW m128 ymm k ymm
// VPSLLW xmm xmm k xmm
// VPSLLW xmm ymm k ymm
// VPSLLW imm8 m512 k zmm
// VPSLLW imm8 m512 zmm
// VPSLLW imm8 zmm k zmm
// VPSLLW imm8 zmm zmm
// VPSLLW m128 zmm k zmm
// VPSLLW m128 zmm zmm
// VPSLLW xmm zmm k zmm
// VPSLLW xmm zmm zmm
//
// Construct and append a VPSLLW instruction to the active function.
// Operates on the global context.
func VPSLLW(ops ...operand.Op) { ctx.VPSLLW(ops...) }
// VPSLLW_Z: Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLW.Z imm8 m128 k xmm
// VPSLLW.Z imm8 m256 k ymm
// VPSLLW.Z imm8 xmm k xmm
// VPSLLW.Z imm8 ymm k ymm
// VPSLLW.Z m128 xmm k xmm
// VPSLLW.Z m128 ymm k ymm
// VPSLLW.Z xmm xmm k xmm
// VPSLLW.Z xmm ymm k ymm
// VPSLLW.Z imm8 m512 k zmm
// VPSLLW.Z imm8 zmm k zmm
// VPSLLW.Z m128 zmm k zmm
// VPSLLW.Z xmm zmm k zmm
//
// Construct and append a VPSLLW.Z instruction to the active function.
func (c *Context) VPSLLW_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSLLW_Z(imx, mxyz, k, xyz))
}
// VPSLLW_Z: Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLW.Z imm8 m128 k xmm
// VPSLLW.Z imm8 m256 k ymm
// VPSLLW.Z imm8 xmm k xmm
// VPSLLW.Z imm8 ymm k ymm
// VPSLLW.Z m128 xmm k xmm
// VPSLLW.Z m128 ymm k ymm
// VPSLLW.Z xmm xmm k xmm
// VPSLLW.Z xmm ymm k ymm
// VPSLLW.Z imm8 m512 k zmm
// VPSLLW.Z imm8 zmm k zmm
// VPSLLW.Z m128 zmm k zmm
// VPSLLW.Z xmm zmm k zmm
//
// Construct and append a VPSLLW.Z instruction to the active function.
// Operates on the global context.
func VPSLLW_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSLLW_Z(imx, mxyz, k, xyz) }
// VPSRAD: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAD imm8 ymm ymm
// VPSRAD m128 ymm ymm
// VPSRAD xmm ymm ymm
// VPSRAD imm8 xmm xmm
// VPSRAD m128 xmm xmm
// VPSRAD xmm xmm xmm
// VPSRAD imm8 m128 k xmm
// VPSRAD imm8 m128 xmm
// VPSRAD imm8 m256 k ymm
// VPSRAD imm8 m256 ymm
// VPSRAD imm8 xmm k xmm
// VPSRAD imm8 ymm k ymm
// VPSRAD m128 xmm k xmm
// VPSRAD m128 ymm k ymm
// VPSRAD xmm xmm k xmm
// VPSRAD xmm ymm k ymm
// VPSRAD imm8 m512 k zmm
// VPSRAD imm8 m512 zmm
// VPSRAD imm8 zmm k zmm
// VPSRAD imm8 zmm zmm
// VPSRAD m128 zmm k zmm
// VPSRAD m128 zmm zmm
// VPSRAD xmm zmm k zmm
// VPSRAD xmm zmm zmm
//
// Construct and append a VPSRAD instruction to the active function.
func (c *Context) VPSRAD(ops ...operand.Op) {
c.addinstruction(x86.VPSRAD(ops...))
}
// VPSRAD: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAD imm8 ymm ymm
// VPSRAD m128 ymm ymm
// VPSRAD xmm ymm ymm
// VPSRAD imm8 xmm xmm
// VPSRAD m128 xmm xmm
// VPSRAD xmm xmm xmm
// VPSRAD imm8 m128 k xmm
// VPSRAD imm8 m128 xmm
// VPSRAD imm8 m256 k ymm
// VPSRAD imm8 m256 ymm
// VPSRAD imm8 xmm k xmm
// VPSRAD imm8 ymm k ymm
// VPSRAD m128 xmm k xmm
// VPSRAD m128 ymm k ymm
// VPSRAD xmm xmm k xmm
// VPSRAD xmm ymm k ymm
// VPSRAD imm8 m512 k zmm
// VPSRAD imm8 m512 zmm
// VPSRAD imm8 zmm k zmm
// VPSRAD imm8 zmm zmm
// VPSRAD m128 zmm k zmm
// VPSRAD m128 zmm zmm
// VPSRAD xmm zmm k zmm
// VPSRAD xmm zmm zmm
//
// Construct and append a VPSRAD instruction to the active function.
// Operates on the global context.
func VPSRAD(ops ...operand.Op) { ctx.VPSRAD(ops...) }
// VPSRAD_BCST: Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAD.BCST imm8 m32 k xmm
// VPSRAD.BCST imm8 m32 k ymm
// VPSRAD.BCST imm8 m32 xmm
// VPSRAD.BCST imm8 m32 ymm
// VPSRAD.BCST imm8 m32 k zmm
// VPSRAD.BCST imm8 m32 zmm
//
// Construct and append a VPSRAD.BCST instruction to the active function.
func (c *Context) VPSRAD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRAD_BCST(ops...))
}
// VPSRAD_BCST: Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAD.BCST imm8 m32 k xmm
// VPSRAD.BCST imm8 m32 k ymm
// VPSRAD.BCST imm8 m32 xmm
// VPSRAD.BCST imm8 m32 ymm
// VPSRAD.BCST imm8 m32 k zmm
// VPSRAD.BCST imm8 m32 zmm
//
// Construct and append a VPSRAD.BCST instruction to the active function.
// Operates on the global context.
func VPSRAD_BCST(ops ...operand.Op) { ctx.VPSRAD_BCST(ops...) }
// VPSRAD_BCST_Z: Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAD.BCST.Z imm8 m32 k xmm
// VPSRAD.BCST.Z imm8 m32 k ymm
// VPSRAD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSRAD.BCST.Z instruction to the active function.
func (c *Context) VPSRAD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSRAD_BCST_Z(i, m, k, xyz))
}
// VPSRAD_BCST_Z: Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAD.BCST.Z imm8 m32 k xmm
// VPSRAD.BCST.Z imm8 m32 k ymm
// VPSRAD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSRAD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRAD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSRAD_BCST_Z(i, m, k, xyz) }
// VPSRAD_Z: Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAD.Z imm8 m128 k xmm
// VPSRAD.Z imm8 m256 k ymm
// VPSRAD.Z imm8 xmm k xmm
// VPSRAD.Z imm8 ymm k ymm
// VPSRAD.Z m128 xmm k xmm
// VPSRAD.Z m128 ymm k ymm
// VPSRAD.Z xmm xmm k xmm
// VPSRAD.Z xmm ymm k ymm
// VPSRAD.Z imm8 m512 k zmm
// VPSRAD.Z imm8 zmm k zmm
// VPSRAD.Z m128 zmm k zmm
// VPSRAD.Z xmm zmm k zmm
//
// Construct and append a VPSRAD.Z instruction to the active function.
func (c *Context) VPSRAD_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRAD_Z(imx, mxyz, k, xyz))
}
// VPSRAD_Z: Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAD.Z imm8 m128 k xmm
// VPSRAD.Z imm8 m256 k ymm
// VPSRAD.Z imm8 xmm k xmm
// VPSRAD.Z imm8 ymm k ymm
// VPSRAD.Z m128 xmm k xmm
// VPSRAD.Z m128 ymm k ymm
// VPSRAD.Z xmm xmm k xmm
// VPSRAD.Z xmm ymm k ymm
// VPSRAD.Z imm8 m512 k zmm
// VPSRAD.Z imm8 zmm k zmm
// VPSRAD.Z m128 zmm k zmm
// VPSRAD.Z xmm zmm k zmm
//
// Construct and append a VPSRAD.Z instruction to the active function.
// Operates on the global context.
func VPSRAD_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRAD_Z(imx, mxyz, k, xyz) }
// VPSRAQ: Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAQ imm8 m128 k xmm
// VPSRAQ imm8 m128 xmm
// VPSRAQ imm8 m256 k ymm
// VPSRAQ imm8 m256 ymm
// VPSRAQ imm8 xmm k xmm
// VPSRAQ imm8 xmm xmm
// VPSRAQ imm8 ymm k ymm
// VPSRAQ imm8 ymm ymm
// VPSRAQ m128 xmm k xmm
// VPSRAQ m128 xmm xmm
// VPSRAQ m128 ymm k ymm
// VPSRAQ m128 ymm ymm
// VPSRAQ xmm xmm k xmm
// VPSRAQ xmm xmm xmm
// VPSRAQ xmm ymm k ymm
// VPSRAQ xmm ymm ymm
// VPSRAQ imm8 m512 k zmm
// VPSRAQ imm8 m512 zmm
// VPSRAQ imm8 zmm k zmm
// VPSRAQ imm8 zmm zmm
// VPSRAQ m128 zmm k zmm
// VPSRAQ m128 zmm zmm
// VPSRAQ xmm zmm k zmm
// VPSRAQ xmm zmm zmm
//
// Construct and append a VPSRAQ instruction to the active function.
func (c *Context) VPSRAQ(ops ...operand.Op) {
c.addinstruction(x86.VPSRAQ(ops...))
}
// VPSRAQ: Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAQ imm8 m128 k xmm
// VPSRAQ imm8 m128 xmm
// VPSRAQ imm8 m256 k ymm
// VPSRAQ imm8 m256 ymm
// VPSRAQ imm8 xmm k xmm
// VPSRAQ imm8 xmm xmm
// VPSRAQ imm8 ymm k ymm
// VPSRAQ imm8 ymm ymm
// VPSRAQ m128 xmm k xmm
// VPSRAQ m128 xmm xmm
// VPSRAQ m128 ymm k ymm
// VPSRAQ m128 ymm ymm
// VPSRAQ xmm xmm k xmm
// VPSRAQ xmm xmm xmm
// VPSRAQ xmm ymm k ymm
// VPSRAQ xmm ymm ymm
// VPSRAQ imm8 m512 k zmm
// VPSRAQ imm8 m512 zmm
// VPSRAQ imm8 zmm k zmm
// VPSRAQ imm8 zmm zmm
// VPSRAQ m128 zmm k zmm
// VPSRAQ m128 zmm zmm
// VPSRAQ xmm zmm k zmm
// VPSRAQ xmm zmm zmm
//
// Construct and append a VPSRAQ instruction to the active function.
// Operates on the global context.
func VPSRAQ(ops ...operand.Op) { ctx.VPSRAQ(ops...) }
// VPSRAQ_BCST: Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAQ.BCST imm8 m64 k xmm
// VPSRAQ.BCST imm8 m64 k ymm
// VPSRAQ.BCST imm8 m64 xmm
// VPSRAQ.BCST imm8 m64 ymm
// VPSRAQ.BCST imm8 m64 k zmm
// VPSRAQ.BCST imm8 m64 zmm
//
// Construct and append a VPSRAQ.BCST instruction to the active function.
func (c *Context) VPSRAQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRAQ_BCST(ops...))
}
// VPSRAQ_BCST: Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAQ.BCST imm8 m64 k xmm
// VPSRAQ.BCST imm8 m64 k ymm
// VPSRAQ.BCST imm8 m64 xmm
// VPSRAQ.BCST imm8 m64 ymm
// VPSRAQ.BCST imm8 m64 k zmm
// VPSRAQ.BCST imm8 m64 zmm
//
// Construct and append a VPSRAQ.BCST instruction to the active function.
// Operates on the global context.
func VPSRAQ_BCST(ops ...operand.Op) { ctx.VPSRAQ_BCST(ops...) }
// VPSRAQ_BCST_Z: Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAQ.BCST.Z imm8 m64 k xmm
// VPSRAQ.BCST.Z imm8 m64 k ymm
// VPSRAQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSRAQ.BCST.Z instruction to the active function.
func (c *Context) VPSRAQ_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSRAQ_BCST_Z(i, m, k, xyz))
}
// VPSRAQ_BCST_Z: Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAQ.BCST.Z imm8 m64 k xmm
// VPSRAQ.BCST.Z imm8 m64 k ymm
// VPSRAQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSRAQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRAQ_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSRAQ_BCST_Z(i, m, k, xyz) }
// VPSRAQ_Z: Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAQ.Z imm8 m128 k xmm
// VPSRAQ.Z imm8 m256 k ymm
// VPSRAQ.Z imm8 xmm k xmm
// VPSRAQ.Z imm8 ymm k ymm
// VPSRAQ.Z m128 xmm k xmm
// VPSRAQ.Z m128 ymm k ymm
// VPSRAQ.Z xmm xmm k xmm
// VPSRAQ.Z xmm ymm k ymm
// VPSRAQ.Z imm8 m512 k zmm
// VPSRAQ.Z imm8 zmm k zmm
// VPSRAQ.Z m128 zmm k zmm
// VPSRAQ.Z xmm zmm k zmm
//
// Construct and append a VPSRAQ.Z instruction to the active function.
func (c *Context) VPSRAQ_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRAQ_Z(imx, mxyz, k, xyz))
}
// VPSRAQ_Z: Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAQ.Z imm8 m128 k xmm
// VPSRAQ.Z imm8 m256 k ymm
// VPSRAQ.Z imm8 xmm k xmm
// VPSRAQ.Z imm8 ymm k ymm
// VPSRAQ.Z m128 xmm k xmm
// VPSRAQ.Z m128 ymm k ymm
// VPSRAQ.Z xmm xmm k xmm
// VPSRAQ.Z xmm ymm k ymm
// VPSRAQ.Z imm8 m512 k zmm
// VPSRAQ.Z imm8 zmm k zmm
// VPSRAQ.Z m128 zmm k zmm
// VPSRAQ.Z xmm zmm k zmm
//
// Construct and append a VPSRAQ.Z instruction to the active function.
// Operates on the global context.
func VPSRAQ_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRAQ_Z(imx, mxyz, k, xyz) }
// VPSRAVD: Variable Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVD m128 xmm xmm
// VPSRAVD m256 ymm ymm
// VPSRAVD xmm xmm xmm
// VPSRAVD ymm ymm ymm
// VPSRAVD m128 xmm k xmm
// VPSRAVD m256 ymm k ymm
// VPSRAVD xmm xmm k xmm
// VPSRAVD ymm ymm k ymm
// VPSRAVD m512 zmm k zmm
// VPSRAVD m512 zmm zmm
// VPSRAVD zmm zmm k zmm
// VPSRAVD zmm zmm zmm
//
// Construct and append a VPSRAVD instruction to the active function.
func (c *Context) VPSRAVD(ops ...operand.Op) {
c.addinstruction(x86.VPSRAVD(ops...))
}
// VPSRAVD: Variable Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVD m128 xmm xmm
// VPSRAVD m256 ymm ymm
// VPSRAVD xmm xmm xmm
// VPSRAVD ymm ymm ymm
// VPSRAVD m128 xmm k xmm
// VPSRAVD m256 ymm k ymm
// VPSRAVD xmm xmm k xmm
// VPSRAVD ymm ymm k ymm
// VPSRAVD m512 zmm k zmm
// VPSRAVD m512 zmm zmm
// VPSRAVD zmm zmm k zmm
// VPSRAVD zmm zmm zmm
//
// Construct and append a VPSRAVD instruction to the active function.
// Operates on the global context.
func VPSRAVD(ops ...operand.Op) { ctx.VPSRAVD(ops...) }
// VPSRAVD_BCST: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVD.BCST m32 xmm k xmm
// VPSRAVD.BCST m32 xmm xmm
// VPSRAVD.BCST m32 ymm k ymm
// VPSRAVD.BCST m32 ymm ymm
// VPSRAVD.BCST m32 zmm k zmm
// VPSRAVD.BCST m32 zmm zmm
//
// Construct and append a VPSRAVD.BCST instruction to the active function.
func (c *Context) VPSRAVD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRAVD_BCST(ops...))
}
// VPSRAVD_BCST: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVD.BCST m32 xmm k xmm
// VPSRAVD.BCST m32 xmm xmm
// VPSRAVD.BCST m32 ymm k ymm
// VPSRAVD.BCST m32 ymm ymm
// VPSRAVD.BCST m32 zmm k zmm
// VPSRAVD.BCST m32 zmm zmm
//
// Construct and append a VPSRAVD.BCST instruction to the active function.
// Operates on the global context.
func VPSRAVD_BCST(ops ...operand.Op) { ctx.VPSRAVD_BCST(ops...) }
// VPSRAVD_BCST_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVD.BCST.Z m32 xmm k xmm
// VPSRAVD.BCST.Z m32 ymm k ymm
// VPSRAVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSRAVD.BCST.Z instruction to the active function.
func (c *Context) VPSRAVD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRAVD_BCST_Z(m, xyz, k, xyz1))
}
// VPSRAVD_BCST_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVD.BCST.Z m32 xmm k xmm
// VPSRAVD.BCST.Z m32 ymm k ymm
// VPSRAVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSRAVD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRAVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSRAVD_BCST_Z(m, xyz, k, xyz1) }
// VPSRAVD_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVD.Z m128 xmm k xmm
// VPSRAVD.Z m256 ymm k ymm
// VPSRAVD.Z xmm xmm k xmm
// VPSRAVD.Z ymm ymm k ymm
// VPSRAVD.Z m512 zmm k zmm
// VPSRAVD.Z zmm zmm k zmm
//
// Construct and append a VPSRAVD.Z instruction to the active function.
func (c *Context) VPSRAVD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRAVD_Z(mxyz, xyz, k, xyz1))
}
// VPSRAVD_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVD.Z m128 xmm k xmm
// VPSRAVD.Z m256 ymm k ymm
// VPSRAVD.Z xmm xmm k xmm
// VPSRAVD.Z ymm ymm k ymm
// VPSRAVD.Z m512 zmm k zmm
// VPSRAVD.Z zmm zmm k zmm
//
// Construct and append a VPSRAVD.Z instruction to the active function.
// Operates on the global context.
func VPSRAVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRAVD_Z(mxyz, xyz, k, xyz1) }
// VPSRAVQ: Variable Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVQ m128 xmm k xmm
// VPSRAVQ m128 xmm xmm
// VPSRAVQ m256 ymm k ymm
// VPSRAVQ m256 ymm ymm
// VPSRAVQ xmm xmm k xmm
// VPSRAVQ xmm xmm xmm
// VPSRAVQ ymm ymm k ymm
// VPSRAVQ ymm ymm ymm
// VPSRAVQ m512 zmm k zmm
// VPSRAVQ m512 zmm zmm
// VPSRAVQ zmm zmm k zmm
// VPSRAVQ zmm zmm zmm
//
// Construct and append a VPSRAVQ instruction to the active function.
func (c *Context) VPSRAVQ(ops ...operand.Op) {
c.addinstruction(x86.VPSRAVQ(ops...))
}
// VPSRAVQ: Variable Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVQ m128 xmm k xmm
// VPSRAVQ m128 xmm xmm
// VPSRAVQ m256 ymm k ymm
// VPSRAVQ m256 ymm ymm
// VPSRAVQ xmm xmm k xmm
// VPSRAVQ xmm xmm xmm
// VPSRAVQ ymm ymm k ymm
// VPSRAVQ ymm ymm ymm
// VPSRAVQ m512 zmm k zmm
// VPSRAVQ m512 zmm zmm
// VPSRAVQ zmm zmm k zmm
// VPSRAVQ zmm zmm zmm
//
// Construct and append a VPSRAVQ instruction to the active function.
// Operates on the global context.
func VPSRAVQ(ops ...operand.Op) { ctx.VPSRAVQ(ops...) }
// VPSRAVQ_BCST: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVQ.BCST m64 xmm k xmm
// VPSRAVQ.BCST m64 xmm xmm
// VPSRAVQ.BCST m64 ymm k ymm
// VPSRAVQ.BCST m64 ymm ymm
// VPSRAVQ.BCST m64 zmm k zmm
// VPSRAVQ.BCST m64 zmm zmm
//
// Construct and append a VPSRAVQ.BCST instruction to the active function.
func (c *Context) VPSRAVQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRAVQ_BCST(ops...))
}
// VPSRAVQ_BCST: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVQ.BCST m64 xmm k xmm
// VPSRAVQ.BCST m64 xmm xmm
// VPSRAVQ.BCST m64 ymm k ymm
// VPSRAVQ.BCST m64 ymm ymm
// VPSRAVQ.BCST m64 zmm k zmm
// VPSRAVQ.BCST m64 zmm zmm
//
// Construct and append a VPSRAVQ.BCST instruction to the active function.
// Operates on the global context.
func VPSRAVQ_BCST(ops ...operand.Op) { ctx.VPSRAVQ_BCST(ops...) }
// VPSRAVQ_BCST_Z: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.BCST.Z m64 xmm k xmm
// VPSRAVQ.BCST.Z m64 ymm k ymm
// VPSRAVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSRAVQ.BCST.Z instruction to the active function.
func (c *Context) VPSRAVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRAVQ_BCST_Z(m, xyz, k, xyz1))
}
// VPSRAVQ_BCST_Z: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.BCST.Z m64 xmm k xmm
// VPSRAVQ.BCST.Z m64 ymm k ymm
// VPSRAVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSRAVQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRAVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSRAVQ_BCST_Z(m, xyz, k, xyz1) }
// VPSRAVQ_Z: Variable Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.Z m128 xmm k xmm
// VPSRAVQ.Z m256 ymm k ymm
// VPSRAVQ.Z xmm xmm k xmm
// VPSRAVQ.Z ymm ymm k ymm
// VPSRAVQ.Z m512 zmm k zmm
// VPSRAVQ.Z zmm zmm k zmm
//
// Construct and append a VPSRAVQ.Z instruction to the active function.
func (c *Context) VPSRAVQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRAVQ_Z(mxyz, xyz, k, xyz1))
}
// VPSRAVQ_Z: Variable Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.Z m128 xmm k xmm
// VPSRAVQ.Z m256 ymm k ymm
// VPSRAVQ.Z xmm xmm k xmm
// VPSRAVQ.Z ymm ymm k ymm
// VPSRAVQ.Z m512 zmm k zmm
// VPSRAVQ.Z zmm zmm k zmm
//
// Construct and append a VPSRAVQ.Z instruction to the active function.
// Operates on the global context.
func VPSRAVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRAVQ_Z(mxyz, xyz, k, xyz1) }
// VPSRAVW: Variable Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAVW m128 xmm k xmm
// VPSRAVW m128 xmm xmm
// VPSRAVW m256 ymm k ymm
// VPSRAVW m256 ymm ymm
// VPSRAVW xmm xmm k xmm
// VPSRAVW xmm xmm xmm
// VPSRAVW ymm ymm k ymm
// VPSRAVW ymm ymm ymm
// VPSRAVW m512 zmm k zmm
// VPSRAVW m512 zmm zmm
// VPSRAVW zmm zmm k zmm
// VPSRAVW zmm zmm zmm
//
// Construct and append a VPSRAVW instruction to the active function.
func (c *Context) VPSRAVW(ops ...operand.Op) {
c.addinstruction(x86.VPSRAVW(ops...))
}
// VPSRAVW: Variable Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAVW m128 xmm k xmm
// VPSRAVW m128 xmm xmm
// VPSRAVW m256 ymm k ymm
// VPSRAVW m256 ymm ymm
// VPSRAVW xmm xmm k xmm
// VPSRAVW xmm xmm xmm
// VPSRAVW ymm ymm k ymm
// VPSRAVW ymm ymm ymm
// VPSRAVW m512 zmm k zmm
// VPSRAVW m512 zmm zmm
// VPSRAVW zmm zmm k zmm
// VPSRAVW zmm zmm zmm
//
// Construct and append a VPSRAVW instruction to the active function.
// Operates on the global context.
func VPSRAVW(ops ...operand.Op) { ctx.VPSRAVW(ops...) }
// VPSRAVW_Z: Variable Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVW.Z m128 xmm k xmm
// VPSRAVW.Z m256 ymm k ymm
// VPSRAVW.Z xmm xmm k xmm
// VPSRAVW.Z ymm ymm k ymm
// VPSRAVW.Z m512 zmm k zmm
// VPSRAVW.Z zmm zmm k zmm
//
// Construct and append a VPSRAVW.Z instruction to the active function.
func (c *Context) VPSRAVW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRAVW_Z(mxyz, xyz, k, xyz1))
}
// VPSRAVW_Z: Variable Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVW.Z m128 xmm k xmm
// VPSRAVW.Z m256 ymm k ymm
// VPSRAVW.Z xmm xmm k xmm
// VPSRAVW.Z ymm ymm k ymm
// VPSRAVW.Z m512 zmm k zmm
// VPSRAVW.Z zmm zmm k zmm
//
// Construct and append a VPSRAVW.Z instruction to the active function.
// Operates on the global context.
func VPSRAVW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRAVW_Z(mxyz, xyz, k, xyz1) }
// VPSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAW imm8 ymm ymm
// VPSRAW m128 ymm ymm
// VPSRAW xmm ymm ymm
// VPSRAW imm8 xmm xmm
// VPSRAW m128 xmm xmm
// VPSRAW xmm xmm xmm
// VPSRAW imm8 m128 k xmm
// VPSRAW imm8 m128 xmm
// VPSRAW imm8 m256 k ymm
// VPSRAW imm8 m256 ymm
// VPSRAW imm8 xmm k xmm
// VPSRAW imm8 ymm k ymm
// VPSRAW m128 xmm k xmm
// VPSRAW m128 ymm k ymm
// VPSRAW xmm xmm k xmm
// VPSRAW xmm ymm k ymm
// VPSRAW imm8 m512 k zmm
// VPSRAW imm8 m512 zmm
// VPSRAW imm8 zmm k zmm
// VPSRAW imm8 zmm zmm
// VPSRAW m128 zmm k zmm
// VPSRAW m128 zmm zmm
// VPSRAW xmm zmm k zmm
// VPSRAW xmm zmm zmm
//
// Construct and append a VPSRAW instruction to the active function.
func (c *Context) VPSRAW(ops ...operand.Op) {
c.addinstruction(x86.VPSRAW(ops...))
}
// VPSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAW imm8 ymm ymm
// VPSRAW m128 ymm ymm
// VPSRAW xmm ymm ymm
// VPSRAW imm8 xmm xmm
// VPSRAW m128 xmm xmm
// VPSRAW xmm xmm xmm
// VPSRAW imm8 m128 k xmm
// VPSRAW imm8 m128 xmm
// VPSRAW imm8 m256 k ymm
// VPSRAW imm8 m256 ymm
// VPSRAW imm8 xmm k xmm
// VPSRAW imm8 ymm k ymm
// VPSRAW m128 xmm k xmm
// VPSRAW m128 ymm k ymm
// VPSRAW xmm xmm k xmm
// VPSRAW xmm ymm k ymm
// VPSRAW imm8 m512 k zmm
// VPSRAW imm8 m512 zmm
// VPSRAW imm8 zmm k zmm
// VPSRAW imm8 zmm zmm
// VPSRAW m128 zmm k zmm
// VPSRAW m128 zmm zmm
// VPSRAW xmm zmm k zmm
// VPSRAW xmm zmm zmm
//
// Construct and append a VPSRAW instruction to the active function.
// Operates on the global context.
func VPSRAW(ops ...operand.Op) { ctx.VPSRAW(ops...) }
// VPSRAW_Z: Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAW.Z imm8 m128 k xmm
// VPSRAW.Z imm8 m256 k ymm
// VPSRAW.Z imm8 xmm k xmm
// VPSRAW.Z imm8 ymm k ymm
// VPSRAW.Z m128 xmm k xmm
// VPSRAW.Z m128 ymm k ymm
// VPSRAW.Z xmm xmm k xmm
// VPSRAW.Z xmm ymm k ymm
// VPSRAW.Z imm8 m512 k zmm
// VPSRAW.Z imm8 zmm k zmm
// VPSRAW.Z m128 zmm k zmm
// VPSRAW.Z xmm zmm k zmm
//
// Construct and append a VPSRAW.Z instruction to the active function.
func (c *Context) VPSRAW_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRAW_Z(imx, mxyz, k, xyz))
}
// VPSRAW_Z: Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAW.Z imm8 m128 k xmm
// VPSRAW.Z imm8 m256 k ymm
// VPSRAW.Z imm8 xmm k xmm
// VPSRAW.Z imm8 ymm k ymm
// VPSRAW.Z m128 xmm k xmm
// VPSRAW.Z m128 ymm k ymm
// VPSRAW.Z xmm xmm k xmm
// VPSRAW.Z xmm ymm k ymm
// VPSRAW.Z imm8 m512 k zmm
// VPSRAW.Z imm8 zmm k zmm
// VPSRAW.Z m128 zmm k zmm
// VPSRAW.Z xmm zmm k zmm
//
// Construct and append a VPSRAW.Z instruction to the active function.
// Operates on the global context.
func VPSRAW_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRAW_Z(imx, mxyz, k, xyz) }
// VPSRLD: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLD imm8 ymm ymm
// VPSRLD m128 ymm ymm
// VPSRLD xmm ymm ymm
// VPSRLD imm8 xmm xmm
// VPSRLD m128 xmm xmm
// VPSRLD xmm xmm xmm
// VPSRLD imm8 m128 k xmm
// VPSRLD imm8 m128 xmm
// VPSRLD imm8 m256 k ymm
// VPSRLD imm8 m256 ymm
// VPSRLD imm8 xmm k xmm
// VPSRLD imm8 ymm k ymm
// VPSRLD m128 xmm k xmm
// VPSRLD m128 ymm k ymm
// VPSRLD xmm xmm k xmm
// VPSRLD xmm ymm k ymm
// VPSRLD imm8 m512 k zmm
// VPSRLD imm8 m512 zmm
// VPSRLD imm8 zmm k zmm
// VPSRLD imm8 zmm zmm
// VPSRLD m128 zmm k zmm
// VPSRLD m128 zmm zmm
// VPSRLD xmm zmm k zmm
// VPSRLD xmm zmm zmm
//
// Construct and append a VPSRLD instruction to the active function.
func (c *Context) VPSRLD(ops ...operand.Op) {
c.addinstruction(x86.VPSRLD(ops...))
}
// VPSRLD: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLD imm8 ymm ymm
// VPSRLD m128 ymm ymm
// VPSRLD xmm ymm ymm
// VPSRLD imm8 xmm xmm
// VPSRLD m128 xmm xmm
// VPSRLD xmm xmm xmm
// VPSRLD imm8 m128 k xmm
// VPSRLD imm8 m128 xmm
// VPSRLD imm8 m256 k ymm
// VPSRLD imm8 m256 ymm
// VPSRLD imm8 xmm k xmm
// VPSRLD imm8 ymm k ymm
// VPSRLD m128 xmm k xmm
// VPSRLD m128 ymm k ymm
// VPSRLD xmm xmm k xmm
// VPSRLD xmm ymm k ymm
// VPSRLD imm8 m512 k zmm
// VPSRLD imm8 m512 zmm
// VPSRLD imm8 zmm k zmm
// VPSRLD imm8 zmm zmm
// VPSRLD m128 zmm k zmm
// VPSRLD m128 zmm zmm
// VPSRLD xmm zmm k zmm
// VPSRLD xmm zmm zmm
//
// Construct and append a VPSRLD instruction to the active function.
// Operates on the global context.
func VPSRLD(ops ...operand.Op) { ctx.VPSRLD(ops...) }
// VPSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// VPSRLDQ imm8 ymm ymm
// VPSRLDQ imm8 xmm xmm
// VPSRLDQ imm8 m128 xmm
// VPSRLDQ imm8 m256 ymm
// VPSRLDQ imm8 m512 zmm
// VPSRLDQ imm8 zmm zmm
//
// Construct and append a VPSRLDQ instruction to the active function.
func (c *Context) VPSRLDQ(i, mxyz, xyz operand.Op) {
c.addinstruction(x86.VPSRLDQ(i, mxyz, xyz))
}
// VPSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// VPSRLDQ imm8 ymm ymm
// VPSRLDQ imm8 xmm xmm
// VPSRLDQ imm8 m128 xmm
// VPSRLDQ imm8 m256 ymm
// VPSRLDQ imm8 m512 zmm
// VPSRLDQ imm8 zmm zmm
//
// Construct and append a VPSRLDQ instruction to the active function.
// Operates on the global context.
func VPSRLDQ(i, mxyz, xyz operand.Op) { ctx.VPSRLDQ(i, mxyz, xyz) }
// VPSRLD_BCST: Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLD.BCST imm8 m32 k xmm
// VPSRLD.BCST imm8 m32 k ymm
// VPSRLD.BCST imm8 m32 xmm
// VPSRLD.BCST imm8 m32 ymm
// VPSRLD.BCST imm8 m32 k zmm
// VPSRLD.BCST imm8 m32 zmm
//
// Construct and append a VPSRLD.BCST instruction to the active function.
func (c *Context) VPSRLD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRLD_BCST(ops...))
}
// VPSRLD_BCST: Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLD.BCST imm8 m32 k xmm
// VPSRLD.BCST imm8 m32 k ymm
// VPSRLD.BCST imm8 m32 xmm
// VPSRLD.BCST imm8 m32 ymm
// VPSRLD.BCST imm8 m32 k zmm
// VPSRLD.BCST imm8 m32 zmm
//
// Construct and append a VPSRLD.BCST instruction to the active function.
// Operates on the global context.
func VPSRLD_BCST(ops ...operand.Op) { ctx.VPSRLD_BCST(ops...) }
// VPSRLD_BCST_Z: Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLD.BCST.Z imm8 m32 k xmm
// VPSRLD.BCST.Z imm8 m32 k ymm
// VPSRLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSRLD.BCST.Z instruction to the active function.
func (c *Context) VPSRLD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSRLD_BCST_Z(i, m, k, xyz))
}
// VPSRLD_BCST_Z: Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLD.BCST.Z imm8 m32 k xmm
// VPSRLD.BCST.Z imm8 m32 k ymm
// VPSRLD.BCST.Z imm8 m32 k zmm
//
// Construct and append a VPSRLD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRLD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSRLD_BCST_Z(i, m, k, xyz) }
// VPSRLD_Z: Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLD.Z imm8 m128 k xmm
// VPSRLD.Z imm8 m256 k ymm
// VPSRLD.Z imm8 xmm k xmm
// VPSRLD.Z imm8 ymm k ymm
// VPSRLD.Z m128 xmm k xmm
// VPSRLD.Z m128 ymm k ymm
// VPSRLD.Z xmm xmm k xmm
// VPSRLD.Z xmm ymm k ymm
// VPSRLD.Z imm8 m512 k zmm
// VPSRLD.Z imm8 zmm k zmm
// VPSRLD.Z m128 zmm k zmm
// VPSRLD.Z xmm zmm k zmm
//
// Construct and append a VPSRLD.Z instruction to the active function.
func (c *Context) VPSRLD_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRLD_Z(imx, mxyz, k, xyz))
}
// VPSRLD_Z: Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLD.Z imm8 m128 k xmm
// VPSRLD.Z imm8 m256 k ymm
// VPSRLD.Z imm8 xmm k xmm
// VPSRLD.Z imm8 ymm k ymm
// VPSRLD.Z m128 xmm k xmm
// VPSRLD.Z m128 ymm k ymm
// VPSRLD.Z xmm xmm k xmm
// VPSRLD.Z xmm ymm k ymm
// VPSRLD.Z imm8 m512 k zmm
// VPSRLD.Z imm8 zmm k zmm
// VPSRLD.Z m128 zmm k zmm
// VPSRLD.Z xmm zmm k zmm
//
// Construct and append a VPSRLD.Z instruction to the active function.
// Operates on the global context.
func VPSRLD_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRLD_Z(imx, mxyz, k, xyz) }
// VPSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLQ imm8 ymm ymm
// VPSRLQ m128 ymm ymm
// VPSRLQ xmm ymm ymm
// VPSRLQ imm8 xmm xmm
// VPSRLQ m128 xmm xmm
// VPSRLQ xmm xmm xmm
// VPSRLQ imm8 m128 k xmm
// VPSRLQ imm8 m128 xmm
// VPSRLQ imm8 m256 k ymm
// VPSRLQ imm8 m256 ymm
// VPSRLQ imm8 xmm k xmm
// VPSRLQ imm8 ymm k ymm
// VPSRLQ m128 xmm k xmm
// VPSRLQ m128 ymm k ymm
// VPSRLQ xmm xmm k xmm
// VPSRLQ xmm ymm k ymm
// VPSRLQ imm8 m512 k zmm
// VPSRLQ imm8 m512 zmm
// VPSRLQ imm8 zmm k zmm
// VPSRLQ imm8 zmm zmm
// VPSRLQ m128 zmm k zmm
// VPSRLQ m128 zmm zmm
// VPSRLQ xmm zmm k zmm
// VPSRLQ xmm zmm zmm
//
// Construct and append a VPSRLQ instruction to the active function.
func (c *Context) VPSRLQ(ops ...operand.Op) {
c.addinstruction(x86.VPSRLQ(ops...))
}
// VPSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLQ imm8 ymm ymm
// VPSRLQ m128 ymm ymm
// VPSRLQ xmm ymm ymm
// VPSRLQ imm8 xmm xmm
// VPSRLQ m128 xmm xmm
// VPSRLQ xmm xmm xmm
// VPSRLQ imm8 m128 k xmm
// VPSRLQ imm8 m128 xmm
// VPSRLQ imm8 m256 k ymm
// VPSRLQ imm8 m256 ymm
// VPSRLQ imm8 xmm k xmm
// VPSRLQ imm8 ymm k ymm
// VPSRLQ m128 xmm k xmm
// VPSRLQ m128 ymm k ymm
// VPSRLQ xmm xmm k xmm
// VPSRLQ xmm ymm k ymm
// VPSRLQ imm8 m512 k zmm
// VPSRLQ imm8 m512 zmm
// VPSRLQ imm8 zmm k zmm
// VPSRLQ imm8 zmm zmm
// VPSRLQ m128 zmm k zmm
// VPSRLQ m128 zmm zmm
// VPSRLQ xmm zmm k zmm
// VPSRLQ xmm zmm zmm
//
// Construct and append a VPSRLQ instruction to the active function.
// Operates on the global context.
func VPSRLQ(ops ...operand.Op) { ctx.VPSRLQ(ops...) }
// VPSRLQ_BCST: Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLQ.BCST imm8 m64 k xmm
// VPSRLQ.BCST imm8 m64 k ymm
// VPSRLQ.BCST imm8 m64 xmm
// VPSRLQ.BCST imm8 m64 ymm
// VPSRLQ.BCST imm8 m64 k zmm
// VPSRLQ.BCST imm8 m64 zmm
//
// Construct and append a VPSRLQ.BCST instruction to the active function.
func (c *Context) VPSRLQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRLQ_BCST(ops...))
}
// VPSRLQ_BCST: Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLQ.BCST imm8 m64 k xmm
// VPSRLQ.BCST imm8 m64 k ymm
// VPSRLQ.BCST imm8 m64 xmm
// VPSRLQ.BCST imm8 m64 ymm
// VPSRLQ.BCST imm8 m64 k zmm
// VPSRLQ.BCST imm8 m64 zmm
//
// Construct and append a VPSRLQ.BCST instruction to the active function.
// Operates on the global context.
func VPSRLQ_BCST(ops ...operand.Op) { ctx.VPSRLQ_BCST(ops...) }
// VPSRLQ_BCST_Z: Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLQ.BCST.Z imm8 m64 k xmm
// VPSRLQ.BCST.Z imm8 m64 k ymm
// VPSRLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSRLQ.BCST.Z instruction to the active function.
func (c *Context) VPSRLQ_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VPSRLQ_BCST_Z(i, m, k, xyz))
}
// VPSRLQ_BCST_Z: Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLQ.BCST.Z imm8 m64 k xmm
// VPSRLQ.BCST.Z imm8 m64 k ymm
// VPSRLQ.BCST.Z imm8 m64 k zmm
//
// Construct and append a VPSRLQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRLQ_BCST_Z(i, m, k, xyz operand.Op) { ctx.VPSRLQ_BCST_Z(i, m, k, xyz) }
// VPSRLQ_Z: Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLQ.Z imm8 m128 k xmm
// VPSRLQ.Z imm8 m256 k ymm
// VPSRLQ.Z imm8 xmm k xmm
// VPSRLQ.Z imm8 ymm k ymm
// VPSRLQ.Z m128 xmm k xmm
// VPSRLQ.Z m128 ymm k ymm
// VPSRLQ.Z xmm xmm k xmm
// VPSRLQ.Z xmm ymm k ymm
// VPSRLQ.Z imm8 m512 k zmm
// VPSRLQ.Z imm8 zmm k zmm
// VPSRLQ.Z m128 zmm k zmm
// VPSRLQ.Z xmm zmm k zmm
//
// Construct and append a VPSRLQ.Z instruction to the active function.
func (c *Context) VPSRLQ_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRLQ_Z(imx, mxyz, k, xyz))
}
// VPSRLQ_Z: Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLQ.Z imm8 m128 k xmm
// VPSRLQ.Z imm8 m256 k ymm
// VPSRLQ.Z imm8 xmm k xmm
// VPSRLQ.Z imm8 ymm k ymm
// VPSRLQ.Z m128 xmm k xmm
// VPSRLQ.Z m128 ymm k ymm
// VPSRLQ.Z xmm xmm k xmm
// VPSRLQ.Z xmm ymm k ymm
// VPSRLQ.Z imm8 m512 k zmm
// VPSRLQ.Z imm8 zmm k zmm
// VPSRLQ.Z m128 zmm k zmm
// VPSRLQ.Z xmm zmm k zmm
//
// Construct and append a VPSRLQ.Z instruction to the active function.
// Operates on the global context.
func VPSRLQ_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRLQ_Z(imx, mxyz, k, xyz) }
// VPSRLVD: Variable Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLVD m128 xmm xmm
// VPSRLVD m256 ymm ymm
// VPSRLVD xmm xmm xmm
// VPSRLVD ymm ymm ymm
// VPSRLVD m128 xmm k xmm
// VPSRLVD m256 ymm k ymm
// VPSRLVD xmm xmm k xmm
// VPSRLVD ymm ymm k ymm
// VPSRLVD m512 zmm k zmm
// VPSRLVD m512 zmm zmm
// VPSRLVD zmm zmm k zmm
// VPSRLVD zmm zmm zmm
//
// Construct and append a VPSRLVD instruction to the active function.
func (c *Context) VPSRLVD(ops ...operand.Op) {
c.addinstruction(x86.VPSRLVD(ops...))
}
// VPSRLVD: Variable Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLVD m128 xmm xmm
// VPSRLVD m256 ymm ymm
// VPSRLVD xmm xmm xmm
// VPSRLVD ymm ymm ymm
// VPSRLVD m128 xmm k xmm
// VPSRLVD m256 ymm k ymm
// VPSRLVD xmm xmm k xmm
// VPSRLVD ymm ymm k ymm
// VPSRLVD m512 zmm k zmm
// VPSRLVD m512 zmm zmm
// VPSRLVD zmm zmm k zmm
// VPSRLVD zmm zmm zmm
//
// Construct and append a VPSRLVD instruction to the active function.
// Operates on the global context.
func VPSRLVD(ops ...operand.Op) { ctx.VPSRLVD(ops...) }
// VPSRLVD_BCST: Variable Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVD.BCST m32 xmm k xmm
// VPSRLVD.BCST m32 xmm xmm
// VPSRLVD.BCST m32 ymm k ymm
// VPSRLVD.BCST m32 ymm ymm
// VPSRLVD.BCST m32 zmm k zmm
// VPSRLVD.BCST m32 zmm zmm
//
// Construct and append a VPSRLVD.BCST instruction to the active function.
func (c *Context) VPSRLVD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRLVD_BCST(ops...))
}
// VPSRLVD_BCST: Variable Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVD.BCST m32 xmm k xmm
// VPSRLVD.BCST m32 xmm xmm
// VPSRLVD.BCST m32 ymm k ymm
// VPSRLVD.BCST m32 ymm ymm
// VPSRLVD.BCST m32 zmm k zmm
// VPSRLVD.BCST m32 zmm zmm
//
// Construct and append a VPSRLVD.BCST instruction to the active function.
// Operates on the global context.
func VPSRLVD_BCST(ops ...operand.Op) { ctx.VPSRLVD_BCST(ops...) }
// VPSRLVD_BCST_Z: Variable Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVD.BCST.Z m32 xmm k xmm
// VPSRLVD.BCST.Z m32 ymm k ymm
// VPSRLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSRLVD.BCST.Z instruction to the active function.
func (c *Context) VPSRLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRLVD_BCST_Z(m, xyz, k, xyz1))
}
// VPSRLVD_BCST_Z: Variable Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVD.BCST.Z m32 xmm k xmm
// VPSRLVD.BCST.Z m32 ymm k ymm
// VPSRLVD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSRLVD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSRLVD_BCST_Z(m, xyz, k, xyz1) }
// VPSRLVD_Z: Variable Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVD.Z m128 xmm k xmm
// VPSRLVD.Z m256 ymm k ymm
// VPSRLVD.Z xmm xmm k xmm
// VPSRLVD.Z ymm ymm k ymm
// VPSRLVD.Z m512 zmm k zmm
// VPSRLVD.Z zmm zmm k zmm
//
// Construct and append a VPSRLVD.Z instruction to the active function.
func (c *Context) VPSRLVD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRLVD_Z(mxyz, xyz, k, xyz1))
}
// VPSRLVD_Z: Variable Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVD.Z m128 xmm k xmm
// VPSRLVD.Z m256 ymm k ymm
// VPSRLVD.Z xmm xmm k xmm
// VPSRLVD.Z ymm ymm k ymm
// VPSRLVD.Z m512 zmm k zmm
// VPSRLVD.Z zmm zmm k zmm
//
// Construct and append a VPSRLVD.Z instruction to the active function.
// Operates on the global context.
func VPSRLVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRLVD_Z(mxyz, xyz, k, xyz1) }
// VPSRLVQ: Variable Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLVQ m128 xmm xmm
// VPSRLVQ m256 ymm ymm
// VPSRLVQ xmm xmm xmm
// VPSRLVQ ymm ymm ymm
// VPSRLVQ m128 xmm k xmm
// VPSRLVQ m256 ymm k ymm
// VPSRLVQ xmm xmm k xmm
// VPSRLVQ ymm ymm k ymm
// VPSRLVQ m512 zmm k zmm
// VPSRLVQ m512 zmm zmm
// VPSRLVQ zmm zmm k zmm
// VPSRLVQ zmm zmm zmm
//
// Construct and append a VPSRLVQ instruction to the active function.
func (c *Context) VPSRLVQ(ops ...operand.Op) {
c.addinstruction(x86.VPSRLVQ(ops...))
}
// VPSRLVQ: Variable Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLVQ m128 xmm xmm
// VPSRLVQ m256 ymm ymm
// VPSRLVQ xmm xmm xmm
// VPSRLVQ ymm ymm ymm
// VPSRLVQ m128 xmm k xmm
// VPSRLVQ m256 ymm k ymm
// VPSRLVQ xmm xmm k xmm
// VPSRLVQ ymm ymm k ymm
// VPSRLVQ m512 zmm k zmm
// VPSRLVQ m512 zmm zmm
// VPSRLVQ zmm zmm k zmm
// VPSRLVQ zmm zmm zmm
//
// Construct and append a VPSRLVQ instruction to the active function.
// Operates on the global context.
func VPSRLVQ(ops ...operand.Op) { ctx.VPSRLVQ(ops...) }
// VPSRLVQ_BCST: Variable Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVQ.BCST m64 xmm k xmm
// VPSRLVQ.BCST m64 xmm xmm
// VPSRLVQ.BCST m64 ymm k ymm
// VPSRLVQ.BCST m64 ymm ymm
// VPSRLVQ.BCST m64 zmm k zmm
// VPSRLVQ.BCST m64 zmm zmm
//
// Construct and append a VPSRLVQ.BCST instruction to the active function.
func (c *Context) VPSRLVQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSRLVQ_BCST(ops...))
}
// VPSRLVQ_BCST: Variable Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVQ.BCST m64 xmm k xmm
// VPSRLVQ.BCST m64 xmm xmm
// VPSRLVQ.BCST m64 ymm k ymm
// VPSRLVQ.BCST m64 ymm ymm
// VPSRLVQ.BCST m64 zmm k zmm
// VPSRLVQ.BCST m64 zmm zmm
//
// Construct and append a VPSRLVQ.BCST instruction to the active function.
// Operates on the global context.
func VPSRLVQ_BCST(ops ...operand.Op) { ctx.VPSRLVQ_BCST(ops...) }
// VPSRLVQ_BCST_Z: Variable Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.BCST.Z m64 xmm k xmm
// VPSRLVQ.BCST.Z m64 ymm k ymm
// VPSRLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSRLVQ.BCST.Z instruction to the active function.
func (c *Context) VPSRLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRLVQ_BCST_Z(m, xyz, k, xyz1))
}
// VPSRLVQ_BCST_Z: Variable Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.BCST.Z m64 xmm k xmm
// VPSRLVQ.BCST.Z m64 ymm k ymm
// VPSRLVQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSRLVQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSRLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSRLVQ_BCST_Z(m, xyz, k, xyz1) }
// VPSRLVQ_Z: Variable Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.Z m128 xmm k xmm
// VPSRLVQ.Z m256 ymm k ymm
// VPSRLVQ.Z xmm xmm k xmm
// VPSRLVQ.Z ymm ymm k ymm
// VPSRLVQ.Z m512 zmm k zmm
// VPSRLVQ.Z zmm zmm k zmm
//
// Construct and append a VPSRLVQ.Z instruction to the active function.
func (c *Context) VPSRLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRLVQ_Z(mxyz, xyz, k, xyz1))
}
// VPSRLVQ_Z: Variable Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.Z m128 xmm k xmm
// VPSRLVQ.Z m256 ymm k ymm
// VPSRLVQ.Z xmm xmm k xmm
// VPSRLVQ.Z ymm ymm k ymm
// VPSRLVQ.Z m512 zmm k zmm
// VPSRLVQ.Z zmm zmm k zmm
//
// Construct and append a VPSRLVQ.Z instruction to the active function.
// Operates on the global context.
func VPSRLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRLVQ_Z(mxyz, xyz, k, xyz1) }
// VPSRLVW: Variable Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLVW m128 xmm k xmm
// VPSRLVW m128 xmm xmm
// VPSRLVW m256 ymm k ymm
// VPSRLVW m256 ymm ymm
// VPSRLVW xmm xmm k xmm
// VPSRLVW xmm xmm xmm
// VPSRLVW ymm ymm k ymm
// VPSRLVW ymm ymm ymm
// VPSRLVW m512 zmm k zmm
// VPSRLVW m512 zmm zmm
// VPSRLVW zmm zmm k zmm
// VPSRLVW zmm zmm zmm
//
// Construct and append a VPSRLVW instruction to the active function.
func (c *Context) VPSRLVW(ops ...operand.Op) {
c.addinstruction(x86.VPSRLVW(ops...))
}
// VPSRLVW: Variable Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLVW m128 xmm k xmm
// VPSRLVW m128 xmm xmm
// VPSRLVW m256 ymm k ymm
// VPSRLVW m256 ymm ymm
// VPSRLVW xmm xmm k xmm
// VPSRLVW xmm xmm xmm
// VPSRLVW ymm ymm k ymm
// VPSRLVW ymm ymm ymm
// VPSRLVW m512 zmm k zmm
// VPSRLVW m512 zmm zmm
// VPSRLVW zmm zmm k zmm
// VPSRLVW zmm zmm zmm
//
// Construct and append a VPSRLVW instruction to the active function.
// Operates on the global context.
func VPSRLVW(ops ...operand.Op) { ctx.VPSRLVW(ops...) }
// VPSRLVW_Z: Variable Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVW.Z m128 xmm k xmm
// VPSRLVW.Z m256 ymm k ymm
// VPSRLVW.Z xmm xmm k xmm
// VPSRLVW.Z ymm ymm k ymm
// VPSRLVW.Z m512 zmm k zmm
// VPSRLVW.Z zmm zmm k zmm
//
// Construct and append a VPSRLVW.Z instruction to the active function.
func (c *Context) VPSRLVW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSRLVW_Z(mxyz, xyz, k, xyz1))
}
// VPSRLVW_Z: Variable Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVW.Z m128 xmm k xmm
// VPSRLVW.Z m256 ymm k ymm
// VPSRLVW.Z xmm xmm k xmm
// VPSRLVW.Z ymm ymm k ymm
// VPSRLVW.Z m512 zmm k zmm
// VPSRLVW.Z zmm zmm k zmm
//
// Construct and append a VPSRLVW.Z instruction to the active function.
// Operates on the global context.
func VPSRLVW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSRLVW_Z(mxyz, xyz, k, xyz1) }
// VPSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLW imm8 ymm ymm
// VPSRLW m128 ymm ymm
// VPSRLW xmm ymm ymm
// VPSRLW imm8 xmm xmm
// VPSRLW m128 xmm xmm
// VPSRLW xmm xmm xmm
// VPSRLW imm8 m128 k xmm
// VPSRLW imm8 m128 xmm
// VPSRLW imm8 m256 k ymm
// VPSRLW imm8 m256 ymm
// VPSRLW imm8 xmm k xmm
// VPSRLW imm8 ymm k ymm
// VPSRLW m128 xmm k xmm
// VPSRLW m128 ymm k ymm
// VPSRLW xmm xmm k xmm
// VPSRLW xmm ymm k ymm
// VPSRLW imm8 m512 k zmm
// VPSRLW imm8 m512 zmm
// VPSRLW imm8 zmm k zmm
// VPSRLW imm8 zmm zmm
// VPSRLW m128 zmm k zmm
// VPSRLW m128 zmm zmm
// VPSRLW xmm zmm k zmm
// VPSRLW xmm zmm zmm
//
// Construct and append a VPSRLW instruction to the active function.
func (c *Context) VPSRLW(ops ...operand.Op) {
c.addinstruction(x86.VPSRLW(ops...))
}
// VPSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLW imm8 ymm ymm
// VPSRLW m128 ymm ymm
// VPSRLW xmm ymm ymm
// VPSRLW imm8 xmm xmm
// VPSRLW m128 xmm xmm
// VPSRLW xmm xmm xmm
// VPSRLW imm8 m128 k xmm
// VPSRLW imm8 m128 xmm
// VPSRLW imm8 m256 k ymm
// VPSRLW imm8 m256 ymm
// VPSRLW imm8 xmm k xmm
// VPSRLW imm8 ymm k ymm
// VPSRLW m128 xmm k xmm
// VPSRLW m128 ymm k ymm
// VPSRLW xmm xmm k xmm
// VPSRLW xmm ymm k ymm
// VPSRLW imm8 m512 k zmm
// VPSRLW imm8 m512 zmm
// VPSRLW imm8 zmm k zmm
// VPSRLW imm8 zmm zmm
// VPSRLW m128 zmm k zmm
// VPSRLW m128 zmm zmm
// VPSRLW xmm zmm k zmm
// VPSRLW xmm zmm zmm
//
// Construct and append a VPSRLW instruction to the active function.
// Operates on the global context.
func VPSRLW(ops ...operand.Op) { ctx.VPSRLW(ops...) }
// VPSRLW_Z: Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLW.Z imm8 m128 k xmm
// VPSRLW.Z imm8 m256 k ymm
// VPSRLW.Z imm8 xmm k xmm
// VPSRLW.Z imm8 ymm k ymm
// VPSRLW.Z m128 xmm k xmm
// VPSRLW.Z m128 ymm k ymm
// VPSRLW.Z xmm xmm k xmm
// VPSRLW.Z xmm ymm k ymm
// VPSRLW.Z imm8 m512 k zmm
// VPSRLW.Z imm8 zmm k zmm
// VPSRLW.Z m128 zmm k zmm
// VPSRLW.Z xmm zmm k zmm
//
// Construct and append a VPSRLW.Z instruction to the active function.
func (c *Context) VPSRLW_Z(imx, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VPSRLW_Z(imx, mxyz, k, xyz))
}
// VPSRLW_Z: Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLW.Z imm8 m128 k xmm
// VPSRLW.Z imm8 m256 k ymm
// VPSRLW.Z imm8 xmm k xmm
// VPSRLW.Z imm8 ymm k ymm
// VPSRLW.Z m128 xmm k xmm
// VPSRLW.Z m128 ymm k ymm
// VPSRLW.Z xmm xmm k xmm
// VPSRLW.Z xmm ymm k ymm
// VPSRLW.Z imm8 m512 k zmm
// VPSRLW.Z imm8 zmm k zmm
// VPSRLW.Z m128 zmm k zmm
// VPSRLW.Z xmm zmm k zmm
//
// Construct and append a VPSRLW.Z instruction to the active function.
// Operates on the global context.
func VPSRLW_Z(imx, mxyz, k, xyz operand.Op) { ctx.VPSRLW_Z(imx, mxyz, k, xyz) }
// VPSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// VPSUBB m256 ymm ymm
// VPSUBB ymm ymm ymm
// VPSUBB m128 xmm xmm
// VPSUBB xmm xmm xmm
// VPSUBB m128 xmm k xmm
// VPSUBB m256 ymm k ymm
// VPSUBB xmm xmm k xmm
// VPSUBB ymm ymm k ymm
// VPSUBB m512 zmm k zmm
// VPSUBB m512 zmm zmm
// VPSUBB zmm zmm k zmm
// VPSUBB zmm zmm zmm
//
// Construct and append a VPSUBB instruction to the active function.
func (c *Context) VPSUBB(ops ...operand.Op) {
c.addinstruction(x86.VPSUBB(ops...))
}
// VPSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// VPSUBB m256 ymm ymm
// VPSUBB ymm ymm ymm
// VPSUBB m128 xmm xmm
// VPSUBB xmm xmm xmm
// VPSUBB m128 xmm k xmm
// VPSUBB m256 ymm k ymm
// VPSUBB xmm xmm k xmm
// VPSUBB ymm ymm k ymm
// VPSUBB m512 zmm k zmm
// VPSUBB m512 zmm zmm
// VPSUBB zmm zmm k zmm
// VPSUBB zmm zmm zmm
//
// Construct and append a VPSUBB instruction to the active function.
// Operates on the global context.
func VPSUBB(ops ...operand.Op) { ctx.VPSUBB(ops...) }
// VPSUBB_Z: Subtract Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBB.Z m128 xmm k xmm
// VPSUBB.Z m256 ymm k ymm
// VPSUBB.Z xmm xmm k xmm
// VPSUBB.Z ymm ymm k ymm
// VPSUBB.Z m512 zmm k zmm
// VPSUBB.Z zmm zmm k zmm
//
// Construct and append a VPSUBB.Z instruction to the active function.
func (c *Context) VPSUBB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBB_Z(mxyz, xyz, k, xyz1))
}
// VPSUBB_Z: Subtract Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBB.Z m128 xmm k xmm
// VPSUBB.Z m256 ymm k ymm
// VPSUBB.Z xmm xmm k xmm
// VPSUBB.Z ymm ymm k ymm
// VPSUBB.Z m512 zmm k zmm
// VPSUBB.Z zmm zmm k zmm
//
// Construct and append a VPSUBB.Z instruction to the active function.
// Operates on the global context.
func VPSUBB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBB_Z(mxyz, xyz, k, xyz1) }
// VPSUBD: Subtract Packed Doubleword Integers.
//
// Forms:
//
// VPSUBD m256 ymm ymm
// VPSUBD ymm ymm ymm
// VPSUBD m128 xmm xmm
// VPSUBD xmm xmm xmm
// VPSUBD m128 xmm k xmm
// VPSUBD m256 ymm k ymm
// VPSUBD xmm xmm k xmm
// VPSUBD ymm ymm k ymm
// VPSUBD m512 zmm k zmm
// VPSUBD m512 zmm zmm
// VPSUBD zmm zmm k zmm
// VPSUBD zmm zmm zmm
//
// Construct and append a VPSUBD instruction to the active function.
func (c *Context) VPSUBD(ops ...operand.Op) {
c.addinstruction(x86.VPSUBD(ops...))
}
// VPSUBD: Subtract Packed Doubleword Integers.
//
// Forms:
//
// VPSUBD m256 ymm ymm
// VPSUBD ymm ymm ymm
// VPSUBD m128 xmm xmm
// VPSUBD xmm xmm xmm
// VPSUBD m128 xmm k xmm
// VPSUBD m256 ymm k ymm
// VPSUBD xmm xmm k xmm
// VPSUBD ymm ymm k ymm
// VPSUBD m512 zmm k zmm
// VPSUBD m512 zmm zmm
// VPSUBD zmm zmm k zmm
// VPSUBD zmm zmm zmm
//
// Construct and append a VPSUBD instruction to the active function.
// Operates on the global context.
func VPSUBD(ops ...operand.Op) { ctx.VPSUBD(ops...) }
// VPSUBD_BCST: Subtract Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPSUBD.BCST m32 xmm k xmm
// VPSUBD.BCST m32 xmm xmm
// VPSUBD.BCST m32 ymm k ymm
// VPSUBD.BCST m32 ymm ymm
// VPSUBD.BCST m32 zmm k zmm
// VPSUBD.BCST m32 zmm zmm
//
// Construct and append a VPSUBD.BCST instruction to the active function.
func (c *Context) VPSUBD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSUBD_BCST(ops...))
}
// VPSUBD_BCST: Subtract Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPSUBD.BCST m32 xmm k xmm
// VPSUBD.BCST m32 xmm xmm
// VPSUBD.BCST m32 ymm k ymm
// VPSUBD.BCST m32 ymm ymm
// VPSUBD.BCST m32 zmm k zmm
// VPSUBD.BCST m32 zmm zmm
//
// Construct and append a VPSUBD.BCST instruction to the active function.
// Operates on the global context.
func VPSUBD_BCST(ops ...operand.Op) { ctx.VPSUBD_BCST(ops...) }
// VPSUBD_BCST_Z: Subtract Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBD.BCST.Z m32 xmm k xmm
// VPSUBD.BCST.Z m32 ymm k ymm
// VPSUBD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSUBD.BCST.Z instruction to the active function.
func (c *Context) VPSUBD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBD_BCST_Z(m, xyz, k, xyz1))
}
// VPSUBD_BCST_Z: Subtract Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBD.BCST.Z m32 xmm k xmm
// VPSUBD.BCST.Z m32 ymm k ymm
// VPSUBD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPSUBD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSUBD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSUBD_BCST_Z(m, xyz, k, xyz1) }
// VPSUBD_Z: Subtract Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBD.Z m128 xmm k xmm
// VPSUBD.Z m256 ymm k ymm
// VPSUBD.Z xmm xmm k xmm
// VPSUBD.Z ymm ymm k ymm
// VPSUBD.Z m512 zmm k zmm
// VPSUBD.Z zmm zmm k zmm
//
// Construct and append a VPSUBD.Z instruction to the active function.
func (c *Context) VPSUBD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBD_Z(mxyz, xyz, k, xyz1))
}
// VPSUBD_Z: Subtract Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBD.Z m128 xmm k xmm
// VPSUBD.Z m256 ymm k ymm
// VPSUBD.Z xmm xmm k xmm
// VPSUBD.Z ymm ymm k ymm
// VPSUBD.Z m512 zmm k zmm
// VPSUBD.Z zmm zmm k zmm
//
// Construct and append a VPSUBD.Z instruction to the active function.
// Operates on the global context.
func VPSUBD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBD_Z(mxyz, xyz, k, xyz1) }
// VPSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// VPSUBQ m256 ymm ymm
// VPSUBQ ymm ymm ymm
// VPSUBQ m128 xmm xmm
// VPSUBQ xmm xmm xmm
// VPSUBQ m128 xmm k xmm
// VPSUBQ m256 ymm k ymm
// VPSUBQ xmm xmm k xmm
// VPSUBQ ymm ymm k ymm
// VPSUBQ m512 zmm k zmm
// VPSUBQ m512 zmm zmm
// VPSUBQ zmm zmm k zmm
// VPSUBQ zmm zmm zmm
//
// Construct and append a VPSUBQ instruction to the active function.
func (c *Context) VPSUBQ(ops ...operand.Op) {
c.addinstruction(x86.VPSUBQ(ops...))
}
// VPSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// VPSUBQ m256 ymm ymm
// VPSUBQ ymm ymm ymm
// VPSUBQ m128 xmm xmm
// VPSUBQ xmm xmm xmm
// VPSUBQ m128 xmm k xmm
// VPSUBQ m256 ymm k ymm
// VPSUBQ xmm xmm k xmm
// VPSUBQ ymm ymm k ymm
// VPSUBQ m512 zmm k zmm
// VPSUBQ m512 zmm zmm
// VPSUBQ zmm zmm k zmm
// VPSUBQ zmm zmm zmm
//
// Construct and append a VPSUBQ instruction to the active function.
// Operates on the global context.
func VPSUBQ(ops ...operand.Op) { ctx.VPSUBQ(ops...) }
// VPSUBQ_BCST: Subtract Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPSUBQ.BCST m64 xmm k xmm
// VPSUBQ.BCST m64 xmm xmm
// VPSUBQ.BCST m64 ymm k ymm
// VPSUBQ.BCST m64 ymm ymm
// VPSUBQ.BCST m64 zmm k zmm
// VPSUBQ.BCST m64 zmm zmm
//
// Construct and append a VPSUBQ.BCST instruction to the active function.
func (c *Context) VPSUBQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPSUBQ_BCST(ops...))
}
// VPSUBQ_BCST: Subtract Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPSUBQ.BCST m64 xmm k xmm
// VPSUBQ.BCST m64 xmm xmm
// VPSUBQ.BCST m64 ymm k ymm
// VPSUBQ.BCST m64 ymm ymm
// VPSUBQ.BCST m64 zmm k zmm
// VPSUBQ.BCST m64 zmm zmm
//
// Construct and append a VPSUBQ.BCST instruction to the active function.
// Operates on the global context.
func VPSUBQ_BCST(ops ...operand.Op) { ctx.VPSUBQ_BCST(ops...) }
// VPSUBQ_BCST_Z: Subtract Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBQ.BCST.Z m64 xmm k xmm
// VPSUBQ.BCST.Z m64 ymm k ymm
// VPSUBQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSUBQ.BCST.Z instruction to the active function.
func (c *Context) VPSUBQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBQ_BCST_Z(m, xyz, k, xyz1))
}
// VPSUBQ_BCST_Z: Subtract Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBQ.BCST.Z m64 xmm k xmm
// VPSUBQ.BCST.Z m64 ymm k ymm
// VPSUBQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPSUBQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPSUBQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSUBQ_BCST_Z(m, xyz, k, xyz1) }
// VPSUBQ_Z: Subtract Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBQ.Z m128 xmm k xmm
// VPSUBQ.Z m256 ymm k ymm
// VPSUBQ.Z xmm xmm k xmm
// VPSUBQ.Z ymm ymm k ymm
// VPSUBQ.Z m512 zmm k zmm
// VPSUBQ.Z zmm zmm k zmm
//
// Construct and append a VPSUBQ.Z instruction to the active function.
func (c *Context) VPSUBQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBQ_Z(mxyz, xyz, k, xyz1))
}
// VPSUBQ_Z: Subtract Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBQ.Z m128 xmm k xmm
// VPSUBQ.Z m256 ymm k ymm
// VPSUBQ.Z xmm xmm k xmm
// VPSUBQ.Z ymm ymm k ymm
// VPSUBQ.Z m512 zmm k zmm
// VPSUBQ.Z zmm zmm k zmm
//
// Construct and append a VPSUBQ.Z instruction to the active function.
// Operates on the global context.
func VPSUBQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBQ_Z(mxyz, xyz, k, xyz1) }
// VPSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSB m256 ymm ymm
// VPSUBSB ymm ymm ymm
// VPSUBSB m128 xmm xmm
// VPSUBSB xmm xmm xmm
// VPSUBSB m128 xmm k xmm
// VPSUBSB m256 ymm k ymm
// VPSUBSB xmm xmm k xmm
// VPSUBSB ymm ymm k ymm
// VPSUBSB m512 zmm k zmm
// VPSUBSB m512 zmm zmm
// VPSUBSB zmm zmm k zmm
// VPSUBSB zmm zmm zmm
//
// Construct and append a VPSUBSB instruction to the active function.
func (c *Context) VPSUBSB(ops ...operand.Op) {
c.addinstruction(x86.VPSUBSB(ops...))
}
// VPSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSB m256 ymm ymm
// VPSUBSB ymm ymm ymm
// VPSUBSB m128 xmm xmm
// VPSUBSB xmm xmm xmm
// VPSUBSB m128 xmm k xmm
// VPSUBSB m256 ymm k ymm
// VPSUBSB xmm xmm k xmm
// VPSUBSB ymm ymm k ymm
// VPSUBSB m512 zmm k zmm
// VPSUBSB m512 zmm zmm
// VPSUBSB zmm zmm k zmm
// VPSUBSB zmm zmm zmm
//
// Construct and append a VPSUBSB instruction to the active function.
// Operates on the global context.
func VPSUBSB(ops ...operand.Op) { ctx.VPSUBSB(ops...) }
// VPSUBSB_Z: Subtract Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSB.Z m128 xmm k xmm
// VPSUBSB.Z m256 ymm k ymm
// VPSUBSB.Z xmm xmm k xmm
// VPSUBSB.Z ymm ymm k ymm
// VPSUBSB.Z m512 zmm k zmm
// VPSUBSB.Z zmm zmm k zmm
//
// Construct and append a VPSUBSB.Z instruction to the active function.
func (c *Context) VPSUBSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBSB_Z(mxyz, xyz, k, xyz1))
}
// VPSUBSB_Z: Subtract Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSB.Z m128 xmm k xmm
// VPSUBSB.Z m256 ymm k ymm
// VPSUBSB.Z xmm xmm k xmm
// VPSUBSB.Z ymm ymm k ymm
// VPSUBSB.Z m512 zmm k zmm
// VPSUBSB.Z zmm zmm k zmm
//
// Construct and append a VPSUBSB.Z instruction to the active function.
// Operates on the global context.
func VPSUBSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBSB_Z(mxyz, xyz, k, xyz1) }
// VPSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSW m256 ymm ymm
// VPSUBSW ymm ymm ymm
// VPSUBSW m128 xmm xmm
// VPSUBSW xmm xmm xmm
// VPSUBSW m128 xmm k xmm
// VPSUBSW m256 ymm k ymm
// VPSUBSW xmm xmm k xmm
// VPSUBSW ymm ymm k ymm
// VPSUBSW m512 zmm k zmm
// VPSUBSW m512 zmm zmm
// VPSUBSW zmm zmm k zmm
// VPSUBSW zmm zmm zmm
//
// Construct and append a VPSUBSW instruction to the active function.
func (c *Context) VPSUBSW(ops ...operand.Op) {
c.addinstruction(x86.VPSUBSW(ops...))
}
// VPSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSW m256 ymm ymm
// VPSUBSW ymm ymm ymm
// VPSUBSW m128 xmm xmm
// VPSUBSW xmm xmm xmm
// VPSUBSW m128 xmm k xmm
// VPSUBSW m256 ymm k ymm
// VPSUBSW xmm xmm k xmm
// VPSUBSW ymm ymm k ymm
// VPSUBSW m512 zmm k zmm
// VPSUBSW m512 zmm zmm
// VPSUBSW zmm zmm k zmm
// VPSUBSW zmm zmm zmm
//
// Construct and append a VPSUBSW instruction to the active function.
// Operates on the global context.
func VPSUBSW(ops ...operand.Op) { ctx.VPSUBSW(ops...) }
// VPSUBSW_Z: Subtract Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSW.Z m128 xmm k xmm
// VPSUBSW.Z m256 ymm k ymm
// VPSUBSW.Z xmm xmm k xmm
// VPSUBSW.Z ymm ymm k ymm
// VPSUBSW.Z m512 zmm k zmm
// VPSUBSW.Z zmm zmm k zmm
//
// Construct and append a VPSUBSW.Z instruction to the active function.
func (c *Context) VPSUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBSW_Z(mxyz, xyz, k, xyz1))
}
// VPSUBSW_Z: Subtract Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSW.Z m128 xmm k xmm
// VPSUBSW.Z m256 ymm k ymm
// VPSUBSW.Z xmm xmm k xmm
// VPSUBSW.Z ymm ymm k ymm
// VPSUBSW.Z m512 zmm k zmm
// VPSUBSW.Z zmm zmm k zmm
//
// Construct and append a VPSUBSW.Z instruction to the active function.
// Operates on the global context.
func VPSUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBSW_Z(mxyz, xyz, k, xyz1) }
// VPSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSB m256 ymm ymm
// VPSUBUSB ymm ymm ymm
// VPSUBUSB m128 xmm xmm
// VPSUBUSB xmm xmm xmm
// VPSUBUSB m128 xmm k xmm
// VPSUBUSB m256 ymm k ymm
// VPSUBUSB xmm xmm k xmm
// VPSUBUSB ymm ymm k ymm
// VPSUBUSB m512 zmm k zmm
// VPSUBUSB m512 zmm zmm
// VPSUBUSB zmm zmm k zmm
// VPSUBUSB zmm zmm zmm
//
// Construct and append a VPSUBUSB instruction to the active function.
func (c *Context) VPSUBUSB(ops ...operand.Op) {
c.addinstruction(x86.VPSUBUSB(ops...))
}
// VPSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSB m256 ymm ymm
// VPSUBUSB ymm ymm ymm
// VPSUBUSB m128 xmm xmm
// VPSUBUSB xmm xmm xmm
// VPSUBUSB m128 xmm k xmm
// VPSUBUSB m256 ymm k ymm
// VPSUBUSB xmm xmm k xmm
// VPSUBUSB ymm ymm k ymm
// VPSUBUSB m512 zmm k zmm
// VPSUBUSB m512 zmm zmm
// VPSUBUSB zmm zmm k zmm
// VPSUBUSB zmm zmm zmm
//
// Construct and append a VPSUBUSB instruction to the active function.
// Operates on the global context.
func VPSUBUSB(ops ...operand.Op) { ctx.VPSUBUSB(ops...) }
// VPSUBUSB_Z: Subtract Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSB.Z m128 xmm k xmm
// VPSUBUSB.Z m256 ymm k ymm
// VPSUBUSB.Z xmm xmm k xmm
// VPSUBUSB.Z ymm ymm k ymm
// VPSUBUSB.Z m512 zmm k zmm
// VPSUBUSB.Z zmm zmm k zmm
//
// Construct and append a VPSUBUSB.Z instruction to the active function.
func (c *Context) VPSUBUSB_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBUSB_Z(mxyz, xyz, k, xyz1))
}
// VPSUBUSB_Z: Subtract Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSB.Z m128 xmm k xmm
// VPSUBUSB.Z m256 ymm k ymm
// VPSUBUSB.Z xmm xmm k xmm
// VPSUBUSB.Z ymm ymm k ymm
// VPSUBUSB.Z m512 zmm k zmm
// VPSUBUSB.Z zmm zmm k zmm
//
// Construct and append a VPSUBUSB.Z instruction to the active function.
// Operates on the global context.
func VPSUBUSB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBUSB_Z(mxyz, xyz, k, xyz1) }
// VPSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSW m256 ymm ymm
// VPSUBUSW ymm ymm ymm
// VPSUBUSW m128 xmm xmm
// VPSUBUSW xmm xmm xmm
// VPSUBUSW m128 xmm k xmm
// VPSUBUSW m256 ymm k ymm
// VPSUBUSW xmm xmm k xmm
// VPSUBUSW ymm ymm k ymm
// VPSUBUSW m512 zmm k zmm
// VPSUBUSW m512 zmm zmm
// VPSUBUSW zmm zmm k zmm
// VPSUBUSW zmm zmm zmm
//
// Construct and append a VPSUBUSW instruction to the active function.
func (c *Context) VPSUBUSW(ops ...operand.Op) {
c.addinstruction(x86.VPSUBUSW(ops...))
}
// VPSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSW m256 ymm ymm
// VPSUBUSW ymm ymm ymm
// VPSUBUSW m128 xmm xmm
// VPSUBUSW xmm xmm xmm
// VPSUBUSW m128 xmm k xmm
// VPSUBUSW m256 ymm k ymm
// VPSUBUSW xmm xmm k xmm
// VPSUBUSW ymm ymm k ymm
// VPSUBUSW m512 zmm k zmm
// VPSUBUSW m512 zmm zmm
// VPSUBUSW zmm zmm k zmm
// VPSUBUSW zmm zmm zmm
//
// Construct and append a VPSUBUSW instruction to the active function.
// Operates on the global context.
func VPSUBUSW(ops ...operand.Op) { ctx.VPSUBUSW(ops...) }
// VPSUBUSW_Z: Subtract Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSW.Z m128 xmm k xmm
// VPSUBUSW.Z m256 ymm k ymm
// VPSUBUSW.Z xmm xmm k xmm
// VPSUBUSW.Z ymm ymm k ymm
// VPSUBUSW.Z m512 zmm k zmm
// VPSUBUSW.Z zmm zmm k zmm
//
// Construct and append a VPSUBUSW.Z instruction to the active function.
func (c *Context) VPSUBUSW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBUSW_Z(mxyz, xyz, k, xyz1))
}
// VPSUBUSW_Z: Subtract Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSW.Z m128 xmm k xmm
// VPSUBUSW.Z m256 ymm k ymm
// VPSUBUSW.Z xmm xmm k xmm
// VPSUBUSW.Z ymm ymm k ymm
// VPSUBUSW.Z m512 zmm k zmm
// VPSUBUSW.Z zmm zmm k zmm
//
// Construct and append a VPSUBUSW.Z instruction to the active function.
// Operates on the global context.
func VPSUBUSW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBUSW_Z(mxyz, xyz, k, xyz1) }
// VPSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// VPSUBW m256 ymm ymm
// VPSUBW ymm ymm ymm
// VPSUBW m128 xmm xmm
// VPSUBW xmm xmm xmm
// VPSUBW m128 xmm k xmm
// VPSUBW m256 ymm k ymm
// VPSUBW xmm xmm k xmm
// VPSUBW ymm ymm k ymm
// VPSUBW m512 zmm k zmm
// VPSUBW m512 zmm zmm
// VPSUBW zmm zmm k zmm
// VPSUBW zmm zmm zmm
//
// Construct and append a VPSUBW instruction to the active function.
func (c *Context) VPSUBW(ops ...operand.Op) {
c.addinstruction(x86.VPSUBW(ops...))
}
// VPSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// VPSUBW m256 ymm ymm
// VPSUBW ymm ymm ymm
// VPSUBW m128 xmm xmm
// VPSUBW xmm xmm xmm
// VPSUBW m128 xmm k xmm
// VPSUBW m256 ymm k ymm
// VPSUBW xmm xmm k xmm
// VPSUBW ymm ymm k ymm
// VPSUBW m512 zmm k zmm
// VPSUBW m512 zmm zmm
// VPSUBW zmm zmm k zmm
// VPSUBW zmm zmm zmm
//
// Construct and append a VPSUBW instruction to the active function.
// Operates on the global context.
func VPSUBW(ops ...operand.Op) { ctx.VPSUBW(ops...) }
// VPSUBW_Z: Subtract Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBW.Z m128 xmm k xmm
// VPSUBW.Z m256 ymm k ymm
// VPSUBW.Z xmm xmm k xmm
// VPSUBW.Z ymm ymm k ymm
// VPSUBW.Z m512 zmm k zmm
// VPSUBW.Z zmm zmm k zmm
//
// Construct and append a VPSUBW.Z instruction to the active function.
func (c *Context) VPSUBW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPSUBW_Z(mxyz, xyz, k, xyz1))
}
// VPSUBW_Z: Subtract Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBW.Z m128 xmm k xmm
// VPSUBW.Z m256 ymm k ymm
// VPSUBW.Z xmm xmm k xmm
// VPSUBW.Z ymm ymm k ymm
// VPSUBW.Z m512 zmm k zmm
// VPSUBW.Z zmm zmm k zmm
//
// Construct and append a VPSUBW.Z instruction to the active function.
// Operates on the global context.
func VPSUBW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSUBW_Z(mxyz, xyz, k, xyz1) }
// VPTERNLOGD: Bitwise Ternary Logical Operation on Doubleword Values.
//
// Forms:
//
// VPTERNLOGD imm8 m128 xmm k xmm
// VPTERNLOGD imm8 m128 xmm xmm
// VPTERNLOGD imm8 m256 ymm k ymm
// VPTERNLOGD imm8 m256 ymm ymm
// VPTERNLOGD imm8 xmm xmm k xmm
// VPTERNLOGD imm8 xmm xmm xmm
// VPTERNLOGD imm8 ymm ymm k ymm
// VPTERNLOGD imm8 ymm ymm ymm
// VPTERNLOGD imm8 m512 zmm k zmm
// VPTERNLOGD imm8 m512 zmm zmm
// VPTERNLOGD imm8 zmm zmm k zmm
// VPTERNLOGD imm8 zmm zmm zmm
//
// Construct and append a VPTERNLOGD instruction to the active function.
func (c *Context) VPTERNLOGD(ops ...operand.Op) {
c.addinstruction(x86.VPTERNLOGD(ops...))
}
// VPTERNLOGD: Bitwise Ternary Logical Operation on Doubleword Values.
//
// Forms:
//
// VPTERNLOGD imm8 m128 xmm k xmm
// VPTERNLOGD imm8 m128 xmm xmm
// VPTERNLOGD imm8 m256 ymm k ymm
// VPTERNLOGD imm8 m256 ymm ymm
// VPTERNLOGD imm8 xmm xmm k xmm
// VPTERNLOGD imm8 xmm xmm xmm
// VPTERNLOGD imm8 ymm ymm k ymm
// VPTERNLOGD imm8 ymm ymm ymm
// VPTERNLOGD imm8 m512 zmm k zmm
// VPTERNLOGD imm8 m512 zmm zmm
// VPTERNLOGD imm8 zmm zmm k zmm
// VPTERNLOGD imm8 zmm zmm zmm
//
// Construct and append a VPTERNLOGD instruction to the active function.
// Operates on the global context.
func VPTERNLOGD(ops ...operand.Op) { ctx.VPTERNLOGD(ops...) }
// VPTERNLOGD_BCST: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGD.BCST imm8 m32 xmm k xmm
// VPTERNLOGD.BCST imm8 m32 xmm xmm
// VPTERNLOGD.BCST imm8 m32 ymm k ymm
// VPTERNLOGD.BCST imm8 m32 ymm ymm
// VPTERNLOGD.BCST imm8 m32 zmm k zmm
// VPTERNLOGD.BCST imm8 m32 zmm zmm
//
// Construct and append a VPTERNLOGD.BCST instruction to the active function.
func (c *Context) VPTERNLOGD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTERNLOGD_BCST(ops...))
}
// VPTERNLOGD_BCST: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGD.BCST imm8 m32 xmm k xmm
// VPTERNLOGD.BCST imm8 m32 xmm xmm
// VPTERNLOGD.BCST imm8 m32 ymm k ymm
// VPTERNLOGD.BCST imm8 m32 ymm ymm
// VPTERNLOGD.BCST imm8 m32 zmm k zmm
// VPTERNLOGD.BCST imm8 m32 zmm zmm
//
// Construct and append a VPTERNLOGD.BCST instruction to the active function.
// Operates on the global context.
func VPTERNLOGD_BCST(ops ...operand.Op) { ctx.VPTERNLOGD_BCST(ops...) }
// VPTERNLOGD_BCST_Z: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.BCST.Z imm8 m32 xmm k xmm
// VPTERNLOGD.BCST.Z imm8 m32 ymm k ymm
// VPTERNLOGD.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VPTERNLOGD.BCST.Z instruction to the active function.
func (c *Context) VPTERNLOGD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPTERNLOGD_BCST_Z(i, m, xyz, k, xyz1))
}
// VPTERNLOGD_BCST_Z: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.BCST.Z imm8 m32 xmm k xmm
// VPTERNLOGD.BCST.Z imm8 m32 ymm k ymm
// VPTERNLOGD.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VPTERNLOGD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPTERNLOGD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPTERNLOGD_BCST_Z(i, m, xyz, k, xyz1) }
// VPTERNLOGD_Z: Bitwise Ternary Logical Operation on Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.Z imm8 m128 xmm k xmm
// VPTERNLOGD.Z imm8 m256 ymm k ymm
// VPTERNLOGD.Z imm8 xmm xmm k xmm
// VPTERNLOGD.Z imm8 ymm ymm k ymm
// VPTERNLOGD.Z imm8 m512 zmm k zmm
// VPTERNLOGD.Z imm8 zmm zmm k zmm
//
// Construct and append a VPTERNLOGD.Z instruction to the active function.
func (c *Context) VPTERNLOGD_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPTERNLOGD_Z(i, mxyz, xyz, k, xyz1))
}
// VPTERNLOGD_Z: Bitwise Ternary Logical Operation on Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.Z imm8 m128 xmm k xmm
// VPTERNLOGD.Z imm8 m256 ymm k ymm
// VPTERNLOGD.Z imm8 xmm xmm k xmm
// VPTERNLOGD.Z imm8 ymm ymm k ymm
// VPTERNLOGD.Z imm8 m512 zmm k zmm
// VPTERNLOGD.Z imm8 zmm zmm k zmm
//
// Construct and append a VPTERNLOGD.Z instruction to the active function.
// Operates on the global context.
func VPTERNLOGD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPTERNLOGD_Z(i, mxyz, xyz, k, xyz1) }
// VPTERNLOGQ: Bitwise Ternary Logical Operation on Quadword Values.
//
// Forms:
//
// VPTERNLOGQ imm8 m128 xmm k xmm
// VPTERNLOGQ imm8 m128 xmm xmm
// VPTERNLOGQ imm8 m256 ymm k ymm
// VPTERNLOGQ imm8 m256 ymm ymm
// VPTERNLOGQ imm8 xmm xmm k xmm
// VPTERNLOGQ imm8 xmm xmm xmm
// VPTERNLOGQ imm8 ymm ymm k ymm
// VPTERNLOGQ imm8 ymm ymm ymm
// VPTERNLOGQ imm8 m512 zmm k zmm
// VPTERNLOGQ imm8 m512 zmm zmm
// VPTERNLOGQ imm8 zmm zmm k zmm
// VPTERNLOGQ imm8 zmm zmm zmm
//
// Construct and append a VPTERNLOGQ instruction to the active function.
func (c *Context) VPTERNLOGQ(ops ...operand.Op) {
c.addinstruction(x86.VPTERNLOGQ(ops...))
}
// VPTERNLOGQ: Bitwise Ternary Logical Operation on Quadword Values.
//
// Forms:
//
// VPTERNLOGQ imm8 m128 xmm k xmm
// VPTERNLOGQ imm8 m128 xmm xmm
// VPTERNLOGQ imm8 m256 ymm k ymm
// VPTERNLOGQ imm8 m256 ymm ymm
// VPTERNLOGQ imm8 xmm xmm k xmm
// VPTERNLOGQ imm8 xmm xmm xmm
// VPTERNLOGQ imm8 ymm ymm k ymm
// VPTERNLOGQ imm8 ymm ymm ymm
// VPTERNLOGQ imm8 m512 zmm k zmm
// VPTERNLOGQ imm8 m512 zmm zmm
// VPTERNLOGQ imm8 zmm zmm k zmm
// VPTERNLOGQ imm8 zmm zmm zmm
//
// Construct and append a VPTERNLOGQ instruction to the active function.
// Operates on the global context.
func VPTERNLOGQ(ops ...operand.Op) { ctx.VPTERNLOGQ(ops...) }
// VPTERNLOGQ_BCST: Bitwise Ternary Logical Operation on Quadword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGQ.BCST imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST imm8 m64 xmm xmm
// VPTERNLOGQ.BCST imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST imm8 m64 ymm ymm
// VPTERNLOGQ.BCST imm8 m64 zmm k zmm
// VPTERNLOGQ.BCST imm8 m64 zmm zmm
//
// Construct and append a VPTERNLOGQ.BCST instruction to the active function.
func (c *Context) VPTERNLOGQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTERNLOGQ_BCST(ops...))
}
// VPTERNLOGQ_BCST: Bitwise Ternary Logical Operation on Quadword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGQ.BCST imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST imm8 m64 xmm xmm
// VPTERNLOGQ.BCST imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST imm8 m64 ymm ymm
// VPTERNLOGQ.BCST imm8 m64 zmm k zmm
// VPTERNLOGQ.BCST imm8 m64 zmm zmm
//
// Construct and append a VPTERNLOGQ.BCST instruction to the active function.
// Operates on the global context.
func VPTERNLOGQ_BCST(ops ...operand.Op) { ctx.VPTERNLOGQ_BCST(ops...) }
// VPTERNLOGQ_BCST_Z: Bitwise Ternary Logical Operation on Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.BCST.Z imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST.Z imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VPTERNLOGQ.BCST.Z instruction to the active function.
func (c *Context) VPTERNLOGQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPTERNLOGQ_BCST_Z(i, m, xyz, k, xyz1))
}
// VPTERNLOGQ_BCST_Z: Bitwise Ternary Logical Operation on Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.BCST.Z imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST.Z imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VPTERNLOGQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPTERNLOGQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPTERNLOGQ_BCST_Z(i, m, xyz, k, xyz1) }
// VPTERNLOGQ_Z: Bitwise Ternary Logical Operation on Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.Z imm8 m128 xmm k xmm
// VPTERNLOGQ.Z imm8 m256 ymm k ymm
// VPTERNLOGQ.Z imm8 xmm xmm k xmm
// VPTERNLOGQ.Z imm8 ymm ymm k ymm
// VPTERNLOGQ.Z imm8 m512 zmm k zmm
// VPTERNLOGQ.Z imm8 zmm zmm k zmm
//
// Construct and append a VPTERNLOGQ.Z instruction to the active function.
func (c *Context) VPTERNLOGQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPTERNLOGQ_Z(i, mxyz, xyz, k, xyz1))
}
// VPTERNLOGQ_Z: Bitwise Ternary Logical Operation on Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.Z imm8 m128 xmm k xmm
// VPTERNLOGQ.Z imm8 m256 ymm k ymm
// VPTERNLOGQ.Z imm8 xmm xmm k xmm
// VPTERNLOGQ.Z imm8 ymm ymm k ymm
// VPTERNLOGQ.Z imm8 m512 zmm k zmm
// VPTERNLOGQ.Z imm8 zmm zmm k zmm
//
// Construct and append a VPTERNLOGQ.Z instruction to the active function.
// Operates on the global context.
func VPTERNLOGQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPTERNLOGQ_Z(i, mxyz, xyz, k, xyz1) }
// VPTEST: Packed Logical Compare.
//
// Forms:
//
// VPTEST m128 xmm
// VPTEST m256 ymm
// VPTEST xmm xmm
// VPTEST ymm ymm
//
// Construct and append a VPTEST instruction to the active function.
func (c *Context) VPTEST(mxy, xy operand.Op) {
c.addinstruction(x86.VPTEST(mxy, xy))
}
// VPTEST: Packed Logical Compare.
//
// Forms:
//
// VPTEST m128 xmm
// VPTEST m256 ymm
// VPTEST xmm xmm
// VPTEST ymm ymm
//
// Construct and append a VPTEST instruction to the active function.
// Operates on the global context.
func VPTEST(mxy, xy operand.Op) { ctx.VPTEST(mxy, xy) }
// VPTESTMB: Logical AND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMB m128 xmm k k
// VPTESTMB m128 xmm k
// VPTESTMB m256 ymm k k
// VPTESTMB m256 ymm k
// VPTESTMB xmm xmm k k
// VPTESTMB xmm xmm k
// VPTESTMB ymm ymm k k
// VPTESTMB ymm ymm k
// VPTESTMB m512 zmm k k
// VPTESTMB m512 zmm k
// VPTESTMB zmm zmm k k
// VPTESTMB zmm zmm k
//
// Construct and append a VPTESTMB instruction to the active function.
func (c *Context) VPTESTMB(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMB(ops...))
}
// VPTESTMB: Logical AND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMB m128 xmm k k
// VPTESTMB m128 xmm k
// VPTESTMB m256 ymm k k
// VPTESTMB m256 ymm k
// VPTESTMB xmm xmm k k
// VPTESTMB xmm xmm k
// VPTESTMB ymm ymm k k
// VPTESTMB ymm ymm k
// VPTESTMB m512 zmm k k
// VPTESTMB m512 zmm k
// VPTESTMB zmm zmm k k
// VPTESTMB zmm zmm k
//
// Construct and append a VPTESTMB instruction to the active function.
// Operates on the global context.
func VPTESTMB(ops ...operand.Op) { ctx.VPTESTMB(ops...) }
// VPTESTMD: Logical AND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMD m128 xmm k k
// VPTESTMD m128 xmm k
// VPTESTMD m256 ymm k k
// VPTESTMD m256 ymm k
// VPTESTMD xmm xmm k k
// VPTESTMD xmm xmm k
// VPTESTMD ymm ymm k k
// VPTESTMD ymm ymm k
// VPTESTMD m512 zmm k k
// VPTESTMD m512 zmm k
// VPTESTMD zmm zmm k k
// VPTESTMD zmm zmm k
//
// Construct and append a VPTESTMD instruction to the active function.
func (c *Context) VPTESTMD(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMD(ops...))
}
// VPTESTMD: Logical AND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMD m128 xmm k k
// VPTESTMD m128 xmm k
// VPTESTMD m256 ymm k k
// VPTESTMD m256 ymm k
// VPTESTMD xmm xmm k k
// VPTESTMD xmm xmm k
// VPTESTMD ymm ymm k k
// VPTESTMD ymm ymm k
// VPTESTMD m512 zmm k k
// VPTESTMD m512 zmm k
// VPTESTMD zmm zmm k k
// VPTESTMD zmm zmm k
//
// Construct and append a VPTESTMD instruction to the active function.
// Operates on the global context.
func VPTESTMD(ops ...operand.Op) { ctx.VPTESTMD(ops...) }
// VPTESTMD_BCST: Logical AND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMD.BCST m32 xmm k k
// VPTESTMD.BCST m32 xmm k
// VPTESTMD.BCST m32 ymm k k
// VPTESTMD.BCST m32 ymm k
// VPTESTMD.BCST m32 zmm k k
// VPTESTMD.BCST m32 zmm k
//
// Construct and append a VPTESTMD.BCST instruction to the active function.
func (c *Context) VPTESTMD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMD_BCST(ops...))
}
// VPTESTMD_BCST: Logical AND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMD.BCST m32 xmm k k
// VPTESTMD.BCST m32 xmm k
// VPTESTMD.BCST m32 ymm k k
// VPTESTMD.BCST m32 ymm k
// VPTESTMD.BCST m32 zmm k k
// VPTESTMD.BCST m32 zmm k
//
// Construct and append a VPTESTMD.BCST instruction to the active function.
// Operates on the global context.
func VPTESTMD_BCST(ops ...operand.Op) { ctx.VPTESTMD_BCST(ops...) }
// VPTESTMQ: Logical AND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMQ m128 xmm k k
// VPTESTMQ m128 xmm k
// VPTESTMQ m256 ymm k k
// VPTESTMQ m256 ymm k
// VPTESTMQ xmm xmm k k
// VPTESTMQ xmm xmm k
// VPTESTMQ ymm ymm k k
// VPTESTMQ ymm ymm k
// VPTESTMQ m512 zmm k k
// VPTESTMQ m512 zmm k
// VPTESTMQ zmm zmm k k
// VPTESTMQ zmm zmm k
//
// Construct and append a VPTESTMQ instruction to the active function.
func (c *Context) VPTESTMQ(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMQ(ops...))
}
// VPTESTMQ: Logical AND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMQ m128 xmm k k
// VPTESTMQ m128 xmm k
// VPTESTMQ m256 ymm k k
// VPTESTMQ m256 ymm k
// VPTESTMQ xmm xmm k k
// VPTESTMQ xmm xmm k
// VPTESTMQ ymm ymm k k
// VPTESTMQ ymm ymm k
// VPTESTMQ m512 zmm k k
// VPTESTMQ m512 zmm k
// VPTESTMQ zmm zmm k k
// VPTESTMQ zmm zmm k
//
// Construct and append a VPTESTMQ instruction to the active function.
// Operates on the global context.
func VPTESTMQ(ops ...operand.Op) { ctx.VPTESTMQ(ops...) }
// VPTESTMQ_BCST: Logical AND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMQ.BCST m64 xmm k k
// VPTESTMQ.BCST m64 xmm k
// VPTESTMQ.BCST m64 ymm k k
// VPTESTMQ.BCST m64 ymm k
// VPTESTMQ.BCST m64 zmm k k
// VPTESTMQ.BCST m64 zmm k
//
// Construct and append a VPTESTMQ.BCST instruction to the active function.
func (c *Context) VPTESTMQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMQ_BCST(ops...))
}
// VPTESTMQ_BCST: Logical AND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMQ.BCST m64 xmm k k
// VPTESTMQ.BCST m64 xmm k
// VPTESTMQ.BCST m64 ymm k k
// VPTESTMQ.BCST m64 ymm k
// VPTESTMQ.BCST m64 zmm k k
// VPTESTMQ.BCST m64 zmm k
//
// Construct and append a VPTESTMQ.BCST instruction to the active function.
// Operates on the global context.
func VPTESTMQ_BCST(ops ...operand.Op) { ctx.VPTESTMQ_BCST(ops...) }
// VPTESTMW: Logical AND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMW m128 xmm k k
// VPTESTMW m128 xmm k
// VPTESTMW m256 ymm k k
// VPTESTMW m256 ymm k
// VPTESTMW xmm xmm k k
// VPTESTMW xmm xmm k
// VPTESTMW ymm ymm k k
// VPTESTMW ymm ymm k
// VPTESTMW m512 zmm k k
// VPTESTMW m512 zmm k
// VPTESTMW zmm zmm k k
// VPTESTMW zmm zmm k
//
// Construct and append a VPTESTMW instruction to the active function.
func (c *Context) VPTESTMW(ops ...operand.Op) {
c.addinstruction(x86.VPTESTMW(ops...))
}
// VPTESTMW: Logical AND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMW m128 xmm k k
// VPTESTMW m128 xmm k
// VPTESTMW m256 ymm k k
// VPTESTMW m256 ymm k
// VPTESTMW xmm xmm k k
// VPTESTMW xmm xmm k
// VPTESTMW ymm ymm k k
// VPTESTMW ymm ymm k
// VPTESTMW m512 zmm k k
// VPTESTMW m512 zmm k
// VPTESTMW zmm zmm k k
// VPTESTMW zmm zmm k
//
// Construct and append a VPTESTMW instruction to the active function.
// Operates on the global context.
func VPTESTMW(ops ...operand.Op) { ctx.VPTESTMW(ops...) }
// VPTESTNMB: Logical NAND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMB m512 zmm k k
// VPTESTNMB m512 zmm k
// VPTESTNMB zmm zmm k k
// VPTESTNMB zmm zmm k
// VPTESTNMB m128 xmm k k
// VPTESTNMB m128 xmm k
// VPTESTNMB m256 ymm k k
// VPTESTNMB m256 ymm k
// VPTESTNMB xmm xmm k k
// VPTESTNMB xmm xmm k
// VPTESTNMB ymm ymm k k
// VPTESTNMB ymm ymm k
//
// Construct and append a VPTESTNMB instruction to the active function.
func (c *Context) VPTESTNMB(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMB(ops...))
}
// VPTESTNMB: Logical NAND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMB m512 zmm k k
// VPTESTNMB m512 zmm k
// VPTESTNMB zmm zmm k k
// VPTESTNMB zmm zmm k
// VPTESTNMB m128 xmm k k
// VPTESTNMB m128 xmm k
// VPTESTNMB m256 ymm k k
// VPTESTNMB m256 ymm k
// VPTESTNMB xmm xmm k k
// VPTESTNMB xmm xmm k
// VPTESTNMB ymm ymm k k
// VPTESTNMB ymm ymm k
//
// Construct and append a VPTESTNMB instruction to the active function.
// Operates on the global context.
func VPTESTNMB(ops ...operand.Op) { ctx.VPTESTNMB(ops...) }
// VPTESTNMD: Logical NAND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMD m128 xmm k k
// VPTESTNMD m128 xmm k
// VPTESTNMD m256 ymm k k
// VPTESTNMD m256 ymm k
// VPTESTNMD xmm xmm k k
// VPTESTNMD xmm xmm k
// VPTESTNMD ymm ymm k k
// VPTESTNMD ymm ymm k
// VPTESTNMD m512 zmm k k
// VPTESTNMD m512 zmm k
// VPTESTNMD zmm zmm k k
// VPTESTNMD zmm zmm k
//
// Construct and append a VPTESTNMD instruction to the active function.
func (c *Context) VPTESTNMD(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMD(ops...))
}
// VPTESTNMD: Logical NAND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMD m128 xmm k k
// VPTESTNMD m128 xmm k
// VPTESTNMD m256 ymm k k
// VPTESTNMD m256 ymm k
// VPTESTNMD xmm xmm k k
// VPTESTNMD xmm xmm k
// VPTESTNMD ymm ymm k k
// VPTESTNMD ymm ymm k
// VPTESTNMD m512 zmm k k
// VPTESTNMD m512 zmm k
// VPTESTNMD zmm zmm k k
// VPTESTNMD zmm zmm k
//
// Construct and append a VPTESTNMD instruction to the active function.
// Operates on the global context.
func VPTESTNMD(ops ...operand.Op) { ctx.VPTESTNMD(ops...) }
// VPTESTNMD_BCST: Logical NAND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMD.BCST m32 xmm k k
// VPTESTNMD.BCST m32 xmm k
// VPTESTNMD.BCST m32 ymm k k
// VPTESTNMD.BCST m32 ymm k
// VPTESTNMD.BCST m32 zmm k k
// VPTESTNMD.BCST m32 zmm k
//
// Construct and append a VPTESTNMD.BCST instruction to the active function.
func (c *Context) VPTESTNMD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMD_BCST(ops...))
}
// VPTESTNMD_BCST: Logical NAND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMD.BCST m32 xmm k k
// VPTESTNMD.BCST m32 xmm k
// VPTESTNMD.BCST m32 ymm k k
// VPTESTNMD.BCST m32 ymm k
// VPTESTNMD.BCST m32 zmm k k
// VPTESTNMD.BCST m32 zmm k
//
// Construct and append a VPTESTNMD.BCST instruction to the active function.
// Operates on the global context.
func VPTESTNMD_BCST(ops ...operand.Op) { ctx.VPTESTNMD_BCST(ops...) }
// VPTESTNMQ: Logical NAND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMQ m128 xmm k k
// VPTESTNMQ m128 xmm k
// VPTESTNMQ m256 ymm k k
// VPTESTNMQ m256 ymm k
// VPTESTNMQ xmm xmm k k
// VPTESTNMQ xmm xmm k
// VPTESTNMQ ymm ymm k k
// VPTESTNMQ ymm ymm k
// VPTESTNMQ m512 zmm k k
// VPTESTNMQ m512 zmm k
// VPTESTNMQ zmm zmm k k
// VPTESTNMQ zmm zmm k
//
// Construct and append a VPTESTNMQ instruction to the active function.
func (c *Context) VPTESTNMQ(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMQ(ops...))
}
// VPTESTNMQ: Logical NAND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMQ m128 xmm k k
// VPTESTNMQ m128 xmm k
// VPTESTNMQ m256 ymm k k
// VPTESTNMQ m256 ymm k
// VPTESTNMQ xmm xmm k k
// VPTESTNMQ xmm xmm k
// VPTESTNMQ ymm ymm k k
// VPTESTNMQ ymm ymm k
// VPTESTNMQ m512 zmm k k
// VPTESTNMQ m512 zmm k
// VPTESTNMQ zmm zmm k k
// VPTESTNMQ zmm zmm k
//
// Construct and append a VPTESTNMQ instruction to the active function.
// Operates on the global context.
func VPTESTNMQ(ops ...operand.Op) { ctx.VPTESTNMQ(ops...) }
// VPTESTNMQ_BCST: Logical NAND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMQ.BCST m64 xmm k k
// VPTESTNMQ.BCST m64 xmm k
// VPTESTNMQ.BCST m64 ymm k k
// VPTESTNMQ.BCST m64 ymm k
// VPTESTNMQ.BCST m64 zmm k k
// VPTESTNMQ.BCST m64 zmm k
//
// Construct and append a VPTESTNMQ.BCST instruction to the active function.
func (c *Context) VPTESTNMQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMQ_BCST(ops...))
}
// VPTESTNMQ_BCST: Logical NAND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMQ.BCST m64 xmm k k
// VPTESTNMQ.BCST m64 xmm k
// VPTESTNMQ.BCST m64 ymm k k
// VPTESTNMQ.BCST m64 ymm k
// VPTESTNMQ.BCST m64 zmm k k
// VPTESTNMQ.BCST m64 zmm k
//
// Construct and append a VPTESTNMQ.BCST instruction to the active function.
// Operates on the global context.
func VPTESTNMQ_BCST(ops ...operand.Op) { ctx.VPTESTNMQ_BCST(ops...) }
// VPTESTNMW: Logical NAND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMW m512 zmm k k
// VPTESTNMW m512 zmm k
// VPTESTNMW zmm zmm k k
// VPTESTNMW zmm zmm k
// VPTESTNMW m128 xmm k k
// VPTESTNMW m128 xmm k
// VPTESTNMW m256 ymm k k
// VPTESTNMW m256 ymm k
// VPTESTNMW xmm xmm k k
// VPTESTNMW xmm xmm k
// VPTESTNMW ymm ymm k k
// VPTESTNMW ymm ymm k
//
// Construct and append a VPTESTNMW instruction to the active function.
func (c *Context) VPTESTNMW(ops ...operand.Op) {
c.addinstruction(x86.VPTESTNMW(ops...))
}
// VPTESTNMW: Logical NAND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMW m512 zmm k k
// VPTESTNMW m512 zmm k
// VPTESTNMW zmm zmm k k
// VPTESTNMW zmm zmm k
// VPTESTNMW m128 xmm k k
// VPTESTNMW m128 xmm k
// VPTESTNMW m256 ymm k k
// VPTESTNMW m256 ymm k
// VPTESTNMW xmm xmm k k
// VPTESTNMW xmm xmm k
// VPTESTNMW ymm ymm k k
// VPTESTNMW ymm ymm k
//
// Construct and append a VPTESTNMW instruction to the active function.
// Operates on the global context.
func VPTESTNMW(ops ...operand.Op) { ctx.VPTESTNMW(ops...) }
// VPUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKHBW m256 ymm ymm
// VPUNPCKHBW ymm ymm ymm
// VPUNPCKHBW m128 xmm xmm
// VPUNPCKHBW xmm xmm xmm
// VPUNPCKHBW m128 xmm k xmm
// VPUNPCKHBW m256 ymm k ymm
// VPUNPCKHBW xmm xmm k xmm
// VPUNPCKHBW ymm ymm k ymm
// VPUNPCKHBW m512 zmm k zmm
// VPUNPCKHBW m512 zmm zmm
// VPUNPCKHBW zmm zmm k zmm
// VPUNPCKHBW zmm zmm zmm
//
// Construct and append a VPUNPCKHBW instruction to the active function.
func (c *Context) VPUNPCKHBW(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHBW(ops...))
}
// VPUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKHBW m256 ymm ymm
// VPUNPCKHBW ymm ymm ymm
// VPUNPCKHBW m128 xmm xmm
// VPUNPCKHBW xmm xmm xmm
// VPUNPCKHBW m128 xmm k xmm
// VPUNPCKHBW m256 ymm k ymm
// VPUNPCKHBW xmm xmm k xmm
// VPUNPCKHBW ymm ymm k ymm
// VPUNPCKHBW m512 zmm k zmm
// VPUNPCKHBW m512 zmm zmm
// VPUNPCKHBW zmm zmm k zmm
// VPUNPCKHBW zmm zmm zmm
//
// Construct and append a VPUNPCKHBW instruction to the active function.
// Operates on the global context.
func VPUNPCKHBW(ops ...operand.Op) { ctx.VPUNPCKHBW(ops...) }
// VPUNPCKHBW_Z: Unpack and Interleave High-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHBW.Z m128 xmm k xmm
// VPUNPCKHBW.Z m256 ymm k ymm
// VPUNPCKHBW.Z xmm xmm k xmm
// VPUNPCKHBW.Z ymm ymm k ymm
// VPUNPCKHBW.Z m512 zmm k zmm
// VPUNPCKHBW.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHBW.Z instruction to the active function.
func (c *Context) VPUNPCKHBW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHBW_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKHBW_Z: Unpack and Interleave High-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHBW.Z m128 xmm k xmm
// VPUNPCKHBW.Z m256 ymm k ymm
// VPUNPCKHBW.Z xmm xmm k xmm
// VPUNPCKHBW.Z ymm ymm k ymm
// VPUNPCKHBW.Z m512 zmm k zmm
// VPUNPCKHBW.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHBW.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHBW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHBW_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKHDQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKHDQ m256 ymm ymm
// VPUNPCKHDQ ymm ymm ymm
// VPUNPCKHDQ m128 xmm xmm
// VPUNPCKHDQ xmm xmm xmm
// VPUNPCKHDQ m128 xmm k xmm
// VPUNPCKHDQ m256 ymm k ymm
// VPUNPCKHDQ xmm xmm k xmm
// VPUNPCKHDQ ymm ymm k ymm
// VPUNPCKHDQ m512 zmm k zmm
// VPUNPCKHDQ m512 zmm zmm
// VPUNPCKHDQ zmm zmm k zmm
// VPUNPCKHDQ zmm zmm zmm
//
// Construct and append a VPUNPCKHDQ instruction to the active function.
func (c *Context) VPUNPCKHDQ(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHDQ(ops...))
}
// VPUNPCKHDQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKHDQ m256 ymm ymm
// VPUNPCKHDQ ymm ymm ymm
// VPUNPCKHDQ m128 xmm xmm
// VPUNPCKHDQ xmm xmm xmm
// VPUNPCKHDQ m128 xmm k xmm
// VPUNPCKHDQ m256 ymm k ymm
// VPUNPCKHDQ xmm xmm k xmm
// VPUNPCKHDQ ymm ymm k ymm
// VPUNPCKHDQ m512 zmm k zmm
// VPUNPCKHDQ m512 zmm zmm
// VPUNPCKHDQ zmm zmm k zmm
// VPUNPCKHDQ zmm zmm zmm
//
// Construct and append a VPUNPCKHDQ instruction to the active function.
// Operates on the global context.
func VPUNPCKHDQ(ops ...operand.Op) { ctx.VPUNPCKHDQ(ops...) }
// VPUNPCKHDQ_BCST: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHDQ.BCST m32 xmm k xmm
// VPUNPCKHDQ.BCST m32 xmm xmm
// VPUNPCKHDQ.BCST m32 ymm k ymm
// VPUNPCKHDQ.BCST m32 ymm ymm
// VPUNPCKHDQ.BCST m32 zmm k zmm
// VPUNPCKHDQ.BCST m32 zmm zmm
//
// Construct and append a VPUNPCKHDQ.BCST instruction to the active function.
func (c *Context) VPUNPCKHDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHDQ_BCST(ops...))
}
// VPUNPCKHDQ_BCST: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHDQ.BCST m32 xmm k xmm
// VPUNPCKHDQ.BCST m32 xmm xmm
// VPUNPCKHDQ.BCST m32 ymm k ymm
// VPUNPCKHDQ.BCST m32 ymm ymm
// VPUNPCKHDQ.BCST m32 zmm k zmm
// VPUNPCKHDQ.BCST m32 zmm zmm
//
// Construct and append a VPUNPCKHDQ.BCST instruction to the active function.
// Operates on the global context.
func VPUNPCKHDQ_BCST(ops ...operand.Op) { ctx.VPUNPCKHDQ_BCST(ops...) }
// VPUNPCKHDQ_BCST_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.BCST.Z m32 xmm k xmm
// VPUNPCKHDQ.BCST.Z m32 ymm k ymm
// VPUNPCKHDQ.BCST.Z m32 zmm k zmm
//
// Construct and append a VPUNPCKHDQ.BCST.Z instruction to the active function.
func (c *Context) VPUNPCKHDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPUNPCKHDQ_BCST_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.BCST.Z m32 xmm k xmm
// VPUNPCKHDQ.BCST.Z m32 ymm k ymm
// VPUNPCKHDQ.BCST.Z m32 zmm k zmm
//
// Construct and append a VPUNPCKHDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHDQ_BCST_Z(m, xyz, k, xyz1) }
// VPUNPCKHDQ_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.Z m128 xmm k xmm
// VPUNPCKHDQ.Z m256 ymm k ymm
// VPUNPCKHDQ.Z xmm xmm k xmm
// VPUNPCKHDQ.Z ymm ymm k ymm
// VPUNPCKHDQ.Z m512 zmm k zmm
// VPUNPCKHDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHDQ.Z instruction to the active function.
func (c *Context) VPUNPCKHDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHDQ_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKHDQ_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.Z m128 xmm k xmm
// VPUNPCKHDQ.Z m256 ymm k ymm
// VPUNPCKHDQ.Z xmm xmm k xmm
// VPUNPCKHDQ.Z ymm ymm k ymm
// VPUNPCKHDQ.Z m512 zmm k zmm
// VPUNPCKHDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHDQ.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHDQ_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKHQDQ m256 ymm ymm
// VPUNPCKHQDQ ymm ymm ymm
// VPUNPCKHQDQ m128 xmm xmm
// VPUNPCKHQDQ xmm xmm xmm
// VPUNPCKHQDQ m128 xmm k xmm
// VPUNPCKHQDQ m256 ymm k ymm
// VPUNPCKHQDQ xmm xmm k xmm
// VPUNPCKHQDQ ymm ymm k ymm
// VPUNPCKHQDQ m512 zmm k zmm
// VPUNPCKHQDQ m512 zmm zmm
// VPUNPCKHQDQ zmm zmm k zmm
// VPUNPCKHQDQ zmm zmm zmm
//
// Construct and append a VPUNPCKHQDQ instruction to the active function.
func (c *Context) VPUNPCKHQDQ(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHQDQ(ops...))
}
// VPUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKHQDQ m256 ymm ymm
// VPUNPCKHQDQ ymm ymm ymm
// VPUNPCKHQDQ m128 xmm xmm
// VPUNPCKHQDQ xmm xmm xmm
// VPUNPCKHQDQ m128 xmm k xmm
// VPUNPCKHQDQ m256 ymm k ymm
// VPUNPCKHQDQ xmm xmm k xmm
// VPUNPCKHQDQ ymm ymm k ymm
// VPUNPCKHQDQ m512 zmm k zmm
// VPUNPCKHQDQ m512 zmm zmm
// VPUNPCKHQDQ zmm zmm k zmm
// VPUNPCKHQDQ zmm zmm zmm
//
// Construct and append a VPUNPCKHQDQ instruction to the active function.
// Operates on the global context.
func VPUNPCKHQDQ(ops ...operand.Op) { ctx.VPUNPCKHQDQ(ops...) }
// VPUNPCKHQDQ_BCST: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHQDQ.BCST m64 xmm k xmm
// VPUNPCKHQDQ.BCST m64 xmm xmm
// VPUNPCKHQDQ.BCST m64 ymm k ymm
// VPUNPCKHQDQ.BCST m64 ymm ymm
// VPUNPCKHQDQ.BCST m64 zmm k zmm
// VPUNPCKHQDQ.BCST m64 zmm zmm
//
// Construct and append a VPUNPCKHQDQ.BCST instruction to the active function.
func (c *Context) VPUNPCKHQDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHQDQ_BCST(ops...))
}
// VPUNPCKHQDQ_BCST: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHQDQ.BCST m64 xmm k xmm
// VPUNPCKHQDQ.BCST m64 xmm xmm
// VPUNPCKHQDQ.BCST m64 ymm k ymm
// VPUNPCKHQDQ.BCST m64 ymm ymm
// VPUNPCKHQDQ.BCST m64 zmm k zmm
// VPUNPCKHQDQ.BCST m64 zmm zmm
//
// Construct and append a VPUNPCKHQDQ.BCST instruction to the active function.
// Operates on the global context.
func VPUNPCKHQDQ_BCST(ops ...operand.Op) { ctx.VPUNPCKHQDQ_BCST(ops...) }
// VPUNPCKHQDQ_BCST_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKHQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKHQDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPUNPCKHQDQ.BCST.Z instruction to the active function.
func (c *Context) VPUNPCKHQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHQDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPUNPCKHQDQ_BCST_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKHQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKHQDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPUNPCKHQDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHQDQ_BCST_Z(m, xyz, k, xyz1) }
// VPUNPCKHQDQ_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.Z m128 xmm k xmm
// VPUNPCKHQDQ.Z m256 ymm k ymm
// VPUNPCKHQDQ.Z xmm xmm k xmm
// VPUNPCKHQDQ.Z ymm ymm k ymm
// VPUNPCKHQDQ.Z m512 zmm k zmm
// VPUNPCKHQDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHQDQ.Z instruction to the active function.
func (c *Context) VPUNPCKHQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHQDQ_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKHQDQ_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.Z m128 xmm k xmm
// VPUNPCKHQDQ.Z m256 ymm k ymm
// VPUNPCKHQDQ.Z xmm xmm k xmm
// VPUNPCKHQDQ.Z ymm ymm k ymm
// VPUNPCKHQDQ.Z m512 zmm k zmm
// VPUNPCKHQDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHQDQ.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHQDQ_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKHWD: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKHWD m256 ymm ymm
// VPUNPCKHWD ymm ymm ymm
// VPUNPCKHWD m128 xmm xmm
// VPUNPCKHWD xmm xmm xmm
// VPUNPCKHWD m128 xmm k xmm
// VPUNPCKHWD m256 ymm k ymm
// VPUNPCKHWD xmm xmm k xmm
// VPUNPCKHWD ymm ymm k ymm
// VPUNPCKHWD m512 zmm k zmm
// VPUNPCKHWD m512 zmm zmm
// VPUNPCKHWD zmm zmm k zmm
// VPUNPCKHWD zmm zmm zmm
//
// Construct and append a VPUNPCKHWD instruction to the active function.
func (c *Context) VPUNPCKHWD(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKHWD(ops...))
}
// VPUNPCKHWD: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKHWD m256 ymm ymm
// VPUNPCKHWD ymm ymm ymm
// VPUNPCKHWD m128 xmm xmm
// VPUNPCKHWD xmm xmm xmm
// VPUNPCKHWD m128 xmm k xmm
// VPUNPCKHWD m256 ymm k ymm
// VPUNPCKHWD xmm xmm k xmm
// VPUNPCKHWD ymm ymm k ymm
// VPUNPCKHWD m512 zmm k zmm
// VPUNPCKHWD m512 zmm zmm
// VPUNPCKHWD zmm zmm k zmm
// VPUNPCKHWD zmm zmm zmm
//
// Construct and append a VPUNPCKHWD instruction to the active function.
// Operates on the global context.
func VPUNPCKHWD(ops ...operand.Op) { ctx.VPUNPCKHWD(ops...) }
// VPUNPCKHWD_Z: Unpack and Interleave High-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHWD.Z m128 xmm k xmm
// VPUNPCKHWD.Z m256 ymm k ymm
// VPUNPCKHWD.Z xmm xmm k xmm
// VPUNPCKHWD.Z ymm ymm k ymm
// VPUNPCKHWD.Z m512 zmm k zmm
// VPUNPCKHWD.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHWD.Z instruction to the active function.
func (c *Context) VPUNPCKHWD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKHWD_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKHWD_Z: Unpack and Interleave High-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHWD.Z m128 xmm k xmm
// VPUNPCKHWD.Z m256 ymm k ymm
// VPUNPCKHWD.Z xmm xmm k xmm
// VPUNPCKHWD.Z ymm ymm k ymm
// VPUNPCKHWD.Z m512 zmm k zmm
// VPUNPCKHWD.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKHWD.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKHWD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKHWD_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKLBW m256 ymm ymm
// VPUNPCKLBW ymm ymm ymm
// VPUNPCKLBW m128 xmm xmm
// VPUNPCKLBW xmm xmm xmm
// VPUNPCKLBW m128 xmm k xmm
// VPUNPCKLBW m256 ymm k ymm
// VPUNPCKLBW xmm xmm k xmm
// VPUNPCKLBW ymm ymm k ymm
// VPUNPCKLBW m512 zmm k zmm
// VPUNPCKLBW m512 zmm zmm
// VPUNPCKLBW zmm zmm k zmm
// VPUNPCKLBW zmm zmm zmm
//
// Construct and append a VPUNPCKLBW instruction to the active function.
func (c *Context) VPUNPCKLBW(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLBW(ops...))
}
// VPUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKLBW m256 ymm ymm
// VPUNPCKLBW ymm ymm ymm
// VPUNPCKLBW m128 xmm xmm
// VPUNPCKLBW xmm xmm xmm
// VPUNPCKLBW m128 xmm k xmm
// VPUNPCKLBW m256 ymm k ymm
// VPUNPCKLBW xmm xmm k xmm
// VPUNPCKLBW ymm ymm k ymm
// VPUNPCKLBW m512 zmm k zmm
// VPUNPCKLBW m512 zmm zmm
// VPUNPCKLBW zmm zmm k zmm
// VPUNPCKLBW zmm zmm zmm
//
// Construct and append a VPUNPCKLBW instruction to the active function.
// Operates on the global context.
func VPUNPCKLBW(ops ...operand.Op) { ctx.VPUNPCKLBW(ops...) }
// VPUNPCKLBW_Z: Unpack and Interleave Low-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLBW.Z m128 xmm k xmm
// VPUNPCKLBW.Z m256 ymm k ymm
// VPUNPCKLBW.Z xmm xmm k xmm
// VPUNPCKLBW.Z ymm ymm k ymm
// VPUNPCKLBW.Z m512 zmm k zmm
// VPUNPCKLBW.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLBW.Z instruction to the active function.
func (c *Context) VPUNPCKLBW_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLBW_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKLBW_Z: Unpack and Interleave Low-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLBW.Z m128 xmm k xmm
// VPUNPCKLBW.Z m256 ymm k ymm
// VPUNPCKLBW.Z xmm xmm k xmm
// VPUNPCKLBW.Z ymm ymm k ymm
// VPUNPCKLBW.Z m512 zmm k zmm
// VPUNPCKLBW.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLBW.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLBW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLBW_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKLDQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKLDQ m256 ymm ymm
// VPUNPCKLDQ ymm ymm ymm
// VPUNPCKLDQ m128 xmm xmm
// VPUNPCKLDQ xmm xmm xmm
// VPUNPCKLDQ m128 xmm k xmm
// VPUNPCKLDQ m256 ymm k ymm
// VPUNPCKLDQ xmm xmm k xmm
// VPUNPCKLDQ ymm ymm k ymm
// VPUNPCKLDQ m512 zmm k zmm
// VPUNPCKLDQ m512 zmm zmm
// VPUNPCKLDQ zmm zmm k zmm
// VPUNPCKLDQ zmm zmm zmm
//
// Construct and append a VPUNPCKLDQ instruction to the active function.
func (c *Context) VPUNPCKLDQ(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLDQ(ops...))
}
// VPUNPCKLDQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKLDQ m256 ymm ymm
// VPUNPCKLDQ ymm ymm ymm
// VPUNPCKLDQ m128 xmm xmm
// VPUNPCKLDQ xmm xmm xmm
// VPUNPCKLDQ m128 xmm k xmm
// VPUNPCKLDQ m256 ymm k ymm
// VPUNPCKLDQ xmm xmm k xmm
// VPUNPCKLDQ ymm ymm k ymm
// VPUNPCKLDQ m512 zmm k zmm
// VPUNPCKLDQ m512 zmm zmm
// VPUNPCKLDQ zmm zmm k zmm
// VPUNPCKLDQ zmm zmm zmm
//
// Construct and append a VPUNPCKLDQ instruction to the active function.
// Operates on the global context.
func VPUNPCKLDQ(ops ...operand.Op) { ctx.VPUNPCKLDQ(ops...) }
// VPUNPCKLDQ_BCST: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLDQ.BCST m32 xmm k xmm
// VPUNPCKLDQ.BCST m32 xmm xmm
// VPUNPCKLDQ.BCST m32 ymm k ymm
// VPUNPCKLDQ.BCST m32 ymm ymm
// VPUNPCKLDQ.BCST m32 zmm k zmm
// VPUNPCKLDQ.BCST m32 zmm zmm
//
// Construct and append a VPUNPCKLDQ.BCST instruction to the active function.
func (c *Context) VPUNPCKLDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLDQ_BCST(ops...))
}
// VPUNPCKLDQ_BCST: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLDQ.BCST m32 xmm k xmm
// VPUNPCKLDQ.BCST m32 xmm xmm
// VPUNPCKLDQ.BCST m32 ymm k ymm
// VPUNPCKLDQ.BCST m32 ymm ymm
// VPUNPCKLDQ.BCST m32 zmm k zmm
// VPUNPCKLDQ.BCST m32 zmm zmm
//
// Construct and append a VPUNPCKLDQ.BCST instruction to the active function.
// Operates on the global context.
func VPUNPCKLDQ_BCST(ops ...operand.Op) { ctx.VPUNPCKLDQ_BCST(ops...) }
// VPUNPCKLDQ_BCST_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.BCST.Z m32 xmm k xmm
// VPUNPCKLDQ.BCST.Z m32 ymm k ymm
// VPUNPCKLDQ.BCST.Z m32 zmm k zmm
//
// Construct and append a VPUNPCKLDQ.BCST.Z instruction to the active function.
func (c *Context) VPUNPCKLDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPUNPCKLDQ_BCST_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.BCST.Z m32 xmm k xmm
// VPUNPCKLDQ.BCST.Z m32 ymm k ymm
// VPUNPCKLDQ.BCST.Z m32 zmm k zmm
//
// Construct and append a VPUNPCKLDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLDQ_BCST_Z(m, xyz, k, xyz1) }
// VPUNPCKLDQ_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.Z m128 xmm k xmm
// VPUNPCKLDQ.Z m256 ymm k ymm
// VPUNPCKLDQ.Z xmm xmm k xmm
// VPUNPCKLDQ.Z ymm ymm k ymm
// VPUNPCKLDQ.Z m512 zmm k zmm
// VPUNPCKLDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLDQ.Z instruction to the active function.
func (c *Context) VPUNPCKLDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLDQ_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKLDQ_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.Z m128 xmm k xmm
// VPUNPCKLDQ.Z m256 ymm k ymm
// VPUNPCKLDQ.Z xmm xmm k xmm
// VPUNPCKLDQ.Z ymm ymm k ymm
// VPUNPCKLDQ.Z m512 zmm k zmm
// VPUNPCKLDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLDQ.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLDQ_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKLQDQ m256 ymm ymm
// VPUNPCKLQDQ ymm ymm ymm
// VPUNPCKLQDQ m128 xmm xmm
// VPUNPCKLQDQ xmm xmm xmm
// VPUNPCKLQDQ m128 xmm k xmm
// VPUNPCKLQDQ m256 ymm k ymm
// VPUNPCKLQDQ xmm xmm k xmm
// VPUNPCKLQDQ ymm ymm k ymm
// VPUNPCKLQDQ m512 zmm k zmm
// VPUNPCKLQDQ m512 zmm zmm
// VPUNPCKLQDQ zmm zmm k zmm
// VPUNPCKLQDQ zmm zmm zmm
//
// Construct and append a VPUNPCKLQDQ instruction to the active function.
func (c *Context) VPUNPCKLQDQ(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLQDQ(ops...))
}
// VPUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKLQDQ m256 ymm ymm
// VPUNPCKLQDQ ymm ymm ymm
// VPUNPCKLQDQ m128 xmm xmm
// VPUNPCKLQDQ xmm xmm xmm
// VPUNPCKLQDQ m128 xmm k xmm
// VPUNPCKLQDQ m256 ymm k ymm
// VPUNPCKLQDQ xmm xmm k xmm
// VPUNPCKLQDQ ymm ymm k ymm
// VPUNPCKLQDQ m512 zmm k zmm
// VPUNPCKLQDQ m512 zmm zmm
// VPUNPCKLQDQ zmm zmm k zmm
// VPUNPCKLQDQ zmm zmm zmm
//
// Construct and append a VPUNPCKLQDQ instruction to the active function.
// Operates on the global context.
func VPUNPCKLQDQ(ops ...operand.Op) { ctx.VPUNPCKLQDQ(ops...) }
// VPUNPCKLQDQ_BCST: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLQDQ.BCST m64 xmm k xmm
// VPUNPCKLQDQ.BCST m64 xmm xmm
// VPUNPCKLQDQ.BCST m64 ymm k ymm
// VPUNPCKLQDQ.BCST m64 ymm ymm
// VPUNPCKLQDQ.BCST m64 zmm k zmm
// VPUNPCKLQDQ.BCST m64 zmm zmm
//
// Construct and append a VPUNPCKLQDQ.BCST instruction to the active function.
func (c *Context) VPUNPCKLQDQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLQDQ_BCST(ops...))
}
// VPUNPCKLQDQ_BCST: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLQDQ.BCST m64 xmm k xmm
// VPUNPCKLQDQ.BCST m64 xmm xmm
// VPUNPCKLQDQ.BCST m64 ymm k ymm
// VPUNPCKLQDQ.BCST m64 ymm ymm
// VPUNPCKLQDQ.BCST m64 zmm k zmm
// VPUNPCKLQDQ.BCST m64 zmm zmm
//
// Construct and append a VPUNPCKLQDQ.BCST instruction to the active function.
// Operates on the global context.
func VPUNPCKLQDQ_BCST(ops ...operand.Op) { ctx.VPUNPCKLQDQ_BCST(ops...) }
// VPUNPCKLQDQ_BCST_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKLQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKLQDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPUNPCKLQDQ.BCST.Z instruction to the active function.
func (c *Context) VPUNPCKLQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLQDQ_BCST_Z(m, xyz, k, xyz1))
}
// VPUNPCKLQDQ_BCST_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKLQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKLQDQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPUNPCKLQDQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLQDQ_BCST_Z(m, xyz, k, xyz1) }
// VPUNPCKLQDQ_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.Z m128 xmm k xmm
// VPUNPCKLQDQ.Z m256 ymm k ymm
// VPUNPCKLQDQ.Z xmm xmm k xmm
// VPUNPCKLQDQ.Z ymm ymm k ymm
// VPUNPCKLQDQ.Z m512 zmm k zmm
// VPUNPCKLQDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLQDQ.Z instruction to the active function.
func (c *Context) VPUNPCKLQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLQDQ_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKLQDQ_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.Z m128 xmm k xmm
// VPUNPCKLQDQ.Z m256 ymm k ymm
// VPUNPCKLQDQ.Z xmm xmm k xmm
// VPUNPCKLQDQ.Z ymm ymm k ymm
// VPUNPCKLQDQ.Z m512 zmm k zmm
// VPUNPCKLQDQ.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLQDQ.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLQDQ_Z(mxyz, xyz, k, xyz1) }
// VPUNPCKLWD: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKLWD m256 ymm ymm
// VPUNPCKLWD ymm ymm ymm
// VPUNPCKLWD m128 xmm xmm
// VPUNPCKLWD xmm xmm xmm
// VPUNPCKLWD m128 xmm k xmm
// VPUNPCKLWD m256 ymm k ymm
// VPUNPCKLWD xmm xmm k xmm
// VPUNPCKLWD ymm ymm k ymm
// VPUNPCKLWD m512 zmm k zmm
// VPUNPCKLWD m512 zmm zmm
// VPUNPCKLWD zmm zmm k zmm
// VPUNPCKLWD zmm zmm zmm
//
// Construct and append a VPUNPCKLWD instruction to the active function.
func (c *Context) VPUNPCKLWD(ops ...operand.Op) {
c.addinstruction(x86.VPUNPCKLWD(ops...))
}
// VPUNPCKLWD: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKLWD m256 ymm ymm
// VPUNPCKLWD ymm ymm ymm
// VPUNPCKLWD m128 xmm xmm
// VPUNPCKLWD xmm xmm xmm
// VPUNPCKLWD m128 xmm k xmm
// VPUNPCKLWD m256 ymm k ymm
// VPUNPCKLWD xmm xmm k xmm
// VPUNPCKLWD ymm ymm k ymm
// VPUNPCKLWD m512 zmm k zmm
// VPUNPCKLWD m512 zmm zmm
// VPUNPCKLWD zmm zmm k zmm
// VPUNPCKLWD zmm zmm zmm
//
// Construct and append a VPUNPCKLWD instruction to the active function.
// Operates on the global context.
func VPUNPCKLWD(ops ...operand.Op) { ctx.VPUNPCKLWD(ops...) }
// VPUNPCKLWD_Z: Unpack and Interleave Low-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLWD.Z m128 xmm k xmm
// VPUNPCKLWD.Z m256 ymm k ymm
// VPUNPCKLWD.Z xmm xmm k xmm
// VPUNPCKLWD.Z ymm ymm k ymm
// VPUNPCKLWD.Z m512 zmm k zmm
// VPUNPCKLWD.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLWD.Z instruction to the active function.
func (c *Context) VPUNPCKLWD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPUNPCKLWD_Z(mxyz, xyz, k, xyz1))
}
// VPUNPCKLWD_Z: Unpack and Interleave Low-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLWD.Z m128 xmm k xmm
// VPUNPCKLWD.Z m256 ymm k ymm
// VPUNPCKLWD.Z xmm xmm k xmm
// VPUNPCKLWD.Z ymm ymm k ymm
// VPUNPCKLWD.Z m512 zmm k zmm
// VPUNPCKLWD.Z zmm zmm k zmm
//
// Construct and append a VPUNPCKLWD.Z instruction to the active function.
// Operates on the global context.
func VPUNPCKLWD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPUNPCKLWD_Z(mxyz, xyz, k, xyz1) }
// VPXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// VPXOR m256 ymm ymm
// VPXOR ymm ymm ymm
// VPXOR m128 xmm xmm
// VPXOR xmm xmm xmm
//
// Construct and append a VPXOR instruction to the active function.
func (c *Context) VPXOR(mxy, xy, xy1 operand.Op) {
c.addinstruction(x86.VPXOR(mxy, xy, xy1))
}
// VPXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// VPXOR m256 ymm ymm
// VPXOR ymm ymm ymm
// VPXOR m128 xmm xmm
// VPXOR xmm xmm xmm
//
// Construct and append a VPXOR instruction to the active function.
// Operates on the global context.
func VPXOR(mxy, xy, xy1 operand.Op) { ctx.VPXOR(mxy, xy, xy1) }
// VPXORD: Bitwise Logical Exclusive OR of Packed Doubleword Integers.
//
// Forms:
//
// VPXORD m128 xmm k xmm
// VPXORD m128 xmm xmm
// VPXORD m256 ymm k ymm
// VPXORD m256 ymm ymm
// VPXORD xmm xmm k xmm
// VPXORD xmm xmm xmm
// VPXORD ymm ymm k ymm
// VPXORD ymm ymm ymm
// VPXORD m512 zmm k zmm
// VPXORD m512 zmm zmm
// VPXORD zmm zmm k zmm
// VPXORD zmm zmm zmm
//
// Construct and append a VPXORD instruction to the active function.
func (c *Context) VPXORD(ops ...operand.Op) {
c.addinstruction(x86.VPXORD(ops...))
}
// VPXORD: Bitwise Logical Exclusive OR of Packed Doubleword Integers.
//
// Forms:
//
// VPXORD m128 xmm k xmm
// VPXORD m128 xmm xmm
// VPXORD m256 ymm k ymm
// VPXORD m256 ymm ymm
// VPXORD xmm xmm k xmm
// VPXORD xmm xmm xmm
// VPXORD ymm ymm k ymm
// VPXORD ymm ymm ymm
// VPXORD m512 zmm k zmm
// VPXORD m512 zmm zmm
// VPXORD zmm zmm k zmm
// VPXORD zmm zmm zmm
//
// Construct and append a VPXORD instruction to the active function.
// Operates on the global context.
func VPXORD(ops ...operand.Op) { ctx.VPXORD(ops...) }
// VPXORD_BCST: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPXORD.BCST m32 xmm k xmm
// VPXORD.BCST m32 xmm xmm
// VPXORD.BCST m32 ymm k ymm
// VPXORD.BCST m32 ymm ymm
// VPXORD.BCST m32 zmm k zmm
// VPXORD.BCST m32 zmm zmm
//
// Construct and append a VPXORD.BCST instruction to the active function.
func (c *Context) VPXORD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPXORD_BCST(ops...))
}
// VPXORD_BCST: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPXORD.BCST m32 xmm k xmm
// VPXORD.BCST m32 xmm xmm
// VPXORD.BCST m32 ymm k ymm
// VPXORD.BCST m32 ymm ymm
// VPXORD.BCST m32 zmm k zmm
// VPXORD.BCST m32 zmm zmm
//
// Construct and append a VPXORD.BCST instruction to the active function.
// Operates on the global context.
func VPXORD_BCST(ops ...operand.Op) { ctx.VPXORD_BCST(ops...) }
// VPXORD_BCST_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORD.BCST.Z m32 xmm k xmm
// VPXORD.BCST.Z m32 ymm k ymm
// VPXORD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPXORD.BCST.Z instruction to the active function.
func (c *Context) VPXORD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPXORD_BCST_Z(m, xyz, k, xyz1))
}
// VPXORD_BCST_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORD.BCST.Z m32 xmm k xmm
// VPXORD.BCST.Z m32 ymm k ymm
// VPXORD.BCST.Z m32 zmm k zmm
//
// Construct and append a VPXORD.BCST.Z instruction to the active function.
// Operates on the global context.
func VPXORD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPXORD_BCST_Z(m, xyz, k, xyz1) }
// VPXORD_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORD.Z m128 xmm k xmm
// VPXORD.Z m256 ymm k ymm
// VPXORD.Z xmm xmm k xmm
// VPXORD.Z ymm ymm k ymm
// VPXORD.Z m512 zmm k zmm
// VPXORD.Z zmm zmm k zmm
//
// Construct and append a VPXORD.Z instruction to the active function.
func (c *Context) VPXORD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPXORD_Z(mxyz, xyz, k, xyz1))
}
// VPXORD_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORD.Z m128 xmm k xmm
// VPXORD.Z m256 ymm k ymm
// VPXORD.Z xmm xmm k xmm
// VPXORD.Z ymm ymm k ymm
// VPXORD.Z m512 zmm k zmm
// VPXORD.Z zmm zmm k zmm
//
// Construct and append a VPXORD.Z instruction to the active function.
// Operates on the global context.
func VPXORD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPXORD_Z(mxyz, xyz, k, xyz1) }
// VPXORQ: Bitwise Logical Exclusive OR of Packed Quadword Integers.
//
// Forms:
//
// VPXORQ m128 xmm k xmm
// VPXORQ m128 xmm xmm
// VPXORQ m256 ymm k ymm
// VPXORQ m256 ymm ymm
// VPXORQ xmm xmm k xmm
// VPXORQ xmm xmm xmm
// VPXORQ ymm ymm k ymm
// VPXORQ ymm ymm ymm
// VPXORQ m512 zmm k zmm
// VPXORQ m512 zmm zmm
// VPXORQ zmm zmm k zmm
// VPXORQ zmm zmm zmm
//
// Construct and append a VPXORQ instruction to the active function.
func (c *Context) VPXORQ(ops ...operand.Op) {
c.addinstruction(x86.VPXORQ(ops...))
}
// VPXORQ: Bitwise Logical Exclusive OR of Packed Quadword Integers.
//
// Forms:
//
// VPXORQ m128 xmm k xmm
// VPXORQ m128 xmm xmm
// VPXORQ m256 ymm k ymm
// VPXORQ m256 ymm ymm
// VPXORQ xmm xmm k xmm
// VPXORQ xmm xmm xmm
// VPXORQ ymm ymm k ymm
// VPXORQ ymm ymm ymm
// VPXORQ m512 zmm k zmm
// VPXORQ m512 zmm zmm
// VPXORQ zmm zmm k zmm
// VPXORQ zmm zmm zmm
//
// Construct and append a VPXORQ instruction to the active function.
// Operates on the global context.
func VPXORQ(ops ...operand.Op) { ctx.VPXORQ(ops...) }
// VPXORQ_BCST: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPXORQ.BCST m64 xmm k xmm
// VPXORQ.BCST m64 xmm xmm
// VPXORQ.BCST m64 ymm k ymm
// VPXORQ.BCST m64 ymm ymm
// VPXORQ.BCST m64 zmm k zmm
// VPXORQ.BCST m64 zmm zmm
//
// Construct and append a VPXORQ.BCST instruction to the active function.
func (c *Context) VPXORQ_BCST(ops ...operand.Op) {
c.addinstruction(x86.VPXORQ_BCST(ops...))
}
// VPXORQ_BCST: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPXORQ.BCST m64 xmm k xmm
// VPXORQ.BCST m64 xmm xmm
// VPXORQ.BCST m64 ymm k ymm
// VPXORQ.BCST m64 ymm ymm
// VPXORQ.BCST m64 zmm k zmm
// VPXORQ.BCST m64 zmm zmm
//
// Construct and append a VPXORQ.BCST instruction to the active function.
// Operates on the global context.
func VPXORQ_BCST(ops ...operand.Op) { ctx.VPXORQ_BCST(ops...) }
// VPXORQ_BCST_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORQ.BCST.Z m64 xmm k xmm
// VPXORQ.BCST.Z m64 ymm k ymm
// VPXORQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPXORQ.BCST.Z instruction to the active function.
func (c *Context) VPXORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPXORQ_BCST_Z(m, xyz, k, xyz1))
}
// VPXORQ_BCST_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORQ.BCST.Z m64 xmm k xmm
// VPXORQ.BCST.Z m64 ymm k ymm
// VPXORQ.BCST.Z m64 zmm k zmm
//
// Construct and append a VPXORQ.BCST.Z instruction to the active function.
// Operates on the global context.
func VPXORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPXORQ_BCST_Z(m, xyz, k, xyz1) }
// VPXORQ_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORQ.Z m128 xmm k xmm
// VPXORQ.Z m256 ymm k ymm
// VPXORQ.Z xmm xmm k xmm
// VPXORQ.Z ymm ymm k ymm
// VPXORQ.Z m512 zmm k zmm
// VPXORQ.Z zmm zmm k zmm
//
// Construct and append a VPXORQ.Z instruction to the active function.
func (c *Context) VPXORQ_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VPXORQ_Z(mxyz, xyz, k, xyz1))
}
// VPXORQ_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORQ.Z m128 xmm k xmm
// VPXORQ.Z m256 ymm k ymm
// VPXORQ.Z xmm xmm k xmm
// VPXORQ.Z ymm ymm k ymm
// VPXORQ.Z m512 zmm k zmm
// VPXORQ.Z zmm zmm k zmm
//
// Construct and append a VPXORQ.Z instruction to the active function.
// Operates on the global context.
func VPXORQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPXORQ_Z(mxyz, xyz, k, xyz1) }
// VRANGEPD: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPD imm8 m128 xmm k xmm
// VRANGEPD imm8 m128 xmm xmm
// VRANGEPD imm8 m256 ymm k ymm
// VRANGEPD imm8 m256 ymm ymm
// VRANGEPD imm8 xmm xmm k xmm
// VRANGEPD imm8 xmm xmm xmm
// VRANGEPD imm8 ymm ymm k ymm
// VRANGEPD imm8 ymm ymm ymm
// VRANGEPD imm8 m512 zmm k zmm
// VRANGEPD imm8 m512 zmm zmm
// VRANGEPD imm8 zmm zmm k zmm
// VRANGEPD imm8 zmm zmm zmm
//
// Construct and append a VRANGEPD instruction to the active function.
func (c *Context) VRANGEPD(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPD(ops...))
}
// VRANGEPD: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPD imm8 m128 xmm k xmm
// VRANGEPD imm8 m128 xmm xmm
// VRANGEPD imm8 m256 ymm k ymm
// VRANGEPD imm8 m256 ymm ymm
// VRANGEPD imm8 xmm xmm k xmm
// VRANGEPD imm8 xmm xmm xmm
// VRANGEPD imm8 ymm ymm k ymm
// VRANGEPD imm8 ymm ymm ymm
// VRANGEPD imm8 m512 zmm k zmm
// VRANGEPD imm8 m512 zmm zmm
// VRANGEPD imm8 zmm zmm k zmm
// VRANGEPD imm8 zmm zmm zmm
//
// Construct and append a VRANGEPD instruction to the active function.
// Operates on the global context.
func VRANGEPD(ops ...operand.Op) { ctx.VRANGEPD(ops...) }
// VRANGEPD_BCST: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPD.BCST imm8 m64 xmm k xmm
// VRANGEPD.BCST imm8 m64 xmm xmm
// VRANGEPD.BCST imm8 m64 ymm k ymm
// VRANGEPD.BCST imm8 m64 ymm ymm
// VRANGEPD.BCST imm8 m64 zmm k zmm
// VRANGEPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VRANGEPD.BCST instruction to the active function.
func (c *Context) VRANGEPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPD_BCST(ops...))
}
// VRANGEPD_BCST: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPD.BCST imm8 m64 xmm k xmm
// VRANGEPD.BCST imm8 m64 xmm xmm
// VRANGEPD.BCST imm8 m64 ymm k ymm
// VRANGEPD.BCST imm8 m64 ymm ymm
// VRANGEPD.BCST imm8 m64 zmm k zmm
// VRANGEPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VRANGEPD.BCST instruction to the active function.
// Operates on the global context.
func VRANGEPD_BCST(ops ...operand.Op) { ctx.VRANGEPD_BCST(ops...) }
// VRANGEPD_BCST_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.BCST.Z imm8 m64 xmm k xmm
// VRANGEPD.BCST.Z imm8 m64 ymm k ymm
// VRANGEPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VRANGEPD.BCST.Z instruction to the active function.
func (c *Context) VRANGEPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VRANGEPD_BCST_Z(i, m, xyz, k, xyz1))
}
// VRANGEPD_BCST_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.BCST.Z imm8 m64 xmm k xmm
// VRANGEPD.BCST.Z imm8 m64 ymm k ymm
// VRANGEPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VRANGEPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRANGEPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VRANGEPD_BCST_Z(i, m, xyz, k, xyz1) }
// VRANGEPD_SAE: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPD.SAE imm8 zmm zmm k zmm
// VRANGEPD.SAE imm8 zmm zmm zmm
//
// Construct and append a VRANGEPD.SAE instruction to the active function.
func (c *Context) VRANGEPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPD_SAE(ops...))
}
// VRANGEPD_SAE: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPD.SAE imm8 zmm zmm k zmm
// VRANGEPD.SAE imm8 zmm zmm zmm
//
// Construct and append a VRANGEPD.SAE instruction to the active function.
// Operates on the global context.
func VRANGEPD_SAE(ops ...operand.Op) { ctx.VRANGEPD_SAE(ops...) }
// VRANGEPD_SAE_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPD.SAE.Z instruction to the active function.
func (c *Context) VRANGEPD_SAE_Z(i, z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VRANGEPD_SAE_Z(i, z, z1, k, z2))
}
// VRANGEPD_SAE_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRANGEPD_SAE_Z(i, z, z1, k, z2 operand.Op) { ctx.VRANGEPD_SAE_Z(i, z, z1, k, z2) }
// VRANGEPD_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPD.Z imm8 m128 xmm k xmm
// VRANGEPD.Z imm8 m256 ymm k ymm
// VRANGEPD.Z imm8 xmm xmm k xmm
// VRANGEPD.Z imm8 ymm ymm k ymm
// VRANGEPD.Z imm8 m512 zmm k zmm
// VRANGEPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPD.Z instruction to the active function.
func (c *Context) VRANGEPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VRANGEPD_Z(i, mxyz, xyz, k, xyz1))
}
// VRANGEPD_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPD.Z imm8 m128 xmm k xmm
// VRANGEPD.Z imm8 m256 ymm k ymm
// VRANGEPD.Z imm8 xmm xmm k xmm
// VRANGEPD.Z imm8 ymm ymm k ymm
// VRANGEPD.Z imm8 m512 zmm k zmm
// VRANGEPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPD.Z instruction to the active function.
// Operates on the global context.
func VRANGEPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VRANGEPD_Z(i, mxyz, xyz, k, xyz1) }
// VRANGEPS: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPS imm8 m128 xmm k xmm
// VRANGEPS imm8 m128 xmm xmm
// VRANGEPS imm8 m256 ymm k ymm
// VRANGEPS imm8 m256 ymm ymm
// VRANGEPS imm8 xmm xmm k xmm
// VRANGEPS imm8 xmm xmm xmm
// VRANGEPS imm8 ymm ymm k ymm
// VRANGEPS imm8 ymm ymm ymm
// VRANGEPS imm8 m512 zmm k zmm
// VRANGEPS imm8 m512 zmm zmm
// VRANGEPS imm8 zmm zmm k zmm
// VRANGEPS imm8 zmm zmm zmm
//
// Construct and append a VRANGEPS instruction to the active function.
func (c *Context) VRANGEPS(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPS(ops...))
}
// VRANGEPS: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPS imm8 m128 xmm k xmm
// VRANGEPS imm8 m128 xmm xmm
// VRANGEPS imm8 m256 ymm k ymm
// VRANGEPS imm8 m256 ymm ymm
// VRANGEPS imm8 xmm xmm k xmm
// VRANGEPS imm8 xmm xmm xmm
// VRANGEPS imm8 ymm ymm k ymm
// VRANGEPS imm8 ymm ymm ymm
// VRANGEPS imm8 m512 zmm k zmm
// VRANGEPS imm8 m512 zmm zmm
// VRANGEPS imm8 zmm zmm k zmm
// VRANGEPS imm8 zmm zmm zmm
//
// Construct and append a VRANGEPS instruction to the active function.
// Operates on the global context.
func VRANGEPS(ops ...operand.Op) { ctx.VRANGEPS(ops...) }
// VRANGEPS_BCST: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPS.BCST imm8 m32 xmm k xmm
// VRANGEPS.BCST imm8 m32 xmm xmm
// VRANGEPS.BCST imm8 m32 ymm k ymm
// VRANGEPS.BCST imm8 m32 ymm ymm
// VRANGEPS.BCST imm8 m32 zmm k zmm
// VRANGEPS.BCST imm8 m32 zmm zmm
//
// Construct and append a VRANGEPS.BCST instruction to the active function.
func (c *Context) VRANGEPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPS_BCST(ops...))
}
// VRANGEPS_BCST: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPS.BCST imm8 m32 xmm k xmm
// VRANGEPS.BCST imm8 m32 xmm xmm
// VRANGEPS.BCST imm8 m32 ymm k ymm
// VRANGEPS.BCST imm8 m32 ymm ymm
// VRANGEPS.BCST imm8 m32 zmm k zmm
// VRANGEPS.BCST imm8 m32 zmm zmm
//
// Construct and append a VRANGEPS.BCST instruction to the active function.
// Operates on the global context.
func VRANGEPS_BCST(ops ...operand.Op) { ctx.VRANGEPS_BCST(ops...) }
// VRANGEPS_BCST_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.BCST.Z imm8 m32 xmm k xmm
// VRANGEPS.BCST.Z imm8 m32 ymm k ymm
// VRANGEPS.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VRANGEPS.BCST.Z instruction to the active function.
func (c *Context) VRANGEPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VRANGEPS_BCST_Z(i, m, xyz, k, xyz1))
}
// VRANGEPS_BCST_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.BCST.Z imm8 m32 xmm k xmm
// VRANGEPS.BCST.Z imm8 m32 ymm k ymm
// VRANGEPS.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VRANGEPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRANGEPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VRANGEPS_BCST_Z(i, m, xyz, k, xyz1) }
// VRANGEPS_SAE: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPS.SAE imm8 zmm zmm k zmm
// VRANGEPS.SAE imm8 zmm zmm zmm
//
// Construct and append a VRANGEPS.SAE instruction to the active function.
func (c *Context) VRANGEPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRANGEPS_SAE(ops...))
}
// VRANGEPS_SAE: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPS.SAE imm8 zmm zmm k zmm
// VRANGEPS.SAE imm8 zmm zmm zmm
//
// Construct and append a VRANGEPS.SAE instruction to the active function.
// Operates on the global context.
func VRANGEPS_SAE(ops ...operand.Op) { ctx.VRANGEPS_SAE(ops...) }
// VRANGEPS_SAE_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPS.SAE.Z instruction to the active function.
func (c *Context) VRANGEPS_SAE_Z(i, z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VRANGEPS_SAE_Z(i, z, z1, k, z2))
}
// VRANGEPS_SAE_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.SAE.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRANGEPS_SAE_Z(i, z, z1, k, z2 operand.Op) { ctx.VRANGEPS_SAE_Z(i, z, z1, k, z2) }
// VRANGEPS_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPS.Z imm8 m128 xmm k xmm
// VRANGEPS.Z imm8 m256 ymm k ymm
// VRANGEPS.Z imm8 xmm xmm k xmm
// VRANGEPS.Z imm8 ymm ymm k ymm
// VRANGEPS.Z imm8 m512 zmm k zmm
// VRANGEPS.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPS.Z instruction to the active function.
func (c *Context) VRANGEPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VRANGEPS_Z(i, mxyz, xyz, k, xyz1))
}
// VRANGEPS_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPS.Z imm8 m128 xmm k xmm
// VRANGEPS.Z imm8 m256 ymm k ymm
// VRANGEPS.Z imm8 xmm xmm k xmm
// VRANGEPS.Z imm8 ymm ymm k ymm
// VRANGEPS.Z imm8 m512 zmm k zmm
// VRANGEPS.Z imm8 zmm zmm k zmm
//
// Construct and append a VRANGEPS.Z instruction to the active function.
// Operates on the global context.
func VRANGEPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VRANGEPS_Z(i, mxyz, xyz, k, xyz1) }
// VRANGESD: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESD imm8 m64 xmm k xmm
// VRANGESD imm8 m64 xmm xmm
// VRANGESD imm8 xmm xmm k xmm
// VRANGESD imm8 xmm xmm xmm
//
// Construct and append a VRANGESD instruction to the active function.
func (c *Context) VRANGESD(ops ...operand.Op) {
c.addinstruction(x86.VRANGESD(ops...))
}
// VRANGESD: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESD imm8 m64 xmm k xmm
// VRANGESD imm8 m64 xmm xmm
// VRANGESD imm8 xmm xmm k xmm
// VRANGESD imm8 xmm xmm xmm
//
// Construct and append a VRANGESD instruction to the active function.
// Operates on the global context.
func VRANGESD(ops ...operand.Op) { ctx.VRANGESD(ops...) }
// VRANGESD_SAE: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESD.SAE imm8 xmm xmm k xmm
// VRANGESD.SAE imm8 xmm xmm xmm
//
// Construct and append a VRANGESD.SAE instruction to the active function.
func (c *Context) VRANGESD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRANGESD_SAE(ops...))
}
// VRANGESD_SAE: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESD.SAE imm8 xmm xmm k xmm
// VRANGESD.SAE imm8 xmm xmm xmm
//
// Construct and append a VRANGESD.SAE instruction to the active function.
// Operates on the global context.
func VRANGESD_SAE(ops ...operand.Op) { ctx.VRANGESD_SAE(ops...) }
// VRANGESD_SAE_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESD.SAE.Z instruction to the active function.
func (c *Context) VRANGESD_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRANGESD_SAE_Z(i, x, x1, k, x2))
}
// VRANGESD_SAE_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRANGESD_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VRANGESD_SAE_Z(i, x, x1, k, x2) }
// VRANGESD_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESD.Z imm8 m64 xmm k xmm
// VRANGESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESD.Z instruction to the active function.
func (c *Context) VRANGESD_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRANGESD_Z(i, mx, x, k, x1))
}
// VRANGESD_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESD.Z imm8 m64 xmm k xmm
// VRANGESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESD.Z instruction to the active function.
// Operates on the global context.
func VRANGESD_Z(i, mx, x, k, x1 operand.Op) { ctx.VRANGESD_Z(i, mx, x, k, x1) }
// VRANGESS: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESS imm8 m32 xmm k xmm
// VRANGESS imm8 m32 xmm xmm
// VRANGESS imm8 xmm xmm k xmm
// VRANGESS imm8 xmm xmm xmm
//
// Construct and append a VRANGESS instruction to the active function.
func (c *Context) VRANGESS(ops ...operand.Op) {
c.addinstruction(x86.VRANGESS(ops...))
}
// VRANGESS: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESS imm8 m32 xmm k xmm
// VRANGESS imm8 m32 xmm xmm
// VRANGESS imm8 xmm xmm k xmm
// VRANGESS imm8 xmm xmm xmm
//
// Construct and append a VRANGESS instruction to the active function.
// Operates on the global context.
func VRANGESS(ops ...operand.Op) { ctx.VRANGESS(ops...) }
// VRANGESS_SAE: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESS.SAE imm8 xmm xmm k xmm
// VRANGESS.SAE imm8 xmm xmm xmm
//
// Construct and append a VRANGESS.SAE instruction to the active function.
func (c *Context) VRANGESS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRANGESS_SAE(ops...))
}
// VRANGESS_SAE: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESS.SAE imm8 xmm xmm k xmm
// VRANGESS.SAE imm8 xmm xmm xmm
//
// Construct and append a VRANGESS.SAE instruction to the active function.
// Operates on the global context.
func VRANGESS_SAE(ops ...operand.Op) { ctx.VRANGESS_SAE(ops...) }
// VRANGESS_SAE_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESS.SAE.Z instruction to the active function.
func (c *Context) VRANGESS_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRANGESS_SAE_Z(i, x, x1, k, x2))
}
// VRANGESS_SAE_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRANGESS_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VRANGESS_SAE_Z(i, x, x1, k, x2) }
// VRANGESS_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESS.Z imm8 m32 xmm k xmm
// VRANGESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESS.Z instruction to the active function.
func (c *Context) VRANGESS_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRANGESS_Z(i, mx, x, k, x1))
}
// VRANGESS_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESS.Z imm8 m32 xmm k xmm
// VRANGESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VRANGESS.Z instruction to the active function.
// Operates on the global context.
func VRANGESS_Z(i, mx, x, k, x1 operand.Op) { ctx.VRANGESS_Z(i, mx, x, k, x1) }
// VRCP14PD: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PD m128 k xmm
// VRCP14PD m128 xmm
// VRCP14PD m256 k ymm
// VRCP14PD m256 ymm
// VRCP14PD xmm k xmm
// VRCP14PD xmm xmm
// VRCP14PD ymm k ymm
// VRCP14PD ymm ymm
// VRCP14PD m512 k zmm
// VRCP14PD m512 zmm
// VRCP14PD zmm k zmm
// VRCP14PD zmm zmm
//
// Construct and append a VRCP14PD instruction to the active function.
func (c *Context) VRCP14PD(ops ...operand.Op) {
c.addinstruction(x86.VRCP14PD(ops...))
}
// VRCP14PD: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PD m128 k xmm
// VRCP14PD m128 xmm
// VRCP14PD m256 k ymm
// VRCP14PD m256 ymm
// VRCP14PD xmm k xmm
// VRCP14PD xmm xmm
// VRCP14PD ymm k ymm
// VRCP14PD ymm ymm
// VRCP14PD m512 k zmm
// VRCP14PD m512 zmm
// VRCP14PD zmm k zmm
// VRCP14PD zmm zmm
//
// Construct and append a VRCP14PD instruction to the active function.
// Operates on the global context.
func VRCP14PD(ops ...operand.Op) { ctx.VRCP14PD(ops...) }
// VRCP14PD_BCST: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PD.BCST m64 k xmm
// VRCP14PD.BCST m64 k ymm
// VRCP14PD.BCST m64 xmm
// VRCP14PD.BCST m64 ymm
// VRCP14PD.BCST m64 k zmm
// VRCP14PD.BCST m64 zmm
//
// Construct and append a VRCP14PD.BCST instruction to the active function.
func (c *Context) VRCP14PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRCP14PD_BCST(ops...))
}
// VRCP14PD_BCST: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PD.BCST m64 k xmm
// VRCP14PD.BCST m64 k ymm
// VRCP14PD.BCST m64 xmm
// VRCP14PD.BCST m64 ymm
// VRCP14PD.BCST m64 k zmm
// VRCP14PD.BCST m64 zmm
//
// Construct and append a VRCP14PD.BCST instruction to the active function.
// Operates on the global context.
func VRCP14PD_BCST(ops ...operand.Op) { ctx.VRCP14PD_BCST(ops...) }
// VRCP14PD_BCST_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PD.BCST.Z m64 k xmm
// VRCP14PD.BCST.Z m64 k ymm
// VRCP14PD.BCST.Z m64 k zmm
//
// Construct and append a VRCP14PD.BCST.Z instruction to the active function.
func (c *Context) VRCP14PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VRCP14PD_BCST_Z(m, k, xyz))
}
// VRCP14PD_BCST_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PD.BCST.Z m64 k xmm
// VRCP14PD.BCST.Z m64 k ymm
// VRCP14PD.BCST.Z m64 k zmm
//
// Construct and append a VRCP14PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRCP14PD_BCST_Z(m, k, xyz operand.Op) { ctx.VRCP14PD_BCST_Z(m, k, xyz) }
// VRCP14PD_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PD.Z m128 k xmm
// VRCP14PD.Z m256 k ymm
// VRCP14PD.Z xmm k xmm
// VRCP14PD.Z ymm k ymm
// VRCP14PD.Z m512 k zmm
// VRCP14PD.Z zmm k zmm
//
// Construct and append a VRCP14PD.Z instruction to the active function.
func (c *Context) VRCP14PD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRCP14PD_Z(mxyz, k, xyz))
}
// VRCP14PD_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PD.Z m128 k xmm
// VRCP14PD.Z m256 k ymm
// VRCP14PD.Z xmm k xmm
// VRCP14PD.Z ymm k ymm
// VRCP14PD.Z m512 k zmm
// VRCP14PD.Z zmm k zmm
//
// Construct and append a VRCP14PD.Z instruction to the active function.
// Operates on the global context.
func VRCP14PD_Z(mxyz, k, xyz operand.Op) { ctx.VRCP14PD_Z(mxyz, k, xyz) }
// VRCP14PS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PS m128 k xmm
// VRCP14PS m128 xmm
// VRCP14PS m256 k ymm
// VRCP14PS m256 ymm
// VRCP14PS xmm k xmm
// VRCP14PS xmm xmm
// VRCP14PS ymm k ymm
// VRCP14PS ymm ymm
// VRCP14PS m512 k zmm
// VRCP14PS m512 zmm
// VRCP14PS zmm k zmm
// VRCP14PS zmm zmm
//
// Construct and append a VRCP14PS instruction to the active function.
func (c *Context) VRCP14PS(ops ...operand.Op) {
c.addinstruction(x86.VRCP14PS(ops...))
}
// VRCP14PS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PS m128 k xmm
// VRCP14PS m128 xmm
// VRCP14PS m256 k ymm
// VRCP14PS m256 ymm
// VRCP14PS xmm k xmm
// VRCP14PS xmm xmm
// VRCP14PS ymm k ymm
// VRCP14PS ymm ymm
// VRCP14PS m512 k zmm
// VRCP14PS m512 zmm
// VRCP14PS zmm k zmm
// VRCP14PS zmm zmm
//
// Construct and append a VRCP14PS instruction to the active function.
// Operates on the global context.
func VRCP14PS(ops ...operand.Op) { ctx.VRCP14PS(ops...) }
// VRCP14PS_BCST: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PS.BCST m32 k xmm
// VRCP14PS.BCST m32 k ymm
// VRCP14PS.BCST m32 xmm
// VRCP14PS.BCST m32 ymm
// VRCP14PS.BCST m32 k zmm
// VRCP14PS.BCST m32 zmm
//
// Construct and append a VRCP14PS.BCST instruction to the active function.
func (c *Context) VRCP14PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRCP14PS_BCST(ops...))
}
// VRCP14PS_BCST: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PS.BCST m32 k xmm
// VRCP14PS.BCST m32 k ymm
// VRCP14PS.BCST m32 xmm
// VRCP14PS.BCST m32 ymm
// VRCP14PS.BCST m32 k zmm
// VRCP14PS.BCST m32 zmm
//
// Construct and append a VRCP14PS.BCST instruction to the active function.
// Operates on the global context.
func VRCP14PS_BCST(ops ...operand.Op) { ctx.VRCP14PS_BCST(ops...) }
// VRCP14PS_BCST_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PS.BCST.Z m32 k xmm
// VRCP14PS.BCST.Z m32 k ymm
// VRCP14PS.BCST.Z m32 k zmm
//
// Construct and append a VRCP14PS.BCST.Z instruction to the active function.
func (c *Context) VRCP14PS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VRCP14PS_BCST_Z(m, k, xyz))
}
// VRCP14PS_BCST_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PS.BCST.Z m32 k xmm
// VRCP14PS.BCST.Z m32 k ymm
// VRCP14PS.BCST.Z m32 k zmm
//
// Construct and append a VRCP14PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRCP14PS_BCST_Z(m, k, xyz operand.Op) { ctx.VRCP14PS_BCST_Z(m, k, xyz) }
// VRCP14PS_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PS.Z m128 k xmm
// VRCP14PS.Z m256 k ymm
// VRCP14PS.Z xmm k xmm
// VRCP14PS.Z ymm k ymm
// VRCP14PS.Z m512 k zmm
// VRCP14PS.Z zmm k zmm
//
// Construct and append a VRCP14PS.Z instruction to the active function.
func (c *Context) VRCP14PS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRCP14PS_Z(mxyz, k, xyz))
}
// VRCP14PS_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PS.Z m128 k xmm
// VRCP14PS.Z m256 k ymm
// VRCP14PS.Z xmm k xmm
// VRCP14PS.Z ymm k ymm
// VRCP14PS.Z m512 k zmm
// VRCP14PS.Z zmm k zmm
//
// Construct and append a VRCP14PS.Z instruction to the active function.
// Operates on the global context.
func VRCP14PS_Z(mxyz, k, xyz operand.Op) { ctx.VRCP14PS_Z(mxyz, k, xyz) }
// VRCP14SD: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SD m64 xmm k xmm
// VRCP14SD m64 xmm xmm
// VRCP14SD xmm xmm k xmm
// VRCP14SD xmm xmm xmm
//
// Construct and append a VRCP14SD instruction to the active function.
func (c *Context) VRCP14SD(ops ...operand.Op) {
c.addinstruction(x86.VRCP14SD(ops...))
}
// VRCP14SD: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SD m64 xmm k xmm
// VRCP14SD m64 xmm xmm
// VRCP14SD xmm xmm k xmm
// VRCP14SD xmm xmm xmm
//
// Construct and append a VRCP14SD instruction to the active function.
// Operates on the global context.
func VRCP14SD(ops ...operand.Op) { ctx.VRCP14SD(ops...) }
// VRCP14SD_Z: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SD.Z m64 xmm k xmm
// VRCP14SD.Z xmm xmm k xmm
//
// Construct and append a VRCP14SD.Z instruction to the active function.
func (c *Context) VRCP14SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRCP14SD_Z(mx, x, k, x1))
}
// VRCP14SD_Z: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SD.Z m64 xmm k xmm
// VRCP14SD.Z xmm xmm k xmm
//
// Construct and append a VRCP14SD.Z instruction to the active function.
// Operates on the global context.
func VRCP14SD_Z(mx, x, k, x1 operand.Op) { ctx.VRCP14SD_Z(mx, x, k, x1) }
// VRCP14SS: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SS m32 xmm k xmm
// VRCP14SS m32 xmm xmm
// VRCP14SS xmm xmm k xmm
// VRCP14SS xmm xmm xmm
//
// Construct and append a VRCP14SS instruction to the active function.
func (c *Context) VRCP14SS(ops ...operand.Op) {
c.addinstruction(x86.VRCP14SS(ops...))
}
// VRCP14SS: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SS m32 xmm k xmm
// VRCP14SS m32 xmm xmm
// VRCP14SS xmm xmm k xmm
// VRCP14SS xmm xmm xmm
//
// Construct and append a VRCP14SS instruction to the active function.
// Operates on the global context.
func VRCP14SS(ops ...operand.Op) { ctx.VRCP14SS(ops...) }
// VRCP14SS_Z: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SS.Z m32 xmm k xmm
// VRCP14SS.Z xmm xmm k xmm
//
// Construct and append a VRCP14SS.Z instruction to the active function.
func (c *Context) VRCP14SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRCP14SS_Z(mx, x, k, x1))
}
// VRCP14SS_Z: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SS.Z m32 xmm k xmm
// VRCP14SS.Z xmm xmm k xmm
//
// Construct and append a VRCP14SS.Z instruction to the active function.
// Operates on the global context.
func VRCP14SS_Z(mx, x, k, x1 operand.Op) { ctx.VRCP14SS_Z(mx, x, k, x1) }
// VRCP28PD: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PD m512 k zmm
// VRCP28PD m512 zmm
// VRCP28PD zmm k zmm
// VRCP28PD zmm zmm
//
// Construct and append a VRCP28PD instruction to the active function.
func (c *Context) VRCP28PD(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PD(ops...))
}
// VRCP28PD: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PD m512 k zmm
// VRCP28PD m512 zmm
// VRCP28PD zmm k zmm
// VRCP28PD zmm zmm
//
// Construct and append a VRCP28PD instruction to the active function.
// Operates on the global context.
func VRCP28PD(ops ...operand.Op) { ctx.VRCP28PD(ops...) }
// VRCP28PD_BCST: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PD.BCST m64 k zmm
// VRCP28PD.BCST m64 zmm
//
// Construct and append a VRCP28PD.BCST instruction to the active function.
func (c *Context) VRCP28PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PD_BCST(ops...))
}
// VRCP28PD_BCST: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PD.BCST m64 k zmm
// VRCP28PD.BCST m64 zmm
//
// Construct and append a VRCP28PD.BCST instruction to the active function.
// Operates on the global context.
func VRCP28PD_BCST(ops ...operand.Op) { ctx.VRCP28PD_BCST(ops...) }
// VRCP28PD_BCST_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.BCST.Z m64 k zmm
//
// Construct and append a VRCP28PD.BCST.Z instruction to the active function.
func (c *Context) VRCP28PD_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VRCP28PD_BCST_Z(m, k, z))
}
// VRCP28PD_BCST_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.BCST.Z m64 k zmm
//
// Construct and append a VRCP28PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRCP28PD_BCST_Z(m, k, z operand.Op) { ctx.VRCP28PD_BCST_Z(m, k, z) }
// VRCP28PD_SAE: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PD.SAE zmm k zmm
// VRCP28PD.SAE zmm zmm
//
// Construct and append a VRCP28PD.SAE instruction to the active function.
func (c *Context) VRCP28PD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PD_SAE(ops...))
}
// VRCP28PD_SAE: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PD.SAE zmm k zmm
// VRCP28PD.SAE zmm zmm
//
// Construct and append a VRCP28PD.SAE instruction to the active function.
// Operates on the global context.
func VRCP28PD_SAE(ops ...operand.Op) { ctx.VRCP28PD_SAE(ops...) }
// VRCP28PD_SAE_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.SAE.Z zmm k zmm
//
// Construct and append a VRCP28PD.SAE.Z instruction to the active function.
func (c *Context) VRCP28PD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VRCP28PD_SAE_Z(z, k, z1))
}
// VRCP28PD_SAE_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.SAE.Z zmm k zmm
//
// Construct and append a VRCP28PD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRCP28PD_SAE_Z(z, k, z1 operand.Op) { ctx.VRCP28PD_SAE_Z(z, k, z1) }
// VRCP28PD_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PD.Z m512 k zmm
// VRCP28PD.Z zmm k zmm
//
// Construct and append a VRCP28PD.Z instruction to the active function.
func (c *Context) VRCP28PD_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VRCP28PD_Z(mz, k, z))
}
// VRCP28PD_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PD.Z m512 k zmm
// VRCP28PD.Z zmm k zmm
//
// Construct and append a VRCP28PD.Z instruction to the active function.
// Operates on the global context.
func VRCP28PD_Z(mz, k, z operand.Op) { ctx.VRCP28PD_Z(mz, k, z) }
// VRCP28PS: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PS m512 k zmm
// VRCP28PS m512 zmm
// VRCP28PS zmm k zmm
// VRCP28PS zmm zmm
//
// Construct and append a VRCP28PS instruction to the active function.
func (c *Context) VRCP28PS(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PS(ops...))
}
// VRCP28PS: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PS m512 k zmm
// VRCP28PS m512 zmm
// VRCP28PS zmm k zmm
// VRCP28PS zmm zmm
//
// Construct and append a VRCP28PS instruction to the active function.
// Operates on the global context.
func VRCP28PS(ops ...operand.Op) { ctx.VRCP28PS(ops...) }
// VRCP28PS_BCST: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PS.BCST m32 k zmm
// VRCP28PS.BCST m32 zmm
//
// Construct and append a VRCP28PS.BCST instruction to the active function.
func (c *Context) VRCP28PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PS_BCST(ops...))
}
// VRCP28PS_BCST: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PS.BCST m32 k zmm
// VRCP28PS.BCST m32 zmm
//
// Construct and append a VRCP28PS.BCST instruction to the active function.
// Operates on the global context.
func VRCP28PS_BCST(ops ...operand.Op) { ctx.VRCP28PS_BCST(ops...) }
// VRCP28PS_BCST_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.BCST.Z m32 k zmm
//
// Construct and append a VRCP28PS.BCST.Z instruction to the active function.
func (c *Context) VRCP28PS_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VRCP28PS_BCST_Z(m, k, z))
}
// VRCP28PS_BCST_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.BCST.Z m32 k zmm
//
// Construct and append a VRCP28PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRCP28PS_BCST_Z(m, k, z operand.Op) { ctx.VRCP28PS_BCST_Z(m, k, z) }
// VRCP28PS_SAE: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PS.SAE zmm k zmm
// VRCP28PS.SAE zmm zmm
//
// Construct and append a VRCP28PS.SAE instruction to the active function.
func (c *Context) VRCP28PS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRCP28PS_SAE(ops...))
}
// VRCP28PS_SAE: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PS.SAE zmm k zmm
// VRCP28PS.SAE zmm zmm
//
// Construct and append a VRCP28PS.SAE instruction to the active function.
// Operates on the global context.
func VRCP28PS_SAE(ops ...operand.Op) { ctx.VRCP28PS_SAE(ops...) }
// VRCP28PS_SAE_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.SAE.Z zmm k zmm
//
// Construct and append a VRCP28PS.SAE.Z instruction to the active function.
func (c *Context) VRCP28PS_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VRCP28PS_SAE_Z(z, k, z1))
}
// VRCP28PS_SAE_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.SAE.Z zmm k zmm
//
// Construct and append a VRCP28PS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRCP28PS_SAE_Z(z, k, z1 operand.Op) { ctx.VRCP28PS_SAE_Z(z, k, z1) }
// VRCP28PS_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PS.Z m512 k zmm
// VRCP28PS.Z zmm k zmm
//
// Construct and append a VRCP28PS.Z instruction to the active function.
func (c *Context) VRCP28PS_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VRCP28PS_Z(mz, k, z))
}
// VRCP28PS_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PS.Z m512 k zmm
// VRCP28PS.Z zmm k zmm
//
// Construct and append a VRCP28PS.Z instruction to the active function.
// Operates on the global context.
func VRCP28PS_Z(mz, k, z operand.Op) { ctx.VRCP28PS_Z(mz, k, z) }
// VRCP28SD: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SD m64 xmm k xmm
// VRCP28SD m64 xmm xmm
// VRCP28SD xmm xmm k xmm
// VRCP28SD xmm xmm xmm
//
// Construct and append a VRCP28SD instruction to the active function.
func (c *Context) VRCP28SD(ops ...operand.Op) {
c.addinstruction(x86.VRCP28SD(ops...))
}
// VRCP28SD: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SD m64 xmm k xmm
// VRCP28SD m64 xmm xmm
// VRCP28SD xmm xmm k xmm
// VRCP28SD xmm xmm xmm
//
// Construct and append a VRCP28SD instruction to the active function.
// Operates on the global context.
func VRCP28SD(ops ...operand.Op) { ctx.VRCP28SD(ops...) }
// VRCP28SD_SAE: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SD.SAE xmm xmm k xmm
// VRCP28SD.SAE xmm xmm xmm
//
// Construct and append a VRCP28SD.SAE instruction to the active function.
func (c *Context) VRCP28SD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRCP28SD_SAE(ops...))
}
// VRCP28SD_SAE: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SD.SAE xmm xmm k xmm
// VRCP28SD.SAE xmm xmm xmm
//
// Construct and append a VRCP28SD.SAE instruction to the active function.
// Operates on the global context.
func VRCP28SD_SAE(ops ...operand.Op) { ctx.VRCP28SD_SAE(ops...) }
// VRCP28SD_SAE_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VRCP28SD.SAE.Z instruction to the active function.
func (c *Context) VRCP28SD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRCP28SD_SAE_Z(x, x1, k, x2))
}
// VRCP28SD_SAE_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VRCP28SD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRCP28SD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VRCP28SD_SAE_Z(x, x1, k, x2) }
// VRCP28SD_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SD.Z m64 xmm k xmm
// VRCP28SD.Z xmm xmm k xmm
//
// Construct and append a VRCP28SD.Z instruction to the active function.
func (c *Context) VRCP28SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRCP28SD_Z(mx, x, k, x1))
}
// VRCP28SD_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SD.Z m64 xmm k xmm
// VRCP28SD.Z xmm xmm k xmm
//
// Construct and append a VRCP28SD.Z instruction to the active function.
// Operates on the global context.
func VRCP28SD_Z(mx, x, k, x1 operand.Op) { ctx.VRCP28SD_Z(mx, x, k, x1) }
// VRCP28SS: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SS m32 xmm k xmm
// VRCP28SS m32 xmm xmm
// VRCP28SS xmm xmm k xmm
// VRCP28SS xmm xmm xmm
//
// Construct and append a VRCP28SS instruction to the active function.
func (c *Context) VRCP28SS(ops ...operand.Op) {
c.addinstruction(x86.VRCP28SS(ops...))
}
// VRCP28SS: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SS m32 xmm k xmm
// VRCP28SS m32 xmm xmm
// VRCP28SS xmm xmm k xmm
// VRCP28SS xmm xmm xmm
//
// Construct and append a VRCP28SS instruction to the active function.
// Operates on the global context.
func VRCP28SS(ops ...operand.Op) { ctx.VRCP28SS(ops...) }
// VRCP28SS_SAE: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SS.SAE xmm xmm k xmm
// VRCP28SS.SAE xmm xmm xmm
//
// Construct and append a VRCP28SS.SAE instruction to the active function.
func (c *Context) VRCP28SS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRCP28SS_SAE(ops...))
}
// VRCP28SS_SAE: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SS.SAE xmm xmm k xmm
// VRCP28SS.SAE xmm xmm xmm
//
// Construct and append a VRCP28SS.SAE instruction to the active function.
// Operates on the global context.
func VRCP28SS_SAE(ops ...operand.Op) { ctx.VRCP28SS_SAE(ops...) }
// VRCP28SS_SAE_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SS.SAE.Z xmm xmm k xmm
//
// Construct and append a VRCP28SS.SAE.Z instruction to the active function.
func (c *Context) VRCP28SS_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRCP28SS_SAE_Z(x, x1, k, x2))
}
// VRCP28SS_SAE_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SS.SAE.Z xmm xmm k xmm
//
// Construct and append a VRCP28SS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRCP28SS_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VRCP28SS_SAE_Z(x, x1, k, x2) }
// VRCP28SS_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SS.Z m32 xmm k xmm
// VRCP28SS.Z xmm xmm k xmm
//
// Construct and append a VRCP28SS.Z instruction to the active function.
func (c *Context) VRCP28SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRCP28SS_Z(mx, x, k, x1))
}
// VRCP28SS_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SS.Z m32 xmm k xmm
// VRCP28SS.Z xmm xmm k xmm
//
// Construct and append a VRCP28SS.Z instruction to the active function.
// Operates on the global context.
func VRCP28SS_Z(mx, x, k, x1 operand.Op) { ctx.VRCP28SS_Z(mx, x, k, x1) }
// VRCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPPS m128 xmm
// VRCPPS m256 ymm
// VRCPPS xmm xmm
// VRCPPS ymm ymm
//
// Construct and append a VRCPPS instruction to the active function.
func (c *Context) VRCPPS(mxy, xy operand.Op) {
c.addinstruction(x86.VRCPPS(mxy, xy))
}
// VRCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPPS m128 xmm
// VRCPPS m256 ymm
// VRCPPS xmm xmm
// VRCPPS ymm ymm
//
// Construct and append a VRCPPS instruction to the active function.
// Operates on the global context.
func VRCPPS(mxy, xy operand.Op) { ctx.VRCPPS(mxy, xy) }
// VRCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPSS m32 xmm xmm
// VRCPSS xmm xmm xmm
//
// Construct and append a VRCPSS instruction to the active function.
func (c *Context) VRCPSS(mx, x, x1 operand.Op) {
c.addinstruction(x86.VRCPSS(mx, x, x1))
}
// VRCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPSS m32 xmm xmm
// VRCPSS xmm xmm xmm
//
// Construct and append a VRCPSS instruction to the active function.
// Operates on the global context.
func VRCPSS(mx, x, x1 operand.Op) { ctx.VRCPSS(mx, x, x1) }
// VREDUCEPD: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPD imm8 m128 k xmm
// VREDUCEPD imm8 m128 xmm
// VREDUCEPD imm8 m256 k ymm
// VREDUCEPD imm8 m256 ymm
// VREDUCEPD imm8 xmm k xmm
// VREDUCEPD imm8 xmm xmm
// VREDUCEPD imm8 ymm k ymm
// VREDUCEPD imm8 ymm ymm
// VREDUCEPD imm8 m512 k zmm
// VREDUCEPD imm8 m512 zmm
// VREDUCEPD imm8 zmm k zmm
// VREDUCEPD imm8 zmm zmm
//
// Construct and append a VREDUCEPD instruction to the active function.
func (c *Context) VREDUCEPD(ops ...operand.Op) {
c.addinstruction(x86.VREDUCEPD(ops...))
}
// VREDUCEPD: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPD imm8 m128 k xmm
// VREDUCEPD imm8 m128 xmm
// VREDUCEPD imm8 m256 k ymm
// VREDUCEPD imm8 m256 ymm
// VREDUCEPD imm8 xmm k xmm
// VREDUCEPD imm8 xmm xmm
// VREDUCEPD imm8 ymm k ymm
// VREDUCEPD imm8 ymm ymm
// VREDUCEPD imm8 m512 k zmm
// VREDUCEPD imm8 m512 zmm
// VREDUCEPD imm8 zmm k zmm
// VREDUCEPD imm8 zmm zmm
//
// Construct and append a VREDUCEPD instruction to the active function.
// Operates on the global context.
func VREDUCEPD(ops ...operand.Op) { ctx.VREDUCEPD(ops...) }
// VREDUCEPD_BCST: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPD.BCST imm8 m64 k xmm
// VREDUCEPD.BCST imm8 m64 k ymm
// VREDUCEPD.BCST imm8 m64 xmm
// VREDUCEPD.BCST imm8 m64 ymm
// VREDUCEPD.BCST imm8 m64 k zmm
// VREDUCEPD.BCST imm8 m64 zmm
//
// Construct and append a VREDUCEPD.BCST instruction to the active function.
func (c *Context) VREDUCEPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VREDUCEPD_BCST(ops...))
}
// VREDUCEPD_BCST: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPD.BCST imm8 m64 k xmm
// VREDUCEPD.BCST imm8 m64 k ymm
// VREDUCEPD.BCST imm8 m64 xmm
// VREDUCEPD.BCST imm8 m64 ymm
// VREDUCEPD.BCST imm8 m64 k zmm
// VREDUCEPD.BCST imm8 m64 zmm
//
// Construct and append a VREDUCEPD.BCST instruction to the active function.
// Operates on the global context.
func VREDUCEPD_BCST(ops ...operand.Op) { ctx.VREDUCEPD_BCST(ops...) }
// VREDUCEPD_BCST_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.BCST.Z imm8 m64 k xmm
// VREDUCEPD.BCST.Z imm8 m64 k ymm
// VREDUCEPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VREDUCEPD.BCST.Z instruction to the active function.
func (c *Context) VREDUCEPD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VREDUCEPD_BCST_Z(i, m, k, xyz))
}
// VREDUCEPD_BCST_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.BCST.Z imm8 m64 k xmm
// VREDUCEPD.BCST.Z imm8 m64 k ymm
// VREDUCEPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VREDUCEPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VREDUCEPD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VREDUCEPD_BCST_Z(i, m, k, xyz) }
// VREDUCEPD_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.Z imm8 m128 k xmm
// VREDUCEPD.Z imm8 m256 k ymm
// VREDUCEPD.Z imm8 xmm k xmm
// VREDUCEPD.Z imm8 ymm k ymm
// VREDUCEPD.Z imm8 m512 k zmm
// VREDUCEPD.Z imm8 zmm k zmm
//
// Construct and append a VREDUCEPD.Z instruction to the active function.
func (c *Context) VREDUCEPD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VREDUCEPD_Z(i, mxyz, k, xyz))
}
// VREDUCEPD_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.Z imm8 m128 k xmm
// VREDUCEPD.Z imm8 m256 k ymm
// VREDUCEPD.Z imm8 xmm k xmm
// VREDUCEPD.Z imm8 ymm k ymm
// VREDUCEPD.Z imm8 m512 k zmm
// VREDUCEPD.Z imm8 zmm k zmm
//
// Construct and append a VREDUCEPD.Z instruction to the active function.
// Operates on the global context.
func VREDUCEPD_Z(i, mxyz, k, xyz operand.Op) { ctx.VREDUCEPD_Z(i, mxyz, k, xyz) }
// VREDUCEPS: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPS imm8 m128 k xmm
// VREDUCEPS imm8 m128 xmm
// VREDUCEPS imm8 m256 k ymm
// VREDUCEPS imm8 m256 ymm
// VREDUCEPS imm8 xmm k xmm
// VREDUCEPS imm8 xmm xmm
// VREDUCEPS imm8 ymm k ymm
// VREDUCEPS imm8 ymm ymm
// VREDUCEPS imm8 m512 k zmm
// VREDUCEPS imm8 m512 zmm
// VREDUCEPS imm8 zmm k zmm
// VREDUCEPS imm8 zmm zmm
//
// Construct and append a VREDUCEPS instruction to the active function.
func (c *Context) VREDUCEPS(ops ...operand.Op) {
c.addinstruction(x86.VREDUCEPS(ops...))
}
// VREDUCEPS: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPS imm8 m128 k xmm
// VREDUCEPS imm8 m128 xmm
// VREDUCEPS imm8 m256 k ymm
// VREDUCEPS imm8 m256 ymm
// VREDUCEPS imm8 xmm k xmm
// VREDUCEPS imm8 xmm xmm
// VREDUCEPS imm8 ymm k ymm
// VREDUCEPS imm8 ymm ymm
// VREDUCEPS imm8 m512 k zmm
// VREDUCEPS imm8 m512 zmm
// VREDUCEPS imm8 zmm k zmm
// VREDUCEPS imm8 zmm zmm
//
// Construct and append a VREDUCEPS instruction to the active function.
// Operates on the global context.
func VREDUCEPS(ops ...operand.Op) { ctx.VREDUCEPS(ops...) }
// VREDUCEPS_BCST: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPS.BCST imm8 m32 k xmm
// VREDUCEPS.BCST imm8 m32 k ymm
// VREDUCEPS.BCST imm8 m32 xmm
// VREDUCEPS.BCST imm8 m32 ymm
// VREDUCEPS.BCST imm8 m32 k zmm
// VREDUCEPS.BCST imm8 m32 zmm
//
// Construct and append a VREDUCEPS.BCST instruction to the active function.
func (c *Context) VREDUCEPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VREDUCEPS_BCST(ops...))
}
// VREDUCEPS_BCST: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPS.BCST imm8 m32 k xmm
// VREDUCEPS.BCST imm8 m32 k ymm
// VREDUCEPS.BCST imm8 m32 xmm
// VREDUCEPS.BCST imm8 m32 ymm
// VREDUCEPS.BCST imm8 m32 k zmm
// VREDUCEPS.BCST imm8 m32 zmm
//
// Construct and append a VREDUCEPS.BCST instruction to the active function.
// Operates on the global context.
func VREDUCEPS_BCST(ops ...operand.Op) { ctx.VREDUCEPS_BCST(ops...) }
// VREDUCEPS_BCST_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.BCST.Z imm8 m32 k xmm
// VREDUCEPS.BCST.Z imm8 m32 k ymm
// VREDUCEPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VREDUCEPS.BCST.Z instruction to the active function.
func (c *Context) VREDUCEPS_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VREDUCEPS_BCST_Z(i, m, k, xyz))
}
// VREDUCEPS_BCST_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.BCST.Z imm8 m32 k xmm
// VREDUCEPS.BCST.Z imm8 m32 k ymm
// VREDUCEPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VREDUCEPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VREDUCEPS_BCST_Z(i, m, k, xyz operand.Op) { ctx.VREDUCEPS_BCST_Z(i, m, k, xyz) }
// VREDUCEPS_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.Z imm8 m128 k xmm
// VREDUCEPS.Z imm8 m256 k ymm
// VREDUCEPS.Z imm8 xmm k xmm
// VREDUCEPS.Z imm8 ymm k ymm
// VREDUCEPS.Z imm8 m512 k zmm
// VREDUCEPS.Z imm8 zmm k zmm
//
// Construct and append a VREDUCEPS.Z instruction to the active function.
func (c *Context) VREDUCEPS_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VREDUCEPS_Z(i, mxyz, k, xyz))
}
// VREDUCEPS_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.Z imm8 m128 k xmm
// VREDUCEPS.Z imm8 m256 k ymm
// VREDUCEPS.Z imm8 xmm k xmm
// VREDUCEPS.Z imm8 ymm k ymm
// VREDUCEPS.Z imm8 m512 k zmm
// VREDUCEPS.Z imm8 zmm k zmm
//
// Construct and append a VREDUCEPS.Z instruction to the active function.
// Operates on the global context.
func VREDUCEPS_Z(i, mxyz, k, xyz operand.Op) { ctx.VREDUCEPS_Z(i, mxyz, k, xyz) }
// VREDUCESD: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESD imm8 m64 xmm k xmm
// VREDUCESD imm8 m64 xmm xmm
// VREDUCESD imm8 xmm xmm k xmm
// VREDUCESD imm8 xmm xmm xmm
//
// Construct and append a VREDUCESD instruction to the active function.
func (c *Context) VREDUCESD(ops ...operand.Op) {
c.addinstruction(x86.VREDUCESD(ops...))
}
// VREDUCESD: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESD imm8 m64 xmm k xmm
// VREDUCESD imm8 m64 xmm xmm
// VREDUCESD imm8 xmm xmm k xmm
// VREDUCESD imm8 xmm xmm xmm
//
// Construct and append a VREDUCESD instruction to the active function.
// Operates on the global context.
func VREDUCESD(ops ...operand.Op) { ctx.VREDUCESD(ops...) }
// VREDUCESD_Z: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESD.Z imm8 m64 xmm k xmm
// VREDUCESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VREDUCESD.Z instruction to the active function.
func (c *Context) VREDUCESD_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VREDUCESD_Z(i, mx, x, k, x1))
}
// VREDUCESD_Z: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESD.Z imm8 m64 xmm k xmm
// VREDUCESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VREDUCESD.Z instruction to the active function.
// Operates on the global context.
func VREDUCESD_Z(i, mx, x, k, x1 operand.Op) { ctx.VREDUCESD_Z(i, mx, x, k, x1) }
// VREDUCESS: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESS imm8 m32 xmm k xmm
// VREDUCESS imm8 m32 xmm xmm
// VREDUCESS imm8 xmm xmm k xmm
// VREDUCESS imm8 xmm xmm xmm
//
// Construct and append a VREDUCESS instruction to the active function.
func (c *Context) VREDUCESS(ops ...operand.Op) {
c.addinstruction(x86.VREDUCESS(ops...))
}
// VREDUCESS: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESS imm8 m32 xmm k xmm
// VREDUCESS imm8 m32 xmm xmm
// VREDUCESS imm8 xmm xmm k xmm
// VREDUCESS imm8 xmm xmm xmm
//
// Construct and append a VREDUCESS instruction to the active function.
// Operates on the global context.
func VREDUCESS(ops ...operand.Op) { ctx.VREDUCESS(ops...) }
// VREDUCESS_Z: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESS.Z imm8 m32 xmm k xmm
// VREDUCESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VREDUCESS.Z instruction to the active function.
func (c *Context) VREDUCESS_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VREDUCESS_Z(i, mx, x, k, x1))
}
// VREDUCESS_Z: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESS.Z imm8 m32 xmm k xmm
// VREDUCESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VREDUCESS.Z instruction to the active function.
// Operates on the global context.
func VREDUCESS_Z(i, mx, x, k, x1 operand.Op) { ctx.VREDUCESS_Z(i, mx, x, k, x1) }
// VRNDSCALEPD: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPD imm8 m128 k xmm
// VRNDSCALEPD imm8 m128 xmm
// VRNDSCALEPD imm8 m256 k ymm
// VRNDSCALEPD imm8 m256 ymm
// VRNDSCALEPD imm8 xmm k xmm
// VRNDSCALEPD imm8 xmm xmm
// VRNDSCALEPD imm8 ymm k ymm
// VRNDSCALEPD imm8 ymm ymm
// VRNDSCALEPD imm8 m512 k zmm
// VRNDSCALEPD imm8 m512 zmm
// VRNDSCALEPD imm8 zmm k zmm
// VRNDSCALEPD imm8 zmm zmm
//
// Construct and append a VRNDSCALEPD instruction to the active function.
func (c *Context) VRNDSCALEPD(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPD(ops...))
}
// VRNDSCALEPD: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPD imm8 m128 k xmm
// VRNDSCALEPD imm8 m128 xmm
// VRNDSCALEPD imm8 m256 k ymm
// VRNDSCALEPD imm8 m256 ymm
// VRNDSCALEPD imm8 xmm k xmm
// VRNDSCALEPD imm8 xmm xmm
// VRNDSCALEPD imm8 ymm k ymm
// VRNDSCALEPD imm8 ymm ymm
// VRNDSCALEPD imm8 m512 k zmm
// VRNDSCALEPD imm8 m512 zmm
// VRNDSCALEPD imm8 zmm k zmm
// VRNDSCALEPD imm8 zmm zmm
//
// Construct and append a VRNDSCALEPD instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD(ops ...operand.Op) { ctx.VRNDSCALEPD(ops...) }
// VRNDSCALEPD_BCST: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPD.BCST imm8 m64 k xmm
// VRNDSCALEPD.BCST imm8 m64 k ymm
// VRNDSCALEPD.BCST imm8 m64 xmm
// VRNDSCALEPD.BCST imm8 m64 ymm
// VRNDSCALEPD.BCST imm8 m64 k zmm
// VRNDSCALEPD.BCST imm8 m64 zmm
//
// Construct and append a VRNDSCALEPD.BCST instruction to the active function.
func (c *Context) VRNDSCALEPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPD_BCST(ops...))
}
// VRNDSCALEPD_BCST: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPD.BCST imm8 m64 k xmm
// VRNDSCALEPD.BCST imm8 m64 k ymm
// VRNDSCALEPD.BCST imm8 m64 xmm
// VRNDSCALEPD.BCST imm8 m64 ymm
// VRNDSCALEPD.BCST imm8 m64 k zmm
// VRNDSCALEPD.BCST imm8 m64 zmm
//
// Construct and append a VRNDSCALEPD.BCST instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD_BCST(ops ...operand.Op) { ctx.VRNDSCALEPD_BCST(ops...) }
// VRNDSCALEPD_BCST_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.BCST.Z imm8 m64 k xmm
// VRNDSCALEPD.BCST.Z imm8 m64 k ymm
// VRNDSCALEPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VRNDSCALEPD.BCST.Z instruction to the active function.
func (c *Context) VRNDSCALEPD_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VRNDSCALEPD_BCST_Z(i, m, k, xyz))
}
// VRNDSCALEPD_BCST_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.BCST.Z imm8 m64 k xmm
// VRNDSCALEPD.BCST.Z imm8 m64 k ymm
// VRNDSCALEPD.BCST.Z imm8 m64 k zmm
//
// Construct and append a VRNDSCALEPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD_BCST_Z(i, m, k, xyz operand.Op) { ctx.VRNDSCALEPD_BCST_Z(i, m, k, xyz) }
// VRNDSCALEPD_SAE: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPD.SAE imm8 zmm k zmm
// VRNDSCALEPD.SAE imm8 zmm zmm
//
// Construct and append a VRNDSCALEPD.SAE instruction to the active function.
func (c *Context) VRNDSCALEPD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPD_SAE(ops...))
}
// VRNDSCALEPD_SAE: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPD.SAE imm8 zmm k zmm
// VRNDSCALEPD.SAE imm8 zmm zmm
//
// Construct and append a VRNDSCALEPD.SAE instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD_SAE(ops ...operand.Op) { ctx.VRNDSCALEPD_SAE(ops...) }
// VRNDSCALEPD_SAE_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.SAE.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPD.SAE.Z instruction to the active function.
func (c *Context) VRNDSCALEPD_SAE_Z(i, z, k, z1 operand.Op) {
c.addinstruction(x86.VRNDSCALEPD_SAE_Z(i, z, k, z1))
}
// VRNDSCALEPD_SAE_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.SAE.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD_SAE_Z(i, z, k, z1 operand.Op) { ctx.VRNDSCALEPD_SAE_Z(i, z, k, z1) }
// VRNDSCALEPD_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.Z imm8 m128 k xmm
// VRNDSCALEPD.Z imm8 m256 k ymm
// VRNDSCALEPD.Z imm8 xmm k xmm
// VRNDSCALEPD.Z imm8 ymm k ymm
// VRNDSCALEPD.Z imm8 m512 k zmm
// VRNDSCALEPD.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPD.Z instruction to the active function.
func (c *Context) VRNDSCALEPD_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRNDSCALEPD_Z(i, mxyz, k, xyz))
}
// VRNDSCALEPD_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.Z imm8 m128 k xmm
// VRNDSCALEPD.Z imm8 m256 k ymm
// VRNDSCALEPD.Z imm8 xmm k xmm
// VRNDSCALEPD.Z imm8 ymm k ymm
// VRNDSCALEPD.Z imm8 m512 k zmm
// VRNDSCALEPD.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPD.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPD_Z(i, mxyz, k, xyz operand.Op) { ctx.VRNDSCALEPD_Z(i, mxyz, k, xyz) }
// VRNDSCALEPS: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPS imm8 m128 k xmm
// VRNDSCALEPS imm8 m128 xmm
// VRNDSCALEPS imm8 m256 k ymm
// VRNDSCALEPS imm8 m256 ymm
// VRNDSCALEPS imm8 xmm k xmm
// VRNDSCALEPS imm8 xmm xmm
// VRNDSCALEPS imm8 ymm k ymm
// VRNDSCALEPS imm8 ymm ymm
// VRNDSCALEPS imm8 m512 k zmm
// VRNDSCALEPS imm8 m512 zmm
// VRNDSCALEPS imm8 zmm k zmm
// VRNDSCALEPS imm8 zmm zmm
//
// Construct and append a VRNDSCALEPS instruction to the active function.
func (c *Context) VRNDSCALEPS(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPS(ops...))
}
// VRNDSCALEPS: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPS imm8 m128 k xmm
// VRNDSCALEPS imm8 m128 xmm
// VRNDSCALEPS imm8 m256 k ymm
// VRNDSCALEPS imm8 m256 ymm
// VRNDSCALEPS imm8 xmm k xmm
// VRNDSCALEPS imm8 xmm xmm
// VRNDSCALEPS imm8 ymm k ymm
// VRNDSCALEPS imm8 ymm ymm
// VRNDSCALEPS imm8 m512 k zmm
// VRNDSCALEPS imm8 m512 zmm
// VRNDSCALEPS imm8 zmm k zmm
// VRNDSCALEPS imm8 zmm zmm
//
// Construct and append a VRNDSCALEPS instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS(ops ...operand.Op) { ctx.VRNDSCALEPS(ops...) }
// VRNDSCALEPS_BCST: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPS.BCST imm8 m32 k xmm
// VRNDSCALEPS.BCST imm8 m32 k ymm
// VRNDSCALEPS.BCST imm8 m32 xmm
// VRNDSCALEPS.BCST imm8 m32 ymm
// VRNDSCALEPS.BCST imm8 m32 k zmm
// VRNDSCALEPS.BCST imm8 m32 zmm
//
// Construct and append a VRNDSCALEPS.BCST instruction to the active function.
func (c *Context) VRNDSCALEPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPS_BCST(ops...))
}
// VRNDSCALEPS_BCST: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPS.BCST imm8 m32 k xmm
// VRNDSCALEPS.BCST imm8 m32 k ymm
// VRNDSCALEPS.BCST imm8 m32 xmm
// VRNDSCALEPS.BCST imm8 m32 ymm
// VRNDSCALEPS.BCST imm8 m32 k zmm
// VRNDSCALEPS.BCST imm8 m32 zmm
//
// Construct and append a VRNDSCALEPS.BCST instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS_BCST(ops ...operand.Op) { ctx.VRNDSCALEPS_BCST(ops...) }
// VRNDSCALEPS_BCST_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.BCST.Z imm8 m32 k xmm
// VRNDSCALEPS.BCST.Z imm8 m32 k ymm
// VRNDSCALEPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VRNDSCALEPS.BCST.Z instruction to the active function.
func (c *Context) VRNDSCALEPS_BCST_Z(i, m, k, xyz operand.Op) {
c.addinstruction(x86.VRNDSCALEPS_BCST_Z(i, m, k, xyz))
}
// VRNDSCALEPS_BCST_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.BCST.Z imm8 m32 k xmm
// VRNDSCALEPS.BCST.Z imm8 m32 k ymm
// VRNDSCALEPS.BCST.Z imm8 m32 k zmm
//
// Construct and append a VRNDSCALEPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS_BCST_Z(i, m, k, xyz operand.Op) { ctx.VRNDSCALEPS_BCST_Z(i, m, k, xyz) }
// VRNDSCALEPS_SAE: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPS.SAE imm8 zmm k zmm
// VRNDSCALEPS.SAE imm8 zmm zmm
//
// Construct and append a VRNDSCALEPS.SAE instruction to the active function.
func (c *Context) VRNDSCALEPS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALEPS_SAE(ops...))
}
// VRNDSCALEPS_SAE: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPS.SAE imm8 zmm k zmm
// VRNDSCALEPS.SAE imm8 zmm zmm
//
// Construct and append a VRNDSCALEPS.SAE instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS_SAE(ops ...operand.Op) { ctx.VRNDSCALEPS_SAE(ops...) }
// VRNDSCALEPS_SAE_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.SAE.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPS.SAE.Z instruction to the active function.
func (c *Context) VRNDSCALEPS_SAE_Z(i, z, k, z1 operand.Op) {
c.addinstruction(x86.VRNDSCALEPS_SAE_Z(i, z, k, z1))
}
// VRNDSCALEPS_SAE_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.SAE.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS_SAE_Z(i, z, k, z1 operand.Op) { ctx.VRNDSCALEPS_SAE_Z(i, z, k, z1) }
// VRNDSCALEPS_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.Z imm8 m128 k xmm
// VRNDSCALEPS.Z imm8 m256 k ymm
// VRNDSCALEPS.Z imm8 xmm k xmm
// VRNDSCALEPS.Z imm8 ymm k ymm
// VRNDSCALEPS.Z imm8 m512 k zmm
// VRNDSCALEPS.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPS.Z instruction to the active function.
func (c *Context) VRNDSCALEPS_Z(i, mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRNDSCALEPS_Z(i, mxyz, k, xyz))
}
// VRNDSCALEPS_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.Z imm8 m128 k xmm
// VRNDSCALEPS.Z imm8 m256 k ymm
// VRNDSCALEPS.Z imm8 xmm k xmm
// VRNDSCALEPS.Z imm8 ymm k ymm
// VRNDSCALEPS.Z imm8 m512 k zmm
// VRNDSCALEPS.Z imm8 zmm k zmm
//
// Construct and append a VRNDSCALEPS.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALEPS_Z(i, mxyz, k, xyz operand.Op) { ctx.VRNDSCALEPS_Z(i, mxyz, k, xyz) }
// VRNDSCALESD: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESD imm8 m64 xmm k xmm
// VRNDSCALESD imm8 m64 xmm xmm
// VRNDSCALESD imm8 xmm xmm k xmm
// VRNDSCALESD imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESD instruction to the active function.
func (c *Context) VRNDSCALESD(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALESD(ops...))
}
// VRNDSCALESD: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESD imm8 m64 xmm k xmm
// VRNDSCALESD imm8 m64 xmm xmm
// VRNDSCALESD imm8 xmm xmm k xmm
// VRNDSCALESD imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESD instruction to the active function.
// Operates on the global context.
func VRNDSCALESD(ops ...operand.Op) { ctx.VRNDSCALESD(ops...) }
// VRNDSCALESD_SAE: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESD.SAE imm8 xmm xmm k xmm
// VRNDSCALESD.SAE imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESD.SAE instruction to the active function.
func (c *Context) VRNDSCALESD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALESD_SAE(ops...))
}
// VRNDSCALESD_SAE: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESD.SAE imm8 xmm xmm k xmm
// VRNDSCALESD.SAE imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESD.SAE instruction to the active function.
// Operates on the global context.
func VRNDSCALESD_SAE(ops ...operand.Op) { ctx.VRNDSCALESD_SAE(ops...) }
// VRNDSCALESD_SAE_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESD.SAE.Z instruction to the active function.
func (c *Context) VRNDSCALESD_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRNDSCALESD_SAE_Z(i, x, x1, k, x2))
}
// VRNDSCALESD_SAE_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALESD_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VRNDSCALESD_SAE_Z(i, x, x1, k, x2) }
// VRNDSCALESD_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.Z imm8 m64 xmm k xmm
// VRNDSCALESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESD.Z instruction to the active function.
func (c *Context) VRNDSCALESD_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRNDSCALESD_Z(i, mx, x, k, x1))
}
// VRNDSCALESD_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.Z imm8 m64 xmm k xmm
// VRNDSCALESD.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESD.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALESD_Z(i, mx, x, k, x1 operand.Op) { ctx.VRNDSCALESD_Z(i, mx, x, k, x1) }
// VRNDSCALESS: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESS imm8 m32 xmm k xmm
// VRNDSCALESS imm8 m32 xmm xmm
// VRNDSCALESS imm8 xmm xmm k xmm
// VRNDSCALESS imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESS instruction to the active function.
func (c *Context) VRNDSCALESS(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALESS(ops...))
}
// VRNDSCALESS: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESS imm8 m32 xmm k xmm
// VRNDSCALESS imm8 m32 xmm xmm
// VRNDSCALESS imm8 xmm xmm k xmm
// VRNDSCALESS imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESS instruction to the active function.
// Operates on the global context.
func VRNDSCALESS(ops ...operand.Op) { ctx.VRNDSCALESS(ops...) }
// VRNDSCALESS_SAE: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESS.SAE imm8 xmm xmm k xmm
// VRNDSCALESS.SAE imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESS.SAE instruction to the active function.
func (c *Context) VRNDSCALESS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRNDSCALESS_SAE(ops...))
}
// VRNDSCALESS_SAE: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESS.SAE imm8 xmm xmm k xmm
// VRNDSCALESS.SAE imm8 xmm xmm xmm
//
// Construct and append a VRNDSCALESS.SAE instruction to the active function.
// Operates on the global context.
func VRNDSCALESS_SAE(ops ...operand.Op) { ctx.VRNDSCALESS_SAE(ops...) }
// VRNDSCALESS_SAE_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESS.SAE.Z instruction to the active function.
func (c *Context) VRNDSCALESS_SAE_Z(i, x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRNDSCALESS_SAE_Z(i, x, x1, k, x2))
}
// VRNDSCALESS_SAE_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.SAE.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALESS_SAE_Z(i, x, x1, k, x2 operand.Op) { ctx.VRNDSCALESS_SAE_Z(i, x, x1, k, x2) }
// VRNDSCALESS_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.Z imm8 m32 xmm k xmm
// VRNDSCALESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESS.Z instruction to the active function.
func (c *Context) VRNDSCALESS_Z(i, mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRNDSCALESS_Z(i, mx, x, k, x1))
}
// VRNDSCALESS_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.Z imm8 m32 xmm k xmm
// VRNDSCALESS.Z imm8 xmm xmm k xmm
//
// Construct and append a VRNDSCALESS.Z instruction to the active function.
// Operates on the global context.
func VRNDSCALESS_Z(i, mx, x, k, x1 operand.Op) { ctx.VRNDSCALESS_Z(i, mx, x, k, x1) }
// VROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPD imm8 m128 xmm
// VROUNDPD imm8 m256 ymm
// VROUNDPD imm8 xmm xmm
// VROUNDPD imm8 ymm ymm
//
// Construct and append a VROUNDPD instruction to the active function.
func (c *Context) VROUNDPD(i, mxy, xy operand.Op) {
c.addinstruction(x86.VROUNDPD(i, mxy, xy))
}
// VROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPD imm8 m128 xmm
// VROUNDPD imm8 m256 ymm
// VROUNDPD imm8 xmm xmm
// VROUNDPD imm8 ymm ymm
//
// Construct and append a VROUNDPD instruction to the active function.
// Operates on the global context.
func VROUNDPD(i, mxy, xy operand.Op) { ctx.VROUNDPD(i, mxy, xy) }
// VROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPS imm8 m128 xmm
// VROUNDPS imm8 m256 ymm
// VROUNDPS imm8 xmm xmm
// VROUNDPS imm8 ymm ymm
//
// Construct and append a VROUNDPS instruction to the active function.
func (c *Context) VROUNDPS(i, mxy, xy operand.Op) {
c.addinstruction(x86.VROUNDPS(i, mxy, xy))
}
// VROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPS imm8 m128 xmm
// VROUNDPS imm8 m256 ymm
// VROUNDPS imm8 xmm xmm
// VROUNDPS imm8 ymm ymm
//
// Construct and append a VROUNDPS instruction to the active function.
// Operates on the global context.
func VROUNDPS(i, mxy, xy operand.Op) { ctx.VROUNDPS(i, mxy, xy) }
// VROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSD imm8 m64 xmm xmm
// VROUNDSD imm8 xmm xmm xmm
//
// Construct and append a VROUNDSD instruction to the active function.
func (c *Context) VROUNDSD(i, mx, x, x1 operand.Op) {
c.addinstruction(x86.VROUNDSD(i, mx, x, x1))
}
// VROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSD imm8 m64 xmm xmm
// VROUNDSD imm8 xmm xmm xmm
//
// Construct and append a VROUNDSD instruction to the active function.
// Operates on the global context.
func VROUNDSD(i, mx, x, x1 operand.Op) { ctx.VROUNDSD(i, mx, x, x1) }
// VROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSS imm8 m32 xmm xmm
// VROUNDSS imm8 xmm xmm xmm
//
// Construct and append a VROUNDSS instruction to the active function.
func (c *Context) VROUNDSS(i, mx, x, x1 operand.Op) {
c.addinstruction(x86.VROUNDSS(i, mx, x, x1))
}
// VROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSS imm8 m32 xmm xmm
// VROUNDSS imm8 xmm xmm xmm
//
// Construct and append a VROUNDSS instruction to the active function.
// Operates on the global context.
func VROUNDSS(i, mx, x, x1 operand.Op) { ctx.VROUNDSS(i, mx, x, x1) }
// VRSQRT14PD: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PD m128 k xmm
// VRSQRT14PD m128 xmm
// VRSQRT14PD m256 k ymm
// VRSQRT14PD m256 ymm
// VRSQRT14PD xmm k xmm
// VRSQRT14PD xmm xmm
// VRSQRT14PD ymm k ymm
// VRSQRT14PD ymm ymm
// VRSQRT14PD m512 k zmm
// VRSQRT14PD m512 zmm
// VRSQRT14PD zmm k zmm
// VRSQRT14PD zmm zmm
//
// Construct and append a VRSQRT14PD instruction to the active function.
func (c *Context) VRSQRT14PD(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14PD(ops...))
}
// VRSQRT14PD: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PD m128 k xmm
// VRSQRT14PD m128 xmm
// VRSQRT14PD m256 k ymm
// VRSQRT14PD m256 ymm
// VRSQRT14PD xmm k xmm
// VRSQRT14PD xmm xmm
// VRSQRT14PD ymm k ymm
// VRSQRT14PD ymm ymm
// VRSQRT14PD m512 k zmm
// VRSQRT14PD m512 zmm
// VRSQRT14PD zmm k zmm
// VRSQRT14PD zmm zmm
//
// Construct and append a VRSQRT14PD instruction to the active function.
// Operates on the global context.
func VRSQRT14PD(ops ...operand.Op) { ctx.VRSQRT14PD(ops...) }
// VRSQRT14PD_BCST: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PD.BCST m64 k xmm
// VRSQRT14PD.BCST m64 k ymm
// VRSQRT14PD.BCST m64 xmm
// VRSQRT14PD.BCST m64 ymm
// VRSQRT14PD.BCST m64 k zmm
// VRSQRT14PD.BCST m64 zmm
//
// Construct and append a VRSQRT14PD.BCST instruction to the active function.
func (c *Context) VRSQRT14PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14PD_BCST(ops...))
}
// VRSQRT14PD_BCST: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PD.BCST m64 k xmm
// VRSQRT14PD.BCST m64 k ymm
// VRSQRT14PD.BCST m64 xmm
// VRSQRT14PD.BCST m64 ymm
// VRSQRT14PD.BCST m64 k zmm
// VRSQRT14PD.BCST m64 zmm
//
// Construct and append a VRSQRT14PD.BCST instruction to the active function.
// Operates on the global context.
func VRSQRT14PD_BCST(ops ...operand.Op) { ctx.VRSQRT14PD_BCST(ops...) }
// VRSQRT14PD_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.BCST.Z m64 k xmm
// VRSQRT14PD.BCST.Z m64 k ymm
// VRSQRT14PD.BCST.Z m64 k zmm
//
// Construct and append a VRSQRT14PD.BCST.Z instruction to the active function.
func (c *Context) VRSQRT14PD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VRSQRT14PD_BCST_Z(m, k, xyz))
}
// VRSQRT14PD_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.BCST.Z m64 k xmm
// VRSQRT14PD.BCST.Z m64 k ymm
// VRSQRT14PD.BCST.Z m64 k zmm
//
// Construct and append a VRSQRT14PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14PD_BCST_Z(m, k, xyz operand.Op) { ctx.VRSQRT14PD_BCST_Z(m, k, xyz) }
// VRSQRT14PD_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.Z m128 k xmm
// VRSQRT14PD.Z m256 k ymm
// VRSQRT14PD.Z xmm k xmm
// VRSQRT14PD.Z ymm k ymm
// VRSQRT14PD.Z m512 k zmm
// VRSQRT14PD.Z zmm k zmm
//
// Construct and append a VRSQRT14PD.Z instruction to the active function.
func (c *Context) VRSQRT14PD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRSQRT14PD_Z(mxyz, k, xyz))
}
// VRSQRT14PD_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.Z m128 k xmm
// VRSQRT14PD.Z m256 k ymm
// VRSQRT14PD.Z xmm k xmm
// VRSQRT14PD.Z ymm k ymm
// VRSQRT14PD.Z m512 k zmm
// VRSQRT14PD.Z zmm k zmm
//
// Construct and append a VRSQRT14PD.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14PD_Z(mxyz, k, xyz operand.Op) { ctx.VRSQRT14PD_Z(mxyz, k, xyz) }
// VRSQRT14PS: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PS m128 k xmm
// VRSQRT14PS m128 xmm
// VRSQRT14PS m256 k ymm
// VRSQRT14PS m256 ymm
// VRSQRT14PS xmm k xmm
// VRSQRT14PS xmm xmm
// VRSQRT14PS ymm k ymm
// VRSQRT14PS ymm ymm
// VRSQRT14PS m512 k zmm
// VRSQRT14PS m512 zmm
// VRSQRT14PS zmm k zmm
// VRSQRT14PS zmm zmm
//
// Construct and append a VRSQRT14PS instruction to the active function.
func (c *Context) VRSQRT14PS(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14PS(ops...))
}
// VRSQRT14PS: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PS m128 k xmm
// VRSQRT14PS m128 xmm
// VRSQRT14PS m256 k ymm
// VRSQRT14PS m256 ymm
// VRSQRT14PS xmm k xmm
// VRSQRT14PS xmm xmm
// VRSQRT14PS ymm k ymm
// VRSQRT14PS ymm ymm
// VRSQRT14PS m512 k zmm
// VRSQRT14PS m512 zmm
// VRSQRT14PS zmm k zmm
// VRSQRT14PS zmm zmm
//
// Construct and append a VRSQRT14PS instruction to the active function.
// Operates on the global context.
func VRSQRT14PS(ops ...operand.Op) { ctx.VRSQRT14PS(ops...) }
// VRSQRT14PS_BCST: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PS.BCST m32 k xmm
// VRSQRT14PS.BCST m32 k ymm
// VRSQRT14PS.BCST m32 xmm
// VRSQRT14PS.BCST m32 ymm
// VRSQRT14PS.BCST m32 k zmm
// VRSQRT14PS.BCST m32 zmm
//
// Construct and append a VRSQRT14PS.BCST instruction to the active function.
func (c *Context) VRSQRT14PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14PS_BCST(ops...))
}
// VRSQRT14PS_BCST: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PS.BCST m32 k xmm
// VRSQRT14PS.BCST m32 k ymm
// VRSQRT14PS.BCST m32 xmm
// VRSQRT14PS.BCST m32 ymm
// VRSQRT14PS.BCST m32 k zmm
// VRSQRT14PS.BCST m32 zmm
//
// Construct and append a VRSQRT14PS.BCST instruction to the active function.
// Operates on the global context.
func VRSQRT14PS_BCST(ops ...operand.Op) { ctx.VRSQRT14PS_BCST(ops...) }
// VRSQRT14PS_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.BCST.Z m32 k xmm
// VRSQRT14PS.BCST.Z m32 k ymm
// VRSQRT14PS.BCST.Z m32 k zmm
//
// Construct and append a VRSQRT14PS.BCST.Z instruction to the active function.
func (c *Context) VRSQRT14PS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VRSQRT14PS_BCST_Z(m, k, xyz))
}
// VRSQRT14PS_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.BCST.Z m32 k xmm
// VRSQRT14PS.BCST.Z m32 k ymm
// VRSQRT14PS.BCST.Z m32 k zmm
//
// Construct and append a VRSQRT14PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14PS_BCST_Z(m, k, xyz operand.Op) { ctx.VRSQRT14PS_BCST_Z(m, k, xyz) }
// VRSQRT14PS_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.Z m128 k xmm
// VRSQRT14PS.Z m256 k ymm
// VRSQRT14PS.Z xmm k xmm
// VRSQRT14PS.Z ymm k ymm
// VRSQRT14PS.Z m512 k zmm
// VRSQRT14PS.Z zmm k zmm
//
// Construct and append a VRSQRT14PS.Z instruction to the active function.
func (c *Context) VRSQRT14PS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VRSQRT14PS_Z(mxyz, k, xyz))
}
// VRSQRT14PS_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.Z m128 k xmm
// VRSQRT14PS.Z m256 k ymm
// VRSQRT14PS.Z xmm k xmm
// VRSQRT14PS.Z ymm k ymm
// VRSQRT14PS.Z m512 k zmm
// VRSQRT14PS.Z zmm k zmm
//
// Construct and append a VRSQRT14PS.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14PS_Z(mxyz, k, xyz operand.Op) { ctx.VRSQRT14PS_Z(mxyz, k, xyz) }
// VRSQRT14SD: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SD m64 xmm k xmm
// VRSQRT14SD m64 xmm xmm
// VRSQRT14SD xmm xmm k xmm
// VRSQRT14SD xmm xmm xmm
//
// Construct and append a VRSQRT14SD instruction to the active function.
func (c *Context) VRSQRT14SD(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14SD(ops...))
}
// VRSQRT14SD: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SD m64 xmm k xmm
// VRSQRT14SD m64 xmm xmm
// VRSQRT14SD xmm xmm k xmm
// VRSQRT14SD xmm xmm xmm
//
// Construct and append a VRSQRT14SD instruction to the active function.
// Operates on the global context.
func VRSQRT14SD(ops ...operand.Op) { ctx.VRSQRT14SD(ops...) }
// VRSQRT14SD_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SD.Z m64 xmm k xmm
// VRSQRT14SD.Z xmm xmm k xmm
//
// Construct and append a VRSQRT14SD.Z instruction to the active function.
func (c *Context) VRSQRT14SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRSQRT14SD_Z(mx, x, k, x1))
}
// VRSQRT14SD_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SD.Z m64 xmm k xmm
// VRSQRT14SD.Z xmm xmm k xmm
//
// Construct and append a VRSQRT14SD.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14SD_Z(mx, x, k, x1 operand.Op) { ctx.VRSQRT14SD_Z(mx, x, k, x1) }
// VRSQRT14SS: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SS m32 xmm k xmm
// VRSQRT14SS m32 xmm xmm
// VRSQRT14SS xmm xmm k xmm
// VRSQRT14SS xmm xmm xmm
//
// Construct and append a VRSQRT14SS instruction to the active function.
func (c *Context) VRSQRT14SS(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT14SS(ops...))
}
// VRSQRT14SS: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SS m32 xmm k xmm
// VRSQRT14SS m32 xmm xmm
// VRSQRT14SS xmm xmm k xmm
// VRSQRT14SS xmm xmm xmm
//
// Construct and append a VRSQRT14SS instruction to the active function.
// Operates on the global context.
func VRSQRT14SS(ops ...operand.Op) { ctx.VRSQRT14SS(ops...) }
// VRSQRT14SS_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SS.Z m32 xmm k xmm
// VRSQRT14SS.Z xmm xmm k xmm
//
// Construct and append a VRSQRT14SS.Z instruction to the active function.
func (c *Context) VRSQRT14SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRSQRT14SS_Z(mx, x, k, x1))
}
// VRSQRT14SS_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SS.Z m32 xmm k xmm
// VRSQRT14SS.Z xmm xmm k xmm
//
// Construct and append a VRSQRT14SS.Z instruction to the active function.
// Operates on the global context.
func VRSQRT14SS_Z(mx, x, k, x1 operand.Op) { ctx.VRSQRT14SS_Z(mx, x, k, x1) }
// VRSQRT28PD: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PD m512 k zmm
// VRSQRT28PD m512 zmm
// VRSQRT28PD zmm k zmm
// VRSQRT28PD zmm zmm
//
// Construct and append a VRSQRT28PD instruction to the active function.
func (c *Context) VRSQRT28PD(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PD(ops...))
}
// VRSQRT28PD: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PD m512 k zmm
// VRSQRT28PD m512 zmm
// VRSQRT28PD zmm k zmm
// VRSQRT28PD zmm zmm
//
// Construct and append a VRSQRT28PD instruction to the active function.
// Operates on the global context.
func VRSQRT28PD(ops ...operand.Op) { ctx.VRSQRT28PD(ops...) }
// VRSQRT28PD_BCST: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PD.BCST m64 k zmm
// VRSQRT28PD.BCST m64 zmm
//
// Construct and append a VRSQRT28PD.BCST instruction to the active function.
func (c *Context) VRSQRT28PD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PD_BCST(ops...))
}
// VRSQRT28PD_BCST: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PD.BCST m64 k zmm
// VRSQRT28PD.BCST m64 zmm
//
// Construct and append a VRSQRT28PD.BCST instruction to the active function.
// Operates on the global context.
func VRSQRT28PD_BCST(ops ...operand.Op) { ctx.VRSQRT28PD_BCST(ops...) }
// VRSQRT28PD_BCST_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.BCST.Z m64 k zmm
//
// Construct and append a VRSQRT28PD.BCST.Z instruction to the active function.
func (c *Context) VRSQRT28PD_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VRSQRT28PD_BCST_Z(m, k, z))
}
// VRSQRT28PD_BCST_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.BCST.Z m64 k zmm
//
// Construct and append a VRSQRT28PD.BCST.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PD_BCST_Z(m, k, z operand.Op) { ctx.VRSQRT28PD_BCST_Z(m, k, z) }
// VRSQRT28PD_SAE: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PD.SAE zmm k zmm
// VRSQRT28PD.SAE zmm zmm
//
// Construct and append a VRSQRT28PD.SAE instruction to the active function.
func (c *Context) VRSQRT28PD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PD_SAE(ops...))
}
// VRSQRT28PD_SAE: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PD.SAE zmm k zmm
// VRSQRT28PD.SAE zmm zmm
//
// Construct and append a VRSQRT28PD.SAE instruction to the active function.
// Operates on the global context.
func VRSQRT28PD_SAE(ops ...operand.Op) { ctx.VRSQRT28PD_SAE(ops...) }
// VRSQRT28PD_SAE_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.SAE.Z zmm k zmm
//
// Construct and append a VRSQRT28PD.SAE.Z instruction to the active function.
func (c *Context) VRSQRT28PD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VRSQRT28PD_SAE_Z(z, k, z1))
}
// VRSQRT28PD_SAE_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.SAE.Z zmm k zmm
//
// Construct and append a VRSQRT28PD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PD_SAE_Z(z, k, z1 operand.Op) { ctx.VRSQRT28PD_SAE_Z(z, k, z1) }
// VRSQRT28PD_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.Z m512 k zmm
// VRSQRT28PD.Z zmm k zmm
//
// Construct and append a VRSQRT28PD.Z instruction to the active function.
func (c *Context) VRSQRT28PD_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VRSQRT28PD_Z(mz, k, z))
}
// VRSQRT28PD_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.Z m512 k zmm
// VRSQRT28PD.Z zmm k zmm
//
// Construct and append a VRSQRT28PD.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PD_Z(mz, k, z operand.Op) { ctx.VRSQRT28PD_Z(mz, k, z) }
// VRSQRT28PS: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PS m512 k zmm
// VRSQRT28PS m512 zmm
// VRSQRT28PS zmm k zmm
// VRSQRT28PS zmm zmm
//
// Construct and append a VRSQRT28PS instruction to the active function.
func (c *Context) VRSQRT28PS(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PS(ops...))
}
// VRSQRT28PS: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PS m512 k zmm
// VRSQRT28PS m512 zmm
// VRSQRT28PS zmm k zmm
// VRSQRT28PS zmm zmm
//
// Construct and append a VRSQRT28PS instruction to the active function.
// Operates on the global context.
func VRSQRT28PS(ops ...operand.Op) { ctx.VRSQRT28PS(ops...) }
// VRSQRT28PS_BCST: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PS.BCST m32 k zmm
// VRSQRT28PS.BCST m32 zmm
//
// Construct and append a VRSQRT28PS.BCST instruction to the active function.
func (c *Context) VRSQRT28PS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PS_BCST(ops...))
}
// VRSQRT28PS_BCST: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PS.BCST m32 k zmm
// VRSQRT28PS.BCST m32 zmm
//
// Construct and append a VRSQRT28PS.BCST instruction to the active function.
// Operates on the global context.
func VRSQRT28PS_BCST(ops ...operand.Op) { ctx.VRSQRT28PS_BCST(ops...) }
// VRSQRT28PS_BCST_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.BCST.Z m32 k zmm
//
// Construct and append a VRSQRT28PS.BCST.Z instruction to the active function.
func (c *Context) VRSQRT28PS_BCST_Z(m, k, z operand.Op) {
c.addinstruction(x86.VRSQRT28PS_BCST_Z(m, k, z))
}
// VRSQRT28PS_BCST_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.BCST.Z m32 k zmm
//
// Construct and append a VRSQRT28PS.BCST.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PS_BCST_Z(m, k, z operand.Op) { ctx.VRSQRT28PS_BCST_Z(m, k, z) }
// VRSQRT28PS_SAE: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PS.SAE zmm k zmm
// VRSQRT28PS.SAE zmm zmm
//
// Construct and append a VRSQRT28PS.SAE instruction to the active function.
func (c *Context) VRSQRT28PS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28PS_SAE(ops...))
}
// VRSQRT28PS_SAE: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PS.SAE zmm k zmm
// VRSQRT28PS.SAE zmm zmm
//
// Construct and append a VRSQRT28PS.SAE instruction to the active function.
// Operates on the global context.
func VRSQRT28PS_SAE(ops ...operand.Op) { ctx.VRSQRT28PS_SAE(ops...) }
// VRSQRT28PS_SAE_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.SAE.Z zmm k zmm
//
// Construct and append a VRSQRT28PS.SAE.Z instruction to the active function.
func (c *Context) VRSQRT28PS_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VRSQRT28PS_SAE_Z(z, k, z1))
}
// VRSQRT28PS_SAE_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.SAE.Z zmm k zmm
//
// Construct and append a VRSQRT28PS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PS_SAE_Z(z, k, z1 operand.Op) { ctx.VRSQRT28PS_SAE_Z(z, k, z1) }
// VRSQRT28PS_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.Z m512 k zmm
// VRSQRT28PS.Z zmm k zmm
//
// Construct and append a VRSQRT28PS.Z instruction to the active function.
func (c *Context) VRSQRT28PS_Z(mz, k, z operand.Op) {
c.addinstruction(x86.VRSQRT28PS_Z(mz, k, z))
}
// VRSQRT28PS_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.Z m512 k zmm
// VRSQRT28PS.Z zmm k zmm
//
// Construct and append a VRSQRT28PS.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28PS_Z(mz, k, z operand.Op) { ctx.VRSQRT28PS_Z(mz, k, z) }
// VRSQRT28SD: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SD m64 xmm k xmm
// VRSQRT28SD m64 xmm xmm
// VRSQRT28SD xmm xmm k xmm
// VRSQRT28SD xmm xmm xmm
//
// Construct and append a VRSQRT28SD instruction to the active function.
func (c *Context) VRSQRT28SD(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28SD(ops...))
}
// VRSQRT28SD: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SD m64 xmm k xmm
// VRSQRT28SD m64 xmm xmm
// VRSQRT28SD xmm xmm k xmm
// VRSQRT28SD xmm xmm xmm
//
// Construct and append a VRSQRT28SD instruction to the active function.
// Operates on the global context.
func VRSQRT28SD(ops ...operand.Op) { ctx.VRSQRT28SD(ops...) }
// VRSQRT28SD_SAE: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SD.SAE xmm xmm k xmm
// VRSQRT28SD.SAE xmm xmm xmm
//
// Construct and append a VRSQRT28SD.SAE instruction to the active function.
func (c *Context) VRSQRT28SD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28SD_SAE(ops...))
}
// VRSQRT28SD_SAE: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SD.SAE xmm xmm k xmm
// VRSQRT28SD.SAE xmm xmm xmm
//
// Construct and append a VRSQRT28SD.SAE instruction to the active function.
// Operates on the global context.
func VRSQRT28SD_SAE(ops ...operand.Op) { ctx.VRSQRT28SD_SAE(ops...) }
// VRSQRT28SD_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SD.SAE.Z instruction to the active function.
func (c *Context) VRSQRT28SD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRSQRT28SD_SAE_Z(x, x1, k, x2))
}
// VRSQRT28SD_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.SAE.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SD.SAE.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28SD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VRSQRT28SD_SAE_Z(x, x1, k, x2) }
// VRSQRT28SD_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.Z m64 xmm k xmm
// VRSQRT28SD.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SD.Z instruction to the active function.
func (c *Context) VRSQRT28SD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRSQRT28SD_Z(mx, x, k, x1))
}
// VRSQRT28SD_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.Z m64 xmm k xmm
// VRSQRT28SD.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SD.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28SD_Z(mx, x, k, x1 operand.Op) { ctx.VRSQRT28SD_Z(mx, x, k, x1) }
// VRSQRT28SS: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SS m32 xmm k xmm
// VRSQRT28SS m32 xmm xmm
// VRSQRT28SS xmm xmm k xmm
// VRSQRT28SS xmm xmm xmm
//
// Construct and append a VRSQRT28SS instruction to the active function.
func (c *Context) VRSQRT28SS(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28SS(ops...))
}
// VRSQRT28SS: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SS m32 xmm k xmm
// VRSQRT28SS m32 xmm xmm
// VRSQRT28SS xmm xmm k xmm
// VRSQRT28SS xmm xmm xmm
//
// Construct and append a VRSQRT28SS instruction to the active function.
// Operates on the global context.
func VRSQRT28SS(ops ...operand.Op) { ctx.VRSQRT28SS(ops...) }
// VRSQRT28SS_SAE: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SS.SAE xmm xmm k xmm
// VRSQRT28SS.SAE xmm xmm xmm
//
// Construct and append a VRSQRT28SS.SAE instruction to the active function.
func (c *Context) VRSQRT28SS_SAE(ops ...operand.Op) {
c.addinstruction(x86.VRSQRT28SS_SAE(ops...))
}
// VRSQRT28SS_SAE: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SS.SAE xmm xmm k xmm
// VRSQRT28SS.SAE xmm xmm xmm
//
// Construct and append a VRSQRT28SS.SAE instruction to the active function.
// Operates on the global context.
func VRSQRT28SS_SAE(ops ...operand.Op) { ctx.VRSQRT28SS_SAE(ops...) }
// VRSQRT28SS_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.SAE.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SS.SAE.Z instruction to the active function.
func (c *Context) VRSQRT28SS_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VRSQRT28SS_SAE_Z(x, x1, k, x2))
}
// VRSQRT28SS_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.SAE.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SS.SAE.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28SS_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VRSQRT28SS_SAE_Z(x, x1, k, x2) }
// VRSQRT28SS_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.Z m32 xmm k xmm
// VRSQRT28SS.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SS.Z instruction to the active function.
func (c *Context) VRSQRT28SS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VRSQRT28SS_Z(mx, x, k, x1))
}
// VRSQRT28SS_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.Z m32 xmm k xmm
// VRSQRT28SS.Z xmm xmm k xmm
//
// Construct and append a VRSQRT28SS.Z instruction to the active function.
// Operates on the global context.
func VRSQRT28SS_Z(mx, x, k, x1 operand.Op) { ctx.VRSQRT28SS_Z(mx, x, k, x1) }
// VRSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRTPS m128 xmm
// VRSQRTPS m256 ymm
// VRSQRTPS xmm xmm
// VRSQRTPS ymm ymm
//
// Construct and append a VRSQRTPS instruction to the active function.
func (c *Context) VRSQRTPS(mxy, xy operand.Op) {
c.addinstruction(x86.VRSQRTPS(mxy, xy))
}
// VRSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRTPS m128 xmm
// VRSQRTPS m256 ymm
// VRSQRTPS xmm xmm
// VRSQRTPS ymm ymm
//
// Construct and append a VRSQRTPS instruction to the active function.
// Operates on the global context.
func VRSQRTPS(mxy, xy operand.Op) { ctx.VRSQRTPS(mxy, xy) }
// VRSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRTSS m32 xmm xmm
// VRSQRTSS xmm xmm xmm
//
// Construct and append a VRSQRTSS instruction to the active function.
func (c *Context) VRSQRTSS(mx, x, x1 operand.Op) {
c.addinstruction(x86.VRSQRTSS(mx, x, x1))
}
// VRSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRTSS m32 xmm xmm
// VRSQRTSS xmm xmm xmm
//
// Construct and append a VRSQRTSS instruction to the active function.
// Operates on the global context.
func VRSQRTSS(mx, x, x1 operand.Op) { ctx.VRSQRTSS(mx, x, x1) }
// VSCALEFPD: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPD m128 xmm k xmm
// VSCALEFPD m128 xmm xmm
// VSCALEFPD m256 ymm k ymm
// VSCALEFPD m256 ymm ymm
// VSCALEFPD xmm xmm k xmm
// VSCALEFPD xmm xmm xmm
// VSCALEFPD ymm ymm k ymm
// VSCALEFPD ymm ymm ymm
// VSCALEFPD m512 zmm k zmm
// VSCALEFPD m512 zmm zmm
// VSCALEFPD zmm zmm k zmm
// VSCALEFPD zmm zmm zmm
//
// Construct and append a VSCALEFPD instruction to the active function.
func (c *Context) VSCALEFPD(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD(ops...))
}
// VSCALEFPD: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPD m128 xmm k xmm
// VSCALEFPD m128 xmm xmm
// VSCALEFPD m256 ymm k ymm
// VSCALEFPD m256 ymm ymm
// VSCALEFPD xmm xmm k xmm
// VSCALEFPD xmm xmm xmm
// VSCALEFPD ymm ymm k ymm
// VSCALEFPD ymm ymm ymm
// VSCALEFPD m512 zmm k zmm
// VSCALEFPD m512 zmm zmm
// VSCALEFPD zmm zmm k zmm
// VSCALEFPD zmm zmm zmm
//
// Construct and append a VSCALEFPD instruction to the active function.
// Operates on the global context.
func VSCALEFPD(ops ...operand.Op) { ctx.VSCALEFPD(ops...) }
// VSCALEFPD_BCST: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPD.BCST m64 xmm k xmm
// VSCALEFPD.BCST m64 xmm xmm
// VSCALEFPD.BCST m64 ymm k ymm
// VSCALEFPD.BCST m64 ymm ymm
// VSCALEFPD.BCST m64 zmm k zmm
// VSCALEFPD.BCST m64 zmm zmm
//
// Construct and append a VSCALEFPD.BCST instruction to the active function.
func (c *Context) VSCALEFPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD_BCST(ops...))
}
// VSCALEFPD_BCST: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPD.BCST m64 xmm k xmm
// VSCALEFPD.BCST m64 xmm xmm
// VSCALEFPD.BCST m64 ymm k ymm
// VSCALEFPD.BCST m64 ymm ymm
// VSCALEFPD.BCST m64 zmm k zmm
// VSCALEFPD.BCST m64 zmm zmm
//
// Construct and append a VSCALEFPD.BCST instruction to the active function.
// Operates on the global context.
func VSCALEFPD_BCST(ops ...operand.Op) { ctx.VSCALEFPD_BCST(ops...) }
// VSCALEFPD_BCST_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.BCST.Z m64 xmm k xmm
// VSCALEFPD.BCST.Z m64 ymm k ymm
// VSCALEFPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VSCALEFPD.BCST.Z instruction to the active function.
func (c *Context) VSCALEFPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSCALEFPD_BCST_Z(m, xyz, k, xyz1))
}
// VSCALEFPD_BCST_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.BCST.Z m64 xmm k xmm
// VSCALEFPD.BCST.Z m64 ymm k ymm
// VSCALEFPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VSCALEFPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VSCALEFPD_BCST_Z(m, xyz, k, xyz1) }
// VSCALEFPD_RD_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPD.RD_SAE zmm zmm k zmm
// VSCALEFPD.RD_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RD_SAE instruction to the active function.
func (c *Context) VSCALEFPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD_RD_SAE(ops...))
}
// VSCALEFPD_RD_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPD.RD_SAE zmm zmm k zmm
// VSCALEFPD.RD_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RD_SAE(ops ...operand.Op) { ctx.VSCALEFPD_RD_SAE(ops...) }
// VSCALEFPD_RD_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RD_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPD_RD_SAE_Z(z, z1, k, z2))
}
// VSCALEFPD_RD_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPD_RD_SAE_Z(z, z1, k, z2) }
// VSCALEFPD_RN_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPD.RN_SAE zmm zmm k zmm
// VSCALEFPD.RN_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RN_SAE instruction to the active function.
func (c *Context) VSCALEFPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD_RN_SAE(ops...))
}
// VSCALEFPD_RN_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPD.RN_SAE zmm zmm k zmm
// VSCALEFPD.RN_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RN_SAE(ops ...operand.Op) { ctx.VSCALEFPD_RN_SAE(ops...) }
// VSCALEFPD_RN_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RN_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPD_RN_SAE_Z(z, z1, k, z2))
}
// VSCALEFPD_RN_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPD_RN_SAE_Z(z, z1, k, z2) }
// VSCALEFPD_RU_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPD.RU_SAE zmm zmm k zmm
// VSCALEFPD.RU_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RU_SAE instruction to the active function.
func (c *Context) VSCALEFPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD_RU_SAE(ops...))
}
// VSCALEFPD_RU_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPD.RU_SAE zmm zmm k zmm
// VSCALEFPD.RU_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RU_SAE(ops ...operand.Op) { ctx.VSCALEFPD_RU_SAE(ops...) }
// VSCALEFPD_RU_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RU_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPD_RU_SAE_Z(z, z1, k, z2))
}
// VSCALEFPD_RU_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPD_RU_SAE_Z(z, z1, k, z2) }
// VSCALEFPD_RZ_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPD.RZ_SAE zmm zmm k zmm
// VSCALEFPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RZ_SAE instruction to the active function.
func (c *Context) VSCALEFPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPD_RZ_SAE(ops...))
}
// VSCALEFPD_RZ_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPD.RZ_SAE zmm zmm k zmm
// VSCALEFPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RZ_SAE(ops ...operand.Op) { ctx.VSCALEFPD_RZ_SAE(ops...) }
// VSCALEFPD_RZ_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPD_RZ_SAE_Z(z, z1, k, z2))
}
// VSCALEFPD_RZ_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPD_RZ_SAE_Z(z, z1, k, z2) }
// VSCALEFPD_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.Z m128 xmm k xmm
// VSCALEFPD.Z m256 ymm k ymm
// VSCALEFPD.Z xmm xmm k xmm
// VSCALEFPD.Z ymm ymm k ymm
// VSCALEFPD.Z m512 zmm k zmm
// VSCALEFPD.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.Z instruction to the active function.
func (c *Context) VSCALEFPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSCALEFPD_Z(mxyz, xyz, k, xyz1))
}
// VSCALEFPD_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.Z m128 xmm k xmm
// VSCALEFPD.Z m256 ymm k ymm
// VSCALEFPD.Z xmm xmm k xmm
// VSCALEFPD.Z ymm ymm k ymm
// VSCALEFPD.Z m512 zmm k zmm
// VSCALEFPD.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPD.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VSCALEFPD_Z(mxyz, xyz, k, xyz1) }
// VSCALEFPS: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPS m128 xmm k xmm
// VSCALEFPS m128 xmm xmm
// VSCALEFPS m256 ymm k ymm
// VSCALEFPS m256 ymm ymm
// VSCALEFPS xmm xmm k xmm
// VSCALEFPS xmm xmm xmm
// VSCALEFPS ymm ymm k ymm
// VSCALEFPS ymm ymm ymm
// VSCALEFPS m512 zmm k zmm
// VSCALEFPS m512 zmm zmm
// VSCALEFPS zmm zmm k zmm
// VSCALEFPS zmm zmm zmm
//
// Construct and append a VSCALEFPS instruction to the active function.
func (c *Context) VSCALEFPS(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS(ops...))
}
// VSCALEFPS: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPS m128 xmm k xmm
// VSCALEFPS m128 xmm xmm
// VSCALEFPS m256 ymm k ymm
// VSCALEFPS m256 ymm ymm
// VSCALEFPS xmm xmm k xmm
// VSCALEFPS xmm xmm xmm
// VSCALEFPS ymm ymm k ymm
// VSCALEFPS ymm ymm ymm
// VSCALEFPS m512 zmm k zmm
// VSCALEFPS m512 zmm zmm
// VSCALEFPS zmm zmm k zmm
// VSCALEFPS zmm zmm zmm
//
// Construct and append a VSCALEFPS instruction to the active function.
// Operates on the global context.
func VSCALEFPS(ops ...operand.Op) { ctx.VSCALEFPS(ops...) }
// VSCALEFPS_BCST: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPS.BCST m32 xmm k xmm
// VSCALEFPS.BCST m32 xmm xmm
// VSCALEFPS.BCST m32 ymm k ymm
// VSCALEFPS.BCST m32 ymm ymm
// VSCALEFPS.BCST m32 zmm k zmm
// VSCALEFPS.BCST m32 zmm zmm
//
// Construct and append a VSCALEFPS.BCST instruction to the active function.
func (c *Context) VSCALEFPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS_BCST(ops...))
}
// VSCALEFPS_BCST: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPS.BCST m32 xmm k xmm
// VSCALEFPS.BCST m32 xmm xmm
// VSCALEFPS.BCST m32 ymm k ymm
// VSCALEFPS.BCST m32 ymm ymm
// VSCALEFPS.BCST m32 zmm k zmm
// VSCALEFPS.BCST m32 zmm zmm
//
// Construct and append a VSCALEFPS.BCST instruction to the active function.
// Operates on the global context.
func VSCALEFPS_BCST(ops ...operand.Op) { ctx.VSCALEFPS_BCST(ops...) }
// VSCALEFPS_BCST_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.BCST.Z m32 xmm k xmm
// VSCALEFPS.BCST.Z m32 ymm k ymm
// VSCALEFPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VSCALEFPS.BCST.Z instruction to the active function.
func (c *Context) VSCALEFPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSCALEFPS_BCST_Z(m, xyz, k, xyz1))
}
// VSCALEFPS_BCST_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.BCST.Z m32 xmm k xmm
// VSCALEFPS.BCST.Z m32 ymm k ymm
// VSCALEFPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VSCALEFPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VSCALEFPS_BCST_Z(m, xyz, k, xyz1) }
// VSCALEFPS_RD_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPS.RD_SAE zmm zmm k zmm
// VSCALEFPS.RD_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RD_SAE instruction to the active function.
func (c *Context) VSCALEFPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS_RD_SAE(ops...))
}
// VSCALEFPS_RD_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPS.RD_SAE zmm zmm k zmm
// VSCALEFPS.RD_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RD_SAE(ops ...operand.Op) { ctx.VSCALEFPS_RD_SAE(ops...) }
// VSCALEFPS_RD_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RD_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPS_RD_SAE_Z(z, z1, k, z2))
}
// VSCALEFPS_RD_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPS_RD_SAE_Z(z, z1, k, z2) }
// VSCALEFPS_RN_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPS.RN_SAE zmm zmm k zmm
// VSCALEFPS.RN_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RN_SAE instruction to the active function.
func (c *Context) VSCALEFPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS_RN_SAE(ops...))
}
// VSCALEFPS_RN_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPS.RN_SAE zmm zmm k zmm
// VSCALEFPS.RN_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RN_SAE(ops ...operand.Op) { ctx.VSCALEFPS_RN_SAE(ops...) }
// VSCALEFPS_RN_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RN_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPS_RN_SAE_Z(z, z1, k, z2))
}
// VSCALEFPS_RN_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPS_RN_SAE_Z(z, z1, k, z2) }
// VSCALEFPS_RU_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPS.RU_SAE zmm zmm k zmm
// VSCALEFPS.RU_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RU_SAE instruction to the active function.
func (c *Context) VSCALEFPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS_RU_SAE(ops...))
}
// VSCALEFPS_RU_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPS.RU_SAE zmm zmm k zmm
// VSCALEFPS.RU_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RU_SAE(ops ...operand.Op) { ctx.VSCALEFPS_RU_SAE(ops...) }
// VSCALEFPS_RU_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RU_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPS_RU_SAE_Z(z, z1, k, z2))
}
// VSCALEFPS_RU_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPS_RU_SAE_Z(z, z1, k, z2) }
// VSCALEFPS_RZ_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPS.RZ_SAE zmm zmm k zmm
// VSCALEFPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RZ_SAE instruction to the active function.
func (c *Context) VSCALEFPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFPS_RZ_SAE(ops...))
}
// VSCALEFPS_RZ_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPS.RZ_SAE zmm zmm k zmm
// VSCALEFPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VSCALEFPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RZ_SAE(ops ...operand.Op) { ctx.VSCALEFPS_RZ_SAE(ops...) }
// VSCALEFPS_RZ_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSCALEFPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSCALEFPS_RZ_SAE_Z(z, z1, k, z2))
}
// VSCALEFPS_RZ_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSCALEFPS_RZ_SAE_Z(z, z1, k, z2) }
// VSCALEFPS_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.Z m128 xmm k xmm
// VSCALEFPS.Z m256 ymm k ymm
// VSCALEFPS.Z xmm xmm k xmm
// VSCALEFPS.Z ymm ymm k ymm
// VSCALEFPS.Z m512 zmm k zmm
// VSCALEFPS.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.Z instruction to the active function.
func (c *Context) VSCALEFPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSCALEFPS_Z(mxyz, xyz, k, xyz1))
}
// VSCALEFPS_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.Z m128 xmm k xmm
// VSCALEFPS.Z m256 ymm k ymm
// VSCALEFPS.Z xmm xmm k xmm
// VSCALEFPS.Z ymm ymm k ymm
// VSCALEFPS.Z m512 zmm k zmm
// VSCALEFPS.Z zmm zmm k zmm
//
// Construct and append a VSCALEFPS.Z instruction to the active function.
// Operates on the global context.
func VSCALEFPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VSCALEFPS_Z(mxyz, xyz, k, xyz1) }
// VSCALEFSD: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSD m64 xmm k xmm
// VSCALEFSD m64 xmm xmm
// VSCALEFSD xmm xmm k xmm
// VSCALEFSD xmm xmm xmm
//
// Construct and append a VSCALEFSD instruction to the active function.
func (c *Context) VSCALEFSD(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSD(ops...))
}
// VSCALEFSD: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSD m64 xmm k xmm
// VSCALEFSD m64 xmm xmm
// VSCALEFSD xmm xmm k xmm
// VSCALEFSD xmm xmm xmm
//
// Construct and append a VSCALEFSD instruction to the active function.
// Operates on the global context.
func VSCALEFSD(ops ...operand.Op) { ctx.VSCALEFSD(ops...) }
// VSCALEFSD_RD_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSD.RD_SAE xmm xmm k xmm
// VSCALEFSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RD_SAE instruction to the active function.
func (c *Context) VSCALEFSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSD_RD_SAE(ops...))
}
// VSCALEFSD_RD_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSD.RD_SAE xmm xmm k xmm
// VSCALEFSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RD_SAE(ops ...operand.Op) { ctx.VSCALEFSD_RD_SAE(ops...) }
// VSCALEFSD_RD_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RD_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSD_RD_SAE_Z(x, x1, k, x2))
}
// VSCALEFSD_RD_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSD_RD_SAE_Z(x, x1, k, x2) }
// VSCALEFSD_RN_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSD.RN_SAE xmm xmm k xmm
// VSCALEFSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RN_SAE instruction to the active function.
func (c *Context) VSCALEFSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSD_RN_SAE(ops...))
}
// VSCALEFSD_RN_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSD.RN_SAE xmm xmm k xmm
// VSCALEFSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RN_SAE(ops ...operand.Op) { ctx.VSCALEFSD_RN_SAE(ops...) }
// VSCALEFSD_RN_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RN_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSD_RN_SAE_Z(x, x1, k, x2))
}
// VSCALEFSD_RN_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSD_RN_SAE_Z(x, x1, k, x2) }
// VSCALEFSD_RU_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSD.RU_SAE xmm xmm k xmm
// VSCALEFSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RU_SAE instruction to the active function.
func (c *Context) VSCALEFSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSD_RU_SAE(ops...))
}
// VSCALEFSD_RU_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSD.RU_SAE xmm xmm k xmm
// VSCALEFSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RU_SAE(ops ...operand.Op) { ctx.VSCALEFSD_RU_SAE(ops...) }
// VSCALEFSD_RU_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RU_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSD_RU_SAE_Z(x, x1, k, x2))
}
// VSCALEFSD_RU_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSD_RU_SAE_Z(x, x1, k, x2) }
// VSCALEFSD_RZ_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSD.RZ_SAE xmm xmm k xmm
// VSCALEFSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RZ_SAE instruction to the active function.
func (c *Context) VSCALEFSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSD_RZ_SAE(ops...))
}
// VSCALEFSD_RZ_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSD.RZ_SAE xmm xmm k xmm
// VSCALEFSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RZ_SAE(ops ...operand.Op) { ctx.VSCALEFSD_RZ_SAE(ops...) }
// VSCALEFSD_RZ_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSD_RZ_SAE_Z(x, x1, k, x2))
}
// VSCALEFSD_RZ_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSD_RZ_SAE_Z(x, x1, k, x2) }
// VSCALEFSD_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.Z m64 xmm k xmm
// VSCALEFSD.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.Z instruction to the active function.
func (c *Context) VSCALEFSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSCALEFSD_Z(mx, x, k, x1))
}
// VSCALEFSD_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.Z m64 xmm k xmm
// VSCALEFSD.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSD.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSD_Z(mx, x, k, x1 operand.Op) { ctx.VSCALEFSD_Z(mx, x, k, x1) }
// VSCALEFSS: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSS m32 xmm k xmm
// VSCALEFSS m32 xmm xmm
// VSCALEFSS xmm xmm k xmm
// VSCALEFSS xmm xmm xmm
//
// Construct and append a VSCALEFSS instruction to the active function.
func (c *Context) VSCALEFSS(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSS(ops...))
}
// VSCALEFSS: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSS m32 xmm k xmm
// VSCALEFSS m32 xmm xmm
// VSCALEFSS xmm xmm k xmm
// VSCALEFSS xmm xmm xmm
//
// Construct and append a VSCALEFSS instruction to the active function.
// Operates on the global context.
func VSCALEFSS(ops ...operand.Op) { ctx.VSCALEFSS(ops...) }
// VSCALEFSS_RD_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSS.RD_SAE xmm xmm k xmm
// VSCALEFSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RD_SAE instruction to the active function.
func (c *Context) VSCALEFSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSS_RD_SAE(ops...))
}
// VSCALEFSS_RD_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSS.RD_SAE xmm xmm k xmm
// VSCALEFSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RD_SAE(ops ...operand.Op) { ctx.VSCALEFSS_RD_SAE(ops...) }
// VSCALEFSS_RD_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RD_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSS_RD_SAE_Z(x, x1, k, x2))
}
// VSCALEFSS_RD_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSS_RD_SAE_Z(x, x1, k, x2) }
// VSCALEFSS_RN_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSS.RN_SAE xmm xmm k xmm
// VSCALEFSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RN_SAE instruction to the active function.
func (c *Context) VSCALEFSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSS_RN_SAE(ops...))
}
// VSCALEFSS_RN_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSS.RN_SAE xmm xmm k xmm
// VSCALEFSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RN_SAE(ops ...operand.Op) { ctx.VSCALEFSS_RN_SAE(ops...) }
// VSCALEFSS_RN_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RN_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSS_RN_SAE_Z(x, x1, k, x2))
}
// VSCALEFSS_RN_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSS_RN_SAE_Z(x, x1, k, x2) }
// VSCALEFSS_RU_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSS.RU_SAE xmm xmm k xmm
// VSCALEFSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RU_SAE instruction to the active function.
func (c *Context) VSCALEFSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSS_RU_SAE(ops...))
}
// VSCALEFSS_RU_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSS.RU_SAE xmm xmm k xmm
// VSCALEFSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RU_SAE(ops ...operand.Op) { ctx.VSCALEFSS_RU_SAE(ops...) }
// VSCALEFSS_RU_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RU_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSS_RU_SAE_Z(x, x1, k, x2))
}
// VSCALEFSS_RU_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSS_RU_SAE_Z(x, x1, k, x2) }
// VSCALEFSS_RZ_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSS.RZ_SAE xmm xmm k xmm
// VSCALEFSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RZ_SAE instruction to the active function.
func (c *Context) VSCALEFSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSCALEFSS_RZ_SAE(ops...))
}
// VSCALEFSS_RZ_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSS.RZ_SAE xmm xmm k xmm
// VSCALEFSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSCALEFSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RZ_SAE(ops ...operand.Op) { ctx.VSCALEFSS_RZ_SAE(ops...) }
// VSCALEFSS_RZ_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSCALEFSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSCALEFSS_RZ_SAE_Z(x, x1, k, x2))
}
// VSCALEFSS_RZ_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSCALEFSS_RZ_SAE_Z(x, x1, k, x2) }
// VSCALEFSS_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.Z m32 xmm k xmm
// VSCALEFSS.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.Z instruction to the active function.
func (c *Context) VSCALEFSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSCALEFSS_Z(mx, x, k, x1))
}
// VSCALEFSS_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.Z m32 xmm k xmm
// VSCALEFSS.Z xmm xmm k xmm
//
// Construct and append a VSCALEFSS.Z instruction to the active function.
// Operates on the global context.
func VSCALEFSS_Z(mx, x, k, x1 operand.Op) { ctx.VSCALEFSS_Z(mx, x, k, x1) }
// VSCATTERDPD: Scatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPD xmm k vm32x
// VSCATTERDPD ymm k vm32x
// VSCATTERDPD zmm k vm32y
//
// Construct and append a VSCATTERDPD instruction to the active function.
func (c *Context) VSCATTERDPD(xyz, k, v operand.Op) {
c.addinstruction(x86.VSCATTERDPD(xyz, k, v))
}
// VSCATTERDPD: Scatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPD xmm k vm32x
// VSCATTERDPD ymm k vm32x
// VSCATTERDPD zmm k vm32y
//
// Construct and append a VSCATTERDPD instruction to the active function.
// Operates on the global context.
func VSCATTERDPD(xyz, k, v operand.Op) { ctx.VSCATTERDPD(xyz, k, v) }
// VSCATTERDPS: Scatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPS xmm k vm32x
// VSCATTERDPS ymm k vm32y
// VSCATTERDPS zmm k vm32z
//
// Construct and append a VSCATTERDPS instruction to the active function.
func (c *Context) VSCATTERDPS(xyz, k, v operand.Op) {
c.addinstruction(x86.VSCATTERDPS(xyz, k, v))
}
// VSCATTERDPS: Scatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPS xmm k vm32x
// VSCATTERDPS ymm k vm32y
// VSCATTERDPS zmm k vm32z
//
// Construct and append a VSCATTERDPS instruction to the active function.
// Operates on the global context.
func VSCATTERDPS(xyz, k, v operand.Op) { ctx.VSCATTERDPS(xyz, k, v) }
// VSCATTERQPD: Scatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPD xmm k vm64x
// VSCATTERQPD ymm k vm64y
// VSCATTERQPD zmm k vm64z
//
// Construct and append a VSCATTERQPD instruction to the active function.
func (c *Context) VSCATTERQPD(xyz, k, v operand.Op) {
c.addinstruction(x86.VSCATTERQPD(xyz, k, v))
}
// VSCATTERQPD: Scatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPD xmm k vm64x
// VSCATTERQPD ymm k vm64y
// VSCATTERQPD zmm k vm64z
//
// Construct and append a VSCATTERQPD instruction to the active function.
// Operates on the global context.
func VSCATTERQPD(xyz, k, v operand.Op) { ctx.VSCATTERQPD(xyz, k, v) }
// VSCATTERQPS: Scatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPS xmm k vm64x
// VSCATTERQPS xmm k vm64y
// VSCATTERQPS ymm k vm64z
//
// Construct and append a VSCATTERQPS instruction to the active function.
func (c *Context) VSCATTERQPS(xy, k, v operand.Op) {
c.addinstruction(x86.VSCATTERQPS(xy, k, v))
}
// VSCATTERQPS: Scatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPS xmm k vm64x
// VSCATTERQPS xmm k vm64y
// VSCATTERQPS ymm k vm64z
//
// Construct and append a VSCATTERQPS instruction to the active function.
// Operates on the global context.
func VSCATTERQPS(xy, k, v operand.Op) { ctx.VSCATTERQPS(xy, k, v) }
// VSHUFF32X4: Shuffle 128-Bit Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF32X4 imm8 m256 ymm k ymm
// VSHUFF32X4 imm8 m256 ymm ymm
// VSHUFF32X4 imm8 ymm ymm k ymm
// VSHUFF32X4 imm8 ymm ymm ymm
// VSHUFF32X4 imm8 m512 zmm k zmm
// VSHUFF32X4 imm8 m512 zmm zmm
// VSHUFF32X4 imm8 zmm zmm k zmm
// VSHUFF32X4 imm8 zmm zmm zmm
//
// Construct and append a VSHUFF32X4 instruction to the active function.
func (c *Context) VSHUFF32X4(ops ...operand.Op) {
c.addinstruction(x86.VSHUFF32X4(ops...))
}
// VSHUFF32X4: Shuffle 128-Bit Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF32X4 imm8 m256 ymm k ymm
// VSHUFF32X4 imm8 m256 ymm ymm
// VSHUFF32X4 imm8 ymm ymm k ymm
// VSHUFF32X4 imm8 ymm ymm ymm
// VSHUFF32X4 imm8 m512 zmm k zmm
// VSHUFF32X4 imm8 m512 zmm zmm
// VSHUFF32X4 imm8 zmm zmm k zmm
// VSHUFF32X4 imm8 zmm zmm zmm
//
// Construct and append a VSHUFF32X4 instruction to the active function.
// Operates on the global context.
func VSHUFF32X4(ops ...operand.Op) { ctx.VSHUFF32X4(ops...) }
// VSHUFF32X4_BCST: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF32X4.BCST imm8 m32 ymm k ymm
// VSHUFF32X4.BCST imm8 m32 ymm ymm
// VSHUFF32X4.BCST imm8 m32 zmm k zmm
// VSHUFF32X4.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFF32X4.BCST instruction to the active function.
func (c *Context) VSHUFF32X4_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFF32X4_BCST(ops...))
}
// VSHUFF32X4_BCST: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF32X4.BCST imm8 m32 ymm k ymm
// VSHUFF32X4.BCST imm8 m32 ymm ymm
// VSHUFF32X4.BCST imm8 m32 zmm k zmm
// VSHUFF32X4.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFF32X4.BCST instruction to the active function.
// Operates on the global context.
func VSHUFF32X4_BCST(ops ...operand.Op) { ctx.VSHUFF32X4_BCST(ops...) }
// VSHUFF32X4_BCST_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFF32X4.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFF32X4.BCST.Z instruction to the active function.
func (c *Context) VSHUFF32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFF32X4_BCST_Z(i, m, yz, k, yz1))
}
// VSHUFF32X4_BCST_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFF32X4.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFF32X4.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFF32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) { ctx.VSHUFF32X4_BCST_Z(i, m, yz, k, yz1) }
// VSHUFF32X4_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.Z imm8 m256 ymm k ymm
// VSHUFF32X4.Z imm8 ymm ymm k ymm
// VSHUFF32X4.Z imm8 m512 zmm k zmm
// VSHUFF32X4.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFF32X4.Z instruction to the active function.
func (c *Context) VSHUFF32X4_Z(i, myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFF32X4_Z(i, myz, yz, k, yz1))
}
// VSHUFF32X4_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.Z imm8 m256 ymm k ymm
// VSHUFF32X4.Z imm8 ymm ymm k ymm
// VSHUFF32X4.Z imm8 m512 zmm k zmm
// VSHUFF32X4.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFF32X4.Z instruction to the active function.
// Operates on the global context.
func VSHUFF32X4_Z(i, myz, yz, k, yz1 operand.Op) { ctx.VSHUFF32X4_Z(i, myz, yz, k, yz1) }
// VSHUFF64X2: Shuffle 128-Bit Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF64X2 imm8 m256 ymm k ymm
// VSHUFF64X2 imm8 m256 ymm ymm
// VSHUFF64X2 imm8 ymm ymm k ymm
// VSHUFF64X2 imm8 ymm ymm ymm
// VSHUFF64X2 imm8 m512 zmm k zmm
// VSHUFF64X2 imm8 m512 zmm zmm
// VSHUFF64X2 imm8 zmm zmm k zmm
// VSHUFF64X2 imm8 zmm zmm zmm
//
// Construct and append a VSHUFF64X2 instruction to the active function.
func (c *Context) VSHUFF64X2(ops ...operand.Op) {
c.addinstruction(x86.VSHUFF64X2(ops...))
}
// VSHUFF64X2: Shuffle 128-Bit Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF64X2 imm8 m256 ymm k ymm
// VSHUFF64X2 imm8 m256 ymm ymm
// VSHUFF64X2 imm8 ymm ymm k ymm
// VSHUFF64X2 imm8 ymm ymm ymm
// VSHUFF64X2 imm8 m512 zmm k zmm
// VSHUFF64X2 imm8 m512 zmm zmm
// VSHUFF64X2 imm8 zmm zmm k zmm
// VSHUFF64X2 imm8 zmm zmm zmm
//
// Construct and append a VSHUFF64X2 instruction to the active function.
// Operates on the global context.
func VSHUFF64X2(ops ...operand.Op) { ctx.VSHUFF64X2(ops...) }
// VSHUFF64X2_BCST: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF64X2.BCST imm8 m64 ymm k ymm
// VSHUFF64X2.BCST imm8 m64 ymm ymm
// VSHUFF64X2.BCST imm8 m64 zmm k zmm
// VSHUFF64X2.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFF64X2.BCST instruction to the active function.
func (c *Context) VSHUFF64X2_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFF64X2_BCST(ops...))
}
// VSHUFF64X2_BCST: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF64X2.BCST imm8 m64 ymm k ymm
// VSHUFF64X2.BCST imm8 m64 ymm ymm
// VSHUFF64X2.BCST imm8 m64 zmm k zmm
// VSHUFF64X2.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFF64X2.BCST instruction to the active function.
// Operates on the global context.
func VSHUFF64X2_BCST(ops ...operand.Op) { ctx.VSHUFF64X2_BCST(ops...) }
// VSHUFF64X2_BCST_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFF64X2.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFF64X2.BCST.Z instruction to the active function.
func (c *Context) VSHUFF64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFF64X2_BCST_Z(i, m, yz, k, yz1))
}
// VSHUFF64X2_BCST_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFF64X2.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFF64X2.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFF64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) { ctx.VSHUFF64X2_BCST_Z(i, m, yz, k, yz1) }
// VSHUFF64X2_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.Z imm8 m256 ymm k ymm
// VSHUFF64X2.Z imm8 ymm ymm k ymm
// VSHUFF64X2.Z imm8 m512 zmm k zmm
// VSHUFF64X2.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFF64X2.Z instruction to the active function.
func (c *Context) VSHUFF64X2_Z(i, myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFF64X2_Z(i, myz, yz, k, yz1))
}
// VSHUFF64X2_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.Z imm8 m256 ymm k ymm
// VSHUFF64X2.Z imm8 ymm ymm k ymm
// VSHUFF64X2.Z imm8 m512 zmm k zmm
// VSHUFF64X2.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFF64X2.Z instruction to the active function.
// Operates on the global context.
func VSHUFF64X2_Z(i, myz, yz, k, yz1 operand.Op) { ctx.VSHUFF64X2_Z(i, myz, yz, k, yz1) }
// VSHUFI32X4: Shuffle 128-Bit Packed Doubleword Integer Values.
//
// Forms:
//
// VSHUFI32X4 imm8 m256 ymm k ymm
// VSHUFI32X4 imm8 m256 ymm ymm
// VSHUFI32X4 imm8 ymm ymm k ymm
// VSHUFI32X4 imm8 ymm ymm ymm
// VSHUFI32X4 imm8 m512 zmm k zmm
// VSHUFI32X4 imm8 m512 zmm zmm
// VSHUFI32X4 imm8 zmm zmm k zmm
// VSHUFI32X4 imm8 zmm zmm zmm
//
// Construct and append a VSHUFI32X4 instruction to the active function.
func (c *Context) VSHUFI32X4(ops ...operand.Op) {
c.addinstruction(x86.VSHUFI32X4(ops...))
}
// VSHUFI32X4: Shuffle 128-Bit Packed Doubleword Integer Values.
//
// Forms:
//
// VSHUFI32X4 imm8 m256 ymm k ymm
// VSHUFI32X4 imm8 m256 ymm ymm
// VSHUFI32X4 imm8 ymm ymm k ymm
// VSHUFI32X4 imm8 ymm ymm ymm
// VSHUFI32X4 imm8 m512 zmm k zmm
// VSHUFI32X4 imm8 m512 zmm zmm
// VSHUFI32X4 imm8 zmm zmm k zmm
// VSHUFI32X4 imm8 zmm zmm zmm
//
// Construct and append a VSHUFI32X4 instruction to the active function.
// Operates on the global context.
func VSHUFI32X4(ops ...operand.Op) { ctx.VSHUFI32X4(ops...) }
// VSHUFI32X4_BCST: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI32X4.BCST imm8 m32 ymm k ymm
// VSHUFI32X4.BCST imm8 m32 ymm ymm
// VSHUFI32X4.BCST imm8 m32 zmm k zmm
// VSHUFI32X4.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFI32X4.BCST instruction to the active function.
func (c *Context) VSHUFI32X4_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFI32X4_BCST(ops...))
}
// VSHUFI32X4_BCST: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI32X4.BCST imm8 m32 ymm k ymm
// VSHUFI32X4.BCST imm8 m32 ymm ymm
// VSHUFI32X4.BCST imm8 m32 zmm k zmm
// VSHUFI32X4.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFI32X4.BCST instruction to the active function.
// Operates on the global context.
func VSHUFI32X4_BCST(ops ...operand.Op) { ctx.VSHUFI32X4_BCST(ops...) }
// VSHUFI32X4_BCST_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFI32X4.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFI32X4.BCST.Z instruction to the active function.
func (c *Context) VSHUFI32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFI32X4_BCST_Z(i, m, yz, k, yz1))
}
// VSHUFI32X4_BCST_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFI32X4.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFI32X4.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFI32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) { ctx.VSHUFI32X4_BCST_Z(i, m, yz, k, yz1) }
// VSHUFI32X4_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.Z imm8 m256 ymm k ymm
// VSHUFI32X4.Z imm8 ymm ymm k ymm
// VSHUFI32X4.Z imm8 m512 zmm k zmm
// VSHUFI32X4.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFI32X4.Z instruction to the active function.
func (c *Context) VSHUFI32X4_Z(i, myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFI32X4_Z(i, myz, yz, k, yz1))
}
// VSHUFI32X4_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.Z imm8 m256 ymm k ymm
// VSHUFI32X4.Z imm8 ymm ymm k ymm
// VSHUFI32X4.Z imm8 m512 zmm k zmm
// VSHUFI32X4.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFI32X4.Z instruction to the active function.
// Operates on the global context.
func VSHUFI32X4_Z(i, myz, yz, k, yz1 operand.Op) { ctx.VSHUFI32X4_Z(i, myz, yz, k, yz1) }
// VSHUFI64X2: Shuffle 128-Bit Packed Quadword Integer Values.
//
// Forms:
//
// VSHUFI64X2 imm8 m256 ymm k ymm
// VSHUFI64X2 imm8 m256 ymm ymm
// VSHUFI64X2 imm8 ymm ymm k ymm
// VSHUFI64X2 imm8 ymm ymm ymm
// VSHUFI64X2 imm8 m512 zmm k zmm
// VSHUFI64X2 imm8 m512 zmm zmm
// VSHUFI64X2 imm8 zmm zmm k zmm
// VSHUFI64X2 imm8 zmm zmm zmm
//
// Construct and append a VSHUFI64X2 instruction to the active function.
func (c *Context) VSHUFI64X2(ops ...operand.Op) {
c.addinstruction(x86.VSHUFI64X2(ops...))
}
// VSHUFI64X2: Shuffle 128-Bit Packed Quadword Integer Values.
//
// Forms:
//
// VSHUFI64X2 imm8 m256 ymm k ymm
// VSHUFI64X2 imm8 m256 ymm ymm
// VSHUFI64X2 imm8 ymm ymm k ymm
// VSHUFI64X2 imm8 ymm ymm ymm
// VSHUFI64X2 imm8 m512 zmm k zmm
// VSHUFI64X2 imm8 m512 zmm zmm
// VSHUFI64X2 imm8 zmm zmm k zmm
// VSHUFI64X2 imm8 zmm zmm zmm
//
// Construct and append a VSHUFI64X2 instruction to the active function.
// Operates on the global context.
func VSHUFI64X2(ops ...operand.Op) { ctx.VSHUFI64X2(ops...) }
// VSHUFI64X2_BCST: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI64X2.BCST imm8 m64 ymm k ymm
// VSHUFI64X2.BCST imm8 m64 ymm ymm
// VSHUFI64X2.BCST imm8 m64 zmm k zmm
// VSHUFI64X2.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFI64X2.BCST instruction to the active function.
func (c *Context) VSHUFI64X2_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFI64X2_BCST(ops...))
}
// VSHUFI64X2_BCST: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI64X2.BCST imm8 m64 ymm k ymm
// VSHUFI64X2.BCST imm8 m64 ymm ymm
// VSHUFI64X2.BCST imm8 m64 zmm k zmm
// VSHUFI64X2.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFI64X2.BCST instruction to the active function.
// Operates on the global context.
func VSHUFI64X2_BCST(ops ...operand.Op) { ctx.VSHUFI64X2_BCST(ops...) }
// VSHUFI64X2_BCST_Z: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFI64X2.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFI64X2.BCST.Z instruction to the active function.
func (c *Context) VSHUFI64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFI64X2_BCST_Z(i, m, yz, k, yz1))
}
// VSHUFI64X2_BCST_Z: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFI64X2.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFI64X2.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFI64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) { ctx.VSHUFI64X2_BCST_Z(i, m, yz, k, yz1) }
// VSHUFI64X2_Z: Shuffle 128-Bit Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.Z imm8 m256 ymm k ymm
// VSHUFI64X2.Z imm8 ymm ymm k ymm
// VSHUFI64X2.Z imm8 m512 zmm k zmm
// VSHUFI64X2.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFI64X2.Z instruction to the active function.
func (c *Context) VSHUFI64X2_Z(i, myz, yz, k, yz1 operand.Op) {
c.addinstruction(x86.VSHUFI64X2_Z(i, myz, yz, k, yz1))
}
// VSHUFI64X2_Z: Shuffle 128-Bit Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.Z imm8 m256 ymm k ymm
// VSHUFI64X2.Z imm8 ymm ymm k ymm
// VSHUFI64X2.Z imm8 m512 zmm k zmm
// VSHUFI64X2.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFI64X2.Z instruction to the active function.
// Operates on the global context.
func VSHUFI64X2_Z(i, myz, yz, k, yz1 operand.Op) { ctx.VSHUFI64X2_Z(i, myz, yz, k, yz1) }
// VSHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPD imm8 m128 xmm xmm
// VSHUFPD imm8 m256 ymm ymm
// VSHUFPD imm8 xmm xmm xmm
// VSHUFPD imm8 ymm ymm ymm
// VSHUFPD imm8 m128 xmm k xmm
// VSHUFPD imm8 m256 ymm k ymm
// VSHUFPD imm8 xmm xmm k xmm
// VSHUFPD imm8 ymm ymm k ymm
// VSHUFPD imm8 m512 zmm k zmm
// VSHUFPD imm8 m512 zmm zmm
// VSHUFPD imm8 zmm zmm k zmm
// VSHUFPD imm8 zmm zmm zmm
//
// Construct and append a VSHUFPD instruction to the active function.
func (c *Context) VSHUFPD(ops ...operand.Op) {
c.addinstruction(x86.VSHUFPD(ops...))
}
// VSHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPD imm8 m128 xmm xmm
// VSHUFPD imm8 m256 ymm ymm
// VSHUFPD imm8 xmm xmm xmm
// VSHUFPD imm8 ymm ymm ymm
// VSHUFPD imm8 m128 xmm k xmm
// VSHUFPD imm8 m256 ymm k ymm
// VSHUFPD imm8 xmm xmm k xmm
// VSHUFPD imm8 ymm ymm k ymm
// VSHUFPD imm8 m512 zmm k zmm
// VSHUFPD imm8 m512 zmm zmm
// VSHUFPD imm8 zmm zmm k zmm
// VSHUFPD imm8 zmm zmm zmm
//
// Construct and append a VSHUFPD instruction to the active function.
// Operates on the global context.
func VSHUFPD(ops ...operand.Op) { ctx.VSHUFPD(ops...) }
// VSHUFPD_BCST: Shuffle Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPD.BCST imm8 m64 xmm k xmm
// VSHUFPD.BCST imm8 m64 xmm xmm
// VSHUFPD.BCST imm8 m64 ymm k ymm
// VSHUFPD.BCST imm8 m64 ymm ymm
// VSHUFPD.BCST imm8 m64 zmm k zmm
// VSHUFPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFPD.BCST instruction to the active function.
func (c *Context) VSHUFPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFPD_BCST(ops...))
}
// VSHUFPD_BCST: Shuffle Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPD.BCST imm8 m64 xmm k xmm
// VSHUFPD.BCST imm8 m64 xmm xmm
// VSHUFPD.BCST imm8 m64 ymm k ymm
// VSHUFPD.BCST imm8 m64 ymm ymm
// VSHUFPD.BCST imm8 m64 zmm k zmm
// VSHUFPD.BCST imm8 m64 zmm zmm
//
// Construct and append a VSHUFPD.BCST instruction to the active function.
// Operates on the global context.
func VSHUFPD_BCST(ops ...operand.Op) { ctx.VSHUFPD_BCST(ops...) }
// VSHUFPD_BCST_Z: Shuffle Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPD.BCST.Z imm8 m64 xmm k xmm
// VSHUFPD.BCST.Z imm8 m64 ymm k ymm
// VSHUFPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFPD.BCST.Z instruction to the active function.
func (c *Context) VSHUFPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSHUFPD_BCST_Z(i, m, xyz, k, xyz1))
}
// VSHUFPD_BCST_Z: Shuffle Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPD.BCST.Z imm8 m64 xmm k xmm
// VSHUFPD.BCST.Z imm8 m64 ymm k ymm
// VSHUFPD.BCST.Z imm8 m64 zmm k zmm
//
// Construct and append a VSHUFPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VSHUFPD_BCST_Z(i, m, xyz, k, xyz1) }
// VSHUFPD_Z: Shuffle Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPD.Z imm8 m128 xmm k xmm
// VSHUFPD.Z imm8 m256 ymm k ymm
// VSHUFPD.Z imm8 xmm xmm k xmm
// VSHUFPD.Z imm8 ymm ymm k ymm
// VSHUFPD.Z imm8 m512 zmm k zmm
// VSHUFPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFPD.Z instruction to the active function.
func (c *Context) VSHUFPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSHUFPD_Z(i, mxyz, xyz, k, xyz1))
}
// VSHUFPD_Z: Shuffle Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPD.Z imm8 m128 xmm k xmm
// VSHUFPD.Z imm8 m256 ymm k ymm
// VSHUFPD.Z imm8 xmm xmm k xmm
// VSHUFPD.Z imm8 ymm ymm k ymm
// VSHUFPD.Z imm8 m512 zmm k zmm
// VSHUFPD.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFPD.Z instruction to the active function.
// Operates on the global context.
func VSHUFPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VSHUFPD_Z(i, mxyz, xyz, k, xyz1) }
// VSHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPS imm8 m128 xmm xmm
// VSHUFPS imm8 m256 ymm ymm
// VSHUFPS imm8 xmm xmm xmm
// VSHUFPS imm8 ymm ymm ymm
// VSHUFPS imm8 m128 xmm k xmm
// VSHUFPS imm8 m256 ymm k ymm
// VSHUFPS imm8 xmm xmm k xmm
// VSHUFPS imm8 ymm ymm k ymm
// VSHUFPS imm8 m512 zmm k zmm
// VSHUFPS imm8 m512 zmm zmm
// VSHUFPS imm8 zmm zmm k zmm
// VSHUFPS imm8 zmm zmm zmm
//
// Construct and append a VSHUFPS instruction to the active function.
func (c *Context) VSHUFPS(ops ...operand.Op) {
c.addinstruction(x86.VSHUFPS(ops...))
}
// VSHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPS imm8 m128 xmm xmm
// VSHUFPS imm8 m256 ymm ymm
// VSHUFPS imm8 xmm xmm xmm
// VSHUFPS imm8 ymm ymm ymm
// VSHUFPS imm8 m128 xmm k xmm
// VSHUFPS imm8 m256 ymm k ymm
// VSHUFPS imm8 xmm xmm k xmm
// VSHUFPS imm8 ymm ymm k ymm
// VSHUFPS imm8 m512 zmm k zmm
// VSHUFPS imm8 m512 zmm zmm
// VSHUFPS imm8 zmm zmm k zmm
// VSHUFPS imm8 zmm zmm zmm
//
// Construct and append a VSHUFPS instruction to the active function.
// Operates on the global context.
func VSHUFPS(ops ...operand.Op) { ctx.VSHUFPS(ops...) }
// VSHUFPS_BCST: Shuffle Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPS.BCST imm8 m32 xmm k xmm
// VSHUFPS.BCST imm8 m32 xmm xmm
// VSHUFPS.BCST imm8 m32 ymm k ymm
// VSHUFPS.BCST imm8 m32 ymm ymm
// VSHUFPS.BCST imm8 m32 zmm k zmm
// VSHUFPS.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFPS.BCST instruction to the active function.
func (c *Context) VSHUFPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSHUFPS_BCST(ops...))
}
// VSHUFPS_BCST: Shuffle Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPS.BCST imm8 m32 xmm k xmm
// VSHUFPS.BCST imm8 m32 xmm xmm
// VSHUFPS.BCST imm8 m32 ymm k ymm
// VSHUFPS.BCST imm8 m32 ymm ymm
// VSHUFPS.BCST imm8 m32 zmm k zmm
// VSHUFPS.BCST imm8 m32 zmm zmm
//
// Construct and append a VSHUFPS.BCST instruction to the active function.
// Operates on the global context.
func VSHUFPS_BCST(ops ...operand.Op) { ctx.VSHUFPS_BCST(ops...) }
// VSHUFPS_BCST_Z: Shuffle Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPS.BCST.Z imm8 m32 xmm k xmm
// VSHUFPS.BCST.Z imm8 m32 ymm k ymm
// VSHUFPS.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFPS.BCST.Z instruction to the active function.
func (c *Context) VSHUFPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSHUFPS_BCST_Z(i, m, xyz, k, xyz1))
}
// VSHUFPS_BCST_Z: Shuffle Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPS.BCST.Z imm8 m32 xmm k xmm
// VSHUFPS.BCST.Z imm8 m32 ymm k ymm
// VSHUFPS.BCST.Z imm8 m32 zmm k zmm
//
// Construct and append a VSHUFPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VSHUFPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VSHUFPS_BCST_Z(i, m, xyz, k, xyz1) }
// VSHUFPS_Z: Shuffle Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPS.Z imm8 m128 xmm k xmm
// VSHUFPS.Z imm8 m256 ymm k ymm
// VSHUFPS.Z imm8 xmm xmm k xmm
// VSHUFPS.Z imm8 ymm ymm k ymm
// VSHUFPS.Z imm8 m512 zmm k zmm
// VSHUFPS.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFPS.Z instruction to the active function.
func (c *Context) VSHUFPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSHUFPS_Z(i, mxyz, xyz, k, xyz1))
}
// VSHUFPS_Z: Shuffle Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPS.Z imm8 m128 xmm k xmm
// VSHUFPS.Z imm8 m256 ymm k ymm
// VSHUFPS.Z imm8 xmm xmm k xmm
// VSHUFPS.Z imm8 ymm ymm k ymm
// VSHUFPS.Z imm8 m512 zmm k zmm
// VSHUFPS.Z imm8 zmm zmm k zmm
//
// Construct and append a VSHUFPS.Z instruction to the active function.
// Operates on the global context.
func VSHUFPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VSHUFPS_Z(i, mxyz, xyz, k, xyz1) }
// VSQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPD m128 xmm
// VSQRTPD m256 ymm
// VSQRTPD xmm xmm
// VSQRTPD ymm ymm
// VSQRTPD m128 k xmm
// VSQRTPD m256 k ymm
// VSQRTPD xmm k xmm
// VSQRTPD ymm k ymm
// VSQRTPD m512 k zmm
// VSQRTPD m512 zmm
// VSQRTPD zmm k zmm
// VSQRTPD zmm zmm
//
// Construct and append a VSQRTPD instruction to the active function.
func (c *Context) VSQRTPD(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD(ops...))
}
// VSQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPD m128 xmm
// VSQRTPD m256 ymm
// VSQRTPD xmm xmm
// VSQRTPD ymm ymm
// VSQRTPD m128 k xmm
// VSQRTPD m256 k ymm
// VSQRTPD xmm k xmm
// VSQRTPD ymm k ymm
// VSQRTPD m512 k zmm
// VSQRTPD m512 zmm
// VSQRTPD zmm k zmm
// VSQRTPD zmm zmm
//
// Construct and append a VSQRTPD instruction to the active function.
// Operates on the global context.
func VSQRTPD(ops ...operand.Op) { ctx.VSQRTPD(ops...) }
// VSQRTPD_BCST: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPD.BCST m32 k xmm
// VSQRTPD.BCST m32 k ymm
// VSQRTPD.BCST m32 xmm
// VSQRTPD.BCST m32 ymm
// VSQRTPD.BCST m64 k zmm
// VSQRTPD.BCST m64 zmm
//
// Construct and append a VSQRTPD.BCST instruction to the active function.
func (c *Context) VSQRTPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD_BCST(ops...))
}
// VSQRTPD_BCST: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPD.BCST m32 k xmm
// VSQRTPD.BCST m32 k ymm
// VSQRTPD.BCST m32 xmm
// VSQRTPD.BCST m32 ymm
// VSQRTPD.BCST m64 k zmm
// VSQRTPD.BCST m64 zmm
//
// Construct and append a VSQRTPD.BCST instruction to the active function.
// Operates on the global context.
func VSQRTPD_BCST(ops ...operand.Op) { ctx.VSQRTPD_BCST(ops...) }
// VSQRTPD_BCST_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.BCST.Z m32 k xmm
// VSQRTPD.BCST.Z m32 k ymm
// VSQRTPD.BCST.Z m64 k zmm
//
// Construct and append a VSQRTPD.BCST.Z instruction to the active function.
func (c *Context) VSQRTPD_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VSQRTPD_BCST_Z(m, k, xyz))
}
// VSQRTPD_BCST_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.BCST.Z m32 k xmm
// VSQRTPD.BCST.Z m32 k ymm
// VSQRTPD.BCST.Z m64 k zmm
//
// Construct and append a VSQRTPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_BCST_Z(m, k, xyz operand.Op) { ctx.VSQRTPD_BCST_Z(m, k, xyz) }
// VSQRTPD_RD_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPD.RD_SAE zmm k zmm
// VSQRTPD.RD_SAE zmm zmm
//
// Construct and append a VSQRTPD.RD_SAE instruction to the active function.
func (c *Context) VSQRTPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD_RD_SAE(ops...))
}
// VSQRTPD_RD_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPD.RD_SAE zmm k zmm
// VSQRTPD.RD_SAE zmm zmm
//
// Construct and append a VSQRTPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPD_RD_SAE(ops ...operand.Op) { ctx.VSQRTPD_RD_SAE(ops...) }
// VSQRTPD_RD_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RD_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RD_SAE.Z instruction to the active function.
func (c *Context) VSQRTPD_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPD_RD_SAE_Z(z, k, z1))
}
// VSQRTPD_RD_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RD_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPD_RD_SAE_Z(z, k, z1) }
// VSQRTPD_RN_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPD.RN_SAE zmm k zmm
// VSQRTPD.RN_SAE zmm zmm
//
// Construct and append a VSQRTPD.RN_SAE instruction to the active function.
func (c *Context) VSQRTPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD_RN_SAE(ops...))
}
// VSQRTPD_RN_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPD.RN_SAE zmm k zmm
// VSQRTPD.RN_SAE zmm zmm
//
// Construct and append a VSQRTPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPD_RN_SAE(ops ...operand.Op) { ctx.VSQRTPD_RN_SAE(ops...) }
// VSQRTPD_RN_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RN_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RN_SAE.Z instruction to the active function.
func (c *Context) VSQRTPD_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPD_RN_SAE_Z(z, k, z1))
}
// VSQRTPD_RN_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RN_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPD_RN_SAE_Z(z, k, z1) }
// VSQRTPD_RU_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPD.RU_SAE zmm k zmm
// VSQRTPD.RU_SAE zmm zmm
//
// Construct and append a VSQRTPD.RU_SAE instruction to the active function.
func (c *Context) VSQRTPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD_RU_SAE(ops...))
}
// VSQRTPD_RU_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPD.RU_SAE zmm k zmm
// VSQRTPD.RU_SAE zmm zmm
//
// Construct and append a VSQRTPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPD_RU_SAE(ops ...operand.Op) { ctx.VSQRTPD_RU_SAE(ops...) }
// VSQRTPD_RU_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RU_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RU_SAE.Z instruction to the active function.
func (c *Context) VSQRTPD_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPD_RU_SAE_Z(z, k, z1))
}
// VSQRTPD_RU_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RU_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPD_RU_SAE_Z(z, k, z1) }
// VSQRTPD_RZ_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPD.RZ_SAE zmm k zmm
// VSQRTPD.RZ_SAE zmm zmm
//
// Construct and append a VSQRTPD.RZ_SAE instruction to the active function.
func (c *Context) VSQRTPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPD_RZ_SAE(ops...))
}
// VSQRTPD_RZ_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPD.RZ_SAE zmm k zmm
// VSQRTPD.RZ_SAE zmm zmm
//
// Construct and append a VSQRTPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPD_RZ_SAE(ops ...operand.Op) { ctx.VSQRTPD_RZ_SAE(ops...) }
// VSQRTPD_RZ_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSQRTPD_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPD_RZ_SAE_Z(z, k, z1))
}
// VSQRTPD_RZ_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RZ_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPD_RZ_SAE_Z(z, k, z1) }
// VSQRTPD_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPD.Z m128 k xmm
// VSQRTPD.Z m256 k ymm
// VSQRTPD.Z xmm k xmm
// VSQRTPD.Z ymm k ymm
// VSQRTPD.Z m512 k zmm
// VSQRTPD.Z zmm k zmm
//
// Construct and append a VSQRTPD.Z instruction to the active function.
func (c *Context) VSQRTPD_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VSQRTPD_Z(mxyz, k, xyz))
}
// VSQRTPD_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPD.Z m128 k xmm
// VSQRTPD.Z m256 k ymm
// VSQRTPD.Z xmm k xmm
// VSQRTPD.Z ymm k ymm
// VSQRTPD.Z m512 k zmm
// VSQRTPD.Z zmm k zmm
//
// Construct and append a VSQRTPD.Z instruction to the active function.
// Operates on the global context.
func VSQRTPD_Z(mxyz, k, xyz operand.Op) { ctx.VSQRTPD_Z(mxyz, k, xyz) }
// VSQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPS m128 xmm
// VSQRTPS m256 ymm
// VSQRTPS xmm xmm
// VSQRTPS ymm ymm
// VSQRTPS m128 k xmm
// VSQRTPS m256 k ymm
// VSQRTPS xmm k xmm
// VSQRTPS ymm k ymm
// VSQRTPS m512 k zmm
// VSQRTPS m512 zmm
// VSQRTPS zmm k zmm
// VSQRTPS zmm zmm
//
// Construct and append a VSQRTPS instruction to the active function.
func (c *Context) VSQRTPS(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS(ops...))
}
// VSQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPS m128 xmm
// VSQRTPS m256 ymm
// VSQRTPS xmm xmm
// VSQRTPS ymm ymm
// VSQRTPS m128 k xmm
// VSQRTPS m256 k ymm
// VSQRTPS xmm k xmm
// VSQRTPS ymm k ymm
// VSQRTPS m512 k zmm
// VSQRTPS m512 zmm
// VSQRTPS zmm k zmm
// VSQRTPS zmm zmm
//
// Construct and append a VSQRTPS instruction to the active function.
// Operates on the global context.
func VSQRTPS(ops ...operand.Op) { ctx.VSQRTPS(ops...) }
// VSQRTPS_BCST: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPS.BCST m32 k xmm
// VSQRTPS.BCST m32 k ymm
// VSQRTPS.BCST m32 xmm
// VSQRTPS.BCST m32 ymm
// VSQRTPS.BCST m32 k zmm
// VSQRTPS.BCST m32 zmm
//
// Construct and append a VSQRTPS.BCST instruction to the active function.
func (c *Context) VSQRTPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS_BCST(ops...))
}
// VSQRTPS_BCST: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPS.BCST m32 k xmm
// VSQRTPS.BCST m32 k ymm
// VSQRTPS.BCST m32 xmm
// VSQRTPS.BCST m32 ymm
// VSQRTPS.BCST m32 k zmm
// VSQRTPS.BCST m32 zmm
//
// Construct and append a VSQRTPS.BCST instruction to the active function.
// Operates on the global context.
func VSQRTPS_BCST(ops ...operand.Op) { ctx.VSQRTPS_BCST(ops...) }
// VSQRTPS_BCST_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.BCST.Z m32 k xmm
// VSQRTPS.BCST.Z m32 k ymm
// VSQRTPS.BCST.Z m32 k zmm
//
// Construct and append a VSQRTPS.BCST.Z instruction to the active function.
func (c *Context) VSQRTPS_BCST_Z(m, k, xyz operand.Op) {
c.addinstruction(x86.VSQRTPS_BCST_Z(m, k, xyz))
}
// VSQRTPS_BCST_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.BCST.Z m32 k xmm
// VSQRTPS.BCST.Z m32 k ymm
// VSQRTPS.BCST.Z m32 k zmm
//
// Construct and append a VSQRTPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_BCST_Z(m, k, xyz operand.Op) { ctx.VSQRTPS_BCST_Z(m, k, xyz) }
// VSQRTPS_RD_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPS.RD_SAE zmm k zmm
// VSQRTPS.RD_SAE zmm zmm
//
// Construct and append a VSQRTPS.RD_SAE instruction to the active function.
func (c *Context) VSQRTPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS_RD_SAE(ops...))
}
// VSQRTPS_RD_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPS.RD_SAE zmm k zmm
// VSQRTPS.RD_SAE zmm zmm
//
// Construct and append a VSQRTPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPS_RD_SAE(ops ...operand.Op) { ctx.VSQRTPS_RD_SAE(ops...) }
// VSQRTPS_RD_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RD_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RD_SAE.Z instruction to the active function.
func (c *Context) VSQRTPS_RD_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPS_RD_SAE_Z(z, k, z1))
}
// VSQRTPS_RD_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RD_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_RD_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPS_RD_SAE_Z(z, k, z1) }
// VSQRTPS_RN_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPS.RN_SAE zmm k zmm
// VSQRTPS.RN_SAE zmm zmm
//
// Construct and append a VSQRTPS.RN_SAE instruction to the active function.
func (c *Context) VSQRTPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS_RN_SAE(ops...))
}
// VSQRTPS_RN_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPS.RN_SAE zmm k zmm
// VSQRTPS.RN_SAE zmm zmm
//
// Construct and append a VSQRTPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPS_RN_SAE(ops ...operand.Op) { ctx.VSQRTPS_RN_SAE(ops...) }
// VSQRTPS_RN_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RN_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RN_SAE.Z instruction to the active function.
func (c *Context) VSQRTPS_RN_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPS_RN_SAE_Z(z, k, z1))
}
// VSQRTPS_RN_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RN_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_RN_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPS_RN_SAE_Z(z, k, z1) }
// VSQRTPS_RU_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPS.RU_SAE zmm k zmm
// VSQRTPS.RU_SAE zmm zmm
//
// Construct and append a VSQRTPS.RU_SAE instruction to the active function.
func (c *Context) VSQRTPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS_RU_SAE(ops...))
}
// VSQRTPS_RU_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPS.RU_SAE zmm k zmm
// VSQRTPS.RU_SAE zmm zmm
//
// Construct and append a VSQRTPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPS_RU_SAE(ops ...operand.Op) { ctx.VSQRTPS_RU_SAE(ops...) }
// VSQRTPS_RU_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RU_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RU_SAE.Z instruction to the active function.
func (c *Context) VSQRTPS_RU_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPS_RU_SAE_Z(z, k, z1))
}
// VSQRTPS_RU_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RU_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_RU_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPS_RU_SAE_Z(z, k, z1) }
// VSQRTPS_RZ_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPS.RZ_SAE zmm k zmm
// VSQRTPS.RZ_SAE zmm zmm
//
// Construct and append a VSQRTPS.RZ_SAE instruction to the active function.
func (c *Context) VSQRTPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTPS_RZ_SAE(ops...))
}
// VSQRTPS_RZ_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPS.RZ_SAE zmm k zmm
// VSQRTPS.RZ_SAE zmm zmm
//
// Construct and append a VSQRTPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSQRTPS_RZ_SAE(ops ...operand.Op) { ctx.VSQRTPS_RZ_SAE(ops...) }
// VSQRTPS_RZ_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSQRTPS_RZ_SAE_Z(z, k, z1 operand.Op) {
c.addinstruction(x86.VSQRTPS_RZ_SAE_Z(z, k, z1))
}
// VSQRTPS_RZ_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RZ_SAE.Z zmm k zmm
//
// Construct and append a VSQRTPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_RZ_SAE_Z(z, k, z1 operand.Op) { ctx.VSQRTPS_RZ_SAE_Z(z, k, z1) }
// VSQRTPS_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPS.Z m128 k xmm
// VSQRTPS.Z m256 k ymm
// VSQRTPS.Z xmm k xmm
// VSQRTPS.Z ymm k ymm
// VSQRTPS.Z m512 k zmm
// VSQRTPS.Z zmm k zmm
//
// Construct and append a VSQRTPS.Z instruction to the active function.
func (c *Context) VSQRTPS_Z(mxyz, k, xyz operand.Op) {
c.addinstruction(x86.VSQRTPS_Z(mxyz, k, xyz))
}
// VSQRTPS_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPS.Z m128 k xmm
// VSQRTPS.Z m256 k ymm
// VSQRTPS.Z xmm k xmm
// VSQRTPS.Z ymm k ymm
// VSQRTPS.Z m512 k zmm
// VSQRTPS.Z zmm k zmm
//
// Construct and append a VSQRTPS.Z instruction to the active function.
// Operates on the global context.
func VSQRTPS_Z(mxyz, k, xyz operand.Op) { ctx.VSQRTPS_Z(mxyz, k, xyz) }
// VSQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSD m64 xmm xmm
// VSQRTSD xmm xmm xmm
// VSQRTSD m64 xmm k xmm
// VSQRTSD xmm xmm k xmm
//
// Construct and append a VSQRTSD instruction to the active function.
func (c *Context) VSQRTSD(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSD(ops...))
}
// VSQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSD m64 xmm xmm
// VSQRTSD xmm xmm xmm
// VSQRTSD m64 xmm k xmm
// VSQRTSD xmm xmm k xmm
//
// Construct and append a VSQRTSD instruction to the active function.
// Operates on the global context.
func VSQRTSD(ops ...operand.Op) { ctx.VSQRTSD(ops...) }
// VSQRTSD_RD_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSD.RD_SAE xmm xmm k xmm
// VSQRTSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RD_SAE instruction to the active function.
func (c *Context) VSQRTSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSD_RD_SAE(ops...))
}
// VSQRTSD_RD_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSD.RD_SAE xmm xmm k xmm
// VSQRTSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSD_RD_SAE(ops ...operand.Op) { ctx.VSQRTSD_RD_SAE(ops...) }
// VSQRTSD_RD_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RD_SAE.Z instruction to the active function.
func (c *Context) VSQRTSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSD_RD_SAE_Z(x, x1, k, x2))
}
// VSQRTSD_RD_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSD_RD_SAE_Z(x, x1, k, x2) }
// VSQRTSD_RN_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSD.RN_SAE xmm xmm k xmm
// VSQRTSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RN_SAE instruction to the active function.
func (c *Context) VSQRTSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSD_RN_SAE(ops...))
}
// VSQRTSD_RN_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSD.RN_SAE xmm xmm k xmm
// VSQRTSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSD_RN_SAE(ops ...operand.Op) { ctx.VSQRTSD_RN_SAE(ops...) }
// VSQRTSD_RN_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RN_SAE.Z instruction to the active function.
func (c *Context) VSQRTSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSD_RN_SAE_Z(x, x1, k, x2))
}
// VSQRTSD_RN_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSD_RN_SAE_Z(x, x1, k, x2) }
// VSQRTSD_RU_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSD.RU_SAE xmm xmm k xmm
// VSQRTSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RU_SAE instruction to the active function.
func (c *Context) VSQRTSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSD_RU_SAE(ops...))
}
// VSQRTSD_RU_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSD.RU_SAE xmm xmm k xmm
// VSQRTSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSD_RU_SAE(ops ...operand.Op) { ctx.VSQRTSD_RU_SAE(ops...) }
// VSQRTSD_RU_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RU_SAE.Z instruction to the active function.
func (c *Context) VSQRTSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSD_RU_SAE_Z(x, x1, k, x2))
}
// VSQRTSD_RU_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSD_RU_SAE_Z(x, x1, k, x2) }
// VSQRTSD_RZ_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSD.RZ_SAE xmm xmm k xmm
// VSQRTSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RZ_SAE instruction to the active function.
func (c *Context) VSQRTSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSD_RZ_SAE(ops...))
}
// VSQRTSD_RZ_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSD.RZ_SAE xmm xmm k xmm
// VSQRTSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSQRTSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSD_RZ_SAE(ops ...operand.Op) { ctx.VSQRTSD_RZ_SAE(ops...) }
// VSQRTSD_RZ_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSQRTSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSD_RZ_SAE_Z(x, x1, k, x2))
}
// VSQRTSD_RZ_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSD_RZ_SAE_Z(x, x1, k, x2) }
// VSQRTSD_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSD.Z m64 xmm k xmm
// VSQRTSD.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.Z instruction to the active function.
func (c *Context) VSQRTSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSQRTSD_Z(mx, x, k, x1))
}
// VSQRTSD_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSD.Z m64 xmm k xmm
// VSQRTSD.Z xmm xmm k xmm
//
// Construct and append a VSQRTSD.Z instruction to the active function.
// Operates on the global context.
func VSQRTSD_Z(mx, x, k, x1 operand.Op) { ctx.VSQRTSD_Z(mx, x, k, x1) }
// VSQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSS m32 xmm xmm
// VSQRTSS xmm xmm xmm
// VSQRTSS m32 xmm k xmm
// VSQRTSS xmm xmm k xmm
//
// Construct and append a VSQRTSS instruction to the active function.
func (c *Context) VSQRTSS(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSS(ops...))
}
// VSQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSS m32 xmm xmm
// VSQRTSS xmm xmm xmm
// VSQRTSS m32 xmm k xmm
// VSQRTSS xmm xmm k xmm
//
// Construct and append a VSQRTSS instruction to the active function.
// Operates on the global context.
func VSQRTSS(ops ...operand.Op) { ctx.VSQRTSS(ops...) }
// VSQRTSS_RD_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSS.RD_SAE xmm xmm k xmm
// VSQRTSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RD_SAE instruction to the active function.
func (c *Context) VSQRTSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSS_RD_SAE(ops...))
}
// VSQRTSS_RD_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSS.RD_SAE xmm xmm k xmm
// VSQRTSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSS_RD_SAE(ops ...operand.Op) { ctx.VSQRTSS_RD_SAE(ops...) }
// VSQRTSS_RD_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RD_SAE.Z instruction to the active function.
func (c *Context) VSQRTSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSS_RD_SAE_Z(x, x1, k, x2))
}
// VSQRTSS_RD_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSS_RD_SAE_Z(x, x1, k, x2) }
// VSQRTSS_RN_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSS.RN_SAE xmm xmm k xmm
// VSQRTSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RN_SAE instruction to the active function.
func (c *Context) VSQRTSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSS_RN_SAE(ops...))
}
// VSQRTSS_RN_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSS.RN_SAE xmm xmm k xmm
// VSQRTSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSS_RN_SAE(ops ...operand.Op) { ctx.VSQRTSS_RN_SAE(ops...) }
// VSQRTSS_RN_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RN_SAE.Z instruction to the active function.
func (c *Context) VSQRTSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSS_RN_SAE_Z(x, x1, k, x2))
}
// VSQRTSS_RN_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSS_RN_SAE_Z(x, x1, k, x2) }
// VSQRTSS_RU_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSS.RU_SAE xmm xmm k xmm
// VSQRTSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RU_SAE instruction to the active function.
func (c *Context) VSQRTSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSS_RU_SAE(ops...))
}
// VSQRTSS_RU_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSS.RU_SAE xmm xmm k xmm
// VSQRTSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSS_RU_SAE(ops ...operand.Op) { ctx.VSQRTSS_RU_SAE(ops...) }
// VSQRTSS_RU_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RU_SAE.Z instruction to the active function.
func (c *Context) VSQRTSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSS_RU_SAE_Z(x, x1, k, x2))
}
// VSQRTSS_RU_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSS_RU_SAE_Z(x, x1, k, x2) }
// VSQRTSS_RZ_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSS.RZ_SAE xmm xmm k xmm
// VSQRTSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RZ_SAE instruction to the active function.
func (c *Context) VSQRTSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSQRTSS_RZ_SAE(ops...))
}
// VSQRTSS_RZ_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSS.RZ_SAE xmm xmm k xmm
// VSQRTSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSQRTSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSQRTSS_RZ_SAE(ops ...operand.Op) { ctx.VSQRTSS_RZ_SAE(ops...) }
// VSQRTSS_RZ_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSQRTSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSQRTSS_RZ_SAE_Z(x, x1, k, x2))
}
// VSQRTSS_RZ_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSQRTSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSQRTSS_RZ_SAE_Z(x, x1, k, x2) }
// VSQRTSS_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSS.Z m32 xmm k xmm
// VSQRTSS.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.Z instruction to the active function.
func (c *Context) VSQRTSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSQRTSS_Z(mx, x, k, x1))
}
// VSQRTSS_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSS.Z m32 xmm k xmm
// VSQRTSS.Z xmm xmm k xmm
//
// Construct and append a VSQRTSS.Z instruction to the active function.
// Operates on the global context.
func VSQRTSS_Z(mx, x, k, x1 operand.Op) { ctx.VSQRTSS_Z(mx, x, k, x1) }
// VSTMXCSR: Store MXCSR Register State.
//
// Forms:
//
// VSTMXCSR m32
//
// Construct and append a VSTMXCSR instruction to the active function.
func (c *Context) VSTMXCSR(m operand.Op) {
c.addinstruction(x86.VSTMXCSR(m))
}
// VSTMXCSR: Store MXCSR Register State.
//
// Forms:
//
// VSTMXCSR m32
//
// Construct and append a VSTMXCSR instruction to the active function.
// Operates on the global context.
func VSTMXCSR(m operand.Op) { ctx.VSTMXCSR(m) }
// VSUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPD m128 xmm xmm
// VSUBPD m256 ymm ymm
// VSUBPD xmm xmm xmm
// VSUBPD ymm ymm ymm
// VSUBPD m128 xmm k xmm
// VSUBPD m256 ymm k ymm
// VSUBPD xmm xmm k xmm
// VSUBPD ymm ymm k ymm
// VSUBPD m512 zmm k zmm
// VSUBPD m512 zmm zmm
// VSUBPD zmm zmm k zmm
// VSUBPD zmm zmm zmm
//
// Construct and append a VSUBPD instruction to the active function.
func (c *Context) VSUBPD(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD(ops...))
}
// VSUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPD m128 xmm xmm
// VSUBPD m256 ymm ymm
// VSUBPD xmm xmm xmm
// VSUBPD ymm ymm ymm
// VSUBPD m128 xmm k xmm
// VSUBPD m256 ymm k ymm
// VSUBPD xmm xmm k xmm
// VSUBPD ymm ymm k ymm
// VSUBPD m512 zmm k zmm
// VSUBPD m512 zmm zmm
// VSUBPD zmm zmm k zmm
// VSUBPD zmm zmm zmm
//
// Construct and append a VSUBPD instruction to the active function.
// Operates on the global context.
func VSUBPD(ops ...operand.Op) { ctx.VSUBPD(ops...) }
// VSUBPD_BCST: Subtract Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPD.BCST m64 xmm k xmm
// VSUBPD.BCST m64 xmm xmm
// VSUBPD.BCST m64 ymm k ymm
// VSUBPD.BCST m64 ymm ymm
// VSUBPD.BCST m64 zmm k zmm
// VSUBPD.BCST m64 zmm zmm
//
// Construct and append a VSUBPD.BCST instruction to the active function.
func (c *Context) VSUBPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD_BCST(ops...))
}
// VSUBPD_BCST: Subtract Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPD.BCST m64 xmm k xmm
// VSUBPD.BCST m64 xmm xmm
// VSUBPD.BCST m64 ymm k ymm
// VSUBPD.BCST m64 ymm ymm
// VSUBPD.BCST m64 zmm k zmm
// VSUBPD.BCST m64 zmm zmm
//
// Construct and append a VSUBPD.BCST instruction to the active function.
// Operates on the global context.
func VSUBPD_BCST(ops ...operand.Op) { ctx.VSUBPD_BCST(ops...) }
// VSUBPD_BCST_Z: Subtract Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPD.BCST.Z m64 xmm k xmm
// VSUBPD.BCST.Z m64 ymm k ymm
// VSUBPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VSUBPD.BCST.Z instruction to the active function.
func (c *Context) VSUBPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSUBPD_BCST_Z(m, xyz, k, xyz1))
}
// VSUBPD_BCST_Z: Subtract Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPD.BCST.Z m64 xmm k xmm
// VSUBPD.BCST.Z m64 ymm k ymm
// VSUBPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VSUBPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VSUBPD_BCST_Z(m, xyz, k, xyz1) }
// VSUBPD_RD_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPD.RD_SAE zmm zmm k zmm
// VSUBPD.RD_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RD_SAE instruction to the active function.
func (c *Context) VSUBPD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD_RD_SAE(ops...))
}
// VSUBPD_RD_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPD.RD_SAE zmm zmm k zmm
// VSUBPD.RD_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSUBPD_RD_SAE(ops ...operand.Op) { ctx.VSUBPD_RD_SAE(ops...) }
// VSUBPD_RD_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RD_SAE.Z instruction to the active function.
func (c *Context) VSUBPD_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPD_RD_SAE_Z(z, z1, k, z2))
}
// VSUBPD_RD_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPD_RD_SAE_Z(z, z1, k, z2) }
// VSUBPD_RN_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPD.RN_SAE zmm zmm k zmm
// VSUBPD.RN_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RN_SAE instruction to the active function.
func (c *Context) VSUBPD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD_RN_SAE(ops...))
}
// VSUBPD_RN_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPD.RN_SAE zmm zmm k zmm
// VSUBPD.RN_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSUBPD_RN_SAE(ops ...operand.Op) { ctx.VSUBPD_RN_SAE(ops...) }
// VSUBPD_RN_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RN_SAE.Z instruction to the active function.
func (c *Context) VSUBPD_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPD_RN_SAE_Z(z, z1, k, z2))
}
// VSUBPD_RN_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPD_RN_SAE_Z(z, z1, k, z2) }
// VSUBPD_RU_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPD.RU_SAE zmm zmm k zmm
// VSUBPD.RU_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RU_SAE instruction to the active function.
func (c *Context) VSUBPD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD_RU_SAE(ops...))
}
// VSUBPD_RU_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPD.RU_SAE zmm zmm k zmm
// VSUBPD.RU_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSUBPD_RU_SAE(ops ...operand.Op) { ctx.VSUBPD_RU_SAE(ops...) }
// VSUBPD_RU_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RU_SAE.Z instruction to the active function.
func (c *Context) VSUBPD_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPD_RU_SAE_Z(z, z1, k, z2))
}
// VSUBPD_RU_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPD_RU_SAE_Z(z, z1, k, z2) }
// VSUBPD_RZ_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPD.RZ_SAE zmm zmm k zmm
// VSUBPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RZ_SAE instruction to the active function.
func (c *Context) VSUBPD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPD_RZ_SAE(ops...))
}
// VSUBPD_RZ_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPD.RZ_SAE zmm zmm k zmm
// VSUBPD.RZ_SAE zmm zmm zmm
//
// Construct and append a VSUBPD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSUBPD_RZ_SAE(ops ...operand.Op) { ctx.VSUBPD_RZ_SAE(ops...) }
// VSUBPD_RZ_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSUBPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPD_RZ_SAE_Z(z, z1, k, z2))
}
// VSUBPD_RZ_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPD_RZ_SAE_Z(z, z1, k, z2) }
// VSUBPD_Z: Subtract Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPD.Z m128 xmm k xmm
// VSUBPD.Z m256 ymm k ymm
// VSUBPD.Z xmm xmm k xmm
// VSUBPD.Z ymm ymm k ymm
// VSUBPD.Z m512 zmm k zmm
// VSUBPD.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.Z instruction to the active function.
func (c *Context) VSUBPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSUBPD_Z(mxyz, xyz, k, xyz1))
}
// VSUBPD_Z: Subtract Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPD.Z m128 xmm k xmm
// VSUBPD.Z m256 ymm k ymm
// VSUBPD.Z xmm xmm k xmm
// VSUBPD.Z ymm ymm k ymm
// VSUBPD.Z m512 zmm k zmm
// VSUBPD.Z zmm zmm k zmm
//
// Construct and append a VSUBPD.Z instruction to the active function.
// Operates on the global context.
func VSUBPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VSUBPD_Z(mxyz, xyz, k, xyz1) }
// VSUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPS m128 xmm xmm
// VSUBPS m256 ymm ymm
// VSUBPS xmm xmm xmm
// VSUBPS ymm ymm ymm
// VSUBPS m128 xmm k xmm
// VSUBPS m256 ymm k ymm
// VSUBPS xmm xmm k xmm
// VSUBPS ymm ymm k ymm
// VSUBPS m512 zmm k zmm
// VSUBPS m512 zmm zmm
// VSUBPS zmm zmm k zmm
// VSUBPS zmm zmm zmm
//
// Construct and append a VSUBPS instruction to the active function.
func (c *Context) VSUBPS(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS(ops...))
}
// VSUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPS m128 xmm xmm
// VSUBPS m256 ymm ymm
// VSUBPS xmm xmm xmm
// VSUBPS ymm ymm ymm
// VSUBPS m128 xmm k xmm
// VSUBPS m256 ymm k ymm
// VSUBPS xmm xmm k xmm
// VSUBPS ymm ymm k ymm
// VSUBPS m512 zmm k zmm
// VSUBPS m512 zmm zmm
// VSUBPS zmm zmm k zmm
// VSUBPS zmm zmm zmm
//
// Construct and append a VSUBPS instruction to the active function.
// Operates on the global context.
func VSUBPS(ops ...operand.Op) { ctx.VSUBPS(ops...) }
// VSUBPS_BCST: Subtract Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPS.BCST m32 xmm k xmm
// VSUBPS.BCST m32 xmm xmm
// VSUBPS.BCST m32 ymm k ymm
// VSUBPS.BCST m32 ymm ymm
// VSUBPS.BCST m32 zmm k zmm
// VSUBPS.BCST m32 zmm zmm
//
// Construct and append a VSUBPS.BCST instruction to the active function.
func (c *Context) VSUBPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS_BCST(ops...))
}
// VSUBPS_BCST: Subtract Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPS.BCST m32 xmm k xmm
// VSUBPS.BCST m32 xmm xmm
// VSUBPS.BCST m32 ymm k ymm
// VSUBPS.BCST m32 ymm ymm
// VSUBPS.BCST m32 zmm k zmm
// VSUBPS.BCST m32 zmm zmm
//
// Construct and append a VSUBPS.BCST instruction to the active function.
// Operates on the global context.
func VSUBPS_BCST(ops ...operand.Op) { ctx.VSUBPS_BCST(ops...) }
// VSUBPS_BCST_Z: Subtract Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPS.BCST.Z m32 xmm k xmm
// VSUBPS.BCST.Z m32 ymm k ymm
// VSUBPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VSUBPS.BCST.Z instruction to the active function.
func (c *Context) VSUBPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSUBPS_BCST_Z(m, xyz, k, xyz1))
}
// VSUBPS_BCST_Z: Subtract Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPS.BCST.Z m32 xmm k xmm
// VSUBPS.BCST.Z m32 ymm k ymm
// VSUBPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VSUBPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VSUBPS_BCST_Z(m, xyz, k, xyz1) }
// VSUBPS_RD_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPS.RD_SAE zmm zmm k zmm
// VSUBPS.RD_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RD_SAE instruction to the active function.
func (c *Context) VSUBPS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS_RD_SAE(ops...))
}
// VSUBPS_RD_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPS.RD_SAE zmm zmm k zmm
// VSUBPS.RD_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSUBPS_RD_SAE(ops ...operand.Op) { ctx.VSUBPS_RD_SAE(ops...) }
// VSUBPS_RD_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RD_SAE.Z instruction to the active function.
func (c *Context) VSUBPS_RD_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPS_RD_SAE_Z(z, z1, k, z2))
}
// VSUBPS_RD_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RD_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_RD_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPS_RD_SAE_Z(z, z1, k, z2) }
// VSUBPS_RN_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPS.RN_SAE zmm zmm k zmm
// VSUBPS.RN_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RN_SAE instruction to the active function.
func (c *Context) VSUBPS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS_RN_SAE(ops...))
}
// VSUBPS_RN_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPS.RN_SAE zmm zmm k zmm
// VSUBPS.RN_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSUBPS_RN_SAE(ops ...operand.Op) { ctx.VSUBPS_RN_SAE(ops...) }
// VSUBPS_RN_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RN_SAE.Z instruction to the active function.
func (c *Context) VSUBPS_RN_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPS_RN_SAE_Z(z, z1, k, z2))
}
// VSUBPS_RN_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RN_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_RN_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPS_RN_SAE_Z(z, z1, k, z2) }
// VSUBPS_RU_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPS.RU_SAE zmm zmm k zmm
// VSUBPS.RU_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RU_SAE instruction to the active function.
func (c *Context) VSUBPS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS_RU_SAE(ops...))
}
// VSUBPS_RU_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPS.RU_SAE zmm zmm k zmm
// VSUBPS.RU_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSUBPS_RU_SAE(ops ...operand.Op) { ctx.VSUBPS_RU_SAE(ops...) }
// VSUBPS_RU_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RU_SAE.Z instruction to the active function.
func (c *Context) VSUBPS_RU_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPS_RU_SAE_Z(z, z1, k, z2))
}
// VSUBPS_RU_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RU_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_RU_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPS_RU_SAE_Z(z, z1, k, z2) }
// VSUBPS_RZ_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPS.RZ_SAE zmm zmm k zmm
// VSUBPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RZ_SAE instruction to the active function.
func (c *Context) VSUBPS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBPS_RZ_SAE(ops...))
}
// VSUBPS_RZ_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPS.RZ_SAE zmm zmm k zmm
// VSUBPS.RZ_SAE zmm zmm zmm
//
// Construct and append a VSUBPS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSUBPS_RZ_SAE(ops ...operand.Op) { ctx.VSUBPS_RZ_SAE(ops...) }
// VSUBPS_RZ_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSUBPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) {
c.addinstruction(x86.VSUBPS_RZ_SAE_Z(z, z1, k, z2))
}
// VSUBPS_RZ_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RZ_SAE.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) { ctx.VSUBPS_RZ_SAE_Z(z, z1, k, z2) }
// VSUBPS_Z: Subtract Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPS.Z m128 xmm k xmm
// VSUBPS.Z m256 ymm k ymm
// VSUBPS.Z xmm xmm k xmm
// VSUBPS.Z ymm ymm k ymm
// VSUBPS.Z m512 zmm k zmm
// VSUBPS.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.Z instruction to the active function.
func (c *Context) VSUBPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VSUBPS_Z(mxyz, xyz, k, xyz1))
}
// VSUBPS_Z: Subtract Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPS.Z m128 xmm k xmm
// VSUBPS.Z m256 ymm k ymm
// VSUBPS.Z xmm xmm k xmm
// VSUBPS.Z ymm ymm k ymm
// VSUBPS.Z m512 zmm k zmm
// VSUBPS.Z zmm zmm k zmm
//
// Construct and append a VSUBPS.Z instruction to the active function.
// Operates on the global context.
func VSUBPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VSUBPS_Z(mxyz, xyz, k, xyz1) }
// VSUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSD m64 xmm xmm
// VSUBSD xmm xmm xmm
// VSUBSD m64 xmm k xmm
// VSUBSD xmm xmm k xmm
//
// Construct and append a VSUBSD instruction to the active function.
func (c *Context) VSUBSD(ops ...operand.Op) {
c.addinstruction(x86.VSUBSD(ops...))
}
// VSUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSD m64 xmm xmm
// VSUBSD xmm xmm xmm
// VSUBSD m64 xmm k xmm
// VSUBSD xmm xmm k xmm
//
// Construct and append a VSUBSD instruction to the active function.
// Operates on the global context.
func VSUBSD(ops ...operand.Op) { ctx.VSUBSD(ops...) }
// VSUBSD_RD_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSD.RD_SAE xmm xmm k xmm
// VSUBSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RD_SAE instruction to the active function.
func (c *Context) VSUBSD_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSD_RD_SAE(ops...))
}
// VSUBSD_RD_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSD.RD_SAE xmm xmm k xmm
// VSUBSD.RD_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RD_SAE instruction to the active function.
// Operates on the global context.
func VSUBSD_RD_SAE(ops ...operand.Op) { ctx.VSUBSD_RD_SAE(ops...) }
// VSUBSD_RD_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RD_SAE.Z instruction to the active function.
func (c *Context) VSUBSD_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSD_RD_SAE_Z(x, x1, k, x2))
}
// VSUBSD_RD_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSD_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSD_RD_SAE_Z(x, x1, k, x2) }
// VSUBSD_RN_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSD.RN_SAE xmm xmm k xmm
// VSUBSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RN_SAE instruction to the active function.
func (c *Context) VSUBSD_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSD_RN_SAE(ops...))
}
// VSUBSD_RN_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSD.RN_SAE xmm xmm k xmm
// VSUBSD.RN_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RN_SAE instruction to the active function.
// Operates on the global context.
func VSUBSD_RN_SAE(ops ...operand.Op) { ctx.VSUBSD_RN_SAE(ops...) }
// VSUBSD_RN_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RN_SAE.Z instruction to the active function.
func (c *Context) VSUBSD_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSD_RN_SAE_Z(x, x1, k, x2))
}
// VSUBSD_RN_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSD_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSD_RN_SAE_Z(x, x1, k, x2) }
// VSUBSD_RU_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSD.RU_SAE xmm xmm k xmm
// VSUBSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RU_SAE instruction to the active function.
func (c *Context) VSUBSD_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSD_RU_SAE(ops...))
}
// VSUBSD_RU_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSD.RU_SAE xmm xmm k xmm
// VSUBSD.RU_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RU_SAE instruction to the active function.
// Operates on the global context.
func VSUBSD_RU_SAE(ops ...operand.Op) { ctx.VSUBSD_RU_SAE(ops...) }
// VSUBSD_RU_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RU_SAE.Z instruction to the active function.
func (c *Context) VSUBSD_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSD_RU_SAE_Z(x, x1, k, x2))
}
// VSUBSD_RU_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSD_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSD_RU_SAE_Z(x, x1, k, x2) }
// VSUBSD_RZ_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSD.RZ_SAE xmm xmm k xmm
// VSUBSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RZ_SAE instruction to the active function.
func (c *Context) VSUBSD_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSD_RZ_SAE(ops...))
}
// VSUBSD_RZ_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSD.RZ_SAE xmm xmm k xmm
// VSUBSD.RZ_SAE xmm xmm xmm
//
// Construct and append a VSUBSD.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSUBSD_RZ_SAE(ops ...operand.Op) { ctx.VSUBSD_RZ_SAE(ops...) }
// VSUBSD_RZ_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RZ_SAE.Z instruction to the active function.
func (c *Context) VSUBSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSD_RZ_SAE_Z(x, x1, k, x2))
}
// VSUBSD_RZ_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSD_RZ_SAE_Z(x, x1, k, x2) }
// VSUBSD_Z: Subtract Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSD.Z m64 xmm k xmm
// VSUBSD.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.Z instruction to the active function.
func (c *Context) VSUBSD_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSUBSD_Z(mx, x, k, x1))
}
// VSUBSD_Z: Subtract Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSD.Z m64 xmm k xmm
// VSUBSD.Z xmm xmm k xmm
//
// Construct and append a VSUBSD.Z instruction to the active function.
// Operates on the global context.
func VSUBSD_Z(mx, x, k, x1 operand.Op) { ctx.VSUBSD_Z(mx, x, k, x1) }
// VSUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSS m32 xmm xmm
// VSUBSS xmm xmm xmm
// VSUBSS m32 xmm k xmm
// VSUBSS xmm xmm k xmm
//
// Construct and append a VSUBSS instruction to the active function.
func (c *Context) VSUBSS(ops ...operand.Op) {
c.addinstruction(x86.VSUBSS(ops...))
}
// VSUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSS m32 xmm xmm
// VSUBSS xmm xmm xmm
// VSUBSS m32 xmm k xmm
// VSUBSS xmm xmm k xmm
//
// Construct and append a VSUBSS instruction to the active function.
// Operates on the global context.
func VSUBSS(ops ...operand.Op) { ctx.VSUBSS(ops...) }
// VSUBSS_RD_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSS.RD_SAE xmm xmm k xmm
// VSUBSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RD_SAE instruction to the active function.
func (c *Context) VSUBSS_RD_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSS_RD_SAE(ops...))
}
// VSUBSS_RD_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSS.RD_SAE xmm xmm k xmm
// VSUBSS.RD_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RD_SAE instruction to the active function.
// Operates on the global context.
func VSUBSS_RD_SAE(ops ...operand.Op) { ctx.VSUBSS_RD_SAE(ops...) }
// VSUBSS_RD_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RD_SAE.Z instruction to the active function.
func (c *Context) VSUBSS_RD_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSS_RD_SAE_Z(x, x1, k, x2))
}
// VSUBSS_RD_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RD_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RD_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSS_RD_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSS_RD_SAE_Z(x, x1, k, x2) }
// VSUBSS_RN_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSS.RN_SAE xmm xmm k xmm
// VSUBSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RN_SAE instruction to the active function.
func (c *Context) VSUBSS_RN_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSS_RN_SAE(ops...))
}
// VSUBSS_RN_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSS.RN_SAE xmm xmm k xmm
// VSUBSS.RN_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RN_SAE instruction to the active function.
// Operates on the global context.
func VSUBSS_RN_SAE(ops ...operand.Op) { ctx.VSUBSS_RN_SAE(ops...) }
// VSUBSS_RN_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RN_SAE.Z instruction to the active function.
func (c *Context) VSUBSS_RN_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSS_RN_SAE_Z(x, x1, k, x2))
}
// VSUBSS_RN_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RN_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RN_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSS_RN_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSS_RN_SAE_Z(x, x1, k, x2) }
// VSUBSS_RU_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSS.RU_SAE xmm xmm k xmm
// VSUBSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RU_SAE instruction to the active function.
func (c *Context) VSUBSS_RU_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSS_RU_SAE(ops...))
}
// VSUBSS_RU_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSS.RU_SAE xmm xmm k xmm
// VSUBSS.RU_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RU_SAE instruction to the active function.
// Operates on the global context.
func VSUBSS_RU_SAE(ops ...operand.Op) { ctx.VSUBSS_RU_SAE(ops...) }
// VSUBSS_RU_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RU_SAE.Z instruction to the active function.
func (c *Context) VSUBSS_RU_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSS_RU_SAE_Z(x, x1, k, x2))
}
// VSUBSS_RU_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RU_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RU_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSS_RU_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSS_RU_SAE_Z(x, x1, k, x2) }
// VSUBSS_RZ_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSS.RZ_SAE xmm xmm k xmm
// VSUBSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RZ_SAE instruction to the active function.
func (c *Context) VSUBSS_RZ_SAE(ops ...operand.Op) {
c.addinstruction(x86.VSUBSS_RZ_SAE(ops...))
}
// VSUBSS_RZ_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSS.RZ_SAE xmm xmm k xmm
// VSUBSS.RZ_SAE xmm xmm xmm
//
// Construct and append a VSUBSS.RZ_SAE instruction to the active function.
// Operates on the global context.
func VSUBSS_RZ_SAE(ops ...operand.Op) { ctx.VSUBSS_RZ_SAE(ops...) }
// VSUBSS_RZ_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RZ_SAE.Z instruction to the active function.
func (c *Context) VSUBSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) {
c.addinstruction(x86.VSUBSS_RZ_SAE_Z(x, x1, k, x2))
}
// VSUBSS_RZ_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RZ_SAE.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.RZ_SAE.Z instruction to the active function.
// Operates on the global context.
func VSUBSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) { ctx.VSUBSS_RZ_SAE_Z(x, x1, k, x2) }
// VSUBSS_Z: Subtract Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSS.Z m32 xmm k xmm
// VSUBSS.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.Z instruction to the active function.
func (c *Context) VSUBSS_Z(mx, x, k, x1 operand.Op) {
c.addinstruction(x86.VSUBSS_Z(mx, x, k, x1))
}
// VSUBSS_Z: Subtract Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSS.Z m32 xmm k xmm
// VSUBSS.Z xmm xmm k xmm
//
// Construct and append a VSUBSS.Z instruction to the active function.
// Operates on the global context.
func VSUBSS_Z(mx, x, k, x1 operand.Op) { ctx.VSUBSS_Z(mx, x, k, x1) }
// VTESTPD: Packed Double-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPD m128 xmm
// VTESTPD m256 ymm
// VTESTPD xmm xmm
// VTESTPD ymm ymm
//
// Construct and append a VTESTPD instruction to the active function.
func (c *Context) VTESTPD(mxy, xy operand.Op) {
c.addinstruction(x86.VTESTPD(mxy, xy))
}
// VTESTPD: Packed Double-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPD m128 xmm
// VTESTPD m256 ymm
// VTESTPD xmm xmm
// VTESTPD ymm ymm
//
// Construct and append a VTESTPD instruction to the active function.
// Operates on the global context.
func VTESTPD(mxy, xy operand.Op) { ctx.VTESTPD(mxy, xy) }
// VTESTPS: Packed Single-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPS m128 xmm
// VTESTPS m256 ymm
// VTESTPS xmm xmm
// VTESTPS ymm ymm
//
// Construct and append a VTESTPS instruction to the active function.
func (c *Context) VTESTPS(mxy, xy operand.Op) {
c.addinstruction(x86.VTESTPS(mxy, xy))
}
// VTESTPS: Packed Single-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPS m128 xmm
// VTESTPS m256 ymm
// VTESTPS xmm xmm
// VTESTPS ymm ymm
//
// Construct and append a VTESTPS instruction to the active function.
// Operates on the global context.
func VTESTPS(mxy, xy operand.Op) { ctx.VTESTPS(mxy, xy) }
// VUCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISD m64 xmm
// VUCOMISD xmm xmm
//
// Construct and append a VUCOMISD instruction to the active function.
func (c *Context) VUCOMISD(mx, x operand.Op) {
c.addinstruction(x86.VUCOMISD(mx, x))
}
// VUCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISD m64 xmm
// VUCOMISD xmm xmm
//
// Construct and append a VUCOMISD instruction to the active function.
// Operates on the global context.
func VUCOMISD(mx, x operand.Op) { ctx.VUCOMISD(mx, x) }
// VUCOMISD_SAE: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISD.SAE xmm xmm
//
// Construct and append a VUCOMISD.SAE instruction to the active function.
func (c *Context) VUCOMISD_SAE(x, x1 operand.Op) {
c.addinstruction(x86.VUCOMISD_SAE(x, x1))
}
// VUCOMISD_SAE: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISD.SAE xmm xmm
//
// Construct and append a VUCOMISD.SAE instruction to the active function.
// Operates on the global context.
func VUCOMISD_SAE(x, x1 operand.Op) { ctx.VUCOMISD_SAE(x, x1) }
// VUCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISS m32 xmm
// VUCOMISS xmm xmm
//
// Construct and append a VUCOMISS instruction to the active function.
func (c *Context) VUCOMISS(mx, x operand.Op) {
c.addinstruction(x86.VUCOMISS(mx, x))
}
// VUCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISS m32 xmm
// VUCOMISS xmm xmm
//
// Construct and append a VUCOMISS instruction to the active function.
// Operates on the global context.
func VUCOMISS(mx, x operand.Op) { ctx.VUCOMISS(mx, x) }
// VUCOMISS_SAE: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISS.SAE xmm xmm
//
// Construct and append a VUCOMISS.SAE instruction to the active function.
func (c *Context) VUCOMISS_SAE(x, x1 operand.Op) {
c.addinstruction(x86.VUCOMISS_SAE(x, x1))
}
// VUCOMISS_SAE: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISS.SAE xmm xmm
//
// Construct and append a VUCOMISS.SAE instruction to the active function.
// Operates on the global context.
func VUCOMISS_SAE(x, x1 operand.Op) { ctx.VUCOMISS_SAE(x, x1) }
// VUNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPD m128 xmm xmm
// VUNPCKHPD m256 ymm ymm
// VUNPCKHPD xmm xmm xmm
// VUNPCKHPD ymm ymm ymm
// VUNPCKHPD m128 xmm k xmm
// VUNPCKHPD m256 ymm k ymm
// VUNPCKHPD xmm xmm k xmm
// VUNPCKHPD ymm ymm k ymm
// VUNPCKHPD m512 zmm k zmm
// VUNPCKHPD m512 zmm zmm
// VUNPCKHPD zmm zmm k zmm
// VUNPCKHPD zmm zmm zmm
//
// Construct and append a VUNPCKHPD instruction to the active function.
func (c *Context) VUNPCKHPD(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKHPD(ops...))
}
// VUNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPD m128 xmm xmm
// VUNPCKHPD m256 ymm ymm
// VUNPCKHPD xmm xmm xmm
// VUNPCKHPD ymm ymm ymm
// VUNPCKHPD m128 xmm k xmm
// VUNPCKHPD m256 ymm k ymm
// VUNPCKHPD xmm xmm k xmm
// VUNPCKHPD ymm ymm k ymm
// VUNPCKHPD m512 zmm k zmm
// VUNPCKHPD m512 zmm zmm
// VUNPCKHPD zmm zmm k zmm
// VUNPCKHPD zmm zmm zmm
//
// Construct and append a VUNPCKHPD instruction to the active function.
// Operates on the global context.
func VUNPCKHPD(ops ...operand.Op) { ctx.VUNPCKHPD(ops...) }
// VUNPCKHPD_BCST: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPD.BCST m64 xmm k xmm
// VUNPCKHPD.BCST m64 xmm xmm
// VUNPCKHPD.BCST m64 ymm k ymm
// VUNPCKHPD.BCST m64 ymm ymm
// VUNPCKHPD.BCST m64 zmm k zmm
// VUNPCKHPD.BCST m64 zmm zmm
//
// Construct and append a VUNPCKHPD.BCST instruction to the active function.
func (c *Context) VUNPCKHPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKHPD_BCST(ops...))
}
// VUNPCKHPD_BCST: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPD.BCST m64 xmm k xmm
// VUNPCKHPD.BCST m64 xmm xmm
// VUNPCKHPD.BCST m64 ymm k ymm
// VUNPCKHPD.BCST m64 ymm ymm
// VUNPCKHPD.BCST m64 zmm k zmm
// VUNPCKHPD.BCST m64 zmm zmm
//
// Construct and append a VUNPCKHPD.BCST instruction to the active function.
// Operates on the global context.
func VUNPCKHPD_BCST(ops ...operand.Op) { ctx.VUNPCKHPD_BCST(ops...) }
// VUNPCKHPD_BCST_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.BCST.Z m64 xmm k xmm
// VUNPCKHPD.BCST.Z m64 ymm k ymm
// VUNPCKHPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VUNPCKHPD.BCST.Z instruction to the active function.
func (c *Context) VUNPCKHPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKHPD_BCST_Z(m, xyz, k, xyz1))
}
// VUNPCKHPD_BCST_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.BCST.Z m64 xmm k xmm
// VUNPCKHPD.BCST.Z m64 ymm k ymm
// VUNPCKHPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VUNPCKHPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VUNPCKHPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VUNPCKHPD_BCST_Z(m, xyz, k, xyz1) }
// VUNPCKHPD_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.Z m128 xmm k xmm
// VUNPCKHPD.Z m256 ymm k ymm
// VUNPCKHPD.Z xmm xmm k xmm
// VUNPCKHPD.Z ymm ymm k ymm
// VUNPCKHPD.Z m512 zmm k zmm
// VUNPCKHPD.Z zmm zmm k zmm
//
// Construct and append a VUNPCKHPD.Z instruction to the active function.
func (c *Context) VUNPCKHPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKHPD_Z(mxyz, xyz, k, xyz1))
}
// VUNPCKHPD_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.Z m128 xmm k xmm
// VUNPCKHPD.Z m256 ymm k ymm
// VUNPCKHPD.Z xmm xmm k xmm
// VUNPCKHPD.Z ymm ymm k ymm
// VUNPCKHPD.Z m512 zmm k zmm
// VUNPCKHPD.Z zmm zmm k zmm
//
// Construct and append a VUNPCKHPD.Z instruction to the active function.
// Operates on the global context.
func VUNPCKHPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VUNPCKHPD_Z(mxyz, xyz, k, xyz1) }
// VUNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPS m128 xmm xmm
// VUNPCKHPS m256 ymm ymm
// VUNPCKHPS xmm xmm xmm
// VUNPCKHPS ymm ymm ymm
// VUNPCKHPS m128 xmm k xmm
// VUNPCKHPS m256 ymm k ymm
// VUNPCKHPS xmm xmm k xmm
// VUNPCKHPS ymm ymm k ymm
// VUNPCKHPS m512 zmm k zmm
// VUNPCKHPS m512 zmm zmm
// VUNPCKHPS zmm zmm k zmm
// VUNPCKHPS zmm zmm zmm
//
// Construct and append a VUNPCKHPS instruction to the active function.
func (c *Context) VUNPCKHPS(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKHPS(ops...))
}
// VUNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPS m128 xmm xmm
// VUNPCKHPS m256 ymm ymm
// VUNPCKHPS xmm xmm xmm
// VUNPCKHPS ymm ymm ymm
// VUNPCKHPS m128 xmm k xmm
// VUNPCKHPS m256 ymm k ymm
// VUNPCKHPS xmm xmm k xmm
// VUNPCKHPS ymm ymm k ymm
// VUNPCKHPS m512 zmm k zmm
// VUNPCKHPS m512 zmm zmm
// VUNPCKHPS zmm zmm k zmm
// VUNPCKHPS zmm zmm zmm
//
// Construct and append a VUNPCKHPS instruction to the active function.
// Operates on the global context.
func VUNPCKHPS(ops ...operand.Op) { ctx.VUNPCKHPS(ops...) }
// VUNPCKHPS_BCST: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPS.BCST m32 xmm k xmm
// VUNPCKHPS.BCST m32 xmm xmm
// VUNPCKHPS.BCST m32 ymm k ymm
// VUNPCKHPS.BCST m32 ymm ymm
// VUNPCKHPS.BCST m32 zmm k zmm
// VUNPCKHPS.BCST m32 zmm zmm
//
// Construct and append a VUNPCKHPS.BCST instruction to the active function.
func (c *Context) VUNPCKHPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKHPS_BCST(ops...))
}
// VUNPCKHPS_BCST: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPS.BCST m32 xmm k xmm
// VUNPCKHPS.BCST m32 xmm xmm
// VUNPCKHPS.BCST m32 ymm k ymm
// VUNPCKHPS.BCST m32 ymm ymm
// VUNPCKHPS.BCST m32 zmm k zmm
// VUNPCKHPS.BCST m32 zmm zmm
//
// Construct and append a VUNPCKHPS.BCST instruction to the active function.
// Operates on the global context.
func VUNPCKHPS_BCST(ops ...operand.Op) { ctx.VUNPCKHPS_BCST(ops...) }
// VUNPCKHPS_BCST_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.BCST.Z m32 xmm k xmm
// VUNPCKHPS.BCST.Z m32 ymm k ymm
// VUNPCKHPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VUNPCKHPS.BCST.Z instruction to the active function.
func (c *Context) VUNPCKHPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKHPS_BCST_Z(m, xyz, k, xyz1))
}
// VUNPCKHPS_BCST_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.BCST.Z m32 xmm k xmm
// VUNPCKHPS.BCST.Z m32 ymm k ymm
// VUNPCKHPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VUNPCKHPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VUNPCKHPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VUNPCKHPS_BCST_Z(m, xyz, k, xyz1) }
// VUNPCKHPS_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.Z m128 xmm k xmm
// VUNPCKHPS.Z m256 ymm k ymm
// VUNPCKHPS.Z xmm xmm k xmm
// VUNPCKHPS.Z ymm ymm k ymm
// VUNPCKHPS.Z m512 zmm k zmm
// VUNPCKHPS.Z zmm zmm k zmm
//
// Construct and append a VUNPCKHPS.Z instruction to the active function.
func (c *Context) VUNPCKHPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKHPS_Z(mxyz, xyz, k, xyz1))
}
// VUNPCKHPS_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.Z m128 xmm k xmm
// VUNPCKHPS.Z m256 ymm k ymm
// VUNPCKHPS.Z xmm xmm k xmm
// VUNPCKHPS.Z ymm ymm k ymm
// VUNPCKHPS.Z m512 zmm k zmm
// VUNPCKHPS.Z zmm zmm k zmm
//
// Construct and append a VUNPCKHPS.Z instruction to the active function.
// Operates on the global context.
func VUNPCKHPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VUNPCKHPS_Z(mxyz, xyz, k, xyz1) }
// VUNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPD m128 xmm xmm
// VUNPCKLPD m256 ymm ymm
// VUNPCKLPD xmm xmm xmm
// VUNPCKLPD ymm ymm ymm
// VUNPCKLPD m128 xmm k xmm
// VUNPCKLPD m256 ymm k ymm
// VUNPCKLPD xmm xmm k xmm
// VUNPCKLPD ymm ymm k ymm
// VUNPCKLPD m512 zmm k zmm
// VUNPCKLPD m512 zmm zmm
// VUNPCKLPD zmm zmm k zmm
// VUNPCKLPD zmm zmm zmm
//
// Construct and append a VUNPCKLPD instruction to the active function.
func (c *Context) VUNPCKLPD(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKLPD(ops...))
}
// VUNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPD m128 xmm xmm
// VUNPCKLPD m256 ymm ymm
// VUNPCKLPD xmm xmm xmm
// VUNPCKLPD ymm ymm ymm
// VUNPCKLPD m128 xmm k xmm
// VUNPCKLPD m256 ymm k ymm
// VUNPCKLPD xmm xmm k xmm
// VUNPCKLPD ymm ymm k ymm
// VUNPCKLPD m512 zmm k zmm
// VUNPCKLPD m512 zmm zmm
// VUNPCKLPD zmm zmm k zmm
// VUNPCKLPD zmm zmm zmm
//
// Construct and append a VUNPCKLPD instruction to the active function.
// Operates on the global context.
func VUNPCKLPD(ops ...operand.Op) { ctx.VUNPCKLPD(ops...) }
// VUNPCKLPD_BCST: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPD.BCST m64 xmm k xmm
// VUNPCKLPD.BCST m64 xmm xmm
// VUNPCKLPD.BCST m64 ymm k ymm
// VUNPCKLPD.BCST m64 ymm ymm
// VUNPCKLPD.BCST m64 zmm k zmm
// VUNPCKLPD.BCST m64 zmm zmm
//
// Construct and append a VUNPCKLPD.BCST instruction to the active function.
func (c *Context) VUNPCKLPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKLPD_BCST(ops...))
}
// VUNPCKLPD_BCST: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPD.BCST m64 xmm k xmm
// VUNPCKLPD.BCST m64 xmm xmm
// VUNPCKLPD.BCST m64 ymm k ymm
// VUNPCKLPD.BCST m64 ymm ymm
// VUNPCKLPD.BCST m64 zmm k zmm
// VUNPCKLPD.BCST m64 zmm zmm
//
// Construct and append a VUNPCKLPD.BCST instruction to the active function.
// Operates on the global context.
func VUNPCKLPD_BCST(ops ...operand.Op) { ctx.VUNPCKLPD_BCST(ops...) }
// VUNPCKLPD_BCST_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.BCST.Z m64 xmm k xmm
// VUNPCKLPD.BCST.Z m64 ymm k ymm
// VUNPCKLPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VUNPCKLPD.BCST.Z instruction to the active function.
func (c *Context) VUNPCKLPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKLPD_BCST_Z(m, xyz, k, xyz1))
}
// VUNPCKLPD_BCST_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.BCST.Z m64 xmm k xmm
// VUNPCKLPD.BCST.Z m64 ymm k ymm
// VUNPCKLPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VUNPCKLPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VUNPCKLPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VUNPCKLPD_BCST_Z(m, xyz, k, xyz1) }
// VUNPCKLPD_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.Z m128 xmm k xmm
// VUNPCKLPD.Z m256 ymm k ymm
// VUNPCKLPD.Z xmm xmm k xmm
// VUNPCKLPD.Z ymm ymm k ymm
// VUNPCKLPD.Z m512 zmm k zmm
// VUNPCKLPD.Z zmm zmm k zmm
//
// Construct and append a VUNPCKLPD.Z instruction to the active function.
func (c *Context) VUNPCKLPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKLPD_Z(mxyz, xyz, k, xyz1))
}
// VUNPCKLPD_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.Z m128 xmm k xmm
// VUNPCKLPD.Z m256 ymm k ymm
// VUNPCKLPD.Z xmm xmm k xmm
// VUNPCKLPD.Z ymm ymm k ymm
// VUNPCKLPD.Z m512 zmm k zmm
// VUNPCKLPD.Z zmm zmm k zmm
//
// Construct and append a VUNPCKLPD.Z instruction to the active function.
// Operates on the global context.
func VUNPCKLPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VUNPCKLPD_Z(mxyz, xyz, k, xyz1) }
// VUNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPS m128 xmm xmm
// VUNPCKLPS m256 ymm ymm
// VUNPCKLPS xmm xmm xmm
// VUNPCKLPS ymm ymm ymm
// VUNPCKLPS m128 xmm k xmm
// VUNPCKLPS m256 ymm k ymm
// VUNPCKLPS xmm xmm k xmm
// VUNPCKLPS ymm ymm k ymm
// VUNPCKLPS m512 zmm k zmm
// VUNPCKLPS m512 zmm zmm
// VUNPCKLPS zmm zmm k zmm
// VUNPCKLPS zmm zmm zmm
//
// Construct and append a VUNPCKLPS instruction to the active function.
func (c *Context) VUNPCKLPS(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKLPS(ops...))
}
// VUNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPS m128 xmm xmm
// VUNPCKLPS m256 ymm ymm
// VUNPCKLPS xmm xmm xmm
// VUNPCKLPS ymm ymm ymm
// VUNPCKLPS m128 xmm k xmm
// VUNPCKLPS m256 ymm k ymm
// VUNPCKLPS xmm xmm k xmm
// VUNPCKLPS ymm ymm k ymm
// VUNPCKLPS m512 zmm k zmm
// VUNPCKLPS m512 zmm zmm
// VUNPCKLPS zmm zmm k zmm
// VUNPCKLPS zmm zmm zmm
//
// Construct and append a VUNPCKLPS instruction to the active function.
// Operates on the global context.
func VUNPCKLPS(ops ...operand.Op) { ctx.VUNPCKLPS(ops...) }
// VUNPCKLPS_BCST: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPS.BCST m32 xmm k xmm
// VUNPCKLPS.BCST m32 xmm xmm
// VUNPCKLPS.BCST m32 ymm k ymm
// VUNPCKLPS.BCST m32 ymm ymm
// VUNPCKLPS.BCST m32 zmm k zmm
// VUNPCKLPS.BCST m32 zmm zmm
//
// Construct and append a VUNPCKLPS.BCST instruction to the active function.
func (c *Context) VUNPCKLPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VUNPCKLPS_BCST(ops...))
}
// VUNPCKLPS_BCST: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPS.BCST m32 xmm k xmm
// VUNPCKLPS.BCST m32 xmm xmm
// VUNPCKLPS.BCST m32 ymm k ymm
// VUNPCKLPS.BCST m32 ymm ymm
// VUNPCKLPS.BCST m32 zmm k zmm
// VUNPCKLPS.BCST m32 zmm zmm
//
// Construct and append a VUNPCKLPS.BCST instruction to the active function.
// Operates on the global context.
func VUNPCKLPS_BCST(ops ...operand.Op) { ctx.VUNPCKLPS_BCST(ops...) }
// VUNPCKLPS_BCST_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.BCST.Z m32 xmm k xmm
// VUNPCKLPS.BCST.Z m32 ymm k ymm
// VUNPCKLPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VUNPCKLPS.BCST.Z instruction to the active function.
func (c *Context) VUNPCKLPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKLPS_BCST_Z(m, xyz, k, xyz1))
}
// VUNPCKLPS_BCST_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.BCST.Z m32 xmm k xmm
// VUNPCKLPS.BCST.Z m32 ymm k ymm
// VUNPCKLPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VUNPCKLPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VUNPCKLPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VUNPCKLPS_BCST_Z(m, xyz, k, xyz1) }
// VUNPCKLPS_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.Z m128 xmm k xmm
// VUNPCKLPS.Z m256 ymm k ymm
// VUNPCKLPS.Z xmm xmm k xmm
// VUNPCKLPS.Z ymm ymm k ymm
// VUNPCKLPS.Z m512 zmm k zmm
// VUNPCKLPS.Z zmm zmm k zmm
//
// Construct and append a VUNPCKLPS.Z instruction to the active function.
func (c *Context) VUNPCKLPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VUNPCKLPS_Z(mxyz, xyz, k, xyz1))
}
// VUNPCKLPS_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.Z m128 xmm k xmm
// VUNPCKLPS.Z m256 ymm k ymm
// VUNPCKLPS.Z xmm xmm k xmm
// VUNPCKLPS.Z ymm ymm k ymm
// VUNPCKLPS.Z m512 zmm k zmm
// VUNPCKLPS.Z zmm zmm k zmm
//
// Construct and append a VUNPCKLPS.Z instruction to the active function.
// Operates on the global context.
func VUNPCKLPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VUNPCKLPS_Z(mxyz, xyz, k, xyz1) }
// VXORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// VXORPD m128 xmm xmm
// VXORPD m256 ymm ymm
// VXORPD xmm xmm xmm
// VXORPD ymm ymm ymm
// VXORPD m128 xmm k xmm
// VXORPD m256 ymm k ymm
// VXORPD xmm xmm k xmm
// VXORPD ymm ymm k ymm
// VXORPD m512 zmm k zmm
// VXORPD m512 zmm zmm
// VXORPD zmm zmm k zmm
// VXORPD zmm zmm zmm
//
// Construct and append a VXORPD instruction to the active function.
func (c *Context) VXORPD(ops ...operand.Op) {
c.addinstruction(x86.VXORPD(ops...))
}
// VXORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// VXORPD m128 xmm xmm
// VXORPD m256 ymm ymm
// VXORPD xmm xmm xmm
// VXORPD ymm ymm ymm
// VXORPD m128 xmm k xmm
// VXORPD m256 ymm k ymm
// VXORPD xmm xmm k xmm
// VXORPD ymm ymm k ymm
// VXORPD m512 zmm k zmm
// VXORPD m512 zmm zmm
// VXORPD zmm zmm k zmm
// VXORPD zmm zmm zmm
//
// Construct and append a VXORPD instruction to the active function.
// Operates on the global context.
func VXORPD(ops ...operand.Op) { ctx.VXORPD(ops...) }
// VXORPD_BCST: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPD.BCST m64 xmm k xmm
// VXORPD.BCST m64 xmm xmm
// VXORPD.BCST m64 ymm k ymm
// VXORPD.BCST m64 ymm ymm
// VXORPD.BCST m64 zmm k zmm
// VXORPD.BCST m64 zmm zmm
//
// Construct and append a VXORPD.BCST instruction to the active function.
func (c *Context) VXORPD_BCST(ops ...operand.Op) {
c.addinstruction(x86.VXORPD_BCST(ops...))
}
// VXORPD_BCST: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPD.BCST m64 xmm k xmm
// VXORPD.BCST m64 xmm xmm
// VXORPD.BCST m64 ymm k ymm
// VXORPD.BCST m64 ymm ymm
// VXORPD.BCST m64 zmm k zmm
// VXORPD.BCST m64 zmm zmm
//
// Construct and append a VXORPD.BCST instruction to the active function.
// Operates on the global context.
func VXORPD_BCST(ops ...operand.Op) { ctx.VXORPD_BCST(ops...) }
// VXORPD_BCST_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPD.BCST.Z m64 xmm k xmm
// VXORPD.BCST.Z m64 ymm k ymm
// VXORPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VXORPD.BCST.Z instruction to the active function.
func (c *Context) VXORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VXORPD_BCST_Z(m, xyz, k, xyz1))
}
// VXORPD_BCST_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPD.BCST.Z m64 xmm k xmm
// VXORPD.BCST.Z m64 ymm k ymm
// VXORPD.BCST.Z m64 zmm k zmm
//
// Construct and append a VXORPD.BCST.Z instruction to the active function.
// Operates on the global context.
func VXORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VXORPD_BCST_Z(m, xyz, k, xyz1) }
// VXORPD_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPD.Z m128 xmm k xmm
// VXORPD.Z m256 ymm k ymm
// VXORPD.Z xmm xmm k xmm
// VXORPD.Z ymm ymm k ymm
// VXORPD.Z m512 zmm k zmm
// VXORPD.Z zmm zmm k zmm
//
// Construct and append a VXORPD.Z instruction to the active function.
func (c *Context) VXORPD_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VXORPD_Z(mxyz, xyz, k, xyz1))
}
// VXORPD_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPD.Z m128 xmm k xmm
// VXORPD.Z m256 ymm k ymm
// VXORPD.Z xmm xmm k xmm
// VXORPD.Z ymm ymm k ymm
// VXORPD.Z m512 zmm k zmm
// VXORPD.Z zmm zmm k zmm
//
// Construct and append a VXORPD.Z instruction to the active function.
// Operates on the global context.
func VXORPD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VXORPD_Z(mxyz, xyz, k, xyz1) }
// VXORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// VXORPS m128 xmm xmm
// VXORPS m256 ymm ymm
// VXORPS xmm xmm xmm
// VXORPS ymm ymm ymm
// VXORPS m128 xmm k xmm
// VXORPS m256 ymm k ymm
// VXORPS xmm xmm k xmm
// VXORPS ymm ymm k ymm
// VXORPS m512 zmm k zmm
// VXORPS m512 zmm zmm
// VXORPS zmm zmm k zmm
// VXORPS zmm zmm zmm
//
// Construct and append a VXORPS instruction to the active function.
func (c *Context) VXORPS(ops ...operand.Op) {
c.addinstruction(x86.VXORPS(ops...))
}
// VXORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// VXORPS m128 xmm xmm
// VXORPS m256 ymm ymm
// VXORPS xmm xmm xmm
// VXORPS ymm ymm ymm
// VXORPS m128 xmm k xmm
// VXORPS m256 ymm k ymm
// VXORPS xmm xmm k xmm
// VXORPS ymm ymm k ymm
// VXORPS m512 zmm k zmm
// VXORPS m512 zmm zmm
// VXORPS zmm zmm k zmm
// VXORPS zmm zmm zmm
//
// Construct and append a VXORPS instruction to the active function.
// Operates on the global context.
func VXORPS(ops ...operand.Op) { ctx.VXORPS(ops...) }
// VXORPS_BCST: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPS.BCST m32 xmm k xmm
// VXORPS.BCST m32 xmm xmm
// VXORPS.BCST m32 ymm k ymm
// VXORPS.BCST m32 ymm ymm
// VXORPS.BCST m32 zmm k zmm
// VXORPS.BCST m32 zmm zmm
//
// Construct and append a VXORPS.BCST instruction to the active function.
func (c *Context) VXORPS_BCST(ops ...operand.Op) {
c.addinstruction(x86.VXORPS_BCST(ops...))
}
// VXORPS_BCST: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPS.BCST m32 xmm k xmm
// VXORPS.BCST m32 xmm xmm
// VXORPS.BCST m32 ymm k ymm
// VXORPS.BCST m32 ymm ymm
// VXORPS.BCST m32 zmm k zmm
// VXORPS.BCST m32 zmm zmm
//
// Construct and append a VXORPS.BCST instruction to the active function.
// Operates on the global context.
func VXORPS_BCST(ops ...operand.Op) { ctx.VXORPS_BCST(ops...) }
// VXORPS_BCST_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPS.BCST.Z m32 xmm k xmm
// VXORPS.BCST.Z m32 ymm k ymm
// VXORPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VXORPS.BCST.Z instruction to the active function.
func (c *Context) VXORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VXORPS_BCST_Z(m, xyz, k, xyz1))
}
// VXORPS_BCST_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPS.BCST.Z m32 xmm k xmm
// VXORPS.BCST.Z m32 ymm k ymm
// VXORPS.BCST.Z m32 zmm k zmm
//
// Construct and append a VXORPS.BCST.Z instruction to the active function.
// Operates on the global context.
func VXORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VXORPS_BCST_Z(m, xyz, k, xyz1) }
// VXORPS_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPS.Z m128 xmm k xmm
// VXORPS.Z m256 ymm k ymm
// VXORPS.Z xmm xmm k xmm
// VXORPS.Z ymm ymm k ymm
// VXORPS.Z m512 zmm k zmm
// VXORPS.Z zmm zmm k zmm
//
// Construct and append a VXORPS.Z instruction to the active function.
func (c *Context) VXORPS_Z(mxyz, xyz, k, xyz1 operand.Op) {
c.addinstruction(x86.VXORPS_Z(mxyz, xyz, k, xyz1))
}
// VXORPS_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPS.Z m128 xmm k xmm
// VXORPS.Z m256 ymm k ymm
// VXORPS.Z xmm xmm k xmm
// VXORPS.Z ymm ymm k ymm
// VXORPS.Z m512 zmm k zmm
// VXORPS.Z zmm zmm k zmm
//
// Construct and append a VXORPS.Z instruction to the active function.
// Operates on the global context.
func VXORPS_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VXORPS_Z(mxyz, xyz, k, xyz1) }
// VZEROALL: Zero All YMM Registers.
//
// Forms:
//
// VZEROALL
//
// Construct and append a VZEROALL instruction to the active function.
func (c *Context) VZEROALL() {
c.addinstruction(x86.VZEROALL())
}
// VZEROALL: Zero All YMM Registers.
//
// Forms:
//
// VZEROALL
//
// Construct and append a VZEROALL instruction to the active function.
// Operates on the global context.
func VZEROALL() { ctx.VZEROALL() }
// VZEROUPPER: Zero Upper Bits of YMM Registers.
//
// Forms:
//
// VZEROUPPER
//
// Construct and append a VZEROUPPER instruction to the active function.
func (c *Context) VZEROUPPER() {
c.addinstruction(x86.VZEROUPPER())
}
// VZEROUPPER: Zero Upper Bits of YMM Registers.
//
// Forms:
//
// VZEROUPPER
//
// Construct and append a VZEROUPPER instruction to the active function.
// Operates on the global context.
func VZEROUPPER() { ctx.VZEROUPPER() }
// XADDB: Exchange and Add.
//
// Forms:
//
// XADDB r8 m8
// XADDB r8 r8
//
// Construct and append a XADDB instruction to the active function.
func (c *Context) XADDB(r, mr operand.Op) {
c.addinstruction(x86.XADDB(r, mr))
}
// XADDB: Exchange and Add.
//
// Forms:
//
// XADDB r8 m8
// XADDB r8 r8
//
// Construct and append a XADDB instruction to the active function.
// Operates on the global context.
func XADDB(r, mr operand.Op) { ctx.XADDB(r, mr) }
// XADDL: Exchange and Add.
//
// Forms:
//
// XADDL r32 m32
// XADDL r32 r32
//
// Construct and append a XADDL instruction to the active function.
func (c *Context) XADDL(r, mr operand.Op) {
c.addinstruction(x86.XADDL(r, mr))
}
// XADDL: Exchange and Add.
//
// Forms:
//
// XADDL r32 m32
// XADDL r32 r32
//
// Construct and append a XADDL instruction to the active function.
// Operates on the global context.
func XADDL(r, mr operand.Op) { ctx.XADDL(r, mr) }
// XADDQ: Exchange and Add.
//
// Forms:
//
// XADDQ r64 m64
// XADDQ r64 r64
//
// Construct and append a XADDQ instruction to the active function.
func (c *Context) XADDQ(r, mr operand.Op) {
c.addinstruction(x86.XADDQ(r, mr))
}
// XADDQ: Exchange and Add.
//
// Forms:
//
// XADDQ r64 m64
// XADDQ r64 r64
//
// Construct and append a XADDQ instruction to the active function.
// Operates on the global context.
func XADDQ(r, mr operand.Op) { ctx.XADDQ(r, mr) }
// XADDW: Exchange and Add.
//
// Forms:
//
// XADDW r16 m16
// XADDW r16 r16
//
// Construct and append a XADDW instruction to the active function.
func (c *Context) XADDW(r, mr operand.Op) {
c.addinstruction(x86.XADDW(r, mr))
}
// XADDW: Exchange and Add.
//
// Forms:
//
// XADDW r16 m16
// XADDW r16 r16
//
// Construct and append a XADDW instruction to the active function.
// Operates on the global context.
func XADDW(r, mr operand.Op) { ctx.XADDW(r, mr) }
// XCHGB: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGB m8 r8
// XCHGB r8 m8
// XCHGB r8 r8
//
// Construct and append a XCHGB instruction to the active function.
func (c *Context) XCHGB(mr, mr1 operand.Op) {
c.addinstruction(x86.XCHGB(mr, mr1))
}
// XCHGB: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGB m8 r8
// XCHGB r8 m8
// XCHGB r8 r8
//
// Construct and append a XCHGB instruction to the active function.
// Operates on the global context.
func XCHGB(mr, mr1 operand.Op) { ctx.XCHGB(mr, mr1) }
// XCHGL: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGL eax r32
// XCHGL m32 r32
// XCHGL r32 eax
// XCHGL r32 m32
// XCHGL r32 r32
//
// Construct and append a XCHGL instruction to the active function.
func (c *Context) XCHGL(emr, emr1 operand.Op) {
c.addinstruction(x86.XCHGL(emr, emr1))
}
// XCHGL: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGL eax r32
// XCHGL m32 r32
// XCHGL r32 eax
// XCHGL r32 m32
// XCHGL r32 r32
//
// Construct and append a XCHGL instruction to the active function.
// Operates on the global context.
func XCHGL(emr, emr1 operand.Op) { ctx.XCHGL(emr, emr1) }
// XCHGQ: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGQ m64 r64
// XCHGQ r64 m64
// XCHGQ r64 r64
// XCHGQ r64 rax
// XCHGQ rax r64
//
// Construct and append a XCHGQ instruction to the active function.
func (c *Context) XCHGQ(mr, mr1 operand.Op) {
c.addinstruction(x86.XCHGQ(mr, mr1))
}
// XCHGQ: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGQ m64 r64
// XCHGQ r64 m64
// XCHGQ r64 r64
// XCHGQ r64 rax
// XCHGQ rax r64
//
// Construct and append a XCHGQ instruction to the active function.
// Operates on the global context.
func XCHGQ(mr, mr1 operand.Op) { ctx.XCHGQ(mr, mr1) }
// XCHGW: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGW ax r16
// XCHGW m16 r16
// XCHGW r16 ax
// XCHGW r16 m16
// XCHGW r16 r16
//
// Construct and append a XCHGW instruction to the active function.
func (c *Context) XCHGW(amr, amr1 operand.Op) {
c.addinstruction(x86.XCHGW(amr, amr1))
}
// XCHGW: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGW ax r16
// XCHGW m16 r16
// XCHGW r16 ax
// XCHGW r16 m16
// XCHGW r16 r16
//
// Construct and append a XCHGW instruction to the active function.
// Operates on the global context.
func XCHGW(amr, amr1 operand.Op) { ctx.XCHGW(amr, amr1) }
// XGETBV: Get Value of Extended Control Register.
//
// Forms:
//
// XGETBV
//
// Construct and append a XGETBV instruction to the active function.
func (c *Context) XGETBV() {
c.addinstruction(x86.XGETBV())
}
// XGETBV: Get Value of Extended Control Register.
//
// Forms:
//
// XGETBV
//
// Construct and append a XGETBV instruction to the active function.
// Operates on the global context.
func XGETBV() { ctx.XGETBV() }
// XLAT: Table Look-up Translation.
//
// Forms:
//
// XLAT
//
// Construct and append a XLAT instruction to the active function.
func (c *Context) XLAT() {
c.addinstruction(x86.XLAT())
}
// XLAT: Table Look-up Translation.
//
// Forms:
//
// XLAT
//
// Construct and append a XLAT instruction to the active function.
// Operates on the global context.
func XLAT() { ctx.XLAT() }
// XORB: Logical Exclusive OR.
//
// Forms:
//
// XORB imm8 al
// XORB imm8 m8
// XORB imm8 r8
// XORB m8 r8
// XORB r8 m8
// XORB r8 r8
//
// Construct and append a XORB instruction to the active function.
func (c *Context) XORB(imr, amr operand.Op) {
c.addinstruction(x86.XORB(imr, amr))
}
// XORB: Logical Exclusive OR.
//
// Forms:
//
// XORB imm8 al
// XORB imm8 m8
// XORB imm8 r8
// XORB m8 r8
// XORB r8 m8
// XORB r8 r8
//
// Construct and append a XORB instruction to the active function.
// Operates on the global context.
func XORB(imr, amr operand.Op) { ctx.XORB(imr, amr) }
// XORL: Logical Exclusive OR.
//
// Forms:
//
// XORL imm32 eax
// XORL imm32 m32
// XORL imm32 r32
// XORL imm8 m32
// XORL imm8 r32
// XORL m32 r32
// XORL r32 m32
// XORL r32 r32
//
// Construct and append a XORL instruction to the active function.
func (c *Context) XORL(imr, emr operand.Op) {
c.addinstruction(x86.XORL(imr, emr))
}
// XORL: Logical Exclusive OR.
//
// Forms:
//
// XORL imm32 eax
// XORL imm32 m32
// XORL imm32 r32
// XORL imm8 m32
// XORL imm8 r32
// XORL m32 r32
// XORL r32 m32
// XORL r32 r32
//
// Construct and append a XORL instruction to the active function.
// Operates on the global context.
func XORL(imr, emr operand.Op) { ctx.XORL(imr, emr) }
// XORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// XORPD m128 xmm
// XORPD xmm xmm
//
// Construct and append a XORPD instruction to the active function.
func (c *Context) XORPD(mx, x operand.Op) {
c.addinstruction(x86.XORPD(mx, x))
}
// XORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// XORPD m128 xmm
// XORPD xmm xmm
//
// Construct and append a XORPD instruction to the active function.
// Operates on the global context.
func XORPD(mx, x operand.Op) { ctx.XORPD(mx, x) }
// XORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// XORPS m128 xmm
// XORPS xmm xmm
//
// Construct and append a XORPS instruction to the active function.
func (c *Context) XORPS(mx, x operand.Op) {
c.addinstruction(x86.XORPS(mx, x))
}
// XORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// XORPS m128 xmm
// XORPS xmm xmm
//
// Construct and append a XORPS instruction to the active function.
// Operates on the global context.
func XORPS(mx, x operand.Op) { ctx.XORPS(mx, x) }
// XORQ: Logical Exclusive OR.
//
// Forms:
//
// XORQ imm32 m64
// XORQ imm32 r64
// XORQ imm32 rax
// XORQ imm8 m64
// XORQ imm8 r64
// XORQ m64 r64
// XORQ r64 m64
// XORQ r64 r64
//
// Construct and append a XORQ instruction to the active function.
func (c *Context) XORQ(imr, mr operand.Op) {
c.addinstruction(x86.XORQ(imr, mr))
}
// XORQ: Logical Exclusive OR.
//
// Forms:
//
// XORQ imm32 m64
// XORQ imm32 r64
// XORQ imm32 rax
// XORQ imm8 m64
// XORQ imm8 r64
// XORQ m64 r64
// XORQ r64 m64
// XORQ r64 r64
//
// Construct and append a XORQ instruction to the active function.
// Operates on the global context.
func XORQ(imr, mr operand.Op) { ctx.XORQ(imr, mr) }
// XORW: Logical Exclusive OR.
//
// Forms:
//
// XORW imm16 ax
// XORW imm16 m16
// XORW imm16 r16
// XORW imm8 m16
// XORW imm8 r16
// XORW m16 r16
// XORW r16 m16
// XORW r16 r16
//
// Construct and append a XORW instruction to the active function.
func (c *Context) XORW(imr, amr operand.Op) {
c.addinstruction(x86.XORW(imr, amr))
}
// XORW: Logical Exclusive OR.
//
// Forms:
//
// XORW imm16 ax
// XORW imm16 m16
// XORW imm16 r16
// XORW imm8 m16
// XORW imm8 r16
// XORW m16 r16
// XORW r16 m16
// XORW r16 r16
//
// Construct and append a XORW instruction to the active function.
// Operates on the global context.
func XORW(imr, amr operand.Op) { ctx.XORW(imr, amr) }
golang-github-mmcloughlin-avo-0.5.0/build/zinstructions_test.go 0000664 0000000 0000000 00000367627 14370657153 0025025 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zinstructions_test.go buildtest. DO NOT EDIT.
//go:build !integration
// +build !integration
package build
import (
"math"
"testing"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
var (
op1 operand.Op = operand.Imm(1)
op3 operand.Op = operand.Imm(3)
opimm2u operand.Op = operand.Imm(3)
opimm8 operand.Op = operand.Imm(math.MaxInt8)
opimm16 operand.Op = operand.Imm(math.MaxInt16)
opimm32 operand.Op = operand.Imm(math.MaxInt32)
opimm64 operand.Op = operand.Imm(math.MaxInt64)
opal operand.Op = reg.AL
opcl operand.Op = reg.CL
opax operand.Op = reg.AX
opeax operand.Op = reg.EAX
oprax operand.Op = reg.RAX
opr8 operand.Op = reg.CH
opr16 operand.Op = reg.R9W
opr32 operand.Op = reg.R10L
opr64 operand.Op = reg.R11
opxmm0 operand.Op = reg.X0
opxmm operand.Op = reg.X7
opymm operand.Op = reg.Y15
opzmm operand.Op = reg.Z31
opk operand.Op = reg.K7
opm operand.Op = operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}
opm8 operand.Op = operand.Mem{Base: reg.BL, Index: reg.CH, Scale: 1}
opm16 operand.Op = operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}
opm32 operand.Op = operand.Mem{Base: reg.EBX, Index: reg.ECX, Scale: 4}
opm64 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm128 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm256 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm512 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opvm32x operand.Op = operand.Mem{Base: reg.R13, Index: reg.X4, Scale: 1}
opvm64x operand.Op = operand.Mem{Base: reg.R13, Index: reg.X8, Scale: 1}
opvm32y operand.Op = operand.Mem{Base: reg.R13, Index: reg.Y4, Scale: 1}
opvm64y operand.Op = operand.Mem{Base: reg.R13, Index: reg.Y8, Scale: 1}
opvm32z operand.Op = operand.Mem{Base: reg.R13, Index: reg.Z4, Scale: 1}
opvm64z operand.Op = operand.Mem{Base: reg.R13, Index: reg.Z8, Scale: 1}
oprel8 operand.Op = operand.Rel(math.MaxInt8)
oprel32 operand.Op = operand.LabelRef("lbl")
)
func TestContextInstructions(t *testing.T) {
ctx := NewContext()
ctx.Function("Instructions")
ctx.ADCB(opimm8, opal)
ctx.ADCL(opimm32, opeax)
ctx.ADCQ(opimm32, opm64)
ctx.ADCW(opimm16, opax)
ctx.ADCXL(opm32, opr32)
ctx.ADCXQ(opm64, opr64)
ctx.ADDB(opimm8, opal)
ctx.ADDL(opimm32, opeax)
ctx.ADDPD(opm128, opxmm)
ctx.ADDPS(opm128, opxmm)
ctx.ADDQ(opimm32, opm64)
ctx.ADDSD(opm64, opxmm)
ctx.ADDSS(opm32, opxmm)
ctx.ADDSUBPD(opm128, opxmm)
ctx.ADDSUBPS(opm128, opxmm)
ctx.ADDW(opimm16, opax)
ctx.ADOXL(opm32, opr32)
ctx.ADOXQ(opm64, opr64)
ctx.AESDEC(opm128, opxmm)
ctx.AESDECLAST(opm128, opxmm)
ctx.AESENC(opm128, opxmm)
ctx.AESENCLAST(opm128, opxmm)
ctx.AESIMC(opm128, opxmm)
ctx.AESKEYGENASSIST(opimm8, opm128, opxmm)
ctx.ANDB(opimm8, opal)
ctx.ANDL(opimm32, opeax)
ctx.ANDNL(opm32, opr32, opr32)
ctx.ANDNPD(opm128, opxmm)
ctx.ANDNPS(opm128, opxmm)
ctx.ANDNQ(opm64, opr64, opr64)
ctx.ANDPD(opm128, opxmm)
ctx.ANDPS(opm128, opxmm)
ctx.ANDQ(opimm32, opm64)
ctx.ANDW(opimm16, opax)
ctx.BEXTRL(opr32, opm32, opr32)
ctx.BEXTRQ(opr64, opm64, opr64)
ctx.BLENDPD(opimm8, opm128, opxmm)
ctx.BLENDPS(opimm8, opm128, opxmm)
ctx.BLENDVPD(opxmm0, opm128, opxmm)
ctx.BLENDVPS(opxmm0, opm128, opxmm)
ctx.BLSIL(opm32, opr32)
ctx.BLSIQ(opm64, opr64)
ctx.BLSMSKL(opm32, opr32)
ctx.BLSMSKQ(opm64, opr64)
ctx.BLSRL(opm32, opr32)
ctx.BLSRQ(opm64, opr64)
ctx.BSFL(opm32, opr32)
ctx.BSFQ(opm64, opr64)
ctx.BSFW(opm16, opr16)
ctx.BSRL(opm32, opr32)
ctx.BSRQ(opm64, opr64)
ctx.BSRW(opm16, opr16)
ctx.BSWAPL(opr32)
ctx.BSWAPQ(opr64)
ctx.BTCL(opimm8, opm32)
ctx.BTCQ(opimm8, opm64)
ctx.BTCW(opimm8, opm16)
ctx.BTL(opimm8, opm32)
ctx.BTQ(opimm8, opm64)
ctx.BTRL(opimm8, opm32)
ctx.BTRQ(opimm8, opm64)
ctx.BTRW(opimm8, opm16)
ctx.BTSL(opimm8, opm32)
ctx.BTSQ(opimm8, opm64)
ctx.BTSW(opimm8, opm16)
ctx.BTW(opimm8, opm16)
ctx.BZHIL(opr32, opm32, opr32)
ctx.BZHIQ(opr64, opm64, opr64)
ctx.CALL(oprel32)
ctx.CBW()
ctx.CDQ()
ctx.CDQE()
ctx.CLC()
ctx.CLD()
ctx.CLFLUSH(opm8)
ctx.CLFLUSHOPT(opm8)
ctx.CMC()
ctx.CMOVLCC(opm32, opr32)
ctx.CMOVLCS(opm32, opr32)
ctx.CMOVLEQ(opm32, opr32)
ctx.CMOVLGE(opm32, opr32)
ctx.CMOVLGT(opm32, opr32)
ctx.CMOVLHI(opm32, opr32)
ctx.CMOVLLE(opm32, opr32)
ctx.CMOVLLS(opm32, opr32)
ctx.CMOVLLT(opm32, opr32)
ctx.CMOVLMI(opm32, opr32)
ctx.CMOVLNE(opm32, opr32)
ctx.CMOVLOC(opm32, opr32)
ctx.CMOVLOS(opm32, opr32)
ctx.CMOVLPC(opm32, opr32)
ctx.CMOVLPL(opm32, opr32)
ctx.CMOVLPS(opm32, opr32)
ctx.CMOVQCC(opm64, opr64)
ctx.CMOVQCS(opm64, opr64)
ctx.CMOVQEQ(opm64, opr64)
ctx.CMOVQGE(opm64, opr64)
ctx.CMOVQGT(opm64, opr64)
ctx.CMOVQHI(opm64, opr64)
ctx.CMOVQLE(opm64, opr64)
ctx.CMOVQLS(opm64, opr64)
ctx.CMOVQLT(opm64, opr64)
ctx.CMOVQMI(opm64, opr64)
ctx.CMOVQNE(opm64, opr64)
ctx.CMOVQOC(opm64, opr64)
ctx.CMOVQOS(opm64, opr64)
ctx.CMOVQPC(opm64, opr64)
ctx.CMOVQPL(opm64, opr64)
ctx.CMOVQPS(opm64, opr64)
ctx.CMOVWCC(opm16, opr16)
ctx.CMOVWCS(opm16, opr16)
ctx.CMOVWEQ(opm16, opr16)
ctx.CMOVWGE(opm16, opr16)
ctx.CMOVWGT(opm16, opr16)
ctx.CMOVWHI(opm16, opr16)
ctx.CMOVWLE(opm16, opr16)
ctx.CMOVWLS(opm16, opr16)
ctx.CMOVWLT(opm16, opr16)
ctx.CMOVWMI(opm16, opr16)
ctx.CMOVWNE(opm16, opr16)
ctx.CMOVWOC(opm16, opr16)
ctx.CMOVWOS(opm16, opr16)
ctx.CMOVWPC(opm16, opr16)
ctx.CMOVWPL(opm16, opr16)
ctx.CMOVWPS(opm16, opr16)
ctx.CMPB(opal, opimm8)
ctx.CMPL(opeax, opimm32)
ctx.CMPPD(opm128, opxmm, opimm8)
ctx.CMPPS(opm128, opxmm, opimm8)
ctx.CMPQ(opm64, opimm32)
ctx.CMPSD(opm64, opxmm, opimm8)
ctx.CMPSS(opm32, opxmm, opimm8)
ctx.CMPW(opax, opimm16)
ctx.CMPXCHG16B(opm128)
ctx.CMPXCHG8B(opm64)
ctx.CMPXCHGB(opr8, opm8)
ctx.CMPXCHGL(opr32, opm32)
ctx.CMPXCHGQ(opr64, opm64)
ctx.CMPXCHGW(opr16, opm16)
ctx.COMISD(opm64, opxmm)
ctx.COMISS(opm32, opxmm)
ctx.CPUID()
ctx.CQO()
ctx.CRC32B(opm8, opr32)
ctx.CRC32L(opm32, opr32)
ctx.CRC32Q(opm64, opr64)
ctx.CRC32W(opm16, opr32)
ctx.CVTPD2PL(opm128, opxmm)
ctx.CVTPD2PS(opm128, opxmm)
ctx.CVTPL2PD(opm64, opxmm)
ctx.CVTPL2PS(opm128, opxmm)
ctx.CVTPS2PD(opm64, opxmm)
ctx.CVTPS2PL(opm128, opxmm)
ctx.CVTSD2SL(opm64, opr32)
ctx.CVTSD2SS(opm64, opxmm)
ctx.CVTSL2SD(opm32, opxmm)
ctx.CVTSL2SS(opm32, opxmm)
ctx.CVTSQ2SD(opm64, opxmm)
ctx.CVTSQ2SS(opm64, opxmm)
ctx.CVTSS2SD(opm32, opxmm)
ctx.CVTSS2SL(opm32, opr32)
ctx.CVTTPD2PL(opm128, opxmm)
ctx.CVTTPS2PL(opm128, opxmm)
ctx.CVTTSD2SL(opm64, opr32)
ctx.CVTTSD2SQ(opm64, opr64)
ctx.CVTTSS2SL(opm32, opr32)
ctx.CWD()
ctx.CWDE()
ctx.DECB(opm8)
ctx.DECL(opm32)
ctx.DECQ(opm64)
ctx.DECW(opm16)
ctx.DIVB(opm8)
ctx.DIVL(opm32)
ctx.DIVPD(opm128, opxmm)
ctx.DIVPS(opm128, opxmm)
ctx.DIVQ(opm64)
ctx.DIVSD(opm64, opxmm)
ctx.DIVSS(opm32, opxmm)
ctx.DIVW(opm16)
ctx.DPPD(opimm8, opm128, opxmm)
ctx.DPPS(opimm8, opm128, opxmm)
ctx.EXTRACTPS(opimm2u, opxmm, opm32)
ctx.HADDPD(opm128, opxmm)
ctx.HADDPS(opm128, opxmm)
ctx.HSUBPD(opm128, opxmm)
ctx.HSUBPS(opm128, opxmm)
ctx.IDIVB(opm8)
ctx.IDIVL(opm32)
ctx.IDIVQ(opm64)
ctx.IDIVW(opm16)
ctx.IMUL3L(opimm32, opm32, opr32)
ctx.IMUL3Q(opimm32, opm64, opr64)
ctx.IMUL3W(opimm16, opm16, opr16)
ctx.IMULB(opm8)
ctx.IMULL(opm32, opr32)
ctx.IMULQ(opm64, opr64)
ctx.IMULW(opm16, opr16)
ctx.INCB(opm8)
ctx.INCL(opm32)
ctx.INCQ(opm64)
ctx.INCW(opm16)
ctx.INSERTPS(opimm8, opm32, opxmm)
ctx.INT(op3)
ctx.JA(oprel32)
ctx.JAE(oprel32)
ctx.JB(oprel32)
ctx.JBE(oprel32)
ctx.JC(oprel32)
ctx.JCC(oprel32)
ctx.JCS(oprel32)
ctx.JCXZL(oprel8)
ctx.JCXZQ(oprel8)
ctx.JE(oprel32)
ctx.JEQ(oprel32)
ctx.JG(oprel32)
ctx.JGE(oprel32)
ctx.JGT(oprel32)
ctx.JHI(oprel32)
ctx.JHS(oprel32)
ctx.JL(oprel32)
ctx.JLE(oprel32)
ctx.JLO(oprel32)
ctx.JLS(oprel32)
ctx.JLT(oprel32)
ctx.JMI(oprel32)
ctx.JMP(oprel32)
ctx.JNA(oprel32)
ctx.JNAE(oprel32)
ctx.JNB(oprel32)
ctx.JNBE(oprel32)
ctx.JNC(oprel32)
ctx.JNE(oprel32)
ctx.JNG(oprel32)
ctx.JNGE(oprel32)
ctx.JNL(oprel32)
ctx.JNLE(oprel32)
ctx.JNO(oprel32)
ctx.JNP(oprel32)
ctx.JNS(oprel32)
ctx.JNZ(oprel32)
ctx.JO(oprel32)
ctx.JOC(oprel32)
ctx.JOS(oprel32)
ctx.JP(oprel32)
ctx.JPC(oprel32)
ctx.JPE(oprel32)
ctx.JPL(oprel32)
ctx.JPO(oprel32)
ctx.JPS(oprel32)
ctx.JS(oprel32)
ctx.JZ(oprel32)
ctx.KADDB(opk, opk, opk)
ctx.KADDD(opk, opk, opk)
ctx.KADDQ(opk, opk, opk)
ctx.KADDW(opk, opk, opk)
ctx.KANDB(opk, opk, opk)
ctx.KANDD(opk, opk, opk)
ctx.KANDNB(opk, opk, opk)
ctx.KANDND(opk, opk, opk)
ctx.KANDNQ(opk, opk, opk)
ctx.KANDNW(opk, opk, opk)
ctx.KANDQ(opk, opk, opk)
ctx.KANDW(opk, opk, opk)
ctx.KMOVB(opk, opk)
ctx.KMOVD(opk, opk)
ctx.KMOVQ(opk, opk)
ctx.KMOVW(opk, opk)
ctx.KNOTB(opk, opk)
ctx.KNOTD(opk, opk)
ctx.KNOTQ(opk, opk)
ctx.KNOTW(opk, opk)
ctx.KORB(opk, opk, opk)
ctx.KORD(opk, opk, opk)
ctx.KORQ(opk, opk, opk)
ctx.KORTESTB(opk, opk)
ctx.KORTESTD(opk, opk)
ctx.KORTESTQ(opk, opk)
ctx.KORTESTW(opk, opk)
ctx.KORW(opk, opk, opk)
ctx.KSHIFTLB(opimm8, opk, opk)
ctx.KSHIFTLD(opimm8, opk, opk)
ctx.KSHIFTLQ(opimm8, opk, opk)
ctx.KSHIFTLW(opimm8, opk, opk)
ctx.KSHIFTRB(opimm8, opk, opk)
ctx.KSHIFTRD(opimm8, opk, opk)
ctx.KSHIFTRQ(opimm8, opk, opk)
ctx.KSHIFTRW(opimm8, opk, opk)
ctx.KTESTB(opk, opk)
ctx.KTESTD(opk, opk)
ctx.KTESTQ(opk, opk)
ctx.KTESTW(opk, opk)
ctx.KUNPCKBW(opk, opk, opk)
ctx.KUNPCKDQ(opk, opk, opk)
ctx.KUNPCKWD(opk, opk, opk)
ctx.KXNORB(opk, opk, opk)
ctx.KXNORD(opk, opk, opk)
ctx.KXNORQ(opk, opk, opk)
ctx.KXNORW(opk, opk, opk)
ctx.KXORB(opk, opk, opk)
ctx.KXORD(opk, opk, opk)
ctx.KXORQ(opk, opk, opk)
ctx.KXORW(opk, opk, opk)
ctx.LDDQU(opm128, opxmm)
ctx.LDMXCSR(opm32)
ctx.LEAL(opm, opr32)
ctx.LEAQ(opm, opr64)
ctx.LEAW(opm, opr16)
ctx.LFENCE()
ctx.LZCNTL(opm32, opr32)
ctx.LZCNTQ(opm64, opr64)
ctx.LZCNTW(opm16, opr16)
ctx.MASKMOVDQU(opxmm, opxmm)
ctx.MASKMOVOU(opxmm, opxmm)
ctx.MAXPD(opm128, opxmm)
ctx.MAXPS(opm128, opxmm)
ctx.MAXSD(opm64, opxmm)
ctx.MAXSS(opm32, opxmm)
ctx.MFENCE()
ctx.MINPD(opm128, opxmm)
ctx.MINPS(opm128, opxmm)
ctx.MINSD(opm64, opxmm)
ctx.MINSS(opm32, opxmm)
ctx.MONITOR()
ctx.MOVAPD(opm128, opxmm)
ctx.MOVAPS(opm128, opxmm)
ctx.MOVB(opimm8, opm8)
ctx.MOVBELL(opm32, opr32)
ctx.MOVBEQQ(opm64, opr64)
ctx.MOVBEWW(opm16, opr16)
ctx.MOVBLSX(opm8, opr32)
ctx.MOVBLZX(opm8, opr32)
ctx.MOVBQSX(opm8, opr64)
ctx.MOVBQZX(opm8, opr64)
ctx.MOVBWSX(opm8, opr16)
ctx.MOVBWZX(opm8, opr16)
ctx.MOVD(opm32, opxmm)
ctx.MOVDDUP(opm64, opxmm)
ctx.MOVDQ2Q(opm32, opxmm)
ctx.MOVHLPS(opxmm, opxmm)
ctx.MOVHPD(opm64, opxmm)
ctx.MOVHPS(opm64, opxmm)
ctx.MOVL(opimm32, opm32)
ctx.MOVLHPS(opxmm, opxmm)
ctx.MOVLPD(opm64, opxmm)
ctx.MOVLPS(opm64, opxmm)
ctx.MOVLQSX(opm32, opr64)
ctx.MOVLQZX(opm32, opr64)
ctx.MOVMSKPD(opxmm, opr32)
ctx.MOVMSKPS(opxmm, opr32)
ctx.MOVNTDQ(opxmm, opm128)
ctx.MOVNTDQA(opm128, opxmm)
ctx.MOVNTIL(opr32, opm32)
ctx.MOVNTIQ(opr64, opm64)
ctx.MOVNTO(opxmm, opm128)
ctx.MOVNTPD(opxmm, opm128)
ctx.MOVNTPS(opxmm, opm128)
ctx.MOVO(opm128, opxmm)
ctx.MOVOA(opm128, opxmm)
ctx.MOVOU(opm128, opxmm)
ctx.MOVQ(opm32, opxmm)
ctx.MOVSD(opm64, opxmm)
ctx.MOVSHDUP(opm128, opxmm)
ctx.MOVSLDUP(opm128, opxmm)
ctx.MOVSS(opm32, opxmm)
ctx.MOVUPD(opm128, opxmm)
ctx.MOVUPS(opm128, opxmm)
ctx.MOVW(opimm16, opm16)
ctx.MOVWLSX(opm16, opr32)
ctx.MOVWLZX(opm16, opr32)
ctx.MOVWQSX(opm16, opr64)
ctx.MOVWQZX(opm16, opr64)
ctx.MPSADBW(opimm8, opm128, opxmm)
ctx.MULB(opm8)
ctx.MULL(opm32)
ctx.MULPD(opm128, opxmm)
ctx.MULPS(opm128, opxmm)
ctx.MULQ(opm64)
ctx.MULSD(opm64, opxmm)
ctx.MULSS(opm32, opxmm)
ctx.MULW(opm16)
ctx.MULXL(opm32, opr32, opr32)
ctx.MULXQ(opm64, opr64, opr64)
ctx.MWAIT()
ctx.NEGB(opm8)
ctx.NEGL(opm32)
ctx.NEGQ(opm64)
ctx.NEGW(opm16)
ctx.NOP()
ctx.NOTB(opm8)
ctx.NOTL(opm32)
ctx.NOTQ(opm64)
ctx.NOTW(opm16)
ctx.ORB(opimm8, opal)
ctx.ORL(opimm32, opeax)
ctx.ORPD(opm128, opxmm)
ctx.ORPS(opm128, opxmm)
ctx.ORQ(opimm32, opm64)
ctx.ORW(opimm16, opax)
ctx.PABSB(opm128, opxmm)
ctx.PABSD(opm128, opxmm)
ctx.PABSW(opm128, opxmm)
ctx.PACKSSLW(opm128, opxmm)
ctx.PACKSSWB(opm128, opxmm)
ctx.PACKUSDW(opm128, opxmm)
ctx.PACKUSWB(opm128, opxmm)
ctx.PADDB(opm128, opxmm)
ctx.PADDD(opm128, opxmm)
ctx.PADDL(opm128, opxmm)
ctx.PADDQ(opm128, opxmm)
ctx.PADDSB(opm128, opxmm)
ctx.PADDSW(opm128, opxmm)
ctx.PADDUSB(opm128, opxmm)
ctx.PADDUSW(opm128, opxmm)
ctx.PADDW(opm128, opxmm)
ctx.PALIGNR(opimm8, opm128, opxmm)
ctx.PAND(opm128, opxmm)
ctx.PANDN(opm128, opxmm)
ctx.PAUSE()
ctx.PAVGB(opm128, opxmm)
ctx.PAVGW(opm128, opxmm)
ctx.PBLENDVB(opxmm0, opm128, opxmm)
ctx.PBLENDW(opimm8, opm128, opxmm)
ctx.PCLMULQDQ(opimm8, opm128, opxmm)
ctx.PCMPEQB(opm128, opxmm)
ctx.PCMPEQL(opm128, opxmm)
ctx.PCMPEQQ(opm128, opxmm)
ctx.PCMPEQW(opm128, opxmm)
ctx.PCMPESTRI(opimm8, opm128, opxmm)
ctx.PCMPESTRM(opimm8, opm128, opxmm)
ctx.PCMPGTB(opm128, opxmm)
ctx.PCMPGTL(opm128, opxmm)
ctx.PCMPGTQ(opm128, opxmm)
ctx.PCMPGTW(opm128, opxmm)
ctx.PCMPISTRI(opimm8, opm128, opxmm)
ctx.PCMPISTRM(opimm8, opm128, opxmm)
ctx.PDEPL(opm32, opr32, opr32)
ctx.PDEPQ(opm64, opr64, opr64)
ctx.PEXTL(opm32, opr32, opr32)
ctx.PEXTQ(opm64, opr64, opr64)
ctx.PEXTRB(opimm8, opxmm, opm8)
ctx.PEXTRD(opimm8, opxmm, opm32)
ctx.PEXTRQ(opimm8, opxmm, opm64)
ctx.PEXTRW(opimm8, opxmm, opm16)
ctx.PHADDD(opm128, opxmm)
ctx.PHADDSW(opm128, opxmm)
ctx.PHADDW(opm128, opxmm)
ctx.PHMINPOSUW(opm128, opxmm)
ctx.PHSUBD(opm128, opxmm)
ctx.PHSUBSW(opm128, opxmm)
ctx.PHSUBW(opm128, opxmm)
ctx.PINSRB(opimm8, opm8, opxmm)
ctx.PINSRD(opimm8, opm32, opxmm)
ctx.PINSRQ(opimm8, opm64, opxmm)
ctx.PINSRW(opimm8, opm16, opxmm)
ctx.PMADDUBSW(opm128, opxmm)
ctx.PMADDWL(opm128, opxmm)
ctx.PMAXSB(opm128, opxmm)
ctx.PMAXSD(opm128, opxmm)
ctx.PMAXSW(opm128, opxmm)
ctx.PMAXUB(opm128, opxmm)
ctx.PMAXUD(opm128, opxmm)
ctx.PMAXUW(opm128, opxmm)
ctx.PMINSB(opm128, opxmm)
ctx.PMINSD(opm128, opxmm)
ctx.PMINSW(opm128, opxmm)
ctx.PMINUB(opm128, opxmm)
ctx.PMINUD(opm128, opxmm)
ctx.PMINUW(opm128, opxmm)
ctx.PMOVMSKB(opxmm, opr32)
ctx.PMOVSXBD(opm32, opxmm)
ctx.PMOVSXBQ(opm16, opxmm)
ctx.PMOVSXBW(opm64, opxmm)
ctx.PMOVSXDQ(opm64, opxmm)
ctx.PMOVSXWD(opm64, opxmm)
ctx.PMOVSXWQ(opm32, opxmm)
ctx.PMOVZXBD(opm32, opxmm)
ctx.PMOVZXBQ(opm16, opxmm)
ctx.PMOVZXBW(opm64, opxmm)
ctx.PMOVZXDQ(opm64, opxmm)
ctx.PMOVZXWD(opm64, opxmm)
ctx.PMOVZXWQ(opm32, opxmm)
ctx.PMULDQ(opm128, opxmm)
ctx.PMULHRSW(opm128, opxmm)
ctx.PMULHUW(opm128, opxmm)
ctx.PMULHW(opm128, opxmm)
ctx.PMULLD(opm128, opxmm)
ctx.PMULLW(opm128, opxmm)
ctx.PMULULQ(opm128, opxmm)
ctx.POPCNTL(opm32, opr32)
ctx.POPCNTQ(opm64, opr64)
ctx.POPCNTW(opm16, opr16)
ctx.POPQ(opm64)
ctx.POPW(opm16)
ctx.POR(opm128, opxmm)
ctx.PREFETCHNTA(opm8)
ctx.PREFETCHT0(opm8)
ctx.PREFETCHT1(opm8)
ctx.PREFETCHT2(opm8)
ctx.PSADBW(opm128, opxmm)
ctx.PSHUFB(opm128, opxmm)
ctx.PSHUFD(opimm8, opm128, opxmm)
ctx.PSHUFHW(opimm8, opm128, opxmm)
ctx.PSHUFL(opimm8, opm128, opxmm)
ctx.PSHUFLW(opimm8, opm128, opxmm)
ctx.PSIGNB(opm128, opxmm)
ctx.PSIGND(opm128, opxmm)
ctx.PSIGNW(opm128, opxmm)
ctx.PSLLDQ(opimm8, opxmm)
ctx.PSLLL(opimm8, opxmm)
ctx.PSLLO(opimm8, opxmm)
ctx.PSLLQ(opimm8, opxmm)
ctx.PSLLW(opimm8, opxmm)
ctx.PSRAL(opimm8, opxmm)
ctx.PSRAW(opimm8, opxmm)
ctx.PSRLDQ(opimm8, opxmm)
ctx.PSRLL(opimm8, opxmm)
ctx.PSRLO(opimm8, opxmm)
ctx.PSRLQ(opimm8, opxmm)
ctx.PSRLW(opimm8, opxmm)
ctx.PSUBB(opm128, opxmm)
ctx.PSUBL(opm128, opxmm)
ctx.PSUBQ(opm128, opxmm)
ctx.PSUBSB(opm128, opxmm)
ctx.PSUBSW(opm128, opxmm)
ctx.PSUBUSB(opm128, opxmm)
ctx.PSUBUSW(opm128, opxmm)
ctx.PSUBW(opm128, opxmm)
ctx.PTEST(opm128, opxmm)
ctx.PUNPCKHBW(opm128, opxmm)
ctx.PUNPCKHLQ(opm128, opxmm)
ctx.PUNPCKHQDQ(opm128, opxmm)
ctx.PUNPCKHWL(opm128, opxmm)
ctx.PUNPCKLBW(opm128, opxmm)
ctx.PUNPCKLLQ(opm128, opxmm)
ctx.PUNPCKLQDQ(opm128, opxmm)
ctx.PUNPCKLWL(opm128, opxmm)
ctx.PUSHQ(opimm32)
ctx.PUSHW(opm16)
ctx.PXOR(opm128, opxmm)
ctx.RCLB(op1, opm8)
ctx.RCLL(op1, opm32)
ctx.RCLQ(op1, opm64)
ctx.RCLW(op1, opm16)
ctx.RCPPS(opm128, opxmm)
ctx.RCPSS(opm32, opxmm)
ctx.RCRB(op1, opm8)
ctx.RCRL(op1, opm32)
ctx.RCRQ(op1, opm64)
ctx.RCRW(op1, opm16)
ctx.RDRANDL(opr16)
ctx.RDSEEDL(opr16)
ctx.RDTSC()
ctx.RDTSCP()
ctx.RET()
ctx.RETFL(opimm16)
ctx.RETFQ(opimm16)
ctx.RETFW(opimm16)
ctx.ROLB(op1, opm8)
ctx.ROLL(op1, opm32)
ctx.ROLQ(op1, opm64)
ctx.ROLW(op1, opm16)
ctx.RORB(op1, opm8)
ctx.RORL(op1, opm32)
ctx.RORQ(op1, opm64)
ctx.RORW(op1, opm16)
ctx.RORXL(opimm8, opm32, opr32)
ctx.RORXQ(opimm8, opm64, opr64)
ctx.ROUNDPD(opimm8, opm128, opxmm)
ctx.ROUNDPS(opimm8, opm128, opxmm)
ctx.ROUNDSD(opimm8, opm64, opxmm)
ctx.ROUNDSS(opimm8, opm32, opxmm)
ctx.RSQRTPS(opm128, opxmm)
ctx.RSQRTSS(opm32, opxmm)
ctx.SALB(op1, opm8)
ctx.SALL(op1, opm32)
ctx.SALQ(op1, opm64)
ctx.SALW(op1, opm16)
ctx.SARB(op1, opm8)
ctx.SARL(op1, opm32)
ctx.SARQ(op1, opm64)
ctx.SARW(op1, opm16)
ctx.SARXL(opr32, opm32, opr32)
ctx.SARXQ(opr64, opm64, opr64)
ctx.SBBB(opimm8, opal)
ctx.SBBL(opimm32, opeax)
ctx.SBBQ(opimm32, opm64)
ctx.SBBW(opimm16, opax)
ctx.SETCC(opm8)
ctx.SETCS(opm8)
ctx.SETEQ(opm8)
ctx.SETGE(opm8)
ctx.SETGT(opm8)
ctx.SETHI(opm8)
ctx.SETLE(opm8)
ctx.SETLS(opm8)
ctx.SETLT(opm8)
ctx.SETMI(opm8)
ctx.SETNE(opm8)
ctx.SETOC(opm8)
ctx.SETOS(opm8)
ctx.SETPC(opm8)
ctx.SETPL(opm8)
ctx.SETPS(opm8)
ctx.SFENCE()
ctx.SHA1MSG1(opm128, opxmm)
ctx.SHA1MSG2(opm128, opxmm)
ctx.SHA1NEXTE(opm128, opxmm)
ctx.SHA1RNDS4(opimm2u, opm128, opxmm)
ctx.SHA256MSG1(opm128, opxmm)
ctx.SHA256MSG2(opm128, opxmm)
ctx.SHA256RNDS2(opxmm0, opm128, opxmm)
ctx.SHLB(op1, opm8)
ctx.SHLL(op1, opm32)
ctx.SHLQ(op1, opm64)
ctx.SHLW(op1, opm16)
ctx.SHLXL(opr32, opm32, opr32)
ctx.SHLXQ(opr64, opm64, opr64)
ctx.SHRB(op1, opm8)
ctx.SHRL(op1, opm32)
ctx.SHRQ(op1, opm64)
ctx.SHRW(op1, opm16)
ctx.SHRXL(opr32, opm32, opr32)
ctx.SHRXQ(opr64, opm64, opr64)
ctx.SHUFPD(opimm8, opm128, opxmm)
ctx.SHUFPS(opimm8, opm128, opxmm)
ctx.SQRTPD(opm128, opxmm)
ctx.SQRTPS(opm128, opxmm)
ctx.SQRTSD(opm64, opxmm)
ctx.SQRTSS(opm32, opxmm)
ctx.STC()
ctx.STD()
ctx.STMXCSR(opm32)
ctx.SUBB(opimm8, opal)
ctx.SUBL(opimm32, opeax)
ctx.SUBPD(opm128, opxmm)
ctx.SUBPS(opm128, opxmm)
ctx.SUBQ(opimm32, opm64)
ctx.SUBSD(opm64, opxmm)
ctx.SUBSS(opm32, opxmm)
ctx.SUBW(opimm16, opax)
ctx.SYSCALL()
ctx.TESTB(opimm8, opal)
ctx.TESTL(opimm32, opeax)
ctx.TESTQ(opimm32, opm64)
ctx.TESTW(opimm16, opax)
ctx.TZCNTL(opm32, opr32)
ctx.TZCNTQ(opm64, opr64)
ctx.TZCNTW(opm16, opr16)
ctx.UCOMISD(opm64, opxmm)
ctx.UCOMISS(opm32, opxmm)
ctx.UD2()
ctx.UNPCKHPD(opm128, opxmm)
ctx.UNPCKHPS(opm128, opxmm)
ctx.UNPCKLPD(opm128, opxmm)
ctx.UNPCKLPS(opm128, opxmm)
ctx.VADDPD(opm128, opxmm, opxmm)
ctx.VADDPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VADDPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VADDPD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPD_Z(opm128, opxmm, opk, opxmm)
ctx.VADDPS(opm128, opxmm, opxmm)
ctx.VADDPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VADDPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VADDPS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VADDPS_Z(opm128, opxmm, opk, opxmm)
ctx.VADDSD(opm64, opxmm, opxmm)
ctx.VADDSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSD_Z(opm64, opxmm, opk, opxmm)
ctx.VADDSS(opm32, opxmm, opxmm)
ctx.VADDSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VADDSS_Z(opm32, opxmm, opk, opxmm)
ctx.VADDSUBPD(opm128, opxmm, opxmm)
ctx.VADDSUBPS(opm128, opxmm, opxmm)
ctx.VAESDEC(opm128, opxmm, opxmm)
ctx.VAESDECLAST(opm128, opxmm, opxmm)
ctx.VAESENC(opm128, opxmm, opxmm)
ctx.VAESENCLAST(opm128, opxmm, opxmm)
ctx.VAESIMC(opm128, opxmm)
ctx.VAESKEYGENASSIST(opimm8, opm128, opxmm)
ctx.VALIGND(opimm8, opm128, opxmm, opk, opxmm)
ctx.VALIGND_BCST(opimm8, opm32, opxmm, opk, opxmm)
ctx.VALIGND_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VALIGND_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VALIGNQ(opimm8, opm128, opxmm, opk, opxmm)
ctx.VALIGNQ_BCST(opimm8, opm64, opxmm, opk, opxmm)
ctx.VALIGNQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VALIGNQ_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VANDNPD(opm128, opxmm, opxmm)
ctx.VANDNPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VANDNPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VANDNPD_Z(opm128, opxmm, opk, opxmm)
ctx.VANDNPS(opm128, opxmm, opxmm)
ctx.VANDNPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VANDNPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VANDNPS_Z(opm128, opxmm, opk, opxmm)
ctx.VANDPD(opm128, opxmm, opxmm)
ctx.VANDPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VANDPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VANDPD_Z(opm128, opxmm, opk, opxmm)
ctx.VANDPS(opm128, opxmm, opxmm)
ctx.VANDPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VANDPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VANDPS_Z(opm128, opxmm, opk, opxmm)
ctx.VBLENDMPD(opm128, opxmm, opk, opxmm)
ctx.VBLENDMPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VBLENDMPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VBLENDMPD_Z(opm128, opxmm, opk, opxmm)
ctx.VBLENDMPS(opm128, opxmm, opk, opxmm)
ctx.VBLENDMPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VBLENDMPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VBLENDMPS_Z(opm128, opxmm, opk, opxmm)
ctx.VBLENDPD(opimm8, opm128, opxmm, opxmm)
ctx.VBLENDPS(opimm8, opm128, opxmm, opxmm)
ctx.VBLENDVPD(opxmm, opm128, opxmm, opxmm)
ctx.VBLENDVPS(opxmm, opm128, opxmm, opxmm)
ctx.VBROADCASTF128(opm128, opymm)
ctx.VBROADCASTF32X2(opm64, opk, opymm)
ctx.VBROADCASTF32X2_Z(opm64, opk, opymm)
ctx.VBROADCASTF32X4(opm128, opk, opymm)
ctx.VBROADCASTF32X4_Z(opm128, opk, opymm)
ctx.VBROADCASTF32X8(opm256, opk, opzmm)
ctx.VBROADCASTF32X8_Z(opm256, opk, opzmm)
ctx.VBROADCASTF64X2(opm128, opk, opymm)
ctx.VBROADCASTF64X2_Z(opm128, opk, opymm)
ctx.VBROADCASTF64X4(opm256, opk, opzmm)
ctx.VBROADCASTF64X4_Z(opm256, opk, opzmm)
ctx.VBROADCASTI128(opm128, opymm)
ctx.VBROADCASTI32X2(opm64, opk, opxmm)
ctx.VBROADCASTI32X2_Z(opm64, opk, opxmm)
ctx.VBROADCASTI32X4(opm128, opk, opymm)
ctx.VBROADCASTI32X4_Z(opm128, opk, opymm)
ctx.VBROADCASTI32X8(opm256, opk, opzmm)
ctx.VBROADCASTI32X8_Z(opm256, opk, opzmm)
ctx.VBROADCASTI64X2(opm128, opk, opymm)
ctx.VBROADCASTI64X2_Z(opm128, opk, opymm)
ctx.VBROADCASTI64X4(opm256, opk, opzmm)
ctx.VBROADCASTI64X4_Z(opm256, opk, opzmm)
ctx.VBROADCASTSD(opxmm, opymm)
ctx.VBROADCASTSD_Z(opm64, opk, opymm)
ctx.VBROADCASTSS(opxmm, opxmm)
ctx.VBROADCASTSS_Z(opm32, opk, opymm)
ctx.VCMPPD(opimm8, opm128, opxmm, opxmm)
ctx.VCMPPD_BCST(opimm8, opm64, opxmm, opk, opk)
ctx.VCMPPD_SAE(opimm8, opzmm, opzmm, opk, opk)
ctx.VCMPPS(opimm8, opm128, opxmm, opxmm)
ctx.VCMPPS_BCST(opimm8, opm32, opxmm, opk, opk)
ctx.VCMPPS_SAE(opimm8, opzmm, opzmm, opk, opk)
ctx.VCMPSD(opimm8, opm64, opxmm, opxmm)
ctx.VCMPSD_SAE(opimm8, opxmm, opxmm, opk, opk)
ctx.VCMPSS(opimm8, opm32, opxmm, opxmm)
ctx.VCMPSS_SAE(opimm8, opxmm, opxmm, opk, opk)
ctx.VCOMISD(opm64, opxmm)
ctx.VCOMISD_SAE(opxmm, opxmm)
ctx.VCOMISS(opm32, opxmm)
ctx.VCOMISS_SAE(opxmm, opxmm)
ctx.VCOMPRESSPD(opxmm, opk, opm128)
ctx.VCOMPRESSPD_Z(opxmm, opk, opm128)
ctx.VCOMPRESSPS(opxmm, opk, opm128)
ctx.VCOMPRESSPS_Z(opxmm, opk, opm128)
ctx.VCVTDQ2PD(opm128, opymm)
ctx.VCVTDQ2PD_BCST(opm32, opk, opxmm)
ctx.VCVTDQ2PD_BCST_Z(opm32, opk, opxmm)
ctx.VCVTDQ2PD_Z(opm128, opk, opymm)
ctx.VCVTDQ2PS(opm128, opxmm)
ctx.VCVTDQ2PS_BCST(opm32, opk, opxmm)
ctx.VCVTDQ2PS_BCST_Z(opm32, opk, opxmm)
ctx.VCVTDQ2PS_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTDQ2PS_Z(opm128, opk, opxmm)
ctx.VCVTPD2DQ(opm512, opk, opymm)
ctx.VCVTPD2DQX(opm128, opxmm)
ctx.VCVTPD2DQX_BCST(opm64, opk, opxmm)
ctx.VCVTPD2DQX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2DQX_Z(opm128, opk, opxmm)
ctx.VCVTPD2DQY(opm256, opxmm)
ctx.VCVTPD2DQY_BCST(opm64, opk, opxmm)
ctx.VCVTPD2DQY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2DQY_Z(opm256, opk, opxmm)
ctx.VCVTPD2DQ_BCST(opm64, opk, opymm)
ctx.VCVTPD2DQ_BCST_Z(opm64, opk, opymm)
ctx.VCVTPD2DQ_RD_SAE(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RD_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RN_SAE(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RN_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RU_SAE(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RU_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RZ_SAE(opzmm, opk, opymm)
ctx.VCVTPD2DQ_RZ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2DQ_Z(opm512, opk, opymm)
ctx.VCVTPD2PS(opm512, opk, opymm)
ctx.VCVTPD2PSX(opm128, opxmm)
ctx.VCVTPD2PSX_BCST(opm64, opk, opxmm)
ctx.VCVTPD2PSX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2PSX_Z(opm128, opk, opxmm)
ctx.VCVTPD2PSY(opm256, opxmm)
ctx.VCVTPD2PSY_BCST(opm64, opk, opxmm)
ctx.VCVTPD2PSY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2PSY_Z(opm256, opk, opxmm)
ctx.VCVTPD2PS_BCST(opm64, opk, opymm)
ctx.VCVTPD2PS_BCST_Z(opm64, opk, opymm)
ctx.VCVTPD2PS_RD_SAE(opzmm, opk, opymm)
ctx.VCVTPD2PS_RD_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2PS_RN_SAE(opzmm, opk, opymm)
ctx.VCVTPD2PS_RN_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2PS_RU_SAE(opzmm, opk, opymm)
ctx.VCVTPD2PS_RU_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2PS_RZ_SAE(opzmm, opk, opymm)
ctx.VCVTPD2PS_RZ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2PS_Z(opm512, opk, opymm)
ctx.VCVTPD2QQ(opm128, opk, opxmm)
ctx.VCVTPD2QQ_BCST(opm64, opk, opxmm)
ctx.VCVTPD2QQ_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2QQ_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2QQ_Z(opm128, opk, opxmm)
ctx.VCVTPD2UDQ(opm512, opk, opymm)
ctx.VCVTPD2UDQX(opm128, opk, opxmm)
ctx.VCVTPD2UDQX_BCST(opm64, opk, opxmm)
ctx.VCVTPD2UDQX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2UDQX_Z(opm128, opk, opxmm)
ctx.VCVTPD2UDQY(opm256, opk, opxmm)
ctx.VCVTPD2UDQY_BCST(opm64, opk, opxmm)
ctx.VCVTPD2UDQY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2UDQY_Z(opm256, opk, opxmm)
ctx.VCVTPD2UDQ_BCST(opm64, opk, opymm)
ctx.VCVTPD2UDQ_BCST_Z(opm64, opk, opymm)
ctx.VCVTPD2UDQ_RD_SAE(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RD_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RN_SAE(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RN_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RU_SAE(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RU_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RZ_SAE(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_RZ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTPD2UDQ_Z(opm512, opk, opymm)
ctx.VCVTPD2UQQ(opm128, opk, opxmm)
ctx.VCVTPD2UQQ_BCST(opm64, opk, opxmm)
ctx.VCVTPD2UQQ_BCST_Z(opm64, opk, opxmm)
ctx.VCVTPD2UQQ_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPD2UQQ_Z(opm128, opk, opxmm)
ctx.VCVTPH2PS(opm128, opymm)
ctx.VCVTPH2PS_SAE(opymm, opk, opzmm)
ctx.VCVTPH2PS_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPH2PS_Z(opm128, opk, opymm)
ctx.VCVTPS2DQ(opm128, opxmm)
ctx.VCVTPS2DQ_BCST(opm32, opk, opxmm)
ctx.VCVTPS2DQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTPS2DQ_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2DQ_Z(opm128, opk, opxmm)
ctx.VCVTPS2PD(opm128, opymm)
ctx.VCVTPS2PD_BCST(opm32, opk, opxmm)
ctx.VCVTPS2PD_BCST_Z(opm32, opk, opxmm)
ctx.VCVTPS2PD_SAE(opymm, opk, opzmm)
ctx.VCVTPS2PD_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2PD_Z(opm64, opk, opxmm)
ctx.VCVTPS2PH(opimm8, opxmm, opm64)
ctx.VCVTPS2PH_SAE(opimm8, opzmm, opk, opymm)
ctx.VCVTPS2PH_SAE_Z(opimm8, opzmm, opk, opymm)
ctx.VCVTPS2PH_Z(opimm8, opxmm, opk, opm64)
ctx.VCVTPS2QQ(opm128, opk, opymm)
ctx.VCVTPS2QQ_BCST(opm32, opk, opxmm)
ctx.VCVTPS2QQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTPS2QQ_RD_SAE(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RD_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RN_SAE(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RN_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RU_SAE(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RU_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RZ_SAE(opymm, opk, opzmm)
ctx.VCVTPS2QQ_RZ_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2QQ_Z(opm128, opk, opymm)
ctx.VCVTPS2UDQ(opm128, opk, opxmm)
ctx.VCVTPS2UDQ_BCST(opm32, opk, opxmm)
ctx.VCVTPS2UDQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTPS2UDQ_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTPS2UDQ_Z(opm128, opk, opxmm)
ctx.VCVTPS2UQQ(opm128, opk, opymm)
ctx.VCVTPS2UQQ_BCST(opm32, opk, opxmm)
ctx.VCVTPS2UQQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTPS2UQQ_RD_SAE(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RD_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RN_SAE(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RN_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RU_SAE(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RU_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RZ_SAE(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_RZ_SAE_Z(opymm, opk, opzmm)
ctx.VCVTPS2UQQ_Z(opm128, opk, opymm)
ctx.VCVTQQ2PD(opm128, opk, opxmm)
ctx.VCVTQQ2PD_BCST(opm64, opk, opxmm)
ctx.VCVTQQ2PD_BCST_Z(opm64, opk, opxmm)
ctx.VCVTQQ2PD_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTQQ2PD_Z(opm128, opk, opxmm)
ctx.VCVTQQ2PS(opm512, opk, opymm)
ctx.VCVTQQ2PSX(opm128, opk, opxmm)
ctx.VCVTQQ2PSX_BCST(opm64, opk, opxmm)
ctx.VCVTQQ2PSX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTQQ2PSX_Z(opm128, opk, opxmm)
ctx.VCVTQQ2PSY(opm256, opk, opxmm)
ctx.VCVTQQ2PSY_BCST(opm64, opk, opxmm)
ctx.VCVTQQ2PSY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTQQ2PSY_Z(opm256, opk, opxmm)
ctx.VCVTQQ2PS_BCST(opm64, opk, opymm)
ctx.VCVTQQ2PS_BCST_Z(opm64, opk, opymm)
ctx.VCVTQQ2PS_RD_SAE(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RD_SAE_Z(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RN_SAE(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RN_SAE_Z(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RU_SAE(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RU_SAE_Z(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RZ_SAE(opzmm, opk, opymm)
ctx.VCVTQQ2PS_RZ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTQQ2PS_Z(opm512, opk, opymm)
ctx.VCVTSD2SI(opm64, opr32)
ctx.VCVTSD2SIQ(opm64, opr64)
ctx.VCVTSD2SIQ_RD_SAE(opxmm, opr64)
ctx.VCVTSD2SIQ_RN_SAE(opxmm, opr64)
ctx.VCVTSD2SIQ_RU_SAE(opxmm, opr64)
ctx.VCVTSD2SIQ_RZ_SAE(opxmm, opr64)
ctx.VCVTSD2SI_RD_SAE(opxmm, opr32)
ctx.VCVTSD2SI_RN_SAE(opxmm, opr32)
ctx.VCVTSD2SI_RU_SAE(opxmm, opr32)
ctx.VCVTSD2SI_RZ_SAE(opxmm, opr32)
ctx.VCVTSD2SS(opm64, opxmm, opxmm)
ctx.VCVTSD2SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VCVTSD2SS_Z(opm64, opxmm, opk, opxmm)
ctx.VCVTSD2USIL(opm64, opr32)
ctx.VCVTSD2USIL_RD_SAE(opxmm, opr32)
ctx.VCVTSD2USIL_RN_SAE(opxmm, opr32)
ctx.VCVTSD2USIL_RU_SAE(opxmm, opr32)
ctx.VCVTSD2USIL_RZ_SAE(opxmm, opr32)
ctx.VCVTSD2USIQ(opm64, opr64)
ctx.VCVTSD2USIQ_RD_SAE(opxmm, opr64)
ctx.VCVTSD2USIQ_RN_SAE(opxmm, opr64)
ctx.VCVTSD2USIQ_RU_SAE(opxmm, opr64)
ctx.VCVTSD2USIQ_RZ_SAE(opxmm, opr64)
ctx.VCVTSI2SDL(opm32, opxmm, opxmm)
ctx.VCVTSI2SDQ(opm64, opxmm, opxmm)
ctx.VCVTSI2SDQ_RD_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SDQ_RN_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SDQ_RU_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SDQ_RZ_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SSL(opm32, opxmm, opxmm)
ctx.VCVTSI2SSL_RD_SAE(opr32, opxmm, opxmm)
ctx.VCVTSI2SSL_RN_SAE(opr32, opxmm, opxmm)
ctx.VCVTSI2SSL_RU_SAE(opr32, opxmm, opxmm)
ctx.VCVTSI2SSL_RZ_SAE(opr32, opxmm, opxmm)
ctx.VCVTSI2SSQ(opm64, opxmm, opxmm)
ctx.VCVTSI2SSQ_RD_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SSQ_RN_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SSQ_RU_SAE(opr64, opxmm, opxmm)
ctx.VCVTSI2SSQ_RZ_SAE(opr64, opxmm, opxmm)
ctx.VCVTSS2SD(opm32, opxmm, opxmm)
ctx.VCVTSS2SD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VCVTSS2SD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VCVTSS2SD_Z(opm32, opxmm, opk, opxmm)
ctx.VCVTSS2SI(opm32, opr32)
ctx.VCVTSS2SIQ(opm32, opr64)
ctx.VCVTSS2SIQ_RD_SAE(opxmm, opr64)
ctx.VCVTSS2SIQ_RN_SAE(opxmm, opr64)
ctx.VCVTSS2SIQ_RU_SAE(opxmm, opr64)
ctx.VCVTSS2SIQ_RZ_SAE(opxmm, opr64)
ctx.VCVTSS2SI_RD_SAE(opxmm, opr32)
ctx.VCVTSS2SI_RN_SAE(opxmm, opr32)
ctx.VCVTSS2SI_RU_SAE(opxmm, opr32)
ctx.VCVTSS2SI_RZ_SAE(opxmm, opr32)
ctx.VCVTSS2USIL(opm32, opr32)
ctx.VCVTSS2USIL_RD_SAE(opxmm, opr32)
ctx.VCVTSS2USIL_RN_SAE(opxmm, opr32)
ctx.VCVTSS2USIL_RU_SAE(opxmm, opr32)
ctx.VCVTSS2USIL_RZ_SAE(opxmm, opr32)
ctx.VCVTSS2USIQ(opm32, opr64)
ctx.VCVTSS2USIQ_RD_SAE(opxmm, opr64)
ctx.VCVTSS2USIQ_RN_SAE(opxmm, opr64)
ctx.VCVTSS2USIQ_RU_SAE(opxmm, opr64)
ctx.VCVTSS2USIQ_RZ_SAE(opxmm, opr64)
ctx.VCVTTPD2DQ(opm512, opk, opymm)
ctx.VCVTTPD2DQX(opm128, opxmm)
ctx.VCVTTPD2DQX_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2DQX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2DQX_Z(opm128, opk, opxmm)
ctx.VCVTTPD2DQY(opm256, opxmm)
ctx.VCVTTPD2DQY_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2DQY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2DQY_Z(opm256, opk, opxmm)
ctx.VCVTTPD2DQ_BCST(opm64, opk, opymm)
ctx.VCVTTPD2DQ_BCST_Z(opm64, opk, opymm)
ctx.VCVTTPD2DQ_SAE(opzmm, opk, opymm)
ctx.VCVTTPD2DQ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTTPD2DQ_Z(opm512, opk, opymm)
ctx.VCVTTPD2QQ(opm128, opk, opxmm)
ctx.VCVTTPD2QQ_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2QQ_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2QQ_SAE(opzmm, opk, opzmm)
ctx.VCVTTPD2QQ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTTPD2QQ_Z(opm128, opk, opxmm)
ctx.VCVTTPD2UDQ(opm512, opk, opymm)
ctx.VCVTTPD2UDQX(opm128, opk, opxmm)
ctx.VCVTTPD2UDQX_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2UDQX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2UDQX_Z(opm128, opk, opxmm)
ctx.VCVTTPD2UDQY(opm256, opk, opxmm)
ctx.VCVTTPD2UDQY_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2UDQY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2UDQY_Z(opm256, opk, opxmm)
ctx.VCVTTPD2UDQ_BCST(opm64, opk, opymm)
ctx.VCVTTPD2UDQ_BCST_Z(opm64, opk, opymm)
ctx.VCVTTPD2UDQ_SAE(opzmm, opk, opymm)
ctx.VCVTTPD2UDQ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTTPD2UDQ_Z(opm512, opk, opymm)
ctx.VCVTTPD2UQQ(opm128, opk, opxmm)
ctx.VCVTTPD2UQQ_BCST(opm64, opk, opxmm)
ctx.VCVTTPD2UQQ_BCST_Z(opm64, opk, opxmm)
ctx.VCVTTPD2UQQ_SAE(opzmm, opk, opzmm)
ctx.VCVTTPD2UQQ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTTPD2UQQ_Z(opm128, opk, opxmm)
ctx.VCVTTPS2DQ(opm128, opxmm)
ctx.VCVTTPS2DQ_BCST(opm32, opk, opxmm)
ctx.VCVTTPS2DQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTTPS2DQ_SAE(opzmm, opk, opzmm)
ctx.VCVTTPS2DQ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTTPS2DQ_Z(opm128, opk, opxmm)
ctx.VCVTTPS2QQ(opm128, opk, opymm)
ctx.VCVTTPS2QQ_BCST(opm32, opk, opxmm)
ctx.VCVTTPS2QQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTTPS2QQ_SAE(opymm, opk, opzmm)
ctx.VCVTTPS2QQ_SAE_Z(opymm, opk, opzmm)
ctx.VCVTTPS2QQ_Z(opm128, opk, opymm)
ctx.VCVTTPS2UDQ(opm128, opk, opxmm)
ctx.VCVTTPS2UDQ_BCST(opm32, opk, opxmm)
ctx.VCVTTPS2UDQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTTPS2UDQ_SAE(opzmm, opk, opzmm)
ctx.VCVTTPS2UDQ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTTPS2UDQ_Z(opm128, opk, opxmm)
ctx.VCVTTPS2UQQ(opm128, opk, opymm)
ctx.VCVTTPS2UQQ_BCST(opm32, opk, opxmm)
ctx.VCVTTPS2UQQ_BCST_Z(opm32, opk, opxmm)
ctx.VCVTTPS2UQQ_SAE(opymm, opk, opzmm)
ctx.VCVTTPS2UQQ_SAE_Z(opymm, opk, opzmm)
ctx.VCVTTPS2UQQ_Z(opm128, opk, opymm)
ctx.VCVTTSD2SI(opm64, opr32)
ctx.VCVTTSD2SIQ(opm64, opr64)
ctx.VCVTTSD2SIQ_SAE(opxmm, opr64)
ctx.VCVTTSD2SI_SAE(opxmm, opr32)
ctx.VCVTTSD2USIL(opm64, opr32)
ctx.VCVTTSD2USIL_SAE(opxmm, opr32)
ctx.VCVTTSD2USIQ(opm64, opr64)
ctx.VCVTTSD2USIQ_SAE(opxmm, opr64)
ctx.VCVTTSS2SI(opm32, opr32)
ctx.VCVTTSS2SIQ(opm32, opr64)
ctx.VCVTTSS2SIQ_SAE(opxmm, opr64)
ctx.VCVTTSS2SI_SAE(opxmm, opr32)
ctx.VCVTTSS2USIL(opm32, opr32)
ctx.VCVTTSS2USIL_SAE(opxmm, opr32)
ctx.VCVTTSS2USIQ(opm32, opr64)
ctx.VCVTTSS2USIQ_SAE(opxmm, opr64)
ctx.VCVTUDQ2PD(opm128, opk, opymm)
ctx.VCVTUDQ2PD_BCST(opm32, opk, opxmm)
ctx.VCVTUDQ2PD_BCST_Z(opm32, opk, opxmm)
ctx.VCVTUDQ2PD_Z(opm128, opk, opymm)
ctx.VCVTUDQ2PS(opm128, opk, opxmm)
ctx.VCVTUDQ2PS_BCST(opm32, opk, opxmm)
ctx.VCVTUDQ2PS_BCST_Z(opm32, opk, opxmm)
ctx.VCVTUDQ2PS_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUDQ2PS_Z(opm128, opk, opxmm)
ctx.VCVTUQQ2PD(opm128, opk, opxmm)
ctx.VCVTUQQ2PD_BCST(opm64, opk, opxmm)
ctx.VCVTUQQ2PD_BCST_Z(opm64, opk, opxmm)
ctx.VCVTUQQ2PD_RD_SAE(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RN_SAE(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RU_SAE(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RZ_SAE(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VCVTUQQ2PD_Z(opm128, opk, opxmm)
ctx.VCVTUQQ2PS(opm512, opk, opymm)
ctx.VCVTUQQ2PSX(opm128, opk, opxmm)
ctx.VCVTUQQ2PSX_BCST(opm64, opk, opxmm)
ctx.VCVTUQQ2PSX_BCST_Z(opm64, opk, opxmm)
ctx.VCVTUQQ2PSX_Z(opm128, opk, opxmm)
ctx.VCVTUQQ2PSY(opm256, opk, opxmm)
ctx.VCVTUQQ2PSY_BCST(opm64, opk, opxmm)
ctx.VCVTUQQ2PSY_BCST_Z(opm64, opk, opxmm)
ctx.VCVTUQQ2PSY_Z(opm256, opk, opxmm)
ctx.VCVTUQQ2PS_BCST(opm64, opk, opymm)
ctx.VCVTUQQ2PS_BCST_Z(opm64, opk, opymm)
ctx.VCVTUQQ2PS_RD_SAE(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RD_SAE_Z(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RN_SAE(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RN_SAE_Z(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RU_SAE(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RU_SAE_Z(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RZ_SAE(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_RZ_SAE_Z(opzmm, opk, opymm)
ctx.VCVTUQQ2PS_Z(opm512, opk, opymm)
ctx.VCVTUSI2SDL(opm32, opxmm, opxmm)
ctx.VCVTUSI2SDQ(opm64, opxmm, opxmm)
ctx.VCVTUSI2SDQ_RD_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SDQ_RN_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SDQ_RU_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SDQ_RZ_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SSL(opm32, opxmm, opxmm)
ctx.VCVTUSI2SSL_RD_SAE(opr32, opxmm, opxmm)
ctx.VCVTUSI2SSL_RN_SAE(opr32, opxmm, opxmm)
ctx.VCVTUSI2SSL_RU_SAE(opr32, opxmm, opxmm)
ctx.VCVTUSI2SSL_RZ_SAE(opr32, opxmm, opxmm)
ctx.VCVTUSI2SSQ(opm64, opxmm, opxmm)
ctx.VCVTUSI2SSQ_RD_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SSQ_RN_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SSQ_RU_SAE(opr64, opxmm, opxmm)
ctx.VCVTUSI2SSQ_RZ_SAE(opr64, opxmm, opxmm)
ctx.VDBPSADBW(opimm8, opm128, opxmm, opk, opxmm)
ctx.VDBPSADBW_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VDIVPD(opm128, opxmm, opxmm)
ctx.VDIVPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VDIVPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VDIVPD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPD_Z(opm128, opxmm, opk, opxmm)
ctx.VDIVPS(opm128, opxmm, opxmm)
ctx.VDIVPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VDIVPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VDIVPS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VDIVPS_Z(opm128, opxmm, opk, opxmm)
ctx.VDIVSD(opm64, opxmm, opxmm)
ctx.VDIVSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSD_Z(opm64, opxmm, opk, opxmm)
ctx.VDIVSS(opm32, opxmm, opxmm)
ctx.VDIVSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VDIVSS_Z(opm32, opxmm, opk, opxmm)
ctx.VDPPD(opimm8, opm128, opxmm, opxmm)
ctx.VDPPS(opimm8, opm128, opxmm, opxmm)
ctx.VEXP2PD(opm512, opk, opzmm)
ctx.VEXP2PD_BCST(opm64, opk, opzmm)
ctx.VEXP2PD_BCST_Z(opm64, opk, opzmm)
ctx.VEXP2PD_SAE(opzmm, opk, opzmm)
ctx.VEXP2PD_SAE_Z(opzmm, opk, opzmm)
ctx.VEXP2PD_Z(opm512, opk, opzmm)
ctx.VEXP2PS(opm512, opk, opzmm)
ctx.VEXP2PS_BCST(opm32, opk, opzmm)
ctx.VEXP2PS_BCST_Z(opm32, opk, opzmm)
ctx.VEXP2PS_SAE(opzmm, opk, opzmm)
ctx.VEXP2PS_SAE_Z(opzmm, opk, opzmm)
ctx.VEXP2PS_Z(opm512, opk, opzmm)
ctx.VEXPANDPD(opm256, opk, opymm)
ctx.VEXPANDPD_Z(opm256, opk, opymm)
ctx.VEXPANDPS(opm128, opk, opxmm)
ctx.VEXPANDPS_Z(opm128, opk, opxmm)
ctx.VEXTRACTF128(opimm8, opymm, opm128)
ctx.VEXTRACTF32X4(opimm8, opymm, opk, opm128)
ctx.VEXTRACTF32X4_Z(opimm8, opymm, opk, opm128)
ctx.VEXTRACTF32X8(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTF32X8_Z(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTF64X2(opimm8, opymm, opk, opm128)
ctx.VEXTRACTF64X2_Z(opimm8, opymm, opk, opm128)
ctx.VEXTRACTF64X4(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTF64X4_Z(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTI128(opimm8, opymm, opm128)
ctx.VEXTRACTI32X4(opimm8, opymm, opk, opm128)
ctx.VEXTRACTI32X4_Z(opimm8, opymm, opk, opm128)
ctx.VEXTRACTI32X8(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTI32X8_Z(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTI64X2(opimm8, opymm, opk, opm128)
ctx.VEXTRACTI64X2_Z(opimm8, opymm, opk, opm128)
ctx.VEXTRACTI64X4(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTI64X4_Z(opimm8, opzmm, opk, opm256)
ctx.VEXTRACTPS(opimm8, opxmm, opm32)
ctx.VFIXUPIMMPD(opimm8, opm128, opxmm, opk, opxmm)
ctx.VFIXUPIMMPD_BCST(opimm8, opm64, opxmm, opk, opxmm)
ctx.VFIXUPIMMPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VFIXUPIMMPD_SAE(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VFIXUPIMMPD_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VFIXUPIMMPD_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VFIXUPIMMPS(opimm8, opm256, opymm, opk, opymm)
ctx.VFIXUPIMMPS_BCST(opimm8, opm32, opymm, opk, opymm)
ctx.VFIXUPIMMPS_BCST_Z(opimm8, opm32, opymm, opk, opymm)
ctx.VFIXUPIMMPS_SAE(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VFIXUPIMMPS_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VFIXUPIMMPS_Z(opimm8, opm256, opymm, opk, opymm)
ctx.VFIXUPIMMSD(opimm8, opm64, opxmm, opk, opxmm)
ctx.VFIXUPIMMSD_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VFIXUPIMMSD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VFIXUPIMMSD_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VFIXUPIMMSS(opimm8, opm32, opxmm, opk, opxmm)
ctx.VFIXUPIMMSS_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VFIXUPIMMSS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VFIXUPIMMSS_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VFMADD132PD(opm128, opxmm, opxmm)
ctx.VFMADD132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADD132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD132PS(opm128, opxmm, opxmm)
ctx.VFMADD132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADD132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD132SD(opm64, opxmm, opxmm)
ctx.VFMADD132SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD132SS(opm32, opxmm, opxmm)
ctx.VFMADD132SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD132SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADD213PD(opm128, opxmm, opxmm)
ctx.VFMADD213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADD213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD213PS(opm128, opxmm, opxmm)
ctx.VFMADD213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADD213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD213SD(opm64, opxmm, opxmm)
ctx.VFMADD213SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD213SS(opm32, opxmm, opxmm)
ctx.VFMADD213SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD213SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADD231PD(opm128, opxmm, opxmm)
ctx.VFMADD231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADD231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD231PS(opm128, opxmm, opxmm)
ctx.VFMADD231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADD231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADD231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADD231SD(opm64, opxmm, opxmm)
ctx.VFMADD231SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADD231SS(opm32, opxmm, opxmm)
ctx.VFMADD231SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMADD231SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB132PD(opm128, opxmm, opxmm)
ctx.VFMADDSUB132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADDSUB132PS(opm128, opxmm, opxmm)
ctx.VFMADDSUB132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADDSUB213PD(opm128, opxmm, opxmm)
ctx.VFMADDSUB213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADDSUB213PS(opm128, opxmm, opxmm)
ctx.VFMADDSUB213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADDSUB231PD(opm128, opxmm, opxmm)
ctx.VFMADDSUB231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMADDSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMADDSUB231PS(opm128, opxmm, opxmm)
ctx.VFMADDSUB231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMADDSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMADDSUB231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB132PD(opm128, opxmm, opxmm)
ctx.VFMSUB132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB132PS(opm128, opxmm, opxmm)
ctx.VFMSUB132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB132SD(opm64, opxmm, opxmm)
ctx.VFMSUB132SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB132SS(opm32, opxmm, opxmm)
ctx.VFMSUB132SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB132SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUB213PD(opm128, opxmm, opxmm)
ctx.VFMSUB213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB213PS(opm128, opxmm, opxmm)
ctx.VFMSUB213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB213SD(opm64, opxmm, opxmm)
ctx.VFMSUB213SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB213SS(opm32, opxmm, opxmm)
ctx.VFMSUB213SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB213SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUB231PD(opm128, opxmm, opxmm)
ctx.VFMSUB231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB231PS(opm128, opxmm, opxmm)
ctx.VFMSUB231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUB231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUB231SD(opm64, opxmm, opxmm)
ctx.VFMSUB231SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUB231SS(opm32, opxmm, opxmm)
ctx.VFMSUB231SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFMSUB231SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD132PD(opm128, opxmm, opxmm)
ctx.VFMSUBADD132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUBADD132PS(opm128, opxmm, opxmm)
ctx.VFMSUBADD132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUBADD213PD(opm128, opxmm, opxmm)
ctx.VFMSUBADD213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUBADD213PS(opm128, opxmm, opxmm)
ctx.VFMSUBADD213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUBADD231PD(opm128, opxmm, opxmm)
ctx.VFMSUBADD231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFMSUBADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFMSUBADD231PS(opm128, opxmm, opxmm)
ctx.VFMSUBADD231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFMSUBADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFMSUBADD231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD132PD(opm128, opxmm, opxmm)
ctx.VFNMADD132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMADD132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD132PS(opm128, opxmm, opxmm)
ctx.VFNMADD132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMADD132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD132SD(opm64, opxmm, opxmm)
ctx.VFNMADD132SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD132SS(opm32, opxmm, opxmm)
ctx.VFNMADD132SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD132SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMADD213PD(opm128, opxmm, opxmm)
ctx.VFNMADD213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMADD213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD213PS(opm128, opxmm, opxmm)
ctx.VFNMADD213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMADD213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD213SD(opm64, opxmm, opxmm)
ctx.VFNMADD213SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD213SS(opm32, opxmm, opxmm)
ctx.VFNMADD213SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD213SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMADD231PD(opm128, opxmm, opxmm)
ctx.VFNMADD231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMADD231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD231PS(opm128, opxmm, opxmm)
ctx.VFNMADD231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMADD231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMADD231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMADD231SD(opm64, opxmm, opxmm)
ctx.VFNMADD231SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMADD231SS(opm32, opxmm, opxmm)
ctx.VFNMADD231SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMADD231SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB132PD(opm128, opxmm, opxmm)
ctx.VFNMSUB132PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB132PS(opm128, opxmm, opxmm)
ctx.VFNMSUB132PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB132PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB132SD(opm64, opxmm, opxmm)
ctx.VFNMSUB132SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB132SS(opm32, opxmm, opxmm)
ctx.VFNMSUB132SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB132SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB213PD(opm128, opxmm, opxmm)
ctx.VFNMSUB213PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB213PS(opm128, opxmm, opxmm)
ctx.VFNMSUB213PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB213PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB213SD(opm64, opxmm, opxmm)
ctx.VFNMSUB213SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB213SS(opm32, opxmm, opxmm)
ctx.VFNMSUB213SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB213SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB231PD(opm128, opxmm, opxmm)
ctx.VFNMSUB231PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PD_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB231PS(opm128, opxmm, opxmm)
ctx.VFNMSUB231PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VFNMSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VFNMSUB231PS_Z(opm128, opxmm, opk, opxmm)
ctx.VFNMSUB231SD(opm64, opxmm, opxmm)
ctx.VFNMSUB231SD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SD_Z(opm64, opxmm, opk, opxmm)
ctx.VFNMSUB231SS(opm32, opxmm, opxmm)
ctx.VFNMSUB231SS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VFNMSUB231SS_Z(opm32, opxmm, opk, opxmm)
ctx.VFPCLASSPDX(opimm8, opm128, opk, opk)
ctx.VFPCLASSPDX_BCST(opimm8, opm64, opk, opk)
ctx.VFPCLASSPDY(opimm8, opm256, opk, opk)
ctx.VFPCLASSPDY_BCST(opimm8, opm64, opk, opk)
ctx.VFPCLASSPDZ(opimm8, opm512, opk, opk)
ctx.VFPCLASSPDZ_BCST(opimm8, opm64, opk, opk)
ctx.VFPCLASSPSX(opimm8, opm128, opk, opk)
ctx.VFPCLASSPSX_BCST(opimm8, opm32, opk, opk)
ctx.VFPCLASSPSY(opimm8, opm256, opk, opk)
ctx.VFPCLASSPSY_BCST(opimm8, opm32, opk, opk)
ctx.VFPCLASSPSZ(opimm8, opm512, opk, opk)
ctx.VFPCLASSPSZ_BCST(opimm8, opm32, opk, opk)
ctx.VFPCLASSSD(opimm8, opm64, opk, opk)
ctx.VFPCLASSSS(opimm8, opm32, opk, opk)
ctx.VGATHERDPD(opxmm, opvm32x, opxmm)
ctx.VGATHERDPS(opxmm, opvm32x, opxmm)
ctx.VGATHERQPD(opxmm, opvm64x, opxmm)
ctx.VGATHERQPS(opxmm, opvm64x, opxmm)
ctx.VGETEXPPD(opm128, opk, opxmm)
ctx.VGETEXPPD_BCST(opm64, opk, opxmm)
ctx.VGETEXPPD_BCST_Z(opm64, opk, opxmm)
ctx.VGETEXPPD_SAE(opzmm, opk, opzmm)
ctx.VGETEXPPD_SAE_Z(opzmm, opk, opzmm)
ctx.VGETEXPPD_Z(opm128, opk, opxmm)
ctx.VGETEXPPS(opm128, opk, opxmm)
ctx.VGETEXPPS_BCST(opm32, opk, opxmm)
ctx.VGETEXPPS_BCST_Z(opm32, opk, opxmm)
ctx.VGETEXPPS_SAE(opzmm, opk, opzmm)
ctx.VGETEXPPS_SAE_Z(opzmm, opk, opzmm)
ctx.VGETEXPPS_Z(opm128, opk, opxmm)
ctx.VGETEXPSD(opm64, opxmm, opk, opxmm)
ctx.VGETEXPSD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VGETEXPSD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VGETEXPSD_Z(opm64, opxmm, opk, opxmm)
ctx.VGETEXPSS(opm32, opxmm, opk, opxmm)
ctx.VGETEXPSS_SAE(opxmm, opxmm, opk, opxmm)
ctx.VGETEXPSS_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VGETEXPSS_Z(opm32, opxmm, opk, opxmm)
ctx.VGETMANTPD(opimm8, opm128, opk, opxmm)
ctx.VGETMANTPD_BCST(opimm8, opm64, opk, opxmm)
ctx.VGETMANTPD_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VGETMANTPD_SAE(opimm8, opzmm, opk, opzmm)
ctx.VGETMANTPD_SAE_Z(opimm8, opzmm, opk, opzmm)
ctx.VGETMANTPD_Z(opimm8, opm128, opk, opxmm)
ctx.VGETMANTPS(opimm8, opm128, opk, opxmm)
ctx.VGETMANTPS_BCST(opimm8, opm32, opk, opxmm)
ctx.VGETMANTPS_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VGETMANTPS_SAE(opimm8, opzmm, opk, opzmm)
ctx.VGETMANTPS_SAE_Z(opimm8, opzmm, opk, opzmm)
ctx.VGETMANTPS_Z(opimm8, opm128, opk, opxmm)
ctx.VGETMANTSD(opimm8, opm64, opxmm, opk, opxmm)
ctx.VGETMANTSD_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VGETMANTSD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VGETMANTSD_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VGETMANTSS(opimm8, opm32, opxmm, opk, opxmm)
ctx.VGETMANTSS_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VGETMANTSS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VGETMANTSS_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VHADDPD(opm128, opxmm, opxmm)
ctx.VHADDPS(opm128, opxmm, opxmm)
ctx.VHSUBPD(opm128, opxmm, opxmm)
ctx.VHSUBPS(opm128, opxmm, opxmm)
ctx.VINSERTF128(opimm8, opm128, opymm, opymm)
ctx.VINSERTF32X4(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTF32X4_Z(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTF32X8(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTF32X8_Z(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTF64X2(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTF64X2_Z(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTF64X4(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTF64X4_Z(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTI128(opimm8, opm128, opymm, opymm)
ctx.VINSERTI32X4(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTI32X4_Z(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTI32X8(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTI32X8_Z(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTI64X2(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTI64X2_Z(opimm8, opm128, opymm, opk, opymm)
ctx.VINSERTI64X4(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTI64X4_Z(opimm8, opm256, opzmm, opk, opzmm)
ctx.VINSERTPS(opimm8, opm32, opxmm, opxmm)
ctx.VLDDQU(opm128, opxmm)
ctx.VLDMXCSR(opm32)
ctx.VMASKMOVDQU(opxmm, opxmm)
ctx.VMASKMOVPD(opm128, opxmm, opxmm)
ctx.VMASKMOVPS(opm128, opxmm, opxmm)
ctx.VMAXPD(opm128, opxmm, opxmm)
ctx.VMAXPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VMAXPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VMAXPD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMAXPD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMAXPD_Z(opm128, opxmm, opk, opxmm)
ctx.VMAXPS(opm128, opxmm, opxmm)
ctx.VMAXPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VMAXPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VMAXPS_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMAXPS_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMAXPS_Z(opm128, opxmm, opk, opxmm)
ctx.VMAXSD(opm64, opxmm, opxmm)
ctx.VMAXSD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMAXSD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMAXSD_Z(opm64, opxmm, opk, opxmm)
ctx.VMAXSS(opm32, opxmm, opxmm)
ctx.VMAXSS_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMAXSS_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMAXSS_Z(opm32, opxmm, opk, opxmm)
ctx.VMINPD(opm128, opxmm, opxmm)
ctx.VMINPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VMINPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VMINPD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMINPD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMINPD_Z(opm128, opxmm, opk, opxmm)
ctx.VMINPS(opm128, opxmm, opxmm)
ctx.VMINPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VMINPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VMINPS_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMINPS_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMINPS_Z(opm128, opxmm, opk, opxmm)
ctx.VMINSD(opm64, opxmm, opxmm)
ctx.VMINSD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMINSD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMINSD_Z(opm64, opxmm, opk, opxmm)
ctx.VMINSS(opm32, opxmm, opxmm)
ctx.VMINSS_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMINSS_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMINSS_Z(opm32, opxmm, opk, opxmm)
ctx.VMOVAPD(opm128, opxmm)
ctx.VMOVAPD_Z(opm128, opk, opxmm)
ctx.VMOVAPS(opm128, opxmm)
ctx.VMOVAPS_Z(opm128, opk, opxmm)
ctx.VMOVD(opm32, opxmm)
ctx.VMOVDDUP(opm256, opymm)
ctx.VMOVDDUP_Z(opm256, opk, opymm)
ctx.VMOVDQA(opm128, opxmm)
ctx.VMOVDQA32(opm128, opk, opxmm)
ctx.VMOVDQA32_Z(opm128, opk, opxmm)
ctx.VMOVDQA64(opm128, opk, opxmm)
ctx.VMOVDQA64_Z(opm128, opk, opxmm)
ctx.VMOVDQU(opm128, opxmm)
ctx.VMOVDQU16(opm128, opk, opxmm)
ctx.VMOVDQU16_Z(opm128, opk, opxmm)
ctx.VMOVDQU32(opm128, opk, opxmm)
ctx.VMOVDQU32_Z(opm128, opk, opxmm)
ctx.VMOVDQU64(opm128, opk, opxmm)
ctx.VMOVDQU64_Z(opm128, opk, opxmm)
ctx.VMOVDQU8(opm128, opk, opxmm)
ctx.VMOVDQU8_Z(opm128, opk, opxmm)
ctx.VMOVHLPS(opxmm, opxmm, opxmm)
ctx.VMOVHPD(opm64, opxmm, opxmm)
ctx.VMOVHPS(opm64, opxmm, opxmm)
ctx.VMOVLHPS(opxmm, opxmm, opxmm)
ctx.VMOVLPD(opm64, opxmm, opxmm)
ctx.VMOVLPS(opm64, opxmm, opxmm)
ctx.VMOVMSKPD(opxmm, opr32)
ctx.VMOVMSKPS(opxmm, opr32)
ctx.VMOVNTDQ(opxmm, opm128)
ctx.VMOVNTDQA(opm256, opymm)
ctx.VMOVNTPD(opxmm, opm128)
ctx.VMOVNTPS(opxmm, opm128)
ctx.VMOVQ(opm64, opxmm)
ctx.VMOVSD(opm64, opxmm)
ctx.VMOVSD_Z(opm64, opk, opxmm)
ctx.VMOVSHDUP(opm128, opxmm)
ctx.VMOVSHDUP_Z(opm128, opk, opxmm)
ctx.VMOVSLDUP(opm128, opxmm)
ctx.VMOVSLDUP_Z(opm128, opk, opxmm)
ctx.VMOVSS(opm32, opxmm)
ctx.VMOVSS_Z(opm32, opk, opxmm)
ctx.VMOVUPD(opm128, opxmm)
ctx.VMOVUPD_Z(opm128, opk, opxmm)
ctx.VMOVUPS(opm128, opxmm)
ctx.VMOVUPS_Z(opm128, opk, opxmm)
ctx.VMPSADBW(opimm8, opm256, opymm, opymm)
ctx.VMULPD(opm128, opxmm, opxmm)
ctx.VMULPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VMULPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VMULPD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPD_Z(opm128, opxmm, opk, opxmm)
ctx.VMULPS(opm128, opxmm, opxmm)
ctx.VMULPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VMULPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VMULPS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VMULPS_Z(opm128, opxmm, opk, opxmm)
ctx.VMULSD(opm64, opxmm, opxmm)
ctx.VMULSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSD_Z(opm64, opxmm, opk, opxmm)
ctx.VMULSS(opm32, opxmm, opxmm)
ctx.VMULSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VMULSS_Z(opm32, opxmm, opk, opxmm)
ctx.VORPD(opm128, opxmm, opxmm)
ctx.VORPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VORPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VORPD_Z(opm128, opxmm, opk, opxmm)
ctx.VORPS(opm128, opxmm, opxmm)
ctx.VORPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VORPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VORPS_Z(opm128, opxmm, opk, opxmm)
ctx.VPABSB(opm256, opymm)
ctx.VPABSB_Z(opm128, opk, opxmm)
ctx.VPABSD(opm256, opymm)
ctx.VPABSD_BCST(opm32, opk, opxmm)
ctx.VPABSD_BCST_Z(opm32, opk, opxmm)
ctx.VPABSD_Z(opm128, opk, opxmm)
ctx.VPABSQ(opm128, opk, opxmm)
ctx.VPABSQ_BCST(opm64, opk, opxmm)
ctx.VPABSQ_BCST_Z(opm64, opk, opxmm)
ctx.VPABSQ_Z(opm128, opk, opxmm)
ctx.VPABSW(opm256, opymm)
ctx.VPABSW_Z(opm128, opk, opxmm)
ctx.VPACKSSDW(opm256, opymm, opymm)
ctx.VPACKSSDW_BCST(opm32, opxmm, opk, opxmm)
ctx.VPACKSSDW_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPACKSSDW_Z(opm128, opxmm, opk, opxmm)
ctx.VPACKSSWB(opm256, opymm, opymm)
ctx.VPACKSSWB_Z(opm128, opxmm, opk, opxmm)
ctx.VPACKUSDW(opm256, opymm, opymm)
ctx.VPACKUSDW_BCST(opm32, opxmm, opk, opxmm)
ctx.VPACKUSDW_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPACKUSDW_Z(opm128, opxmm, opk, opxmm)
ctx.VPACKUSWB(opm256, opymm, opymm)
ctx.VPACKUSWB_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDB(opm256, opymm, opymm)
ctx.VPADDB_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDD(opm256, opymm, opymm)
ctx.VPADDD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPADDD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPADDD_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDQ(opm256, opymm, opymm)
ctx.VPADDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPADDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPADDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDSB(opm256, opymm, opymm)
ctx.VPADDSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDSW(opm256, opymm, opymm)
ctx.VPADDSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDUSB(opm256, opymm, opymm)
ctx.VPADDUSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDUSW(opm256, opymm, opymm)
ctx.VPADDUSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPADDW(opm256, opymm, opymm)
ctx.VPADDW_Z(opm128, opxmm, opk, opxmm)
ctx.VPALIGNR(opimm8, opm256, opymm, opymm)
ctx.VPALIGNR_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VPAND(opm256, opymm, opymm)
ctx.VPANDD(opm128, opxmm, opk, opxmm)
ctx.VPANDD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPANDD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPANDD_Z(opm128, opxmm, opk, opxmm)
ctx.VPANDN(opm256, opymm, opymm)
ctx.VPANDND(opm128, opxmm, opk, opxmm)
ctx.VPANDND_BCST(opm32, opxmm, opk, opxmm)
ctx.VPANDND_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPANDND_Z(opm128, opxmm, opk, opxmm)
ctx.VPANDNQ(opm128, opxmm, opk, opxmm)
ctx.VPANDNQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPANDNQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPANDNQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPANDQ(opm128, opxmm, opk, opxmm)
ctx.VPANDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPANDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPANDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPAVGB(opm256, opymm, opymm)
ctx.VPAVGB_Z(opm128, opxmm, opk, opxmm)
ctx.VPAVGW(opm256, opymm, opymm)
ctx.VPAVGW_Z(opm128, opxmm, opk, opxmm)
ctx.VPBLENDD(opimm8, opm128, opxmm, opxmm)
ctx.VPBLENDMB(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMB_Z(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMD(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPBLENDMD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPBLENDMD_Z(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMQ(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPBLENDMQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPBLENDMQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMW(opm128, opxmm, opk, opxmm)
ctx.VPBLENDMW_Z(opm128, opxmm, opk, opxmm)
ctx.VPBLENDVB(opymm, opm256, opymm, opymm)
ctx.VPBLENDW(opimm8, opm256, opymm, opymm)
ctx.VPBROADCASTB(opm8, opxmm)
ctx.VPBROADCASTB_Z(opm8, opk, opxmm)
ctx.VPBROADCASTD(opm32, opxmm)
ctx.VPBROADCASTD_Z(opm32, opk, opxmm)
ctx.VPBROADCASTMB2Q(opk, opxmm)
ctx.VPBROADCASTMW2D(opk, opxmm)
ctx.VPBROADCASTQ(opm64, opxmm)
ctx.VPBROADCASTQ_Z(opm64, opk, opxmm)
ctx.VPBROADCASTW(opm16, opxmm)
ctx.VPBROADCASTW_Z(opm16, opk, opxmm)
ctx.VPCLMULQDQ(opimm8, opm128, opxmm, opxmm)
ctx.VPCMPB(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPD(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPD_BCST(opimm8, opm32, opxmm, opk, opk)
ctx.VPCMPEQB(opm256, opymm, opymm)
ctx.VPCMPEQD(opm256, opymm, opymm)
ctx.VPCMPEQD_BCST(opm32, opxmm, opk, opk)
ctx.VPCMPEQQ(opm256, opymm, opymm)
ctx.VPCMPEQQ_BCST(opm64, opxmm, opk, opk)
ctx.VPCMPEQW(opm256, opymm, opymm)
ctx.VPCMPESTRI(opimm8, opm128, opxmm)
ctx.VPCMPESTRM(opimm8, opm128, opxmm)
ctx.VPCMPGTB(opm256, opymm, opymm)
ctx.VPCMPGTD(opm256, opymm, opymm)
ctx.VPCMPGTD_BCST(opm32, opxmm, opk, opk)
ctx.VPCMPGTQ(opm256, opymm, opymm)
ctx.VPCMPGTQ_BCST(opm64, opxmm, opk, opk)
ctx.VPCMPGTW(opm256, opymm, opymm)
ctx.VPCMPISTRI(opimm8, opm128, opxmm)
ctx.VPCMPISTRM(opimm8, opm128, opxmm)
ctx.VPCMPQ(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPQ_BCST(opimm8, opm64, opxmm, opk, opk)
ctx.VPCMPUB(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPUD(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPUD_BCST(opimm8, opm32, opxmm, opk, opk)
ctx.VPCMPUQ(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPUQ_BCST(opimm8, opm64, opxmm, opk, opk)
ctx.VPCMPUW(opimm8, opm128, opxmm, opk, opk)
ctx.VPCMPW(opimm8, opm128, opxmm, opk, opk)
ctx.VPCOMPRESSD(opxmm, opk, opm128)
ctx.VPCOMPRESSD_Z(opxmm, opk, opm128)
ctx.VPCOMPRESSQ(opxmm, opk, opm128)
ctx.VPCOMPRESSQ_Z(opxmm, opk, opm128)
ctx.VPCONFLICTD(opm128, opk, opxmm)
ctx.VPCONFLICTD_BCST(opm32, opk, opxmm)
ctx.VPCONFLICTD_BCST_Z(opm32, opk, opxmm)
ctx.VPCONFLICTD_Z(opm128, opk, opxmm)
ctx.VPCONFLICTQ(opm128, opk, opxmm)
ctx.VPCONFLICTQ_BCST(opm64, opk, opxmm)
ctx.VPCONFLICTQ_BCST_Z(opm64, opk, opxmm)
ctx.VPCONFLICTQ_Z(opm128, opk, opxmm)
ctx.VPERM2F128(opimm8, opm256, opymm, opymm)
ctx.VPERM2I128(opimm8, opm256, opymm, opymm)
ctx.VPERMB(opm128, opxmm, opk, opxmm)
ctx.VPERMB_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMD(opm256, opymm, opymm)
ctx.VPERMD_BCST(opm32, opymm, opk, opymm)
ctx.VPERMD_BCST_Z(opm32, opymm, opk, opymm)
ctx.VPERMD_Z(opm256, opymm, opk, opymm)
ctx.VPERMI2B(opm128, opxmm, opk, opxmm)
ctx.VPERMI2B_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMI2D(opm128, opxmm, opk, opxmm)
ctx.VPERMI2D_BCST(opm32, opxmm, opk, opxmm)
ctx.VPERMI2D_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPERMI2D_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMI2PD(opm128, opxmm, opk, opxmm)
ctx.VPERMI2PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VPERMI2PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPERMI2PD_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMI2PS(opm128, opxmm, opk, opxmm)
ctx.VPERMI2PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VPERMI2PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPERMI2PS_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMI2Q(opm128, opxmm, opk, opxmm)
ctx.VPERMI2Q_BCST(opm64, opxmm, opk, opxmm)
ctx.VPERMI2Q_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPERMI2Q_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMI2W(opm128, opxmm, opk, opxmm)
ctx.VPERMI2W_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMILPD(opimm8, opm128, opxmm)
ctx.VPERMILPD_BCST(opimm8, opm64, opk, opxmm)
ctx.VPERMILPD_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPERMILPD_Z(opimm8, opm128, opk, opxmm)
ctx.VPERMILPS(opimm8, opm128, opxmm)
ctx.VPERMILPS_BCST(opimm8, opm32, opk, opxmm)
ctx.VPERMILPS_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPERMILPS_Z(opimm8, opm128, opk, opxmm)
ctx.VPERMPD(opimm8, opm256, opymm)
ctx.VPERMPD_BCST(opimm8, opm64, opk, opymm)
ctx.VPERMPD_BCST_Z(opimm8, opm64, opk, opymm)
ctx.VPERMPD_Z(opimm8, opm256, opk, opymm)
ctx.VPERMPS(opm256, opymm, opymm)
ctx.VPERMPS_BCST(opm32, opymm, opk, opymm)
ctx.VPERMPS_BCST_Z(opm32, opymm, opk, opymm)
ctx.VPERMPS_Z(opm256, opymm, opk, opymm)
ctx.VPERMQ(opimm8, opm256, opymm)
ctx.VPERMQ_BCST(opimm8, opm64, opk, opymm)
ctx.VPERMQ_BCST_Z(opimm8, opm64, opk, opymm)
ctx.VPERMQ_Z(opimm8, opm256, opk, opymm)
ctx.VPERMT2B(opm128, opxmm, opk, opxmm)
ctx.VPERMT2B_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMT2D(opm128, opxmm, opk, opxmm)
ctx.VPERMT2D_BCST(opm32, opxmm, opk, opxmm)
ctx.VPERMT2D_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPERMT2D_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMT2PD(opm128, opxmm, opk, opxmm)
ctx.VPERMT2PD_BCST(opm64, opxmm, opk, opxmm)
ctx.VPERMT2PD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPERMT2PD_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMT2PS(opm128, opxmm, opk, opxmm)
ctx.VPERMT2PS_BCST(opm32, opxmm, opk, opxmm)
ctx.VPERMT2PS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPERMT2PS_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMT2Q(opm128, opxmm, opk, opxmm)
ctx.VPERMT2Q_BCST(opm64, opxmm, opk, opxmm)
ctx.VPERMT2Q_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPERMT2Q_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMT2W(opm128, opxmm, opk, opxmm)
ctx.VPERMT2W_Z(opm128, opxmm, opk, opxmm)
ctx.VPERMW(opm128, opxmm, opk, opxmm)
ctx.VPERMW_Z(opm128, opxmm, opk, opxmm)
ctx.VPEXPANDD(opm128, opk, opxmm)
ctx.VPEXPANDD_Z(opm128, opk, opxmm)
ctx.VPEXPANDQ(opm128, opk, opxmm)
ctx.VPEXPANDQ_Z(opm128, opk, opxmm)
ctx.VPEXTRB(opimm8, opxmm, opm8)
ctx.VPEXTRD(opimm8, opxmm, opm32)
ctx.VPEXTRQ(opimm8, opxmm, opm64)
ctx.VPEXTRW(opimm8, opxmm, opm16)
ctx.VPGATHERDD(opxmm, opvm32x, opxmm)
ctx.VPGATHERDQ(opxmm, opvm32x, opxmm)
ctx.VPGATHERQD(opxmm, opvm64x, opxmm)
ctx.VPGATHERQQ(opxmm, opvm64x, opxmm)
ctx.VPHADDD(opm256, opymm, opymm)
ctx.VPHADDSW(opm256, opymm, opymm)
ctx.VPHADDW(opm256, opymm, opymm)
ctx.VPHMINPOSUW(opm128, opxmm)
ctx.VPHSUBD(opm256, opymm, opymm)
ctx.VPHSUBSW(opm256, opymm, opymm)
ctx.VPHSUBW(opm256, opymm, opymm)
ctx.VPINSRB(opimm8, opm8, opxmm, opxmm)
ctx.VPINSRD(opimm8, opm32, opxmm, opxmm)
ctx.VPINSRQ(opimm8, opm64, opxmm, opxmm)
ctx.VPINSRW(opimm8, opm16, opxmm, opxmm)
ctx.VPLZCNTD(opm128, opk, opxmm)
ctx.VPLZCNTD_BCST(opm32, opk, opxmm)
ctx.VPLZCNTD_BCST_Z(opm32, opk, opxmm)
ctx.VPLZCNTD_Z(opm128, opk, opxmm)
ctx.VPLZCNTQ(opm128, opk, opxmm)
ctx.VPLZCNTQ_BCST(opm64, opk, opxmm)
ctx.VPLZCNTQ_BCST_Z(opm64, opk, opxmm)
ctx.VPLZCNTQ_Z(opm128, opk, opxmm)
ctx.VPMADD52HUQ(opm128, opxmm, opk, opxmm)
ctx.VPMADD52HUQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMADD52HUQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMADD52HUQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMADD52LUQ(opm128, opxmm, opk, opxmm)
ctx.VPMADD52LUQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMADD52LUQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMADD52LUQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMADDUBSW(opm256, opymm, opymm)
ctx.VPMADDUBSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMADDWD(opm256, opymm, opymm)
ctx.VPMADDWD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMASKMOVD(opm128, opxmm, opxmm)
ctx.VPMASKMOVQ(opm128, opxmm, opxmm)
ctx.VPMAXSB(opm256, opymm, opymm)
ctx.VPMAXSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXSD(opm256, opymm, opymm)
ctx.VPMAXSD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPMAXSD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPMAXSD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXSQ(opm128, opxmm, opk, opxmm)
ctx.VPMAXSQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMAXSQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMAXSQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXSW(opm256, opymm, opymm)
ctx.VPMAXSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXUB(opm256, opymm, opymm)
ctx.VPMAXUB_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXUD(opm256, opymm, opymm)
ctx.VPMAXUD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPMAXUD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPMAXUD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXUQ(opm128, opxmm, opk, opxmm)
ctx.VPMAXUQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMAXUQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMAXUQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMAXUW(opm256, opymm, opymm)
ctx.VPMAXUW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINSB(opm256, opymm, opymm)
ctx.VPMINSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINSD(opm256, opymm, opymm)
ctx.VPMINSD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPMINSD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPMINSD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINSQ(opm128, opxmm, opk, opxmm)
ctx.VPMINSQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMINSQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMINSQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINSW(opm256, opymm, opymm)
ctx.VPMINSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINUB(opm256, opymm, opymm)
ctx.VPMINUB_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINUD(opm256, opymm, opymm)
ctx.VPMINUD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPMINUD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPMINUD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINUQ(opm128, opxmm, opk, opxmm)
ctx.VPMINUQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMINUQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMINUQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMINUW(opm256, opymm, opymm)
ctx.VPMINUW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMOVB2M(opxmm, opk)
ctx.VPMOVD2M(opxmm, opk)
ctx.VPMOVDB(opxmm, opk, opm32)
ctx.VPMOVDB_Z(opxmm, opk, opm32)
ctx.VPMOVDW(opxmm, opk, opm64)
ctx.VPMOVDW_Z(opxmm, opk, opm64)
ctx.VPMOVM2B(opk, opxmm)
ctx.VPMOVM2D(opk, opxmm)
ctx.VPMOVM2Q(opk, opxmm)
ctx.VPMOVM2W(opk, opxmm)
ctx.VPMOVMSKB(opymm, opr32)
ctx.VPMOVQ2M(opxmm, opk)
ctx.VPMOVQB(opxmm, opk, opm16)
ctx.VPMOVQB_Z(opxmm, opk, opm16)
ctx.VPMOVQD(opxmm, opk, opm64)
ctx.VPMOVQD_Z(opxmm, opk, opm64)
ctx.VPMOVQW(opxmm, opk, opm32)
ctx.VPMOVQW_Z(opxmm, opk, opm32)
ctx.VPMOVSDB(opxmm, opk, opm32)
ctx.VPMOVSDB_Z(opxmm, opk, opm32)
ctx.VPMOVSDW(opxmm, opk, opm64)
ctx.VPMOVSDW_Z(opxmm, opk, opm64)
ctx.VPMOVSQB(opxmm, opk, opm16)
ctx.VPMOVSQB_Z(opxmm, opk, opm16)
ctx.VPMOVSQD(opxmm, opk, opm64)
ctx.VPMOVSQD_Z(opxmm, opk, opm64)
ctx.VPMOVSQW(opxmm, opk, opm32)
ctx.VPMOVSQW_Z(opxmm, opk, opm32)
ctx.VPMOVSWB(opxmm, opk, opm64)
ctx.VPMOVSWB_Z(opxmm, opk, opm64)
ctx.VPMOVSXBD(opm64, opymm)
ctx.VPMOVSXBD_Z(opm32, opk, opxmm)
ctx.VPMOVSXBQ(opm32, opymm)
ctx.VPMOVSXBQ_Z(opm16, opk, opxmm)
ctx.VPMOVSXBW(opm128, opymm)
ctx.VPMOVSXBW_Z(opm128, opk, opymm)
ctx.VPMOVSXDQ(opm128, opymm)
ctx.VPMOVSXDQ_Z(opm128, opk, opymm)
ctx.VPMOVSXWD(opm128, opymm)
ctx.VPMOVSXWD_Z(opm128, opk, opymm)
ctx.VPMOVSXWQ(opm64, opymm)
ctx.VPMOVSXWQ_Z(opm32, opk, opxmm)
ctx.VPMOVUSDB(opxmm, opk, opm32)
ctx.VPMOVUSDB_Z(opxmm, opk, opm32)
ctx.VPMOVUSDW(opxmm, opk, opm64)
ctx.VPMOVUSDW_Z(opxmm, opk, opm64)
ctx.VPMOVUSQB(opxmm, opk, opm16)
ctx.VPMOVUSQB_Z(opxmm, opk, opm16)
ctx.VPMOVUSQD(opxmm, opk, opm64)
ctx.VPMOVUSQD_Z(opxmm, opk, opm64)
ctx.VPMOVUSQW(opxmm, opk, opm32)
ctx.VPMOVUSQW_Z(opxmm, opk, opm32)
ctx.VPMOVUSWB(opxmm, opk, opm64)
ctx.VPMOVUSWB_Z(opxmm, opk, opm64)
ctx.VPMOVW2M(opxmm, opk)
ctx.VPMOVWB(opxmm, opk, opm64)
ctx.VPMOVWB_Z(opxmm, opk, opm64)
ctx.VPMOVZXBD(opm64, opymm)
ctx.VPMOVZXBD_Z(opm32, opk, opxmm)
ctx.VPMOVZXBQ(opm32, opymm)
ctx.VPMOVZXBQ_Z(opm16, opk, opxmm)
ctx.VPMOVZXBW(opm128, opymm)
ctx.VPMOVZXBW_Z(opm128, opk, opymm)
ctx.VPMOVZXDQ(opm128, opymm)
ctx.VPMOVZXDQ_Z(opm128, opk, opymm)
ctx.VPMOVZXWD(opm128, opymm)
ctx.VPMOVZXWD_Z(opm128, opk, opymm)
ctx.VPMOVZXWQ(opm64, opymm)
ctx.VPMOVZXWQ_Z(opm32, opk, opxmm)
ctx.VPMULDQ(opm256, opymm, opymm)
ctx.VPMULDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMULDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMULDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULHRSW(opm256, opymm, opymm)
ctx.VPMULHRSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULHUW(opm256, opymm, opymm)
ctx.VPMULHUW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULHW(opm256, opymm, opymm)
ctx.VPMULHW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULLD(opm256, opymm, opymm)
ctx.VPMULLD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPMULLD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPMULLD_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULLQ(opm128, opxmm, opk, opxmm)
ctx.VPMULLQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMULLQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMULLQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULLW(opm256, opymm, opymm)
ctx.VPMULLW_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULTISHIFTQB(opm128, opxmm, opk, opxmm)
ctx.VPMULTISHIFTQB_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMULTISHIFTQB_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMULTISHIFTQB_Z(opm128, opxmm, opk, opxmm)
ctx.VPMULUDQ(opm256, opymm, opymm)
ctx.VPMULUDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPMULUDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPMULUDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPOPCNTD(opm512, opk, opzmm)
ctx.VPOPCNTD_BCST(opm32, opk, opzmm)
ctx.VPOPCNTD_BCST_Z(opm32, opk, opzmm)
ctx.VPOPCNTD_Z(opm512, opk, opzmm)
ctx.VPOPCNTQ(opm512, opk, opzmm)
ctx.VPOPCNTQ_BCST(opm64, opk, opzmm)
ctx.VPOPCNTQ_BCST_Z(opm64, opk, opzmm)
ctx.VPOPCNTQ_Z(opm512, opk, opzmm)
ctx.VPOR(opm256, opymm, opymm)
ctx.VPORD(opm128, opxmm, opk, opxmm)
ctx.VPORD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPORD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPORD_Z(opm128, opxmm, opk, opxmm)
ctx.VPORQ(opm128, opxmm, opk, opxmm)
ctx.VPORQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPORQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPORQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPROLD(opimm8, opm128, opk, opxmm)
ctx.VPROLD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPROLD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPROLD_Z(opimm8, opm128, opk, opxmm)
ctx.VPROLQ(opimm8, opm128, opk, opxmm)
ctx.VPROLQ_BCST(opimm8, opm64, opk, opxmm)
ctx.VPROLQ_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPROLQ_Z(opimm8, opm128, opk, opxmm)
ctx.VPROLVD(opm128, opxmm, opk, opxmm)
ctx.VPROLVD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPROLVD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPROLVD_Z(opm128, opxmm, opk, opxmm)
ctx.VPROLVQ(opm128, opxmm, opk, opxmm)
ctx.VPROLVQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPROLVQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPROLVQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPRORD(opimm8, opm128, opk, opxmm)
ctx.VPRORD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPRORD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPRORD_Z(opimm8, opm128, opk, opxmm)
ctx.VPRORQ(opimm8, opm128, opk, opxmm)
ctx.VPRORQ_BCST(opimm8, opm64, opk, opxmm)
ctx.VPRORQ_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPRORQ_Z(opimm8, opm128, opk, opxmm)
ctx.VPRORVD(opm128, opxmm, opk, opxmm)
ctx.VPRORVD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPRORVD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPRORVD_Z(opm128, opxmm, opk, opxmm)
ctx.VPRORVQ(opm128, opxmm, opk, opxmm)
ctx.VPRORVQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPRORVQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPRORVQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPSADBW(opm256, opymm, opymm)
ctx.VPSCATTERDD(opxmm, opk, opvm32x)
ctx.VPSCATTERDQ(opxmm, opk, opvm32x)
ctx.VPSCATTERQD(opxmm, opk, opvm64x)
ctx.VPSCATTERQQ(opxmm, opk, opvm64x)
ctx.VPSHUFB(opm256, opymm, opymm)
ctx.VPSHUFB_Z(opm128, opxmm, opk, opxmm)
ctx.VPSHUFD(opimm8, opm256, opymm)
ctx.VPSHUFD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPSHUFD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPSHUFD_Z(opimm8, opm128, opk, opxmm)
ctx.VPSHUFHW(opimm8, opm256, opymm)
ctx.VPSHUFHW_Z(opimm8, opm128, opk, opxmm)
ctx.VPSHUFLW(opimm8, opm256, opymm)
ctx.VPSHUFLW_Z(opimm8, opm128, opk, opxmm)
ctx.VPSIGNB(opm256, opymm, opymm)
ctx.VPSIGND(opm256, opymm, opymm)
ctx.VPSIGNW(opm256, opymm, opymm)
ctx.VPSLLD(opimm8, opymm, opymm)
ctx.VPSLLDQ(opimm8, opymm, opymm)
ctx.VPSLLD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPSLLD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPSLLD_Z(opimm8, opm128, opk, opxmm)
ctx.VPSLLQ(opimm8, opymm, opymm)
ctx.VPSLLQ_BCST(opimm8, opm64, opk, opxmm)
ctx.VPSLLQ_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPSLLQ_Z(opimm8, opm128, opk, opxmm)
ctx.VPSLLVD(opm128, opxmm, opxmm)
ctx.VPSLLVD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPSLLVD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPSLLVD_Z(opm128, opxmm, opk, opxmm)
ctx.VPSLLVQ(opm128, opxmm, opxmm)
ctx.VPSLLVQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPSLLVQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPSLLVQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPSLLVW(opm128, opxmm, opk, opxmm)
ctx.VPSLLVW_Z(opm128, opxmm, opk, opxmm)
ctx.VPSLLW(opimm8, opymm, opymm)
ctx.VPSLLW_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRAD(opimm8, opymm, opymm)
ctx.VPSRAD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPSRAD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPSRAD_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRAQ(opimm8, opm128, opk, opxmm)
ctx.VPSRAQ_BCST(opimm8, opm64, opk, opxmm)
ctx.VPSRAQ_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPSRAQ_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRAVD(opm128, opxmm, opxmm)
ctx.VPSRAVD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPSRAVD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPSRAVD_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRAVQ(opm128, opxmm, opk, opxmm)
ctx.VPSRAVQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPSRAVQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPSRAVQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRAVW(opm128, opxmm, opk, opxmm)
ctx.VPSRAVW_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRAW(opimm8, opymm, opymm)
ctx.VPSRAW_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRLD(opimm8, opymm, opymm)
ctx.VPSRLDQ(opimm8, opymm, opymm)
ctx.VPSRLD_BCST(opimm8, opm32, opk, opxmm)
ctx.VPSRLD_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VPSRLD_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRLQ(opimm8, opymm, opymm)
ctx.VPSRLQ_BCST(opimm8, opm64, opk, opxmm)
ctx.VPSRLQ_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VPSRLQ_Z(opimm8, opm128, opk, opxmm)
ctx.VPSRLVD(opm128, opxmm, opxmm)
ctx.VPSRLVD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPSRLVD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPSRLVD_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRLVQ(opm128, opxmm, opxmm)
ctx.VPSRLVQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPSRLVQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPSRLVQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRLVW(opm128, opxmm, opk, opxmm)
ctx.VPSRLVW_Z(opm128, opxmm, opk, opxmm)
ctx.VPSRLW(opimm8, opymm, opymm)
ctx.VPSRLW_Z(opimm8, opm128, opk, opxmm)
ctx.VPSUBB(opm256, opymm, opymm)
ctx.VPSUBB_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBD(opm256, opymm, opymm)
ctx.VPSUBD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPSUBD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPSUBD_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBQ(opm256, opymm, opymm)
ctx.VPSUBQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPSUBQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPSUBQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBSB(opm256, opymm, opymm)
ctx.VPSUBSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBSW(opm256, opymm, opymm)
ctx.VPSUBSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBUSB(opm256, opymm, opymm)
ctx.VPSUBUSB_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBUSW(opm256, opymm, opymm)
ctx.VPSUBUSW_Z(opm128, opxmm, opk, opxmm)
ctx.VPSUBW(opm256, opymm, opymm)
ctx.VPSUBW_Z(opm128, opxmm, opk, opxmm)
ctx.VPTERNLOGD(opimm8, opm128, opxmm, opk, opxmm)
ctx.VPTERNLOGD_BCST(opimm8, opm32, opxmm, opk, opxmm)
ctx.VPTERNLOGD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VPTERNLOGD_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VPTERNLOGQ(opimm8, opm128, opxmm, opk, opxmm)
ctx.VPTERNLOGQ_BCST(opimm8, opm64, opxmm, opk, opxmm)
ctx.VPTERNLOGQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VPTERNLOGQ_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VPTEST(opm128, opxmm)
ctx.VPTESTMB(opm128, opxmm, opk, opk)
ctx.VPTESTMD(opm128, opxmm, opk, opk)
ctx.VPTESTMD_BCST(opm32, opxmm, opk, opk)
ctx.VPTESTMQ(opm128, opxmm, opk, opk)
ctx.VPTESTMQ_BCST(opm64, opxmm, opk, opk)
ctx.VPTESTMW(opm128, opxmm, opk, opk)
ctx.VPTESTNMB(opm512, opzmm, opk, opk)
ctx.VPTESTNMD(opm128, opxmm, opk, opk)
ctx.VPTESTNMD_BCST(opm32, opxmm, opk, opk)
ctx.VPTESTNMQ(opm128, opxmm, opk, opk)
ctx.VPTESTNMQ_BCST(opm64, opxmm, opk, opk)
ctx.VPTESTNMW(opm512, opzmm, opk, opk)
ctx.VPUNPCKHBW(opm256, opymm, opymm)
ctx.VPUNPCKHBW_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKHDQ(opm256, opymm, opymm)
ctx.VPUNPCKHDQ_BCST(opm32, opxmm, opk, opxmm)
ctx.VPUNPCKHDQ_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPUNPCKHDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKHQDQ(opm256, opymm, opymm)
ctx.VPUNPCKHQDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPUNPCKHQDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPUNPCKHQDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKHWD(opm256, opymm, opymm)
ctx.VPUNPCKHWD_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKLBW(opm256, opymm, opymm)
ctx.VPUNPCKLBW_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKLDQ(opm256, opymm, opymm)
ctx.VPUNPCKLDQ_BCST(opm32, opxmm, opk, opxmm)
ctx.VPUNPCKLDQ_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPUNPCKLDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKLQDQ(opm256, opymm, opymm)
ctx.VPUNPCKLQDQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPUNPCKLQDQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPUNPCKLQDQ_Z(opm128, opxmm, opk, opxmm)
ctx.VPUNPCKLWD(opm256, opymm, opymm)
ctx.VPUNPCKLWD_Z(opm128, opxmm, opk, opxmm)
ctx.VPXOR(opm256, opymm, opymm)
ctx.VPXORD(opm128, opxmm, opk, opxmm)
ctx.VPXORD_BCST(opm32, opxmm, opk, opxmm)
ctx.VPXORD_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VPXORD_Z(opm128, opxmm, opk, opxmm)
ctx.VPXORQ(opm128, opxmm, opk, opxmm)
ctx.VPXORQ_BCST(opm64, opxmm, opk, opxmm)
ctx.VPXORQ_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VPXORQ_Z(opm128, opxmm, opk, opxmm)
ctx.VRANGEPD(opimm8, opm128, opxmm, opk, opxmm)
ctx.VRANGEPD_BCST(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRANGEPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRANGEPD_SAE(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VRANGEPD_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VRANGEPD_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VRANGEPS(opimm8, opm128, opxmm, opk, opxmm)
ctx.VRANGEPS_BCST(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRANGEPS_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRANGEPS_SAE(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VRANGEPS_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm)
ctx.VRANGEPS_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VRANGESD(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRANGESD_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRANGESD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRANGESD_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRANGESS(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRANGESS_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRANGESS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRANGESS_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRCP14PD(opm128, opk, opxmm)
ctx.VRCP14PD_BCST(opm64, opk, opxmm)
ctx.VRCP14PD_BCST_Z(opm64, opk, opxmm)
ctx.VRCP14PD_Z(opm128, opk, opxmm)
ctx.VRCP14PS(opm128, opk, opxmm)
ctx.VRCP14PS_BCST(opm32, opk, opxmm)
ctx.VRCP14PS_BCST_Z(opm32, opk, opxmm)
ctx.VRCP14PS_Z(opm128, opk, opxmm)
ctx.VRCP14SD(opm64, opxmm, opk, opxmm)
ctx.VRCP14SD_Z(opm64, opxmm, opk, opxmm)
ctx.VRCP14SS(opm32, opxmm, opk, opxmm)
ctx.VRCP14SS_Z(opm32, opxmm, opk, opxmm)
ctx.VRCP28PD(opm512, opk, opzmm)
ctx.VRCP28PD_BCST(opm64, opk, opzmm)
ctx.VRCP28PD_BCST_Z(opm64, opk, opzmm)
ctx.VRCP28PD_SAE(opzmm, opk, opzmm)
ctx.VRCP28PD_SAE_Z(opzmm, opk, opzmm)
ctx.VRCP28PD_Z(opm512, opk, opzmm)
ctx.VRCP28PS(opm512, opk, opzmm)
ctx.VRCP28PS_BCST(opm32, opk, opzmm)
ctx.VRCP28PS_BCST_Z(opm32, opk, opzmm)
ctx.VRCP28PS_SAE(opzmm, opk, opzmm)
ctx.VRCP28PS_SAE_Z(opzmm, opk, opzmm)
ctx.VRCP28PS_Z(opm512, opk, opzmm)
ctx.VRCP28SD(opm64, opxmm, opk, opxmm)
ctx.VRCP28SD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VRCP28SD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VRCP28SD_Z(opm64, opxmm, opk, opxmm)
ctx.VRCP28SS(opm32, opxmm, opk, opxmm)
ctx.VRCP28SS_SAE(opxmm, opxmm, opk, opxmm)
ctx.VRCP28SS_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VRCP28SS_Z(opm32, opxmm, opk, opxmm)
ctx.VRCPPS(opm128, opxmm)
ctx.VRCPSS(opm32, opxmm, opxmm)
ctx.VREDUCEPD(opimm8, opm128, opk, opxmm)
ctx.VREDUCEPD_BCST(opimm8, opm64, opk, opxmm)
ctx.VREDUCEPD_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VREDUCEPD_Z(opimm8, opm128, opk, opxmm)
ctx.VREDUCEPS(opimm8, opm128, opk, opxmm)
ctx.VREDUCEPS_BCST(opimm8, opm32, opk, opxmm)
ctx.VREDUCEPS_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VREDUCEPS_Z(opimm8, opm128, opk, opxmm)
ctx.VREDUCESD(opimm8, opm64, opxmm, opk, opxmm)
ctx.VREDUCESD_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VREDUCESS(opimm8, opm32, opxmm, opk, opxmm)
ctx.VREDUCESS_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRNDSCALEPD(opimm8, opm128, opk, opxmm)
ctx.VRNDSCALEPD_BCST(opimm8, opm64, opk, opxmm)
ctx.VRNDSCALEPD_BCST_Z(opimm8, opm64, opk, opxmm)
ctx.VRNDSCALEPD_SAE(opimm8, opzmm, opk, opzmm)
ctx.VRNDSCALEPD_SAE_Z(opimm8, opzmm, opk, opzmm)
ctx.VRNDSCALEPD_Z(opimm8, opm128, opk, opxmm)
ctx.VRNDSCALEPS(opimm8, opm128, opk, opxmm)
ctx.VRNDSCALEPS_BCST(opimm8, opm32, opk, opxmm)
ctx.VRNDSCALEPS_BCST_Z(opimm8, opm32, opk, opxmm)
ctx.VRNDSCALEPS_SAE(opimm8, opzmm, opk, opzmm)
ctx.VRNDSCALEPS_SAE_Z(opimm8, opzmm, opk, opzmm)
ctx.VRNDSCALEPS_Z(opimm8, opm128, opk, opxmm)
ctx.VRNDSCALESD(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRNDSCALESD_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRNDSCALESD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRNDSCALESD_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VRNDSCALESS(opimm8, opm32, opxmm, opk, opxmm)
ctx.VRNDSCALESS_SAE(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRNDSCALESS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm)
ctx.VRNDSCALESS_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VROUNDPD(opimm8, opm128, opxmm)
ctx.VROUNDPS(opimm8, opm128, opxmm)
ctx.VROUNDSD(opimm8, opm64, opxmm, opxmm)
ctx.VROUNDSS(opimm8, opm32, opxmm, opxmm)
ctx.VRSQRT14PD(opm128, opk, opxmm)
ctx.VRSQRT14PD_BCST(opm64, opk, opxmm)
ctx.VRSQRT14PD_BCST_Z(opm64, opk, opxmm)
ctx.VRSQRT14PD_Z(opm128, opk, opxmm)
ctx.VRSQRT14PS(opm128, opk, opxmm)
ctx.VRSQRT14PS_BCST(opm32, opk, opxmm)
ctx.VRSQRT14PS_BCST_Z(opm32, opk, opxmm)
ctx.VRSQRT14PS_Z(opm128, opk, opxmm)
ctx.VRSQRT14SD(opm64, opxmm, opk, opxmm)
ctx.VRSQRT14SD_Z(opm64, opxmm, opk, opxmm)
ctx.VRSQRT14SS(opm32, opxmm, opk, opxmm)
ctx.VRSQRT14SS_Z(opm32, opxmm, opk, opxmm)
ctx.VRSQRT28PD(opm512, opk, opzmm)
ctx.VRSQRT28PD_BCST(opm64, opk, opzmm)
ctx.VRSQRT28PD_BCST_Z(opm64, opk, opzmm)
ctx.VRSQRT28PD_SAE(opzmm, opk, opzmm)
ctx.VRSQRT28PD_SAE_Z(opzmm, opk, opzmm)
ctx.VRSQRT28PD_Z(opm512, opk, opzmm)
ctx.VRSQRT28PS(opm512, opk, opzmm)
ctx.VRSQRT28PS_BCST(opm32, opk, opzmm)
ctx.VRSQRT28PS_BCST_Z(opm32, opk, opzmm)
ctx.VRSQRT28PS_SAE(opzmm, opk, opzmm)
ctx.VRSQRT28PS_SAE_Z(opzmm, opk, opzmm)
ctx.VRSQRT28PS_Z(opm512, opk, opzmm)
ctx.VRSQRT28SD(opm64, opxmm, opk, opxmm)
ctx.VRSQRT28SD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VRSQRT28SD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VRSQRT28SD_Z(opm64, opxmm, opk, opxmm)
ctx.VRSQRT28SS(opm32, opxmm, opk, opxmm)
ctx.VRSQRT28SS_SAE(opxmm, opxmm, opk, opxmm)
ctx.VRSQRT28SS_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VRSQRT28SS_Z(opm32, opxmm, opk, opxmm)
ctx.VRSQRTPS(opm128, opxmm)
ctx.VRSQRTSS(opm32, opxmm, opxmm)
ctx.VSCALEFPD(opm128, opxmm, opk, opxmm)
ctx.VSCALEFPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VSCALEFPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VSCALEFPD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPD_Z(opm128, opxmm, opk, opxmm)
ctx.VSCALEFPS(opm128, opxmm, opk, opxmm)
ctx.VSCALEFPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VSCALEFPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VSCALEFPS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSCALEFPS_Z(opm128, opxmm, opk, opxmm)
ctx.VSCALEFSD(opm64, opxmm, opk, opxmm)
ctx.VSCALEFSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSD_Z(opm64, opxmm, opk, opxmm)
ctx.VSCALEFSS(opm32, opxmm, opk, opxmm)
ctx.VSCALEFSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSCALEFSS_Z(opm32, opxmm, opk, opxmm)
ctx.VSCATTERDPD(opxmm, opk, opvm32x)
ctx.VSCATTERDPS(opxmm, opk, opvm32x)
ctx.VSCATTERQPD(opxmm, opk, opvm64x)
ctx.VSCATTERQPS(opxmm, opk, opvm64x)
ctx.VSHUFF32X4(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFF32X4_BCST(opimm8, opm32, opymm, opk, opymm)
ctx.VSHUFF32X4_BCST_Z(opimm8, opm32, opymm, opk, opymm)
ctx.VSHUFF32X4_Z(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFF64X2(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFF64X2_BCST(opimm8, opm64, opymm, opk, opymm)
ctx.VSHUFF64X2_BCST_Z(opimm8, opm64, opymm, opk, opymm)
ctx.VSHUFF64X2_Z(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFI32X4(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFI32X4_BCST(opimm8, opm32, opymm, opk, opymm)
ctx.VSHUFI32X4_BCST_Z(opimm8, opm32, opymm, opk, opymm)
ctx.VSHUFI32X4_Z(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFI64X2(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFI64X2_BCST(opimm8, opm64, opymm, opk, opymm)
ctx.VSHUFI64X2_BCST_Z(opimm8, opm64, opymm, opk, opymm)
ctx.VSHUFI64X2_Z(opimm8, opm256, opymm, opk, opymm)
ctx.VSHUFPD(opimm8, opm128, opxmm, opxmm)
ctx.VSHUFPD_BCST(opimm8, opm64, opxmm, opk, opxmm)
ctx.VSHUFPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
ctx.VSHUFPD_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VSHUFPS(opimm8, opm128, opxmm, opxmm)
ctx.VSHUFPS_BCST(opimm8, opm32, opxmm, opk, opxmm)
ctx.VSHUFPS_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
ctx.VSHUFPS_Z(opimm8, opm128, opxmm, opk, opxmm)
ctx.VSQRTPD(opm128, opxmm)
ctx.VSQRTPD_BCST(opm32, opk, opxmm)
ctx.VSQRTPD_BCST_Z(opm32, opk, opxmm)
ctx.VSQRTPD_RD_SAE(opzmm, opk, opzmm)
ctx.VSQRTPD_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPD_RN_SAE(opzmm, opk, opzmm)
ctx.VSQRTPD_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPD_RU_SAE(opzmm, opk, opzmm)
ctx.VSQRTPD_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPD_RZ_SAE(opzmm, opk, opzmm)
ctx.VSQRTPD_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPD_Z(opm128, opk, opxmm)
ctx.VSQRTPS(opm128, opxmm)
ctx.VSQRTPS_BCST(opm32, opk, opxmm)
ctx.VSQRTPS_BCST_Z(opm32, opk, opxmm)
ctx.VSQRTPS_RD_SAE(opzmm, opk, opzmm)
ctx.VSQRTPS_RD_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPS_RN_SAE(opzmm, opk, opzmm)
ctx.VSQRTPS_RN_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPS_RU_SAE(opzmm, opk, opzmm)
ctx.VSQRTPS_RU_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPS_RZ_SAE(opzmm, opk, opzmm)
ctx.VSQRTPS_RZ_SAE_Z(opzmm, opk, opzmm)
ctx.VSQRTPS_Z(opm128, opk, opxmm)
ctx.VSQRTSD(opm64, opxmm, opxmm)
ctx.VSQRTSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSD_Z(opm64, opxmm, opk, opxmm)
ctx.VSQRTSS(opm32, opxmm, opxmm)
ctx.VSQRTSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSQRTSS_Z(opm32, opxmm, opk, opxmm)
ctx.VSTMXCSR(opm32)
ctx.VSUBPD(opm128, opxmm, opxmm)
ctx.VSUBPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VSUBPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VSUBPD_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPD_Z(opm128, opxmm, opk, opxmm)
ctx.VSUBPS(opm128, opxmm, opxmm)
ctx.VSUBPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VSUBPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VSUBPS_RD_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RN_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RU_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RZ_SAE(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm)
ctx.VSUBPS_Z(opm128, opxmm, opk, opxmm)
ctx.VSUBSD(opm64, opxmm, opxmm)
ctx.VSUBSD_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSD_Z(opm64, opxmm, opk, opxmm)
ctx.VSUBSS(opm32, opxmm, opxmm)
ctx.VSUBSS_RD_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RN_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RU_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RZ_SAE(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm)
ctx.VSUBSS_Z(opm32, opxmm, opk, opxmm)
ctx.VTESTPD(opm128, opxmm)
ctx.VTESTPS(opm128, opxmm)
ctx.VUCOMISD(opm64, opxmm)
ctx.VUCOMISD_SAE(opxmm, opxmm)
ctx.VUCOMISS(opm32, opxmm)
ctx.VUCOMISS_SAE(opxmm, opxmm)
ctx.VUNPCKHPD(opm128, opxmm, opxmm)
ctx.VUNPCKHPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VUNPCKHPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VUNPCKHPD_Z(opm128, opxmm, opk, opxmm)
ctx.VUNPCKHPS(opm128, opxmm, opxmm)
ctx.VUNPCKHPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VUNPCKHPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VUNPCKHPS_Z(opm128, opxmm, opk, opxmm)
ctx.VUNPCKLPD(opm128, opxmm, opxmm)
ctx.VUNPCKLPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VUNPCKLPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VUNPCKLPD_Z(opm128, opxmm, opk, opxmm)
ctx.VUNPCKLPS(opm128, opxmm, opxmm)
ctx.VUNPCKLPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VUNPCKLPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VUNPCKLPS_Z(opm128, opxmm, opk, opxmm)
ctx.VXORPD(opm128, opxmm, opxmm)
ctx.VXORPD_BCST(opm64, opxmm, opk, opxmm)
ctx.VXORPD_BCST_Z(opm64, opxmm, opk, opxmm)
ctx.VXORPD_Z(opm128, opxmm, opk, opxmm)
ctx.VXORPS(opm128, opxmm, opxmm)
ctx.VXORPS_BCST(opm32, opxmm, opk, opxmm)
ctx.VXORPS_BCST_Z(opm32, opxmm, opk, opxmm)
ctx.VXORPS_Z(opm128, opxmm, opk, opxmm)
ctx.VZEROALL()
ctx.VZEROUPPER()
ctx.XADDB(opr8, opm8)
ctx.XADDL(opr32, opm32)
ctx.XADDQ(opr64, opm64)
ctx.XADDW(opr16, opm16)
ctx.XCHGB(opm8, opr8)
ctx.XCHGL(opeax, opr32)
ctx.XCHGQ(opm64, opr64)
ctx.XCHGW(opax, opr16)
ctx.XGETBV()
ctx.XLAT()
ctx.XORB(opimm8, opal)
ctx.XORL(opimm32, opeax)
ctx.XORPD(opm128, opxmm)
ctx.XORPS(opm128, opxmm)
ctx.XORQ(opimm32, opm64)
ctx.XORW(opimm16, opax)
if _, err := ctx.Result(); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/build/zmov.go 0000664 0000000 0000000 00000046051 14370657153 0022004 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zmov.go mov. DO NOT EDIT.
package build
import (
"go/types"
"github.com/mmcloughlin/avo/operand"
)
func (c *Context) mov(a, b operand.Op, an, bn int, t *types.Basic) {
switch {
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVB(a, b)
case an == 8 && operand.IsK(a) && bn == 1 && operand.IsM8(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVB(a, b)
case an == 8 && operand.IsK(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVB(a, b)
case an == 1 && operand.IsM8(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVB(a, b)
case an == 4 && operand.IsR32(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVB(a, b)
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVD(a, b)
case an == 8 && operand.IsK(a) && bn == 4 && operand.IsM32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVD(a, b)
case an == 8 && operand.IsK(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVD(a, b)
case an == 4 && operand.IsM32(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVD(a, b)
case an == 4 && operand.IsR32(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVD(a, b)
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVQ(a, b)
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsM64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVQ(a, b)
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVQ(a, b)
case an == 8 && operand.IsM64(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVQ(a, b)
case an == 8 && operand.IsR64(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVQ(a, b)
case an == 8 && operand.IsK(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVW(a, b)
case an == 8 && operand.IsK(a) && bn == 2 && operand.IsM16(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVW(a, b)
case an == 8 && operand.IsK(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVW(a, b)
case an == 2 && operand.IsM16(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVW(a, b)
case an == 4 && operand.IsR32(a) && bn == 8 && operand.IsK(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.KMOVW(a, b)
case an == 1 && operand.IsM8(a) && bn == 1 && operand.IsR8(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVB(a, b)
case an == 1 && operand.IsR8(a) && bn == 1 && operand.IsM8(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVB(a, b)
case an == 1 && operand.IsR8(a) && bn == 1 && operand.IsR8(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVB(a, b)
case an == 1 && operand.IsM8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBLSX(a, b)
case an == 1 && operand.IsR8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBLSX(a, b)
case an == 1 && operand.IsM8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBLZX(a, b)
case an == 1 && operand.IsM8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBLZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBLZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 4 && operand.IsR32(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBLZX(a, b)
case an == 1 && operand.IsM8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBQSX(a, b)
case an == 1 && operand.IsR8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBQSX(a, b)
case an == 1 && operand.IsM8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBQZX(a, b)
case an == 1 && operand.IsM8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBQZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBQZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 8 && operand.IsR64(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBQZX(a, b)
case an == 1 && operand.IsM8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBWSX(a, b)
case an == 1 && operand.IsR8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVBWSX(a, b)
case an == 1 && operand.IsM8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBWZX(a, b)
case an == 1 && operand.IsM8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBWZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVBWZX(a, b)
case an == 1 && operand.IsR8(a) && bn == 2 && operand.IsR16(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVBWZX(a, b)
case an == 4 && operand.IsM32(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVL(a, b)
case an == 4 && operand.IsR32(a) && bn == 4 && operand.IsM32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVL(a, b)
case an == 4 && operand.IsR32(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVL(a, b)
case an == 4 && operand.IsM32(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVLQSX(a, b)
case an == 4 && operand.IsR32(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVLQSX(a, b)
case an == 4 && operand.IsM32(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVLQZX(a, b)
case an == 4 && operand.IsM32(a) && bn == 8 && operand.IsR64(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVLQZX(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVOU(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVOU(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVOU(a, b)
case an == 4 && operand.IsM32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsM64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 4 && operand.IsR32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsR64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsM32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsM64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsM64(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsR64(a) && bn == 8 && operand.IsM64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsR64(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVQ(a, b)
case an == 8 && operand.IsM64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSD(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsM64(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSD(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSD(a, b)
case an == 4 && operand.IsM32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSS(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsM32(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSS(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.MOVSS(a, b)
case an == 2 && operand.IsM16(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVW(a, b)
case an == 2 && operand.IsR16(a) && bn == 2 && operand.IsM16(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVW(a, b)
case an == 2 && operand.IsR16(a) && bn == 2 && operand.IsR16(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.MOVW(a, b)
case an == 2 && operand.IsM16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVWLSX(a, b)
case an == 2 && operand.IsR16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVWLSX(a, b)
case an == 2 && operand.IsM16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVWLZX(a, b)
case an == 2 && operand.IsM16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVWLZX(a, b)
case an == 2 && operand.IsR16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVWLZX(a, b)
case an == 2 && operand.IsR16(a) && bn == 4 && operand.IsR32(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVWLZX(a, b)
case an == 2 && operand.IsM16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVWQSX(a, b)
case an == 2 && operand.IsR16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == types.IsInteger:
c.MOVWQSX(a, b)
case an == 2 && operand.IsM16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVWQZX(a, b)
case an == 2 && operand.IsM16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVWQZX(a, b)
case an == 2 && operand.IsR16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsUnsigned)) == (types.IsInteger|types.IsUnsigned):
c.MOVWQZX(a, b)
case an == 2 && operand.IsR16(a) && bn == 8 && operand.IsR64(b) && (t.Info()&types.IsBoolean) != 0:
c.MOVWQZX(a, b)
case an == 4 && operand.IsM32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVD(a, b)
case an == 4 && operand.IsR32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVD(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsM32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVD(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsR32(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVD(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 32 && operand.IsM256(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsM256(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 32 && operand.IsM256(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsM256(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 64 && operand.IsM512(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsM512(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU16(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 32 && operand.IsM256(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsM256(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 64 && operand.IsM512(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsM512(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU32(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 32 && operand.IsM256(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsM256(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 64 && operand.IsM512(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsM512(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU64(a, b)
case an == 16 && operand.IsM128(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 32 && operand.IsM256(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsM128(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsM256(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 32 && operand.IsYMM(a) && bn == 32 && operand.IsYMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 64 && operand.IsM512(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsM512(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 64 && operand.IsZMM(a) && bn == 64 && operand.IsZMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVDQU8(a, b)
case an == 8 && operand.IsM64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVQ(a, b)
case an == 8 && operand.IsR64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsM64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsR64(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVQ(a, b)
case an == 16 && operand.IsXMM(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&(types.IsInteger|types.IsBoolean)) != 0:
c.VMOVQ(a, b)
case an == 8 && operand.IsM64(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.VMOVSD(a, b)
case an == 16 && operand.IsXMM(a) && bn == 8 && operand.IsM64(b) && (t.Info()&types.IsFloat) != 0:
c.VMOVSD(a, b)
case an == 4 && operand.IsM32(a) && bn == 16 && operand.IsXMM(b) && (t.Info()&types.IsFloat) != 0:
c.VMOVSS(a, b)
case an == 16 && operand.IsXMM(a) && bn == 4 && operand.IsM32(b) && (t.Info()&types.IsFloat) != 0:
c.VMOVSS(a, b)
default:
c.adderrormessage("could not deduce mov instruction")
}
}
golang-github-mmcloughlin-avo-0.5.0/buildtags/ 0000775 0000000 0000000 00000000000 14370657153 0021333 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/buildtags/buildtags.go 0000664 0000000 0000000 00000021524 14370657153 0023644 0 ustar 00root root 0000000 0000000 // Package buildtags provides types for representing and manipulating build constraints.
//
// In Go, build constraints are represented as comments in source code together with file naming conventions. For example
//
// // +build linux,386 darwin,!cgo
// // +build !purego
//
// Any terms provided in the filename can be thought of as an implicit extra
// constraint comment line. Collectively, these are referred to as
// “constraints”. Each line is a “constraint”. Within each constraint the
// space-separated terms are “options”, and within that the comma-separated
// items are “terms” which may be negated with at most one exclaimation mark.
//
// These represent a boolean formulae. The constraints are evaluated as the AND
// of constraint lines; a constraint is evaluated as the OR of its options and
// an option is evaluated as the AND of its terms. Overall build constraints are
// a boolean formula that is an AND of ORs of ANDs.
//
// This level of complexity is rarely used in Go programs. Therefore this
// package aims to provide access to all these layers of nesting if required,
// but make it easy to forget about for basic use cases too.
package buildtags
import (
"errors"
"fmt"
"strings"
"unicode"
)
// Reference: https://github.com/golang/go/blob/204a8f55dc2e0ac8d27a781dab0da609b98560da/src/go/build/doc.go#L73-L92
//
// // A build constraint is evaluated as the OR of space-separated options;
// // each option evaluates as the AND of its comma-separated terms;
// // and each term is an alphanumeric word or, preceded by !, its negation.
// // That is, the build constraint:
// //
// // // +build linux,386 darwin,!cgo
// //
// // corresponds to the boolean formula:
// //
// // (linux AND 386) OR (darwin AND (NOT cgo))
// //
// // A file may have multiple build constraints. The overall constraint is the AND
// // of the individual constraints. That is, the build constraints:
// //
// // // +build linux darwin
// // // +build 386
// //
// // corresponds to the boolean formula:
// //
// // (linux OR darwin) AND 386
//
// Interface represents a build constraint.
type Interface interface {
ConstraintsConvertable
fmt.GoStringer
Evaluate(v map[string]bool) bool
Validate() error
}
// ConstraintsConvertable can be converted to a Constraints object.
type ConstraintsConvertable interface {
ToConstraints() Constraints
}
// ConstraintConvertable can be converted to a Constraint.
type ConstraintConvertable interface {
ToConstraint() Constraint
}
// OptionConvertable can be converted to an Option.
type OptionConvertable interface {
ToOption() Option
}
// Constraints represents the AND of a list of Constraint lines.
type Constraints []Constraint
// And builds Constraints that will be true if all of its constraints are true.
func And(cs ...ConstraintConvertable) Constraints {
constraints := Constraints{}
for _, c := range cs {
constraints = append(constraints, c.ToConstraint())
}
return constraints
}
// ToConstraints returns cs.
func (cs Constraints) ToConstraints() Constraints { return cs }
// Validate validates the constraints set.
func (cs Constraints) Validate() error {
for _, c := range cs {
if err := c.Validate(); err != nil {
return err
}
}
return nil
}
// Evaluate the boolean formula represented by cs under the given assignment of
// tag values. This is the AND of the values of the constituent Constraints.
func (cs Constraints) Evaluate(v map[string]bool) bool {
r := true
for _, c := range cs {
r = r && c.Evaluate(v)
}
return r
}
// GoString represents Constraints as +build comment lines.
func (cs Constraints) GoString() string {
s := ""
for _, c := range cs {
s += c.GoString()
}
return s
}
// Constraint represents the OR of a list of Options.
type Constraint []Option
// Any builds a Constraint that will be true if any of its options are true.
func Any(opts ...OptionConvertable) Constraint {
c := Constraint{}
for _, opt := range opts {
c = append(c, opt.ToOption())
}
return c
}
// ParseConstraint parses a space-separated list of options.
func ParseConstraint(expr string) (Constraint, error) {
c := Constraint{}
for _, field := range strings.Fields(expr) {
opt, err := ParseOption(field)
if err != nil {
return c, err
}
c = append(c, opt)
}
return c, nil
}
// ToConstraints returns the list of constraints containing just c.
func (c Constraint) ToConstraints() Constraints { return Constraints{c} }
// ToConstraint returns c.
func (c Constraint) ToConstraint() Constraint { return c }
// Validate validates the constraint.
func (c Constraint) Validate() error {
for _, o := range c {
if err := o.Validate(); err != nil {
return err
}
}
return nil
}
// Evaluate the boolean formula represented by c under the given assignment of
// tag values. This is the OR of the values of the constituent Options.
func (c Constraint) Evaluate(v map[string]bool) bool {
r := false
for _, o := range c {
r = r || o.Evaluate(v)
}
return r
}
// GoString represents the Constraint as one +build comment line.
func (c Constraint) GoString() string {
s := "// +build"
for _, o := range c {
s += " " + o.GoString()
}
return s + "\n"
}
// Option represents the AND of a list of Terms.
type Option []Term
// Opt builds an Option from the list of Terms.
func Opt(terms ...Term) Option {
return Option(terms)
}
// ParseOption parses a comma-separated list of terms.
func ParseOption(expr string) (Option, error) {
opt := Option{}
for _, t := range strings.Split(expr, ",") {
opt = append(opt, Term(t))
}
return opt, opt.Validate()
}
// ToConstraints returns Constraints containing just this option.
func (o Option) ToConstraints() Constraints { return o.ToConstraint().ToConstraints() }
// ToConstraint returns a Constraint containing just this option.
func (o Option) ToConstraint() Constraint { return Constraint{o} }
// ToOption returns o.
func (o Option) ToOption() Option { return o }
// Validate validates o.
func (o Option) Validate() error {
for _, t := range o {
if err := t.Validate(); err != nil {
return fmt.Errorf("invalid term %q: %w", t, err)
}
}
return nil
}
// Evaluate the boolean formula represented by o under the given assignment of
// tag values. This is the AND of the values of the constituent Terms.
func (o Option) Evaluate(v map[string]bool) bool {
r := true
for _, t := range o {
r = r && t.Evaluate(v)
}
return r
}
// GoString represents the Option as a comma-separated list of terms.
func (o Option) GoString() string {
var ts []string
for _, t := range o {
ts = append(ts, t.GoString())
}
return strings.Join(ts, ",")
}
// Term is an atomic term in a build constraint: an identifier or its negation.
type Term string
// Not returns a term for the negation of ident.
func Not(ident string) Term {
return Term("!" + ident)
}
// ToConstraints returns Constraints containing just this term.
func (t Term) ToConstraints() Constraints { return t.ToOption().ToConstraints() }
// ToConstraint returns a Constraint containing just this term.
func (t Term) ToConstraint() Constraint { return t.ToOption().ToConstraint() }
// ToOption returns an Option containing just this term.
func (t Term) ToOption() Option { return Option{t} }
// IsNegated reports whether t is the negation of an identifier.
func (t Term) IsNegated() bool { return strings.HasPrefix(string(t), "!") }
// Name returns the identifier for this term.
func (t Term) Name() string {
return strings.TrimPrefix(string(t), "!")
}
// Validate the term.
func (t Term) Validate() error {
// Reference: https://github.com/golang/go/blob/204a8f55dc2e0ac8d27a781dab0da609b98560da/src/cmd/go/internal/imports/build.go#L110-L112
//
// if strings.HasPrefix(name, "!!") { // bad syntax, reject always
// return false
// }
//
if strings.HasPrefix(string(t), "!!") {
return errors.New("at most one '!' allowed")
}
if len(t.Name()) == 0 {
return errors.New("empty tag name")
}
// Reference: https://github.com/golang/go/blob/204a8f55dc2e0ac8d27a781dab0da609b98560da/src/cmd/go/internal/imports/build.go#L121-L127
//
// // Tags must be letters, digits, underscores or dots.
// // Unlike in Go identifiers, all digits are fine (e.g., "386").
// for _, c := range name {
// if !unicode.IsLetter(c) && !unicode.IsDigit(c) && c != '_' && c != '.' {
// return false
// }
// }
//
for _, c := range t.Name() {
if !unicode.IsLetter(c) && !unicode.IsDigit(c) && c != '_' && c != '.' {
return fmt.Errorf("character '%c' disallowed in tags", c)
}
}
return nil
}
// Evaluate the term under the given set of identifier values.
func (t Term) Evaluate(v map[string]bool) bool {
return (t.Validate() == nil) && (v[t.Name()] == !t.IsNegated())
}
// GoString returns t.
func (t Term) GoString() string { return string(t) }
// SetTags builds a set where the given list of identifiers are true.
func SetTags(idents ...string) map[string]bool {
v := map[string]bool{}
for _, ident := range idents {
v[ident] = true
}
return v
}
golang-github-mmcloughlin-avo-0.5.0/buildtags/buildtags_test.go 0000664 0000000 0000000 00000007100 14370657153 0024675 0 ustar 00root root 0000000 0000000 package buildtags
import "testing"
func TestGoString(t *testing.T) {
cases := []struct {
Constraint Interface
Expect string
}{
{Term("amd64"), "// +build amd64\n"},
{Any(Opt(Term("linux"), Term("386")), Opt("darwin", Not("cgo"))), "// +build linux,386 darwin,!cgo\n"},
{And(Any(Term("linux"), Term("darwin")), Term("386")), "// +build linux darwin\n// +build 386\n"},
}
for _, c := range cases {
got := c.Constraint.ToConstraints().GoString()
if got != c.Expect {
t.Errorf("constraint %#v GoString() got %q; expected %q", c.Constraint, got, c.Expect)
}
}
}
func TestValidateOK(t *testing.T) {
cases := []Interface{
Term("name"),
Term("!name"),
}
for _, c := range cases {
if err := c.ToConstraints().Validate(); err != nil {
t.Errorf("unexpected validation error for %#v: %q", c, err)
}
}
}
func TestValidateErrors(t *testing.T) {
cases := []struct {
Constraint Interface
ExpectMessage string
}{
{Term(""), "empty tag name"},
{Term("!"), "empty tag name"},
{Term("!!"), "at most one '!' allowed"},
{Term("!abc!def"), "character '!' disallowed in tags"},
{
And(Any(Term("linux"), Term("my-os")), Term("386")).ToConstraints(),
"invalid term \"my-os\": character '-' disallowed in tags",
},
}
for _, c := range cases {
err := c.Constraint.Validate()
if err == nil {
t.Fatalf("expect validation error for constraint:\n%s", c.Constraint.GoString())
}
if err.Error() != c.ExpectMessage {
t.Fatalf("unexpected error message\n\tgot:\t%q\n\texpect:\t%q\n", err, c.ExpectMessage)
}
}
}
func TestParseConstraintRoundTrip(t *testing.T) {
exprs := []string{
"amd64",
"amd64,linux",
"!a",
"!a,b c,!d,e",
"linux,386 darwin,!cgo",
}
for _, expr := range exprs {
c := AssertParseConstraint(t, expr)
got := c.GoString()
expect := "// +build " + expr + "\n"
if got != expect {
t.Fatalf("roundtrip error\n\tgot\t%q\n\texpect\t%q\n", got, expect)
}
}
}
func TestParseConstraintError(t *testing.T) {
expr := "linux,386 my-os,!cgo"
_, err := ParseConstraint(expr)
if err == nil {
t.Fatalf("expected error parsing %q", expr)
}
}
func TestEvaluate(t *testing.T) {
cases := []struct {
Constraint Interface
Values map[string]bool
Expect bool
}{
{Term("a"), SetTags("a"), true},
{Term("!a"), SetTags("a"), false},
{Term("!a"), SetTags(), true},
{Term("inval-id"), SetTags("inval-id"), false},
{Opt(Term("a"), Term("b")), SetTags(), false},
{Opt(Term("a"), Term("b")), SetTags("a"), false},
{Opt(Term("a"), Term("b")), SetTags("b"), false},
{Opt(Term("a"), Term("b")), SetTags("a", "b"), true},
{Opt(Term("a"), Term("b-a-d")), SetTags("a", "b-a-d"), false},
{
Any(Opt(Term("linux"), Term("386")), Opt("darwin", Not("cgo"))),
SetTags("linux", "386"),
true,
},
{
Any(Opt(Term("linux"), Term("386")), Opt("darwin", Not("cgo"))),
SetTags("darwin"),
true,
},
{
Any(Opt(Term("linux"), Term("386")), Opt("darwin", Not("cgo"))),
SetTags("linux", "darwin", "cgo"),
false,
},
{
And(Any(Term("linux"), Term("darwin")), Term("386")),
SetTags("darwin", "386"),
true,
},
}
for _, c := range cases {
got := c.Constraint.Evaluate(c.Values)
if c.Constraint.Validate() != nil && got {
t.Fatal("invalid expressions must evaluate false")
}
if got != c.Expect {
t.Errorf("%#v evaluated with %#v got %v expect %v", c.Constraint, c.Values, got, c.Expect)
}
}
}
func AssertParseConstraint(t *testing.T, expr string) Constraint {
t.Helper()
c, err := ParseConstraint(expr)
if err != nil {
t.Fatalf("error parsing expression %q: %q", expr, err)
}
return c
}
golang-github-mmcloughlin-avo-0.5.0/buildtags/examples_test.go 0000664 0000000 0000000 00000000373 14370657153 0024542 0 ustar 00root root 0000000 0000000 package buildtags_test
import (
"fmt"
"github.com/mmcloughlin/avo/buildtags"
)
func ExampleParseConstraint() {
c, err := buildtags.ParseConstraint("a,!b c")
fmt.Print(c.GoString())
fmt.Println(err)
// Output:
// // +build a,!b c
//
}
golang-github-mmcloughlin-avo-0.5.0/buildtags/syntax.go 0000664 0000000 0000000 00000002443 14370657153 0023213 0 ustar 00root root 0000000 0000000 package buildtags
import (
"bufio"
"bytes"
"fmt"
"go/format"
"strings"
)
// PlusBuildSyntaxSupported reports whether the current Go version supports the
// "// +build" constraint syntax.
func PlusBuildSyntaxSupported() bool { return plusbuild }
// GoBuildSyntaxSupported reports whether the current Go version supports the
// "//go:build" constraint syntax.
func GoBuildSyntaxSupported() bool { return gobuild }
// Format constraints according to the syntax supported by the current Go version.
func Format(t ConstraintsConvertable) (string, error) {
// Print build tags to minimal Go source that can be passed to go/format.
src := t.ToConstraints().GoString() + "\npackage stub"
// Format them.
formatted, err := format.Source([]byte(src))
if err != nil {
return "", fmt.Errorf("format build constraints: %w", err)
}
// Extract the comment lines.
buf := bytes.NewReader(formatted)
scanner := bufio.NewScanner(buf)
output := ""
for scanner.Scan() {
line := scanner.Text()
if (PlusBuildSyntaxSupported() && strings.HasPrefix(line, "// +build")) ||
(GoBuildSyntaxSupported() && strings.HasPrefix(line, "//go:build")) {
output += line + "\n"
}
}
if err := scanner.Err(); err != nil {
return "", fmt.Errorf("parse formatted build constraints: %w", err)
}
return output, nil
}
golang-github-mmcloughlin-avo-0.5.0/buildtags/syntax_go116.go 0000664 0000000 0000000 00000000150 14370657153 0024121 0 ustar 00root root 0000000 0000000 //go:build !go1.17
// +build !go1.17
package buildtags
const (
plusbuild = true
gobuild = false
)
golang-github-mmcloughlin-avo-0.5.0/buildtags/syntax_go117.go 0000664 0000000 0000000 00000000170 14370657153 0024124 0 ustar 00root root 0000000 0000000 //go:build go1.17 && !go1.18
// +build go1.17,!go1.18
package buildtags
const (
plusbuild = true
gobuild = true
)
golang-github-mmcloughlin-avo-0.5.0/buildtags/syntax_go118.go 0000664 0000000 0000000 00000000146 14370657153 0024130 0 ustar 00root root 0000000 0000000 //go:build go1.18
// +build go1.18
package buildtags
const (
plusbuild = false
gobuild = true
)
golang-github-mmcloughlin-avo-0.5.0/buildtags/syntax_test.go 0000664 0000000 0000000 00000002555 14370657153 0024256 0 ustar 00root root 0000000 0000000 package buildtags
import (
"bytes"
"fmt"
"testing"
)
func TestFormat(t *testing.T) {
cases := []struct {
PlusBuild []string
GoBuild string
}{
{
PlusBuild: []string{"amd64"},
GoBuild: "amd64",
},
{
PlusBuild: []string{
"linux darwin",
"amd64 arm64 mips64x ppc64x",
},
GoBuild: "(linux || darwin) && (amd64 || arm64 || mips64x || ppc64x)",
},
{
PlusBuild: []string{"!linux,!darwin !amd64,!arm64,!mips64x,!ppc64x"},
GoBuild: "(!linux && !darwin) || (!amd64 && !arm64 && !mips64x && !ppc64x)",
},
{
PlusBuild: []string{
"linux,386 darwin,!cgo",
"!noasm",
},
GoBuild: "((linux && 386) || (darwin && !cgo)) && !noasm",
},
}
for _, c := range cases {
// Parse constraints.
var cs Constraints
for _, expr := range c.PlusBuild {
constraint, err := ParseConstraint(expr)
if err != nil {
t.Fatal(err)
}
cs = append(cs, constraint)
}
// Build expected output.
var buf bytes.Buffer
if GoBuildSyntaxSupported() {
fmt.Fprintf(&buf, "//go:build %s\n", c.GoBuild)
}
if PlusBuildSyntaxSupported() {
for _, expr := range c.PlusBuild {
fmt.Fprintf(&buf, "// +build %s\n", expr)
}
}
expect := buf.String()
// Format and check.
got, err := Format(cs)
if err != nil {
t.Fatal(err)
}
if got != expect {
t.Errorf("got=\n%s\nexpect=\n%s\n", got, expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/codecov.yml 0000664 0000000 0000000 00000000272 14370657153 0021523 0 ustar 00root root 0000000 0000000 coverage:
status:
project:
default:
informational: true
changes:
default:
informational: true
patch:
default:
informational: true
golang-github-mmcloughlin-avo-0.5.0/doc.go 0000664 0000000 0000000 00000000103 14370657153 0020443 0 ustar 00root root 0000000 0000000 // Package avo is a high-level x86 assembly generator.
package avo
golang-github-mmcloughlin-avo-0.5.0/doc/ 0000775 0000000 0000000 00000000000 14370657153 0020122 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/doc/adopters.md 0000664 0000000 0000000 00000015114 14370657153 0022267 0 ustar 00root root 0000000 0000000 # Adopters
[golang / **go**](https://github.com/golang/go)
The Go programming language
[klauspost / **compress**](https://github.com/klauspost/compress)
Optimized Go Compression Packages
[golang / **crypto**](https://github.com/golang/crypto)
[mirror] Go supplementary cryptography libraries
[klauspost / **reedsolomon**](https://github.com/klauspost/reedsolomon)
Reed-Solomon Erasure Coding in Go
[segmentio / **asm**](https://github.com/segmentio/asm)
Go library providing algorithms optimized to leverage the characteristics of modern CPUs
[cloudflare / **circl**](https://github.com/cloudflare/circl)
CIRCL: Cloudflare Interoperable Reusable Cryptographic Library
[zeebo / **blake3**](https://github.com/zeebo/blake3)
Pure Go implementation of BLAKE3 with AVX2 and SSE4.1 acceleration
[zeebo / **xxh3**](https://github.com/zeebo/xxh3)
XXH3 algorithm in Go
[lukechampine / **blake3**](https://github.com/lukechampine/blake3)
A pure-Go implementation of the BLAKE3 cryptographic hash function
[minio / **md5-simd**](https://github.com/minio/md5-simd)
Accelerate aggregated MD5 hashing performance up to 8x for AVX512 and 4x for AVX2. Useful for server applications that need to compute many MD5 sums in parallel.
[dgryski / **go-bloomindex**](https://github.com/dgryski/go-bloomindex)
Bloom-filter based search index
[FiloSottile / **edwards25519**](https://github.com/FiloSottile/edwards25519)
filippo.io/edwards25519 — A safer, faster, and more powerful low-level edwards25519 Go implementation.
[phoreproject / **bls**](https://github.com/phoreproject/bls)
Go implementation of the BLS12-381 pairing
[lukechampine / **us**](https://github.com/lukechampine/us)
An alternative interface to Sia
[oasisprotocol / **curve25519-voi**](https://github.com/oasisprotocol/curve25519-voi)
High-performance Curve25519/ristretto255 for Go
[dgryski / **go-sip13**](https://github.com/dgryski/go-sip13)
siphash 1-3
[orisano / **wyhash**](https://github.com/orisano/wyhash)
A pure-Go wyhash implementation.
[oasisprotocol / **deoxysii**](https://github.com/oasisprotocol/deoxysii)
Go Deoxys-II-256-128
[mmcloughlin / **md4**](https://github.com/mmcloughlin/md4)
Assembly-optimized MD4 hash algorithm in Go
[dgryski / **go-marvin32**](https://github.com/dgryski/go-marvin32)
Assembly-optimized Marvin32 hash function
[dgryski / **go-speck**](https://github.com/dgryski/go-speck)
SPECK cipher
[dgryski / **go-chaskey**](https://github.com/dgryski/go-chaskey)
go-chaskey: an implementation of chaskey, an efficient MAC for microcontrollers
[ericlagergren / **lwcrypto**](https://github.com/ericlagergren/lwcrypto)
NIST Lightweight Cryptography finalists
golang-github-mmcloughlin-avo-0.5.0/examples/ 0000775 0000000 0000000 00000000000 14370657153 0021173 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/README.md 0000664 0000000 0000000 00000002115 14370657153 0022451 0 ustar 00root root 0000000 0000000 # Examples
Simple functions:
* **[add](add):** Add two numbers. The "Hello World!" of `avo`.
* **[sum](sum):** Sum an array of numbers.
Features:
* **[args](args):** Loading function arguments.
* **[returns](returns):** Building return values.
* **[complex](complex):** Working with `complex{64,128}` types.
* **[data](data):** Defining `DATA` sections.
* **[ext](ext):** Interacting with types from external packages.
* **[pragma](pragma):** Apply compiler directives to generated functions.
"Real" examples:
* **[fnv1a](fnv1a):** [FNV-1a](https://en.wikipedia.org/wiki/Fowler%E2%80%93Noll%E2%80%93Vo_hash_function#FNV-1a_hash) hash function.
* **[dot](dot):** Vector dot product.
* **[geohash](geohash):** Integer [geohash](https://en.wikipedia.org/wiki/Geohash) encoding.
* **[md5x16](md5x16):** AVX-512 accelerated [MD5](https://en.wikipedia.org/wiki/MD5).
* **[sha1](sha1):** [SHA-1](https://en.wikipedia.org/wiki/SHA-1) cryptographic hash.
* **[stadtx](stadtx):** [`StadtX` hash](https://github.com/demerphq/BeagleHash) port from [dgryski/go-stadtx](https://github.com/dgryski/go-stadtx).
golang-github-mmcloughlin-avo-0.5.0/examples/add/ 0000775 0000000 0000000 00000000000 14370657153 0021723 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/add/README.md 0000664 0000000 0000000 00000001716 14370657153 0023207 0 ustar 00root root 0000000 0000000 # add
Add two numbers with `avo`.
The [code generator](asm.go) is as follows:
[embedmd]:# (asm.go)
```go
//go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Add", NOSPLIT, "func(x, y uint64) uint64")
Doc("Add adds x and y.")
x := Load(Param("x"), GP64())
y := Load(Param("y"), GP64())
ADDQ(x, y)
Store(y, ReturnIndex(0))
RET()
Generate()
}
```
We use a [`go:generate`](https://blog.golang.org/generate) line to produce the assembly and Go stub files together.
[embedmd]:# (add_test.go go /.*go:generate.*/)
```go
//go:generate go run asm.go -out add.s -stubs stub.go
```
This produces [`add.s`](add.s) as follows:
[embedmd]:# (add.s)
```s
// Code generated by command: go run asm.go -out add.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Add(x uint64, y uint64) uint64
TEXT ·Add(SB), NOSPLIT, $0-24
MOVQ x+0(FP), AX
MOVQ y+8(FP), CX
ADDQ AX, CX
MOVQ CX, ret+16(FP)
RET
```
golang-github-mmcloughlin-avo-0.5.0/examples/add/add.s 0000664 0000000 0000000 00000000375 14370657153 0022644 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out add.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Add(x uint64, y uint64) uint64
TEXT ·Add(SB), NOSPLIT, $0-24
MOVQ x+0(FP), AX
MOVQ y+8(FP), CX
ADDQ AX, CX
MOVQ CX, ret+16(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/add/add_test.go 0000664 0000000 0000000 00000000416 14370657153 0024042 0 ustar 00root root 0000000 0000000 package add
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out add.s -stubs stub.go
func TestAdd(t *testing.T) {
expect := func(x, y uint64) uint64 { return x + y }
if err := quick.CheckEqual(Add, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/add/asm.go 0000664 0000000 0000000 00000000462 14370657153 0023034 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Add", NOSPLIT, "func(x, y uint64) uint64")
Doc("Add adds x and y.")
x := Load(Param("x"), GP64())
y := Load(Param("y"), GP64())
ADDQ(x, y)
Store(y, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/add/doc.go 0000664 0000000 0000000 00000000100 14370657153 0023006 0 ustar 00root root 0000000 0000000 // Package add demonstrates an Add function in avo.
package add
golang-github-mmcloughlin-avo-0.5.0/examples/add/stub.go 0000664 0000000 0000000 00000000233 14370657153 0023225 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out add.s -stubs stub.go. DO NOT EDIT.
package add
// Add adds x and y.
func Add(x uint64, y uint64) uint64
golang-github-mmcloughlin-avo-0.5.0/examples/args/ 0000775 0000000 0000000 00000000000 14370657153 0022127 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/args/README.md 0000664 0000000 0000000 00000007641 14370657153 0023416 0 ustar 00root root 0000000 0000000 # args
Demonstrates how to reference function parameters in `avo`.
## Basics
Use `Param()` to reference arguments by name. The `Load()` function can be used to load the argument into a register (this will select the correct `MOV` instruction for you). Likewise `Store` and `ReturnIndex` can be used to write the return value. The following function will return its second argument.
[embedmd]:# (asm.go go /.*TEXT.*Second/ /RET.*/)
```go
TEXT("Second", NOSPLIT, "func(x, y int32) int32")
y := Load(Param("y"), GP32())
Store(y, ReturnIndex(0))
RET()
```
This `avo` code will generate the following assembly. Note that parameter references are named to conform to [`asmdecl`](https://godoc.org/golang.org/x/tools/go/analysis/passes/asmdecl) rules enforced by `go vet`.
[embedmd]:# (args.s s /.*func Second/ /RET/)
```s
// func Second(x int32, y int32) int32
TEXT ·Second(SB), NOSPLIT, $0-12
MOVL y+4(FP), AX
MOVL AX, ret+8(FP)
RET
```
Primitive types can be loaded as above. Other types consist of sub-components which must be loaded into registers independently; for example strings, slices, arrays, structs and complex values.
## Strings and Slices
Strings and slices actually consist of multiple components under the hood: see [`reflect.StringHeader`](https://golang.org/pkg/reflect/#StringHeader) and [`reflect.SliceHeader`](https://golang.org/pkg/reflect/#SliceHeader). The following `avo` code allows you to load the string length.
[embedmd]:# (asm.go go /.*TEXT.*StringLen/ /RET.*/)
```go
TEXT("StringLen", NOSPLIT, "func(s string) int")
strlen := Load(Param("s").Len(), GP64())
Store(strlen, ReturnIndex(0))
RET()
```
The same code would work for a slice argument. Likewise `Param(...).Base()` and `Param(...).Cap()` will load the base pointer and capacity (slice only).
## Array Indexing
Arrays can be indexed with the `Index()` method. For example, the following returns the third element of the passed array.
[embedmd]:# (asm.go go /.*TEXT.*ArrayThree/ /RET.*/)
```go
TEXT("ArrayThree", NOSPLIT, "func(a [7]uint64) uint64")
a3 := Load(Param("a").Index(3), GP64())
Store(a3, ReturnIndex(0))
RET()
```
## Struct Fields
Struct fields can be accessed with the `Field()` method. Note that this _requires_ the package to be specified, so that `avo` can parse the type definition. In this example we specify the package with the line:
[embedmd]:# (asm.go go /.*Package\(.*/)
```go
Package("github.com/mmcloughlin/avo/examples/args")
```
This package contains the struct definition:
[embedmd]:# (args.go go /type Struct/ /^}/)
```go
type Struct struct {
Byte byte
Int8 int8
Uint16 uint16
Int32 int32
Uint64 uint64
Float32 float32
Float64 float64
String string
Slice []Sub
Array [5]Sub
Complex64 complex64
Complex128 complex128
}
```
The following function will return the `Float64` field from this struct.
[embedmd]:# (asm.go go /.*TEXT.*FieldFloat64/ /RET.*/)
```go
TEXT("FieldFloat64", NOSPLIT, "func(s Struct) float64")
f64 := Load(Param("s").Field("Float64"), XMM())
Store(f64, ReturnIndex(0))
RET()
```
## Complex Values
Complex types `complex{64,128}` are actually just pairs of `float{32,64}` values. These can be accessed with the `Real()` and `Imag()` methods. For example the following function returns the imaginary part of the `Complex64` struct field.
[embedmd]:# (asm.go go /.*TEXT.*FieldComplex64Imag/ /RET.*/)
```go
TEXT("FieldComplex64Imag", NOSPLIT, "func(s Struct) float32")
c64i := Load(Param("s").Field("Complex64").Imag(), XMM())
Store(c64i, ReturnIndex(0))
RET()
```
## Nested Data Structures
The above methods may be composed to reference arbitrarily nested data structures. For example, the following returns `s.Array[2].B[2]`.
[embedmd]:# (asm.go go /.*TEXT.*FieldArrayTwoBTwo/ /RET.*/)
```go
TEXT("FieldArrayTwoBTwo", NOSPLIT, "func(s Struct) byte")
b2 := Load(Param("s").Field("Array").Index(2).Field("B").Index(2), GP8())
Store(b2, ReturnIndex(0))
RET()
```
golang-github-mmcloughlin-avo-0.5.0/examples/args/args.go 0000664 0000000 0000000 00000000755 14370657153 0023421 0 ustar 00root root 0000000 0000000 package args
// Struct is a struct containing various datatypes, to help demonstrate struct field access.
type Struct struct {
Byte byte
Int8 int8
Uint16 uint16
Int32 int32
Uint64 uint64
Float32 float32
Float64 float64
String string
Slice []Sub
Array [5]Sub
Complex64 complex64
Complex128 complex128
}
// Sub is a sub-struct of Struct, to demonstrate nested datastructure accesses.
type Sub struct {
A uint64
B [3]byte
C uint16
}
golang-github-mmcloughlin-avo-0.5.0/examples/args/args.s 0000664 0000000 0000000 00000005244 14370657153 0023254 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out args.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Second(x int32, y int32) int32
TEXT ·Second(SB), NOSPLIT, $0-12
MOVL y+4(FP), AX
MOVL AX, ret+8(FP)
RET
// func StringLen(s string) int
TEXT ·StringLen(SB), NOSPLIT, $0-24
MOVQ s_len+8(FP), AX
MOVQ AX, ret+16(FP)
RET
// func SliceLen(s []int) int
TEXT ·SliceLen(SB), NOSPLIT, $0-32
MOVQ s_len+8(FP), AX
MOVQ AX, ret+24(FP)
RET
// func SliceCap(s []int) int
TEXT ·SliceCap(SB), NOSPLIT, $0-32
MOVQ s_cap+16(FP), AX
MOVQ AX, ret+24(FP)
RET
// func ArrayThree(a [7]uint64) uint64
TEXT ·ArrayThree(SB), NOSPLIT, $0-64
MOVQ a_3+24(FP), AX
MOVQ AX, ret+56(FP)
RET
// func FieldByte(s Struct) byte
TEXT ·FieldByte(SB), NOSPLIT, $0-177
MOVB s_Byte+0(FP), AL
MOVB AL, ret+176(FP)
RET
// func FieldInt8(s Struct) int8
TEXT ·FieldInt8(SB), NOSPLIT, $0-177
MOVB s_Int8+1(FP), AL
MOVB AL, ret+176(FP)
RET
// func FieldUint16(s Struct) uint16
TEXT ·FieldUint16(SB), NOSPLIT, $0-178
MOVW s_Uint16+2(FP), AX
MOVW AX, ret+176(FP)
RET
// func FieldInt32(s Struct) int32
TEXT ·FieldInt32(SB), NOSPLIT, $0-180
MOVL s_Int32+4(FP), AX
MOVL AX, ret+176(FP)
RET
// func FieldUint64(s Struct) uint64
TEXT ·FieldUint64(SB), NOSPLIT, $0-184
MOVQ s_Uint64+8(FP), AX
MOVQ AX, ret+176(FP)
RET
// func FieldFloat32(s Struct) float32
// Requires: SSE
TEXT ·FieldFloat32(SB), NOSPLIT, $0-180
MOVSS s_Float32+16(FP), X0
MOVSS X0, ret+176(FP)
RET
// func FieldFloat64(s Struct) float64
// Requires: SSE2
TEXT ·FieldFloat64(SB), NOSPLIT, $0-184
MOVSD s_Float64+24(FP), X0
MOVSD X0, ret+176(FP)
RET
// func FieldStringLen(s Struct) int
TEXT ·FieldStringLen(SB), NOSPLIT, $0-184
MOVQ s_String_len+40(FP), AX
MOVQ AX, ret+176(FP)
RET
// func FieldSliceCap(s Struct) int
TEXT ·FieldSliceCap(SB), NOSPLIT, $0-184
MOVQ s_Slice_cap+64(FP), AX
MOVQ AX, ret+176(FP)
RET
// func FieldArrayTwoBTwo(s Struct) byte
TEXT ·FieldArrayTwoBTwo(SB), NOSPLIT, $0-177
MOVB s_Array_2_B_2+114(FP), AL
MOVB AL, ret+176(FP)
RET
// func FieldArrayOneC(s Struct) uint16
TEXT ·FieldArrayOneC(SB), NOSPLIT, $0-178
MOVW s_Array_1_C+100(FP), AX
MOVW AX, ret+176(FP)
RET
// func FieldComplex64Imag(s Struct) float32
// Requires: SSE
TEXT ·FieldComplex64Imag(SB), NOSPLIT, $0-180
MOVSS s_Complex64_imag+156(FP), X0
MOVSS X0, ret+176(FP)
RET
// func FieldComplex128Real(s Struct) float64
// Requires: SSE2
TEXT ·FieldComplex128Real(SB), NOSPLIT, $0-184
MOVSD s_Complex128_real+160(FP), X0
MOVSD X0, ret+176(FP)
RET
// func DereferenceFloat32(s *Struct) float32
// Requires: SSE
TEXT ·DereferenceFloat32(SB), NOSPLIT, $0-12
MOVQ s+0(FP), AX
MOVSS 16(AX), X0
MOVSS X0, ret+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/args/args_test.go 0000664 0000000 0000000 00000003146 14370657153 0024455 0 ustar 00root root 0000000 0000000 package args
import (
"math"
"testing"
"testing/quick"
)
//go:generate go run asm.go -out args.s -stubs stub.go
func TestFunctionsEqual(t *testing.T) {
cases := []struct {
f, g interface{}
}{
{Second, func(x, y int32) int32 { return y }},
{StringLen, func(s string) int { return len(s) }},
{SliceLen, func(s []int) int { return len(s) }},
{SliceCap, func(s []int) int { return cap(s) }},
{ArrayThree, func(a [7]uint64) uint64 { return a[3] }},
{FieldByte, func(s Struct) byte { return s.Byte }},
{FieldInt8, func(s Struct) int8 { return s.Int8 }},
{FieldUint16, func(s Struct) uint16 { return s.Uint16 }},
{FieldInt32, func(s Struct) int32 { return s.Int32 }},
{FieldUint64, func(s Struct) uint64 { return s.Uint64 }},
{FieldFloat32, func(s Struct) float32 { return s.Float32 }},
{FieldFloat64, func(s Struct) float64 { return s.Float64 }},
{FieldStringLen, func(s Struct) int { return len(s.String) }},
{FieldSliceCap, func(s Struct) int { return cap(s.Slice) }},
{FieldArrayTwoBTwo, func(s Struct) byte { return s.Array[2].B[2] }},
{FieldArrayOneC, func(s Struct) uint16 { return s.Array[1].C }},
{FieldComplex64Imag, func(s Struct) float32 { return imag(s.Complex64) }},
{FieldComplex128Real, func(s Struct) float64 { return real(s.Complex128) }},
}
for _, c := range cases {
if err := quick.CheckEqual(c.f, c.g, nil); err != nil {
t.Fatal(err)
}
}
}
func TestDereferenceFloat32(t *testing.T) {
expect := float32(math.Pi)
s := Struct{Float32: expect}
got := DereferenceFloat32(&s)
if got != expect {
t.Errorf("DereferenceFloat32(%v) = %v; expect %v", s, got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/args/asm.go 0000664 0000000 0000000 00000005503 14370657153 0023241 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
Package("github.com/mmcloughlin/avo/examples/args")
TEXT("Second", NOSPLIT, "func(x, y int32) int32")
y := Load(Param("y"), GP32())
Store(y, ReturnIndex(0))
RET()
TEXT("StringLen", NOSPLIT, "func(s string) int")
strlen := Load(Param("s").Len(), GP64())
Store(strlen, ReturnIndex(0))
RET()
TEXT("SliceLen", NOSPLIT, "func(s []int) int")
slicelen := Load(Param("s").Len(), GP64())
Store(slicelen, ReturnIndex(0))
RET()
TEXT("SliceCap", NOSPLIT, "func(s []int) int")
slicecap := Load(Param("s").Cap(), GP64())
Store(slicecap, ReturnIndex(0))
RET()
TEXT("ArrayThree", NOSPLIT, "func(a [7]uint64) uint64")
a3 := Load(Param("a").Index(3), GP64())
Store(a3, ReturnIndex(0))
RET()
TEXT("FieldByte", NOSPLIT, "func(s Struct) byte")
b := Load(Param("s").Field("Byte"), GP8())
Store(b, ReturnIndex(0))
RET()
TEXT("FieldInt8", NOSPLIT, "func(s Struct) int8")
i8 := Load(Param("s").Field("Int8"), GP8())
Store(i8, ReturnIndex(0))
RET()
TEXT("FieldUint16", NOSPLIT, "func(s Struct) uint16")
u16 := Load(Param("s").Field("Uint16"), GP16())
Store(u16, ReturnIndex(0))
RET()
TEXT("FieldInt32", NOSPLIT, "func(s Struct) int32")
i32 := Load(Param("s").Field("Int32"), GP32())
Store(i32, ReturnIndex(0))
RET()
TEXT("FieldUint64", NOSPLIT, "func(s Struct) uint64")
u64 := Load(Param("s").Field("Uint64"), GP64())
Store(u64, ReturnIndex(0))
RET()
TEXT("FieldFloat32", NOSPLIT, "func(s Struct) float32")
f32 := Load(Param("s").Field("Float32"), XMM())
Store(f32, ReturnIndex(0))
RET()
TEXT("FieldFloat64", NOSPLIT, "func(s Struct) float64")
f64 := Load(Param("s").Field("Float64"), XMM())
Store(f64, ReturnIndex(0))
RET()
TEXT("FieldStringLen", NOSPLIT, "func(s Struct) int")
l := Load(Param("s").Field("String").Len(), GP64())
Store(l, ReturnIndex(0))
RET()
TEXT("FieldSliceCap", NOSPLIT, "func(s Struct) int")
c := Load(Param("s").Field("Slice").Cap(), GP64())
Store(c, ReturnIndex(0))
RET()
TEXT("FieldArrayTwoBTwo", NOSPLIT, "func(s Struct) byte")
b2 := Load(Param("s").Field("Array").Index(2).Field("B").Index(2), GP8())
Store(b2, ReturnIndex(0))
RET()
TEXT("FieldArrayOneC", NOSPLIT, "func(s Struct) uint16")
c1 := Load(Param("s").Field("Array").Index(1).Field("C"), GP16())
Store(c1, ReturnIndex(0))
RET()
TEXT("FieldComplex64Imag", NOSPLIT, "func(s Struct) float32")
c64i := Load(Param("s").Field("Complex64").Imag(), XMM())
Store(c64i, ReturnIndex(0))
RET()
TEXT("FieldComplex128Real", NOSPLIT, "func(s Struct) float64")
c128r := Load(Param("s").Field("Complex128").Real(), XMM())
Store(c128r, ReturnIndex(0))
RET()
TEXT("DereferenceFloat32", NOSPLIT, "func(s *Struct) float32")
s := Dereference(Param("s"))
f := Load(s.Field("Float32"), XMM())
Store(f, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/args/doc.go 0000664 0000000 0000000 00000000121 14370657153 0023215 0 ustar 00root root 0000000 0000000 // Package args demonstrates how to load function arguments in avo.
package args
golang-github-mmcloughlin-avo-0.5.0/examples/args/stub.go 0000664 0000000 0000000 00000001407 14370657153 0023435 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out args.s -stubs stub.go. DO NOT EDIT.
package args
func Second(x int32, y int32) int32
func StringLen(s string) int
func SliceLen(s []int) int
func SliceCap(s []int) int
func ArrayThree(a [7]uint64) uint64
func FieldByte(s Struct) byte
func FieldInt8(s Struct) int8
func FieldUint16(s Struct) uint16
func FieldInt32(s Struct) int32
func FieldUint64(s Struct) uint64
func FieldFloat32(s Struct) float32
func FieldFloat64(s Struct) float64
func FieldStringLen(s Struct) int
func FieldSliceCap(s Struct) int
func FieldArrayTwoBTwo(s Struct) byte
func FieldArrayOneC(s Struct) uint16
func FieldComplex64Imag(s Struct) float32
func FieldComplex128Real(s Struct) float64
func DereferenceFloat32(s *Struct) float32
golang-github-mmcloughlin-avo-0.5.0/examples/complex/ 0000775 0000000 0000000 00000000000 14370657153 0022642 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/complex/README.md 0000664 0000000 0000000 00000001616 14370657153 0024125 0 ustar 00root root 0000000 0000000 # complex
Demonstrates how to access complex types in `avo`.
The `Real()` and `Imag()` parameter methods may be used to load the sub-components of complex arguments. The following function uses these to implement the [complex norm](http://mathworld.wolfram.com/ComplexModulus.html).
[embedmd]:# (asm.go go /.*TEXT.*Norm/ /RET.*/)
```go
TEXT("Norm", NOSPLIT, "func(z complex128) float64")
Doc("Norm returns the complex norm of z.")
r = Load(Param("z").Real(), XMM())
i = Load(Param("z").Imag(), XMM())
MULSD(r, r)
MULSD(i, i)
ADDSD(i, r)
n := XMM()
SQRTSD(r, n)
Store(n, ReturnIndex(0))
RET()
```
Generated assembly:
[embedmd]:# (complex.s s /.*func Norm/ /RET/)
```s
// func Norm(z complex128) float64
// Requires: SSE2
TEXT ·Norm(SB), NOSPLIT, $0-24
MOVSD z_real+0(FP), X0
MOVSD z_imag+8(FP), X1
MULSD X0, X0
MULSD X1, X1
ADDSD X1, X0
SQRTSD X0, X2
MOVSD X2, ret+16(FP)
RET
```
golang-github-mmcloughlin-avo-0.5.0/examples/complex/asm.go 0000664 0000000 0000000 00000001326 14370657153 0023753 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Real", NOSPLIT, "func(z complex128) float64")
Doc("Real returns the real part of z.")
r := Load(Param("z").Real(), XMM())
Store(r, ReturnIndex(0))
RET()
TEXT("Imag", NOSPLIT, "func(z complex128) float64")
Doc("Imag returns the imaginary part of z.")
i := Load(Param("z").Imag(), XMM())
Store(i, ReturnIndex(0))
RET()
TEXT("Norm", NOSPLIT, "func(z complex128) float64")
Doc("Norm returns the complex norm of z.")
r = Load(Param("z").Real(), XMM())
i = Load(Param("z").Imag(), XMM())
MULSD(r, r)
MULSD(i, i)
ADDSD(i, r)
n := XMM()
SQRTSD(r, n)
Store(n, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/complex/complex.s 0000664 0000000 0000000 00000001141 14370657153 0024472 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out complex.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Real(z complex128) float64
// Requires: SSE2
TEXT ·Real(SB), NOSPLIT, $0-24
MOVSD z_real+0(FP), X0
MOVSD X0, ret+16(FP)
RET
// func Imag(z complex128) float64
// Requires: SSE2
TEXT ·Imag(SB), NOSPLIT, $0-24
MOVSD z_imag+8(FP), X0
MOVSD X0, ret+16(FP)
RET
// func Norm(z complex128) float64
// Requires: SSE2
TEXT ·Norm(SB), NOSPLIT, $0-24
MOVSD z_real+0(FP), X0
MOVSD z_imag+8(FP), X1
MULSD X0, X0
MULSD X1, X1
ADDSD X1, X0
SQRTSD X0, X2
MOVSD X2, ret+16(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/complex/complex_test.go 0000664 0000000 0000000 00000001244 14370657153 0025700 0 ustar 00root root 0000000 0000000 package complex
import (
"math"
"testing"
"testing/quick"
)
//go:generate go run asm.go -out complex.s -stubs stub.go
func TestReal(t *testing.T) {
expect := func(z complex128) float64 {
return real(z)
}
if err := quick.CheckEqual(Real, expect, nil); err != nil {
t.Fatal(err)
}
}
func TestImag(t *testing.T) {
expect := func(z complex128) float64 {
return imag(z)
}
if err := quick.CheckEqual(Imag, expect, nil); err != nil {
t.Fatal(err)
}
}
func TestNorm(t *testing.T) {
expect := func(z complex128) float64 {
return math.Sqrt(real(z)*real(z) + imag(z)*imag(z))
}
if err := quick.CheckEqual(Norm, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/complex/doc.go 0000664 0000000 0000000 00000000120 14370657153 0023727 0 ustar 00root root 0000000 0000000 // Package complex shows how to work with complex types in avo.
package complex
golang-github-mmcloughlin-avo-0.5.0/examples/complex/stub.go 0000664 0000000 0000000 00000000500 14370657153 0024141 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out complex.s -stubs stub.go. DO NOT EDIT.
package complex
// Real returns the real part of z.
func Real(z complex128) float64
// Imag returns the imaginary part of z.
func Imag(z complex128) float64
// Norm returns the complex norm of z.
func Norm(z complex128) float64
golang-github-mmcloughlin-avo-0.5.0/examples/data/ 0000775 0000000 0000000 00000000000 14370657153 0022104 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/data/README.md 0000664 0000000 0000000 00000001701 14370657153 0023362 0 ustar 00root root 0000000 0000000 # data
Constructing data sections in `avo`.
A data section is declared with the `GLOBL` function, and values are specified with `DATA`. The size of the data section will grow as values are added to it.
[embedmd]:# (asm.go go /.*GLOBL\(/ /^$/)
```go
bytes := GLOBL("bytes", RODATA|NOPTR)
DATA(0, U64(0x0011223344556677))
DATA(8, String("strconst"))
DATA(16, F32(math.Pi))
DATA(24, F64(math.Pi))
DATA(32, U32(0x00112233))
DATA(36, U16(0x4455))
DATA(38, U8(0x66))
DATA(39, U8(0x77))
```
The `GLOBL` function returns a reference which may be used in assembly code. The following function indexes into the data section just created.
[embedmd]:# (asm.go go /.*TEXT.*DataAt/ /RET.*/)
```go
TEXT("DataAt", NOSPLIT, "func(i int) byte")
Doc("DataAt returns byte i in the 'bytes' global data section.")
i := Load(Param("i"), GP64())
ptr := Mem{Base: GP64()}
LEAQ(bytes, ptr.Base)
b := GP8()
MOVB(ptr.Idx(i, 1), b)
Store(b, ReturnIndex(0))
RET()
```
golang-github-mmcloughlin-avo-0.5.0/examples/data/asm.go 0000664 0000000 0000000 00000001247 14370657153 0023217 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"math"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
bytes := GLOBL("bytes", RODATA|NOPTR)
DATA(0, U64(0x0011223344556677))
DATA(8, String("strconst"))
DATA(16, F32(math.Pi))
DATA(24, F64(math.Pi))
DATA(32, U32(0x00112233))
DATA(36, U16(0x4455))
DATA(38, U8(0x66))
DATA(39, U8(0x77))
TEXT("DataAt", NOSPLIT, "func(i int) byte")
Doc("DataAt returns byte i in the 'bytes' global data section.")
i := Load(Param("i"), GP64())
ptr := Mem{Base: GP64()}
LEAQ(bytes, ptr.Base)
b := GP8()
MOVB(ptr.Idx(i, 1), b)
Store(b, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/data/data.s 0000664 0000000 0000000 00000001077 14370657153 0023206 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out data.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
DATA bytes<>+0(SB)/8, $0x0011223344556677
DATA bytes<>+8(SB)/8, $"strconst"
DATA bytes<>+16(SB)/4, $(3.1415927)
DATA bytes<>+24(SB)/8, $(3.141592653589793)
DATA bytes<>+32(SB)/4, $0x00112233
DATA bytes<>+36(SB)/2, $0x4455
DATA bytes<>+38(SB)/1, $0x66
DATA bytes<>+39(SB)/1, $0x77
GLOBL bytes<>(SB), RODATA|NOPTR, $40
// func DataAt(i int) byte
TEXT ·DataAt(SB), NOSPLIT, $0-9
MOVQ i+0(FP), AX
LEAQ bytes<>+0(SB), CX
MOVB (CX)(AX*1), AL
MOVB AL, ret+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/data/data_test.go 0000664 0000000 0000000 00000001763 14370657153 0024412 0 ustar 00root root 0000000 0000000 package data
import (
"encoding/binary"
"math"
"testing"
)
//go:generate go run asm.go -out data.s -stubs stub.go
func TestDataAt(t *testing.T) {
order := binary.LittleEndian
expect := make([]byte, 40)
order.PutUint64(expect[0:], 0x0011223344556677) // DATA(0, U64(0x0011223344556677))
copy(expect[8:], []byte("strconst")) // DATA(8, String("strconst"))
order.PutUint32(expect[16:], math.Float32bits(math.Pi)) // DATA(16, F32(math.Pi))
order.PutUint64(expect[24:], math.Float64bits(math.Pi)) // DATA(24, F64(math.Pi))
order.PutUint32(expect[32:], 0x00112233) // DATA(32, U32(0x00112233))
order.PutUint16(expect[36:], 0x4455) // DATA(36, U16(0x4455))
expect[38] = 0x66 // DATA(38, U8(0x66))
expect[39] = 0x77 // DATA(39, U8(0x77))
for i, e := range expect {
b := DataAt(i)
if b != e {
t.Errorf("DataAt(%d) = %#02x; expected %#02x", i, b, e)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/data/doc.go 0000664 0000000 0000000 00000000107 14370657153 0023176 0 ustar 00root root 0000000 0000000 // Package data shows how to define DATA sections in avo.
package data
golang-github-mmcloughlin-avo-0.5.0/examples/data/stub.go 0000664 0000000 0000000 00000000271 14370657153 0023410 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out data.s -stubs stub.go. DO NOT EDIT.
package data
// DataAt returns byte i in the 'bytes' global data section.
func DataAt(i int) byte
golang-github-mmcloughlin-avo-0.5.0/examples/doc.go 0000664 0000000 0000000 00000000105 14370657153 0022263 0 ustar 00root root 0000000 0000000 // Package examples provides examples of avo usage.
package examples
golang-github-mmcloughlin-avo-0.5.0/examples/dot/ 0000775 0000000 0000000 00000000000 14370657153 0021761 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/dot/README.md 0000664 0000000 0000000 00000000370 14370657153 0023240 0 ustar 00root root 0000000 0000000 # dot
[Dot product](https://en.wikipedia.org/wiki/Dot_product) in `avo`. Ported from the [`dot_product.py` PeachPy example](https://github.com/Maratyszcza/PeachPy/blob/01d15157a973a4ae16b8046313ddab371ea582db/examples/go-generate/dot_product.py).
golang-github-mmcloughlin-avo-0.5.0/examples/dot/asm.go 0000664 0000000 0000000 00000003452 14370657153 0023074 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
var unroll = 6
func main() {
TEXT("Dot", NOSPLIT, "func(x, y []float32) float32")
x := Mem{Base: Load(Param("x").Base(), GP64())}
y := Mem{Base: Load(Param("y").Base(), GP64())}
n := Load(Param("x").Len(), GP64())
// Allocate accumulation registers.
acc := make([]VecVirtual, unroll)
for i := 0; i < unroll; i++ {
acc[i] = YMM()
}
// Zero initialization.
for i := 0; i < unroll; i++ {
VXORPS(acc[i], acc[i], acc[i])
}
// Loop over blocks and process them with vector instructions.
blockitems := 8 * unroll
blocksize := 4 * blockitems
Label("blockloop")
CMPQ(n, U32(blockitems))
JL(LabelRef("tail"))
// Load x.
xs := make([]VecVirtual, unroll)
for i := 0; i < unroll; i++ {
xs[i] = YMM()
}
for i := 0; i < unroll; i++ {
VMOVUPS(x.Offset(32*i), xs[i])
}
// The actual FMA.
for i := 0; i < unroll; i++ {
VFMADD231PS(y.Offset(32*i), xs[i], acc[i])
}
ADDQ(U32(blocksize), x.Base)
ADDQ(U32(blocksize), y.Base)
SUBQ(U32(blockitems), n)
JMP(LabelRef("blockloop"))
// Process any trailing entries.
Label("tail")
tail := XMM()
VXORPS(tail, tail, tail)
Label("tailloop")
CMPQ(n, U32(0))
JE(LabelRef("reduce"))
xt := XMM()
VMOVSS(x, xt)
VFMADD231SS(y, xt, tail)
ADDQ(U32(4), x.Base)
ADDQ(U32(4), y.Base)
DECQ(n)
JMP(LabelRef("tailloop"))
// Reduce the lanes to one.
Label("reduce")
for i := 1; i < unroll; i++ {
VADDPS(acc[0], acc[i], acc[0])
}
result := acc[0].AsX()
top := XMM()
VEXTRACTF128(U8(1), acc[0], top)
VADDPS(result, top, result)
VADDPS(result, tail, result)
VHADDPS(result, result, result)
VHADDPS(result, result, result)
Store(result, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/dot/doc.go 0000664 0000000 0000000 00000000101 14370657153 0023045 0 ustar 00root root 0000000 0000000 // Package dot implements vector dot product in avo.
package dot
golang-github-mmcloughlin-avo-0.5.0/examples/dot/dot.s 0000664 0000000 0000000 00000002605 14370657153 0022736 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out dot.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Dot(x []float32, y []float32) float32
// Requires: AVX, FMA3, SSE
TEXT ·Dot(SB), NOSPLIT, $0-52
MOVQ x_base+0(FP), AX
MOVQ y_base+24(FP), CX
MOVQ x_len+8(FP), DX
VXORPS Y0, Y0, Y0
VXORPS Y1, Y1, Y1
VXORPS Y2, Y2, Y2
VXORPS Y3, Y3, Y3
VXORPS Y4, Y4, Y4
VXORPS Y5, Y5, Y5
blockloop:
CMPQ DX, $0x00000030
JL tail
VMOVUPS (AX), Y6
VMOVUPS 32(AX), Y7
VMOVUPS 64(AX), Y8
VMOVUPS 96(AX), Y9
VMOVUPS 128(AX), Y10
VMOVUPS 160(AX), Y11
VFMADD231PS (CX), Y6, Y0
VFMADD231PS 32(CX), Y7, Y1
VFMADD231PS 64(CX), Y8, Y2
VFMADD231PS 96(CX), Y9, Y3
VFMADD231PS 128(CX), Y10, Y4
VFMADD231PS 160(CX), Y11, Y5
ADDQ $0x000000c0, AX
ADDQ $0x000000c0, CX
SUBQ $0x00000030, DX
JMP blockloop
tail:
VXORPS X6, X6, X6
tailloop:
CMPQ DX, $0x00000000
JE reduce
VMOVSS (AX), X7
VFMADD231SS (CX), X7, X6
ADDQ $0x00000004, AX
ADDQ $0x00000004, CX
DECQ DX
JMP tailloop
reduce:
VADDPS Y0, Y1, Y0
VADDPS Y0, Y2, Y0
VADDPS Y0, Y3, Y0
VADDPS Y0, Y4, Y0
VADDPS Y0, Y5, Y0
VEXTRACTF128 $0x01, Y0, X1
VADDPS X0, X1, X0
VADDPS X0, X6, X0
VHADDPS X0, X0, X0
VHADDPS X0, X0, X0
MOVSS X0, ret+48(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/dot/dot_test.go 0000664 0000000 0000000 00000002102 14370657153 0024130 0 ustar 00root root 0000000 0000000 package dot
import (
"math/rand"
"testing"
"golang.org/x/sys/cpu"
)
//go:generate go run asm.go -out dot.s -stubs stub.go
func RequireISAs(t *testing.T) {
t.Helper()
if !(cpu.X86.HasAVX && cpu.X86.HasFMA) {
t.Skip("requires AVX and FMA3 instruction sets")
}
}
func TestEmpty(t *testing.T) {
RequireISAs(t)
if Dot(nil, nil) != 0.0 {
t.Fatal("expect dot product of empty vectors to be zero")
}
}
func TestLengths(t *testing.T) {
RequireISAs(t)
const epsilon = 0.00001
for n := 0; n < 1000; n++ {
x, y := RandomVector(n), RandomVector(n)
got := Dot(x, y)
expect := Expect(x, y)
relerr := got/expect - 1.0
if Abs(relerr) > epsilon {
t.Fatalf("bad result on vector length %d: got %v expect %v relative error %f", n, got, expect, relerr)
}
}
}
func Expect(x, y []float32) float32 {
var p float32
for i := range x {
p += x[i] * y[i]
}
return p
}
func RandomVector(n int) []float32 {
x := make([]float32, n)
for i := 0; i < n; i++ {
x[i] = rand.Float32() * 100
}
return x
}
func Abs(x float32) float32 {
if x < 0.0 {
return -x
}
return x
}
golang-github-mmcloughlin-avo-0.5.0/examples/dot/stub.go 0000664 0000000 0000000 00000000215 14370657153 0023263 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out dot.s -stubs stub.go. DO NOT EDIT.
package dot
func Dot(x []float32, y []float32) float32
golang-github-mmcloughlin-avo-0.5.0/examples/ext/ 0000775 0000000 0000000 00000000000 14370657153 0021773 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/ext/README.md 0000664 0000000 0000000 00000001615 14370657153 0023255 0 ustar 00root root 0000000 0000000 # ext
Demonstrates how to use external types in an `avo` function signature.
In this case, you will need to write the function stub yourself.
[embedmd]:# (stub.go /package/ $)
```go
package ext
import "github.com/mmcloughlin/avo/examples/ext/ext"
// StructFieldB returns field B.
func StructFieldB(e ext.Struct) byte
```
Then in place of the usual `TEXT` declaration we use `Implement` to state that we are beginning the definition of a function already declared in the package stub file.
[embedmd]:# (asm.go go /.*Package.*/ /RET.*/)
```go
Package("github.com/mmcloughlin/avo/examples/ext")
Implement("StructFieldB")
b := Load(Param("e").Field("B"), GP8())
Store(b, ReturnIndex(0))
RET()
```
Finally, in this case the `go:generate` line is different since we do not need to generate the stub file.
[embedmd]:# (ext_test.go go /.*go:generate.*/)
```go
//go:generate go run asm.go -out ext.s
```
golang-github-mmcloughlin-avo-0.5.0/examples/ext/asm.go 0000664 0000000 0000000 00000000424 14370657153 0023102 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
Package("github.com/mmcloughlin/avo/examples/ext")
Implement("StructFieldB")
b := Load(Param("e").Field("B"), GP8())
Store(b, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/ext/ext.s 0000664 0000000 0000000 00000000273 14370657153 0022761 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out ext.s. DO NOT EDIT.
// func StructFieldB(e ext.Struct) byte
TEXT ·StructFieldB(SB), $0-25
MOVB e_B+6(FP), AL
MOVB AL, ret+24(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/ext/ext/ 0000775 0000000 0000000 00000000000 14370657153 0022573 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/ext/ext/ext.go 0000664 0000000 0000000 00000000311 14370657153 0023715 0 ustar 00root root 0000000 0000000 // Package ext is used as a target package in the external types example.
package ext
// Struct is the target type in the external types example.
type Struct struct {
A [3]uint16
B byte
C string
}
golang-github-mmcloughlin-avo-0.5.0/examples/ext/ext_test.go 0000664 0000000 0000000 00000000466 14370657153 0024167 0 ustar 00root root 0000000 0000000 package ext
import (
"testing"
"testing/quick"
"github.com/mmcloughlin/avo/examples/ext/ext"
)
//go:generate go run asm.go -out ext.s
func TestFunc(t *testing.T) {
expect := func(e ext.Struct) byte { return e.B }
if err := quick.CheckEqual(StructFieldB, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/ext/stub.go 0000664 0000000 0000000 00000000312 14370657153 0023273 0 ustar 00root root 0000000 0000000 // Package ext demonstrates how to interact with external types.
package ext
import "github.com/mmcloughlin/avo/examples/ext/ext"
// StructFieldB returns field B.
func StructFieldB(e ext.Struct) byte
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/ 0000775 0000000 0000000 00000000000 14370657153 0022206 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/README.md 0000664 0000000 0000000 00000001326 14370657153 0023467 0 ustar 00root root 0000000 0000000 # fnv1a
[FNV-1a](https://en.wikipedia.org/wiki/Fowler%E2%80%93Noll%E2%80%93Vo_hash_function#FNV-1a_hash) in `avo`.
[embedmd]:# (asm.go /const/ $)
```go
const (
OffsetBasis = 0xcbf29ce484222325
Prime = 0x100000001b3
)
func main() {
TEXT("Hash64", NOSPLIT, "func(data []byte) uint64")
Doc("Hash64 computes the FNV-1a hash of data.")
ptr := Load(Param("data").Base(), GP64())
n := Load(Param("data").Len(), GP64())
h := RAX
MOVQ(Imm(OffsetBasis), h)
p := GP64()
MOVQ(Imm(Prime), p)
Label("loop")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
b := GP64()
MOVBQZX(Mem{Base: ptr}, b)
XORQ(b, h)
MULQ(p)
INCQ(ptr)
DECQ(n)
JMP(LabelRef("loop"))
Label("done")
Store(h, ReturnIndex(0))
RET()
Generate()
}
```
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/asm.go 0000664 0000000 0000000 00000001350 14370657153 0023314 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
const (
OffsetBasis = 0xcbf29ce484222325
Prime = 0x100000001b3
)
func main() {
TEXT("Hash64", NOSPLIT, "func(data []byte) uint64")
Doc("Hash64 computes the FNV-1a hash of data.")
ptr := Load(Param("data").Base(), GP64())
n := Load(Param("data").Len(), GP64())
h := RAX
MOVQ(Imm(OffsetBasis), h)
p := GP64()
MOVQ(Imm(Prime), p)
Label("loop")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
b := GP64()
MOVBQZX(Mem{Base: ptr}, b)
XORQ(b, h)
MULQ(p)
INCQ(ptr)
DECQ(n)
JMP(LabelRef("loop"))
Label("done")
Store(h, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/doc.go 0000664 0000000 0000000 00000000071 14370657153 0023300 0 ustar 00root root 0000000 0000000 // Package fnv1a implements FNV-1a in avo.
package fnv1a
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/fnv1a.s 0000664 0000000 0000000 00000000677 14370657153 0023417 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out fnv1a.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Hash64(data []byte) uint64
TEXT ·Hash64(SB), NOSPLIT, $0-32
MOVQ data_base+0(FP), CX
MOVQ data_len+8(FP), BX
MOVQ $0xcbf29ce484222325, AX
MOVQ $0x00000100000001b3, SI
loop:
CMPQ BX, $0x00
JE done
MOVBQZX (CX), DX
XORQ DX, AX
MULQ SI
INCQ CX
DECQ BX
JMP loop
done:
MOVQ AX, ret+24(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/fnv_test.go 0000664 0000000 0000000 00000000576 14370657153 0024375 0 ustar 00root root 0000000 0000000 package fnv1a
import (
"hash/fnv"
"testing"
"testing/quick"
)
//go:generate go run asm.go -out fnv1a.s -stubs stub.go
func TestHash64(t *testing.T) {
expect := func(data []byte) uint64 {
h := fnv.New64a()
if _, err := h.Write(data); err != nil {
t.Fatal(err)
}
return h.Sum64()
}
if err := quick.CheckEqual(Hash64, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/fnv1a/stub.go 0000664 0000000 0000000 00000000262 14370657153 0023512 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out fnv1a.s -stubs stub.go. DO NOT EDIT.
package fnv1a
// Hash64 computes the FNV-1a hash of data.
func Hash64(data []byte) uint64
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/ 0000775 0000000 0000000 00000000000 14370657153 0022611 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/geohash/README.md 0000664 0000000 0000000 00000001745 14370657153 0024077 0 ustar 00root root 0000000 0000000 # geohash
Integer [geohash](https://en.wikipedia.org/wiki/Geohash) encoding.
Refer to ["Geohash in Golang Assembly"](https://mmcloughlin.com/posts/geohash-assembly) for implementation details.
[embedmd]:# (asm.go /func main/ $)
```go
func main() {
TEXT("EncodeInt", NOSPLIT, "func(lat, lng float64) uint64")
Doc("EncodeInt computes the 64-bit integer geohash of (lat, lng).")
lat := Load(Param("lat"), XMM())
lng := Load(Param("lng"), XMM())
MULSD(ConstData("reciprocal180", F64(1/180.0)), lat)
onepointfive := ConstData("onepointfive", F64(1.5))
ADDSD(onepointfive, lat)
MULSD(ConstData("reciprocal360", F64(1/360.0)), lng)
ADDSD(onepointfive, lng)
lngi, lati := GP64(), GP64()
MOVQ(lat, lati)
SHRQ(U8(20), lati)
MOVQ(lng, lngi)
SHRQ(U8(20), lngi)
mask := ConstData("mask", U64(0x5555555555555555))
ghsh := GP64()
PDEPQ(mask, lati, ghsh)
temp := GP64()
PDEPQ(mask, lngi, temp)
SHLQ(U8(1), temp)
XORQ(temp, ghsh)
Store(ghsh, ReturnIndex(0))
RET()
Generate()
}
```
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/asm.go 0000664 0000000 0000000 00000001600 14370657153 0023715 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("EncodeInt", NOSPLIT, "func(lat, lng float64) uint64")
Doc("EncodeInt computes the 64-bit integer geohash of (lat, lng).")
lat := Load(Param("lat"), XMM())
lng := Load(Param("lng"), XMM())
MULSD(ConstData("reciprocal180", F64(1/180.0)), lat)
onepointfive := ConstData("onepointfive", F64(1.5))
ADDSD(onepointfive, lat)
MULSD(ConstData("reciprocal360", F64(1/360.0)), lng)
ADDSD(onepointfive, lng)
lngi, lati := GP64(), GP64()
MOVQ(lat, lati)
SHRQ(U8(20), lati)
MOVQ(lng, lngi)
SHRQ(U8(20), lngi)
mask := ConstData("mask", U64(0x5555555555555555))
ghsh := GP64()
PDEPQ(mask, lati, ghsh)
temp := GP64()
PDEPQ(mask, lngi, temp)
SHLQ(U8(1), temp)
XORQ(temp, ghsh)
Store(ghsh, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/doc.go 0000664 0000000 0000000 00000000117 14370657153 0023704 0 ustar 00root root 0000000 0000000 // Package geohash implements integer geohash encoding in avo.
package geohash
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/geohash.s 0000664 0000000 0000000 00000001637 14370657153 0024422 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out geohash.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func EncodeInt(lat float64, lng float64) uint64
// Requires: BMI2, SSE2
TEXT ·EncodeInt(SB), NOSPLIT, $0-24
MOVSD lat+0(FP), X0
MOVSD lng+8(FP), X1
MULSD reciprocal180<>+0(SB), X0
ADDSD onepointfive<>+0(SB), X0
MULSD reciprocal360<>+0(SB), X1
ADDSD onepointfive<>+0(SB), X1
MOVQ X0, CX
SHRQ $0x14, CX
MOVQ X1, AX
SHRQ $0x14, AX
PDEPQ mask<>+0(SB), CX, CX
PDEPQ mask<>+0(SB), AX, AX
SHLQ $0x01, AX
XORQ AX, CX
MOVQ CX, ret+16(FP)
RET
DATA reciprocal180<>+0(SB)/8, $(0.005555555555555556)
GLOBL reciprocal180<>(SB), RODATA|NOPTR, $8
DATA onepointfive<>+0(SB)/8, $(1.5)
GLOBL onepointfive<>(SB), RODATA|NOPTR, $8
DATA reciprocal360<>+0(SB)/8, $(0.002777777777777778)
GLOBL reciprocal360<>(SB), RODATA|NOPTR, $8
DATA mask<>+0(SB)/8, $0x5555555555555555
GLOBL mask<>(SB), RODATA|NOPTR, $8
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/geohash_test.go 0000664 0000000 0000000 00000000532 14370657153 0025615 0 ustar 00root root 0000000 0000000 package geohash
import (
"testing"
"golang.org/x/sys/cpu"
)
//go:generate go run asm.go -out geohash.s -stubs stub.go
func TestEncodeIntMountEverest(t *testing.T) {
if !(cpu.X86.HasSSE2 && cpu.X86.HasBMI2) {
t.Skip("requires SSE2 and BMI2 instruction sets")
}
if EncodeInt(27.988056, 86.925278) != 0xceb7f254240fd612 {
t.Fail()
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/geohash/stub.go 0000664 0000000 0000000 00000000332 14370657153 0024113 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out geohash.s -stubs stub.go. DO NOT EDIT.
package geohash
// EncodeInt computes the 64-bit integer geohash of (lat, lng).
func EncodeInt(lat float64, lng float64) uint64
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/ 0000775 0000000 0000000 00000000000 14370657153 0022217 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/README.md 0000664 0000000 0000000 00000006673 14370657153 0023512 0 ustar 00root root 0000000 0000000 # md5x16
AVX-512 accelerated 16-lane [MD5](https://en.wikipedia.org/wiki/MD5) in `avo`.
Inspired by [`minio/md5-simd`](https://github.com/minio/md5-simd) and
[`igneous-systems/md5vec`](https://github.com/igneous-systems/md5vec).
Note that the focus of this example is the core assembly `block` function. The
`Sum` function can only handle parallel hashes of exactly the same length. In
practice you'd likely need hash server functionality provided by
[`md5-simd`](https://github.com/minio/md5-simd) to multiplex independent hashes
of different lengths into the 16 SIMD lanes.
[embedmd]:# (asm.go /func main/ /^}/)
```go
func main() {
// Define round constants data section.
//
// These may be computed as the integer part of abs(sin(i+1))*2^32.
T := GLOBL("consts", RODATA|NOPTR)
for i := 0; i < 64; i++ {
k := uint32(math.Floor(math.Ldexp(math.Abs(math.Sin(float64(i+1))), 32)))
DATA(4*i, U32(k))
}
// MD5 16-lane block function.
TEXT("block", 0, "func(h *[4][16]uint32, base uintptr, offsets *[16]uint32, mask uint16)")
Doc(
"block MD5 hashes 16 messages into the running hash states h. Messages are",
"at the given offsets from the base pointer. The 16-bit mask specifies",
"which lanes are active: when bit i is not set loads will be disabled and",
"the value of the resulting hash is undefined.",
)
h := Mem{Base: Load(Param("h"), GP64())}
base := Mem{Base: Load(Param("base"), GP64())}
offsetsptr := Mem{Base: Load(Param("offsets"), GP64())}
mask := Load(Param("mask"), K())
Comment("Load offsets.")
offsets := ZMM()
VMOVUPD(offsetsptr, offsets)
Comment("Load initial hash.")
hash := [4]Register{ZMM(), ZMM(), ZMM(), ZMM()}
for i, r := range hash {
VMOVUPD(h.Offset(64*i), r)
}
Comment("Initialize registers.")
a, b, c, d := ZMM(), ZMM(), ZMM(), ZMM()
for i, r := range []Register{a, b, c, d} {
VMOVUPD(hash[i], r)
}
// Allocate message registers.
m := make([]Register, 16)
for i := range m {
m[i] = ZMM()
}
// Generate round updates.
//
// Each 16-round block is parameterized based on the btiwise function,
// message indexes and shift amounts. Constants B, C, D are helpers in
// computing the logic table required by VPTERNLOGD.
const (
B = uint8(0b10101010)
C = uint8(0b11001100)
D = uint8(0b11110000)
)
quarter := []struct {
F uint8 // ternary logic table
i func(int) int // message index at round r
s []int // shift amounts
}{
{
F: (B & C) | (^B & D),
i: func(r int) int { return r % 16 },
s: []int{7, 12, 17, 22},
},
{
F: (D & B) | (^D & C),
i: func(r int) int { return (5*r + 1) % 16 },
s: []int{5, 9, 14, 20},
},
{
F: B ^ C ^ D,
i: func(r int) int { return (3*r + 5) % 16 },
s: []int{4, 11, 16, 23},
},
{
F: C ^ (B | ^D),
i: func(r int) int { return (7 * r) % 16 },
s: []int{6, 10, 15, 21},
},
}
for r := 0; r < 64; r++ {
Commentf("Round %d.", r)
q := quarter[r/16]
// Load message words.
if r < 16 {
k := K()
KMOVW(mask, k)
VPGATHERDD(base.Offset(4*r).Idx(offsets, 1), k, m[r])
}
VPADDD(m[q.i(r)], a, a)
VPADDD_BCST(T.Offset(4*r), a, a)
f := ZMM()
VMOVUPD(d, f)
VPTERNLOGD(U8(q.F), b, c, f)
VPADDD(f, a, a)
VPROLD(U8(q.s[r%4]), a, a)
VPADDD(b, a, a)
a, b, c, d = d, a, b, c
}
Comment("Final add.")
for i, r := range []Register{a, b, c, d} {
VPADDD(r, hash[i], hash[i])
}
Comment("Store results back.")
for i, r := range hash {
VMOVUPD(r, h.Offset(64*i))
}
VZEROUPPER()
RET()
Generate()
}
```
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/asm.go 0000664 0000000 0000000 00000006000 14370657153 0023322 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"math"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
// Define round constants data section.
//
// These may be computed as the integer part of abs(sin(i+1))*2^32.
T := GLOBL("consts", RODATA|NOPTR)
for i := 0; i < 64; i++ {
k := uint32(math.Floor(math.Ldexp(math.Abs(math.Sin(float64(i+1))), 32)))
DATA(4*i, U32(k))
}
// MD5 16-lane block function.
TEXT("block", 0, "func(h *[4][16]uint32, base uintptr, offsets *[16]uint32, mask uint16)")
Doc(
"block MD5 hashes 16 messages into the running hash states h. Messages are",
"at the given offsets from the base pointer. The 16-bit mask specifies",
"which lanes are active: when bit i is not set loads will be disabled and",
"the value of the resulting hash is undefined.",
)
h := Mem{Base: Load(Param("h"), GP64())}
base := Mem{Base: Load(Param("base"), GP64())}
offsetsptr := Mem{Base: Load(Param("offsets"), GP64())}
mask := Load(Param("mask"), K())
Comment("Load offsets.")
offsets := ZMM()
VMOVUPD(offsetsptr, offsets)
Comment("Load initial hash.")
hash := [4]Register{ZMM(), ZMM(), ZMM(), ZMM()}
for i, r := range hash {
VMOVUPD(h.Offset(64*i), r)
}
Comment("Initialize registers.")
a, b, c, d := ZMM(), ZMM(), ZMM(), ZMM()
for i, r := range []Register{a, b, c, d} {
VMOVUPD(hash[i], r)
}
// Allocate message registers.
m := make([]Register, 16)
for i := range m {
m[i] = ZMM()
}
// Generate round updates.
//
// Each 16-round block is parameterized based on the btiwise function,
// message indexes and shift amounts. Constants B, C, D are helpers in
// computing the logic table required by VPTERNLOGD.
const (
B = uint8(0b10101010)
C = uint8(0b11001100)
D = uint8(0b11110000)
)
quarter := []struct {
F uint8 // ternary logic table
i func(int) int // message index at round r
s []int // shift amounts
}{
{
F: (B & C) | (^B & D),
i: func(r int) int { return r % 16 },
s: []int{7, 12, 17, 22},
},
{
F: (D & B) | (^D & C),
i: func(r int) int { return (5*r + 1) % 16 },
s: []int{5, 9, 14, 20},
},
{
F: B ^ C ^ D,
i: func(r int) int { return (3*r + 5) % 16 },
s: []int{4, 11, 16, 23},
},
{
F: C ^ (B | ^D),
i: func(r int) int { return (7 * r) % 16 },
s: []int{6, 10, 15, 21},
},
}
for r := 0; r < 64; r++ {
Commentf("Round %d.", r)
q := quarter[r/16]
// Load message words.
if r < 16 {
k := K()
KMOVW(mask, k)
VPGATHERDD(base.Offset(4*r).Idx(offsets, 1), k, m[r])
}
VPADDD(m[q.i(r)], a, a)
VPADDD_BCST(T.Offset(4*r), a, a)
f := ZMM()
VMOVUPD(d, f)
VPTERNLOGD(U8(q.F), b, c, f)
VPADDD(f, a, a)
VPROLD(U8(q.s[r%4]), a, a)
VPADDD(b, a, a)
a, b, c, d = d, a, b, c
}
Comment("Final add.")
for i, r := range []Register{a, b, c, d} {
VPADDD(r, hash[i], hash[i])
}
Comment("Store results back.")
for i, r := range hash {
VMOVUPD(r, h.Offset(64*i))
}
VZEROUPPER()
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/md5x16.go 0000664 0000000 0000000 00000007045 14370657153 0023600 0 ustar 00root root 0000000 0000000 // Package md5x16 implements 16-lane parallel MD5 with AVX-512 instructions.
package md5x16
import (
"encoding/binary"
"errors"
"math"
"reflect"
"unsafe"
)
//go:generate go run asm.go -out md5x16.s -stubs stub.go
// Size of a MD5 checksum in bytes.
const Size = 16
// BlockSize is the block size of MD5 in bytes.
const BlockSize = 64
// Lanes is the maximum number of parallel MD5 computations.
const Lanes = 16
// Validate checks whether the preconditions required by Sum() are met.
func Validate(data [Lanes][]byte) error {
_, err := config(data)
return err
}
// Sum returns the MD5 checksum of up to Lanes data of the same length.
//
// Non-nil inputs must all have the same length, and occupy a memory span not
// exceeding 32 bits.
func Sum(data [Lanes][]byte) [Lanes][Size]byte {
// Determine lane configuration.
cfg, err := config(data)
if err != nil {
panic(err)
}
// Initialize hash.
var h [4][Lanes]uint32
for _, l := range cfg.active {
h[0][l] = 0x67452301
h[1][l] = 0xefcdab89
h[2][l] = 0x98badcfe
h[3][l] = 0x10325476
}
// Consume full blocks.
base, n := cfg.base, cfg.n
for ; n >= BlockSize; n -= BlockSize {
block(&h, base, &cfg.offsets, cfg.mask)
base += BlockSize
}
// Final block.
var last [Lanes][]byte
var buffer [Lanes * BlockSize]byte
base = dataptr(buffer[:])
var offsets [Lanes]uint32
for _, l := range cfg.active {
last[l] = buffer[l*BlockSize : (l+1)*BlockSize]
offsets[l] = uint32(l * BlockSize)
copy(last[l], data[l][cfg.n-n:])
last[l][n] = 0x80
}
if n >= 56 {
block(&h, base, &offsets, cfg.mask)
for i := range buffer {
buffer[i] = 0
}
}
for _, l := range cfg.active {
binary.LittleEndian.PutUint64(last[l][56:], uint64(8*cfg.n))
}
block(&h, base, &offsets, cfg.mask)
// Write into byte array.
var digest [Lanes][Size]byte
for _, l := range cfg.active {
for i := 0; i < 4; i++ {
binary.LittleEndian.PutUint32(digest[l][4*i:], h[i][l])
}
}
return digest
}
// lanes represents the configuration of the 16 data lanes of an MD5
// computation.
type lanes struct {
n int // length of all active (non-nil) lanes
active []int // indexes of active lanes
mask uint16 // mask of active lanes
base uintptr // base pointer
offsets [Lanes]uint32 // offset of data lanes relative to base
}
// config determines the lane configuration for the provided data. Returns an
// error if there are no active lanes, there's a length mismatch among active
// lanes, or the data spans a memory region larger than 32-bits.
func config(data [Lanes][]byte) (*lanes, error) {
cfg := &lanes{}
// Populate active lanes, and ensure they're all the same length.
for l, d := range data {
if d != nil {
cfg.active = append(cfg.active, l)
}
}
if len(cfg.active) == 0 {
return nil, errors.New("no active lanes")
}
cfg.n = len(data[cfg.active[0]])
for _, l := range cfg.active {
cfg.mask |= 1 << l
if len(data[l]) != cfg.n {
return nil, errors.New("length mismatch")
}
}
// Compute base pointer and lane offsets.
cfg.base = ^uintptr(0)
for _, l := range cfg.active {
ptr := dataptr(data[l])
if ptr < cfg.base {
cfg.base = ptr
}
}
for _, l := range cfg.active {
ptr := dataptr(data[l])
offset := ptr - cfg.base
if offset > math.MaxUint32 {
return nil, errors.New("input data exceed 32-bit memory region")
}
cfg.offsets[l] = uint32(offset)
}
return cfg, nil
}
// dataptr extracts the data pointer from the given slice.
func dataptr(data []byte) uintptr {
hdr := (*reflect.SliceHeader)(unsafe.Pointer(&data))
return hdr.Data
}
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/md5x16.s 0000664 0000000 0000000 00000041303 14370657153 0023430 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out md5x16.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
DATA consts<>+0(SB)/4, $0xd76aa478
DATA consts<>+4(SB)/4, $0xe8c7b756
DATA consts<>+8(SB)/4, $0x242070db
DATA consts<>+12(SB)/4, $0xc1bdceee
DATA consts<>+16(SB)/4, $0xf57c0faf
DATA consts<>+20(SB)/4, $0x4787c62a
DATA consts<>+24(SB)/4, $0xa8304613
DATA consts<>+28(SB)/4, $0xfd469501
DATA consts<>+32(SB)/4, $0x698098d8
DATA consts<>+36(SB)/4, $0x8b44f7af
DATA consts<>+40(SB)/4, $0xffff5bb1
DATA consts<>+44(SB)/4, $0x895cd7be
DATA consts<>+48(SB)/4, $0x6b901122
DATA consts<>+52(SB)/4, $0xfd987193
DATA consts<>+56(SB)/4, $0xa679438e
DATA consts<>+60(SB)/4, $0x49b40821
DATA consts<>+64(SB)/4, $0xf61e2562
DATA consts<>+68(SB)/4, $0xc040b340
DATA consts<>+72(SB)/4, $0x265e5a51
DATA consts<>+76(SB)/4, $0xe9b6c7aa
DATA consts<>+80(SB)/4, $0xd62f105d
DATA consts<>+84(SB)/4, $0x02441453
DATA consts<>+88(SB)/4, $0xd8a1e681
DATA consts<>+92(SB)/4, $0xe7d3fbc8
DATA consts<>+96(SB)/4, $0x21e1cde6
DATA consts<>+100(SB)/4, $0xc33707d6
DATA consts<>+104(SB)/4, $0xf4d50d87
DATA consts<>+108(SB)/4, $0x455a14ed
DATA consts<>+112(SB)/4, $0xa9e3e905
DATA consts<>+116(SB)/4, $0xfcefa3f8
DATA consts<>+120(SB)/4, $0x676f02d9
DATA consts<>+124(SB)/4, $0x8d2a4c8a
DATA consts<>+128(SB)/4, $0xfffa3942
DATA consts<>+132(SB)/4, $0x8771f681
DATA consts<>+136(SB)/4, $0x6d9d6122
DATA consts<>+140(SB)/4, $0xfde5380c
DATA consts<>+144(SB)/4, $0xa4beea44
DATA consts<>+148(SB)/4, $0x4bdecfa9
DATA consts<>+152(SB)/4, $0xf6bb4b60
DATA consts<>+156(SB)/4, $0xbebfbc70
DATA consts<>+160(SB)/4, $0x289b7ec6
DATA consts<>+164(SB)/4, $0xeaa127fa
DATA consts<>+168(SB)/4, $0xd4ef3085
DATA consts<>+172(SB)/4, $0x04881d05
DATA consts<>+176(SB)/4, $0xd9d4d039
DATA consts<>+180(SB)/4, $0xe6db99e5
DATA consts<>+184(SB)/4, $0x1fa27cf8
DATA consts<>+188(SB)/4, $0xc4ac5665
DATA consts<>+192(SB)/4, $0xf4292244
DATA consts<>+196(SB)/4, $0x432aff97
DATA consts<>+200(SB)/4, $0xab9423a7
DATA consts<>+204(SB)/4, $0xfc93a039
DATA consts<>+208(SB)/4, $0x655b59c3
DATA consts<>+212(SB)/4, $0x8f0ccc92
DATA consts<>+216(SB)/4, $0xffeff47d
DATA consts<>+220(SB)/4, $0x85845dd1
DATA consts<>+224(SB)/4, $0x6fa87e4f
DATA consts<>+228(SB)/4, $0xfe2ce6e0
DATA consts<>+232(SB)/4, $0xa3014314
DATA consts<>+236(SB)/4, $0x4e0811a1
DATA consts<>+240(SB)/4, $0xf7537e82
DATA consts<>+244(SB)/4, $0xbd3af235
DATA consts<>+248(SB)/4, $0x2ad7d2bb
DATA consts<>+252(SB)/4, $0xeb86d391
GLOBL consts<>(SB), RODATA|NOPTR, $256
// func block(h *[4][16]uint32, base uintptr, offsets *[16]uint32, mask uint16)
// Requires: AVX, AVX512F
TEXT ·block(SB), $0-26
MOVQ h+0(FP), AX
MOVQ base+8(FP), CX
MOVQ offsets+16(FP), DX
KMOVW mask+24(FP), K1
// Load offsets.
VMOVUPD (DX), Z0
// Load initial hash.
VMOVUPD (AX), Z1
VMOVUPD 64(AX), Z2
VMOVUPD 128(AX), Z3
VMOVUPD 192(AX), Z4
// Initialize registers.
VMOVUPD Z1, Z5
VMOVUPD Z2, Z6
VMOVUPD Z3, Z7
VMOVUPD Z4, Z8
// Round 0.
KMOVW K1, K2
VPGATHERDD (CX)(Z0*1), K2, Z9
VPADDD Z9, Z5, Z5
VPADDD.BCST consts<>+0(SB), Z5, Z5
VMOVUPD Z8, Z25
VPTERNLOGD $0xd8, Z6, Z7, Z25
VPADDD Z25, Z5, Z5
VPROLD $0x07, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 1.
KMOVW K1, K2
VPGATHERDD 4(CX)(Z0*1), K2, Z10
VPADDD Z10, Z8, Z8
VPADDD.BCST consts<>+4(SB), Z8, Z8
VMOVUPD Z7, Z25
VPTERNLOGD $0xd8, Z5, Z6, Z25
VPADDD Z25, Z8, Z8
VPROLD $0x0c, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 2.
KMOVW K1, K2
VPGATHERDD 8(CX)(Z0*1), K2, Z11
VPADDD Z11, Z7, Z7
VPADDD.BCST consts<>+8(SB), Z7, Z7
VMOVUPD Z6, Z25
VPTERNLOGD $0xd8, Z8, Z5, Z25
VPADDD Z25, Z7, Z7
VPROLD $0x11, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 3.
KMOVW K1, K2
VPGATHERDD 12(CX)(Z0*1), K2, Z12
VPADDD Z12, Z6, Z6
VPADDD.BCST consts<>+12(SB), Z6, Z6
VMOVUPD Z5, Z25
VPTERNLOGD $0xd8, Z7, Z8, Z25
VPADDD Z25, Z6, Z6
VPROLD $0x16, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 4.
KMOVW K1, K2
VPGATHERDD 16(CX)(Z0*1), K2, Z13
VPADDD Z13, Z5, Z5
VPADDD.BCST consts<>+16(SB), Z5, Z5
VMOVUPD Z8, Z25
VPTERNLOGD $0xd8, Z6, Z7, Z25
VPADDD Z25, Z5, Z5
VPROLD $0x07, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 5.
KMOVW K1, K2
VPGATHERDD 20(CX)(Z0*1), K2, Z14
VPADDD Z14, Z8, Z8
VPADDD.BCST consts<>+20(SB), Z8, Z8
VMOVUPD Z7, Z25
VPTERNLOGD $0xd8, Z5, Z6, Z25
VPADDD Z25, Z8, Z8
VPROLD $0x0c, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 6.
KMOVW K1, K2
VPGATHERDD 24(CX)(Z0*1), K2, Z15
VPADDD Z15, Z7, Z7
VPADDD.BCST consts<>+24(SB), Z7, Z7
VMOVUPD Z6, Z25
VPTERNLOGD $0xd8, Z8, Z5, Z25
VPADDD Z25, Z7, Z7
VPROLD $0x11, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 7.
KMOVW K1, K2
VPGATHERDD 28(CX)(Z0*1), K2, Z16
VPADDD Z16, Z6, Z6
VPADDD.BCST consts<>+28(SB), Z6, Z6
VMOVUPD Z5, Z25
VPTERNLOGD $0xd8, Z7, Z8, Z25
VPADDD Z25, Z6, Z6
VPROLD $0x16, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 8.
KMOVW K1, K2
VPGATHERDD 32(CX)(Z0*1), K2, Z17
VPADDD Z17, Z5, Z5
VPADDD.BCST consts<>+32(SB), Z5, Z5
VMOVUPD Z8, Z25
VPTERNLOGD $0xd8, Z6, Z7, Z25
VPADDD Z25, Z5, Z5
VPROLD $0x07, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 9.
KMOVW K1, K2
VPGATHERDD 36(CX)(Z0*1), K2, Z18
VPADDD Z18, Z8, Z8
VPADDD.BCST consts<>+36(SB), Z8, Z8
VMOVUPD Z7, Z25
VPTERNLOGD $0xd8, Z5, Z6, Z25
VPADDD Z25, Z8, Z8
VPROLD $0x0c, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 10.
KMOVW K1, K2
VPGATHERDD 40(CX)(Z0*1), K2, Z19
VPADDD Z19, Z7, Z7
VPADDD.BCST consts<>+40(SB), Z7, Z7
VMOVUPD Z6, Z25
VPTERNLOGD $0xd8, Z8, Z5, Z25
VPADDD Z25, Z7, Z7
VPROLD $0x11, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 11.
KMOVW K1, K2
VPGATHERDD 44(CX)(Z0*1), K2, Z20
VPADDD Z20, Z6, Z6
VPADDD.BCST consts<>+44(SB), Z6, Z6
VMOVUPD Z5, Z25
VPTERNLOGD $0xd8, Z7, Z8, Z25
VPADDD Z25, Z6, Z6
VPROLD $0x16, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 12.
KMOVW K1, K2
VPGATHERDD 48(CX)(Z0*1), K2, Z21
VPADDD Z21, Z5, Z5
VPADDD.BCST consts<>+48(SB), Z5, Z5
VMOVUPD Z8, Z25
VPTERNLOGD $0xd8, Z6, Z7, Z25
VPADDD Z25, Z5, Z5
VPROLD $0x07, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 13.
KMOVW K1, K2
VPGATHERDD 52(CX)(Z0*1), K2, Z22
VPADDD Z22, Z8, Z8
VPADDD.BCST consts<>+52(SB), Z8, Z8
VMOVUPD Z7, Z25
VPTERNLOGD $0xd8, Z5, Z6, Z25
VPADDD Z25, Z8, Z8
VPROLD $0x0c, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 14.
KMOVW K1, K2
VPGATHERDD 56(CX)(Z0*1), K2, Z23
VPADDD Z23, Z7, Z7
VPADDD.BCST consts<>+56(SB), Z7, Z7
VMOVUPD Z6, Z25
VPTERNLOGD $0xd8, Z8, Z5, Z25
VPADDD Z25, Z7, Z7
VPROLD $0x11, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 15.
KMOVW K1, K1
VPGATHERDD 60(CX)(Z0*1), K1, Z24
VPADDD Z24, Z6, Z6
VPADDD.BCST consts<>+60(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0xd8, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x16, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 16.
VPADDD Z10, Z5, Z5
VPADDD.BCST consts<>+64(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0xac, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x05, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 17.
VPADDD Z15, Z8, Z8
VPADDD.BCST consts<>+68(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0xac, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x09, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 18.
VPADDD Z20, Z7, Z7
VPADDD.BCST consts<>+72(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0xac, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0e, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 19.
VPADDD Z9, Z6, Z6
VPADDD.BCST consts<>+76(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0xac, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x14, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 20.
VPADDD Z14, Z5, Z5
VPADDD.BCST consts<>+80(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0xac, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x05, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 21.
VPADDD Z19, Z8, Z8
VPADDD.BCST consts<>+84(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0xac, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x09, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 22.
VPADDD Z24, Z7, Z7
VPADDD.BCST consts<>+88(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0xac, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0e, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 23.
VPADDD Z13, Z6, Z6
VPADDD.BCST consts<>+92(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0xac, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x14, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 24.
VPADDD Z18, Z5, Z5
VPADDD.BCST consts<>+96(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0xac, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x05, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 25.
VPADDD Z23, Z8, Z8
VPADDD.BCST consts<>+100(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0xac, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x09, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 26.
VPADDD Z12, Z7, Z7
VPADDD.BCST consts<>+104(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0xac, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0e, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 27.
VPADDD Z17, Z6, Z6
VPADDD.BCST consts<>+108(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0xac, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x14, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 28.
VPADDD Z22, Z5, Z5
VPADDD.BCST consts<>+112(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0xac, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x05, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 29.
VPADDD Z11, Z8, Z8
VPADDD.BCST consts<>+116(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0xac, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x09, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 30.
VPADDD Z16, Z7, Z7
VPADDD.BCST consts<>+120(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0xac, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0e, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 31.
VPADDD Z21, Z6, Z6
VPADDD.BCST consts<>+124(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0xac, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x14, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 32.
VPADDD Z14, Z5, Z5
VPADDD.BCST consts<>+128(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x96, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x04, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 33.
VPADDD Z17, Z8, Z8
VPADDD.BCST consts<>+132(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x96, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0b, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 34.
VPADDD Z20, Z7, Z7
VPADDD.BCST consts<>+136(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x96, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x10, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 35.
VPADDD Z23, Z6, Z6
VPADDD.BCST consts<>+140(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x96, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x17, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 36.
VPADDD Z10, Z5, Z5
VPADDD.BCST consts<>+144(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x96, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x04, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 37.
VPADDD Z13, Z8, Z8
VPADDD.BCST consts<>+148(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x96, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0b, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 38.
VPADDD Z16, Z7, Z7
VPADDD.BCST consts<>+152(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x96, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x10, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 39.
VPADDD Z19, Z6, Z6
VPADDD.BCST consts<>+156(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x96, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x17, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 40.
VPADDD Z22, Z5, Z5
VPADDD.BCST consts<>+160(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x96, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x04, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 41.
VPADDD Z9, Z8, Z8
VPADDD.BCST consts<>+164(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x96, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0b, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 42.
VPADDD Z12, Z7, Z7
VPADDD.BCST consts<>+168(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x96, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x10, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 43.
VPADDD Z15, Z6, Z6
VPADDD.BCST consts<>+172(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x96, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x17, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 44.
VPADDD Z18, Z5, Z5
VPADDD.BCST consts<>+176(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x96, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x04, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 45.
VPADDD Z21, Z8, Z8
VPADDD.BCST consts<>+180(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x96, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0b, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 46.
VPADDD Z24, Z7, Z7
VPADDD.BCST consts<>+184(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x96, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x10, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 47.
VPADDD Z11, Z6, Z6
VPADDD.BCST consts<>+188(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x96, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x17, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 48.
VPADDD Z9, Z5, Z5
VPADDD.BCST consts<>+192(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x63, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x06, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 49.
VPADDD Z16, Z8, Z8
VPADDD.BCST consts<>+196(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x63, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0a, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 50.
VPADDD Z23, Z7, Z7
VPADDD.BCST consts<>+200(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x63, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0f, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 51.
VPADDD Z14, Z6, Z6
VPADDD.BCST consts<>+204(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x63, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x15, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 52.
VPADDD Z21, Z5, Z5
VPADDD.BCST consts<>+208(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x63, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x06, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 53.
VPADDD Z12, Z8, Z8
VPADDD.BCST consts<>+212(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x63, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0a, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 54.
VPADDD Z19, Z7, Z7
VPADDD.BCST consts<>+216(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x63, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0f, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 55.
VPADDD Z10, Z6, Z6
VPADDD.BCST consts<>+220(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x63, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x15, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 56.
VPADDD Z17, Z5, Z5
VPADDD.BCST consts<>+224(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x63, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x06, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 57.
VPADDD Z24, Z8, Z8
VPADDD.BCST consts<>+228(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x63, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0a, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 58.
VPADDD Z15, Z7, Z7
VPADDD.BCST consts<>+232(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x63, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0f, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 59.
VPADDD Z22, Z6, Z6
VPADDD.BCST consts<>+236(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x63, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x15, Z6, Z6
VPADDD Z7, Z6, Z6
// Round 60.
VPADDD Z13, Z5, Z5
VPADDD.BCST consts<>+240(SB), Z5, Z5
VMOVUPD Z8, Z0
VPTERNLOGD $0x63, Z6, Z7, Z0
VPADDD Z0, Z5, Z5
VPROLD $0x06, Z5, Z5
VPADDD Z6, Z5, Z5
// Round 61.
VPADDD Z20, Z8, Z8
VPADDD.BCST consts<>+244(SB), Z8, Z8
VMOVUPD Z7, Z0
VPTERNLOGD $0x63, Z5, Z6, Z0
VPADDD Z0, Z8, Z8
VPROLD $0x0a, Z8, Z8
VPADDD Z5, Z8, Z8
// Round 62.
VPADDD Z11, Z7, Z7
VPADDD.BCST consts<>+248(SB), Z7, Z7
VMOVUPD Z6, Z0
VPTERNLOGD $0x63, Z8, Z5, Z0
VPADDD Z0, Z7, Z7
VPROLD $0x0f, Z7, Z7
VPADDD Z8, Z7, Z7
// Round 63.
VPADDD Z18, Z6, Z6
VPADDD.BCST consts<>+252(SB), Z6, Z6
VMOVUPD Z5, Z0
VPTERNLOGD $0x63, Z7, Z8, Z0
VPADDD Z0, Z6, Z6
VPROLD $0x15, Z6, Z6
VPADDD Z7, Z6, Z6
// Final add.
VPADDD Z5, Z1, Z1
VPADDD Z6, Z2, Z2
VPADDD Z7, Z3, Z3
VPADDD Z8, Z4, Z4
// Store results back.
VMOVUPD Z1, (AX)
VMOVUPD Z2, 64(AX)
VMOVUPD Z3, 128(AX)
VMOVUPD Z4, 192(AX)
VZEROUPPER
RET
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/md5x16_test.go 0000664 0000000 0000000 00000005377 14370657153 0024645 0 ustar 00root root 0000000 0000000 package md5x16
import (
"crypto/md5"
"encoding/hex"
"math/rand"
"testing"
"testing/quick"
"golang.org/x/sys/cpu"
)
func RequireISA(t *testing.T) {
t.Helper()
if !cpu.X86.HasAVX512F {
t.Skip("requires AVX512F instruction set")
}
}
func TestVectors(t *testing.T) {
RequireISA(t)
cases := []struct {
Data string
HexDigest string
}{
{"", "d41d8cd98f00b204e9800998ecf8427e"},
{"The quick brown fox jumps over the lazy dog", "9e107d9d372bb6826bd81d3542a419d6"},
{"The quick brown fox jumps over the lazy dog.", "e4d909c290d0fb1ca068ffaddf22cbd0"},
}
for _, c := range cases {
digest := Single(t, []byte(c.Data))
got := hex.EncodeToString(digest[:])
if got != c.HexDigest {
t.Errorf("Sum(%#v) = %s; expect %s", c.Data, got, c.HexDigest)
}
}
}
func TestCmp(t *testing.T) {
RequireISA(t)
sum := func(data []byte) [Size]byte { return Single(t, data) }
if err := quick.CheckEqual(sum, md5.Sum, nil); err != nil {
t.Fatal(err)
}
}
func TestLengths(t *testing.T) {
RequireISA(t)
const max = BlockSize << 6
data := make([]byte, max)
rand.Read(data)
for n := 0; n <= max; n++ {
got := Single(t, data[:n])
expect := md5.Sum(data[:n])
if got != expect {
t.Fatalf("failed on length %d", n)
}
}
}
// Single hashes a single data buffer in all 16 lanes and returns the result,
// after asserting that all lanes are the same.
func Single(t *testing.T, d []byte) [Size]byte {
// Place the same data in every lane.
var data [Lanes][]byte
for l := range data {
data[l] = d
}
if err := Validate(data); err != nil {
t.Fatal(err)
}
// Hash and check the lanes are the same.
digest := Sum(data)
for l := range data {
if digest[0] != digest[l] {
t.Logf("lane %02d: %x", 0, digest[0])
t.Logf("lane %02d: %x", l, digest[l])
t.Fatal("lane mismatch")
}
}
return digest[0]
}
func TestActiveLanes(t *testing.T) {
RequireISA(t)
const trials = 1 << 10
const maxlen = BlockSize << 6
for trial := 0; trial < trials; trial++ {
// Pick active lanes.
lanes := 1 + rand.Intn(Lanes-1)
active := rand.Perm(Lanes)[:lanes]
// Fill active lanes with random data.
n := rand.Intn(maxlen)
buffer := make([]byte, lanes*n)
rand.Read(buffer)
var data [Lanes][]byte
for i, l := range active {
data[l] = buffer[i*n : (i+1)*n]
}
// Hash.
digest := Sum(data)
// Verify correct result in active lanes.
for _, l := range active {
expect := md5.Sum(data[l])
if digest[l] != expect {
t.Fatalf("lane %02d: mismatch", l)
}
}
// Verify other lanes are zero.
isactive := map[int]bool{}
for _, l := range active {
isactive[l] = true
}
for l := 0; l < Lanes; l++ {
if !isactive[l] {
var zero [Size]byte
if digest[l] != zero {
t.Fatalf("inactive lane %d is non-zero", l)
}
}
}
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/md5x16/stub.go 0000664 0000000 0000000 00000000710 14370657153 0023521 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out md5x16.s -stubs stub.go. DO NOT EDIT.
package md5x16
// block MD5 hashes 16 messages into the running hash states h. Messages are
// at the given offsets from the base pointer. The 16-bit mask specifies
// which lanes are active: when bit i is not set loads will be disabled and
// the value of the resulting hash is undefined.
func block(h *[4][16]uint32, base uintptr, offsets *[16]uint32, mask uint16)
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/ 0000775 0000000 0000000 00000000000 14370657153 0022442 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/pragma/README.md 0000664 0000000 0000000 00000001550 14370657153 0023722 0 ustar 00root root 0000000 0000000 # pragma
Apply [compiler directives](https://golang.org/pkg/cmd/compile/#hdr-Compiler_Directives) to `avo` functions.
The [code generator](asm.go) uses the `Pragma` function to apply the `//go:noescape` directive to the `Add` function:
[embedmd]:# (asm.go go /func main/ /^}/)
```go
func main() {
TEXT("Add", NOSPLIT, "func(z, x, y *uint64)")
Pragma("noescape")
Doc("Add adds the values at x and y and writes the result to z.")
zptr := Mem{Base: Load(Param("z"), GP64())}
xptr := Mem{Base: Load(Param("x"), GP64())}
yptr := Mem{Base: Load(Param("y"), GP64())}
x, y := GP64(), GP64()
MOVQ(xptr, x)
MOVQ(yptr, y)
ADDQ(x, y)
MOVQ(y, zptr)
RET()
Generate()
}
```
Note the directive is applied in the generated stub file:
[embedmd]:# (stub.go go /\/\/ Add/ /func/)
```go
// Add adds the values at x and y and writes the result to z.
//
//go:noescape
func
```
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/asm.go 0000664 0000000 0000000 00000001015 14370657153 0023546 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Add", NOSPLIT, "func(z, x, y *uint64)")
Pragma("noescape")
Doc("Add adds the values at x and y and writes the result to z.")
zptr := Mem{Base: Load(Param("z"), GP64())}
xptr := Mem{Base: Load(Param("x"), GP64())}
yptr := Mem{Base: Load(Param("y"), GP64())}
x, y := GP64(), GP64()
MOVQ(xptr, x)
MOVQ(yptr, y)
ADDQ(x, y)
MOVQ(y, zptr)
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/doc.go 0000664 0000000 0000000 00000000116 14370657153 0023534 0 ustar 00root root 0000000 0000000 // Package pragma demonstrates the use of compiler directives.
package pragma
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/pragma.s 0000664 0000000 0000000 00000000461 14370657153 0024076 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out pragma.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Add(z *uint64, x *uint64, y *uint64)
TEXT ·Add(SB), NOSPLIT, $0-24
MOVQ z+0(FP), AX
MOVQ x+8(FP), CX
MOVQ y+16(FP), DX
MOVQ (CX), CX
MOVQ (DX), DX
ADDQ CX, DX
MOVQ DX, (AX)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/pragma_test.go 0000664 0000000 0000000 00000000525 14370657153 0025301 0 ustar 00root root 0000000 0000000 package pragma
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out pragma.s -stubs stub.go
func TestAdd(t *testing.T) {
got := func(x, y uint64) (z uint64) { Add(&z, &x, &y); return }
expect := func(x, y uint64) uint64 { return x + y }
if err := quick.CheckEqual(got, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/pragma/stub.go 0000664 0000000 0000000 00000000341 14370657153 0023744 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out pragma.s -stubs stub.go. DO NOT EDIT.
package pragma
// Add adds the values at x and y and writes the result to z.
//
//go:noescape
func Add(z *uint64, x *uint64, y *uint64)
golang-github-mmcloughlin-avo-0.5.0/examples/returns/ 0000775 0000000 0000000 00000000000 14370657153 0022675 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/returns/README.md 0000664 0000000 0000000 00000005517 14370657153 0024164 0 ustar 00root root 0000000 0000000 # returns
Demonstrates working with function return values.
## Multiple Unnamed Return Values
Use `ReturnIndex` to reference unnamed return values. For example, the following function returns `start, start + size`.
[embedmd]:# (asm.go go /.*TEXT.*Interval/ /RET.*/)
```go
TEXT("Interval", NOSPLIT, "func(start, size uint64) (uint64, uint64)")
Doc(
"Interval returns the (start, end) of an interval with the given start and size.",
"Demonstrates multiple unnamed return values.",
)
start := Load(Param("start"), GP64())
size := Load(Param("size"), GP64())
end := size
ADDQ(start, end)
Store(start, ReturnIndex(0))
Store(end, ReturnIndex(1))
RET()
```
## Multiple Named Return Values
Named return values are referenced much the same as arguments. For example, the following computes `(x0+x1, x0-x1)`.
[embedmd]:# (asm.go go /.*TEXT.*Butterfly/ /RET.*/)
```go
TEXT("Butterfly", NOSPLIT, "func(x0, x1 float64) (y0, y1 float64)")
Doc(
"Butterfly performs a 2-dimensional butterfly operation: computes (x0+x1, x0-x1).",
"Demonstrates multiple named return values.",
)
x0 := Load(Param("x0"), XMM())
x1 := Load(Param("x1"), XMM())
y0, y1 := XMM(), XMM()
MOVSD(x0, y0)
ADDSD(x1, y0)
MOVSD(x0, y1)
SUBSD(x1, y1)
Store(y0, Return("y0"))
Store(y1, Return("y1"))
RET()
```
## Returning Data Structures
Again just like function arguments, sub-components of return values can be referenced. This enables you to return data structures from your assembly functions.
The following code returns an array type.
[embedmd]:# (asm.go go /.*TEXT.*Septuple/ /RET.*/)
```go
TEXT("Septuple", NOSPLIT, "func(byte) [7]byte")
Doc(
"Septuple returns an array of seven of the given byte.",
"Demonstrates returning array values.",
)
b := Load(ParamIndex(0), GP8())
for i := 0; i < 7; i++ {
Store(b, ReturnIndex(0).Index(i))
}
RET()
```
Or a complex type:
[embedmd]:# (asm.go go /.*TEXT.*CriticalLine/ /RET.*/)
```go
TEXT("CriticalLine", NOSPLIT, "func(t float64) complex128")
Doc(
"CriticalLine returns the complex value 0.5 + it on Riemann's critical line.",
"Demonstrates returning complex values.",
)
t := Load(Param("t"), XMM())
half := XMM()
MOVSD(ConstData("half", F64(0.5)), half)
Store(half, ReturnIndex(0).Real())
Store(t, ReturnIndex(0).Imag())
RET()
```
You can even build a struct:
[embedmd]:# (asm.go go /.*TEXT.*NewStruct/ /RET.*/)
```go
TEXT("NewStruct", NOSPLIT, "func(w uint16, p [2]float64, q uint64) Struct")
Doc(
"NewStruct initializes a Struct value.",
"Demonstrates returning struct values.",
)
w := Load(Param("w"), GP16())
x := Load(Param("p").Index(0), XMM())
y := Load(Param("p").Index(1), XMM())
q := Load(Param("q"), GP64())
Store(w, ReturnIndex(0).Field("Word"))
Store(x, ReturnIndex(0).Field("Point").Index(0))
Store(y, ReturnIndex(0).Field("Point").Index(1))
Store(q, ReturnIndex(0).Field("Quad"))
RET()
```
golang-github-mmcloughlin-avo-0.5.0/examples/returns/asm.go 0000664 0000000 0000000 00000004154 14370657153 0024010 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
Package("github.com/mmcloughlin/avo/examples/returns")
TEXT("Interval", NOSPLIT, "func(start, size uint64) (uint64, uint64)")
Doc(
"Interval returns the (start, end) of an interval with the given start and size.",
"Demonstrates multiple unnamed return values.",
)
start := Load(Param("start"), GP64())
size := Load(Param("size"), GP64())
end := size
ADDQ(start, end)
Store(start, ReturnIndex(0))
Store(end, ReturnIndex(1))
RET()
TEXT("Butterfly", NOSPLIT, "func(x0, x1 float64) (y0, y1 float64)")
Doc(
"Butterfly performs a 2-dimensional butterfly operation: computes (x0+x1, x0-x1).",
"Demonstrates multiple named return values.",
)
x0 := Load(Param("x0"), XMM())
x1 := Load(Param("x1"), XMM())
y0, y1 := XMM(), XMM()
MOVSD(x0, y0)
ADDSD(x1, y0)
MOVSD(x0, y1)
SUBSD(x1, y1)
Store(y0, Return("y0"))
Store(y1, Return("y1"))
RET()
TEXT("Septuple", NOSPLIT, "func(byte) [7]byte")
Doc(
"Septuple returns an array of seven of the given byte.",
"Demonstrates returning array values.",
)
b := Load(ParamIndex(0), GP8())
for i := 0; i < 7; i++ {
Store(b, ReturnIndex(0).Index(i))
}
RET()
TEXT("CriticalLine", NOSPLIT, "func(t float64) complex128")
Doc(
"CriticalLine returns the complex value 0.5 + it on Riemann's critical line.",
"Demonstrates returning complex values.",
)
t := Load(Param("t"), XMM())
half := XMM()
MOVSD(ConstData("half", F64(0.5)), half)
Store(half, ReturnIndex(0).Real())
Store(t, ReturnIndex(0).Imag())
RET()
TEXT("NewStruct", NOSPLIT, "func(w uint16, p [2]float64, q uint64) Struct")
Doc(
"NewStruct initializes a Struct value.",
"Demonstrates returning struct values.",
)
w := Load(Param("w"), GP16())
x := Load(Param("p").Index(0), XMM())
y := Load(Param("p").Index(1), XMM())
q := Load(Param("q"), GP64())
Store(w, ReturnIndex(0).Field("Word"))
Store(x, ReturnIndex(0).Field("Point").Index(0))
Store(y, ReturnIndex(0).Field("Point").Index(1))
Store(q, ReturnIndex(0).Field("Quad"))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/returns/doc.go 0000664 0000000 0000000 00000000134 14370657153 0023767 0 ustar 00root root 0000000 0000000 // Package returns demonstrates how to write function return values in avo.
package returns
golang-github-mmcloughlin-avo-0.5.0/examples/returns/returns.go 0000664 0000000 0000000 00000000225 14370657153 0024725 0 ustar 00root root 0000000 0000000 package returns
// Struct is used to demonstrate writing struct return values.
type Struct struct {
Word uint16
Point [2]float64
Quad uint64
}
golang-github-mmcloughlin-avo-0.5.0/examples/returns/returns.s 0000664 0000000 0000000 00000002606 14370657153 0024567 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out returns.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Interval(start uint64, size uint64) (uint64, uint64)
TEXT ·Interval(SB), NOSPLIT, $0-32
MOVQ start+0(FP), AX
MOVQ size+8(FP), CX
ADDQ AX, CX
MOVQ AX, ret+16(FP)
MOVQ CX, ret1+24(FP)
RET
// func Butterfly(x0 float64, x1 float64) (y0 float64, y1 float64)
// Requires: SSE2
TEXT ·Butterfly(SB), NOSPLIT, $0-32
MOVSD x0+0(FP), X0
MOVSD x1+8(FP), X1
MOVSD X0, X2
ADDSD X1, X2
MOVSD X0, X3
SUBSD X1, X3
MOVSD X2, y0+16(FP)
MOVSD X3, y1+24(FP)
RET
// func Septuple(byte) [7]byte
TEXT ·Septuple(SB), NOSPLIT, $0-15
MOVB arg+0(FP), AL
MOVB AL, ret_0+8(FP)
MOVB AL, ret_1+9(FP)
MOVB AL, ret_2+10(FP)
MOVB AL, ret_3+11(FP)
MOVB AL, ret_4+12(FP)
MOVB AL, ret_5+13(FP)
MOVB AL, ret_6+14(FP)
RET
// func CriticalLine(t float64) complex128
// Requires: SSE2
TEXT ·CriticalLine(SB), NOSPLIT, $0-24
MOVSD t+0(FP), X0
MOVSD half<>+0(SB), X1
MOVSD X1, ret_real+8(FP)
MOVSD X0, ret_imag+16(FP)
RET
DATA half<>+0(SB)/8, $(0.5)
GLOBL half<>(SB), RODATA|NOPTR, $8
// func NewStruct(w uint16, p [2]float64, q uint64) Struct
// Requires: SSE2
TEXT ·NewStruct(SB), NOSPLIT, $0-64
MOVW w+0(FP), AX
MOVSD p_0+8(FP), X0
MOVSD p_1+16(FP), X1
MOVQ q+24(FP), CX
MOVW AX, ret_Word+32(FP)
MOVSD X0, ret_Point_0+40(FP)
MOVSD X1, ret_Point_1+48(FP)
MOVQ CX, ret_Quad+56(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/returns/returns_test.go 0000664 0000000 0000000 00000001326 14370657153 0025767 0 ustar 00root root 0000000 0000000 package returns
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out returns.s -stubs stub.go
func TestFunctionsEqual(t *testing.T) {
cases := []struct {
f, g interface{}
}{
{Interval, func(s, n uint64) (uint64, uint64) { return s, s + n }},
{Butterfly, func(x0, x1 float64) (float64, float64) { return x0 + x1, x0 - x1 }},
{Septuple, func(b byte) [7]byte { return [...]byte{b, b, b, b, b, b, b} }},
{CriticalLine, func(t float64) complex128 { return complex(0.5, t) }},
{NewStruct, func(w uint16, p [2]float64, q uint64) Struct { return Struct{Word: w, Point: p, Quad: q} }},
}
for _, c := range cases {
if err := quick.CheckEqual(c.f, c.g, nil); err != nil {
t.Fatal(err)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/returns/stub.go 0000664 0000000 0000000 00000001625 14370657153 0024205 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out returns.s -stubs stub.go. DO NOT EDIT.
package returns
// Interval returns the (start, end) of an interval with the given start and size.
// Demonstrates multiple unnamed return values.
func Interval(start uint64, size uint64) (uint64, uint64)
// Butterfly performs a 2-dimensional butterfly operation: computes (x0+x1, x0-x1).
// Demonstrates multiple named return values.
func Butterfly(x0 float64, x1 float64) (y0 float64, y1 float64)
// Septuple returns an array of seven of the given byte.
// Demonstrates returning array values.
func Septuple(byte) [7]byte
// CriticalLine returns the complex value 0.5 + it on Riemann's critical line.
// Demonstrates returning complex values.
func CriticalLine(t float64) complex128
// NewStruct initializes a Struct value.
// Demonstrates returning struct values.
func NewStruct(w uint16, p [2]float64, q uint64) Struct
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/ 0000775 0000000 0000000 00000000000 14370657153 0022027 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/sha1/README.md 0000664 0000000 0000000 00000003513 14370657153 0023310 0 ustar 00root root 0000000 0000000 # sha1
[SHA-1](https://en.wikipedia.org/wiki/SHA-1) in `avo`.
Compare to the [`crypto/sha1`](https://github.com/golang/go/blob/204a8f55dc2e0ac8d27a781dab0da609b98560da/src/crypto/sha1/sha1block_amd64.s#L16-L225) assembly.
[embedmd]:# (asm.go /func main/ /^}/)
```go
func main() {
TEXT("block", 0, "func(h *[5]uint32, m []byte)")
Doc("block SHA-1 hashes the 64-byte message m into the running state h.")
h := Mem{Base: Load(Param("h"), GP64())}
m := Mem{Base: Load(Param("m").Base(), GP64())}
// Store message values on the stack.
w := AllocLocal(64)
W := func(r int) Mem { return w.Offset((r % 16) * 4) }
Comment("Load initial hash.")
hash := [5]Register{GP32(), GP32(), GP32(), GP32(), GP32()}
for i, r := range hash {
MOVL(h.Offset(4*i), r)
}
Comment("Initialize registers.")
a, b, c, d, e := GP32(), GP32(), GP32(), GP32(), GP32()
for i, r := range []Register{a, b, c, d, e} {
MOVL(hash[i], r)
}
// Generate round updates.
quarter := []struct {
F func(Register, Register, Register) Register
K uint32
}{
{choose, 0x5a827999},
{xor, 0x6ed9eba1},
{majority, 0x8f1bbcdc},
{xor, 0xca62c1d6},
}
for r := 0; r < 80; r++ {
Commentf("Round %d.", r)
q := quarter[r/20]
// Load message value.
u := GP32()
if r < 16 {
MOVL(m.Offset(4*r), u)
BSWAPL(u)
} else {
MOVL(W(r-3), u)
XORL(W(r-8), u)
XORL(W(r-14), u)
XORL(W(r-16), u)
ROLL(U8(1), u)
}
MOVL(u, W(r))
// Compute the next state register.
t := GP32()
MOVL(a, t)
ROLL(U8(5), t)
ADDL(q.F(b, c, d), t)
ADDL(e, t)
ADDL(U32(q.K), t)
ADDL(u, t)
// Update registers.
ROLL(Imm(30), b)
a, b, c, d, e = t, a, b, c, d
}
Comment("Final add.")
for i, r := range []Register{a, b, c, d, e} {
ADDL(r, hash[i])
}
Comment("Store results back.")
for i, r := range hash {
MOVL(r, h.Offset(4*i))
}
RET()
Generate()
}
```
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/asm.go 0000664 0000000 0000000 00000004127 14370657153 0023142 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
TEXT("block", 0, "func(h *[5]uint32, m []byte)")
Doc("block SHA-1 hashes the 64-byte message m into the running state h.")
h := Mem{Base: Load(Param("h"), GP64())}
m := Mem{Base: Load(Param("m").Base(), GP64())}
// Store message values on the stack.
w := AllocLocal(64)
W := func(r int) Mem { return w.Offset((r % 16) * 4) }
Comment("Load initial hash.")
hash := [5]Register{GP32(), GP32(), GP32(), GP32(), GP32()}
for i, r := range hash {
MOVL(h.Offset(4*i), r)
}
Comment("Initialize registers.")
a, b, c, d, e := GP32(), GP32(), GP32(), GP32(), GP32()
for i, r := range []Register{a, b, c, d, e} {
MOVL(hash[i], r)
}
// Generate round updates.
quarter := []struct {
F func(Register, Register, Register) Register
K uint32
}{
{choose, 0x5a827999},
{xor, 0x6ed9eba1},
{majority, 0x8f1bbcdc},
{xor, 0xca62c1d6},
}
for r := 0; r < 80; r++ {
Commentf("Round %d.", r)
q := quarter[r/20]
// Load message value.
u := GP32()
if r < 16 {
MOVL(m.Offset(4*r), u)
BSWAPL(u)
} else {
MOVL(W(r-3), u)
XORL(W(r-8), u)
XORL(W(r-14), u)
XORL(W(r-16), u)
ROLL(U8(1), u)
}
MOVL(u, W(r))
// Compute the next state register.
t := GP32()
MOVL(a, t)
ROLL(U8(5), t)
ADDL(q.F(b, c, d), t)
ADDL(e, t)
ADDL(U32(q.K), t)
ADDL(u, t)
// Update registers.
ROLL(Imm(30), b)
a, b, c, d, e = t, a, b, c, d
}
Comment("Final add.")
for i, r := range []Register{a, b, c, d, e} {
ADDL(r, hash[i])
}
Comment("Store results back.")
for i, r := range hash {
MOVL(r, h.Offset(4*i))
}
RET()
Generate()
}
func choose(b, c, d Register) Register {
r := GP32()
MOVL(d, r)
XORL(c, r)
ANDL(b, r)
XORL(d, r)
return r
}
func xor(b, c, d Register) Register {
r := GP32()
MOVL(b, r)
XORL(c, r)
XORL(d, r)
return r
}
func majority(b, c, d Register) Register {
t, r := GP32(), GP32()
MOVL(b, t)
ORL(c, t)
ANDL(d, t)
MOVL(b, r)
ANDL(c, r)
ORL(t, r)
return r
}
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/doc.go 0000664 0000000 0000000 00000000077 14370657153 0023127 0 ustar 00root root 0000000 0000000 // Package sha1 implements the SHA-1 hash in avo.
package sha1
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/sha1.go 0000664 0000000 0000000 00000001511 14370657153 0023210 0 ustar 00root root 0000000 0000000 package sha1
import "encoding/binary"
// Size of a SHA-1 checksum in bytes.
const Size = 20
// BlockSize is the block size of SHA-1 in bytes.
const BlockSize = 64
// Sum returns the SHA-1 checksum of data.
func Sum(data []byte) [Size]byte {
n := len(data)
h := [5]uint32{0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0}
// Consume full blocks.
for len(data) >= BlockSize {
block(&h, data)
data = data[BlockSize:]
}
// Final block.
tmp := make([]byte, BlockSize)
copy(tmp, data)
tmp[len(data)] = 0x80
if len(data) >= 56 {
block(&h, tmp)
for i := 0; i < BlockSize; i++ {
tmp[i] = 0
}
}
binary.BigEndian.PutUint64(tmp[56:], uint64(8*n))
block(&h, tmp)
// Write into byte array.
var digest [Size]byte
for i := 0; i < 5; i++ {
binary.BigEndian.PutUint32(digest[4*i:], h[i])
}
return digest
}
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/sha1.s 0000664 0000000 0000000 00000055060 14370657153 0023055 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out sha1.s -stubs stub.go. DO NOT EDIT.
// func block(h *[5]uint32, m []byte)
TEXT ·block(SB), $64-32
MOVQ h+0(FP), AX
MOVQ m_base+8(FP), CX
// Load initial hash.
MOVL (AX), DX
MOVL 4(AX), BX
MOVL 8(AX), SI
MOVL 12(AX), DI
MOVL 16(AX), R8
// Initialize registers.
MOVL DX, R9
MOVL BX, R10
MOVL SI, R11
MOVL DI, R12
MOVL R8, R13
// Round 0.
MOVL (CX), R14
BSWAPL R14
MOVL R14, (SP)
MOVL R9, R15
ROLL $0x05, R15
MOVL R12, BP
XORL R11, BP
ANDL R10, BP
XORL R12, BP
ADDL BP, R15
ADDL R13, R15
ADDL $0x5a827999, R15
ADDL R14, R15
ROLL $0x1e, R10
// Round 1.
MOVL 4(CX), R13
BSWAPL R13
MOVL R13, 4(SP)
MOVL R15, R14
ROLL $0x05, R14
MOVL R11, BP
XORL R10, BP
ANDL R9, BP
XORL R11, BP
ADDL BP, R14
ADDL R12, R14
ADDL $0x5a827999, R14
ADDL R13, R14
ROLL $0x1e, R9
// Round 2.
MOVL 8(CX), R12
BSWAPL R12
MOVL R12, 8(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R10, BP
XORL R9, BP
ANDL R15, BP
XORL R10, BP
ADDL BP, R13
ADDL R11, R13
ADDL $0x5a827999, R13
ADDL R12, R13
ROLL $0x1e, R15
// Round 3.
MOVL 12(CX), R11
BSWAPL R11
MOVL R11, 12(SP)
MOVL R13, R12
ROLL $0x05, R12
MOVL R9, BP
XORL R15, BP
ANDL R14, BP
XORL R9, BP
ADDL BP, R12
ADDL R10, R12
ADDL $0x5a827999, R12
ADDL R11, R12
ROLL $0x1e, R14
// Round 4.
MOVL 16(CX), R10
BSWAPL R10
MOVL R10, 16(SP)
MOVL R12, R11
ROLL $0x05, R11
MOVL R15, BP
XORL R14, BP
ANDL R13, BP
XORL R15, BP
ADDL BP, R11
ADDL R9, R11
ADDL $0x5a827999, R11
ADDL R10, R11
ROLL $0x1e, R13
// Round 5.
MOVL 20(CX), R9
BSWAPL R9
MOVL R9, 20(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R14, BP
XORL R13, BP
ANDL R12, BP
XORL R14, BP
ADDL BP, R10
ADDL R15, R10
ADDL $0x5a827999, R10
ADDL R9, R10
ROLL $0x1e, R12
// Round 6.
MOVL 24(CX), R9
BSWAPL R9
MOVL R9, 24(SP)
MOVL R10, R15
ROLL $0x05, R15
MOVL R13, BP
XORL R12, BP
ANDL R11, BP
XORL R13, BP
ADDL BP, R15
ADDL R14, R15
ADDL $0x5a827999, R15
ADDL R9, R15
ROLL $0x1e, R11
// Round 7.
MOVL 28(CX), R9
BSWAPL R9
MOVL R9, 28(SP)
MOVL R15, R14
ROLL $0x05, R14
MOVL R12, BP
XORL R11, BP
ANDL R10, BP
XORL R12, BP
ADDL BP, R14
ADDL R13, R14
ADDL $0x5a827999, R14
ADDL R9, R14
ROLL $0x1e, R10
// Round 8.
MOVL 32(CX), R9
BSWAPL R9
MOVL R9, 32(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R11, BP
XORL R10, BP
ANDL R15, BP
XORL R11, BP
ADDL BP, R13
ADDL R12, R13
ADDL $0x5a827999, R13
ADDL R9, R13
ROLL $0x1e, R15
// Round 9.
MOVL 36(CX), R9
BSWAPL R9
MOVL R9, 36(SP)
MOVL R13, R12
ROLL $0x05, R12
MOVL R10, BP
XORL R15, BP
ANDL R14, BP
XORL R10, BP
ADDL BP, R12
ADDL R11, R12
ADDL $0x5a827999, R12
ADDL R9, R12
ROLL $0x1e, R14
// Round 10.
MOVL 40(CX), R9
BSWAPL R9
MOVL R9, 40(SP)
MOVL R12, R11
ROLL $0x05, R11
MOVL R15, BP
XORL R14, BP
ANDL R13, BP
XORL R15, BP
ADDL BP, R11
ADDL R10, R11
ADDL $0x5a827999, R11
ADDL R9, R11
ROLL $0x1e, R13
// Round 11.
MOVL 44(CX), R9
BSWAPL R9
MOVL R9, 44(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R14, BP
XORL R13, BP
ANDL R12, BP
XORL R14, BP
ADDL BP, R10
ADDL R15, R10
ADDL $0x5a827999, R10
ADDL R9, R10
ROLL $0x1e, R12
// Round 12.
MOVL 48(CX), R9
BSWAPL R9
MOVL R9, 48(SP)
MOVL R10, R15
ROLL $0x05, R15
MOVL R13, BP
XORL R12, BP
ANDL R11, BP
XORL R13, BP
ADDL BP, R15
ADDL R14, R15
ADDL $0x5a827999, R15
ADDL R9, R15
ROLL $0x1e, R11
// Round 13.
MOVL 52(CX), R9
BSWAPL R9
MOVL R9, 52(SP)
MOVL R15, R14
ROLL $0x05, R14
MOVL R12, BP
XORL R11, BP
ANDL R10, BP
XORL R12, BP
ADDL BP, R14
ADDL R13, R14
ADDL $0x5a827999, R14
ADDL R9, R14
ROLL $0x1e, R10
// Round 14.
MOVL 56(CX), R9
BSWAPL R9
MOVL R9, 56(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R11, BP
XORL R10, BP
ANDL R15, BP
XORL R11, BP
ADDL BP, R13
ADDL R12, R13
ADDL $0x5a827999, R13
ADDL R9, R13
ROLL $0x1e, R15
// Round 15.
MOVL 60(CX), CX
BSWAPL CX
MOVL CX, 60(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R10, R12
XORL R15, R12
ANDL R14, R12
XORL R10, R12
ADDL R12, R9
ADDL R11, R9
ADDL $0x5a827999, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 16.
MOVL 52(SP), CX
XORL 32(SP), CX
XORL 8(SP), CX
XORL (SP), CX
ROLL $0x01, CX
MOVL CX, (SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R15, R12
XORL R14, R12
ANDL R13, R12
XORL R15, R12
ADDL R12, R11
ADDL R10, R11
ADDL $0x5a827999, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 17.
MOVL 56(SP), CX
XORL 36(SP), CX
XORL 12(SP), CX
XORL 4(SP), CX
ROLL $0x01, CX
MOVL CX, 4(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R14, R12
XORL R13, R12
ANDL R9, R12
XORL R14, R12
ADDL R12, R10
ADDL R15, R10
ADDL $0x5a827999, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 18.
MOVL 60(SP), CX
XORL 40(SP), CX
XORL 16(SP), CX
XORL 8(SP), CX
ROLL $0x01, CX
MOVL CX, 8(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R13, R15
XORL R9, R15
ANDL R11, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0x5a827999, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 19.
MOVL (SP), CX
XORL 44(SP), CX
XORL 20(SP), CX
XORL 12(SP), CX
ROLL $0x01, CX
MOVL CX, 12(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R9, R15
XORL R11, R15
ANDL R10, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0x5a827999, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 20.
MOVL 4(SP), CX
XORL 48(SP), CX
XORL 24(SP), CX
XORL 16(SP), CX
ROLL $0x01, CX
MOVL CX, 16(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0x6ed9eba1, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 21.
MOVL 8(SP), CX
XORL 52(SP), CX
XORL 28(SP), CX
XORL 20(SP), CX
ROLL $0x01, CX
MOVL CX, 20(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0x6ed9eba1, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 22.
MOVL 12(SP), CX
XORL 56(SP), CX
XORL 32(SP), CX
XORL 24(SP), CX
ROLL $0x01, CX
MOVL CX, 24(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0x6ed9eba1, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 23.
MOVL 16(SP), CX
XORL 60(SP), CX
XORL 36(SP), CX
XORL 28(SP), CX
ROLL $0x01, CX
MOVL CX, 28(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0x6ed9eba1, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 24.
MOVL 20(SP), CX
XORL (SP), CX
XORL 40(SP), CX
XORL 32(SP), CX
ROLL $0x01, CX
MOVL CX, 32(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0x6ed9eba1, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 25.
MOVL 24(SP), CX
XORL 4(SP), CX
XORL 44(SP), CX
XORL 36(SP), CX
ROLL $0x01, CX
MOVL CX, 36(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0x6ed9eba1, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 26.
MOVL 28(SP), CX
XORL 8(SP), CX
XORL 48(SP), CX
XORL 40(SP), CX
ROLL $0x01, CX
MOVL CX, 40(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0x6ed9eba1, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 27.
MOVL 32(SP), CX
XORL 12(SP), CX
XORL 52(SP), CX
XORL 44(SP), CX
ROLL $0x01, CX
MOVL CX, 44(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0x6ed9eba1, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 28.
MOVL 36(SP), CX
XORL 16(SP), CX
XORL 56(SP), CX
XORL 48(SP), CX
ROLL $0x01, CX
MOVL CX, 48(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0x6ed9eba1, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 29.
MOVL 40(SP), CX
XORL 20(SP), CX
XORL 60(SP), CX
XORL 52(SP), CX
ROLL $0x01, CX
MOVL CX, 52(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0x6ed9eba1, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 30.
MOVL 44(SP), CX
XORL 24(SP), CX
XORL (SP), CX
XORL 56(SP), CX
ROLL $0x01, CX
MOVL CX, 56(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0x6ed9eba1, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 31.
MOVL 48(SP), CX
XORL 28(SP), CX
XORL 4(SP), CX
XORL 60(SP), CX
ROLL $0x01, CX
MOVL CX, 60(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0x6ed9eba1, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 32.
MOVL 52(SP), CX
XORL 32(SP), CX
XORL 8(SP), CX
XORL (SP), CX
ROLL $0x01, CX
MOVL CX, (SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0x6ed9eba1, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 33.
MOVL 56(SP), CX
XORL 36(SP), CX
XORL 12(SP), CX
XORL 4(SP), CX
ROLL $0x01, CX
MOVL CX, 4(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0x6ed9eba1, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 34.
MOVL 60(SP), CX
XORL 40(SP), CX
XORL 16(SP), CX
XORL 8(SP), CX
ROLL $0x01, CX
MOVL CX, 8(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0x6ed9eba1, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 35.
MOVL (SP), CX
XORL 44(SP), CX
XORL 20(SP), CX
XORL 12(SP), CX
ROLL $0x01, CX
MOVL CX, 12(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0x6ed9eba1, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 36.
MOVL 4(SP), CX
XORL 48(SP), CX
XORL 24(SP), CX
XORL 16(SP), CX
ROLL $0x01, CX
MOVL CX, 16(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0x6ed9eba1, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 37.
MOVL 8(SP), CX
XORL 52(SP), CX
XORL 28(SP), CX
XORL 20(SP), CX
ROLL $0x01, CX
MOVL CX, 20(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0x6ed9eba1, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 38.
MOVL 12(SP), CX
XORL 56(SP), CX
XORL 32(SP), CX
XORL 24(SP), CX
ROLL $0x01, CX
MOVL CX, 24(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0x6ed9eba1, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 39.
MOVL 16(SP), CX
XORL 60(SP), CX
XORL 36(SP), CX
XORL 28(SP), CX
ROLL $0x01, CX
MOVL CX, 28(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0x6ed9eba1, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 40.
MOVL 20(SP), CX
XORL (SP), CX
XORL 40(SP), CX
XORL 32(SP), CX
ROLL $0x01, CX
MOVL CX, 32(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
ORL R14, R15
ANDL R12, R15
MOVL R13, BP
ANDL R14, BP
ORL R15, BP
ADDL BP, R11
ADDL R10, R11
ADDL $0x8f1bbcdc, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 41.
MOVL 24(SP), CX
XORL 4(SP), CX
XORL 44(SP), CX
XORL 36(SP), CX
ROLL $0x01, CX
MOVL CX, 36(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
ORL R13, R15
ANDL R14, R15
MOVL R9, BP
ANDL R13, BP
ORL R15, BP
ADDL BP, R10
ADDL R12, R10
ADDL $0x8f1bbcdc, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 42.
MOVL 28(SP), CX
XORL 8(SP), CX
XORL 48(SP), CX
XORL 40(SP), CX
ROLL $0x01, CX
MOVL CX, 40(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
ORL R9, R15
ANDL R13, R15
MOVL R11, BP
ANDL R9, BP
ORL R15, BP
ADDL BP, R12
ADDL R14, R12
ADDL $0x8f1bbcdc, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 43.
MOVL 32(SP), CX
XORL 12(SP), CX
XORL 52(SP), CX
XORL 44(SP), CX
ROLL $0x01, CX
MOVL CX, 44(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
ORL R11, R15
ANDL R9, R15
MOVL R10, BP
ANDL R11, BP
ORL R15, BP
ADDL BP, R14
ADDL R13, R14
ADDL $0x8f1bbcdc, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 44.
MOVL 36(SP), CX
XORL 16(SP), CX
XORL 56(SP), CX
XORL 48(SP), CX
ROLL $0x01, CX
MOVL CX, 48(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
ORL R10, R15
ANDL R11, R15
MOVL R12, BP
ANDL R10, BP
ORL R15, BP
ADDL BP, R13
ADDL R9, R13
ADDL $0x8f1bbcdc, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 45.
MOVL 40(SP), CX
XORL 20(SP), CX
XORL 60(SP), CX
XORL 52(SP), CX
ROLL $0x01, CX
MOVL CX, 52(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
ORL R12, R15
ANDL R10, R15
MOVL R14, BP
ANDL R12, BP
ORL R15, BP
ADDL BP, R9
ADDL R11, R9
ADDL $0x8f1bbcdc, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 46.
MOVL 44(SP), CX
XORL 24(SP), CX
XORL (SP), CX
XORL 56(SP), CX
ROLL $0x01, CX
MOVL CX, 56(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
ORL R14, R15
ANDL R12, R15
MOVL R13, BP
ANDL R14, BP
ORL R15, BP
ADDL BP, R11
ADDL R10, R11
ADDL $0x8f1bbcdc, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 47.
MOVL 48(SP), CX
XORL 28(SP), CX
XORL 4(SP), CX
XORL 60(SP), CX
ROLL $0x01, CX
MOVL CX, 60(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
ORL R13, R15
ANDL R14, R15
MOVL R9, BP
ANDL R13, BP
ORL R15, BP
ADDL BP, R10
ADDL R12, R10
ADDL $0x8f1bbcdc, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 48.
MOVL 52(SP), CX
XORL 32(SP), CX
XORL 8(SP), CX
XORL (SP), CX
ROLL $0x01, CX
MOVL CX, (SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
ORL R9, R15
ANDL R13, R15
MOVL R11, BP
ANDL R9, BP
ORL R15, BP
ADDL BP, R12
ADDL R14, R12
ADDL $0x8f1bbcdc, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 49.
MOVL 56(SP), CX
XORL 36(SP), CX
XORL 12(SP), CX
XORL 4(SP), CX
ROLL $0x01, CX
MOVL CX, 4(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
ORL R11, R15
ANDL R9, R15
MOVL R10, BP
ANDL R11, BP
ORL R15, BP
ADDL BP, R14
ADDL R13, R14
ADDL $0x8f1bbcdc, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 50.
MOVL 60(SP), CX
XORL 40(SP), CX
XORL 16(SP), CX
XORL 8(SP), CX
ROLL $0x01, CX
MOVL CX, 8(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
ORL R10, R15
ANDL R11, R15
MOVL R12, BP
ANDL R10, BP
ORL R15, BP
ADDL BP, R13
ADDL R9, R13
ADDL $0x8f1bbcdc, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 51.
MOVL (SP), CX
XORL 44(SP), CX
XORL 20(SP), CX
XORL 12(SP), CX
ROLL $0x01, CX
MOVL CX, 12(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
ORL R12, R15
ANDL R10, R15
MOVL R14, BP
ANDL R12, BP
ORL R15, BP
ADDL BP, R9
ADDL R11, R9
ADDL $0x8f1bbcdc, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 52.
MOVL 4(SP), CX
XORL 48(SP), CX
XORL 24(SP), CX
XORL 16(SP), CX
ROLL $0x01, CX
MOVL CX, 16(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
ORL R14, R15
ANDL R12, R15
MOVL R13, BP
ANDL R14, BP
ORL R15, BP
ADDL BP, R11
ADDL R10, R11
ADDL $0x8f1bbcdc, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 53.
MOVL 8(SP), CX
XORL 52(SP), CX
XORL 28(SP), CX
XORL 20(SP), CX
ROLL $0x01, CX
MOVL CX, 20(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
ORL R13, R15
ANDL R14, R15
MOVL R9, BP
ANDL R13, BP
ORL R15, BP
ADDL BP, R10
ADDL R12, R10
ADDL $0x8f1bbcdc, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 54.
MOVL 12(SP), CX
XORL 56(SP), CX
XORL 32(SP), CX
XORL 24(SP), CX
ROLL $0x01, CX
MOVL CX, 24(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
ORL R9, R15
ANDL R13, R15
MOVL R11, BP
ANDL R9, BP
ORL R15, BP
ADDL BP, R12
ADDL R14, R12
ADDL $0x8f1bbcdc, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 55.
MOVL 16(SP), CX
XORL 60(SP), CX
XORL 36(SP), CX
XORL 28(SP), CX
ROLL $0x01, CX
MOVL CX, 28(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
ORL R11, R15
ANDL R9, R15
MOVL R10, BP
ANDL R11, BP
ORL R15, BP
ADDL BP, R14
ADDL R13, R14
ADDL $0x8f1bbcdc, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 56.
MOVL 20(SP), CX
XORL (SP), CX
XORL 40(SP), CX
XORL 32(SP), CX
ROLL $0x01, CX
MOVL CX, 32(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
ORL R10, R15
ANDL R11, R15
MOVL R12, BP
ANDL R10, BP
ORL R15, BP
ADDL BP, R13
ADDL R9, R13
ADDL $0x8f1bbcdc, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 57.
MOVL 24(SP), CX
XORL 4(SP), CX
XORL 44(SP), CX
XORL 36(SP), CX
ROLL $0x01, CX
MOVL CX, 36(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
ORL R12, R15
ANDL R10, R15
MOVL R14, BP
ANDL R12, BP
ORL R15, BP
ADDL BP, R9
ADDL R11, R9
ADDL $0x8f1bbcdc, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 58.
MOVL 28(SP), CX
XORL 8(SP), CX
XORL 48(SP), CX
XORL 40(SP), CX
ROLL $0x01, CX
MOVL CX, 40(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
ORL R14, R15
ANDL R12, R15
MOVL R13, BP
ANDL R14, BP
ORL R15, BP
ADDL BP, R11
ADDL R10, R11
ADDL $0x8f1bbcdc, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 59.
MOVL 32(SP), CX
XORL 12(SP), CX
XORL 52(SP), CX
XORL 44(SP), CX
ROLL $0x01, CX
MOVL CX, 44(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
ORL R13, R15
ANDL R14, R15
MOVL R9, BP
ANDL R13, BP
ORL R15, BP
ADDL BP, R10
ADDL R12, R10
ADDL $0x8f1bbcdc, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 60.
MOVL 36(SP), CX
XORL 16(SP), CX
XORL 56(SP), CX
XORL 48(SP), CX
ROLL $0x01, CX
MOVL CX, 48(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0xca62c1d6, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 61.
MOVL 40(SP), CX
XORL 20(SP), CX
XORL 60(SP), CX
XORL 52(SP), CX
ROLL $0x01, CX
MOVL CX, 52(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0xca62c1d6, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 62.
MOVL 44(SP), CX
XORL 24(SP), CX
XORL (SP), CX
XORL 56(SP), CX
ROLL $0x01, CX
MOVL CX, 56(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0xca62c1d6, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 63.
MOVL 48(SP), CX
XORL 28(SP), CX
XORL 4(SP), CX
XORL 60(SP), CX
ROLL $0x01, CX
MOVL CX, 60(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0xca62c1d6, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 64.
MOVL 52(SP), CX
XORL 32(SP), CX
XORL 8(SP), CX
XORL (SP), CX
ROLL $0x01, CX
MOVL CX, (SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0xca62c1d6, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 65.
MOVL 56(SP), CX
XORL 36(SP), CX
XORL 12(SP), CX
XORL 4(SP), CX
ROLL $0x01, CX
MOVL CX, 4(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0xca62c1d6, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 66.
MOVL 60(SP), CX
XORL 40(SP), CX
XORL 16(SP), CX
XORL 8(SP), CX
ROLL $0x01, CX
MOVL CX, 8(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0xca62c1d6, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 67.
MOVL (SP), CX
XORL 44(SP), CX
XORL 20(SP), CX
XORL 12(SP), CX
ROLL $0x01, CX
MOVL CX, 12(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0xca62c1d6, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 68.
MOVL 4(SP), CX
XORL 48(SP), CX
XORL 24(SP), CX
XORL 16(SP), CX
ROLL $0x01, CX
MOVL CX, 16(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0xca62c1d6, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 69.
MOVL 8(SP), CX
XORL 52(SP), CX
XORL 28(SP), CX
XORL 20(SP), CX
ROLL $0x01, CX
MOVL CX, 20(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0xca62c1d6, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 70.
MOVL 12(SP), CX
XORL 56(SP), CX
XORL 32(SP), CX
XORL 24(SP), CX
ROLL $0x01, CX
MOVL CX, 24(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0xca62c1d6, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 71.
MOVL 16(SP), CX
XORL 60(SP), CX
XORL 36(SP), CX
XORL 28(SP), CX
ROLL $0x01, CX
MOVL CX, 28(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0xca62c1d6, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 72.
MOVL 20(SP), CX
XORL (SP), CX
XORL 40(SP), CX
XORL 32(SP), CX
ROLL $0x01, CX
MOVL CX, 32(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0xca62c1d6, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 73.
MOVL 24(SP), CX
XORL 4(SP), CX
XORL 44(SP), CX
XORL 36(SP), CX
ROLL $0x01, CX
MOVL CX, 36(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0xca62c1d6, R14
ADDL CX, R14
ROLL $0x1e, R10
// Round 74.
MOVL 28(SP), CX
XORL 8(SP), CX
XORL 48(SP), CX
XORL 40(SP), CX
ROLL $0x01, CX
MOVL CX, 40(SP)
MOVL R14, R13
ROLL $0x05, R13
MOVL R12, R15
XORL R10, R15
XORL R11, R15
ADDL R15, R13
ADDL R9, R13
ADDL $0xca62c1d6, R13
ADDL CX, R13
ROLL $0x1e, R12
// Round 75.
MOVL 32(SP), CX
XORL 12(SP), CX
XORL 52(SP), CX
XORL 44(SP), CX
ROLL $0x01, CX
MOVL CX, 44(SP)
MOVL R13, R9
ROLL $0x05, R9
MOVL R14, R15
XORL R12, R15
XORL R10, R15
ADDL R15, R9
ADDL R11, R9
ADDL $0xca62c1d6, R9
ADDL CX, R9
ROLL $0x1e, R14
// Round 76.
MOVL 36(SP), CX
XORL 16(SP), CX
XORL 56(SP), CX
XORL 48(SP), CX
ROLL $0x01, CX
MOVL CX, 48(SP)
MOVL R9, R11
ROLL $0x05, R11
MOVL R13, R15
XORL R14, R15
XORL R12, R15
ADDL R15, R11
ADDL R10, R11
ADDL $0xca62c1d6, R11
ADDL CX, R11
ROLL $0x1e, R13
// Round 77.
MOVL 40(SP), CX
XORL 20(SP), CX
XORL 60(SP), CX
XORL 52(SP), CX
ROLL $0x01, CX
MOVL CX, 52(SP)
MOVL R11, R10
ROLL $0x05, R10
MOVL R9, R15
XORL R13, R15
XORL R14, R15
ADDL R15, R10
ADDL R12, R10
ADDL $0xca62c1d6, R10
ADDL CX, R10
ROLL $0x1e, R9
// Round 78.
MOVL 44(SP), CX
XORL 24(SP), CX
XORL (SP), CX
XORL 56(SP), CX
ROLL $0x01, CX
MOVL CX, 56(SP)
MOVL R10, R12
ROLL $0x05, R12
MOVL R11, R15
XORL R9, R15
XORL R13, R15
ADDL R15, R12
ADDL R14, R12
ADDL $0xca62c1d6, R12
ADDL CX, R12
ROLL $0x1e, R11
// Round 79.
MOVL 48(SP), CX
XORL 28(SP), CX
XORL 4(SP), CX
XORL 60(SP), CX
ROLL $0x01, CX
MOVL CX, 60(SP)
MOVL R12, R14
ROLL $0x05, R14
MOVL R10, R15
XORL R11, R15
XORL R9, R15
ADDL R15, R14
ADDL R13, R14
ADDL $0xca62c1d6, R14
ADDL CX, R14
ROLL $0x1e, R10
// Final add.
ADDL R14, DX
ADDL R12, BX
ADDL R10, SI
ADDL R11, DI
ADDL R9, R8
// Store results back.
MOVL DX, (AX)
MOVL BX, 4(AX)
MOVL SI, 8(AX)
MOVL DI, 12(AX)
MOVL R8, 16(AX)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/sha1_test.go 0000664 0000000 0000000 00000002024 14370657153 0024247 0 ustar 00root root 0000000 0000000 package sha1
import (
"bytes"
"crypto/sha1"
"encoding/hex"
"testing"
"testing/quick"
)
//go:generate go run asm.go -out sha1.s -stubs stub.go
func TestVectors(t *testing.T) {
cases := []struct {
Data string
HexDigest string
}{
{"", "da39a3ee5e6b4b0d3255bfef95601890afd80709"},
{"The quick brown fox jumps over the lazy dog", "2fd4e1c67a2d28fced849ee1bb76e7391b93eb12"},
{"The quick brown fox jumps over the lazy cog", "de9f2c7fd25e1b3afad3e85a0bd17d9b100db4b3"},
}
for _, c := range cases {
digest := Sum([]byte(c.Data))
got := hex.EncodeToString(digest[:])
if got != c.HexDigest {
t.Errorf("Sum(%#v) = %s; expect %s", c.Data, got, c.HexDigest)
}
}
}
func TestCmp(t *testing.T) {
if err := quick.CheckEqual(Sum, sha1.Sum, nil); err != nil {
t.Fatal(err)
}
}
func TestLengths(t *testing.T) {
data := make([]byte, BlockSize)
for n := 0; n <= BlockSize; n++ {
got := Sum(data[:n])
expect := sha1.Sum(data[:n])
if !bytes.Equal(got[:], expect[:]) {
t.Errorf("failed on length %d", n)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/sha1/stub.go 0000664 0000000 0000000 00000000315 14370657153 0023332 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out sha1.s -stubs stub.go. DO NOT EDIT.
package sha1
// block SHA-1 hashes the 64-byte message m into the running state h.
func block(h *[5]uint32, m []byte)
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/ 0000775 0000000 0000000 00000000000 14370657153 0022502 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/LICENSE 0000664 0000000 0000000 00000017177 14370657153 0023524 0 ustar 00root root 0000000 0000000 // Code generated by downloading from https://raw.githubusercontent.com/demerphq/BeagleHash/5f8620b953230e5b16171b745155fc3b0ef8f75e/LICENSE. DO NOT EDIT.
GNU LESSER GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
Copyright (C) 2007 Free Software Foundation, Inc.
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
This version of the GNU Lesser General Public License incorporates
the terms and conditions of version 3 of the GNU General Public
License, supplemented by the additional permissions listed below.
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General Public License, and the "GNU GPL" refers to version 3 of the GNU
General Public License.
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other than an Application or a Combined Work as defined below.
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accompanying uncombined form of the same work.
6. Revised Versions of the GNU Lesser General Public License.
The Free Software Foundation may publish revised and/or new versions
of the GNU Lesser General Public License from time to time. Such new
versions will be similar in spirit to the present version, but may
differ in detail to address new problems or concerns.
Each version is given a distinguishing version number. If the
Library as you received it specifies that a certain numbered version
of the GNU Lesser General Public License "or any later version"
applies to it, you have the option of following the terms and
conditions either of that published version or of any later version
published by the Free Software Foundation. If the Library as you
received it does not specify a version number of the GNU Lesser
General Public License, you may choose any version of the GNU Lesser
General Public License ever published by the Free Software Foundation.
If the Library as you received it specifies that a proxy can decide
whether future versions of the GNU Lesser General Public License shall
apply, that proxy's public statement of acceptance of any version is
permanent authorization for you to choose that version for the
Library.
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/README.md 0000664 0000000 0000000 00000001062 14370657153 0023760 0 ustar 00root root 0000000 0000000 # StadtX
Implementation of [`StadtX` hash](https://github.com/demerphq/BeagleHash) in `avo`, ported directly from the [PeachPy](https://github.com/Maratyszcza/PeachPy) implementation in [dgryski/go-stadtx](https://github.com/dgryski/go-stadtx).
## Credit
* [Yves Orton](https://github.com/demerphq) for the [design and reference implementation](https://github.com/demerphq/BeagleHash)
* [Damian Gryski](https://github.com/dgryski) for the [Go and PeachPy port](https://github.com/dgryski/go-stadtx)
## License
[LGPLv3](LICENSE) following the original work.
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/asm.go 0000664 0000000 0000000 00000013075 14370657153 0023617 0 ustar 00root root 0000000 0000000 // +build ignore
package main
import (
"strconv"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
const (
k0U64 = 0xb89b0f8e1655514f
k1U64 = 0x8c6f736011bd5127
k2U64 = 0x8f29bd94edce7b39
k3U64 = 0x9c1b8e1e9628323f
k2U32 = 0x802910e3
k3U32 = 0x819b13af
k4U32 = 0x91cb27e5
k5U32 = 0xc1a269c1
)
func imul(k uint64, r Register) {
t := GP64()
MOVQ(U64(k), t)
IMULQ(t, r)
}
func makelabels(name string, n int) []string {
l := make([]string, n)
for i := 0; i < n; i++ {
l[i] = name + strconv.Itoa(i)
}
return l
}
func main() {
Package("github.com/mmcloughlin/avo/examples/stadtx")
TEXT("Hash", NOSPLIT, "func(state *State, key []byte) uint64")
Doc("Hash computes the Stadtx hash.")
statePtr := Load(Param("state"), GP64())
ptr := Load(Param("key").Base(), GP64())
n := Load(Param("key").Len(), GP64())
v0 := GP64()
v1 := GP64()
MOVQ(Mem{Base: statePtr}, v0)
MOVQ(Mem{Base: statePtr, Disp: 8}, v1)
t := GP64()
MOVQ(n, t)
ADDQ(U32(1), t)
imul(k0U64, t)
XORQ(t, v0)
MOVQ(n, t)
ADDQ(U32(2), t)
imul(k1U64, t)
XORQ(t, v1)
long := "coreLong"
CMPQ(n, U32(32))
JGE(LabelRef(long))
//
u64s := GP64()
MOVQ(n, u64s)
SHRQ(U8(3), u64s)
//
labels := makelabels("shortCore", 4)
//
for i := 0; i < 4; i++ {
CMPQ(u64s, U32(i))
JE(LabelRef(labels[i]))
}
for i := 3; i > 0; i-- {
Label(labels[i])
r := GP64()
MOVQ(Mem{Base: ptr}, r)
imul(k3U64, r)
ADDQ(r, v0)
RORQ(U8(17), v0)
XORQ(v1, v0)
RORQ(U8(53), v1)
ADDQ(v0, v1)
ADDQ(U32(8), ptr)
SUBQ(U32(8), n)
}
Label(labels[0])
labels = makelabels("shortTail", 8)
for i := 0; i < 8; i++ {
CMPQ(n, U32(i))
JE(LabelRef(labels[i]))
}
after := "shortAfter"
ch := GP64()
Label(labels[7])
MOVBQZX(Mem{Base: ptr, Disp: 6}, ch)
SHLQ(U8(32), ch)
ADDQ(ch, v0)
Label(labels[6])
MOVBQZX(Mem{Base: ptr, Disp: 5}, ch)
SHLQ(U8(48), ch)
ADDQ(ch, v1)
Label(labels[5])
MOVBQZX(Mem{Base: ptr, Disp: 4}, ch)
SHLQ(U8(16), ch)
ADDQ(ch, v0)
Label(labels[4])
MOVLQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v1)
JMP(LabelRef(after))
Label(labels[3])
MOVBQZX(Mem{Base: ptr, Disp: 2}, ch)
SHLQ(U8(48), ch)
ADDQ(ch, v0)
Label(labels[2])
MOVWQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v1)
JMP(LabelRef(after))
Label(labels[1])
MOVBQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v0)
Label(labels[0])
RORQ(U8(32), v1)
XORQ(U32(0xff), v1)
Label(after)
XORQ(v0, v1)
RORQ(U8(33), v0)
ADDQ(v1, v0)
ROLQ(U8(17), v1)
XORQ(v0, v1)
ROLQ(U8(43), v0)
ADDQ(v1, v0)
ROLQ(U8(31), v1)
SUBQ(v0, v1)
ROLQ(U8(13), v0)
XORQ(v1, v0)
SUBQ(v0, v1)
ROLQ(U8(41), v0)
ADDQ(v1, v0)
ROLQ(U8(37), v1)
XORQ(v0, v1)
RORQ(U8(39), v0)
ADDQ(v1, v0)
RORQ(U8(15), v1)
ADDQ(v0, v1)
ROLQ(U8(15), v0)
XORQ(v1, v0)
RORQ(U8(5), v1)
XORQ(v1, v0)
Store(v0, ReturnIndex(0))
RET()
Label(long)
v2 := GP64()
v3 := GP64()
MOVQ(Mem{Base: statePtr, Disp: 16}, v2)
MOVQ(Mem{Base: statePtr, Disp: 24}, v3)
MOVQ(n, t)
ADDQ(U32(3), t)
imul(k2U64, t)
XORQ(t, v2)
MOVQ(n, t)
ADDQ(U32(4), t)
imul(k3U64, t)
XORQ(t, v3)
r := GP64()
loop := "block"
Label(loop)
MOVQ(Mem{Base: ptr}, r)
imul(k2U32, r)
ADDQ(r, v0)
ROLQ(U8(57), v0)
XORQ(v3, v0)
MOVQ(Mem{Base: ptr, Disp: 8}, r)
imul(k3U32, r)
ADDQ(r, v1)
ROLQ(U8(63), v1)
XORQ(v2, v1)
MOVQ(Mem{Base: ptr, Disp: 16}, r)
imul(k4U32, r)
ADDQ(r, v2)
RORQ(U8(47), v2)
ADDQ(v0, v2)
MOVQ(Mem{Base: ptr, Disp: 24}, r)
imul(k5U32, r)
ADDQ(r, v3)
RORQ(U8(11), v3)
SUBQ(v1, v3)
ADDQ(U32(32), ptr)
SUBQ(U32(32), n)
CMPQ(n, U32(32))
JGE(LabelRef(loop))
nsave := GP64()
MOVQ(n, nsave)
MOVQ(n, u64s)
SHRQ(U8(3), u64s)
labels = makelabels("longCore", 4)
for i := 0; i < 4; i++ {
CMPQ(u64s, U32(i))
JE(LabelRef(labels[i]))
}
Label(labels[3])
MOVQ(Mem{Base: ptr}, r)
imul(k2U32, r)
ADDQ(r, v0)
ROLQ(U8(57), v0)
XORQ(v3, v0)
ADDQ(U32(8), ptr)
SUBQ(U32(8), n)
Label(labels[2])
MOVQ(Mem{Base: ptr}, r)
imul(k3U32, r)
ADDQ(r, v1)
ROLQ(U8(63), v1)
XORQ(v2, v1)
ADDQ(U32(8), ptr)
SUBQ(U32(8), n)
Label(labels[1])
MOVQ(Mem{Base: ptr}, r)
imul(k4U32, r)
ADDQ(r, v2)
RORQ(U8(47), v2)
ADDQ(v0, v2)
ADDQ(U32(8), ptr)
SUBQ(U32(8), n)
Label(labels[0])
RORQ(U8(11), v3)
SUBQ(v1, v3)
ADDQ(U32(1), nsave)
imul(k3U64, nsave)
XORQ(nsave, v0)
labels = makelabels("longTail", 8)
for i := 0; i < 8; i++ {
CMPQ(n, U32(i))
JE(LabelRef(labels[i]))
}
after = "longAfter"
Label(labels[7])
MOVBQZX(Mem{Base: ptr, Disp: 6}, ch)
ADDQ(ch, v1)
Label(labels[6])
MOVWQZX(Mem{Base: ptr, Disp: 4}, ch)
ADDQ(ch, v2)
MOVLQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v3)
JMP(LabelRef(after))
Label(labels[5])
MOVBQZX(Mem{Base: ptr, Disp: 4}, ch)
ADDQ(ch, v1)
Label(labels[4])
MOVLQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v2)
JMP(LabelRef(after))
Label(labels[3])
MOVBQZX(Mem{Base: ptr, Disp: 2}, ch)
ADDQ(ch, v3)
Label(labels[2])
MOVWQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v1)
JMP(LabelRef(after))
Label(labels[1])
MOVBQZX(Mem{Base: ptr}, ch)
ADDQ(ch, v2)
Label(labels[0])
ROLQ(U8(32), v3)
XORQ(U32(0xff), v3)
Label(after)
SUBQ(v2, v1)
RORQ(U8(19), v0)
SUBQ(v0, v1)
RORQ(U8(53), v1)
XORQ(v1, v3)
SUBQ(v3, v0)
ROLQ(U8(43), v3)
ADDQ(v3, v0)
RORQ(U8(3), v0)
SUBQ(v0, v3)
RORQ(U8(43), v2)
SUBQ(v3, v2)
ROLQ(U8(55), v2)
XORQ(v0, v2)
SUBQ(v2, v1)
RORQ(U8(7), v3)
SUBQ(v2, v3)
RORQ(U8(31), v2)
ADDQ(v2, v3)
SUBQ(v1, v2)
RORQ(U8(39), v3)
XORQ(v3, v2)
RORQ(U8(17), v3)
XORQ(v2, v3)
ADDQ(v3, v1)
RORQ(U8(9), v1)
XORQ(v1, v2)
ROLQ(U8(24), v2)
XORQ(v2, v3)
RORQ(U8(59), v3)
RORQ(U8(1), v0)
SUBQ(v1, v0)
XORQ(v1, v0)
XORQ(v3, v2)
XORQ(v2, v0)
Store(v0, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/fork.sh 0000775 0000000 0000000 00000000710 14370657153 0024000 0 ustar 00root root 0000000 0000000 #!/bin/bash -ex
dl() {
url=$1
filename=$(basename $1)
{
echo "// Code generated by downloading from ${url}. DO NOT EDIT."
echo
curl -L ${url}
} > ${filename}
}
baseurl='https://github.com/dgryski/go-stadtx/raw/3c3d9b328c24a9b5ecd370654cd6e9d60a85752d'
dl ${baseurl}/stadtx.go
dl ${baseurl}/stadtx_test.go
dl 'https://raw.githubusercontent.com/demerphq/BeagleHash/5f8620b953230e5b16171b745155fc3b0ef8f75e/LICENSE'
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/gen.go 0000664 0000000 0000000 00000000111 14370657153 0023573 0 ustar 00root root 0000000 0000000 package stadtx
//go:generate go run asm.go -out stadtx.s -stubs stub.go
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/stadtx.go 0000664 0000000 0000000 00000002623 14370657153 0024343 0 ustar 00root root 0000000 0000000 // Code generated by downloading from https://github.com/dgryski/go-stadtx/raw/3c3d9b328c24a9b5ecd370654cd6e9d60a85752d/stadtx.go. DO NOT EDIT.
// Package stadtx implements Stadtx Hash
/*
https://github.com/demerphq/BeagleHash
*/
package stadtx
func rotl64(x uint64, r uint64) uint64 {
return (((x) << (r)) | ((x) >> (64 - r)))
}
func rotr64(x uint64, r uint64) uint64 {
return (((x) >> (r)) | ((x) << (64 - r)))
}
func scramble64(v, prime uint64) uint64 {
v ^= (v >> 13)
v ^= (v << 35)
v ^= (v >> 30)
v *= prime
v ^= (v >> 19)
v ^= (v << 15)
v ^= (v >> 46)
return v
}
func SeedState(seed []uint64) State {
var state State
state[0] = seed[0] ^ 0x43f6a8885a308d31
state[1] = seed[1] ^ 0x3198a2e03707344a
state[2] = seed[0] ^ 0x4093822299f31d00
state[3] = seed[1] ^ 0x82efa98ec4e6c894
if state[0] == 0 {
state[0] = 1
}
if state[1] == 0 {
state[1] = 2
}
if state[2] == 0 {
state[2] = 4
}
if state[3] == 0 {
state[3] = 8
}
state[0] = scramble64(state[0], 0x801178846e899d17)
state[0] = scramble64(state[0], 0xdd51e5d1c9a5a151)
state[1] = scramble64(state[1], 0x93a7d6c8c62e4835)
state[1] = scramble64(state[1], 0x803340f36895c2b5)
state[2] = scramble64(state[2], 0xbea9344eb7565eeb)
state[2] = scramble64(state[2], 0xcd95d1e509b995cd)
state[3] = scramble64(state[3], 0x9999791977e30c13)
state[3] = scramble64(state[3], 0xaab8b6b05abfc6cd)
return state
}
type State [4]uint64
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/stadtx.s 0000664 0000000 0000000 00000012464 14370657153 0024204 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out stadtx.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Hash(state *State, key []byte) uint64
TEXT ·Hash(SB), NOSPLIT, $0-40
MOVQ state+0(FP), AX
MOVQ key_base+8(FP), CX
MOVQ key_len+16(FP), DX
MOVQ (AX), BX
MOVQ 8(AX), SI
MOVQ DX, DI
ADDQ $0x00000001, DI
MOVQ $0xb89b0f8e1655514f, R8
IMULQ R8, DI
XORQ DI, BX
MOVQ DX, DI
ADDQ $0x00000002, DI
MOVQ $0x8c6f736011bd5127, R8
IMULQ R8, DI
XORQ DI, SI
CMPQ DX, $0x00000020
JGE coreLong
MOVQ DX, DI
SHRQ $0x03, DI
CMPQ DI, $0x00000000
JE shortCore0
CMPQ DI, $0x00000001
JE shortCore1
CMPQ DI, $0x00000002
JE shortCore2
CMPQ DI, $0x00000003
JE shortCore3
shortCore3:
MOVQ (CX), AX
MOVQ $0x9c1b8e1e9628323f, DI
IMULQ DI, AX
ADDQ AX, BX
RORQ $0x11, BX
XORQ SI, BX
RORQ $0x35, SI
ADDQ BX, SI
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
shortCore2:
MOVQ (CX), AX
MOVQ $0x9c1b8e1e9628323f, DI
IMULQ DI, AX
ADDQ AX, BX
RORQ $0x11, BX
XORQ SI, BX
RORQ $0x35, SI
ADDQ BX, SI
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
shortCore1:
MOVQ (CX), AX
MOVQ $0x9c1b8e1e9628323f, DI
IMULQ DI, AX
ADDQ AX, BX
RORQ $0x11, BX
XORQ SI, BX
RORQ $0x35, SI
ADDQ BX, SI
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
shortCore0:
CMPQ DX, $0x00000000
JE shortTail0
CMPQ DX, $0x00000001
JE shortTail1
CMPQ DX, $0x00000002
JE shortTail2
CMPQ DX, $0x00000003
JE shortTail3
CMPQ DX, $0x00000004
JE shortTail4
CMPQ DX, $0x00000005
JE shortTail5
CMPQ DX, $0x00000006
JE shortTail6
CMPQ DX, $0x00000007
JE shortTail7
shortTail7:
MOVBQZX 6(CX), DX
SHLQ $0x20, DX
ADDQ DX, BX
shortTail6:
MOVBQZX 5(CX), DX
SHLQ $0x30, DX
ADDQ DX, SI
shortTail5:
MOVBQZX 4(CX), DX
SHLQ $0x10, DX
ADDQ DX, BX
shortTail4:
MOVLQZX (CX), DX
ADDQ DX, SI
JMP shortAfter
shortTail3:
MOVBQZX 2(CX), DX
SHLQ $0x30, DX
ADDQ DX, BX
shortTail2:
MOVWQZX (CX), DX
ADDQ DX, SI
JMP shortAfter
shortTail1:
MOVBQZX (CX), DX
ADDQ DX, BX
shortTail0:
RORQ $0x20, SI
XORQ $0x000000ff, SI
shortAfter:
XORQ BX, SI
RORQ $0x21, BX
ADDQ SI, BX
ROLQ $0x11, SI
XORQ BX, SI
ROLQ $0x2b, BX
ADDQ SI, BX
ROLQ $0x1f, SI
SUBQ BX, SI
ROLQ $0x0d, BX
XORQ SI, BX
SUBQ BX, SI
ROLQ $0x29, BX
ADDQ SI, BX
ROLQ $0x25, SI
XORQ BX, SI
RORQ $0x27, BX
ADDQ SI, BX
RORQ $0x0f, SI
ADDQ BX, SI
ROLQ $0x0f, BX
XORQ SI, BX
RORQ $0x05, SI
XORQ SI, BX
MOVQ BX, ret+32(FP)
RET
coreLong:
MOVQ 16(AX), R8
MOVQ 24(AX), AX
MOVQ DX, DI
ADDQ $0x00000003, DI
MOVQ $0x8f29bd94edce7b39, R9
IMULQ R9, DI
XORQ DI, R8
MOVQ DX, DI
ADDQ $0x00000004, DI
MOVQ $0x9c1b8e1e9628323f, R9
IMULQ R9, DI
XORQ DI, AX
block:
MOVQ (CX), DI
MOVQ $0x00000000802910e3, R9
IMULQ R9, DI
ADDQ DI, BX
ROLQ $0x39, BX
XORQ AX, BX
MOVQ 8(CX), DI
MOVQ $0x00000000819b13af, R9
IMULQ R9, DI
ADDQ DI, SI
ROLQ $0x3f, SI
XORQ R8, SI
MOVQ 16(CX), DI
MOVQ $0x0000000091cb27e5, R9
IMULQ R9, DI
ADDQ DI, R8
RORQ $0x2f, R8
ADDQ BX, R8
MOVQ 24(CX), DI
MOVQ $0x00000000c1a269c1, R9
IMULQ R9, DI
ADDQ DI, AX
RORQ $0x0b, AX
SUBQ SI, AX
ADDQ $0x00000020, CX
SUBQ $0x00000020, DX
CMPQ DX, $0x00000020
JGE block
MOVQ DX, R9
MOVQ DX, DI
SHRQ $0x03, DI
CMPQ DI, $0x00000000
JE longCore0
CMPQ DI, $0x00000001
JE longCore1
CMPQ DI, $0x00000002
JE longCore2
CMPQ DI, $0x00000003
JE longCore3
longCore3:
MOVQ (CX), DI
MOVQ $0x00000000802910e3, R10
IMULQ R10, DI
ADDQ DI, BX
ROLQ $0x39, BX
XORQ AX, BX
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
longCore2:
MOVQ (CX), DI
MOVQ $0x00000000819b13af, R10
IMULQ R10, DI
ADDQ DI, SI
ROLQ $0x3f, SI
XORQ R8, SI
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
longCore1:
MOVQ (CX), DI
MOVQ $0x0000000091cb27e5, R10
IMULQ R10, DI
ADDQ DI, R8
RORQ $0x2f, R8
ADDQ BX, R8
ADDQ $0x00000008, CX
SUBQ $0x00000008, DX
longCore0:
RORQ $0x0b, AX
SUBQ SI, AX
ADDQ $0x00000001, R9
MOVQ $0x9c1b8e1e9628323f, DI
IMULQ DI, R9
XORQ R9, BX
CMPQ DX, $0x00000000
JE longTail0
CMPQ DX, $0x00000001
JE longTail1
CMPQ DX, $0x00000002
JE longTail2
CMPQ DX, $0x00000003
JE longTail3
CMPQ DX, $0x00000004
JE longTail4
CMPQ DX, $0x00000005
JE longTail5
CMPQ DX, $0x00000006
JE longTail6
CMPQ DX, $0x00000007
JE longTail7
longTail7:
MOVBQZX 6(CX), DX
ADDQ DX, SI
longTail6:
MOVWQZX 4(CX), DX
ADDQ DX, R8
MOVLQZX (CX), DX
ADDQ DX, AX
JMP longAfter
longTail5:
MOVBQZX 4(CX), DX
ADDQ DX, SI
longTail4:
MOVLQZX (CX), DX
ADDQ DX, R8
JMP longAfter
longTail3:
MOVBQZX 2(CX), DX
ADDQ DX, AX
longTail2:
MOVWQZX (CX), DX
ADDQ DX, SI
JMP longAfter
longTail1:
MOVBQZX (CX), DX
ADDQ DX, R8
longTail0:
ROLQ $0x20, AX
XORQ $0x000000ff, AX
longAfter:
SUBQ R8, SI
RORQ $0x13, BX
SUBQ BX, SI
RORQ $0x35, SI
XORQ SI, AX
SUBQ AX, BX
ROLQ $0x2b, AX
ADDQ AX, BX
RORQ $0x03, BX
SUBQ BX, AX
RORQ $0x2b, R8
SUBQ AX, R8
ROLQ $0x37, R8
XORQ BX, R8
SUBQ R8, SI
RORQ $0x07, AX
SUBQ R8, AX
RORQ $0x1f, R8
ADDQ R8, AX
SUBQ SI, R8
RORQ $0x27, AX
XORQ AX, R8
RORQ $0x11, AX
XORQ R8, AX
ADDQ AX, SI
RORQ $0x09, SI
XORQ SI, R8
ROLQ $0x18, R8
XORQ R8, AX
RORQ $0x3b, AX
RORQ $0x01, BX
SUBQ SI, BX
XORQ SI, BX
XORQ AX, R8
XORQ R8, BX
MOVQ BX, ret+32(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/stadtx_test.go 0000664 0000000 0000000 00000006757 14370657153 0025416 0 ustar 00root root 0000000 0000000 // Code generated by downloading from https://github.com/dgryski/go-stadtx/raw/3c3d9b328c24a9b5ecd370654cd6e9d60a85752d/stadtx_test.go. DO NOT EDIT.
package stadtx
import (
"testing"
)
/*
#include "stadtx_hash.h"
#include
int main()
{
U64 v;
U64 seed_ch[2] = { 0x0001020304050607ULL, 0x08090A0b0C0D0E0F };
U8 data[128];
int i;
printf("var tests = []uint64{\n");
for (i = 0; i < 128; i++) {
data[i] = i;
v = stadtx_hash((const U8 *) seed_ch, data, i);
printf("0x%016lx,", v);
if ((i+1) % 8 == 0) {
printf("\n");
}
}
printf("}\n");
}
*/
func TestHash(t *testing.T) {
var tests = []uint64{
0x0db6608af30c8cc1, 0xe3ffb1e1a2273589, 0xc34df40f05c3d43a, 0xf79284a93cd817cf, 0x178aed7315bcd4b9, 0x48a29a42948da116, 0xa78613b72330a064, 0xa23cd23f7b6eaef7,
0x7e4c118aca1d7886, 0x37059645f8797936, 0xcb7197e3253670cb, 0x5dadeebe5a5bc19f, 0x537057981e3f75ad, 0x41d57f7870fbcbf8, 0x7fc3cd6b1bb018c2, 0xbf98dbc2a88c5050,
0x4a3b3c5468927570, 0xeb6370986f0a28b4, 0x391b356f563a07a2, 0xdb64e2d15432f18f, 0xc8b1bb6c1c375241, 0xf7f86b2d54859f88, 0x862d58654d669d36, 0x77ffae02015534af,
0x8f992c4b37053081, 0x7739d76bb99573e8, 0x91115ce66437eeb0, 0x4fe15afafcdb97cb, 0x1f9b53a41ef68d60, 0x87a23023439dbeac, 0xa91d254b6e408270, 0x92d296f71bd786de,
0xe08da31cfd5179ca, 0xcc43972f2a93adcb, 0x33b0b5a0aaaa5eea, 0x572ceb8cbdbab15c, 0xefe041ad84a2e8d4, 0xcc196969c505dace, 0xcdf7e4d013499719, 0xfac29209a057fda0,
0x77fd1bf64ee30cf2, 0x0f366d248913d0d0, 0x2821028cc5505b41, 0xa571d04d77ef675e, 0xb795018736480554, 0x0d0ff98c4b3f5f4c, 0x8513745208da7fd2, 0xa564e25dff77eb13,
0x4375b88d3d7939b6, 0xa90a25148887f828, 0x60616c6d42f7c235, 0xc4fe22c82a03ff4f, 0x4f5a34c6dbf5b521, 0x2681b8c0acfd9b9f, 0xd9d18ed48f9ed27a, 0x420f9d6d60ef38df,
0x4a4b79af1f66d7c8, 0xc4e9504dd72ef0cb, 0x99573e84016395f8, 0x1c3121e8c827dbcb, 0x9d24802464cc1872, 0xf8f6a1ce9fcacd83, 0x3253bd62273249db, 0x5f7f8f09fb38d49d,
0x4d8687dd8d08cab1, 0x620daae84bfddb5b, 0x75a617b617f9f0a1, 0xd4da1af4f12745e0, 0x6b36894b4d819ed4, 0xaf630af151c8e494, 0xab5f39b817c3694d, 0x95d9d3368bb48ba1,
0x255334a30d6340bb, 0x8fac630af7ca8789, 0xb5ed6726f8453ddc, 0x46901504ec0983d2, 0x28b2ce6c3ca0c1ea, 0x1dd3519df8229928, 0x26e3a6a8c6358f66, 0x6158403905bed2ea,
0x4305ff8110eae857, 0x242b67463b95498c, 0x068a9ca66b87878f, 0x7ae1ecb47838c849, 0x11008d3f1dcaf002, 0x0913b479903c3ef3, 0x9e94d283f9ac4e75, 0xb0abae509c13b987,
0x66a4f4534050428b, 0x84b82a6f343a8fcd, 0xa9c418edf1f127e5, 0x2b990abfcedb6724, 0x6b47931cb943f52f, 0x4c04efa93ea2e780, 0xf21e88b212e8c44b, 0x086f4fe25e8a9eda,
0x707bc1c224794651, 0x88d1a9194b06112f, 0x09935bcf7618afad, 0x750fe3517d46e8f5, 0xeac04dfd871b8393, 0x0861101436a7d359, 0x1e971720b0c00991, 0x8f7eb2608c40a30c,
0xb2e142a7da8288e9, 0x320949b842c373dc, 0xa2edee4716e95cbc, 0x1fd86a7a946d7e01, 0xd4b9d24e8936b228, 0x5ab2d7cab3834f7a, 0x9ae42d7a8b241d00, 0xf9dc368e8df9bb11,
0x3e538bcf908bc657, 0x1f621c025155d15a, 0x2878d0e561531226, 0x9fb44daf75b7698e, 0xf19125829320cd64, 0x72965e1625d10cb9, 0x493679ecc71d278c, 0x563ef209b56abc24,
0xb6d39808be0528cd, 0xdb1d268d396264ee, 0xd68ce668d90aeed7, 0x1fcb217fa263821f, 0x9015c4b806730fd9, 0xf870f30533d0109d, 0x1688ab70df2abf39, 0x3a891995e76992bd,
}
seed := []uint64{0x0001020304050607, 0x08090A0B0C0D0E0F}
state := SeedState(seed)
input := make([]byte, 128)
for i := range input {
input[i] = byte(i)
if h := Hash(&state, input[:i]); h != tests[i] {
t.Errorf("Hash(..., input[:%d])=%016x, want %016x\n", i, h, tests[i])
}
}
}
golang-github-mmcloughlin-avo-0.5.0/examples/stadtx/stub.go 0000664 0000000 0000000 00000000265 14370657153 0024011 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out stadtx.s -stubs stub.go. DO NOT EDIT.
package stadtx
// Hash computes the Stadtx hash.
func Hash(state *State, key []byte) uint64
golang-github-mmcloughlin-avo-0.5.0/examples/sum/ 0000775 0000000 0000000 00000000000 14370657153 0021777 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/examples/sum/README.md 0000664 0000000 0000000 00000001334 14370657153 0023257 0 ustar 00root root 0000000 0000000 # sum
Sum a slice of `uint64`s.
[embedmd]:# (asm.go go /func main/ /^}/)
```go
func main() {
TEXT("Sum", NOSPLIT, "func(xs []uint64) uint64")
Doc("Sum returns the sum of the elements in xs.")
ptr := Load(Param("xs").Base(), GP64())
n := Load(Param("xs").Len(), GP64())
Comment("Initialize sum register to zero.")
s := GP64()
XORQ(s, s)
Label("loop")
Comment("Loop until zero bytes remain.")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
Comment("Load from pointer and add to running sum.")
ADDQ(Mem{Base: ptr}, s)
Comment("Advance pointer, decrement byte count.")
ADDQ(Imm(8), ptr)
DECQ(n)
JMP(LabelRef("loop"))
Label("done")
Comment("Store sum to return value.")
Store(s, ReturnIndex(0))
RET()
Generate()
}
```
golang-github-mmcloughlin-avo-0.5.0/examples/sum/asm.go 0000664 0000000 0000000 00000001423 14370657153 0023106 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Sum", NOSPLIT, "func(xs []uint64) uint64")
Doc("Sum returns the sum of the elements in xs.")
ptr := Load(Param("xs").Base(), GP64())
n := Load(Param("xs").Len(), GP64())
Comment("Initialize sum register to zero.")
s := GP64()
XORQ(s, s)
Label("loop")
Comment("Loop until zero bytes remain.")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
Comment("Load from pointer and add to running sum.")
ADDQ(Mem{Base: ptr}, s)
Comment("Advance pointer, decrement byte count.")
ADDQ(Imm(8), ptr)
DECQ(n)
JMP(LabelRef("loop"))
Label("done")
Comment("Store sum to return value.")
Store(s, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/examples/sum/doc.go 0000664 0000000 0000000 00000000060 14370657153 0023067 0 ustar 00root root 0000000 0000000 // Package sum sums a slice in avo.
package sum
golang-github-mmcloughlin-avo-0.5.0/examples/sum/stub.go 0000664 0000000 0000000 00000000255 14370657153 0023305 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out sum.s -stubs stub.go. DO NOT EDIT.
package sum
// Sum returns the sum of the elements in xs.
func Sum(xs []uint64) uint64
golang-github-mmcloughlin-avo-0.5.0/examples/sum/sum.s 0000664 0000000 0000000 00000001037 14370657153 0022770 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out sum.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Sum(xs []uint64) uint64
TEXT ·Sum(SB), NOSPLIT, $0-32
MOVQ xs_base+0(FP), AX
MOVQ xs_len+8(FP), CX
// Initialize sum register to zero.
XORQ DX, DX
loop:
// Loop until zero bytes remain.
CMPQ CX, $0x00
JE done
// Load from pointer and add to running sum.
ADDQ (AX), DX
// Advance pointer, decrement byte count.
ADDQ $0x08, AX
DECQ CX
JMP loop
done:
// Store sum to return value.
MOVQ DX, ret+24(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/examples/sum/sum_test.go 0000664 0000000 0000000 00000000503 14370657153 0024167 0 ustar 00root root 0000000 0000000 package sum
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out sum.s -stubs stub.go
func TestSum(t *testing.T) {
expect := func(xs []uint64) uint64 {
var s uint64
for _, x := range xs {
s += x
}
return s
}
if err := quick.CheckEqual(Sum, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/go.mod 0000664 0000000 0000000 00000000206 14370657153 0020461 0 ustar 00root root 0000000 0000000 module github.com/mmcloughlin/avo
go 1.16
require (
golang.org/x/arch v0.1.0
golang.org/x/sys v0.1.0
golang.org/x/tools v0.2.0
)
golang-github-mmcloughlin-avo-0.5.0/go.sum 0000664 0000000 0000000 00000006444 14370657153 0020520 0 ustar 00root root 0000000 0000000 github.com/yuin/goldmark v1.4.13/go.mod h1:6yULJ656Px+3vBD8DxQVa3kxgyrAnzto9xy5taEt/CY=
golang.org/x/arch v0.1.0 h1:oMxhUYsO9VsR1dcoVUjJjIGhx1LXol3989T/yZ59Xsw=
golang.org/x/arch v0.1.0/go.mod h1:5om86z9Hs0C8fWVUuoMHwpExlXzs5Tkyp9hOrfG7pp8=
golang.org/x/crypto v0.0.0-20190308221718-c2843e01d9a2/go.mod h1:djNgcEr1/C05ACkg1iLfiJU5Ep61QUkGW8qpdssI0+w=
golang.org/x/crypto v0.0.0-20210921155107-089bfa567519/go.mod h1:GvvjBRRGRdwPK5ydBHafDWAxML/pGHZbMvKqRZ5+Abc=
golang.org/x/crypto v0.1.0/go.mod h1:RecgLatLF4+eUMCP1PoPZQb+cVrJcOPbHkTkbkB9sbw=
golang.org/x/mod v0.6.0-dev.0.20220419223038-86c51ed26bb4/go.mod h1:jJ57K6gSWd91VN4djpZkiMVwK6gcyfeH4XE8wZrZaV4=
golang.org/x/mod v0.6.0 h1:b9gGHsz9/HhJ3HF5DHQytPpuwocVTChQJK3AvoLRD5I=
golang.org/x/mod v0.6.0/go.mod h1:4mET923SAdbXp2ki8ey+zGs1SLqsuM2Y0uvdZR/fUNI=
golang.org/x/net v0.0.0-20190620200207-3b0461eec859/go.mod h1:z5CRVTTTmAJ677TzLLGU+0bjPO0LkuOLi4/5GtJWs/s=
golang.org/x/net v0.0.0-20210226172049-e18ecbb05110/go.mod h1:m0MpNAwzfU5UDzcl9v0D8zg8gWTRqZa9RBIspLL5mdg=
golang.org/x/net v0.0.0-20220722155237-a158d28d115b/go.mod h1:XRhObCWvk6IyKnWLug+ECip1KBveYUHfp+8e9klMJ9c=
golang.org/x/net v0.1.0/go.mod h1:Cx3nUiGt4eDBEyega/BKRp+/AlGL8hYe7U9odMt2Cco=
golang.org/x/sync v0.0.0-20190423024810-112230192c58/go.mod h1:RxMgew5VJxzue5/jJTE5uejpjVlOe/izrB70Jof72aM=
golang.org/x/sync v0.0.0-20220722155255-886fb9371eb4/go.mod h1:RxMgew5VJxzue5/jJTE5uejpjVlOe/izrB70Jof72aM=
golang.org/x/sys v0.0.0-20190215142949-d0b11bdaac8a/go.mod h1:STP8DvDyc/dI5b8T5hshtkjS+E42TnysNCUPdjciGhY=
golang.org/x/sys v0.0.0-20201119102817-f84b799fce68/go.mod h1:h1NjWce9XRLGQEsW7wpKNCjG9DtNlClVuFLEZdDNbEs=
golang.org/x/sys v0.0.0-20210615035016-665e8c7367d1/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg=
golang.org/x/sys v0.0.0-20220520151302-bc2c85ada10a/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg=
golang.org/x/sys v0.0.0-20220722155257-8c9f86f7a55f/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg=
golang.org/x/sys v0.1.0 h1:kunALQeHf1/185U1i0GOB/fy1IPRDDpuoOOqRReG57U=
golang.org/x/sys v0.1.0/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg=
golang.org/x/term v0.0.0-20201126162022-7de9c90e9dd1/go.mod h1:bj7SfCRtBDWHUb9snDiAeCFNEtKQo2Wmx5Cou7ajbmo=
golang.org/x/term v0.0.0-20210927222741-03fcf44c2211/go.mod h1:jbD1KX2456YbFQfuXm/mYQcufACuNUgVhRMnK/tPxf8=
golang.org/x/term v0.1.0/go.mod h1:jbD1KX2456YbFQfuXm/mYQcufACuNUgVhRMnK/tPxf8=
golang.org/x/text v0.3.0/go.mod h1:NqM8EUOU14njkJ3fqMW+pc6Ldnwhi/IjpwHt7yyuwOQ=
golang.org/x/text v0.3.3/go.mod h1:5Zoc/QRtKVWzQhOtBMvqHzDpF6irO9z98xDceosuGiQ=
golang.org/x/text v0.3.7/go.mod h1:u+2+/6zg+i71rQMx5EYifcz6MCKuco9NR6JIITiCfzQ=
golang.org/x/text v0.4.0/go.mod h1:mrYo+phRRbMaCq/xk9113O4dZlRixOauAjOtrjsXDZ8=
golang.org/x/tools v0.0.0-20180917221912-90fa682c2a6e/go.mod h1:n7NCudcB/nEzxVGmLbDWY5pfWTLqBcC2KZ6jyYvM4mQ=
golang.org/x/tools v0.0.0-20191119224855-298f0cb1881e/go.mod h1:b+2E5dAYhXwXZwtnZ6UAqBI28+e2cm9otk0dWdXHAEo=
golang.org/x/tools v0.1.12/go.mod h1:hNGJHUnrk76NpqgfD5Aqm5Crs+Hm0VOH/i9J2+nxYbc=
golang.org/x/tools v0.2.0 h1:G6AHpWxTMGY1KyEYoAQ5WTtIekUUvDNjan3ugu60JvE=
golang.org/x/tools v0.2.0/go.mod h1:y4OqIKeOV/fWJetJ8bXPU1sEVniLMIyDAZWeHdV+NTA=
golang.org/x/xerrors v0.0.0-20190717185122-a985d3407aa7/go.mod h1:I/5z698sn9Ka8TeJc9MKroUUfqBBauWjQqLJ2OPfmY0=
rsc.io/pdf v0.1.1/go.mod h1:n8OzWcQ6Sp37PL01nO98y4iUCRdTGarVfzxY20ICaU4=
golang-github-mmcloughlin-avo-0.5.0/gotypes/ 0000775 0000000 0000000 00000000000 14370657153 0021047 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/gotypes/components.go 0000664 0000000 0000000 00000017200 14370657153 0023563 0 ustar 00root root 0000000 0000000 package gotypes
import (
"errors"
"fmt"
"go/token"
"go/types"
"strconv"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
// Sizes provides type sizes used by the standard Go compiler on amd64.
var Sizes = types.SizesFor("gc", "amd64")
// PointerSize is the size of a pointer on amd64.
var PointerSize = Sizes.Sizeof(types.Typ[types.UnsafePointer])
// Basic represents a primitive/basic type at a given memory address.
type Basic struct {
Addr operand.Mem
Type *types.Basic
}
// Component provides access to sub-components of a Go type.
type Component interface {
// When the component has no further sub-components, Resolve will return a
// reference to the components type and memory address. If there was an error
// during any previous calls to Component methods, they will be returned at
// resolution time.
Resolve() (*Basic, error)
Dereference(r reg.Register) Component // dereference a pointer
Base() Component // base pointer of a string or slice
Len() Component // length of a string or slice
Cap() Component // capacity of a slice
Real() Component // real part of a complex value
Imag() Component // imaginary part of a complex value
Index(int) Component // index into an array
Field(string) Component // access a struct field
}
// componenterr is an error that also provides a null implementation of the
// Component interface. This enables us to return an error from Component
// methods whilst also allowing method chaining to continue.
type componenterr string
func errorf(format string, args ...interface{}) Component {
return componenterr(fmt.Sprintf(format, args...))
}
func (c componenterr) Error() string { return string(c) }
func (c componenterr) Resolve() (*Basic, error) { return nil, c }
func (c componenterr) Dereference(r reg.Register) Component { return c }
func (c componenterr) Base() Component { return c }
func (c componenterr) Len() Component { return c }
func (c componenterr) Cap() Component { return c }
func (c componenterr) Real() Component { return c }
func (c componenterr) Imag() Component { return c }
func (c componenterr) Index(int) Component { return c }
func (c componenterr) Field(string) Component { return c }
type component struct {
typ types.Type
addr operand.Mem
}
// NewComponent builds a component for the named type at the given address.
func NewComponent(t types.Type, addr operand.Mem) Component {
return &component{
typ: t,
addr: addr,
}
}
func (c *component) Resolve() (*Basic, error) {
b := toprimitive(c.typ)
if b == nil {
return nil, errors.New("component is not primitive")
}
return &Basic{
Addr: c.addr,
Type: b,
}, nil
}
func (c *component) Dereference(r reg.Register) Component {
p, ok := c.typ.Underlying().(*types.Pointer)
if !ok {
return errorf("not pointer type")
}
return NewComponent(p.Elem(), operand.Mem{Base: r})
}
// Reference: https://github.com/golang/go/blob/50bd1c4d4eb4fac8ddeb5f063c099daccfb71b26/src/reflect/value.go#L1800-L1804
//
// type SliceHeader struct {
// Data uintptr
// Len int
// Cap int
// }
var slicehdroffsets = Sizes.Offsetsof([]*types.Var{
types.NewField(token.NoPos, nil, "Data", types.Typ[types.Uintptr], false),
types.NewField(token.NoPos, nil, "Len", types.Typ[types.Int], false),
types.NewField(token.NoPos, nil, "Cap", types.Typ[types.Int], false),
})
func (c *component) Base() Component {
if !isslice(c.typ) && !isstring(c.typ) {
return errorf("only slices and strings have base pointers")
}
return c.sub("_base", int(slicehdroffsets[0]), types.Typ[types.Uintptr])
}
func (c *component) Len() Component {
if !isslice(c.typ) && !isstring(c.typ) {
return errorf("only slices and strings have length fields")
}
return c.sub("_len", int(slicehdroffsets[1]), types.Typ[types.Int])
}
func (c *component) Cap() Component {
if !isslice(c.typ) {
return errorf("only slices have capacity fields")
}
return c.sub("_cap", int(slicehdroffsets[2]), types.Typ[types.Int])
}
func (c *component) Real() Component {
if !iscomplex(c.typ) {
return errorf("only complex types have real values")
}
f := complextofloat(c.typ)
return c.sub("_real", 0, f)
}
func (c *component) Imag() Component {
if !iscomplex(c.typ) {
return errorf("only complex types have imaginary values")
}
f := complextofloat(c.typ)
return c.sub("_imag", int(Sizes.Sizeof(f)), f)
}
func (c *component) Index(i int) Component {
a, ok := c.typ.Underlying().(*types.Array)
if !ok {
return errorf("not array type")
}
if int64(i) >= a.Len() {
return errorf("array index out of bounds")
}
// Reference: https://github.com/golang/tools/blob/bcd4e47d02889ebbc25c9f4bf3d27e4124b0bf9d/go/analysis/passes/asmdecl/asmdecl.go#L482-L494
//
// case asmArray:
// tu := t.Underlying().(*types.Array)
// elem := tu.Elem()
// // Calculate offset of each element array.
// fields := []*types.Var{
// types.NewVar(token.NoPos, nil, "fake0", elem),
// types.NewVar(token.NoPos, nil, "fake1", elem),
// }
// offsets := arch.sizes.Offsetsof(fields)
// elemoff := int(offsets[1])
// for i := 0; i < int(tu.Len()); i++ {
// cc = appendComponentsRecursive(arch, elem, cc, suffix+"_"+strconv.Itoa(i), i*elemoff)
// }
//
elem := a.Elem()
elemsize := int(Sizes.Sizeof(types.NewArray(elem, 2)) - Sizes.Sizeof(types.NewArray(elem, 1)))
return c.sub("_"+strconv.Itoa(i), i*elemsize, elem)
}
func (c *component) Field(n string) Component {
s, ok := c.typ.Underlying().(*types.Struct)
if !ok {
return errorf("not struct type")
}
// Reference: https://github.com/golang/tools/blob/13ba8ad772dfbf0f451b5dd0679e9c5605afc05d/go/analysis/passes/asmdecl/asmdecl.go#L471-L480
//
// case asmStruct:
// tu := t.Underlying().(*types.Struct)
// fields := make([]*types.Var, tu.NumFields())
// for i := 0; i < tu.NumFields(); i++ {
// fields[i] = tu.Field(i)
// }
// offsets := arch.sizes.Offsetsof(fields)
// for i, f := range fields {
// cc = appendComponentsRecursive(arch, f.Type(), cc, suffix+"_"+f.Name(), off+int(offsets[i]))
// }
//
fields := make([]*types.Var, s.NumFields())
for i := 0; i < s.NumFields(); i++ {
fields[i] = s.Field(i)
}
offsets := Sizes.Offsetsof(fields)
for i, f := range fields {
if f.Name() == n {
return c.sub("_"+n, int(offsets[i]), f.Type())
}
}
return errorf("struct does not have field '%s'", n)
}
func (c *component) sub(suffix string, offset int, t types.Type) *component {
s := *c
if s.addr.Symbol.Name != "" {
s.addr.Symbol.Name += suffix
}
s.addr = s.addr.Offset(offset)
s.typ = t
return &s
}
func isslice(t types.Type) bool {
_, ok := t.Underlying().(*types.Slice)
return ok
}
func isstring(t types.Type) bool {
b, ok := t.Underlying().(*types.Basic)
return ok && b.Kind() == types.String
}
func iscomplex(t types.Type) bool {
b, ok := t.Underlying().(*types.Basic)
return ok && (b.Info()&types.IsComplex) != 0
}
func complextofloat(t types.Type) types.Type {
switch Sizes.Sizeof(t) {
case 16:
return types.Typ[types.Float64]
case 8:
return types.Typ[types.Float32]
}
panic("bad")
}
// toprimitive determines whether t is primitive (cannot be reduced into
// components). If it is, it returns the basic type for t, otherwise returns
// nil.
func toprimitive(t types.Type) *types.Basic {
switch b := t.(type) {
case *types.Basic:
if (b.Info() & (types.IsString | types.IsComplex)) == 0 {
return b
}
case *types.Pointer:
return types.Typ[types.Uintptr]
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/gotypes/components_test.go 0000664 0000000 0000000 00000012440 14370657153 0024623 0 ustar 00root root 0000000 0000000 package gotypes
import (
"errors"
"go/token"
"go/types"
"strings"
"testing"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
func TestBasicKindsArePrimitive(t *testing.T) {
kinds := []types.BasicKind{
types.Bool,
types.Int,
types.Int8,
types.Int16,
types.Int32,
types.Int64,
types.Uint,
types.Uint8,
types.Uint16,
types.Uint32,
types.Uint64,
types.Uintptr,
types.Float32,
types.Float64,
}
for _, k := range kinds {
AssertPrimitive(t, types.Typ[k])
}
}
func TestPointersArePrimitive(t *testing.T) {
typ := types.NewPointer(types.Typ[types.Uint32])
AssertPrimitive(t, typ)
}
func AssertPrimitive(t *testing.T, typ types.Type) {
t.Helper()
c := NewComponent(typ, operand.NewParamAddr("primitive", 0))
if _, err := c.Resolve(); err != nil {
t.Errorf("expected type %s to be primitive: got error '%s'", typ, err)
}
}
func TestComponentErrors(t *testing.T) {
comp := NewComponent(types.Typ[types.Uint32], operand.Mem{})
cases := []struct {
Component Component
ErrorSubstring string
}{
{comp.Base(), "only slices and strings"},
{comp.Len(), "only slices and strings"},
{comp.Cap(), "only slices have"},
{comp.Real(), "only complex"},
{comp.Imag(), "only complex"},
{comp.Index(42), "not array type"},
{comp.Field("a"), "not struct type"},
{comp.Dereference(reg.R12), "not pointer type"},
}
for _, c := range cases {
_, err := c.Component.Resolve()
if err == nil {
t.Fatal("expected error")
}
if !strings.Contains(err.Error(), c.ErrorSubstring) {
t.Fatalf("error message %q; expected substring %q", err.Error(), c.ErrorSubstring)
}
}
}
func TestComponentErrorChaining(t *testing.T) {
// Build a component with an error.
comp := NewComponent(types.Typ[types.Uint32], operand.Mem{}).Index(3)
_, expect := comp.Resolve()
if expect == nil {
t.Fatal("expected error")
}
// Confirm that the error is preserved through chaining operations.
cases := []Component{
comp.Dereference(reg.R13),
comp.Base(),
comp.Len(),
comp.Cap(),
comp.Real(),
comp.Imag(),
comp.Index(42),
comp.Field("field"),
}
for _, c := range cases {
_, err := c.Resolve()
if !errors.Is(err, expect) {
t.Fatal("chaining should preserve error")
}
}
}
func TestComponentDeconstruction(t *testing.T) {
cases := []struct {
Name string
Type types.Type
Chain func(Component) Component
Param string
Offset int
}{
{
Name: "slice_base",
Type: types.NewSlice(types.Typ[types.Uint64]),
Chain: func(c Component) Component { return c.Base() },
Param: "base",
Offset: 0,
},
{
Name: "slice_len",
Type: types.NewSlice(types.Typ[types.Uint64]),
Chain: func(c Component) Component { return c.Len() },
Param: "len",
Offset: 8,
},
{
Name: "slice_cap",
Type: types.NewSlice(types.Typ[types.Uint64]),
Chain: func(c Component) Component { return c.Cap() },
Param: "cap",
Offset: 16,
},
{
Name: "string_base",
Type: types.Typ[types.String],
Chain: func(c Component) Component { return c.Base() },
Param: "base",
Offset: 0,
},
{
Name: "slice_len",
Type: types.Typ[types.String],
Chain: func(c Component) Component { return c.Len() },
Param: "len",
Offset: 8,
},
{
Name: "complex64_real",
Type: types.Typ[types.Complex64],
Chain: func(c Component) Component { return c.Real() },
Param: "real",
Offset: 0,
},
{
Name: "complex64_imag",
Type: types.Typ[types.Complex64],
Chain: func(c Component) Component { return c.Imag() },
Param: "imag",
Offset: 4,
},
{
Name: "complex128_real",
Type: types.Typ[types.Complex128],
Chain: func(c Component) Component { return c.Real() },
Param: "real",
Offset: 0,
},
{
Name: "complex128_imag",
Type: types.Typ[types.Complex128],
Chain: func(c Component) Component { return c.Imag() },
Param: "imag",
Offset: 8,
},
{
Name: "array",
Type: types.NewArray(types.Typ[types.Uint32], 7),
Chain: func(c Component) Component { return c.Index(3) },
Param: "3",
Offset: 12,
},
{
Name: "struct",
Type: types.NewStruct([]*types.Var{
types.NewField(token.NoPos, nil, "Byte", types.Typ[types.Byte], false),
types.NewField(token.NoPos, nil, "Uint64", types.Typ[types.Uint64], false),
}, nil),
Chain: func(c Component) Component { return c.Field("Uint64") },
Param: "Uint64",
Offset: 8,
},
}
// For every test case, generate the same case but when the type is wrapped in
// a named type.
n := len(cases)
for i := 0; i < n; i++ {
wrapped := cases[i]
wrapped.Name += "_wrapped"
wrapped.Type = types.NewNamed(
types.NewTypeName(token.NoPos, nil, "wrapped", nil),
wrapped.Type,
nil,
)
cases = append(cases, wrapped)
}
for _, c := range cases {
c := c // avoid scopelint error
t.Run(c.Name, func(t *testing.T) {
t.Log(c.Type)
base := operand.NewParamAddr("test", 0)
comp := NewComponent(c.Type, base)
comp = c.Chain(comp)
b, err := comp.Resolve()
if err != nil {
t.Fatal(err)
}
expectname := "test_" + c.Param
if b.Addr.Symbol.Name != expectname {
t.Errorf("parameter name %q; expected %q", b.Addr.Symbol.Name, expectname)
}
if b.Addr.Disp != c.Offset {
t.Errorf("offset %d; expected %d", b.Addr.Disp, c.Offset)
}
})
}
}
golang-github-mmcloughlin-avo-0.5.0/gotypes/doc.go 0000664 0000000 0000000 00000000150 14370657153 0022137 0 ustar 00root root 0000000 0000000 // Package gotypes provides helpers for interacting with Go types within avo functions.
package gotypes
golang-github-mmcloughlin-avo-0.5.0/gotypes/examples_test.go 0000664 0000000 0000000 00000000410 14370657153 0024246 0 ustar 00root root 0000000 0000000 package gotypes_test
import (
"fmt"
"github.com/mmcloughlin/avo/gotypes"
)
func ExampleParseSignature() {
s, err := gotypes.ParseSignature("func(s string, n int) string")
fmt.Println(s)
fmt.Println(err)
// Output:
// (s string, n int) string
//
}
golang-github-mmcloughlin-avo-0.5.0/gotypes/signature.go 0000664 0000000 0000000 00000012303 14370657153 0023376 0 ustar 00root root 0000000 0000000 package gotypes
import (
"bytes"
"errors"
"fmt"
"go/token"
"go/types"
"strconv"
"github.com/mmcloughlin/avo/operand"
)
// Signature represents a Go function signature.
type Signature struct {
pkg *types.Package
sig *types.Signature
params *Tuple
results *Tuple
}
// NewSignature constructs a Signature.
func NewSignature(pkg *types.Package, sig *types.Signature) *Signature {
s := &Signature{
pkg: pkg,
sig: sig,
}
s.init()
return s
}
// NewSignatureVoid builds the void signature "func()".
func NewSignatureVoid() *Signature {
return NewSignature(nil, types.NewSignature(nil, nil, nil, false))
}
// LookupSignature returns the signature of the named function in the provided package.
func LookupSignature(pkg *types.Package, name string) (*Signature, error) {
scope := pkg.Scope()
obj := scope.Lookup(name)
if obj == nil {
return nil, fmt.Errorf("could not find function \"%s\"", name)
}
s, ok := obj.Type().(*types.Signature)
if !ok {
return nil, fmt.Errorf("object \"%s\" does not have signature type", name)
}
return NewSignature(pkg, s), nil
}
// ParseSignature builds a Signature by parsing a Go function type expression.
// The function type must reference builtin types only; see
// ParseSignatureInPackage if custom types are required.
func ParseSignature(expr string) (*Signature, error) {
return ParseSignatureInPackage(nil, expr)
}
// ParseSignatureInPackage builds a Signature by parsing a Go function type
// expression. The expression may reference types in the provided package.
func ParseSignatureInPackage(pkg *types.Package, expr string) (*Signature, error) {
tv, err := types.Eval(token.NewFileSet(), pkg, token.NoPos, expr)
if err != nil {
return nil, err
}
if tv.Value != nil {
return nil, errors.New("signature expression should have nil value")
}
s, ok := tv.Type.(*types.Signature)
if !ok {
return nil, errors.New("provided type is not a function signature")
}
return NewSignature(pkg, s), nil
}
// Params returns the function signature argument types.
func (s *Signature) Params() *Tuple { return s.params }
// Results returns the function return types.
func (s *Signature) Results() *Tuple { return s.results }
// Bytes returns the total size of the function arguments and return values.
func (s *Signature) Bytes() int { return s.Params().Bytes() + s.Results().Bytes() }
// String writes Signature as a string. This does not include the "func" keyword.
func (s *Signature) String() string {
var buf bytes.Buffer
types.WriteSignature(&buf, s.sig, func(pkg *types.Package) string {
if pkg == s.pkg {
return ""
}
return pkg.Name()
})
return buf.String()
}
func (s *Signature) init() {
p := s.sig.Params()
r := s.sig.Results()
// Compute parameter offsets. Note that if the function has results,
// additional padding up to max align is inserted between parameters and
// results.
vs := tuplevars(p)
vs = append(vs, types.NewParam(token.NoPos, nil, "sentinel", types.Typ[types.Uint64]))
paramsoffsets := Sizes.Offsetsof(vs)
paramssize := paramsoffsets[p.Len()]
if r.Len() == 0 {
paramssize = structsize(vs[:p.Len()])
}
s.params = newTuple(p, paramsoffsets, paramssize, "arg")
// Result offsets.
vs = tuplevars(r)
resultsoffsets := Sizes.Offsetsof(vs)
resultssize := structsize(vs)
for i := range resultsoffsets {
resultsoffsets[i] += paramssize
}
s.results = newTuple(r, resultsoffsets, resultssize, "ret")
}
// Tuple represents a tuple of variables, such as function arguments or results.
type Tuple struct {
components []Component
byname map[string]Component
size int
}
func newTuple(t *types.Tuple, offsets []int64, size int64, defaultprefix string) *Tuple {
tuple := &Tuple{
byname: map[string]Component{},
size: int(size),
}
for i := 0; i < t.Len(); i++ {
v := t.At(i)
name := v.Name()
if name == "" {
name = defaultprefix
if i > 0 {
name += strconv.Itoa(i)
}
}
addr := operand.NewParamAddr(name, int(offsets[i]))
c := NewComponent(v.Type(), addr)
tuple.components = append(tuple.components, c)
if v.Name() != "" {
tuple.byname[v.Name()] = c
}
}
return tuple
}
// Lookup returns the variable with the given name.
func (t *Tuple) Lookup(name string) Component {
e := t.byname[name]
if e == nil {
return errorf("unknown variable \"%s\"", name)
}
return e
}
// At returns the variable at index i.
func (t *Tuple) At(i int) Component {
if i >= len(t.components) {
return errorf("index out of range")
}
return t.components[i]
}
// Bytes returns the size of the Tuple. This may include additional padding.
func (t *Tuple) Bytes() int { return t.size }
func tuplevars(t *types.Tuple) []*types.Var {
vs := make([]*types.Var, t.Len())
for i := 0; i < t.Len(); i++ {
vs[i] = t.At(i)
}
return vs
}
// structsize computes the size of a struct containing the given variables as
// fields. It would be equivalent to calculating the size of types.NewStruct(vs,
// nil), apart from the fact that NewStruct panics if multiple fields have the
// same name, and this happens for example if the variables represent return
// types from a function.
func structsize(vs []*types.Var) int64 {
n := len(vs)
if n == 0 {
return 0
}
offsets := Sizes.Offsetsof(vs)
return offsets[n-1] + Sizes.Sizeof(vs[n-1].Type())
}
golang-github-mmcloughlin-avo-0.5.0/gotypes/signature_test.go 0000664 0000000 0000000 00000010677 14370657153 0024451 0 ustar 00root root 0000000 0000000 package gotypes
import (
"go/token"
"go/types"
"strings"
"testing"
"golang.org/x/tools/go/packages"
)
func TestLookupSignature(t *testing.T) {
pkg := LoadPackageTypes(t, "math")
s, err := LookupSignature(pkg, "Frexp")
if err != nil {
t.Fatal(err)
}
expect, err := ParseSignature("func(f float64) (frac float64, exp int)")
if err != nil {
t.Fatal(err)
}
if s.String() != expect.String() {
t.Errorf("\n got: %s\nexpect: %s\n", s, expect)
}
}
func TestLookupSignatureErrors(t *testing.T) {
cases := []struct {
PackagePath string
FunctionName string
ExpectedError string
}{
{"runtime", "HmmIdk", "could not find function \"HmmIdk\""},
{"crypto", "Decrypter", "object \"Decrypter\" does not have signature type"},
{"encoding/base64", "StdEncoding", "object \"StdEncoding\" does not have signature type"},
}
for _, c := range cases {
pkg := LoadPackageTypes(t, c.PackagePath)
_, err := LookupSignature(pkg, c.FunctionName)
if err == nil {
t.Fatalf("expected error looking up '%s' in package '%s'", c.FunctionName, c.PackagePath)
}
if err.Error() != c.ExpectedError {
t.Fatalf("wrong error message\n got: %q\nexpect: %q", err.Error(), c.ExpectedError)
}
}
}
func LoadPackageTypes(t *testing.T, path string) *types.Package {
t.Helper()
cfg := &packages.Config{
Mode: packages.NeedTypes | packages.NeedDeps | packages.NeedImports,
}
pkgs, err := packages.Load(cfg, path)
if err != nil {
t.Fatal(err)
}
if len(pkgs) != 1 {
t.Fatal("expected to load exactly one package")
}
return pkgs[0].Types
}
func TestParseSignature(t *testing.T) {
cases := []struct {
Expr string
ExpectParams *types.Tuple
ExpectReturn *types.Tuple
}{
{
Expr: "func()",
},
{
Expr: "func(x, y uint64)",
ExpectParams: types.NewTuple(
types.NewParam(token.NoPos, nil, "x", types.Typ[types.Uint64]),
types.NewParam(token.NoPos, nil, "y", types.Typ[types.Uint64]),
),
},
{
Expr: "func(n int, s []string) byte",
ExpectParams: types.NewTuple(
types.NewParam(token.NoPos, nil, "n", types.Typ[types.Int]),
types.NewParam(token.NoPos, nil, "s", types.NewSlice(types.Typ[types.String])),
),
ExpectReturn: types.NewTuple(
types.NewParam(token.NoPos, nil, "", types.Typ[types.Byte]),
),
},
{
Expr: "func(x, y int) (x0, y0 int, s string)",
ExpectParams: types.NewTuple(
types.NewParam(token.NoPos, nil, "x", types.Typ[types.Int]),
types.NewParam(token.NoPos, nil, "y", types.Typ[types.Int]),
),
ExpectReturn: types.NewTuple(
types.NewParam(token.NoPos, nil, "x0", types.Typ[types.Int]),
types.NewParam(token.NoPos, nil, "y0", types.Typ[types.Int]),
types.NewParam(token.NoPos, nil, "s", types.Typ[types.String]),
),
},
}
for _, c := range cases {
s, err := ParseSignature(c.Expr)
if err != nil {
t.Fatal(err)
}
if !TypesTuplesEqual(s.sig.Params(), c.ExpectParams) {
t.Errorf("parameter mismatch\ngot %#v\nexpect %#v\n", s.sig.Params(), c.ExpectParams)
}
if !TypesTuplesEqual(s.sig.Results(), c.ExpectReturn) {
t.Errorf("return value(s) mismatch\ngot %#v\nexpect %#v\n", s.sig.Results(), c.ExpectReturn)
}
}
}
func TestParseSignatureErrors(t *testing.T) {
cases := []struct {
Expr string
ErrorContains string
}{
{"idkjklol", "undeclared name"},
{"struct{}", "not a function signature"},
{"uint32(0xfeedbeef)", "should have nil value"},
}
for _, c := range cases {
s, err := ParseSignature(c.Expr)
if s != nil || err == nil || !strings.Contains(err.Error(), c.ErrorContains) {
t.Errorf("expect error from expression %s\ngot: %s\nexpect substring: %s\n", c.Expr, err, c.ErrorContains)
}
}
}
func TypesTuplesEqual(a, b *types.Tuple) bool {
if a.Len() != b.Len() {
return false
}
n := a.Len()
for i := 0; i < n; i++ {
if !TypesVarsEqual(a.At(i), b.At(i)) {
return false
}
}
return true
}
func TypesVarsEqual(a, b *types.Var) bool {
return a.Name() == b.Name() && types.Identical(a.Type(), b.Type())
}
func TestSignatureSizes(t *testing.T) {
cases := []struct {
Expr string
ArgSize int
}{
{"func()", 0},
{"func(uint64) uint64", 16},
{"func([7]byte) byte", 9},
{"func(uint64, uint64) (uint64, uint64)", 32},
{"func(uint16)", 2}, // issue #191
{"func(*uint64, uint32)", 12}, // issue #195
}
for _, c := range cases {
s, err := ParseSignature(c.Expr)
if err != nil {
t.Fatal(err)
}
if s.Bytes() != c.ArgSize {
t.Errorf("%s: size %d expected %d", s, s.Bytes(), c.ArgSize)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/ 0000775 0000000 0000000 00000000000 14370657153 0021171 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/api/ 0000775 0000000 0000000 00000000000 14370657153 0021742 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/api/doc.go 0000664 0000000 0000000 00000000117 14370657153 0023035 0 ustar 00root root 0000000 0000000 // Package api determines the API of avo instruction constructors.
package api
golang-github-mmcloughlin-avo-0.5.0/internal/api/function.go 0000664 0000000 0000000 00000007602 14370657153 0024123 0 ustar 00root root 0000000 0000000 package api
import (
"bytes"
"fmt"
"sort"
"strconv"
"strings"
"text/tabwriter"
"github.com/mmcloughlin/avo/internal/inst"
)
// Function represents a function that constructs some collection of
// instruction forms.
type Function struct {
Instruction inst.Instruction
Suffixes inst.Suffixes
inst.Forms
}
// Name returns the function name.
func (f *Function) Name() string {
return f.opcodesuffix("_")
}
// Opcode returns the full Go opcode of the instruction built by this function. Includes any suffixes.
func (f *Function) Opcode() string {
return f.opcodesuffix(".")
}
func (f *Function) opcodesuffix(sep string) string {
n := f.Instruction.Opcode
for _, suffix := range f.Suffixes {
n += sep
n += suffix.String()
}
return n
}
// HasSuffix reports whether the function has the provided suffix.
func (f *Function) HasSuffix(suffix inst.Suffix) bool {
for _, s := range f.Suffixes {
if s == suffix {
return true
}
}
return false
}
// Summary returns a summary of the instruction this function constructs.
func (f *Function) Summary() string {
summary := f.Instruction.Summary
if len(f.Suffixes) > 0 {
summary += " (" + strings.Join(f.Suffixes.Summaries(), ", ") + ")"
}
return summary
}
// Doc returns the function document comment as a list of lines.
func (f *Function) Doc() []string {
lines := []string{
fmt.Sprintf("%s: %s.", f.Name(), f.Summary()),
"",
"Forms:",
"",
}
// Write a table of instruction forms.
buf := bytes.NewBuffer(nil)
w := tabwriter.NewWriter(buf, 0, 0, 1, ' ', 0)
for _, form := range f.Forms {
row := f.Opcode() + "\t" + strings.Join(form.Signature(), "\t") + "\n"
fmt.Fprint(w, row)
}
w.Flush()
tbl := strings.TrimSpace(buf.String())
for _, line := range strings.Split(tbl, "\n") {
lines = append(lines, "\t"+line)
}
return lines
}
// Signature of the function. Derived from the instruction forms generated by this function.
func (f *Function) Signature() Signature {
// Handle the case of forms with multiple arities.
switch {
case f.IsVariadic():
return variadic{name: "ops"}
case f.IsNiladic():
return niladic{}
}
// Generate nice-looking variable names.
n := f.Arity()
ops := make([]string, n)
count := map[string]int{}
for j := 0; j < n; j++ {
// Collect unique lowercase bytes from first characters of operand types.
s := map[byte]bool{}
for _, form := range f.Forms {
c := form.Operands[j].Type[0]
if 'a' <= c && c <= 'z' {
s[c] = true
}
}
// Operand name is the sorted bytes.
var b []byte
for c := range s {
b = append(b, c)
}
sort.Slice(b, func(i, j int) bool { return b[i] < b[j] })
name := string(b)
// Append a counter if we've seen it already.
m := count[name]
count[name]++
if m > 0 {
name += strconv.Itoa(m)
}
ops[j] = name
}
return argslist(ops)
}
// InstructionFunctions builds the list of all functions for a given
// instruction.
func InstructionFunctions(i inst.Instruction) []*Function {
// One function for each possible suffix combination.
bysuffix := map[string]*Function{}
for _, f := range i.Forms {
for _, suffixes := range f.SupportedSuffixes() {
k := suffixes.String()
if _, ok := bysuffix[k]; !ok {
bysuffix[k] = &Function{
Instruction: i,
Suffixes: suffixes,
}
}
bysuffix[k].Forms = append(bysuffix[k].Forms, f)
}
}
// Convert to a sorted slice.
var fns []*Function
for _, fn := range bysuffix {
fns = append(fns, fn)
}
SortFunctions(fns)
return fns
}
// InstructionsFunctions builds all functions for a list of instructions.
func InstructionsFunctions(is []inst.Instruction) []*Function {
var all []*Function
for _, i := range is {
fns := InstructionFunctions(i)
all = append(all, fns...)
}
SortFunctions(all)
return all
}
// SortFunctions sorts a list of functions by name.
func SortFunctions(fns []*Function) {
sort.Slice(fns, func(i, j int) bool {
return fns[i].Name() < fns[j].Name()
})
}
golang-github-mmcloughlin-avo-0.5.0/internal/api/function_test.go 0000664 0000000 0000000 00000002217 14370657153 0025157 0 ustar 00root root 0000000 0000000 package api
import (
"strings"
"testing"
"github.com/mmcloughlin/avo/internal/inst"
)
func TestFunctionsDuplicateFormSignatures(t *testing.T) {
// Test for duplicate form signatures within a given function. This could
// manifest as duplicate case statements in generated code.
fns := InstructionsFunctions(inst.Instructions)
for _, fn := range fns {
fn := fn // scopelint
t.Run(fn.Name(), func(t *testing.T) {
seen := map[string]bool{}
for _, f := range fn.Forms {
sig := strings.Join(f.Signature(), "_")
t.Log(sig)
if seen[sig] {
t.Fatalf("duplicate: %s", sig)
}
seen[sig] = true
}
})
}
}
func TestFunctionsUniqueArgNames(t *testing.T) {
fns := InstructionsFunctions(inst.Instructions)
for _, fn := range fns {
s := fn.Signature()
for _, n := range fn.Arities() {
if n == 0 {
continue
}
names := map[string]bool{}
for j := 0; j < n; j++ {
names[s.ParameterName(j)] = true
}
if len(names) != n {
t.Errorf("repeated argument for instruction %s", fn.Name())
}
if _, found := names[""]; found {
t.Errorf("empty argument name for instruction %s", fn.Name())
}
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/api/signature.go 0000664 0000000 0000000 00000003651 14370657153 0024277 0 ustar 00root root 0000000 0000000 package api
import (
"fmt"
"strconv"
"strings"
)
// Signature provides access to details about the signature of an instruction function.
type Signature interface {
ParameterList() string
Arguments() string
ParameterName(int) string
ParameterSlice() string
Length() string
}
// ArgsList builds a signature for a function with the named parameters.
func ArgsList(args []string) Signature {
return argslist(args)
}
type argslist []string
func (a argslist) ParameterList() string { return strings.Join(a, ", ") + " " + OperandType }
func (a argslist) Arguments() string { return strings.Join(a, ", ") }
func (a argslist) ParameterName(i int) string { return a[i] }
func (a argslist) ParameterSlice() string {
return fmt.Sprintf("[]%s{%s}", OperandType, strings.Join(a, ", "))
}
func (a argslist) Length() string { return strconv.Itoa(len(a)) }
// Variadic is the signature for a variadic function with the named argument slice.
func Variadic(name string) Signature {
return variadic{name: name}
}
type variadic struct {
name string
}
func (v variadic) ParameterList() string { return v.name + " ..." + OperandType }
func (v variadic) Arguments() string { return v.name + "..." }
func (v variadic) ParameterName(i int) string { return fmt.Sprintf("%s[%d]", v.name, i) }
func (v variadic) ParameterSlice() string { return v.name }
func (v variadic) Length() string { return fmt.Sprintf("len(%s)", v.name) }
// Niladic is the signature for a function with no arguments.
func Niladic() Signature {
return niladic{}
}
type niladic struct{}
func (n niladic) ParameterList() string { return "" }
func (n niladic) Arguments() string { return "" }
func (n niladic) ParameterName(i int) string { panic("niladic function has no parameters") }
func (n niladic) ParameterSlice() string { return fmt.Sprintf("[]%s{}", OperandType) }
func (n niladic) Length() string { return "0" }
golang-github-mmcloughlin-avo-0.5.0/internal/api/types.go 0000664 0000000 0000000 00000004225 14370657153 0023440 0 ustar 00root root 0000000 0000000 package api
import (
"path"
"sort"
"strings"
)
const (
// Package is the avo package import path.
Package = "github.com/mmcloughlin/avo"
// IRPackage is the package that defines intermediate representation types.
IRPackage = "ir"
// OperandPackage is the package for operand types.
OperandPackage = "operand"
// OperandType is the type used for operands.
OperandType = OperandPackage + ".Op"
// RegisterPackage is the name of the package containing register types.
RegisterPackage = "reg"
// RegisterType is the type used for registers.
RegisterType = RegisterPackage + ".Register"
)
// ImportPath returns the full import path for an avo subpackage.
func ImportPath(pkg string) string {
return path.Join(Package, pkg)
}
// ImplicitRegisterIdentifier maps an implicit register name to a string
// suitable for a related Go identifier.
func ImplicitRegisterIdentifier(r string) string {
r = strings.Replace(r, "mm", "", 1) // handles the "xmm0" type
return strings.ToUpper(r)
}
// ImplicitRegister returns avo syntax for the given implicit register type (from Opcodes XML).
func ImplicitRegister(r string) string {
return RegisterPackage + "." + ImplicitRegisterIdentifier(r)
}
// OperandTypeIdentifier maps an operand type to a string suitable for a related
// Go identifier.
func OperandTypeIdentifier(t string) string {
return strings.ToUpper(strings.ReplaceAll(t, "/", ""))
}
// CheckerName returns the name of the function that checks an operand of type t.
func CheckerName(t string) string {
return "operand.Is" + OperandTypeIdentifier(t)
}
// ISAsIdentifier returns a string representation of an ISA list that suitable
// for use in a Go identifier.
func ISAsIdentifier(isas []string) string {
if len(isas) == 0 {
return "Base"
}
sorted := append([]string(nil), isas...)
sort.Strings(sorted)
ident := strings.Join(sorted, "_")
ident = strings.ReplaceAll(ident, ".", "") // SSE4.1
ident = strings.ReplaceAll(ident, "+", "") // MMX+
return ident
}
// SuffixesClassIdentifier returns a string representation of a suffix class
// that's suitable for use in a Go identifier.
func SuffixesClassIdentifier(c string) string {
return strings.ToUpper(c)
}
golang-github-mmcloughlin-avo-0.5.0/internal/api/types_test.go 0000664 0000000 0000000 00000001075 14370657153 0024477 0 ustar 00root root 0000000 0000000 package api
import (
"go/token"
"testing"
"github.com/mmcloughlin/avo/internal/inst"
)
func TestISAsIdentifier(t *testing.T) {
for _, isas := range inst.ISACombinations(inst.Instructions) {
ident := ISAsIdentifier(isas)
if !token.IsIdentifier(ident) {
t.Errorf("expected %q to be an identifier", ident)
}
}
}
func TestSuffixesClassIdentifier(t *testing.T) {
for key := range inst.SuffixesClasses(inst.Instructions) {
ident := SuffixesClassIdentifier(key)
if !token.IsIdentifier(ident) {
t.Errorf("expected %q to be an identifier", ident)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/cmd/ 0000775 0000000 0000000 00000000000 14370657153 0021734 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/cmd/asmvet/ 0000775 0000000 0000000 00000000000 14370657153 0023233 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/cmd/asmvet/main.go 0000664 0000000 0000000 00000000566 14370657153 0024515 0 ustar 00root root 0000000 0000000 // Command asmvet checks for correctness of Go assembly.
//
// Standalone version of the assembly checks in go vet.
package main
import (
"golang.org/x/tools/go/analysis/passes/asmdecl"
"golang.org/x/tools/go/analysis/passes/framepointer"
"golang.org/x/tools/go/analysis/unitchecker"
)
func main() {
unitchecker.Main(
asmdecl.Analyzer,
framepointer.Analyzer,
)
}
golang-github-mmcloughlin-avo-0.5.0/internal/cmd/avogen/ 0000775 0000000 0000000 00000000000 14370657153 0023213 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/cmd/avogen/main.go 0000664 0000000 0000000 00000003715 14370657153 0024474 0 ustar 00root root 0000000 0000000 // Command avogen generates code based on the instruction database.
package main
import (
"flag"
"fmt"
"go/build"
"log"
"os"
"path/filepath"
"github.com/mmcloughlin/avo/internal/gen"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/load"
"github.com/mmcloughlin/avo/printer"
)
var generators = map[string]gen.Builder{
"asmtest": gen.NewAsmTest,
"godata": gen.NewGoData,
"godatatest": gen.NewGoDataTest,
"optab": gen.NewOptab,
"ctors": gen.NewCtors,
"ctorstest": gen.NewCtorsTest,
"ctorsstress": gen.NewCtorsStress,
"ctorsbench": gen.NewCtorsBench,
"build": gen.NewBuild,
"buildtest": gen.NewBuildTest,
"mov": gen.NewMOV,
}
// Command-line flags.
var (
bootstrap = flag.Bool("bootstrap", false, "regenerate instruction list from original data")
datadir = flag.String(
"data",
filepath.Join(build.Default.GOPATH, "src/github.com/mmcloughlin/avo/internal/data"),
"path to data directory",
)
output = flag.String("output", "", "path to output file (default stdout)")
)
func main() {
log.SetPrefix("avogen: ")
log.SetFlags(0)
flag.Parse()
if err := run(); err != nil {
log.Fatal(err)
}
}
func run() error {
// Build generator.
t := flag.Arg(0)
builder := generators[t]
if builder == nil {
return fmt.Errorf("unknown generator type '%s'", t)
}
g := builder(printer.NewArgvConfig())
// Determine output writer.
w := os.Stdout
if *output != "" {
f, err := os.Create(*output)
if err != nil {
return err
}
defer f.Close()
w = f
}
// Load instructions.
is := inst.Instructions
if *bootstrap {
log.Printf("bootstrap: loading instructions from data directory %s", *datadir)
l := load.NewLoaderFromDataDir(*datadir)
r, err := l.Load()
if err != nil {
return err
}
is = r
}
// Generate output.
b, generr := g.Generate(is)
// Write.
if _, err := w.Write(b); err != nil {
return err
}
if generr != nil {
return generr
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/internal/cmd/docgen/ 0000775 0000000 0000000 00000000000 14370657153 0023173 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/cmd/docgen/main.go 0000664 0000000 0000000 00000007701 14370657153 0024453 0 ustar 00root root 0000000 0000000 // Command docgen generates documentation from templates.
package main
import (
"bufio"
"bytes"
"embed"
"errors"
"flag"
"fmt"
"log"
"math"
"net/url"
"os"
"regexp"
"strconv"
"strings"
"text/template"
"github.com/mmcloughlin/avo/tests/thirdparty"
)
func main() {
log.SetPrefix("docgen: ")
log.SetFlags(0)
if err := mainerr(); err != nil {
log.Fatal(err)
}
}
var (
typ = flag.String("type", "", "documentation type")
tmpl = flag.String("tmpl", "", "explicit template file (overrides -type)")
output = flag.String("output", "", "path to output file (default stdout)")
suitefilename = flag.String("suite", "", "third-party test suite configuration")
)
func mainerr() (err error) {
flag.Parse()
// Initialize template.
t := template.New("doc")
t.Option("missingkey=error")
t.Funcs(template.FuncMap{
"include": include,
"snippet": snippet,
"avatar": avatar,
"stars": stars,
})
// Load template.
s, err := load()
if err != nil {
return err
}
if _, err := t.Parse(s); err != nil {
return err
}
// Load third-party projects.
if *suitefilename == "" {
return errors.New("missing test suite configuration")
}
suite, err := thirdparty.LoadSuiteFile(*suitefilename)
if err != nil {
return err
}
// Execute.
data := map[string]interface{}{
"Suite": suite,
}
var buf bytes.Buffer
if err := t.Execute(&buf, data); err != nil {
return err
}
body := buf.Bytes()
// Output.
if *output != "" {
err = os.WriteFile(*output, body, 0o640)
} else {
_, err = os.Stdout.Write(body)
}
if err != nil {
return err
}
return nil
}
//go:embed templates
var templates embed.FS
// load template.
func load() (string, error) {
// Prefer explicit filename, if provided.
if *tmpl != "" {
b, err := os.ReadFile(*tmpl)
if err != nil {
return "", err
}
return string(b), nil
}
// Otherwise expect a named type.
if *typ == "" {
return "", errors.New("missing documentation type")
}
path := fmt.Sprintf("templates/%s.tmpl", *typ)
b, err := templates.ReadFile(path)
if err != nil {
return "", fmt.Errorf("unknown documentation type %q", *typ)
}
return string(b), nil
}
// include template function.
func include(filename string) (string, error) {
b, err := os.ReadFile(filename)
if err != nil {
return "", err
}
return string(b), nil
}
// snippet of a file between start and end regular expressions.
func snippet(filename, start, end string) (string, error) {
// Parse regular expressions.
startx, err := regexp.Compile(start)
if err != nil {
return "", err
}
endx, err := regexp.Compile(end)
if err != nil {
return "", err
}
// Read the full file.
data, err := include(filename)
if err != nil {
return "", err
}
// Collect matched lines.
var buf bytes.Buffer
output := false
s := bufio.NewScanner(strings.NewReader(data))
for s.Scan() {
line := s.Text()
if startx.MatchString(line) {
output = true
}
if output {
fmt.Fprintln(&buf, line)
}
if endx.MatchString(line) {
output = false
}
}
return buf.String(), nil
}
// avatar returns HTML for a Github user avatar.
func avatar(owner string, size int) (string, error) {
// Origin avatar URL from Github.
u := fmt.Sprintf("https://github.com/%s.png", owner)
// Use images.weserv.nl service to resize and apply circle mask.
v := url.Values{}
v.Set("url", u)
v.Set("w", strconv.Itoa(size))
v.Set("h", strconv.Itoa(size))
v.Set("fit", "cover")
v.Set("mask", "circle")
v.Set("maxage", "7d")
src := url.URL{
Scheme: "https",
Host: "images.weserv.nl",
RawQuery: v.Encode(),
}
// Build ![]()
tag.
format := `
`
return fmt.Sprintf(format, src.String(), size, size), nil
}
// stars formats a Github star count, rounding to thousands in the same style as Github.
func stars(n int) string {
if n < 1000 {
return strconv.Itoa(n)
}
k := math.Round(float64(n)/100.0) / 10.0
return strconv.FormatFloat(k, 'f', -1, 64) + "k"
}
golang-github-mmcloughlin-avo-0.5.0/internal/cmd/docgen/templates/ 0000775 0000000 0000000 00000000000 14370657153 0025171 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/cmd/docgen/templates/adopters.tmpl 0000664 0000000 0000000 00000000306 14370657153 0027707 0 ustar 00root root 0000000 0000000 # Adopters
{{ range .Suite.Projects.Ranked }}
{{ avatar .Repository.Owner 28 }} [{{ .Repository.Owner }} / **{{ .Repository.Name }}**]({{ .Repository.URL }})
{{ .Metadata.Description }}
{{ end -}}
golang-github-mmcloughlin-avo-0.5.0/internal/cmd/docgen/templates/readme.tmpl 0000664 0000000 0000000 00000014260 14370657153 0027327 0 ustar 00root root 0000000 0000000
Generate x86 Assembly with Go
`avo` makes high-performance Go assembly easier to write, review and maintain. The `avo` package presents a familiar assembly-like interface that simplifies development without sacrificing performance:
* **Use Go control structures** for assembly generation; `avo` programs _are_ Go programs
* **Register allocation**: write functions with virtual registers and `avo` assigns physical registers for you
* **Automatically load arguments and store return values**: ensure memory offsets are correct for complex structures
* **Generation of stub files** to interface with your Go package
For more about `avo`:
* Introductory talk ["Better `x86` Assembly Generation with Go"](https://www.youtube.com/watch?v=6Y5CZ7_tyA4) at [dotGo 2019](https://2019.dotgo.eu/) ([slides](https://speakerdeck.com/mmcloughlin/better-x86-assembly-generation-with-go))
* [Longer tutorial at Gophercon 2019](https://www.youtube.com/watch?v=WaD8sNqroAw) showing a highly-optimized dot product ([slides](https://speakerdeck.com/mmcloughlin/better-x86-assembly-generation-with-go-gophercon-2019))
* Watch [Filippo Valsorda](https://filippo.io/) live code the [rewrite of `filippo.io/edwards25519` assembly with `avo`](https://vimeo.com/679848853)
* Explore [projects using `avo`](doc/adopters.md)
* Discuss `avo` and general Go assembly topics in the [#assembly](https://gophers.slack.com/archives/C6WDZJ70S) channel of [Gophers Slack](https://invite.slack.golangbridge.org/)
_Note: APIs subject to change while `avo` is still in an experimental phase. You can use it to build [real things](examples) but we suggest you pin a version with your package manager of choice._
## Quick Start
Install `avo` with `go get`:
```
$ go get -u github.com/mmcloughlin/avo
```
`avo` assembly generators are pure Go programs. Here's a function that adds two `uint64` values:
```go
{{ include "examples/add/asm.go" -}}
```
`go run` this code to see the assembly output. To integrate this into the rest of your Go package we recommend a [`go:generate`](https://blog.golang.org/generate) line to produce the assembly and the corresponding Go stub file.
```go
{{ snippet "examples/add/add_test.go" "go:generate" "" -}}
```
After running `go generate` the [`add.s`](examples/add/add.s) file will contain the Go assembly.
```s
{{ include "examples/add/add.s" -}}
```
The same call will produce the stub file [`stub.go`](examples/add/stub.go) which will enable the function to be called from your Go code.
```go
{{ include "examples/add/stub.go" -}}
```
See the [`examples/add`](examples/add) directory for the complete working example.
## Examples
See [`examples`](examples) for the full suite of examples.
### Slice Sum
Sum a slice of `uint64`s:
```go
{{ snippet "examples/sum/asm.go" "func main" "^}" -}}
```
The result from this code generator is:
```s
{{ include "examples/sum/sum.s" -}}
```
Full example at [`examples/sum`](examples/sum).
### Features
For demonstrations of `avo` features:
* **[args](examples/args):** Loading function arguments.
* **[returns](examples/returns):** Building return values.
* **[complex](examples/complex):** Working with `complex{64,128}` types.
* **[data](examples/data):** Defining `DATA` sections.
* **[ext](examples/ext):** Interacting with types from external packages.
* **[pragma](examples/pragma):** Apply compiler directives to generated functions.
### Real Examples
Implementations of full algorithms:
* **[sha1](examples/sha1):** [SHA-1](https://en.wikipedia.org/wiki/SHA-1) cryptographic hash.
* **[fnv1a](examples/fnv1a):** [FNV-1a](https://en.wikipedia.org/wiki/Fowler%E2%80%93Noll%E2%80%93Vo_hash_function#FNV-1a_hash) hash function.
* **[dot](examples/dot):** Vector dot product.
* **[md5x16](examples/md5x16):** AVX-512 accelerated [MD5](https://en.wikipedia.org/wiki/MD5).
* **[geohash](examples/geohash):** Integer [geohash](https://en.wikipedia.org/wiki/Geohash) encoding.
* **[stadtx](examples/stadtx):** [`StadtX` hash](https://github.com/demerphq/BeagleHash) port from [dgryski/go-stadtx](https://github.com/dgryski/go-stadtx).
## Adopters
Popular projects[^projects] using `avo`:
[^projects]: Projects drawn from the `avo` third-party test suite. Popularity
estimated from Github star count collected on {{ .Suite.MetadataLastUpdate.Format "Jan 2, 2006" }}.
{{ range .Suite.Projects.Top 10 -}}
{{ if lt .Metadata.Stars 100 }}{{break}}{{ end -}}
{{ avatar .Repository.Owner 24 }} [{{ .Repository.Owner }} / **{{ .Repository.Name }}**]({{ .Repository.URL }})
:star: {{ stars .Metadata.Stars }}
> {{ .Metadata.Description }}
{{ end -}}
See the [full list of projects using `avo`](doc/adopters.md).
## Contributing
Contributions to `avo` are welcome:
* Feedback from using `avo` in a real project is incredibly valuable. Consider [porting an existing project to `avo`](https://github.com/mmcloughlin/avo/issues/40).
* [Submit bug reports](https://github.com/mmcloughlin/avo/issues/new) to the issues page.
* Pull requests accepted. Take a look at outstanding [issues](https://github.com/mmcloughlin/avo/issues) for ideas (especially the ["good first issue"](https://github.com/mmcloughlin/avo/labels/good%20first%20issue) label).
* Join us in the [#assembly](https://gophers.slack.com/archives/C6WDZJ70S) channel of [Gophers Slack](https://invite.slack.golangbridge.org/).
## Credits
Inspired by the [PeachPy](https://github.com/Maratyszcza/PeachPy) and [asmjit](https://github.com/asmjit/asmjit) projects. Thanks to [Damian Gryski](https://github.com/dgryski) for advice, and his [extensive library of PeachPy Go projects](https://github.com/mmcloughlin/avo/issues/40).
## License
`avo` is available under the [BSD 3-Clause License](LICENSE).
golang-github-mmcloughlin-avo-0.5.0/internal/data/ 0000775 0000000 0000000 00000000000 14370657153 0022102 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/data/LICENSE 0000664 0000000 0000000 00000020125 14370657153 0023107 0 ustar 00root root 0000000 0000000 -----------------------------------------------------------------------------
golang/go license
-----------------------------------------------------------------------------
Copyright (c) 2009 The Go Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-----------------------------------------------------------------------------
Maratyszcza/Opcodes license
-----------------------------------------------------------------------------
=======================================
Opcodes Database license (2-clause BSD)
=======================================
Copyright (c) 2017 Facebook Inc.
Copyright (c) 2014-2017, Georgia Institute of Technology
All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-----------------------------------------------------------------------------
golang/arch license
-----------------------------------------------------------------------------
Copyright (c) 2015 The Go Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-----------------------------------------------------------------------------
golang/go license
-----------------------------------------------------------------------------
Copyright (c) 2009 The Go Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-----------------------------------------------------------------------------
Maratyszcza/Opcodes license
-----------------------------------------------------------------------------
=======================================
Opcodes Database license (2-clause BSD)
=======================================
Copyright (c) 2017 Facebook Inc.
Copyright (c) 2014-2017, Georgia Institute of Technology
All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
golang-github-mmcloughlin-avo-0.5.0/internal/data/README.md 0000664 0000000 0000000 00000012157 14370657153 0023367 0 ustar 00root root 0000000 0000000 # data
Underlying data files for instruction database.
## golang/arch
Files downloaded:
* https://raw.githubusercontent.com/golang/arch/b76863e36670e165c85261bc41fabaf345376022/x86/x86.v0.2.csv
* https://raw.githubusercontent.com/golang/arch/b76863e36670e165c85261bc41fabaf345376022/LICENSE
### License
```
Copyright (c) 2015 The Go Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
```
## golang/go
Files downloaded:
* https://raw.githubusercontent.com/golang/go/go1.17.6/src/cmd/asm/internal/arch/arch.go
* https://raw.githubusercontent.com/golang/go/go1.17.6/LICENSE
### License
```
Copyright (c) 2009 The Go Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
```
## Maratyszcza/Opcodes
Files downloaded:
* https://raw.githubusercontent.com/Maratyszcza/Opcodes/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.xml
* https://raw.githubusercontent.com/Maratyszcza/Opcodes/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/license.rst
### License
```
=======================================
Opcodes Database license (2-clause BSD)
=======================================
Copyright (c) 2017 Facebook Inc.
Copyright (c) 2014-2017, Georgia Institute of Technology
All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
```
golang-github-mmcloughlin-avo-0.5.0/internal/data/arch.go.txt 0000664 0000000 0000000 00000051141 14370657153 0024166 0 ustar 00root root 0000000 0000000 // Copyright 2015 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
// Package arch defines architecture-specific information and support functions.
package arch
import (
"cmd/internal/obj"
"cmd/internal/obj/arm"
"cmd/internal/obj/arm64"
"cmd/internal/obj/mips"
"cmd/internal/obj/ppc64"
"cmd/internal/obj/riscv"
"cmd/internal/obj/s390x"
"cmd/internal/obj/wasm"
"cmd/internal/obj/x86"
"fmt"
"strings"
)
// Pseudo-registers whose names are the constant name without the leading R.
const (
RFP = -(iota + 1)
RSB
RSP
RPC
)
// Arch wraps the link architecture object with more architecture-specific information.
type Arch struct {
*obj.LinkArch
// Map of instruction names to enumeration.
Instructions map[string]obj.As
// Map of register names to enumeration.
Register map[string]int16
// Table of register prefix names. These are things like R for R(0) and SPR for SPR(268).
RegisterPrefix map[string]bool
// RegisterNumber converts R(10) into arm.REG_R10.
RegisterNumber func(string, int16) (int16, bool)
// Instruction is a jump.
IsJump func(word string) bool
}
// nilRegisterNumber is the register number function for architectures
// that do not accept the R(N) notation. It always returns failure.
func nilRegisterNumber(name string, n int16) (int16, bool) {
return 0, false
}
// Set configures the architecture specified by GOARCH and returns its representation.
// It returns nil if GOARCH is not recognized.
func Set(GOARCH string) *Arch {
switch GOARCH {
case "386":
return archX86(&x86.Link386)
case "amd64":
return archX86(&x86.Linkamd64)
case "arm":
return archArm()
case "arm64":
return archArm64()
case "mips":
return archMips(&mips.Linkmips)
case "mipsle":
return archMips(&mips.Linkmipsle)
case "mips64":
return archMips64(&mips.Linkmips64)
case "mips64le":
return archMips64(&mips.Linkmips64le)
case "ppc64":
return archPPC64(&ppc64.Linkppc64)
case "ppc64le":
return archPPC64(&ppc64.Linkppc64le)
case "riscv64":
return archRISCV64()
case "s390x":
return archS390x()
case "wasm":
return archWasm()
}
return nil
}
func jumpX86(word string) bool {
return word[0] == 'J' || word == "CALL" || strings.HasPrefix(word, "LOOP") || word == "XBEGIN"
}
func jumpRISCV(word string) bool {
switch word {
case "BEQ", "BEQZ", "BGE", "BGEU", "BGEZ", "BGT", "BGTU", "BGTZ", "BLE", "BLEU", "BLEZ",
"BLT", "BLTU", "BLTZ", "BNE", "BNEZ", "CALL", "JAL", "JALR", "JMP":
return true
}
return false
}
func jumpWasm(word string) bool {
return word == "JMP" || word == "CALL" || word == "Call" || word == "Br" || word == "BrIf"
}
func archX86(linkArch *obj.LinkArch) *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
for i, s := range x86.Register {
register[s] = int16(i + x86.REG_AL)
}
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
if linkArch == &x86.Linkamd64 {
// Alias g to R14
register["g"] = x86.REGG
}
// Register prefix not used on this architecture.
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range x86.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseAMD64
}
}
// Annoying aliases.
instructions["JA"] = x86.AJHI /* alternate */
instructions["JAE"] = x86.AJCC /* alternate */
instructions["JB"] = x86.AJCS /* alternate */
instructions["JBE"] = x86.AJLS /* alternate */
instructions["JC"] = x86.AJCS /* alternate */
instructions["JCC"] = x86.AJCC /* carry clear (CF = 0) */
instructions["JCS"] = x86.AJCS /* carry set (CF = 1) */
instructions["JE"] = x86.AJEQ /* alternate */
instructions["JEQ"] = x86.AJEQ /* equal (ZF = 1) */
instructions["JG"] = x86.AJGT /* alternate */
instructions["JGE"] = x86.AJGE /* greater than or equal (signed) (SF = OF) */
instructions["JGT"] = x86.AJGT /* greater than (signed) (ZF = 0 && SF = OF) */
instructions["JHI"] = x86.AJHI /* higher (unsigned) (CF = 0 && ZF = 0) */
instructions["JHS"] = x86.AJCC /* alternate */
instructions["JL"] = x86.AJLT /* alternate */
instructions["JLE"] = x86.AJLE /* less than or equal (signed) (ZF = 1 || SF != OF) */
instructions["JLO"] = x86.AJCS /* alternate */
instructions["JLS"] = x86.AJLS /* lower or same (unsigned) (CF = 1 || ZF = 1) */
instructions["JLT"] = x86.AJLT /* less than (signed) (SF != OF) */
instructions["JMI"] = x86.AJMI /* negative (minus) (SF = 1) */
instructions["JNA"] = x86.AJLS /* alternate */
instructions["JNAE"] = x86.AJCS /* alternate */
instructions["JNB"] = x86.AJCC /* alternate */
instructions["JNBE"] = x86.AJHI /* alternate */
instructions["JNC"] = x86.AJCC /* alternate */
instructions["JNE"] = x86.AJNE /* not equal (ZF = 0) */
instructions["JNG"] = x86.AJLE /* alternate */
instructions["JNGE"] = x86.AJLT /* alternate */
instructions["JNL"] = x86.AJGE /* alternate */
instructions["JNLE"] = x86.AJGT /* alternate */
instructions["JNO"] = x86.AJOC /* alternate */
instructions["JNP"] = x86.AJPC /* alternate */
instructions["JNS"] = x86.AJPL /* alternate */
instructions["JNZ"] = x86.AJNE /* alternate */
instructions["JO"] = x86.AJOS /* alternate */
instructions["JOC"] = x86.AJOC /* overflow clear (OF = 0) */
instructions["JOS"] = x86.AJOS /* overflow set (OF = 1) */
instructions["JP"] = x86.AJPS /* alternate */
instructions["JPC"] = x86.AJPC /* parity clear (PF = 0) */
instructions["JPE"] = x86.AJPS /* alternate */
instructions["JPL"] = x86.AJPL /* non-negative (plus) (SF = 0) */
instructions["JPO"] = x86.AJPC /* alternate */
instructions["JPS"] = x86.AJPS /* parity set (PF = 1) */
instructions["JS"] = x86.AJMI /* alternate */
instructions["JZ"] = x86.AJEQ /* alternate */
instructions["MASKMOVDQU"] = x86.AMASKMOVOU
instructions["MOVD"] = x86.AMOVQ
instructions["MOVDQ2Q"] = x86.AMOVQ
instructions["MOVNTDQ"] = x86.AMOVNTO
instructions["MOVOA"] = x86.AMOVO
instructions["PSLLDQ"] = x86.APSLLO
instructions["PSRLDQ"] = x86.APSRLO
instructions["PADDD"] = x86.APADDL
return &Arch{
LinkArch: linkArch,
Instructions: instructions,
Register: register,
RegisterPrefix: nil,
RegisterNumber: nilRegisterNumber,
IsJump: jumpX86,
}
}
func archArm() *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for x86.
for i := arm.REG_R0; i < arm.REG_SPSR; i++ {
register[obj.Rconv(i)] = int16(i)
}
// Avoid unintentionally clobbering g using R10.
delete(register, "R10")
register["g"] = arm.REG_R10
for i := 0; i < 16; i++ {
register[fmt.Sprintf("C%d", i)] = int16(i)
}
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
register["SP"] = RSP
registerPrefix := map[string]bool{
"F": true,
"R": true,
}
// special operands for DMB/DSB instructions
register["MB_SY"] = arm.REG_MB_SY
register["MB_ST"] = arm.REG_MB_ST
register["MB_ISH"] = arm.REG_MB_ISH
register["MB_ISHST"] = arm.REG_MB_ISHST
register["MB_NSH"] = arm.REG_MB_NSH
register["MB_NSHST"] = arm.REG_MB_NSHST
register["MB_OSH"] = arm.REG_MB_OSH
register["MB_OSHST"] = arm.REG_MB_OSHST
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range arm.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseARM
}
}
// Annoying aliases.
instructions["B"] = obj.AJMP
instructions["BL"] = obj.ACALL
// MCR differs from MRC by the way fields of the word are encoded.
// (Details in arm.go). Here we add the instruction so parse will find
// it, but give it an opcode number known only to us.
instructions["MCR"] = aMCR
return &Arch{
LinkArch: &arm.Linkarm,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: armRegisterNumber,
IsJump: jumpArm,
}
}
func archArm64() *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for 386 and amd64.
register[obj.Rconv(arm64.REGSP)] = int16(arm64.REGSP)
for i := arm64.REG_R0; i <= arm64.REG_R31; i++ {
register[obj.Rconv(i)] = int16(i)
}
// Rename R18 to R18_PLATFORM to avoid accidental use.
register["R18_PLATFORM"] = register["R18"]
delete(register, "R18")
for i := arm64.REG_F0; i <= arm64.REG_F31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := arm64.REG_V0; i <= arm64.REG_V31; i++ {
register[obj.Rconv(i)] = int16(i)
}
// System registers.
for i := 0; i < len(arm64.SystemReg); i++ {
register[arm64.SystemReg[i].Name] = arm64.SystemReg[i].Reg
}
register["LR"] = arm64.REGLINK
register["DAIFSet"] = arm64.REG_DAIFSet
register["DAIFClr"] = arm64.REG_DAIFClr
register["PLDL1KEEP"] = arm64.REG_PLDL1KEEP
register["PLDL1STRM"] = arm64.REG_PLDL1STRM
register["PLDL2KEEP"] = arm64.REG_PLDL2KEEP
register["PLDL2STRM"] = arm64.REG_PLDL2STRM
register["PLDL3KEEP"] = arm64.REG_PLDL3KEEP
register["PLDL3STRM"] = arm64.REG_PLDL3STRM
register["PLIL1KEEP"] = arm64.REG_PLIL1KEEP
register["PLIL1STRM"] = arm64.REG_PLIL1STRM
register["PLIL2KEEP"] = arm64.REG_PLIL2KEEP
register["PLIL2STRM"] = arm64.REG_PLIL2STRM
register["PLIL3KEEP"] = arm64.REG_PLIL3KEEP
register["PLIL3STRM"] = arm64.REG_PLIL3STRM
register["PSTL1KEEP"] = arm64.REG_PSTL1KEEP
register["PSTL1STRM"] = arm64.REG_PSTL1STRM
register["PSTL2KEEP"] = arm64.REG_PSTL2KEEP
register["PSTL2STRM"] = arm64.REG_PSTL2STRM
register["PSTL3KEEP"] = arm64.REG_PSTL3KEEP
register["PSTL3STRM"] = arm64.REG_PSTL3STRM
// Conditional operators, like EQ, NE, etc.
register["EQ"] = arm64.COND_EQ
register["NE"] = arm64.COND_NE
register["HS"] = arm64.COND_HS
register["CS"] = arm64.COND_HS
register["LO"] = arm64.COND_LO
register["CC"] = arm64.COND_LO
register["MI"] = arm64.COND_MI
register["PL"] = arm64.COND_PL
register["VS"] = arm64.COND_VS
register["VC"] = arm64.COND_VC
register["HI"] = arm64.COND_HI
register["LS"] = arm64.COND_LS
register["GE"] = arm64.COND_GE
register["LT"] = arm64.COND_LT
register["GT"] = arm64.COND_GT
register["LE"] = arm64.COND_LE
register["AL"] = arm64.COND_AL
register["NV"] = arm64.COND_NV
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
register["SP"] = RSP
// Avoid unintentionally clobbering g using R28.
delete(register, "R28")
register["g"] = arm64.REG_R28
registerPrefix := map[string]bool{
"F": true,
"R": true,
"V": true,
}
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range arm64.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseARM64
}
}
// Annoying aliases.
instructions["B"] = arm64.AB
instructions["BL"] = arm64.ABL
return &Arch{
LinkArch: &arm64.Linkarm64,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: arm64RegisterNumber,
IsJump: jumpArm64,
}
}
func archPPC64(linkArch *obj.LinkArch) *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for x86.
for i := ppc64.REG_R0; i <= ppc64.REG_R31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := ppc64.REG_F0; i <= ppc64.REG_F31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := ppc64.REG_V0; i <= ppc64.REG_V31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := ppc64.REG_VS0; i <= ppc64.REG_VS63; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := ppc64.REG_CR0; i <= ppc64.REG_CR7; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := ppc64.REG_MSR; i <= ppc64.REG_CR; i++ {
register[obj.Rconv(i)] = int16(i)
}
register["CR"] = ppc64.REG_CR
register["XER"] = ppc64.REG_XER
register["LR"] = ppc64.REG_LR
register["CTR"] = ppc64.REG_CTR
register["FPSCR"] = ppc64.REG_FPSCR
register["MSR"] = ppc64.REG_MSR
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
// Avoid unintentionally clobbering g using R30.
delete(register, "R30")
register["g"] = ppc64.REG_R30
registerPrefix := map[string]bool{
"CR": true,
"F": true,
"R": true,
"SPR": true,
}
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range ppc64.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABasePPC64
}
}
// Annoying aliases.
instructions["BR"] = ppc64.ABR
instructions["BL"] = ppc64.ABL
return &Arch{
LinkArch: linkArch,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: ppc64RegisterNumber,
IsJump: jumpPPC64,
}
}
func archMips(linkArch *obj.LinkArch) *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for x86.
for i := mips.REG_R0; i <= mips.REG_R31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_F0; i <= mips.REG_F31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_M0; i <= mips.REG_M31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_FCR0; i <= mips.REG_FCR31; i++ {
register[obj.Rconv(i)] = int16(i)
}
register["HI"] = mips.REG_HI
register["LO"] = mips.REG_LO
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
// Avoid unintentionally clobbering g using R30.
delete(register, "R30")
register["g"] = mips.REG_R30
registerPrefix := map[string]bool{
"F": true,
"FCR": true,
"M": true,
"R": true,
}
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range mips.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseMIPS
}
}
// Annoying alias.
instructions["JAL"] = mips.AJAL
return &Arch{
LinkArch: linkArch,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: mipsRegisterNumber,
IsJump: jumpMIPS,
}
}
func archMips64(linkArch *obj.LinkArch) *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for x86.
for i := mips.REG_R0; i <= mips.REG_R31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_F0; i <= mips.REG_F31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_M0; i <= mips.REG_M31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_FCR0; i <= mips.REG_FCR31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := mips.REG_W0; i <= mips.REG_W31; i++ {
register[obj.Rconv(i)] = int16(i)
}
register["HI"] = mips.REG_HI
register["LO"] = mips.REG_LO
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
// Avoid unintentionally clobbering g using R30.
delete(register, "R30")
register["g"] = mips.REG_R30
// Avoid unintentionally clobbering RSB using R28.
delete(register, "R28")
register["RSB"] = mips.REG_R28
registerPrefix := map[string]bool{
"F": true,
"FCR": true,
"M": true,
"R": true,
"W": true,
}
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range mips.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseMIPS
}
}
// Annoying alias.
instructions["JAL"] = mips.AJAL
return &Arch{
LinkArch: linkArch,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: mipsRegisterNumber,
IsJump: jumpMIPS,
}
}
func archRISCV64() *Arch {
register := make(map[string]int16)
// Standard register names.
for i := riscv.REG_X0; i <= riscv.REG_X31; i++ {
if i == riscv.REG_G {
continue
}
name := fmt.Sprintf("X%d", i-riscv.REG_X0)
register[name] = int16(i)
}
for i := riscv.REG_F0; i <= riscv.REG_F31; i++ {
name := fmt.Sprintf("F%d", i-riscv.REG_F0)
register[name] = int16(i)
}
// General registers with ABI names.
register["ZERO"] = riscv.REG_ZERO
register["RA"] = riscv.REG_RA
register["SP"] = riscv.REG_SP
register["GP"] = riscv.REG_GP
register["TP"] = riscv.REG_TP
register["T0"] = riscv.REG_T0
register["T1"] = riscv.REG_T1
register["T2"] = riscv.REG_T2
register["S0"] = riscv.REG_S0
register["S1"] = riscv.REG_S1
register["A0"] = riscv.REG_A0
register["A1"] = riscv.REG_A1
register["A2"] = riscv.REG_A2
register["A3"] = riscv.REG_A3
register["A4"] = riscv.REG_A4
register["A5"] = riscv.REG_A5
register["A6"] = riscv.REG_A6
register["A7"] = riscv.REG_A7
register["S2"] = riscv.REG_S2
register["S3"] = riscv.REG_S3
register["S4"] = riscv.REG_S4
register["S5"] = riscv.REG_S5
register["S6"] = riscv.REG_S6
register["S7"] = riscv.REG_S7
register["S8"] = riscv.REG_S8
register["S9"] = riscv.REG_S9
register["S10"] = riscv.REG_S10
// Skip S11 as it is the g register.
register["T3"] = riscv.REG_T3
register["T4"] = riscv.REG_T4
register["T5"] = riscv.REG_T5
register["T6"] = riscv.REG_T6
// Go runtime register names.
register["g"] = riscv.REG_G
register["CTXT"] = riscv.REG_CTXT
register["TMP"] = riscv.REG_TMP
// ABI names for floating point register.
register["FT0"] = riscv.REG_FT0
register["FT1"] = riscv.REG_FT1
register["FT2"] = riscv.REG_FT2
register["FT3"] = riscv.REG_FT3
register["FT4"] = riscv.REG_FT4
register["FT5"] = riscv.REG_FT5
register["FT6"] = riscv.REG_FT6
register["FT7"] = riscv.REG_FT7
register["FS0"] = riscv.REG_FS0
register["FS1"] = riscv.REG_FS1
register["FA0"] = riscv.REG_FA0
register["FA1"] = riscv.REG_FA1
register["FA2"] = riscv.REG_FA2
register["FA3"] = riscv.REG_FA3
register["FA4"] = riscv.REG_FA4
register["FA5"] = riscv.REG_FA5
register["FA6"] = riscv.REG_FA6
register["FA7"] = riscv.REG_FA7
register["FS2"] = riscv.REG_FS2
register["FS3"] = riscv.REG_FS3
register["FS4"] = riscv.REG_FS4
register["FS5"] = riscv.REG_FS5
register["FS6"] = riscv.REG_FS6
register["FS7"] = riscv.REG_FS7
register["FS8"] = riscv.REG_FS8
register["FS9"] = riscv.REG_FS9
register["FS10"] = riscv.REG_FS10
register["FS11"] = riscv.REG_FS11
register["FT8"] = riscv.REG_FT8
register["FT9"] = riscv.REG_FT9
register["FT10"] = riscv.REG_FT10
register["FT11"] = riscv.REG_FT11
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range riscv.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseRISCV
}
}
return &Arch{
LinkArch: &riscv.LinkRISCV64,
Instructions: instructions,
Register: register,
RegisterPrefix: nil,
RegisterNumber: nilRegisterNumber,
IsJump: jumpRISCV,
}
}
func archS390x() *Arch {
register := make(map[string]int16)
// Create maps for easy lookup of instruction names etc.
// Note that there is no list of names as there is for x86.
for i := s390x.REG_R0; i <= s390x.REG_R15; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := s390x.REG_F0; i <= s390x.REG_F15; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := s390x.REG_V0; i <= s390x.REG_V31; i++ {
register[obj.Rconv(i)] = int16(i)
}
for i := s390x.REG_AR0; i <= s390x.REG_AR15; i++ {
register[obj.Rconv(i)] = int16(i)
}
register["LR"] = s390x.REG_LR
// Pseudo-registers.
register["SB"] = RSB
register["FP"] = RFP
register["PC"] = RPC
// Avoid unintentionally clobbering g using R13.
delete(register, "R13")
register["g"] = s390x.REG_R13
registerPrefix := map[string]bool{
"AR": true,
"F": true,
"R": true,
}
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range s390x.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseS390X
}
}
// Annoying aliases.
instructions["BR"] = s390x.ABR
instructions["BL"] = s390x.ABL
return &Arch{
LinkArch: &s390x.Links390x,
Instructions: instructions,
Register: register,
RegisterPrefix: registerPrefix,
RegisterNumber: s390xRegisterNumber,
IsJump: jumpS390x,
}
}
func archWasm() *Arch {
instructions := make(map[string]obj.As)
for i, s := range obj.Anames {
instructions[s] = obj.As(i)
}
for i, s := range wasm.Anames {
if obj.As(i) >= obj.A_ARCHSPECIFIC {
instructions[s] = obj.As(i) + obj.ABaseWasm
}
}
return &Arch{
LinkArch: &wasm.Linkwasm,
Instructions: instructions,
Register: wasm.Register,
RegisterPrefix: nil,
RegisterNumber: nilRegisterNumber,
IsJump: jumpWasm,
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/data/dl.sh 0000775 0000000 0000000 00000003667 14370657153 0023054 0 ustar 00root root 0000000 0000000 #!/bin/bash -ex
datadir=$(dirname "${BASH_SOURCE[0]}")
dl() {
local url=$1
local name=${2:-$(basename ${url})}
mkdir -p ${datadir}
curl --output ${datadir}/${name} ${url}
echo "* ${url}"
}
hdr() {
echo "-----------------------------------------------------------------------------"
echo $1
echo "-----------------------------------------------------------------------------"
}
addlicense() {
local repo=$1
local file=$2
tmp=$(mktemp)
mv ${file} ${tmp}
# append to LICENSE file
{
hdr "${repo} license"
echo
cat ${tmp}
echo
} >> ${datadir}/LICENSE
# include in readme
echo "### License"
echo '```'
cat ${tmp}
echo '```'
rm ${tmp}
}
{
echo '# data'
echo 'Underlying data files for instruction database.'
echo
# golang/arch x86 csv
repo='golang/arch'
ref='b76863e36670e165c85261bc41fabaf345376022'
echo "## ${repo}"
echo 'Files downloaded:'
echo
dl https://raw.githubusercontent.com/${repo}/${ref}/x86/x86.v0.2.csv
dl https://raw.githubusercontent.com/${repo}/${ref}/LICENSE golang-arch-license.txt
addlicense ${repo} ${datadir}/golang-arch-license.txt
# golang/go aliases list.
repo='golang/go'
ref='go1.17.6'
echo "## ${repo}"
echo 'Files downloaded:'
echo
dl https://raw.githubusercontent.com/${repo}/${ref}/src/cmd/asm/internal/arch/arch.go arch.go.txt
dl https://raw.githubusercontent.com/${repo}/${ref}/LICENSE golang-go-license.txt
addlicense ${repo} ${datadir}/golang-go-license.txt
# opcodes
repo='Maratyszcza/Opcodes'
ref='6e2b0cd9f1403ecaf164dea7019dd54db5aea252'
echo "## ${repo}"
echo 'Files downloaded:'
echo
dl https://raw.githubusercontent.com/${repo}/${ref}/opcodes/x86_64.xml
dl https://raw.githubusercontent.com/${repo}/${ref}/license.rst
addlicense ${repo} ${datadir}/license.rst
} > ${datadir}/README.md
golang-github-mmcloughlin-avo-0.5.0/internal/data/x86.v0.2.csv 0000664 0000000 0000000 00000774010 14370657153 0023741 0 ustar 00root root 0000000 0000000 # x86 instruction set description version 0.2, 2017-09-28
# Based on Intel Instruction Set Reference #325383-057US, December 2015.
# https://golang.org/x/arch/x86/x86spec
"AAA","AAA","aaa","37","V","I","","","","",""
"AAD","AAD","aad","D5 0A","V","I","","pseudo","","",""
"AAD imm8","AAD imm8","aad imm8","D5 ib","V","I","","","r","",""
"AAM","AAM","aam","D4 0A","V","I","","pseudo","","",""
"AAM imm8","AAM imm8","aam imm8","D4 ib","V","I","","","r","",""
"AAS","AAS","aas","3F","V","I","","","","",""
"ADC AL, imm8","ADCB imm8, AL","adcb imm8, AL","14 ib","V","V","","","rw,r","Y","8"
"ADC AX, imm16","ADCW imm16, AX","adcw imm16, AX","15 iw","V","V","","operand16","rw,r","Y","16"
"ADC EAX, imm32","ADCL imm32, EAX","adcl imm32, EAX","15 id","V","V","","operand32","rw,r","Y","32"
"ADC RAX, imm32","ADCQ imm32, RAX","adcq imm32, RAX","REX.W 15 id","N.E.","V","","","rw,r","Y","64"
"ADC r/m16, imm16","ADCW imm16, r/m16","adcw imm16, r/m16","81 /2 iw","V","V","","operand16","rw,r","Y","16"
"ADC r/m16, imm8","ADCW imm8, r/m16","adcw imm8, r/m16","83 /2 ib","V","V","","operand16","rw,r","Y","16"
"ADC r/m16, r16","ADCW r16, r/m16","adcw r16, r/m16","11 /r","V","V","","operand16","rw,r","Y","16"
"ADC r/m32, imm32","ADCL imm32, r/m32","adcl imm32, r/m32","81 /2 id","V","V","","operand32","rw,r","Y","32"
"ADC r/m32, imm8","ADCL imm8, r/m32","adcl imm8, r/m32","83 /2 ib","V","V","","operand32","rw,r","Y","32"
"ADC r/m32, r32","ADCL r32, r/m32","adcl r32, r/m32","11 /r","V","V","","operand32","rw,r","Y","32"
"ADC r/m64, imm32","ADCQ imm32, r/m64","adcq imm32, r/m64","REX.W 81 /2 id","N.E.","V","","","rw,r","Y","64"
"ADC r/m64, imm8","ADCQ imm8, r/m64","adcq imm8, r/m64","REX.W 83 /2 ib","N.E.","V","","","rw,r","Y","64"
"ADC r/m64, r64","ADCQ r64, r/m64","adcq r64, r/m64","REX.W 11 /r","N.E.","V","","","rw,r","Y","64"
"ADC r/m8, imm8","ADCB imm8, r/m8","adcb imm8, r/m8","80 /2 ib","V","V","","","rw,r","Y","8"
"ADC r/m8, imm8","ADCB imm8, r/m8","adcb imm8, r/m8","REX 80 /2 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"ADC r/m8, r8","ADCB r8, r/m8","adcb r8, r/m8","10 /r","V","V","","","rw,r","Y","8"
"ADC r/m8, r8","ADCB r8, r/m8","adcb r8, r/m8","REX 10 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ADC r16, r/m16","ADCW r/m16, r16","adcw r/m16, r16","13 /r","V","V","","operand16","rw,r","Y","16"
"ADC r32, r/m32","ADCL r/m32, r32","adcl r/m32, r32","13 /r","V","V","","operand32","rw,r","Y","32"
"ADC r64, r/m64","ADCQ r/m64, r64","adcq r/m64, r64","REX.W 13 /r","N.E.","V","","","rw,r","Y","64"
"ADC r8, r/m8","ADCB r/m8, r8","adcb r/m8, r8","12 /r","V","V","","","rw,r","Y","8"
"ADC r8, r/m8","ADCB r/m8, r8","adcb r/m8, r8","REX 12 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ADCX r32, r/m32","ADCXL r/m32, r32","adcxl r/m32, r32","66 0F 38 F6 /r","V","V","ADX","operand16,operand32","rw,r","Y","32"
"ADCX r64, r/m64","ADCXQ r/m64, r64","adcxq r/m64, r64","66 REX.W 0F 38 F6 /r","N.E.","V","ADX","","rw,r","Y","64"
"ADD AL, imm8","ADDB imm8, AL","addb imm8, AL","04 ib","V","V","","","rw,r","Y","8"
"ADD AX, imm16","ADDW imm16, AX","addw imm16, AX","05 iw","V","V","","operand16","rw,r","Y","16"
"ADD EAX, imm32","ADDL imm32, EAX","addl imm32, EAX","05 id","V","V","","operand32","rw,r","Y","32"
"ADD RAX, imm32","ADDQ imm32, RAX","addq imm32, RAX","REX.W 05 id","N.E.","V","","","rw,r","Y","64"
"ADD r/m16, imm16","ADDW imm16, r/m16","addw imm16, r/m16","81 /0 iw","V","V","","operand16","rw,r","Y","16"
"ADD r/m16, imm8","ADDW imm8, r/m16","addw imm8, r/m16","83 /0 ib","V","V","","operand16","rw,r","Y","16"
"ADD r/m16, r16","ADDW r16, r/m16","addw r16, r/m16","01 /r","V","V","","operand16","rw,r","Y","16"
"ADD r/m32, imm32","ADDL imm32, r/m32","addl imm32, r/m32","81 /0 id","V","V","","operand32","rw,r","Y","32"
"ADD r/m32, imm8","ADDL imm8, r/m32","addl imm8, r/m32","83 /0 ib","V","V","","operand32","rw,r","Y","32"
"ADD r/m32, r32","ADDL r32, r/m32","addl r32, r/m32","01 /r","V","V","","operand32","rw,r","Y","32"
"ADD r/m64, imm32","ADDQ imm32, r/m64","addq imm32, r/m64","REX.W 81 /0 id","N.E.","V","","","rw,r","Y","64"
"ADD r/m64, imm8","ADDQ imm8, r/m64","addq imm8, r/m64","REX.W 83 /0 ib","N.E.","V","","","rw,r","Y","64"
"ADD r/m64, r64","ADDQ r64, r/m64","addq r64, r/m64","REX.W 01 /r","N.E.","V","","","rw,r","Y","64"
"ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","80 /0 ib","V","V","","","rw,r","Y","8"
"ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","REX 80 /0 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","00 /r","V","V","","","rw,r","Y","8"
"ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","REX 00 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ADD r16, r/m16","ADDW r/m16, r16","addw r/m16, r16","03 /r","V","V","","operand16","rw,r","Y","16"
"ADD r32, r/m32","ADDL r/m32, r32","addl r/m32, r32","03 /r","V","V","","operand32","rw,r","Y","32"
"ADD r64, r/m64","ADDQ r/m64, r64","addq r/m64, r64","REX.W 03 /r","N.E.","V","","","rw,r","Y","64"
"ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","02 /r","V","V","","","rw,r","Y","8"
"ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","REX 02 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ADDPD xmm1, xmm2/m128","ADDPD xmm2/m128, xmm1","addpd xmm2/m128, xmm1","66 0F 58 /r","V","V","SSE2","","rw,r","",""
"ADDPS xmm1, xmm2/m128","ADDPS xmm2/m128, xmm1","addps xmm2/m128, xmm1","0F 58 /r","V","V","SSE","","rw,r","",""
"ADDSD xmm1, xmm2/m64","ADDSD xmm2/m64, xmm1","addsd xmm2/m64, xmm1","F2 0F 58 /r","V","V","SSE2","","rw,r","",""
"ADDSS xmm1, xmm2/m32","ADDSS xmm2/m32, xmm1","addss xmm2/m32, xmm1","F3 0F 58 /r","V","V","SSE","","rw,r","",""
"ADDSUBPD xmm1, xmm2/m128","ADDSUBPD xmm2/m128, xmm1","addsubpd xmm2/m128, xmm1","66 0F D0 /r","V","V","SSE3","","rw,r","",""
"ADDSUBPS xmm1, xmm2/m128","ADDSUBPS xmm2/m128, xmm1","addsubps xmm2/m128, xmm1","F2 0F D0 /r","V","V","SSE3","","rw,r","",""
"ADOX r32, r/m32","ADOXL r/m32, r32","adoxl r/m32, r32","F3 0F 38 F6 /r","V","V","ADX","operand16,operand32","rw,r","Y","32"
"ADOX r64, r/m64","ADOXQ r/m64, r64","adoxq r/m64, r64","F3 REX.W 0F 38 F6 /r","N.E.","V","ADX","","rw,r","Y","64"
"AESDEC xmm1, xmm2/m128","AESDEC xmm2/m128, xmm1","aesdec xmm2/m128, xmm1","66 0F 38 DE /r","V","V","AES","","rw,r","",""
"AESDECLAST xmm1, xmm2/m128","AESDECLAST xmm2/m128, xmm1","aesdeclast xmm2/m128, xmm1","66 0F 38 DF /r","V","V","AES","","rw,r","",""
"AESENC xmm1, xmm2/m128","AESENC xmm2/m128, xmm1","aesenc xmm2/m128, xmm1","66 0F 38 DC /r","V","V","AES","","rw,r","",""
"AESENCLAST xmm1, xmm2/m128","AESENCLAST xmm2/m128, xmm1","aesenclast xmm2/m128, xmm1","66 0F 38 DD /r","V","V","AES","","rw,r","",""
"AESIMC xmm1, xmm2/m128","AESIMC xmm2/m128, xmm1","aesimc xmm2/m128, xmm1","66 0F 38 DB /r","V","V","AES","","w,r","",""
"AESKEYGENASSIST xmm1, xmm2/m128, imm8","AESKEYGENASSIST imm8, xmm2/m128, xmm1","aeskeygenassist imm8, xmm2/m128, xmm1","66 0F 3A DF /r ib","V","V","AES","","w,r,r","",""
"AND AL, imm8","ANDB imm8, AL","andb imm8, AL","24 ib","V","V","","","rw,r","Y","8"
"AND AX, imm16","ANDW imm16, AX","andw imm16, AX","25 iw","V","V","","operand16","rw,r","Y","16"
"AND EAX, imm32","ANDL imm32, EAX","andl imm32, EAX","25 id","V","V","","operand32","rw,r","Y","32"
"AND RAX, imm32","ANDQ imm32, RAX","andq imm32, RAX","REX.W 25 id","N.E.","V","","","rw,r","Y","64"
"AND r/m16, imm16","ANDW imm16, r/m16","andw imm16, r/m16","81 /4 iw","V","V","","operand16","rw,r","Y","16"
"AND r/m16, imm8","ANDW imm8, r/m16","andw imm8, r/m16","83 /4 ib","V","V","","operand16","rw,r","Y","16"
"AND r/m16, r16","ANDW r16, r/m16","andw r16, r/m16","21 /r","V","V","","operand16","rw,r","Y","16"
"AND r/m32, imm32","ANDL imm32, r/m32","andl imm32, r/m32","81 /4 id","V","V","","operand32","rw,r","Y","32"
"AND r/m32, imm8","ANDL imm8, r/m32","andl imm8, r/m32","83 /4 ib","V","V","","operand32","rw,r","Y","32"
"AND r/m32, r32","ANDL r32, r/m32","andl r32, r/m32","21 /r","V","V","","operand32","rw,r","Y","32"
"AND r/m64, imm32","ANDQ imm32, r/m64","andq imm32, r/m64","REX.W 81 /4 id","N.E.","V","","","rw,r","Y","64"
"AND r/m64, imm8","ANDQ imm8, r/m64","andq imm8, r/m64","REX.W 83 /4 ib","N.E.","V","","","rw,r","Y","64"
"AND r/m64, r64","ANDQ r64, r/m64","andq r64, r/m64","REX.W 21 /r","N.E.","V","","","rw,r","Y","64"
"AND r/m8, imm8","ANDB imm8, r/m8","andb imm8, r/m8","80 /4 ib","V","V","","","rw,r","Y","8"
"AND r/m8, imm8","ANDB imm8, r/m8","andb imm8, r/m8","REX 80 /4 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"AND r/m8, r8","ANDB r8, r/m8","andb r8, r/m8","20 /r","V","V","","","rw,r","Y","8"
"AND r/m8, r8","ANDB r8, r/m8","andb r8, r/m8","REX 20 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"AND r16, r/m16","ANDW r/m16, r16","andw r/m16, r16","23 /r","V","V","","operand16","rw,r","Y","16"
"AND r32, r/m32","ANDL r/m32, r32","andl r/m32, r32","23 /r","V","V","","operand32","rw,r","Y","32"
"AND r64, r/m64","ANDQ r/m64, r64","andq r/m64, r64","REX.W 23 /r","N.E.","V","","","rw,r","Y","64"
"AND r8, r/m8","ANDB r/m8, r8","andb r/m8, r8","22 /r","V","V","","","rw,r","Y","8"
"AND r8, r/m8","ANDB r/m8, r8","andb r/m8, r8","REX 22 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ANDN r32, r32V, r/m32","ANDNL r/m32, r32V, r32","andnl r/m32, r32V, r32","VEX.NDS.LZ.0F38.W0 F2 /r","V","V","BMI1","","w,r,r","Y","32"
"ANDN r64, r64V, r/m64","ANDNQ r/m64, r64V, r64","andnq r/m64, r64V, r64","VEX.NDS.LZ.0F38.W1 F2 /r","N.E.","V","BMI1","","w,r,r","Y","64"
"ANDNPD xmm1, xmm2/m128","ANDNPD xmm2/m128, xmm1","andnpd xmm2/m128, xmm1","66 0F 55 /r","V","V","SSE2","","rw,r","",""
"ANDNPS xmm1, xmm2/m128","ANDNPS xmm2/m128, xmm1","andnps xmm2/m128, xmm1","0F 55 /r","V","V","SSE","","rw,r","",""
"ANDPD xmm1, xmm2/m128","ANDPD xmm2/m128, xmm1","andpd xmm2/m128, xmm1","66 0F 54 /r","V","V","SSE2","","rw,r","",""
"ANDPS xmm1, xmm2/m128","ANDPS xmm2/m128, xmm1","andps xmm2/m128, xmm1","0F 54 /r","V","V","SSE","","rw,r","",""
"ARPL r/m16, r16","ARPL r16, r/m16","arpl r16, r/m16","63 /r","V","N.E.","","operand16,operand32","w,r","",""
"BEXTR r32, r/m32, r32V","BEXTRL r32V, r/m32, r32","bextrl r32V, r/m32, r32","VEX.NDS.LZ.0F38.W0 F7 /r","V","V","BMI1","","w,r,r","Y","32"
"BEXTR r64, r/m64, r64V","BEXTRQ r64V, r/m64, r64","bextrq r64V, r/m64, r64","VEX.NDS.LZ.0F38.W1 F7 /r","N.E.","V","BMI1","","w,r,r","Y","64"
"BLENDPD xmm1, xmm2/m128, imm8","BLENDPD imm8, xmm2/m128, xmm1","blendpd imm8, xmm2/m128, xmm1","66 0F 3A 0D /r ib","V","V","SSE4_1","","rw,r,r","",""
"BLENDPS xmm1, xmm2/m128, imm8","BLENDPS imm8, xmm2/m128, xmm1","blendps imm8, xmm2/m128, xmm1","66 0F 3A 0C /r ib","V","V","SSE4_1","","rw,r,r","",""
"BLENDVPD xmm1, xmm2/m128, ","BLENDVPD , xmm2/m128, xmm1","blendvpd , xmm2/m128, xmm1","66 0F 38 15 /r","V","V","SSE4_1","","rw,r,r","",""
"BLENDVPS xmm1, xmm2/m128, ","BLENDVPS , xmm2/m128, xmm1","blendvps , xmm2/m128, xmm1","66 0F 38 14 /r","V","V","SSE4_1","","rw,r,r","",""
"BLSI r32V, r/m32","BLSIL r/m32, r32V","blsil r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /3","V","V","BMI1","","w,r","Y","32"
"BLSI r64V, r/m64","BLSIQ r/m64, r64V","blsiq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /3","N.E.","V","BMI1","","w,r","Y","64"
"BLSMSK r32V, r/m32","BLSMSKL r/m32, r32V","blsmskl r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /2","V","V","BMI1","","w,r","Y","32"
"BLSMSK r64V, r/m64","BLSMSKQ r/m64, r64V","blsmskq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /2","N.E.","V","BMI1","","w,r","Y","64"
"BLSR r32V, r/m32","BLSRL r/m32, r32V","blsrl r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /1","V","V","BMI1","","w,r","Y","32"
"BLSR r64V, r/m64","BLSRQ r/m64, r64V","blsrq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /1","N.E.","V","BMI1","","w,r","Y","64"
"BNDCL bnd1, r/m32","BNDCL r/m32, bnd1","bndcl r/m32, bnd1","F3 0F 1A /r","V","N.E.","MPX","","w,r","",""
"BNDCL bnd1, r/m64","BNDCL r/m64, bnd1","bndcl r/m64, bnd1","F3 0F 1A /r","N.E.","V","MPX","","w,r","",""
"BNDCN bnd1, r/m32","BNDCN r/m32, bnd1","bndcn r/m32, bnd1","F2 0F 1B /r","V","N.E.","MPX","","w,r","",""
"BNDCN bnd1, r/m64","BNDCN r/m64, bnd1","bndcn r/m64, bnd1","F2 0F 1B /r","N.E.","V","MPX","","w,r","",""
"BNDCU bnd1, r/m32","BNDCU r/m32, bnd1","bndcu r/m32, bnd1","F2 0F 1A /r","V","N.E.","MPX","","w,r","",""
"BNDCU bnd1, r/m64","BNDCU r/m64, bnd1","bndcu r/m64, bnd1","F2 0F 1A /r","N.E.","V","MPX","","w,r","",""
"BNDLDX bnd1, mib","BNDLDX mib, bnd1","bndldx mib, bnd1","0F 1A /r","V","V","MPX","","w,r","",""
"BNDMK bnd1, m32","BNDMK m32, bnd1","bndmk m32, bnd1","F3 0F 1B /r","V","N.E.","MPX","modrm_memonly","w,r","",""
"BNDMK bnd1, m64","BNDMK m64, bnd1","bndmk m64, bnd1","F3 0F 1B /r","N.E.","V","MPX","modrm_memonly","w,r","",""
"BNDMOV bnd1, bnd2/m128","BNDMOV bnd2/m128, bnd1","bndmov bnd2/m128, bnd1","66 0F 1A /r","N.E.","V","MPX","","w,r","",""
"BNDMOV bnd1, bnd2/m64","BNDMOV bnd2/m64, bnd1","bndmov bnd2/m64, bnd1","66 0F 1A /r","V","N.E.","MPX","","w,r","",""
"BNDMOV bnd2/m128, bnd1","BNDMOV bnd1, bnd2/m128","bndmov bnd1, bnd2/m128","66 0F 1B /r","N.E.","V","MPX","","w,r","",""
"BNDMOV bnd2/m64, bnd1","BNDMOV bnd1, bnd2/m64","bndmov bnd1, bnd2/m64","66 0F 1B /r","V","N.E.","MPX","","w,r","",""
"BNDSTX mib, bnd1","BNDSTX bnd1, mib","bndstx bnd1, mib","0F 1B /r","V","V","MPX","","r,r","",""
"BOUND r16, m16&16","BOUNDW m16&16, r16","boundw r16, m16&16","62 /r","V","I","","operand16","r,r","Y","16"
"BOUND r32, m32&32","BOUNDL m32&32, r32","boundl r32, m32&32","62 /r","V","I","","operand32","r,r","Y","32"
"BSF r16, r/m16","BSFW r/m16, r16","bsfw r/m16, r16","0F BC /r","V","V","","operand16","w,r","Y","16"
"BSF r32, r/m32","BSFL r/m32, r32","bsfl r/m32, r32","0F BC /r","V","V","","operand32","w,r","Y","32"
"BSF r64, r/m64","BSFQ r/m64, r64","bsfq r/m64, r64","REX.W 0F BC /r","N.E.","V","","","w,r","Y","64"
"BSR r16, r/m16","BSRW r/m16, r16","bsrw r/m16, r16","0F BD /r","V","V","","operand16","w,r","Y","16"
"BSR r32, r/m32","BSRL r/m32, r32","bsrl r/m32, r32","0F BD /r","V","V","","operand32","w,r","Y","32"
"BSR r64, r/m64","BSRQ r/m64, r64","bsrq r/m64, r64","REX.W 0F BD /r","N.E.","V","","","w,r","Y","64"
"BSWAP r16op","BSWAPW r16op","bswap r16op","0F C8+rd","V","V","","operand16","rw","Y","16"
"BSWAP r32op","BSWAPL r32op","bswap r32op","0F C8+rd","V","V","","operand32","rw","Y","32"
"BSWAP r64op","BSWAPQ r64op","bswap r64op","REX.W 0F C8+rd","N.E.","V","","","rw","Y","64"
"BT r/m16, imm8","BTW imm8, r/m16","btw imm8, r/m16","0F BA /4 ib","V","V","","operand16","r,r","Y","16"
"BT r/m16, r16","BTW r16, r/m16","btw r16, r/m16","0F A3 /r","V","V","","operand16","r,r","Y","16"
"BT r/m32, imm8","BTL imm8, r/m32","btl imm8, r/m32","0F BA /4 ib","V","V","","operand32","r,r","Y","32"
"BT r/m32, r32","BTL r32, r/m32","btl r32, r/m32","0F A3 /r","V","V","","operand32","r,r","Y","32"
"BT r/m64, imm8","BTQ imm8, r/m64","btq imm8, r/m64","REX.W 0F BA /4 ib","N.E.","V","","","r,r","Y","64"
"BT r/m64, r64","BTQ r64, r/m64","btq r64, r/m64","REX.W 0F A3 /r","N.E.","V","","","r,r","Y","64"
"BTC r/m16, imm8","BTCW imm8, r/m16","btcw imm8, r/m16","0F BA /7 ib","V","V","","operand16","rw,r","Y","16"
"BTC r/m16, r16","BTCW r16, r/m16","btcw r16, r/m16","0F BB /r","V","V","","operand16","rw,r","Y","16"
"BTC r/m32, imm8","BTCL imm8, r/m32","btcl imm8, r/m32","0F BA /7 ib","V","V","","operand32","rw,r","Y","32"
"BTC r/m32, r32","BTCL r32, r/m32","btcl r32, r/m32","0F BB /r","V","V","","operand32","rw,r","Y","32"
"BTC r/m64, imm8","BTCQ imm8, r/m64","btcq imm8, r/m64","REX.W 0F BA /7 ib","N.E.","V","","","rw,r","Y","64"
"BTC r/m64, r64","BTCQ r64, r/m64","btcq r64, r/m64","REX.W 0F BB /r","N.E.","V","","","rw,r","Y","64"
"BTR r/m16, imm8","BTRW imm8, r/m16","btrw imm8, r/m16","0F BA /6 ib","V","V","","operand16","rw,r","Y","16"
"BTR r/m16, r16","BTRW r16, r/m16","btrw r16, r/m16","0F B3 /r","V","V","","operand16","rw,r","Y","16"
"BTR r/m32, imm8","BTRL imm8, r/m32","btrl imm8, r/m32","0F BA /6 ib","V","V","","operand32","rw,r","Y","32"
"BTR r/m32, r32","BTRL r32, r/m32","btrl r32, r/m32","0F B3 /r","V","V","","operand32","rw,r","Y","32"
"BTR r/m64, imm8","BTRQ imm8, r/m64","btrq imm8, r/m64","REX.W 0F BA /6 ib","N.E.","V","","","rw,r","Y","64"
"BTR r/m64, r64","BTRQ r64, r/m64","btrq r64, r/m64","REX.W 0F B3 /r","N.E.","V","","","rw,r","Y","64"
"BTS r/m16, imm8","BTSW imm8, r/m16","btsw imm8, r/m16","0F BA /5 ib","V","V","","operand16","rw,r","Y","16"
"BTS r/m16, r16","BTSW r16, r/m16","btsw r16, r/m16","0F AB /r","V","V","","operand16","rw,r","Y","16"
"BTS r/m32, imm8","BTSL imm8, r/m32","btsl imm8, r/m32","0F BA /5 ib","V","V","","operand32","rw,r","Y","32"
"BTS r/m32, r32","BTSL r32, r/m32","btsl r32, r/m32","0F AB /r","V","V","","operand32","rw,r","Y","32"
"BTS r/m64, imm8","BTSQ imm8, r/m64","btsq imm8, r/m64","REX.W 0F BA /5 ib","N.E.","V","","","rw,r","Y","64"
"BTS r/m64, r64","BTSQ r64, r/m64","btsq r64, r/m64","REX.W 0F AB /r","N.E.","V","","","rw,r","Y","64"
"BZHI r32, r/m32, r32V","BZHIL r32V, r/m32, r32","bzhil r32V, r/m32, r32","VEX.NDS.LZ.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
"BZHI r64, r/m64, r64V","BZHIQ r64V, r/m64, r64","bzhiq r64V, r/m64, r64","VEX.NDS.LZ.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"CALL r/m16","CALLW* r/m16","callw* r/m16","FF /2","V","N.E.","","operand16","r","Y","16"
"CALL r/m32","CALLL* r/m32","calll* r/m32","FF /2","V","N.E.","","operand32","r","Y","32"
"CALL r/m64","CALLQ* r/m64","callq* r/m64","FF /2","N.E.","V","","","r","Y","64"
"CALL rel16","CALL rel16","call rel16","E8 cw","V","N.S.","","operand16","r","Y",""
"CALL rel32","CALL rel32","call rel32","E8 cd","V","V","","operand32","r","Y",""
"CALL rel32","CALL rel32","call rel32","E8 cd","N.S.","V","","operand16,operand64","r","Y",""
"CALL_FAR m16:16","LCALLW* m16:16","lcallw* m16:16","FF /3","V","V","","operand16","r","Y",""
"CALL_FAR m16:32","LCALLL* m16:32","lcalll* m16:32","FF /3","V","V","","operand32","r","Y",""
"CALL_FAR m16:64","LCALLQ* m16:64","lcallq* m16:64","REX.W FF /3","N.E.","V","","","r","Y",""
"CALL_FAR ptr16:16","LCALLW ptr16:16","lcallw ptr16:16","9A cd","V","I","","operand16","r","Y",""
"CALL_FAR ptr16:32","LCALLL ptr16:32","lcalll ptr16:32","9A cp","V","I","","operand32","r","Y",""
"CBW","CBW","cbtw","98","V","V","","operand16","","",""
"CDQ","CDQ","cltd","99","V","V","","operand32","","",""
"CDQE","CDQE","cltq","REX.W 98","N.E.","V","","","","",""
"CLAC","CLAC","clac","0F 01 CA","V","V","","","","",""
"CLC","CLC","clc","F8","V","V","","","","",""
"CLD","CLD","cld","FC","V","V","","","","",""
"CLFLUSH m8","CLFLUSH m8","clflush m8","0F AE /7","V","V","","modrm_memonly","w","",""
"CLFLUSHOPT m8","CLFLUSHOPT m8","clflushopt m8","66 0F AE /7","V","V","","modrm_memonly","w","",""
"CLI","CLI","cli","FA","V","V","","","","",""
"CLTS","CLTS","clts","0F 06","V","V","","","","",""
"CMC","CMC","cmc","F5","V","V","","","","",""
"CMOVA r16, r/m16","CMOVWHI r/m16, r16","cmovaw r/m16, r16","0F 47 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVA r32, r/m32","CMOVLHI r/m32, r32","cmoval r/m32, r32","0F 47 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVA r64, r/m64","CMOVQHI r/m64, r64","cmovaq r/m64, r64","REX.W 0F 47 /r","N.E.","V","","","rw,r","Y","64"
"CMOVAE r16, r/m16","CMOVWCC r/m16, r16","cmovaew r/m16, r16","0F 43 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVAE r32, r/m32","CMOVLCC r/m32, r32","cmovael r/m32, r32","0F 43 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVAE r64, r/m64","CMOVQCC r/m64, r64","cmovaeq r/m64, r64","REX.W 0F 43 /r","N.E.","V","","","rw,r","Y","64"
"CMOVB r16, r/m16","CMOVWCS r/m16, r16","cmovbw r/m16, r16","0F 42 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVB r32, r/m32","CMOVLCS r/m32, r32","cmovbl r/m32, r32","0F 42 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVB r64, r/m64","CMOVQCS r/m64, r64","cmovbq r/m64, r64","REX.W 0F 42 /r","N.E.","V","","","rw,r","Y","64"
"CMOVBE r16, r/m16","CMOVWLS r/m16, r16","cmovbew r/m16, r16","0F 46 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVBE r32, r/m32","CMOVLLS r/m32, r32","cmovbel r/m32, r32","0F 46 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVBE r64, r/m64","CMOVQLS r/m64, r64","cmovbeq r/m64, r64","REX.W 0F 46 /r","N.E.","V","","","rw,r","Y","64"
"CMOVC r16, r/m16","CMOVC r/m16, r16","cmovc r/m16, r16","0F 42 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVC r32, r/m32","CMOVC r/m32, r32","cmovc r/m32, r32","0F 42 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVC r64, r/m64","CMOVC r/m64, r64","cmovc r/m64, r64","REX.W 0F 42 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVE r16, r/m16","CMOVWEQ r/m16, r16","cmovew r/m16, r16","0F 44 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVE r32, r/m32","CMOVLEQ r/m32, r32","cmovel r/m32, r32","0F 44 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVE r64, r/m64","CMOVQEQ r/m64, r64","cmoveq r/m64, r64","REX.W 0F 44 /r","N.E.","V","","","rw,r","Y","64"
"CMOVG r16, r/m16","CMOVWGT r/m16, r16","cmovgw r/m16, r16","0F 4F /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVG r32, r/m32","CMOVLGT r/m32, r32","cmovgl r/m32, r32","0F 4F /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVG r64, r/m64","CMOVQGT r/m64, r64","cmovgq r/m64, r64","REX.W 0F 4F /r","N.E.","V","","","rw,r","Y","64"
"CMOVGE r16, r/m16","CMOVWGE r/m16, r16","cmovgew r/m16, r16","0F 4D /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVGE r32, r/m32","CMOVLGE r/m32, r32","cmovgel r/m32, r32","0F 4D /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVGE r64, r/m64","CMOVQGE r/m64, r64","cmovgeq r/m64, r64","REX.W 0F 4D /r","N.E.","V","","","rw,r","Y","64"
"CMOVL r16, r/m16","CMOVWLT r/m16, r16","cmovlw r/m16, r16","0F 4C /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVL r32, r/m32","CMOVLLT r/m32, r32","cmovll r/m32, r32","0F 4C /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVL r64, r/m64","CMOVQLT r/m64, r64","cmovlq r/m64, r64","REX.W 0F 4C /r","N.E.","V","","","rw,r","Y","64"
"CMOVLE r16, r/m16","CMOVWLE r/m16, r16","cmovlew r/m16, r16","0F 4E /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVLE r32, r/m32","CMOVLLE r/m32, r32","cmovlel r/m32, r32","0F 4E /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVLE r64, r/m64","CMOVQLE r/m64, r64","cmovleq r/m64, r64","REX.W 0F 4E /r","N.E.","V","","","rw,r","Y","64"
"CMOVNA r16, r/m16","CMOVNA r/m16, r16","cmovna r/m16, r16","0F 46 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNA r32, r/m32","CMOVNA r/m32, r32","cmovna r/m32, r32","0F 46 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNA r64, r/m64","CMOVNA r/m64, r64","cmovna r/m64, r64","REX.W 0F 46 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNAE r16, r/m16","CMOVNAE r/m16, r16","cmovnae r/m16, r16","0F 42 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNAE r32, r/m32","CMOVNAE r/m32, r32","cmovnae r/m32, r32","0F 42 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNAE r64, r/m64","CMOVNAE r/m64, r64","cmovnae r/m64, r64","REX.W 0F 42 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNB r16, r/m16","CMOVNB r/m16, r16","cmovnb r/m16, r16","0F 43 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNB r32, r/m32","CMOVNB r/m32, r32","cmovnb r/m32, r32","0F 43 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNB r64, r/m64","CMOVNB r/m64, r64","cmovnb r/m64, r64","REX.W 0F 43 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNBE r16, r/m16","CMOVNBE r/m16, r16","cmovnbe r/m16, r16","0F 47 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNBE r32, r/m32","CMOVNBE r/m32, r32","cmovnbe r/m32, r32","0F 47 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNBE r64, r/m64","CMOVNBE r/m64, r64","cmovnbe r/m64, r64","REX.W 0F 47 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNC r16, r/m16","CMOVNC r/m16, r16","cmovnc r/m16, r16","0F 43 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNC r32, r/m32","CMOVNC r/m32, r32","cmovnc r/m32, r32","0F 43 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNC r64, r/m64","CMOVNC r/m64, r64","cmovnc r/m64, r64","REX.W 0F 43 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNE r16, r/m16","CMOVWNE r/m16, r16","cmovnew r/m16, r16","0F 45 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVNE r32, r/m32","CMOVLNE r/m32, r32","cmovnel r/m32, r32","0F 45 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVNE r64, r/m64","CMOVQNE r/m64, r64","cmovneq r/m64, r64","REX.W 0F 45 /r","N.E.","V","","","rw,r","Y","64"
"CMOVNG r16, r/m16","CMOVNG r/m16, r16","cmovng r/m16, r16","0F 4E /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNG r32, r/m32","CMOVNG r/m32, r32","cmovng r/m32, r32","0F 4E /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNG r64, r/m64","CMOVNG r/m64, r64","cmovng r/m64, r64","REX.W 0F 4E /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNGE r16, r/m16","CMOVNGE r/m16, r16","cmovnge r/m16, r16","0F 4C /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNGE r32, r/m32","CMOVNGE r/m32, r32","cmovnge r/m32, r32","0F 4C /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNGE r64, r/m64","CMOVNGE r/m64, r64","cmovnge r/m64, r64","REX.W 0F 4C /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNL r16, r/m16","CMOVNL r/m16, r16","cmovnl r/m16, r16","0F 4D /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNL r32, r/m32","CMOVNL r/m32, r32","cmovnl r/m32, r32","0F 4D /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNL r64, r/m64","CMOVNL r/m64, r64","cmovnl r/m64, r64","REX.W 0F 4D /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNLE r16, r/m16","CMOVNLE r/m16, r16","cmovnle r/m16, r16","0F 4F /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNLE r32, r/m32","CMOVNLE r/m32, r32","cmovnle r/m32, r32","0F 4F /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNLE r64, r/m64","CMOVNLE r/m64, r64","cmovnle r/m64, r64","REX.W 0F 4F /r","N.E.","V","","pseudo","rw,r","",""
"CMOVNO r16, r/m16","CMOVWOC r/m16, r16","cmovnow r/m16, r16","0F 41 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVNO r32, r/m32","CMOVLOC r/m32, r32","cmovnol r/m32, r32","0F 41 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVNO r64, r/m64","CMOVQOC r/m64, r64","cmovnoq r/m64, r64","REX.W 0F 41 /r","N.E.","V","","","rw,r","Y","64"
"CMOVNP r16, r/m16","CMOVWPC r/m16, r16","cmovnpw r/m16, r16","0F 4B /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVNP r32, r/m32","CMOVLPC r/m32, r32","cmovnpl r/m32, r32","0F 4B /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVNP r64, r/m64","CMOVQPC r/m64, r64","cmovnpq r/m64, r64","REX.W 0F 4B /r","N.E.","V","","","rw,r","Y","64"
"CMOVNS r16, r/m16","CMOVWPL r/m16, r16","cmovnsw r/m16, r16","0F 49 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVNS r32, r/m32","CMOVLPL r/m32, r32","cmovnsl r/m32, r32","0F 49 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVNS r64, r/m64","CMOVQPL r/m64, r64","cmovnsq r/m64, r64","REX.W 0F 49 /r","N.E.","V","","","rw,r","Y","64"
"CMOVNZ r16, r/m16","CMOVNZ r/m16, r16","cmovnz r/m16, r16","0F 45 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVNZ r32, r/m32","CMOVNZ r/m32, r32","cmovnz r/m32, r32","0F 45 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVNZ r64, r/m64","CMOVNZ r/m64, r64","cmovnz r/m64, r64","REX.W 0F 45 /r","N.E.","V","","pseudo","rw,r","",""
"CMOVO r16, r/m16","CMOVWOS r/m16, r16","cmovow r/m16, r16","0F 40 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVO r32, r/m32","CMOVLOS r/m32, r32","cmovol r/m32, r32","0F 40 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVO r64, r/m64","CMOVQOS r/m64, r64","cmovoq r/m64, r64","REX.W 0F 40 /r","N.E.","V","","","rw,r","Y","64"
"CMOVP r16, r/m16","CMOVWPS r/m16, r16","cmovpw r/m16, r16","0F 4A /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVP r32, r/m32","CMOVLPS r/m32, r32","cmovpl r/m32, r32","0F 4A /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVP r64, r/m64","CMOVQPS r/m64, r64","cmovpq r/m64, r64","REX.W 0F 4A /r","N.E.","V","","","rw,r","Y","64"
"CMOVPE r16, r/m16","CMOVPE r/m16, r16","cmovpe r/m16, r16","0F 4A /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVPE r32, r/m32","CMOVPE r/m32, r32","cmovpe r/m32, r32","0F 4A /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVPE r64, r/m64","CMOVPE r/m64, r64","cmovpe r/m64, r64","REX.W 0F 4A /r","N.E.","V","","pseudo","rw,r","",""
"CMOVPO r16, r/m16","CMOVPO r/m16, r16","cmovpo r/m16, r16","0F 4B /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVPO r32, r/m32","CMOVPO r/m32, r32","cmovpo r/m32, r32","0F 4B /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVPO r64, r/m64","CMOVPO r/m64, r64","cmovpo r/m64, r64","REX.W 0F 4B /r","N.E.","V","","pseudo","rw,r","",""
"CMOVS r16, r/m16","CMOVWMI r/m16, r16","cmovsw r/m16, r16","0F 48 /r","V","V","","P6,operand16","rw,r","Y","16"
"CMOVS r32, r/m32","CMOVLMI r/m32, r32","cmovsl r/m32, r32","0F 48 /r","V","V","","P6,operand32","rw,r","Y","32"
"CMOVS r64, r/m64","CMOVQMI r/m64, r64","cmovsq r/m64, r64","REX.W 0F 48 /r","N.E.","V","","","rw,r","Y","64"
"CMOVZ r16, r/m16","CMOVZ r/m16, r16","cmovz r/m16, r16","0F 44 /r","V","V","","P6,operand16,pseudo","rw,r","",""
"CMOVZ r32, r/m32","CMOVZ r/m32, r32","cmovz r/m32, r32","0F 44 /r","V","V","","P6,operand32,pseudo","rw,r","",""
"CMOVZ r64, r/m64","CMOVZ r/m64, r64","cmovz r/m64, r64","REX.W 0F 44 /r","N.E.","V","","pseudo","rw,r","",""
"CMP AL, imm8","CMPB AL, imm8","cmpb imm8, AL","3C ib","V","V","","","r,r","Y","8"
"CMP AX, imm16","CMPW AX, imm16","cmpw imm16, AX","3D iw","V","V","","operand16","r,r","Y","16"
"CMP EAX, imm32","CMPL EAX, imm32","cmpl imm32, EAX","3D id","V","V","","operand32","r,r","Y","32"
"CMP RAX, imm32","CMPQ RAX, imm32","cmpq imm32, RAX","REX.W 3D id","N.E.","V","","","r,r","Y","64"
"CMP r/m16, imm16","CMPW r/m16, imm16","cmpw imm16, r/m16","81 /7 iw","V","V","","operand16","r,r","Y","16"
"CMP r/m16, imm8","CMPW r/m16, imm8","cmpw imm8, r/m16","83 /7 ib","V","V","","operand16","r,r","Y","16"
"CMP r/m16, r16","CMPW r/m16, r16","cmpw r16, r/m16","39 /r","V","V","","operand16","r,r","Y","16"
"CMP r/m32, imm32","CMPL r/m32, imm32","cmpl imm32, r/m32","81 /7 id","V","V","","operand32","r,r","Y","32"
"CMP r/m32, imm8","CMPL r/m32, imm8","cmpl imm8, r/m32","83 /7 ib","V","V","","operand32","r,r","Y","32"
"CMP r/m32, r32","CMPL r/m32, r32","cmpl r32, r/m32","39 /r","V","V","","operand32","r,r","Y","32"
"CMP r/m64, imm32","CMPQ r/m64, imm32","cmpq imm32, r/m64","REX.W 81 /7 id","N.E.","V","","","r,r","Y","64"
"CMP r/m64, imm8","CMPQ r/m64, imm8","cmpq imm8, r/m64","REX.W 83 /7 ib","N.E.","V","","","r,r","Y","64"
"CMP r/m64, r64","CMPQ r/m64, r64","cmpq r64, r/m64","REX.W 39 /r","N.E.","V","","","r,r","Y","64"
"CMP r/m8, imm8","CMPB r/m8, imm8","cmpb imm8, r/m8","80 /7 ib","V","V","","","r,r","Y","8"
"CMP r/m8, imm8","CMPB r/m8, imm8","cmpb imm8, r/m8","REX 80 /7 ib","N.E.","V","","pseudo64","r,r","Y","8"
"CMP r/m8, r8","CMPB r/m8, r8","cmpb r8, r/m8","38 /r","V","V","","","r,r","Y","8"
"CMP r/m8, r8","CMPB r/m8, r8","cmpb r8, r/m8","REX 38 /r","N.E.","V","","pseudo64","r,r","Y","8"
"CMP r16, r/m16","CMPW r16, r/m16","cmpw r/m16, r16","3B /r","V","V","","operand16","r,r","Y","16"
"CMP r32, r/m32","CMPL r32, r/m32","cmpl r/m32, r32","3B /r","V","V","","operand32","r,r","Y","32"
"CMP r64, r/m64","CMPQ r64, r/m64","cmpq r/m64, r64","REX.W 3B /r","N.E.","V","","","r,r","Y","64"
"CMP r8, r/m8","CMPB r8, r/m8","cmpb r/m8, r8","3A /r","V","V","","","r,r","Y","8"
"CMP r8, r/m8","CMPB r8, r/m8","cmpb r/m8, r8","REX 3A /r","N.E.","V","","pseudo64","r,r","Y","8"
"CMPPD xmm1, xmm2/m128, imm8","CMPPD imm8, xmm1, xmm2/m128","cmppd imm8, xmm2/m128, xmm1","66 0F C2 /r ib","V","V","SSE2","","rw,r,r","",""
"CMPPS xmm1, xmm2/m128, imm8","CMPPS imm8, xmm1, xmm2/m128","cmpps imm8, xmm2/m128, xmm1","0F C2 /r ib","V","V","SSE","","rw,r,r","",""
"CMPSB","CMPSB","cmpsb","A6","V","V","","","","",""
"CMPSD","CMPSL","cmpsl","A7","V","V","","operand32","","",""
"CMPSD xmm1, xmm2/m64, imm8","CMPSD imm8, xmm1, xmm2/m64","cmpsd imm8, xmm2/m64, xmm1","F2 0F C2 /r ib","V","V","SSE2","","rw,r,r","",""
"CMPSQ","CMPSQ","cmpsq","REX.W A7","N.E.","V","","","","",""
"CMPSS xmm1, xmm2/m32, imm8","CMPSS imm8, xmm1, xmm2/m32","cmpss imm8, xmm2/m32, xmm1","F3 0F C2 /r ib","V","V","SSE","","rw,r,r","",""
"CMPSW","CMPSW","cmpsw","A7","V","V","","operand16","","",""
"CMPXCHG r/m16, r16","CMPXCHGW r16, r/m16","cmpxchgw r16, r/m16","0F B1 /r","V","V","486","operand16","rw,r","Y","16"
"CMPXCHG r/m32, r32","CMPXCHGL r32, r/m32","cmpxchgl r32, r/m32","0F B1 /r","V","V","486","operand32","rw,r","Y","32"
"CMPXCHG r/m64, r64","CMPXCHGQ r64, r/m64","cmpxchgq r64, r/m64","REX.W 0F B1 /r","N.E.","V","","","rw,r","Y","64"
"CMPXCHG r/m8, r8","CMPXCHGB r8, r/m8","cmpxchgb r8, r/m8","0F B0 /r","V","V","486","","rw,r","Y","8"
"CMPXCHG r/m8, r8","CMPXCHGB r8, r/m8","cmpxchgb r8, r/m8","REX 0F B0 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"CMPXCHG16B m128","CMPXCHG16B m128","cmpxchg16b m128","REX.W 0F C7 /1","N.E.","V","","modrm_memonly","rw","",""
"CMPXCHG8B m64","CMPXCHG8B m64","cmpxchg8b m64","0F C7 /1","V","V","Pentium","modrm_memonly,operand16,operand32","rw","",""
"COMISD xmm1, xmm2/m64","COMISD xmm2/m64, xmm1","comisd xmm2/m64, xmm1","66 0F 2F /r","V","V","SSE2","","r,r","",""
"COMISS xmm1, xmm2/m32","COMISS xmm2/m32, xmm1","comiss xmm2/m32, xmm1","0F 2F /r","V","V","SSE","","r,r","",""
"CPUID","CPUID","cpuid","0F A2","V","V","486","","","",""
"CQO","CQO","cqto","REX.W 99","N.E.","V","","","","",""
"CRC32 r32, r/m16","CRC32W r/m16, r32","crc32w r/m16, r32","F2 0F 38 F1 /r","V","V","","operand16","rw,r","Y","16"
"CRC32 r32, r/m32","CRC32L r/m32, r32","crc32l r/m32, r32","F2 0F 38 F1 /r","V","V","","operand32","rw,r","Y","32"
"CRC32 r32, r/m8","CRC32B r/m8, r32","crc32b r/m8, r32","F2 0F 38 F0 /r","V","V","","operand16,operand32","rw,r","Y","8"
"CRC32 r32, r/m8","CRC32B r/m8, r32","crc32b r/m8, r32","F2 REX 0F 38 F0 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"CRC32 r64, r/m64","CRC32Q r/m64, r64","crc32q r/m64, r64","F2 REX.W 0F 38 F1 /r","N.E.","V","","","rw,r","Y","64"
"CRC32 r64, r/m8","CRC32B r/m8, r64","crc32b r/m8, r64","F2 REX.W 0F 38 F0 /r","N.E.","V","","","rw,r","Y","8"
"CVTDQ2PD xmm1, xmm2/m64","CVTPL2PD xmm2/m64, xmm1","cvtdq2pd xmm2/m64, xmm1","F3 0F E6 /r","V","V","SSE2","","w,r","",""
"CVTDQ2PS xmm1, xmm2/m128","CVTPL2PS xmm2/m128, xmm1","cvtdq2ps xmm2/m128, xmm1","0F 5B /r","V","V","SSE2","","w,r","",""
"CVTPD2DQ xmm1, xmm2/m128","CVTPD2PL xmm2/m128, xmm1","cvtpd2dq xmm2/m128, xmm1","F2 0F E6 /r","V","V","SSE2","","w,r","",""
"CVTPD2PI mm1, xmm2/m128","CVTPD2PI xmm2/m128, mm1","cvtpd2pi xmm2/m128, mm1","66 0F 2D /r","V","V","","","w,r","",""
"CVTPD2PS xmm1, xmm2/m128","CVTPD2PS xmm2/m128, xmm1","cvtpd2ps xmm2/m128, xmm1","66 0F 5A /r","V","V","SSE2","","w,r","",""
"CVTPI2PD xmm1, mm2/m64","CVTPI2PD mm2/m64, xmm1","cvtpi2pd mm2/m64, xmm1","66 0F 2A /r","V","V","","","w,r","",""
"CVTPI2PS xmm1, mm2/m64","CVTPI2PS mm2/m64, xmm1","cvtpi2ps mm2/m64, xmm1","0F 2A /r","V","V","","","w,r","",""
"CVTPS2DQ xmm1, xmm2/m128","CVTPS2PL xmm2/m128, xmm1","cvtps2dq xmm2/m128, xmm1","66 0F 5B /r","V","V","SSE2","","w,r","",""
"CVTPS2PD xmm1, xmm2/m64","CVTPS2PD xmm2/m64, xmm1","cvtps2pd xmm2/m64, xmm1","0F 5A /r","V","V","SSE2","","w,r","",""
"CVTPS2PI mm1, xmm2/m64","CVTPS2PI xmm2/m64, mm1","cvtps2pi xmm2/m64, mm1","0F 2D /r","V","V","","","w,r","",""
"CVTSD2SI r32, xmm2/m64","CVTSD2SL xmm2/m64, r32","cvtsd2si xmm2/m64, r32","F2 0F 2D /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
"CVTSD2SI r64, xmm2/m64","CVTSD2SL xmm2/m64, r64","cvtsd2siq xmm2/m64, r64","F2 REX.W 0F 2D /r","N.E.","V","SSE2","","w,r","Y","64"
"CVTSD2SS xmm1, xmm2/m64","CVTSD2SS xmm2/m64, xmm1","cvtsd2ss xmm2/m64, xmm1","F2 0F 5A /r","V","V","SSE2","","w,r","",""
"CVTSI2SD xmm1, r/m32","CVTSL2SD r/m32, xmm1","cvtsi2sdl r/m32, xmm1","F2 0F 2A /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
"CVTSI2SD xmm1, r/m64","CVTSQ2SD r/m64, xmm1","cvtsi2sdq r/m64, xmm1","F2 REX.W 0F 2A /r","N.E.","V","SSE2","","w,r","Y","64"
"CVTSI2SS xmm1, r/m32","CVTSL2SS r/m32, xmm1","cvtsi2ssl r/m32, xmm1","F3 0F 2A /r","V","V","SSE","operand16,operand32","w,r","Y","32"
"CVTSI2SS xmm1, r/m64","CVTSQ2SS r/m64, xmm1","cvtsi2ssq r/m64, xmm1","F3 REX.W 0F 2A /r","N.E.","V","SSE","","w,r","Y","64"
"CVTSS2SD xmm1, xmm2/m32","CVTSS2SD xmm2/m32, xmm1","cvtss2sd xmm2/m32, xmm1","F3 0F 5A /r","V","V","SSE2","","w,r","",""
"CVTSS2SI r32, xmm2/m32","CVTSS2SL xmm2/m32, r32","cvtss2si xmm2/m32, r32","F3 0F 2D /r","V","V","SSE","operand16,operand32","w,r","Y","32"
"CVTSS2SI r64, xmm2/m32","CVTSS2SL xmm2/m32, r64","cvtss2siq xmm2/m32, r64","F3 REX.W 0F 2D /r","N.E.","V","SSE","","w,r","Y","64"
"CVTTPD2DQ xmm1, xmm2/m128","CVTTPD2PL xmm2/m128, xmm1","cvttpd2dq xmm2/m128, xmm1","66 0F E6 /r","V","V","SSE2","","w,r","",""
"CVTTPD2PI mm1, xmm2/m128","CVTTPD2PI xmm2/m128, mm1","cvttpd2pi xmm2/m128, mm1","66 0F 2C /r","V","V","","","w,r","",""
"CVTTPS2DQ xmm1, xmm2/m128","CVTTPS2PL xmm2/m128, xmm1","cvttps2dq xmm2/m128, xmm1","F3 0F 5B /r","V","V","SSE2","","w,r","",""
"CVTTPS2PI mm1, xmm2/m64","CVTTPS2PI xmm2/m64, mm1","cvttps2pi xmm2/m64, mm1","0F 2C /r","V","V","","","w,r","",""
"CVTTSD2SI r32, xmm2/m64","CVTTSD2SL xmm2/m64, r32","cvttsd2si xmm2/m64, r32","F2 0F 2C /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
"CVTTSD2SI r64, xmm2/m64","CVTTSD2SL xmm2/m64, r64","cvttsd2siq xmm2/m64, r64","F2 REX.W 0F 2C /r","N.E.","V","SSE2","","w,r","Y","64"
"CVTTSS2SI r32, xmm2/m32","CVTTSS2SL xmm2/m32, r32","cvttss2si xmm2/m32, r32","F3 0F 2C /r","V","V","SSE","operand16,operand32","w,r","Y","32"
"CVTTSS2SI r64, xmm2/m32","CVTTSS2SL xmm2/m32, r64","cvttss2siq xmm2/m32, r64","F3 REX.W 0F 2C /r","N.E.","V","SSE","","w,r","Y","64"
"CWD","CWD","cwtd","99","V","V","","operand16","","",""
"CWDE","CWDE","cwtl","98","V","V","","operand32","","",""
"DAA","DAA","daa","27","V","I","","","","",""
"DAS","DAS","das","2F","V","I","","","","",""
"DEC r/m16","DECW r/m16","decw r/m16","FF /1","V","V","","operand16","rw","Y","16"
"DEC r/m32","DECL r/m32","decl r/m32","FF /1","V","V","","operand32","rw","Y","32"
"DEC r/m64","DECQ r/m64","decq r/m64","REX.W FF /1","N.E.","V","","","rw","Y","64"
"DEC r/m8","DECB r/m8","decb r/m8","FE /1","V","V","","","rw","Y","8"
"DEC r/m8","DECB r/m8","decb r/m8","REX FE /1","N.E.","V","","pseudo64","rw","Y","8"
"DEC r16op","DECW r16op","decw r16op","48+rw","V","N.E.","","operand16","rw","Y","16"
"DEC r32op","DECL r32op","decl r32op","48+rd","V","N.E.","","operand32","rw","Y","32"
"DIV r/m16","DIVW r/m16","divw r/m16","F7 /6","V","V","","operand16","w","Y","16"
"DIV r/m32","DIVL r/m32","divl r/m32","F7 /6","V","V","","operand32","w","Y","32"
"DIV r/m64","DIVQ r/m64","divq r/m64","REX.W F7 /6","N.E.","V","","","w","Y","64"
"DIV r/m8","DIVB r/m8","divb r/m8","F6 /6","V","V","","","w","Y","8"
"DIV r/m8","DIVB r/m8","divb r/m8","REX F6 /6","N.E.","V","","pseudo64","w","Y","8"
"DIVPD xmm1, xmm2/m128","DIVPD xmm2/m128, xmm1","divpd xmm2/m128, xmm1","66 0F 5E /r","V","V","SSE2","","rw,r","",""
"DIVPS xmm1, xmm2/m128","DIVPS xmm2/m128, xmm1","divps xmm2/m128, xmm1","0F 5E /r","V","V","SSE","","rw,r","",""
"DIVSD xmm1, xmm2/m64","DIVSD xmm2/m64, xmm1","divsd xmm2/m64, xmm1","F2 0F 5E /r","V","V","SSE2","","rw,r","",""
"DIVSS xmm1, xmm2/m32","DIVSS xmm2/m32, xmm1","divss xmm2/m32, xmm1","F3 0F 5E /r","V","V","SSE","","rw,r","",""
"DPPD xmm1, xmm2/m128, imm8","DPPD imm8, xmm2/m128, xmm1","dppd imm8, xmm2/m128, xmm1","66 0F 3A 41 /r ib","V","V","SSE4_1","","rw,r,r","",""
"DPPS xmm1, xmm2/m128, imm8","DPPS imm8, xmm2/m128, xmm1","dpps imm8, xmm2/m128, xmm1","66 0F 3A 40 /r ib","V","V","SSE4_1","","rw,r,r","",""
"EMMS","EMMS","emms","0F 77","V","V","","","","",""
"ENTER imm16, 0","ENTER 0, imm16","enter imm16, 0","C8 iw 00","V","V","","pseudo","r,r","",""
"ENTER imm16, 1","ENTER 1, imm16","enter imm16, 1","C8 iw 01","V","V","","pseudo","r,r","",""
"ENTER imm16, imm8b","ENTERW/ENTERL/ENTERQ imm8b, imm16","enterw/enterl/enterq imm16, imm8b","C8 iw ib","V","V","","","r,r","",""
"EXTRACTPS r/m32, xmm1, imm8","EXTRACTPS imm8, xmm1, r/m32","extractps imm8, xmm1, r/m32","66 0F 3A 17 /r ib","V","V","SSE4_1","","w,r,r","",""
"F2XM1","F2XM1","f2xm1","D9 F0","V","V","","","","",""
"FABS","FABS","fabs","D9 E1","V","V","","","","",""
"FADD ST(0), ST(i)","FADDD ST(i), ST(0)","fadd ST(i), ST(0)","D8 C0+i","V","V","","","rw,r","Y",""
"FADD ST(i), ST(0)","FADDD ST(0), ST(i)","fadd ST(0), ST(i)","DC C0+i","V","V","","","rw,r","Y",""
"FADD m32fp","FADDD m32fp","fadds m32fp","D8 /0","V","V","","","r","Y","32"
"FADD m64fp","FADDD m64fp","faddl m64fp","DC /0","V","V","","","r","Y","64"
"FADDP","FADDDP","faddp","DE C1","V","V","","pseudo","","",""
"FADDP ST(i), ST(0)","FADDDP ST(0), ST(i)","faddp ST(0), ST(i)","DE C0+i","V","V","","","rw,r","",""
"FBLD m80dec","FBLD m80dec","fbld m80dec","DF /4","V","V","","","r","",""
"FBSTP m80bcd","FBSTP m80bcd","fbstp m80bcd","DF /6","V","V","","","w","",""
"FCHS","FCHS","fchs","D9 E0","V","V","","","","",""
"FCLEX","FCLEX","fclex","9B DB E2","V","V","","pseudo","","",""
"FCMOVB ST(0), ST(i)","FCMOVB ST(i), ST(0)","fcmovb ST(i), ST(0)","DA C0+i","V","V","","P6","rw,r","",""
"FCMOVBE ST(0), ST(i)","FCMOVBE ST(i), ST(0)","fcmovbe ST(i), ST(0)","DA D0+i","V","V","","P6","rw,r","",""
"FCMOVE ST(0), ST(i)","FCMOVE ST(i), ST(0)","fcmove ST(i), ST(0)","DA C8+i","V","V","","P6","rw,r","",""
"FCMOVNB ST(0), ST(i)","FCMOVNB ST(i), ST(0)","fcmovnb ST(i), ST(0)","DB C0+i","V","V","","P6","rw,r","",""
"FCMOVNBE ST(0), ST(i)","FCMOVNBE ST(i), ST(0)","fcmovnbe ST(i), ST(0)","DB D0+i","V","V","","P6","rw,r","",""
"FCMOVNE ST(0), ST(i)","FCMOVNE ST(i), ST(0)","fcmovne ST(i), ST(0)","DB C8+i","V","V","","P6","rw,r","",""
"FCMOVNU ST(0), ST(i)","FCMOVNU ST(i), ST(0)","fcmovnu ST(i), ST(0)","DB D8+i","V","V","","P6","rw,r","",""
"FCMOVU ST(0), ST(i)","FCMOVU ST(i), ST(0)","fcmovu ST(i), ST(0)","DA D8+i","V","V","","P6","rw,r","",""
"FCOM","FCOMD","fcom","D8 D1","V","V","","pseudo","","Y",""
"FCOM ST(i)","FCOMD ST(i)","fcom ST(i)","D8 D0+i","V","V","","","r","Y",""
"FCOM m32fp","FCOMD m32fp","fcoms m32fp","D8 /2","V","V","","","r","Y","32"
"FCOM m64fp","FCOMD m64fp","fcoml m64fp","DC /2","V","V","","","r","Y","64"
"FCOMI ST(0), ST(i)","FCOMI ST(i), ST(0)","fcomi ST(i), ST(0)","DB F0+i","V","V","","P6","r,r","",""
"FCOMIP ST(0), ST(i)","FCOMIP ST(i), ST(0)","fcomip ST(i), ST(0)","DF F0+i","V","V","","P6","r,r","",""
"FCOMP","FCOMP","fcomp","D8 D9","V","V","","pseudo","","Y",""
"FCOMP ST(i)","FCOMP ST(i)","fcomp ST(i)","D8 D8+i","V","V","","","r","Y",""
"FCOMP m32fp","FCOMFP m32fp","fcomps m32fp","D8 /3","V","V","","","r","Y","32"
"FCOMP m64fp","FCOMPL m64fp","fcompl m64fp","DC /3","V","V","","","r","Y","64"
"FCOMPP","FCOMPP","fcompp","DE D9","V","V","","","","",""
"FCOS","FCOS","fcos","D9 FF","V","V","","","","",""
"FDECSTP","FDECSTP","fdecstp","D9 F6","V","V","","","","",""
"FDIV ST(0), ST(i)","FDIVD ST(i), ST(0)","fdiv ST(i), ST(0)","D8 F0+i","V","V","","","rw,r","Y",""
"FDIV ST(i), ST(0)","FDIVD ST(0), ST(i)","fdivr ST(0), ST(i)","DC F8+i","V","V","","","rw,r","Y",""
"FDIV m32fp","FDIVD m32fp","fdivs m32fp","D8 /6","V","V","","","r","Y","32"
"FDIV m64fp","FDIVD m64fp","fdivl m64fp","DC /6","V","V","","","r","Y","64"
"FDIVP","FDIVP","fdivp","DE F9","V","V","","pseudo","","",""
"FDIVP ST(i), ST(0)","FDIVRP ST(0), ST(i)","fdivrp ST(0), ST(i)","DE F8+i","V","V","","","rw,r","",""
"FDIVR ST(0), ST(i)","FDIVR ST(i), ST(0)","fdivr ST(i), ST(0)","D8 F8+i","V","V","","","rw,r","Y",""
"FDIVR ST(i), ST(0)","FDIVD ST(0), ST(i)","fdiv ST(0), ST(i)","DC F0+i","V","V","","","rw,r","Y",""
"FDIVR m32fp","FDIVFR m32fp","fdivrs m32fp","D8 /7","V","V","","","r","Y","32"
"FDIVR m64fp","FDIVRL m64fp","fdivrl m64fp","DC /7","V","V","","","r","Y","64"
"FDIVRP","FDIVRP","fdivrp","DE F1","V","V","","pseudo","","",""
"FDIVRP ST(i), ST(0)","FDIVP ST(0), ST(i)","fdivp ST(0), ST(i)","DE F0+i","V","V","","","rw,r","",""
"FFREE ST(i)","FFREE ST(i)","ffree ST(i)","DD C0+i","V","V","","","w","",""
"FFREEP ST(i)","FFREEP ST(i)","ffreep ST(i)","DF C0+i","V","V","","","w","",""
"FIADD m16int","FIADD m16int","fiadd m16int","DE /0","V","V","","","r","Y",""
"FIADD m32int","FIADDL m32int","fiaddl m32int","DA /0","V","V","","","r","Y","32"
"FICOM m16int","FICOM m16int","ficom m16int","DE /2","V","V","","","r","Y",""
"FICOM m32int","FICOML m32int","ficoml m32int","DA /2","V","V","","","r","Y","32"
"FICOMP m16int","FICOMP m16int","ficomp m16int","DE /3","V","V","","","r","Y",""
"FICOMP m32int","FICOMPL m32int","ficompl m32int","DA /3","V","V","","","r","Y","32"
"FIDIV m16int","FIDIV m16int","fidiv m16int","DE /6","V","V","","","r","Y",""
"FIDIV m32int","FIDIVL m32int","fidivl m32int","DA /6","V","V","","","r","Y","32"
"FIDIVR m16int","FIDIVR m16int","fidivr m16int","DE /7","V","V","","","r","Y",""
"FIDIVR m32int","FIDIVRL m32int","fidivrl m32int","DA /7","V","V","","","r","Y","32"
"FILD m16int","FILD m16int","fild m16int","DF /0","V","V","","","r","Y",""
"FILD m32int","FILDL m32int","fildl m32int","DB /0","V","V","","","r","Y","32"
"FILD m64int","FILDLL m64int","fildll m64int","DF /5","V","V","","","r","Y","64"
"FIMUL m16int","FIMUL m16int","fimul m16int","DE /1","V","V","","","r","Y",""
"FIMUL m32int","FIMULL m32int","fimull m32int","DA /1","V","V","","","r","Y","32"
"FINCSTP","FINCSTP","fincstp","D9 F7","V","V","","","","",""
"FINIT","FINIT","finit","9B DB E3","V","V","","pseudo","","",""
"FIST m16int","FIST m16int","fist m16int","DF /2","V","V","","","w","Y",""
"FIST m32int","FISTL m32int","fistl m32int","DB /2","V","V","","","w","Y","32"
"FISTP m16int","FISTP m16int","fistp m16int","DF /3","V","V","","","w","Y",""
"FISTP m32int","FISTPL m32int","fistpl m32int","DB /3","V","V","","","w","Y","32"
"FISTP m64int","FISTPLL m64int","fistpll m64int","DF /7","V","V","","","w","Y","64"
"FISTTP m16int","FISTTP m16int","fisttp m16int","DF /1","V","V","","","w","Y",""
"FISTTP m32int","FISTTPL m32int","fisttpl m32int","DB /1","V","V","","","w","Y","32"
"FISTTP m64int","FISTTPLL m64int","fisttpll m64int","DD /1","V","V","","","w","Y","64"
"FISUB m16int","FISUB m16int","fisub m16int","DE /4","V","V","","","r","Y",""
"FISUB m32int","FISUBL m32int","fisubl m32int","DA /4","V","V","","","r","Y","32"
"FISUBR m16int","FISUBR m16int","fisubr m16int","DE /5","V","V","","","r","Y",""
"FISUBR m32int","FISUBRL m32int","fisubrl m32int","DA /5","V","V","","","r","Y","32"
"FLD ST(i)","FLD ST(i)","fld ST(i)","D9 C0+i","V","V","","","r","Y",""
"FLD m32fp","FLDS m32fp","flds m32fp","D9 /0","V","V","","","r","Y","32"
"FLD m64fp","FLDL m64fp","fldl m64fp","DD /0","V","V","","","r","Y","64"
"FLD m80fp","FLDT m80fp","fldt m80fp","DB /5","V","V","","","r","Y","80"
"FLD1","FLD1","fld1","D9 E8","V","V","","","","",""
"FLDCW m2byte","FLDCW m2byte","fldcw m2byte","D9 /5","V","V","","","r","",""
"FLDENV m14/28byte","FLDENVS/FLDENVL m14/28byte","fldenvs/fldenvl m14/28byte","D9 /4","V","V","","","r","",""
"FLDL2E","FLDL2E","fldl2e","D9 EA","V","V","","","","",""
"FLDL2T","FLDL2T","fldl2t","D9 E9","V","V","","","","",""
"FLDLG2","FLDLG2","fldlg2","D9 EC","V","V","","","","",""
"FLDPI","FLDPI","fldpi","D9 EB","V","V","","","","",""
"FMUL ST(0), ST(i)","FMUL ST(i), ST(0)","fmul ST(i), ST(0)","D8 C8+i","V","V","","","rw,r","Y",""
"FMUL ST(i), ST(0)","FMUL ST(0), ST(i)","fmul ST(0), ST(i)","DC C8+i","V","V","","","rw,r","Y",""
"FMUL m32fp","FMULS m32fp","fmuls m32fp","D8 /1","V","V","","","r","Y","32"
"FMUL m64fp","FMULL m64fp","fmull m64fp","DC /1","V","V","","","r","Y","64"
"FMULP","FMULP","fmulp","DE C9","V","V","","pseudo","","",""
"FMULP ST(i), ST(0)","FMULP ST(0), ST(i)","fmulp ST(0), ST(i)","DE C8+i","V","V","","","rw,r","",""
"FNCLEX","FNCLEX","fnclex","DB E2","V","V","","","","",""
"FNINIT","FNINIT","fninit","DB E3","V","V","","","","",""
"FNOP","FNOP","fnop","D9 D0","V","V","","","","",""
"FNSAVE m94/108byte","FNSAVES/FNSAVEL m94/108byte","fnsaves/fnsavel m94/108byte","DD /6","V","V","","","w","",""
"FNSTCW m2byte","FNSTCW m2byte","fnstcw m2byte","D9 /7","V","V","","","w","",""
"FNSTENV m14/28byte","FNSTENVS/FNSTENVL m14/28byte","fnstenvs/fnstenvl m14/28byte","D9 /6","V","V","","","w","",""
"FNSTSW AX","FNSTSW AX","fnstsw AX","DF E0","V","V","","","w","",""
"FNSTSW m2byte","FNSTSW m2byte","fnstsw m2byte","DD /7","V","V","","","w","",""
"FPATAN","FPATAN","fpatan","D9 F3","V","V","","","","",""
"FPREM","FPREM","fprem","D9 F8","V","V","","","","",""
"FPREM1","FPREM1","fprem1","D9 F5","V","V","","","","",""
"FPTAN","FPTAN","fptan","D9 F2","V","V","","","","",""
"FRNDINT","FRNDINT","frndint","D9 FC","V","V","","","","",""
"FRSTOR m94/108byte","FRSTORS/FRSTORL m94/108byte","frstors/frstorl m94/108byte","DD /4","V","V","","","r","",""
"FSAVE m94/108byte","FSAVE m94/108byte","fsave m94/108byte","9B DD /6","V","V","","pseudo","w","",""
"FSCALE","FSCALE","fscale","D9 FD","V","V","","","","",""
"FSIN","FSIN","fsin","D9 FE","V","V","","","","",""
"FSINCOS","FSINCOS","fsincos","D9 FB","V","V","","","","",""
"FSQRT","FSQRT","fsqrt","D9 FA","V","V","","","","",""
"FST ST(i)","FST ST(i)","fst ST(i)","DD D0+i","V","V","","","w","Y",""
"FST m32fp","FSTS m32fp","fsts m32fp","D9 /2","V","V","","","w","Y","32"
"FST m64fp","FSTL m64fp","fstl m64fp","DD /2","V","V","","","w","Y","64"
"FSTCW m2byte","FSTCW m2byte","fstcw m2byte","9B D9 /7","V","V","","pseudo","w","",""
"FSTENV m14/28byte","FSTENV m14/28byte","fstenv m14/28byte","9B D9 /6","V","V","","pseudo","w","",""
"FSTP ST(i)","FSTP ST(i)","fstp ST(i)","DD D8+i","V","V","","","w","Y",""
"FSTP m32fp","FSTPS m32fp","fstps m32fp","D9 /3","V","V","","","w","Y","32"
"FSTP m64fp","FSTPL m64fp","fstpl m64fp","DD /3","V","V","","","w","Y","64"
"FSTP m80fp","FSTPT m80fp","fstpt m80fp","DB /7","V","V","","","w","Y","80"
"FSTSW AX","FSTSW AX","fstsw AX","9B DF E0","V","V","","pseudo","w","",""
"FSTSW m2byte","FSTSW m2byte","fstsw m2byte","9B DD /7","V","V","","pseudo","w","",""
"FSUB ST(0), ST(i)","FSUB ST(i), ST(0)","fsub ST(i), ST(0)","D8 E0+i","V","V","","","rw,r","Y",""
"FSUB ST(i), ST(0)","FSUBR ST(0), ST(i)","fsubr ST(0), ST(i)","DC E8+i","V","V","","","rw,r","Y",""
"FSUB m32fp","FSUBS m32fp","fsubs m32fp","D8 /4","V","V","","","r","Y","32"
"FSUB m64fp","FSUBL m64fp","fsubl m64fp","DC /4","V","V","","","r","Y","64"
"FSUBP","FSUBP","fsubp","DE E9","V","V","","pseudo","","",""
"FSUBP ST(i), ST(0)","FSUBRP ST(0), ST(i)","fsubrp ST(0), ST(i)","DE E8+i","V","V","","","rw,r","",""
"FSUBR ST(0), ST(i)","FSUBR ST(i), ST(0)","fsubr ST(i), ST(0)","D8 E8+i","V","V","","","rw,r","Y",""
"FSUBR ST(i), ST(0)","FSUB ST(0), ST(i)","fsub ST(0), ST(i)","DC E0+i","V","V","","","rw,r","Y",""
"FSUBR m32fp","FSUBRS m32fp","fsubrs m32fp","D8 /5","V","V","","","r","Y","32"
"FSUBR m64fp","FSUBRL m64fp","fsubrl m64fp","DC /5","V","V","","","r","Y","64"
"FSUBRP","FSUBRP","fsubrp","DE E1","V","V","","pseudo","","",""
"FSUBRP ST(i), ST(0)","FSUBP ST(0), ST(i)","fsubp ST(0), ST(i)","DE E0+i","V","V","","","rw,r","",""
"FTST","FTST","ftst","D9 E4","V","V","","","","",""
"FUCOM","FUCOM","fucom","DD E1","V","V","","pseudo","","",""
"FUCOM ST(i)","FUCOM ST(i)","fucom ST(i)","DD E0+i","V","V","","","r","",""
"FUCOMI ST(0), ST(i)","FUCOMI ST(i), ST(0)","fucomi ST(i), ST(0)","DB E8+i","V","V","","P6","r,r","",""
"FUCOMIP ST(0), ST(i)","FUCOMIP ST(i), ST(0)","fucomip ST(i), ST(0)","DF E8+i","V","V","","P6","r,r","",""
"FUCOMP","FUCOMP","fucomp","DD E9","V","V","","pseudo","","",""
"FUCOMP ST(i)","FUCOMP ST(i)","fucomp ST(i)","DD E8+i","V","V","","","r","",""
"FUCOMPP","FUCOMPP","fucompp","DA E9","V","V","","","","",""
"FWAIT","FWAIT","fwait","9B","V","V","","","","",""
"FXAM","FXAM","fxam","D9 E5","V","V","","","","",""
"FXCH","FXCH","fxch","D9 C9","V","V","","pseudo","","",""
"FXCH ST(i)","FXCH ST(i)","fxch ST(i)","D9 C8+i","V","V","","","rw","",""
"FXRSTOR m512byte","FXRSTOR m512byte","fxrstor m512byte","0F AE /1","V","V","","operand16,operand32","r","",""
"FXRSTOR64 m512byte","FXRSTOR64 m512byte","fxrstor64 m512byte","REX.W 0F AE /1","N.E.","V","","","r","",""
"FXSAVE m512byte","FXSAVE m512byte","fxsave m512byte","0F AE /0","V","V","","operand16,operand32","w","",""
"FXSAVE64 m512byte","FXSAVE64 m512byte","fxsave64 m512byte","REX.W 0F AE /0","N.E.","V","","","w","",""
"FXTRACT","FXTRACT","fxtract","D9 F4","V","V","","","","",""
"FYL2X","FYL2X","fyl2x","D9 F1","V","V","","","","",""
"FYL2XP1","FYL2XP1","fyl2xp1","D9 F9","V","V","","","","",""
"HADDPD xmm1, xmm2/m128","HADDPD xmm2/m128, xmm1","haddpd xmm2/m128, xmm1","66 0F 7C /r","V","V","SSE3","","rw,r","",""
"HADDPS xmm1, xmm2/m128","HADDPS xmm2/m128, xmm1","haddps xmm2/m128, xmm1","F2 0F 7C /r","V","V","SSE3","","rw,r","",""
"HLT","HLT","hlt","F4","V","V","","","","",""
"HSUBPD xmm1, xmm2/m128","HSUBPD xmm2/m128, xmm1","hsubpd xmm2/m128, xmm1","66 0F 7D /r","V","V","SSE3","","rw,r","",""
"HSUBPS xmm1, xmm2/m128","HSUBPS xmm2/m128, xmm1","hsubps xmm2/m128, xmm1","F2 0F 7D /r","V","V","SSE3","","rw,r","",""
"ICEBP","ICEBP","icebp","F1","V","V","","","","",""
"IDIV r/m16","IDIVW r/m16","idivw r/m16","F7 /7","V","V","","operand16","r","Y","16"
"IDIV r/m32","IDIVL r/m32","idivl r/m32","F7 /7","V","V","","operand32","r","Y","32"
"IDIV r/m64","IDIVQ r/m64","idivq r/m64","REX.W F7 /7","N.E.","V","","","r","Y","64"
"IDIV r/m8","IDIVB r/m8","idivb r/m8","F6 /7","V","V","","","r","Y","8"
"IDIV r/m8","IDIVB r/m8","idivb r/m8","REX F6 /7","N.E.","V","","pseudo64","r","Y","8"
"IMUL r/m16","IMULW r/m16","imulw r/m16","F7 /5","V","V","","operand16","rw","Y","16"
"IMUL r/m32","IMULL r/m32","imull r/m32","F7 /5","V","V","","operand32","rw","Y","32"
"IMUL r/m64","IMULQ r/m64","imulq r/m64","REX.W F7 /5","N.E.","V","","","rw","Y","64"
"IMUL r/m8","IMULB r/m8","imulb r/m8","F6 /5","V","V","","","rw","Y","8"
"IMUL r16, r/m16","IMULW r/m16, r16","imulw r/m16, r16","0F AF /r","V","V","","operand16","rw,r","Y","16"
"IMUL r16, r/m16, imm16","IMULW imm16, r/m16, r16","imulw imm16, r/m16, r16","69 /r iw","V","V","","operand16","rw,r,r","Y","16"
"IMUL r16, r/m16, imm8","IMULW imm8, r/m16, r16","imulw imm8, r/m16, r16","6B /r ib","V","V","","operand16","rw,r,r","Y","16"
"IMUL r32, r/m32","IMULL r/m32, r32","imull r/m32, r32","0F AF /r","V","V","","operand32","rw,r","Y","32"
"IMUL r32, r/m32, imm32","IMULL imm32, r/m32, r32","imull imm32, r/m32, r32","69 /r id","V","V","","operand32","rw,r,r","Y","32"
"IMUL r32, r/m32, imm8","IMULL imm8, r/m32, r32","imull imm8, r/m32, r32","6B /r ib","V","V","","operand32","rw,r,r","Y","32"
"IMUL r64, r/m64","IMULQ r/m64, r64","imulq r/m64, r64","REX.W 0F AF /r","N.E.","V","","","rw,r","Y","64"
"IMUL r64, r/m64, imm32","IMULQ imm32, r/m64, r64","imulq imm32, r/m64, r64","REX.W 69 /r id","N.E.","V","","","rw,r,r","Y","64"
"IMUL r64, r/m64, imm8","IMULQ imm8, r/m64, r64","imulq imm8, r/m64, r64","REX.W 6B /r ib","N.E.","V","","","rw,r,r","Y","64"
"IN AL, DX","INB DX, AL","inb DX, AL","EC","V","V","","","w,r","Y","8"
"IN AL, imm8u","INB imm8u, AL","inb imm8u, AL","E4 ib","V","V","","","w,r","Y","8"
"IN AX, DX","INW DX, AX","inw DX, AX","ED","V","V","","operand16","w,r","Y","16"
"IN AX, imm8u","INW imm8u, AX","inw imm8u, AX","E5 ib","V","V","","operand16","w,r","Y","16"
"IN EAX, DX","INL DX, EAX","inl DX, EAX","ED","V","V","","operand32,operand64","w,r","Y","32"
"IN EAX, imm8u","INL imm8u, EAX","inl imm8u, EAX","E5 ib","V","V","","operand32,operand64","w,r","Y","32"
"INC r/m16","INCW r/m16","incw r/m16","FF /0","V","V","","operand16","rw","Y","16"
"INC r/m32","INCL r/m32","incl r/m32","FF /0","V","V","","operand32","rw","Y","32"
"INC r/m64","INCQ r/m64","incq r/m64","REX.W FF /0","N.E.","V","","","rw","Y","64"
"INC r/m8","INCB r/m8","incb r/m8","FE /0","V","V","","","rw","Y","8"
"INC r/m8","INCB r/m8","incb r/m8","REX FE /0","N.E.","V","","pseudo64","rw","Y","8"
"INC r16op","INCW r16op","incw r16op","40+rw","V","N.E.","","operand16","rw","Y","16"
"INC r32op","INCL r32op","incl r32op","40+rd","V","N.E.","","operand32","rw","Y","32"
"INSB","INSB","insb","6C","V","V","","","","",""
"INSD","INSL","insl","6D","V","V","","operand32,operand64","","",""
"INSERTPS xmm1, xmm2/m32, imm8","INSERTPS imm8, xmm2/m32, xmm1","insertps imm8, xmm2/m32, xmm1","66 0F 3A 21 /r ib","V","V","SSE4_1","","w,r,r","",""
"INSW","INSW","insw","6D","V","V","","operand16","","",""
"INT 3","INT 3","int 3","CC","V","V","","","r","",""
"INT imm8","INT imm8","int imm8","CD ib","V","V","","","r","",""
"INTO","INTO","into","CE","V","I","","","","",""
"INVD","INVD","invd","0F 08","V","V","486","","","",""
"INVLPG m","INVLPG m","invlpg m","0F 01 /7","V","V","486","","r","",""
"INVPCID r32, m128","INVPCID m128, r32","invpcid m128, r32","66 0F 38 82 /r","V","N.E.","INVPCID","modrm_memonly","r,r","",""
"INVPCID r64, m128","INVPCID m128, r64","invpcid m128, r64","66 0F 38 82 /r","N.E.","V","INVPCID","modrm_memonly","r,r","",""
"IRET","IRETW","iretw","CF","V","V","","operand16","","",""
"IRETD","IRETL","iretl","CF","V","V","","operand32","","",""
"IRETQ","IRETQ","iretq","REX.W CF","N.E.","V","","","","",""
"JA rel16","JA rel16","ja rel16","0F 87 cw","V","N.S.","","operand16","r","Y",""
"JA rel32","JA rel32","ja rel32","0F 87 cd","N.S.","V","","operand16,operand64","r","Y",""
"JA rel32","JA rel32","ja rel32","0F 87 cd","V","V","","operand32","r","Y",""
"JA rel8","JA rel8","ja rel8","77 cb","V","V","","","r","Y",""
"JAE rel16","JAE rel16","jae rel16","0F 83 cw","V","N.S.","","operand16","r","Y",""
"JAE rel32","JAE rel32","jae rel32","0F 83 cd","V","V","","operand32","r","Y",""
"JAE rel32","JAE rel32","jae rel32","0F 83 cd","N.S.","V","","operand16,operand64","r","Y",""
"JAE rel8","JAE rel8","jae rel8","73 cb","V","V","","","r","Y",""
"JB rel16","JB rel16","jb rel16","0F 82 cw","V","N.S.","","operand16","r","Y",""
"JB rel32","JB rel32","jb rel32","0F 82 cd","N.S.","V","","operand16,operand64","r","Y",""
"JB rel32","JB rel32","jb rel32","0F 82 cd","V","V","","operand32","r","Y",""
"JB rel8","JB rel8","jb rel8","72 cb","V","V","","","r","Y",""
"JBE rel16","JBE rel16","jbe rel16","0F 86 cw","V","N.S.","","operand16","r","Y",""
"JBE rel32","JBE rel32","jbe rel32","0F 86 cd","V","V","","operand32","r","Y",""
"JBE rel32","JBE rel32","jbe rel32","0F 86 cd","N.S.","V","","operand16,operand64","r","Y",""
"JBE rel8","JBE rel8","jbe rel8","76 cb","V","V","","","r","Y",""
"JC rel16","JC rel16","jc rel16","0F 82 cw","V","N.S.","","pseudo","r","",""
"JC rel32","JC rel32","jc rel32","0F 82 cd","V","V","","pseudo","r","",""
"JC rel8","JC rel8","jc rel8","72 cb","V","V","","pseudo","r","",""
"JCXZ rel8","JCXZ rel8","jcxz rel8","E3 cb","V","N.E.","","address16","r","",""
"JE rel16","JE rel16","je rel16","0F 84 cw","V","N.S.","","operand16","r","Y",""
"JE rel32","JE rel32","je rel32","0F 84 cd","N.S.","V","","operand16,operand64","r","Y",""
"JE rel32","JE rel32","je rel32","0F 84 cd","V","V","","operand32","r","Y",""
"JE rel8","JE rel8","je rel8","74 cb","V","V","","","r","Y",""
"JECXZ rel8","JECXZ rel8","jecxz rel8","E3 cb","V","V","","address32","r","",""
"JG rel16","JG rel16","jg rel16","0F 8F cw","V","N.S.","","operand16","r","Y",""
"JG rel32","JG rel32","jg rel32","0F 8F cd","V","V","","operand32","r","Y",""
"JG rel32","JG rel32","jg rel32","0F 8F cd","N.S.","V","","operand16,operand64","r","Y",""
"JG rel8","JG rel8","jg rel8","7F cb","V","V","","","r","Y",""
"JGE rel16","JGE rel16","jge rel16","0F 8D cw","V","N.S.","","operand16","r","Y",""
"JGE rel32","JGE rel32","jge rel32","0F 8D cd","N.S.","V","","operand16,operand64","r","Y",""
"JGE rel32","JGE rel32","jge rel32","0F 8D cd","V","V","","operand32","r","Y",""
"JGE rel8","JGE rel8","jge rel8","7D cb","V","V","","","r","Y",""
"JL rel16","JL rel16","jl rel16","0F 8C cw","V","N.S.","","operand16","r","Y",""
"JL rel32","JL rel32","jl rel32","0F 8C cd","V","V","","operand32","r","Y",""
"JL rel32","JL rel32","jl rel32","0F 8C cd","N.S.","V","","operand16,operand64","r","Y",""
"JL rel8","JL rel8","jl rel8","7C cb","V","V","","","r","Y",""
"JLE rel16","JLE rel16","jle rel16","0F 8E cw","V","N.S.","","operand16","r","Y",""
"JLE rel32","JLE rel32","jle rel32","0F 8E cd","V","V","","operand32","r","Y",""
"JLE rel32","JLE rel32","jle rel32","0F 8E cd","N.S.","V","","operand16,operand64","r","Y",""
"JLE rel8","JLE rel8","jle rel8","7E cb","V","V","","","r","Y",""
"JMP r/m16","JMPW* r/m16","jmpw* r/m16","FF /4","V","N.S.","","operand16","r","Y","16"
"JMP r/m32","JMPL* r/m32","jmpl* r/m32","FF /4","V","N.S.","","operand32","r","Y","32"
"JMP r/m64","JMPQ* r/m64","jmpq* r/m64","FF /4","N.E.","V","","","r","Y","64"
"JMP rel16","JMP rel16","jmp rel16","E9 cw","V","N.S.","","operand16","r","Y",""
"JMP rel32","JMP rel32","jmp rel32","E9 cd","N.S.","V","","operand16,operand64","r","Y",""
"JMP rel32","JMP rel32","jmp rel32","E9 cd","V","V","","operand32","r","Y",""
"JMP rel8","JMP rel8","jmp rel8","EB cb","V","V","","","r","Y",""
"JMP_FAR m16:16","LJMPW* m16:16","ljmpw* m16:16","FF /5","V","V","","operand16","r","Y",""
"JMP_FAR m16:32","LJMPL* m16:32","ljmpl* m16:32","FF /5","V","V","","operand32","r","Y",""
"JMP_FAR m16:64","LJMPQ* m16:64","ljmpq* m16:64","REX.W FF /5","N.E.","V","","","r","Y",""
"JMP_FAR ptr16:16","LJMPW ptr16:16","ljmpw ptr16:16","EA cd","V","I","","operand16","r","Y",""
"JMP_FAR ptr16:32","LJMPL ptr16:32","ljmpl ptr16:32","EA cp","V","I","","operand32","r","Y",""
"JNA rel16","JNA rel16","jna rel16","0F 86 cw","V","N.S.","","pseudo","r","",""
"JNA rel32","JNA rel32","jna rel32","0F 86 cd","V","V","","pseudo","r","",""
"JNA rel8","JNA rel8","jna rel8","76 cb","V","V","","pseudo","r","",""
"JNAE rel16","JNAE rel16","jnae rel16","0F 82 cw","V","N.S.","","pseudo","r","",""
"JNAE rel32","JNAE rel32","jnae rel32","0F 82 cd","V","V","","pseudo","r","",""
"JNAE rel8","JNAE rel8","jnae rel8","72 cb","V","V","","pseudo","r","",""
"JNB rel16","JNB rel16","jnb rel16","0F 83 cw","V","N.S.","","pseudo","r","",""
"JNB rel32","JNB rel32","jnb rel32","0F 83 cd","V","V","","pseudo","r","",""
"JNB rel8","JNB rel8","jnb rel8","73 cb","V","V","","pseudo","r","",""
"JNBE rel16","JNBE rel16","jnbe rel16","0F 87 cw","V","N.S.","","pseudo","r","",""
"JNBE rel32","JNBE rel32","jnbe rel32","0F 87 cd","V","V","","pseudo","r","",""
"JNBE rel8","JNBE rel8","jnbe rel8","77 cb","V","V","","pseudo","r","",""
"JNC rel16","JNC rel16","jnc rel16","0F 83 cw","V","N.S.","","pseudo","r","",""
"JNC rel32","JNC rel32","jnc rel32","0F 83 cd","V","V","","pseudo","r","",""
"JNC rel8","JNC rel8","jnc rel8","73 cb","V","V","","pseudo","r","",""
"JNE rel16","JNE rel16","jne rel16","0F 85 cw","V","N.S.","","operand16","r","Y",""
"JNE rel32","JNE rel32","jne rel32","0F 85 cd","N.S.","V","","operand16,operand64","r","Y",""
"JNE rel32","JNE rel32","jne rel32","0F 85 cd","V","V","","operand32","r","Y",""
"JNE rel8","JNE rel8","jne rel8","75 cb","V","V","","","r","Y",""
"JNG rel16","JNG rel16","jng rel16","0F 8E cw","V","N.S.","","pseudo","r","",""
"JNG rel32","JNG rel32","jng rel32","0F 8E cd","V","V","","pseudo","r","",""
"JNG rel8","JNG rel8","jng rel8","7E cb","V","V","","pseudo","r","",""
"JNGE rel16","JNGE rel16","jnge rel16","0F 8C cw","V","N.S.","","pseudo","r","",""
"JNGE rel32","JNGE rel32","jnge rel32","0F 8C cd","V","V","","pseudo","r","",""
"JNGE rel8","JNGE rel8","jnge rel8","7C cb","V","V","","pseudo","r","",""
"JNL rel16","JNL rel16","jnl rel16","0F 8D cw","V","N.S.","","pseudo","r","",""
"JNL rel32","JNL rel32","jnl rel32","0F 8D cd","V","V","","pseudo","r","",""
"JNL rel8","JNL rel8","jnl rel8","7D cb","V","V","","pseudo","r","",""
"JNLE rel16","JNLE rel16","jnle rel16","0F 8F cw","V","N.S.","","pseudo","r","",""
"JNLE rel32","JNLE rel32","jnle rel32","0F 8F cd","V","V","","pseudo","r","",""
"JNLE rel8","JNLE rel8","jnle rel8","7F cb","V","V","","pseudo","r","",""
"JNO rel16","JNO rel16","jno rel16","0F 81 cw","V","N.S.","","operand16","r","Y",""
"JNO rel32","JNO rel32","jno rel32","0F 81 cd","N.S.","V","","operand16,operand64","r","Y",""
"JNO rel32","JNO rel32","jno rel32","0F 81 cd","V","V","","operand32","r","Y",""
"JNO rel8","JNO rel8","jno rel8","71 cb","V","V","","","r","Y",""
"JNP rel16","JNP rel16","jnp rel16","0F 8B cw","V","N.S.","","operand16","r","Y",""
"JNP rel32","JNP rel32","jnp rel32","0F 8B cd","N.S.","V","","operand16,operand64","r","Y",""
"JNP rel32","JNP rel32","jnp rel32","0F 8B cd","V","V","","operand32","r","Y",""
"JNP rel8","JNP rel8","jnp rel8","7B cb","V","V","","","r","Y",""
"JNS rel16","JNS rel16","jns rel16","0F 89 cw","V","N.S.","","operand16","r","Y",""
"JNS rel32","JNS rel32","jns rel32","0F 89 cd","V","V","","operand32","r","Y",""
"JNS rel32","JNS rel32","jns rel32","0F 89 cd","N.S.","V","","operand16,operand64","r","Y",""
"JNS rel8","JNS rel8","jns rel8","79 cb","V","V","","","r","Y",""
"JNZ rel16","JNZ rel16","jnz rel16","0F 85 cw","V","N.S.","","pseudo","r","",""
"JNZ rel32","JNZ rel32","jnz rel32","0F 85 cd","V","V","","pseudo","r","",""
"JNZ rel8","JNZ rel8","jnz rel8","75 cb","V","V","","pseudo","r","",""
"JO rel16","JO rel16","jo rel16","0F 80 cw","V","N.S.","","operand16","r","Y",""
"JO rel32","JO rel32","jo rel32","0F 80 cd","V","V","","operand32","r","Y",""
"JO rel32","JO rel32","jo rel32","0F 80 cd","N.S.","V","","operand16,operand64","r","Y",""
"JO rel8","JO rel8","jo rel8","70 cb","V","V","","","r","Y",""
"JP rel16","JP rel16","jp rel16","0F 8A cw","V","N.S.","","operand16","r","Y",""
"JP rel32","JP rel32","jp rel32","0F 8A cd","N.S.","V","","operand16,operand64","r","Y",""
"JP rel32","JP rel32","jp rel32","0F 8A cd","V","V","","operand32","r","Y",""
"JP rel8","JP rel8","jp rel8","7A cb","V","V","","","r","Y",""
"JPE rel16","JPE rel16","jpe rel16","0F 8A cw","V","N.S.","","pseudo","r","",""
"JPE rel32","JPE rel32","jpe rel32","0F 8A cd","V","V","","pseudo","r","",""
"JPE rel8","JPE rel8","jpe rel8","7A cb","V","V","","pseudo","r","",""
"JPO rel16","JPO rel16","jpo rel16","0F 8B cw","V","N.S.","","pseudo","r","",""
"JPO rel32","JPO rel32","jpo rel32","0F 8B cd","V","V","","pseudo","r","",""
"JPO rel8","JPO rel8","jpo rel8","7B cb","V","V","","pseudo","r","",""
"JRCXZ rel8","JRCXZ rel8","jrcxz rel8","E3 cb","N.E.","V","","address64","r","",""
"JS rel16","JS rel16","js rel16","0F 88 cw","V","N.S.","","operand16","r","Y",""
"JS rel32","JS rel32","js rel32","0F 88 cd","N.S.","V","","operand16,operand64","r","Y",""
"JS rel32","JS rel32","js rel32","0F 88 cd","V","V","","operand32","r","Y",""
"JS rel8","JS rel8","js rel8","78 cb","V","V","","","r","Y",""
"JZ rel16","JZ rel16","jz rel16","0F 84 cw","V","N.S.","","operand16,pseudo","r","",""
"JZ rel32","JZ rel32","jz rel32","0F 84 cd","V","V","","operand32,pseudo","r","",""
"JZ rel8","JZ rel8","jz rel8","74 cb","V","V","","pseudo","r","",""
"LAHF","LAHF","lahf","9F","V","V","","","","",""
"LAR r16, r/m16","LARW r/m16, r16","larw r/m16, r16","0F 02 /r","V","V","","operand16","w,r","Y","16"
"LAR r32, r32/m16","LARL r32/m16, r32","larl r32/m16, r32","0F 02 /r","V","V","","operand32","w,r","Y","32"
"LAR r64, r/m16","LARQ r/m16, r64","larq r/m16, r64","REX.W 0F 02 /r","N.E.","V","","","w,r","Y","64"
"LDDQU xmm1, m128","LDDQU m128, xmm1","lddqu m128, xmm1","F2 0F F0 /r","V","V","SSE3","modrm_memonly","w,r","",""
"LDMXCSR m32","LDMXCSR m32","ldmxcsr m32","0F AE /2","V","V","SSE","modrm_memonly","r","",""
"LDS r16, m16:16","LDSW m16:16, r16","ldsw m16:16, r16","C5 /r","V","I","","operand16","w,r","Y","16"
"LDS r32, m16:32","LDSL m16:32, r32","ldsl m16:32, r32","C5 /r","V","I","","operand32","w,r","Y","32"
"LEA r16, m","LEAW m, r16","leaw m, r16","8D /r","V","V","","operand16","w,r","Y","16"
"LEA r32, m","LEAL m, r32","leal m, r32","8D /r","V","V","","operand32","w,r","Y","32"
"LEA r64, m","LEAQ m, r64","leaq m, r64","REX.W 8D /r","N.E.","V","","","w,r","Y","64"
"LEAVE","LEAVEW/LEAVEL/LEAVEQ","leavew/leavel/leaveq","C9","V","V","","operand16","","Y",""
"LEAVE","LEAVEW/LEAVEL/LEAVEQ","leavew/leavel/leaveq","C9","V","N.E.","","operand32","","Y",""
"LEAVE","LEAVEW/LEAVEL/LEAVEQ","leavew/leavel/leaveq","C9","N.E.","V","","operand32,operand64","","Y",""
"LES r16, m16:16","LESW m16:16, r16","lesw m16:16, r16","C4 /r","V","I","","operand16","w,r","Y","16"
"LES r32, m16:32","LESL m16:32, r32","lesl m16:32, r32","C4 /r","V","I","","operand32","w,r","Y","32"
"LFENCE","LFENCE","lfence","0F AE E8","V","V","","","","",""
"LFS r16, m16:16","LFSW m16:16, r16","lfsw m16:16, r16","0F B4 /r","V","V","","operand16","w,r","Y","16"
"LFS r32, m16:32","LFSL m16:32, r32","lfsl m16:32, r32","0F B4 /r","V","V","","operand32","w,r","Y","32"
"LFS r64, m16:64","LFSQ m16:64, r64","lfsq m16:64, r64","REX.W 0F B4 /r","N.E.","V","","","w,r","Y","64"
"LGDT m16&32","LGDTW/LGDTL m16&32","lgdtw/lgdtl m16&32","0F 01 /2","V","N.E.","","","r","",""
"LGDT m16&64","LGDT m16&64","lgdt m16&64","0F 01 /2","N.E.","V","","","r","",""
"LGS r16, m16:16","LGSW m16:16, r16","lgsw m16:16, r16","0F B5 /r","V","V","","operand16","w,r","Y","16"
"LGS r32, m16:32","LGSL m16:32, r32","lgsl m16:32, r32","0F B5 /r","V","V","","operand32","w,r","Y","32"
"LGS r64, m16:64","LGSQ m16:64, r64","lgsq m16:64, r64","REX.W 0F B5 /r","N.E.","V","","","w,r","Y","64"
"LIDT m16&32","LIDTW/LIDTL m16&32","lidtw/lidtl m16&32","0F 01 /3","V","N.E.","","","r","",""
"LIDT m16&64","LIDT m16&64","lidt m16&64","0F 01 /3","N.E.","V","","","r","",""
"LLDT r/m16","LLDT r/m16","lldt r/m16","0F 00 /2","V","V","","","r","",""
"LMSW r/m16","LMSW r/m16","lmsw r/m16","0F 01 /6","V","V","","","r","",""
"LOCK","LOCK","lock","F0","V","V","","pseudo","","",""
"LODSB","LODSB","lodsb","AC","V","V","","","","",""
"LODSD","LODSL","lodsl","AD","V","V","","operand32","","",""
"LODSQ","LODSQ","lodsq","REX.W AD","N.E.","V","","","","",""
"LODSW","LODSW","lodsw","AD","V","V","","operand16","","",""
"LOOP rel8","LOOP rel8","loop rel8","E2 cb","V","V","","","r","",""
"LOOPE rel8","LOOPEQ rel8","loope rel8","E1 cb","V","V","","","r","",""
"LOOPNE rel8","LOOPNE rel8","loopne rel8","E0 cb","V","V","","","r","",""
"LSL r16, r/m16","LSLW r/m16, r16","lslw r/m16, r16","0F 03 /r","V","V","","operand16","w,r","Y","16"
"LSL r32, r32/m16","LSLL r32/m16, r32","lsll r32/m16, r32","0F 03 /r","V","V","","operand32","w,r","Y","32"
"LSL r64, r32/m16","LSLQ r32/m16, r64","lslq r32/m16, r64","REX.W 0F 03 /r","N.E.","V","","","w,r","Y","64"
"LSS r16, m16:16","LSSW m16:16, r16","lssw m16:16, r16","0F B2 /r","V","V","","operand16","w,r","Y","16"
"LSS r32, m16:32","LSSL m16:32, r32","lssl m16:32, r32","0F B2 /r","V","V","","operand32","w,r","Y","32"
"LSS r64, m16:64","LSSQ m16:64, r64","lssq m16:64, r64","REX.W 0F B2 /r","N.E.","V","","","w,r","Y","64"
"LTR r/m16","LTR r/m16","ltr r/m16","0F 00 /3","V","V","","","r","",""
"LZCNT r16, r/m16","LZCNTW r/m16, r16","lzcntw r/m16, r16","F3 0F BD /r","V","V","LZCNT","operand16","w,r","Y","16"
"LZCNT r32, r/m32","LZCNTL r/m32, r32","lzcntl r/m32, r32","F3 0F BD /r","V","V","LZCNT","operand32","w,r","Y","32"
"LZCNT r64, r/m64","LZCNTQ r/m64, r64","lzcntq r/m64, r64","F3 REX.W 0F BD /r","N.E.","V","LZCNT","","w,r","Y","64"
"MASKMOVDQU xmm1, xmm2","MASKMOVOU xmm2, xmm1","maskmovdqu xmm2, xmm1","66 0F F7 /r","V","V","SSE2","modrm_regonly","r,r","",""
"MASKMOVQ mm1, mm2","MASKMOVQ mm2, mm1","maskmovq mm2, mm1","0F F7 /r","V","V","","","r,r","",""
"MAXPD xmm1, xmm2/m128","MAXPD xmm2/m128, xmm1","maxpd xmm2/m128, xmm1","66 0F 5F /r","V","V","SSE2","","rw,r","",""
"MAXPS xmm1, xmm2/m128","MAXPS xmm2/m128, xmm1","maxps xmm2/m128, xmm1","0F 5F /r","V","V","SSE","","rw,r","",""
"MAXSD xmm1, xmm2/m64","MAXSD xmm2/m64, xmm1","maxsd xmm2/m64, xmm1","F2 0F 5F /r","V","V","SSE2","","rw,r","",""
"MAXSS xmm1, xmm2/m32","MAXSS xmm2/m32, xmm1","maxss xmm2/m32, xmm1","F3 0F 5F /r","V","V","SSE","","rw,r","",""
"MFENCE","MFENCE","mfence","0F AE F0","V","V","","","","",""
"MINPD xmm1, xmm2/m128","MINPD xmm2/m128, xmm1","minpd xmm2/m128, xmm1","66 0F 5D /r","V","V","SSE2","","rw,r","",""
"MINPS xmm1, xmm2/m128","MINPS xmm2/m128, xmm1","minps xmm2/m128, xmm1","0F 5D /r","V","V","SSE","","rw,r","",""
"MINSD xmm1, xmm2/m64","MINSD xmm2/m64, xmm1","minsd xmm2/m64, xmm1","F2 0F 5D /r","V","V","SSE2","","rw,r","",""
"MINSS xmm1, xmm2/m32","MINSS xmm2/m32, xmm1","minss xmm2/m32, xmm1","F3 0F 5D /r","V","V","SSE","","rw,r","",""
"MONITOR","MONITOR","monitor","0F 01 C8","V","V","","","","",""
"MOV AL, moffs8","MOVB/MOVB/MOVABSB moffs8, AL","movb/movb/movabsb moffs8, AL","A0 cm","V","V","","ignoreREXW","w,r","Y","8"
"MOV AL, moffs8","MOVB/MOVB/MOVABSB moffs8, AL","movb/movb/movabsb moffs8, AL","REX.W A0 cm","N.E.","V","","pseudo","w,r","Y","8"
"MOV AX, moffs16","MOVW moffs16, AX","movw moffs16, AX","A1 cm","V","V","","operand16","w,r","Y","16"
"MOV CR0-CR7, rmr32","MOVL rmr32, CR0-CR7","movl rmr32, CR0-CR7","0F 22 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
"MOV CR0-CR7, rmr64","MOVQ rmr64, CR0-CR7","movq rmr64, CR0-CR7","0F 22 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
"MOV CR8, rmr64","MOVQ rmr64, CR8","movq rmr64, CR8","REX.R + 0F 22 /0","N.E.","V","","modrm_regonly,pseudo","w,r","Y","64"
"MOV DR0-DR7, rmr32","MOVL rmr32, DR0-DR7","movl rmr32, DR0-DR7","0F 23 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
"MOV DR0-DR7, rmr64","MOVQ rmr64, DR0-DR7","movq rmr64, DR0-DR7","0F 23 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
"MOV EAX, moffs32","MOVL moffs32, EAX","movl moffs32, EAX","A1 cm","V","V","","operand32","w,r","Y","32"
"MOV RAX, moffs64","MOVQ moffs64, RAX","movabsq moffs64, RAX","REX.W A1 cm","N.E.","V","","","w,r","Y","64"
"MOV Sreg, r/m16","MOVW r/m16, Sreg","movw r/m16, Sreg","8E /r","V","V","","operand16","w,r","Y","16"
"MOV Sreg, r/m16","MOVW r/m16, Sreg","movw r/m16, Sreg","REX.W 8E /r","N.E.","V","","","w,r","Y","16"
"MOV Sreg, r32/m16","MOV{L/W} r32/m16, Sreg","mov{l/w} r32/m16, Sreg","8E /r","V","V","","operand32","w,r","Y",""
"MOV moffs16, AX","MOVW AX, moffs16","movw AX, moffs16","A3 cm","V","V","","operand16","w,r","Y","16"
"MOV moffs32, EAX","MOVL EAX, moffs32","movl EAX, moffs32","A3 cm","V","V","","operand32","w,r","Y","32"
"MOV moffs64, RAX","MOVQ RAX, moffs64","movabsq RAX, moffs64","REX.W A3 cm","N.E.","V","","","w,r","Y","64"
"MOV moffs8, AL","MOVB/MOVB/MOVABSB AL, moffs8","movb/movb/movabsb AL, moffs8","A2 cm","V","V","","ignoreREXW","w,r","Y","8"
"MOV moffs8, AL","MOVB/MOVB/MOVABSB AL, moffs8","movb/movb/movabsb AL, moffs8","REX.W A2 cm","N.E.","V","","pseudo","w,r","Y","8"
"MOV r/m16, Sreg","MOVW Sreg, r/m16","movw Sreg, r/m16","8C /r","V","V","","operand16","w,r","Y","16"
"MOV r/m16, Sreg","MOVW Sreg, r/m16","movw Sreg, r/m16","REX.W 8C /r","N.E.","V","","","w,r","Y","16"
"MOV r/m16, imm16","MOVW imm16, r/m16","movw imm16, r/m16","C7 /0 iw","V","V","","operand16","w,r","Y","16"
"MOV r/m16, r16","MOVW r16, r/m16","movw r16, r/m16","89 /r","V","V","","operand16","w,r","Y","16"
"MOV r/m32, Sreg","MOVL Sreg, r/m32","movl Sreg, r/m32","8C /r","V","V","","operand32","w,r","Y","32"
"MOV r/m32, imm32","MOVL imm32, r/m32","movl imm32, r/m32","C7 /0 id","V","V","","operand32","w,r","Y","32"
"MOV r/m32, r32","MOVL r32, r/m32","movl r32, r/m32","89 /r","V","V","","operand32","w,r","Y","32"
"MOV r/m64, imm32","MOVQ imm32, r/m64","movq imm32, r/m64","REX.W C7 /0 id","N.E.","V","","","w,r","Y","64"
"MOV r/m64, r64","MOVQ r64, r/m64","movq r64, r/m64","REX.W 89 /r","N.E.","V","","","w,r","Y","64"
"MOV r/m8, imm8u","MOVB imm8u, r/m8","movb imm8u, r/m8","C6 /0 ib","V","V","","","w,r","Y","8"
"MOV r/m8, imm8u","MOVB imm8u, r/m8","movb imm8u, r/m8","REX C6 /0 ib","N.E.","V","","pseudo64","w,r","Y","8"
"MOV r/m8, r8","MOVB r8, r/m8","movb r8, r/m8","88 /r","V","V","","","w,r","Y","8"
"MOV r/m8, r8","MOVB r8, r/m8","movb r8, r/m8","REX 88 /r","N.E.","V","","pseudo64","w,r","Y","8"
"MOV r16, r/m16","MOVW r/m16, r16","movw r/m16, r16","8B /r","V","V","","operand16","w,r","Y","16"
"MOV r16op, imm16","MOVW imm16, r16op","movw imm16, r16op","B8+rw iw","V","V","","operand16","w,r","Y","16"
"MOV r32, r/m32","MOVL r/m32, r32","movl r/m32, r32","8B /r","V","V","","operand32","w,r","Y","32"
"MOV r32op, imm32","MOVL imm32, r32op","movl imm32, r32op","B8+rd id","V","V","","operand32","w,r","Y","32"
"MOV r64, r/m64","MOVQ r/m64, r64","movq r/m64, r64","REX.W 8B /r","N.E.","V","","","w,r","Y","64"
"MOV r64op, imm64","MOVQ imm64, r64op","movabsq imm64, r64op","REX.W B8+rd io","N.E.","V","","","w,r","Y","64"
"MOV r8, r/m8","MOVB r/m8, r8","movb r/m8, r8","8A /r","V","V","","","w,r","Y","8"
"MOV r8, r/m8","MOVB r/m8, r8","movb r/m8, r8","REX 8A /r","N.E.","V","","pseudo64","w,r","Y","8"
"MOV r8op, imm8u","MOVB imm8u, r8op","movb imm8u, r8op","B0+rb ib","V","V","","","w,r","Y","8"
"MOV r8op, imm8u","MOVB imm8u, r8op","movb imm8u, r8op","REX B0+rb ib","N.E.","V","","pseudo64","w,r","Y","8"
"MOV rmr32, CR0-CR7","MOVL CR0-CR7, rmr32","movl CR0-CR7, rmr32","0F 20 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
"MOV rmr32, DR0-DR7","MOVL DR0-DR7, rmr32","movl DR0-DR7, rmr32","0F 21 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
"MOV rmr64, CR0-CR7","MOVQ CR0-CR7, rmr64","movq CR0-CR7, rmr64","0F 20 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
"MOV rmr64, CR8","MOVQ CR8, rmr64","movq CR8, rmr64","REX.R + 0F 20 /0","N.E.","V","","modrm_regonly,pseudo","w,r","Y","64"
"MOV rmr64, DR0-DR7","MOVQ DR0-DR7, rmr64","movq DR0-DR7, rmr64","0F 21 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
"MOVAPD xmm1, xmm2/m128","MOVAPD xmm2/m128, xmm1","movapd xmm2/m128, xmm1","66 0F 28 /r","V","V","SSE2","","w,r","",""
"MOVAPD xmm2/m128, xmm1","MOVAPD xmm1, xmm2/m128","movapd xmm1, xmm2/m128","66 0F 29 /r","V","V","SSE2","","w,r","",""
"MOVAPS xmm1, xmm2/m128","MOVAPS xmm2/m128, xmm1","movaps xmm2/m128, xmm1","0F 28 /r","V","V","SSE","","w,r","",""
"MOVAPS xmm2/m128, xmm1","MOVAPS xmm1, xmm2/m128","movaps xmm1, xmm2/m128","0F 29 /r","V","V","SSE","","w,r","",""
"MOVBE m16, r16","MOVBEWW r16, m16","movbeww r16, m16","0F 38 F1 /r","V","V","","modrm_memonly,operand16","w,r","Y","16"
"MOVBE m32, r32","MOVBELL r32, m32","movbell r32, m32","0F 38 F1 /r","V","V","","modrm_memonly,operand32","w,r","Y","32"
"MOVBE m64, r64","MOVBEQQ r64, m64","movbeqq r64, m64","REX.W 0F 38 F1 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
"MOVBE r16, m16","MOVBEWW m16, r16","movbeww m16, r16","0F 38 F0 /r","V","V","","modrm_memonly,operand16","w,r","Y","16"
"MOVBE r32, m32","MOVBELL m32, r32","movbell m32, r32","0F 38 F0 /r","V","V","","modrm_memonly,operand32","w,r","Y","32"
"MOVBE r64, m64","MOVBEQQ m64, r64","movbeqq m64, r64","REX.W 0F 38 F0 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
"MOVD mm1, r/m32","MOVD r/m32, mm1","movd r/m32, mm1","0F 6E /r","V","V","MMX","operand16,operand32","w,r","",""
"MOVD r/m32, mm1","MOVD mm1, r/m32","movd mm1, r/m32","0F 7E /r","V","V","MMX","operand16,operand32","w,r","",""
"MOVD r/m32, xmm1","MOVD xmm1, r/m32","movd xmm1, r/m32","66 0F 7E /r","V","V","SSE2","operand16,operand32","w,r","",""
"MOVD xmm1, r/m32","MOVD r/m32, xmm1","movd r/m32, xmm1","66 0F 6E /r","V","V","SSE2","operand16,operand32","w,r","",""
"MOVDDUP xmm1, xmm2/m64","MOVDDUP xmm2/m64, xmm1","movddup xmm2/m64, xmm1","F2 0F 12 /r","V","V","SSE3","","w,r","",""
"MOVDQ2Q mm1, xmm2","MOVQ xmm2, mm1","movdq2q xmm2, mm1","F2 0F D6 /r","V","V","","modrm_regonly","w,r","",""
"MOVDQA xmm1, xmm2/m128","MOVO xmm2/m128, xmm1","movdqa xmm2/m128, xmm1","66 0F 6F /r","V","V","SSE2","","w,r","",""
"MOVDQA xmm2/m128, xmm1","MOVO xmm1, xmm2/m128","movdqa xmm1, xmm2/m128","66 0F 7F /r","V","V","SSE2","","w,r","",""
"MOVDQU xmm1, xmm2/m128","MOVOU xmm2/m128, xmm1","movdqu xmm2/m128, xmm1","F3 0F 6F /r","V","V","SSE2","","w,r","",""
"MOVDQU xmm2/m128, xmm1","MOVOU xmm1, xmm2/m128","movdqu xmm1, xmm2/m128","F3 0F 7F /r","V","V","SSE2","","w,r","",""
"MOVHLPS xmm1, xmm2","MOVHLPS xmm2, xmm1","movhlps xmm2, xmm1","0F 12 /r","V","V","SSE","modrm_regonly","w,r","",""
"MOVHPD m64, xmm1","MOVHPD xmm1, m64","movhpd xmm1, m64","66 0F 17 /r","V","V","SSE2","modrm_memonly","w,r","",""
"MOVHPD xmm1, m64","MOVHPD m64, xmm1","movhpd m64, xmm1","66 0F 16 /r","V","V","SSE2","modrm_memonly","rw,r","",""
"MOVHPS m64, xmm1","MOVHPS xmm1, m64","movhps xmm1, m64","0F 17 /r","V","V","SSE","modrm_memonly","w,r","",""
"MOVHPS xmm1, m64","MOVHPS m64, xmm1","movhps m64, xmm1","0F 16 /r","V","V","SSE","modrm_memonly","rw,r","",""
"MOVLHPS xmm1, xmm2","MOVLHPS xmm2, xmm1","movlhps xmm2, xmm1","0F 16 /r","V","V","SSE","modrm_regonly","w,r","",""
"MOVLPD m64, xmm1","MOVLPD xmm1, m64","movlpd xmm1, m64","66 0F 13 /r","V","V","SSE2","modrm_memonly","w,r","",""
"MOVLPD xmm1, m64","MOVLPD m64, xmm1","movlpd m64, xmm1","66 0F 12 /r","V","V","SSE2","modrm_memonly","rw,r","",""
"MOVLPS m64, xmm1","MOVLPS xmm1, m64","movlps xmm1, m64","0F 13 /r","V","V","SSE","modrm_memonly","w,r","",""
"MOVLPS xmm1, m64","MOVLPS m64, xmm1","movlps m64, xmm1","0F 12 /r","V","V","SSE","modrm_memonly","rw,r","",""
"MOVMSKPD r32, xmm2","MOVMSKPD xmm2, r32","movmskpd xmm2, r32","66 0F 50 /r","V","V","SSE2","modrm_regonly","w,r","",""
"MOVMSKPS r32, xmm2","MOVMSKPS xmm2, r32","movmskps xmm2, r32","0F 50 /r","V","V","SSE","modrm_regonly","w,r","",""
"MOVNTDQ m128, xmm1","MOVNTO xmm1, m128","movntdq xmm1, m128","66 0F E7 /r","V","V","SSE2","modrm_memonly","w,r","",""
"MOVNTDQA xmm1, m128","MOVNTDQA m128, xmm1","movntdqa m128, xmm1","66 0F 38 2A /r","V","V","SSE4_1","modrm_memonly","w,r","",""
"MOVNTI m32, r32","MOVNTIL r32, m32","movntil r32, m32","0F C3 /r","V","V","","modrm_memonly,operand16,operand32","w,r","Y","32"
"MOVNTI m64, r64","MOVNTIQ r64, m64","movntiq r64, m64","REX.W 0F C3 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
"MOVNTPD m128, xmm1","MOVNTPD xmm1, m128","movntpd xmm1, m128","66 0F 2B /r","V","V","SSE2","modrm_memonly","w,r","",""
"MOVNTPS m128, xmm1","MOVNTPS xmm1, m128","movntps xmm1, m128","0F 2B /r","V","V","SSE","modrm_memonly","w,r","",""
"MOVNTQ m64, mm1","MOVNTQ mm1, m64","movntq mm1, m64","0F E7 /r","V","V","","modrm_memonly","w,r","",""
"MOVNTSD m64, xmm1","MOVNTSD xmm1, m64","movntsd xmm1, m64","F2 0F 2B /r","V","V","SSE","","w,r","",""
"MOVNTSS m32, xmm1","MOVNTSS xmm1, m32","movntss xmm1, m32","F3 0F 2B /r","V","V","SSE","","w,r","",""
"MOVQ mm1, mm2/m64","MOVQ mm2/m64, mm1","movq mm2/m64, mm1","0F 6F /r","V","V","MMX","","w,r","",""
"MOVQ mm1, r/m64","MOVQ r/m64, mm1","movq r/m64, mm1","REX.W 0F 6E /r","N.E.","V","MMX","","w,r","",""
"MOVQ mm2/m64, mm1","MOVQ mm1, mm2/m64","movq mm1, mm2/m64","0F 7F /r","V","V","MMX","","w,r","",""
"MOVQ r/m64, mm1","MOVQ mm1, r/m64","movq mm1, r/m64","REX.W 0F 7E /r","N.E.","V","MMX","","w,r","",""
"MOVQ r/m64, xmm1","MOVQ xmm1, r/m64","movq xmm1, r/m64","66 REX.W 0F 7E /r","N.E.","V","SSE2","","w,r","",""
"MOVQ xmm1, r/m64","MOVQ r/m64, xmm1","movq r/m64, xmm1","66 REX.W 0F 6E /r","N.E.","V","SSE2","","w,r","",""
"MOVQ xmm1, xmm2/m64","MOVQ xmm2/m64, xmm1","movq xmm2/m64, xmm1","F3 0F 7E /r","V","V","SSE2","","w,r","",""
"MOVQ xmm2/m64, xmm1","MOVQ xmm1, xmm2/m64","movq xmm1, xmm2/m64","66 0F D6 /r","V","V","SSE2","","w,r","",""
"MOVQ2DQ xmm1, mm2","MOVQOZX mm2, xmm1","movq2dq mm2, xmm1","F3 0F D6 /r","V","V","","","w,r","",""
"MOVSB","MOVSB","movsb","A4","V","V","","","","",""
"MOVSD","MOVSL","movsl","A5","V","V","","operand32","","",""
"MOVSD xmm1, xmm2/m64","MOVSD xmm2/m64, xmm1","movsd xmm2/m64, xmm1","F2 0F 10 /r","V","V","SSE2","","w,r","",""
"MOVSD xmm2/m64, xmm1","MOVSD xmm1, xmm2/m64","movsd xmm1, xmm2/m64","F2 0F 11 /r","V","V","SSE2","","w,r","",""
"MOVSHDUP xmm1, xmm2/m128","MOVSHDUP xmm2/m128, xmm1","movshdup xmm2/m128, xmm1","F3 0F 16 /r","V","V","SSE3","","w,r","",""
"MOVSLDUP xmm1, xmm2/m128","MOVSLDUP xmm2/m128, xmm1","movsldup xmm2/m128, xmm1","F3 0F 12 /r","V","V","SSE3","","w,r","",""
"MOVSQ","MOVSQ","movsq","REX.W A5","N.E.","V","","","","",""
"MOVSS xmm1, xmm2/m32","MOVSS xmm2/m32, xmm1","movss xmm2/m32, xmm1","F3 0F 10 /r","V","V","SSE","","w,r","",""
"MOVSS xmm2/m32, xmm1","MOVSS xmm1, xmm2/m32","movss xmm1, xmm2/m32","F3 0F 11 /r","V","V","SSE","","w,r","",""
"MOVSW","MOVSW","movsw","A5","V","V","","operand16","","",""
"MOVSX r16, r/m16","MOVSWW r/m16, r16","movsww r/m16, r16","0F BF /r","V","V","","operand16","w,r","Y","16"
"MOVSX r16, r/m8","MOVBWSX r/m8, r16","movsbw r/m8, r16","0F BE /r","V","V","","operand16","w,r","Y","16"
"MOVSX r32, r/m16","MOVWLSX r/m16, r32","movswl r/m16, r32","0F BF /r","V","V","","operand32","w,r","Y","32"
"MOVSX r32, r/m8","MOVBLSX r/m8, r32","movsbl r/m8, r32","0F BE /r","V","V","","operand32","w,r","Y","32"
"MOVSX r64, r/m16","MOVWQSX r/m16, r64","movswq r/m16, r64","REX.W 0F BF /r","N.E.","V","","","w,r","Y","64"
"MOVSX r64, r/m8","MOVBQSX r/m8, r64","movsbq r/m8, r64","REX.W 0F BE /r","N.E.","V","","","w,r","Y","64"
"MOVSXD r16, r/m32","MOVWQSX r/m32, r16","movsxdw r/m32, r16","63 /r","N.E.","V","","operand16","w,r","Y","16"
"MOVSXD r32, r/m32","MOVLQSX r/m32, r32","movsxdl r/m32, r32","63 /r","N.E.","V","","operand32","w,r","Y","32"
"MOVSXD r64, r/m32","MOVLQSX r/m32, r64","movslq r/m32, r64","REX.W 63 /r","N.E.","V","","","w,r","Y","64"
"MOVUPD xmm1, xmm2/m128","MOVUPD xmm2/m128, xmm1","movupd xmm2/m128, xmm1","66 0F 10 /r","V","V","SSE2","","w,r","",""
"MOVUPD xmm2/m128, xmm1","MOVUPD xmm1, xmm2/m128","movupd xmm1, xmm2/m128","66 0F 11 /r","V","V","SSE2","","w,r","",""
"MOVUPS xmm1, xmm2/m128","MOVUPS xmm2/m128, xmm1","movups xmm2/m128, xmm1","0F 10 /r","V","V","SSE","","w,r","",""
"MOVUPS xmm2/m128, xmm1","MOVUPS xmm1, xmm2/m128","movups xmm1, xmm2/m128","0F 11 /r","V","V","SSE","","w,r","",""
"MOVZX r16, r/m16","MOVZWW r/m16, r16","movzww r/m16, r16","0F B7 /r","V","V","","operand16","w,r","Y","16"
"MOVZX r16, r/m8","MOVBWZX r/m8, r16","movzbw r/m8, r16","0F B6 /r","V","V","","operand16","w,r","Y","16"
"MOVZX r32, r/m16","MOVWLZX r/m16, r32","movzwl r/m16, r32","0F B7 /r","V","V","","operand32","w,r","Y","32"
"MOVZX r32, r/m8","MOVBLZX r/m8, r32","movzbl r/m8, r32","0F B6 /r","V","V","","operand32","w,r","Y","32"
"MOVZX r64, r/m16","MOVWQZX r/m16, r64","movzwq r/m16, r64","REX.W 0F B7 /r","N.E.","V","","","w,r","Y","64"
"MOVZX r64, r/m8","MOVBQZX r/m8, r64","movzbq r/m8, r64","REX.W 0F B6 /r","N.E.","V","","","w,r","Y","64"
"MPSADBW xmm1, xmm2/m128, imm8","MPSADBW imm8, xmm2/m128, xmm1","mpsadbw imm8, xmm2/m128, xmm1","66 0F 3A 42 /r ib","V","V","SSE4_1","","rw,r,r","",""
"MUL r/m16","MULW r/m16","mulw r/m16","F7 /4","V","V","","operand16","r","Y","16"
"MUL r/m32","MULL r/m32","mull r/m32","F7 /4","V","V","","operand32","r","Y","32"
"MUL r/m64","MULQ r/m64","mulq r/m64","REX.W F7 /4","N.E.","V","","","r","Y","64"
"MUL r/m8","MULB r/m8","mulb r/m8","F6 /4","V","V","","","r","Y","8"
"MUL r/m8","MULB r/m8","mulb r/m8","REX F6 /4","N.E.","V","","pseudo64","r","Y","8"
"MULPD xmm1, xmm2/m128","MULPD xmm2/m128, xmm1","mulpd xmm2/m128, xmm1","66 0F 59 /r","V","V","SSE2","","rw,r","",""
"MULPS xmm1, xmm2/m128","MULPS xmm2/m128, xmm1","mulps xmm2/m128, xmm1","0F 59 /r","V","V","SSE","","rw,r","",""
"MULSD xmm1, xmm2/m64","MULSD xmm2/m64, xmm1","mulsd xmm2/m64, xmm1","F2 0F 59 /r","V","V","SSE2","","rw,r","",""
"MULSS xmm1, xmm2/m32","MULSS xmm2/m32, xmm1","mulss xmm2/m32, xmm1","F3 0F 59 /r","V","V","SSE","","rw,r","",""
"MULX r32, r32V, r/m32","MULXL r/m32, r32V, r32","mulxl r/m32, r32V, r32","VEX.NDD.LZ.F2.0F38.W0 F6 /r","V","V","BMI2","","w,w,r","Y","32"
"MULX r64, r64V, r/m64","MULXQ r/m64, r64V, r64","mulxq r/m64, r64V, r64","VEX.NDD.LZ.F2.0F38.W1 F6 /r","N.E.","V","BMI2","","w,w,r","Y","64"
"MWAIT","MWAIT","mwait","0F 01 C9","V","V","","","","",""
"NEG r/m16","NEGW r/m16","negw r/m16","F7 /3","V","V","","operand16","rw","Y","16"
"NEG r/m32","NEGL r/m32","negl r/m32","F7 /3","V","V","","operand32","rw","Y","32"
"NEG r/m64","NEGQ r/m64","negq r/m64","REX.W F7 /3","N.E.","V","","","rw","Y","64"
"NEG r/m8","NEGB r/m8","negb r/m8","F6 /3","V","V","","","rw","Y","8"
"NEG r/m8","NEGB r/m8","negb r/m8","REX F6 /3","N.E.","V","","pseudo64","rw","Y","8"
"NOP","NOP","nop","90","V","V","","pseudo","","Y",""
"NOP r/m16","NOPW r/m16","nopw r/m16","0F 1F /0","V","V","","operand16","r","Y","16"
"NOP r/m32","NOPL r/m32","nopl r/m32","0F 1F /0","V","V","","operand32","r","Y","32"
"NOT r/m16","NOTW r/m16","notw r/m16","F7 /2","V","V","","operand16","rw","Y","16"
"NOT r/m32","NOTL r/m32","notl r/m32","F7 /2","V","V","","operand32","rw","Y","32"
"NOT r/m64","NOTQ r/m64","notq r/m64","REX.W F7 /2","N.E.","V","","","rw","Y","64"
"NOT r/m8","NOTB r/m8","notb r/m8","F6 /2","V","V","","","rw","Y","8"
"NOT r/m8","NOTB r/m8","notb r/m8","REX F6 /2","N.E.","V","","pseudo64","rw","Y","8"
"OR AL, imm8","ORB imm8, AL","orb imm8, AL","0C ib","V","V","","","rw,r","Y","8"
"OR AX, imm16","ORW imm16, AX","orw imm16, AX","0D iw","V","V","","operand16","rw,r","Y","16"
"OR EAX, imm32","ORL imm32, EAX","orl imm32, EAX","0D id","V","V","","operand32","rw,r","Y","32"
"OR RAX, imm32","ORQ imm32, RAX","orq imm32, RAX","REX.W 0D id","N.E.","V","","","rw,r","Y","64"
"OR r/m16, imm16","ORW imm16, r/m16","orw imm16, r/m16","81 /1 iw","V","V","","operand16","rw,r","Y","16"
"OR r/m16, imm8","ORW imm8, r/m16","orw imm8, r/m16","83 /1 ib","V","V","","operand16","rw,r","Y","16"
"OR r/m16, r16","ORW r16, r/m16","orw r16, r/m16","09 /r","V","V","","operand16","rw,r","Y","16"
"OR r/m32, imm32","ORL imm32, r/m32","orl imm32, r/m32","81 /1 id","V","V","","operand32","rw,r","Y","32"
"OR r/m32, imm8","ORL imm8, r/m32","orl imm8, r/m32","83 /1 ib","V","V","","operand32","rw,r","Y","32"
"OR r/m32, r32","ORL r32, r/m32","orl r32, r/m32","09 /r","V","V","","operand32","rw,r","Y","32"
"OR r/m64, imm32","ORQ imm32, r/m64","orq imm32, r/m64","REX.W 81 /1 id","N.E.","V","","","rw,r","Y","64"
"OR r/m64, imm8","ORQ imm8, r/m64","orq imm8, r/m64","REX.W 83 /1 ib","N.E.","V","","","rw,r","Y","64"
"OR r/m64, r64","ORQ r64, r/m64","orq r64, r/m64","REX.W 09 /r","N.E.","V","","","rw,r","Y","64"
"OR r/m8, imm8","ORB imm8, r/m8","orb imm8, r/m8","80 /1 ib","V","V","","","rw,r","Y","8"
"OR r/m8, imm8","ORB imm8, r/m8","orb imm8, r/m8","REX 80 /1 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"OR r/m8, r8","ORB r8, r/m8","orb r8, r/m8","08 /r","V","V","","","rw,r","Y","8"
"OR r/m8, r8","ORB r8, r/m8","orb r8, r/m8","REX 08 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"OR r16, r/m16","ORW r/m16, r16","orw r/m16, r16","0B /r","V","V","","operand16","rw,r","Y","16"
"OR r32, r/m32","ORL r/m32, r32","orl r/m32, r32","0B /r","V","V","","operand32","rw,r","Y","32"
"OR r64, r/m64","ORQ r/m64, r64","orq r/m64, r64","REX.W 0B /r","N.E.","V","","","rw,r","Y","64"
"OR r8, r/m8","ORB r/m8, r8","orb r/m8, r8","0A /r","V","V","","","rw,r","Y","8"
"OR r8, r/m8","ORB r/m8, r8","orb r/m8, r8","REX 0A /r","N.E.","V","","pseudo64","rw,r","Y","8"
"ORPD xmm1, xmm2/m128","ORPD xmm2/m128, xmm1","orpd xmm2/m128, xmm1","66 0F 56 /r","V","V","SSE2","","rw,r","",""
"ORPS xmm1, xmm2/m128","ORPS xmm2/m128, xmm1","orps xmm2/m128, xmm1","0F 56 /r","V","V","SSE","","rw,r","",""
"OUT DX, AL","OUTB AL, DX","outb AL, DX","EE","V","V","","","r,r","Y","8"
"OUT DX, AX","OUTW AX, DX","outw AX, DX","EF","V","V","","operand16","r,r","Y","16"
"OUT DX, EAX","OUTL EAX, DX","outl EAX, DX","EF","V","V","","operand32,operand64","r,r","Y","32"
"OUT imm8u, AL","OUTB AL, imm8u","outb AL, imm8u","E6 ib","V","V","","","r,r","Y","8"
"OUT imm8u, AX","OUTW AX, imm8u","outw AX, imm8u","E7 ib","V","V","","operand16","r,r","Y","16"
"OUT imm8u, EAX","OUTL EAX, imm8u","outl EAX, imm8u","E7 ib","V","V","","operand32,operand64","r,r","Y","32"
"OUTSB","OUTSB","outsb","6E","V","V","","","","",""
"OUTSD","OUTSL","outsl","6F","V","V","","operand32,operand64","","",""
"OUTSW","OUTSW","outsw","6F","V","V","","operand16","","",""
"PABSB mm1, mm2/m64","PABSB mm2/m64, mm1","pabsb mm2/m64, mm1","0F 38 1C /r","V","V","SSSE3","","w,r","",""
"PABSB xmm1, xmm2/m128","PABSB xmm2/m128, xmm1","pabsb xmm2/m128, xmm1","66 0F 38 1C /r","V","V","SSSE3","","w,r","",""
"PABSD mm1, mm2/m64","PABSD mm2/m64, mm1","pabsd mm2/m64, mm1","0F 38 1E /r","V","V","SSSE3","","w,r","",""
"PABSD xmm1, xmm2/m128","PABSD xmm2/m128, xmm1","pabsd xmm2/m128, xmm1","66 0F 38 1E /r","V","V","SSSE3","","w,r","",""
"PABSW mm1, mm2/m64","PABSW mm2/m64, mm1","pabsw mm2/m64, mm1","0F 38 1D /r","V","V","SSSE3","","w,r","",""
"PABSW xmm1, xmm2/m128","PABSW xmm2/m128, xmm1","pabsw xmm2/m128, xmm1","66 0F 38 1D /r","V","V","SSSE3","","w,r","",""
"PACKSSDW mm1, mm2/m64","PACKSSLW mm2/m64, mm1","packssdw mm2/m64, mm1","0F 6B /r","V","V","MMX","","rw,r","",""
"PACKSSDW xmm1, xmm2/m128","PACKSSLW xmm2/m128, xmm1","packssdw xmm2/m128, xmm1","66 0F 6B /r","V","V","SSE2","","rw,r","",""
"PACKSSWB mm1, mm2/m64","PACKSSWB mm2/m64, mm1","packsswb mm2/m64, mm1","0F 63 /r","V","V","MMX","","rw,r","",""
"PACKSSWB xmm1, xmm2/m128","PACKSSWB xmm2/m128, xmm1","packsswb xmm2/m128, xmm1","66 0F 63 /r","V","V","SSE2","","rw,r","",""
"PACKUSDW xmm1, xmm2/m128","PACKUSDW xmm2/m128, xmm1","packusdw xmm2/m128, xmm1","66 0F 38 2B /r","V","V","SSE4_1","","rw,r","",""
"PACKUSWB mm1, mm2/m64","PACKUSWB mm2/m64, mm1","packuswb mm2/m64, mm1","0F 67 /r","V","V","MMX","","rw,r","",""
"PACKUSWB xmm1, xmm2/m128","PACKUSWB xmm2/m128, xmm1","packuswb xmm2/m128, xmm1","66 0F 67 /r","V","V","SSE2","","rw,r","",""
"PADDB mm1, mm2/m64","PADDB mm2/m64, mm1","paddb mm2/m64, mm1","0F FC /r","V","V","MMX","","rw,r","",""
"PADDB xmm1, xmm2/m128","PADDB xmm2/m128, xmm1","paddb xmm2/m128, xmm1","66 0F FC /r","V","V","SSE2","","rw,r","",""
"PADDD mm1, mm2/m64","PADDL mm2/m64, mm1","paddd mm2/m64, mm1","0F FE /r","V","V","MMX","","rw,r","",""
"PADDD xmm1, xmm2/m128","PADDL xmm2/m128, xmm1","paddd xmm2/m128, xmm1","66 0F FE /r","V","V","SSE2","","rw,r","",""
"PADDQ mm1, mm2/m64","PADDQ mm2/m64, mm1","paddq mm2/m64, mm1","0F D4 /r","V","V","SSE2","","rw,r","",""
"PADDQ xmm1, xmm2/m128","PADDQ xmm2/m128, xmm1","paddq xmm2/m128, xmm1","66 0F D4 /r","V","V","SSE2","","rw,r","",""
"PADDSB mm1, mm2/m64","PADDSB mm2/m64, mm1","paddsb mm2/m64, mm1","0F EC /r","V","V","MMX","","rw,r","",""
"PADDSB xmm1, xmm2/m128","PADDSB xmm2/m128, xmm1","paddsb xmm2/m128, xmm1","66 0F EC /r","V","V","SSE2","","rw,r","",""
"PADDSW mm1, mm2/m64","PADDSW mm2/m64, mm1","paddsw mm2/m64, mm1","0F ED /r","V","V","MMX","","rw,r","",""
"PADDSW xmm1, xmm2/m128","PADDSW xmm2/m128, xmm1","paddsw xmm2/m128, xmm1","66 0F ED /r","V","V","SSE2","","rw,r","",""
"PADDUSB mm1, mm2/m64","PADDUSB mm2/m64, mm1","paddusb mm2/m64, mm1","0F DC /r","V","V","MMX","","rw,r","",""
"PADDUSB xmm1, xmm2/m128","PADDUSB xmm2/m128, xmm1","paddusb xmm2/m128, xmm1","66 0F DC /r","V","V","SSE2","","rw,r","",""
"PADDUSW mm1, mm2/m64","PADDUSW mm2/m64, mm1","paddusw mm2/m64, mm1","0F DD /r","V","V","MMX","","rw,r","",""
"PADDUSW xmm1, xmm2/m128","PADDUSW xmm2/m128, xmm1","paddusw xmm2/m128, xmm1","66 0F DD /r","V","V","SSE2","","rw,r","",""
"PADDW mm1, mm2/m64","PADDW mm2/m64, mm1","paddw mm2/m64, mm1","0F FD /r","V","V","MMX","","rw,r","",""
"PADDW xmm1, xmm2/m128","PADDW xmm2/m128, xmm1","paddw xmm2/m128, xmm1","66 0F FD /r","V","V","SSE2","","rw,r","",""
"PALIGNR mm1, mm2/m64, imm8","PALIGNR imm8, mm2/m64, mm1","palignr imm8, mm2/m64, mm1","0F 3A 0F /r ib","V","V","SSSE3","","rw,r,r","",""
"PALIGNR xmm1, xmm2/m128, imm8","PALIGNR imm8, xmm2/m128, xmm1","palignr imm8, xmm2/m128, xmm1","66 0F 3A 0F /r ib","V","V","SSSE3","","rw,r,r","",""
"PAND mm1, mm2/m64","PAND mm2/m64, mm1","pand mm2/m64, mm1","0F DB /r","V","V","MMX","","rw,r","",""
"PAND xmm1, xmm2/m128","PAND xmm2/m128, xmm1","pand xmm2/m128, xmm1","66 0F DB /r","V","V","SSE2","","rw,r","",""
"PANDN mm1, mm2/m64","PANDN mm2/m64, mm1","pandn mm2/m64, mm1","0F DF /r","V","V","MMX","","rw,r","",""
"PANDN xmm1, xmm2/m128","PANDN xmm2/m128, xmm1","pandn xmm2/m128, xmm1","66 0F DF /r","V","V","SSE2","","rw,r","",""
"PAUSE","PAUSE","pause","F3 90","V","V","","pseudo","","",""
"PAVGB mm1, mm2/m64","PAVGB mm2/m64, mm1","pavgb mm2/m64, mm1","0F E0 /r","V","V","SSE","","rw,r","",""
"PAVGB xmm1, xmm2/m128","PAVGB xmm2/m128, xmm1","pavgb xmm2/m128, xmm1","66 0F E0 /r","V","V","SSE2","","rw,r","",""
"PAVGW mm1, mm2/m64","PAVGW mm2/m64, mm1","pavgw mm2/m64, mm1","0F E3 /r","V","V","SSE","","rw,r","",""
"PAVGW xmm1, xmm2/m128","PAVGW xmm2/m128, xmm1","pavgw xmm2/m128, xmm1","66 0F E3 /r","V","V","SSE2","","rw,r","",""
"PBLENDVB xmm1, xmm2/m128, ","PBLENDVB , xmm2/m128, xmm1","pblendvb , xmm2/m128, xmm1","66 0F 38 10 /r","V","V","SSE4_1","","rw,r,r","",""
"PBLENDW xmm1, xmm2/m128, imm8","PBLENDW imm8, xmm2/m128, xmm1","pblendw imm8, xmm2/m128, xmm1","66 0F 3A 0E /r ib","V","V","SSE4_1","","rw,r,r","",""
"PCLMULQDQ xmm1, xmm2/m128, imm8","PCLMULQDQ imm8, xmm2/m128, xmm1","pclmulqdq imm8, xmm2/m128, xmm1","66 0F 3A 44 /r ib","V","V","PCLMULQDQ","","rw,r,r","",""
"PCMPEQB mm1, mm2/m64","PCMPEQB mm2/m64, mm1","pcmpeqb mm2/m64, mm1","0F 74 /r","V","V","MMX","","rw,r","",""
"PCMPEQB xmm1, xmm2/m128","PCMPEQB xmm2/m128, xmm1","pcmpeqb xmm2/m128, xmm1","66 0F 74 /r","V","V","SSE2","","rw,r","",""
"PCMPEQD mm1, mm2/m64","PCMPEQL mm2/m64, mm1","pcmpeqd mm2/m64, mm1","0F 76 /r","V","V","MMX","","rw,r","",""
"PCMPEQD xmm1, xmm2/m128","PCMPEQL xmm2/m128, xmm1","pcmpeqd xmm2/m128, xmm1","66 0F 76 /r","V","V","SSE2","","rw,r","",""
"PCMPEQQ xmm1, xmm2/m128","PCMPEQQ xmm2/m128, xmm1","pcmpeqq xmm2/m128, xmm1","66 0F 38 29 /r","V","V","SSE4_1","","rw,r","",""
"PCMPEQW mm1, mm2/m64","PCMPEQW mm2/m64, mm1","pcmpeqw mm2/m64, mm1","0F 75 /r","V","V","MMX","","rw,r","",""
"PCMPEQW xmm1, xmm2/m128","PCMPEQW xmm2/m128, xmm1","pcmpeqw xmm2/m128, xmm1","66 0F 75 /r","V","V","SSE2","","rw,r","",""
"PCMPESTRI xmm1, xmm2/m128, imm8","PCMPESTRI imm8, xmm2/m128, xmm1","pcmpestri imm8, xmm2/m128, xmm1","66 0F 3A 61 /r ib","V","V","SSE4_2","","r,r,r","",""
"PCMPESTRM xmm1, xmm2/m128, imm8","PCMPESTRM imm8, xmm2/m128, xmm1","pcmpestrm imm8, xmm2/m128, xmm1","66 0F 3A 60 /r ib","V","V","SSE4_2","","r,r,r","",""
"PCMPGTB mm1, mm2/m64","PCMPGTB mm2/m64, mm1","pcmpgtb mm2/m64, mm1","0F 64 /r","V","V","MMX","","rw,r","",""
"PCMPGTB xmm1, xmm2/m128","PCMPGTB xmm2/m128, xmm1","pcmpgtb xmm2/m128, xmm1","66 0F 64 /r","V","V","SSE2","","rw,r","",""
"PCMPGTD mm1, mm2/m64","PCMPGTL mm2/m64, mm1","pcmpgtd mm2/m64, mm1","0F 66 /r","V","V","MMX","","rw,r","",""
"PCMPGTD xmm1, xmm2/m128","PCMPGTL xmm2/m128, xmm1","pcmpgtd xmm2/m128, xmm1","66 0F 66 /r","V","V","SSE2","","rw,r","",""
"PCMPGTQ xmm1, xmm2/m128","PCMPGTQ xmm2/m128, xmm1","pcmpgtq xmm2/m128, xmm1","66 0F 38 37 /r","V","V","SSE4_2","","rw,r","",""
"PCMPGTW mm1, mm2/m64","PCMPGTW mm2/m64, mm1","pcmpgtw mm2/m64, mm1","0F 65 /r","V","V","MMX","","rw,r","",""
"PCMPGTW xmm1, xmm2/m128","PCMPGTW xmm2/m128, xmm1","pcmpgtw xmm2/m128, xmm1","66 0F 65 /r","V","V","SSE2","","rw,r","",""
"PCMPISTRI xmm1, xmm2/m128, imm8","PCMPISTRI imm8, xmm2/m128, xmm1","pcmpistri imm8, xmm2/m128, xmm1","66 0F 3A 63 /r ib","V","V","SSE4_2","","r,r,r","",""
"PCMPISTRM xmm1, xmm2/m128, imm8","PCMPISTRM imm8, xmm2/m128, xmm1","pcmpistrm imm8, xmm2/m128, xmm1","66 0F 3A 62 /r ib","V","V","SSE4_2","","r,r,r","",""
"PDEP r32, r32V, r/m32","PDEPL r/m32, r32V, r32","pdepl r/m32, r32V, r32","VEX.NDS.LZ.F2.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
"PDEP r64, r64V, r/m64","PDEPQ r/m64, r64V, r64","pdepq r/m64, r64V, r64","VEX.NDS.LZ.F2.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"PEXT r32, r32V, r/m32","PEXTL r/m32, r32V, r32","pextl r/m32, r32V, r32","VEX.NDS.LZ.F3.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
"PEXT r64, r64V, r/m64","PEXTQ r/m64, r64V, r64","pextq r/m64, r64V, r64","VEX.NDS.LZ.F3.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"PEXTRB r32/m8, xmm1, imm8","PEXTRB imm8, xmm1, r32/m8","pextrb imm8, xmm1, r32/m8","66 0F 3A 14 /r ib","V","V","SSE4_1","","w,r,r","",""
"PEXTRD r/m32, xmm1, imm8","PEXTRD imm8, xmm1, r/m32","pextrd imm8, xmm1, r/m32","66 0F 3A 16 /r ib","V","V","SSE4_1","operand16,operand32","w,r,r","",""
"PEXTRQ r/m64, xmm1, imm8","PEXTRQ imm8, xmm1, r/m64","pextrq imm8, xmm1, r/m64","66 REX.W 0F 3A 16 /r ib","N.E.","V","SSE4_1","","w,r,r","",""
"PEXTRW r32, mm2, imm8","PEXTRW imm8, mm2, r32","pextrw imm8, mm2, r32","0F C5 /r ib","V","V","SSE","","w,r,r","",""
"PEXTRW r32, xmm2, imm8","PEXTRW imm8, xmm2, r32","pextrw imm8, xmm2, r32","66 0F C5 /r ib","V","V","SSE2","modrm_regonly","w,r,r","",""
"PEXTRW r32/m16, xmm1, imm8","PEXTRW imm8, xmm1, r32/m16","pextrw imm8, xmm1, r32/m16","66 0F 3A 15 /r ib","V","V","SSE4_1","","w,r,r","",""
"PHADDD mm1, mm2/m64","PHADDD mm2/m64, mm1","phaddd mm2/m64, mm1","0F 38 02 /r","V","V","SSSE3","","rw,r","",""
"PHADDD xmm1, xmm2/m128","PHADDD xmm2/m128, xmm1","phaddd xmm2/m128, xmm1","66 0F 38 02 /r","V","V","SSSE3","","rw,r","",""
"PHADDSW mm1, mm2/m64","PHADDSW mm2/m64, mm1","phaddsw mm2/m64, mm1","0F 38 03 /r","V","V","SSSE3","","rw,r","",""
"PHADDSW xmm1, xmm2/m128","PHADDSW xmm2/m128, xmm1","phaddsw xmm2/m128, xmm1","66 0F 38 03 /r","V","V","SSSE3","","rw,r","",""
"PHADDW mm1, mm2/m64","PHADDW mm2/m64, mm1","phaddw mm2/m64, mm1","0F 38 01 /r","V","V","SSSE3","","rw,r","",""
"PHADDW xmm1, xmm2/m128","PHADDW xmm2/m128, xmm1","phaddw xmm2/m128, xmm1","66 0F 38 01 /r","V","V","SSSE3","","rw,r","",""
"PHMINPOSUW xmm1, xmm2/m128","PHMINPOSUW xmm2/m128, xmm1","phminposuw xmm2/m128, xmm1","66 0F 38 41 /r","V","V","SSE4_1","","w,r","",""
"PHSUBD mm1, mm2/m64","PHSUBD mm2/m64, mm1","phsubd mm2/m64, mm1","0F 38 06 /r","V","V","SSSE3","","rw,r","",""
"PHSUBD xmm1, xmm2/m128","PHSUBD xmm2/m128, xmm1","phsubd xmm2/m128, xmm1","66 0F 38 06 /r","V","V","SSSE3","","rw,r","",""
"PHSUBSW mm1, mm2/m64","PHSUBSW mm2/m64, mm1","phsubsw mm2/m64, mm1","0F 38 07 /r","V","V","SSSE3","","rw,r","",""
"PHSUBSW xmm1, xmm2/m128","PHSUBSW xmm2/m128, xmm1","phsubsw xmm2/m128, xmm1","66 0F 38 07 /r","V","V","SSSE3","","rw,r","",""
"PHSUBW mm1, mm2/m64","PHSUBW mm2/m64, mm1","phsubw mm2/m64, mm1","0F 38 05 /r","V","V","SSSE3","","rw,r","",""
"PHSUBW xmm1, xmm2/m128","PHSUBW xmm2/m128, xmm1","phsubw xmm2/m128, xmm1","66 0F 38 05 /r","V","V","SSSE3","","rw,r","",""
"PINSRB xmm1, r32/m8, imm8","PINSRB imm8, r32/m8, xmm1","pinsrb imm8, r32/m8, xmm1","66 0F 3A 20 /r ib","V","V","SSE4_1","","w,r,r","",""
"PINSRD xmm1, r/m32, imm8","PINSRD imm8, r/m32, xmm1","pinsrd imm8, r/m32, xmm1","66 0F 3A 22 /r ib","V","V","SSE4_1","operand16,operand32","w,r,r","",""
"PINSRQ xmm1, r/m64, imm8","PINSRQ imm8, r/m64, xmm1","pinsrq imm8, r/m64, xmm1","66 REX.W 0F 3A 22 /r ib","N.E.","V","SSE4_1","","w,r,r","",""
"PINSRW mm1, r32/m16, imm8","PINSRW imm8, r32/m16, mm1","pinsrw imm8, r32/m16, mm1","0F C4 /r ib","V","V","SSE","","w,r,r","",""
"PINSRW xmm1, r32/m16, imm8","PINSRW imm8, r32/m16, xmm1","pinsrw imm8, r32/m16, xmm1","66 0F C4 /r ib","V","V","SSE2","","w,r,r","",""
"PMADDUBSW mm1, mm2/m64","PMADDUBSW mm2/m64, mm1","pmaddubsw mm2/m64, mm1","0F 38 04 /r","V","V","SSSE3","","rw,r","",""
"PMADDUBSW xmm1, xmm2/m128","PMADDUBSW xmm2/m128, xmm1","pmaddubsw xmm2/m128, xmm1","66 0F 38 04 /r","V","V","SSSE3","","rw,r","",""
"PMADDWD mm1, mm2/m64","PMADDWL mm2/m64, mm1","pmaddwd mm2/m64, mm1","0F F5 /r","V","V","MMX","","rw,r","",""
"PMADDWD xmm1, xmm2/m128","PMADDWL xmm2/m128, xmm1","pmaddwd xmm2/m128, xmm1","66 0F F5 /r","V","V","SSE2","","rw,r","",""
"PMAXSB xmm1, xmm2/m128","PMAXSB xmm2/m128, xmm1","pmaxsb xmm2/m128, xmm1","66 0F 38 3C /r","V","V","SSE4_1","","rw,r","",""
"PMAXSD xmm1, xmm2/m128","PMAXSD xmm2/m128, xmm1","pmaxsd xmm2/m128, xmm1","66 0F 38 3D /r","V","V","SSE4_1","","rw,r","",""
"PMAXSW mm1, mm2/m64","PMAXSW mm2/m64, mm1","pmaxsw mm2/m64, mm1","0F EE /r","V","V","SSE","","rw,r","",""
"PMAXSW xmm1, xmm2/m128","PMAXSW xmm2/m128, xmm1","pmaxsw xmm2/m128, xmm1","66 0F EE /r","V","V","SSE2","","rw,r","",""
"PMAXUB mm1, mm2/m64","PMAXUB mm2/m64, mm1","pmaxub mm2/m64, mm1","0F DE /r","V","V","SSE","","rw,r","",""
"PMAXUB xmm1, xmm2/m128","PMAXUB xmm2/m128, xmm1","pmaxub xmm2/m128, xmm1","66 0F DE /r","V","V","SSE2","","rw,r","",""
"PMAXUD xmm1, xmm2/m128","PMAXUD xmm2/m128, xmm1","pmaxud xmm2/m128, xmm1","66 0F 38 3F /r","V","V","SSE4_1","","rw,r","",""
"PMAXUW xmm1, xmm2/m128","PMAXUW xmm2/m128, xmm1","pmaxuw xmm2/m128, xmm1","66 0F 38 3E /r","V","V","SSE4_1","","rw,r","",""
"PMINSB xmm1, xmm2/m128","PMINSB xmm2/m128, xmm1","pminsb xmm2/m128, xmm1","66 0F 38 38 /r","V","V","SSE4_1","","rw,r","",""
"PMINSD xmm1, xmm2/m128","PMINSD xmm2/m128, xmm1","pminsd xmm2/m128, xmm1","66 0F 38 39 /r","V","V","SSE4_1","","rw,r","",""
"PMINSW mm1, mm2/m64","PMINSW mm2/m64, mm1","pminsw mm2/m64, mm1","0F EA /r","V","V","SSE","","rw,r","",""
"PMINSW xmm1, xmm2/m128","PMINSW xmm2/m128, xmm1","pminsw xmm2/m128, xmm1","66 0F EA /r","V","V","SSE2","","rw,r","",""
"PMINUB mm1, mm2/m64","PMINUB mm2/m64, mm1","pminub mm2/m64, mm1","0F DA /r","V","V","SSE","","rw,r","",""
"PMINUB xmm1, xmm2/m128","PMINUB xmm2/m128, xmm1","pminub xmm2/m128, xmm1","66 0F DA /r","V","V","SSE2","","rw,r","",""
"PMINUD xmm1, xmm2/m128","PMINUD xmm2/m128, xmm1","pminud xmm2/m128, xmm1","66 0F 38 3B /r","V","V","SSE4_1","","rw,r","",""
"PMINUW xmm1, xmm2/m128","PMINUW xmm2/m128, xmm1","pminuw xmm2/m128, xmm1","66 0F 38 3A /r","V","V","SSE4_1","","rw,r","",""
"PMOVMSKB r32, mm2","PMOVMSKB mm2, r32","pmovmskb mm2, r32","0F D7 /r","V","V","SSE","","w,r","",""
"PMOVMSKB r32, xmm2","PMOVMSKB xmm2, r32","pmovmskb xmm2, r32","66 0F D7 /r","V","V","SSE2","modrm_regonly","w,r","",""
"PMOVSXBD xmm1, xmm2/m32","PMOVSXBD xmm2/m32, xmm1","pmovsxbd xmm2/m32, xmm1","66 0F 38 21 /r","V","V","SSE4_1","","w,r","",""
"PMOVSXBQ xmm1, xmm2/m16","PMOVSXBQ xmm2/m16, xmm1","pmovsxbq xmm2/m16, xmm1","66 0F 38 22 /r","V","V","SSE4_1","","w,r","",""
"PMOVSXBW xmm1, xmm2/m64","PMOVSXBW xmm2/m64, xmm1","pmovsxbw xmm2/m64, xmm1","66 0F 38 20 /r","V","V","SSE4_1","","w,r","",""
"PMOVSXDQ xmm1, xmm2/m64","PMOVSXDQ xmm2/m64, xmm1","pmovsxdq xmm2/m64, xmm1","66 0F 38 25 /r","V","V","SSE4_1","","w,r","",""
"PMOVSXWD xmm1, xmm2/m64","PMOVSXWD xmm2/m64, xmm1","pmovsxwd xmm2/m64, xmm1","66 0F 38 23 /r","V","V","SSE4_1","","w,r","",""
"PMOVSXWQ xmm1, xmm2/m32","PMOVSXWQ xmm2/m32, xmm1","pmovsxwq xmm2/m32, xmm1","66 0F 38 24 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXBD xmm1, xmm2/m32","PMOVZXBD xmm2/m32, xmm1","pmovzxbd xmm2/m32, xmm1","66 0F 38 31 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXBQ xmm1, xmm2/m16","PMOVZXBQ xmm2/m16, xmm1","pmovzxbq xmm2/m16, xmm1","66 0F 38 32 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXBW xmm1, xmm2/m64","PMOVZXBW xmm2/m64, xmm1","pmovzxbw xmm2/m64, xmm1","66 0F 38 30 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXDQ xmm1, xmm2/m64","PMOVZXDQ xmm2/m64, xmm1","pmovzxdq xmm2/m64, xmm1","66 0F 38 35 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXWD xmm1, xmm2/m64","PMOVZXWD xmm2/m64, xmm1","pmovzxwd xmm2/m64, xmm1","66 0F 38 33 /r","V","V","SSE4_1","","w,r","",""
"PMOVZXWQ xmm1, xmm2/m32","PMOVZXWQ xmm2/m32, xmm1","pmovzxwq xmm2/m32, xmm1","66 0F 38 34 /r","V","V","SSE4_1","","w,r","",""
"PMULDQ xmm1, xmm2/m128","PMULDQ xmm2/m128, xmm1","pmuldq xmm2/m128, xmm1","66 0F 38 28 /r","V","V","SSE4_1","","rw,r","",""
"PMULHRSW mm1, mm2/m64","PMULHRSW mm2/m64, mm1","pmulhrsw mm2/m64, mm1","0F 38 0B /r","V","V","SSSE3","","rw,r","",""
"PMULHRSW xmm1, xmm2/m128","PMULHRSW xmm2/m128, xmm1","pmulhrsw xmm2/m128, xmm1","66 0F 38 0B /r","V","V","SSSE3","","rw,r","",""
"PMULHUW mm1, mm2/m64","PMULHUW mm2/m64, mm1","pmulhuw mm2/m64, mm1","0F E4 /r","V","V","SSE","","rw,r","",""
"PMULHUW xmm1, xmm2/m128","PMULHUW xmm2/m128, xmm1","pmulhuw xmm2/m128, xmm1","66 0F E4 /r","V","V","SSE2","","rw,r","",""
"PMULHW mm1, mm2/m64","PMULHW mm2/m64, mm1","pmulhw mm2/m64, mm1","0F E5 /r","V","V","MMX","","rw,r","",""
"PMULHW xmm1, xmm2/m128","PMULHW xmm2/m128, xmm1","pmulhw xmm2/m128, xmm1","66 0F E5 /r","V","V","SSE2","","rw,r","",""
"PMULLD xmm1, xmm2/m128","PMULLD xmm2/m128, xmm1","pmulld xmm2/m128, xmm1","66 0F 38 40 /r","V","V","SSE4_1","","rw,r","",""
"PMULLW mm1, mm2/m64","PMULLW mm2/m64, mm1","pmullw mm2/m64, mm1","0F D5 /r","V","V","MMX","","rw,r","",""
"PMULLW xmm1, xmm2/m128","PMULLW xmm2/m128, xmm1","pmullw xmm2/m128, xmm1","66 0F D5 /r","V","V","SSE2","","rw,r","",""
"PMULUDQ mm1, mm2/m64","PMULULQ mm2/m64, mm1","pmuludq mm2/m64, mm1","0F F4 /r","V","V","SSE2","","rw,r","",""
"PMULUDQ xmm1, xmm2/m128","PMULULQ xmm2/m128, xmm1","pmuludq xmm2/m128, xmm1","66 0F F4 /r","V","V","SSE2","","rw,r","",""
"POP DS","POPW/POPL/POPQ DS","popw/popl/popq DS","1F","V","I","","","w","Y",""
"POP ES","POPW/POPL/POPQ ES","popw/popl/popq ES","07","V","I","","","w","Y",""
"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","V","N.E.","","operand32","w","Y",""
"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","V","V","","operand16","w","Y",""
"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","N.E.","V","","operand32,operand64","w","Y",""
"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","V","N.E.","","operand32","w","Y",""
"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","V","V","","operand16","w","Y",""
"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","N.E.","V","","operand32,operand64","w","Y",""
"POP SS","POPW/POPL/POPQ SS","popw/popl/popq SS","17","V","I","","","w","Y",""
"POP r/m16","POPW r/m16","popw r/m16","8F /0","V","V","","operand16","w","Y","16"
"POP r/m32","POPL r/m32","popl r/m32","8F /0","V","N.E.","","operand32","w","Y","32"
"POP r/m64","POPQ r/m64","popq r/m64","8F /0","N.E.","V","","operand32,operand64","w","Y","64"
"POP r16op","POPW r16op","popw r16op","58+rw","V","V","","operand16","w","Y","16"
"POP r32op","POPL r32op","popl r32op","58+rd","V","N.E.","","operand32","w","Y","32"
"POP r64op","POPQ r64op","popq r64op","58+rd","N.E.","V","","operand32,operand64","w","Y","64"
"POPA","POPAW","popaw","61","V","I","","operand16","","",""
"POPAD","POPAL","popal","61","V","I","","operand32","","",""
"POPCNT r16, r/m16","POPCNTW r/m16, r16","popcntw r/m16, r16","F3 0F B8 /r","V","V","","operand16","w,r","Y","16"
"POPCNT r32, r/m32","POPCNTL r/m32, r32","popcntl r/m32, r32","F3 0F B8 /r","V","V","","operand32","w,r","Y","32"
"POPCNT r64, r/m64","POPCNTQ r/m64, r64","popcntq r/m64, r64","F3 REX.W 0F B8 /r","N.E.","V","","","w,r","Y","64"
"POPF","POPFW","popfw","9D","V","V","","operand16","","",""
"POPFD","POPFL","popfl","9D","V","N.E.","","operand32","","",""
"POPFQ","POPFQ","popfq","9D","N.E.","V","","operand32,operand64","","",""
"POR mm1, mm2/m64","POR mm2/m64, mm1","por mm2/m64, mm1","0F EB /r","V","V","MMX","","rw,r","",""
"POR xmm1, xmm2/m128","POR xmm2/m128, xmm1","por xmm2/m128, xmm1","66 0F EB /r","V","V","SSE2","","rw,r","",""
"PREFETCHNTA m8","PREFETCHNTA m8","prefetchnta m8","0F 18 /0","V","V","","modrm_memonly","r","",""
"PREFETCHT0 m8","PREFETCHT0 m8","prefetcht0 m8","0F 18 /1","V","V","","modrm_memonly","r","",""
"PREFETCHT1 m8","PREFETCHT1 m8","prefetcht1 m8","0F 18 /2","V","V","","modrm_memonly","r","",""
"PREFETCHT2 m8","PREFETCHT2 m8","prefetcht2 m8","0F 18 /3","V","V","","modrm_memonly","r","",""
"PREFETCHW m8","PREFETCHW m8","prefetchw m8","0F 0D /1","V","V","PRFCHW","modrm_memonly","r","",""
"PREFETCHWT1 m8","PREFETCHWT1 m8","prefetchwt1 m8","0F 0D /2","V","V","PREFETCHWT1","modrm_memonly","r","",""
"PSADBW mm1, mm2/m64","PSADBW mm2/m64, mm1","psadbw mm2/m64, mm1","0F F6 /r","V","V","SSE","","rw,r","",""
"PSADBW xmm1, xmm2/m128","PSADBW xmm2/m128, xmm1","psadbw xmm2/m128, xmm1","66 0F F6 /r","V","V","SSE2","","rw,r","",""
"PSHUFB mm1, mm2/m64","PSHUFB mm2/m64, mm1","pshufb mm2/m64, mm1","0F 38 00 /r","V","V","SSSE3","","rw,r","",""
"PSHUFB xmm1, xmm2/m128","PSHUFB xmm2/m128, xmm1","pshufb xmm2/m128, xmm1","66 0F 38 00 /r","V","V","SSSE3","","rw,r","",""
"PSHUFD xmm1, xmm2/m128, imm8","PSHUFD imm8, xmm2/m128, xmm1","pshufd imm8, xmm2/m128, xmm1","66 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
"PSHUFHW xmm1, xmm2/m128, imm8","PSHUFHW imm8, xmm2/m128, xmm1","pshufhw imm8, xmm2/m128, xmm1","F3 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
"PSHUFLW xmm1, xmm2/m128, imm8","PSHUFLW imm8, xmm2/m128, xmm1","pshuflw imm8, xmm2/m128, xmm1","F2 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
"PSHUFW mm1, mm2/m64, imm8","PSHUFW imm8, mm2/m64, mm1","pshufw imm8, mm2/m64, mm1","0F 70 /r ib","V","V","","","w,r,r","",""
"PSIGNB mm1, mm2/m64","PSIGNB mm2/m64, mm1","psignb mm2/m64, mm1","0F 38 08 /r","V","V","SSSE3","","rw,r","",""
"PSIGNB xmm1, xmm2/m128","PSIGNB xmm2/m128, xmm1","psignb xmm2/m128, xmm1","66 0F 38 08 /r","V","V","SSSE3","","rw,r","",""
"PSIGND mm1, mm2/m64","PSIGND mm2/m64, mm1","psignd mm2/m64, mm1","0F 38 0A /r","V","V","SSSE3","","rw,r","",""
"PSIGND xmm1, xmm2/m128","PSIGND xmm2/m128, xmm1","psignd xmm2/m128, xmm1","66 0F 38 0A /r","V","V","SSSE3","","rw,r","",""
"PSIGNW mm1, mm2/m64","PSIGNW mm2/m64, mm1","psignw mm2/m64, mm1","0F 38 09 /r","V","V","SSSE3","","rw,r","",""
"PSIGNW xmm1, xmm2/m128","PSIGNW xmm2/m128, xmm1","psignw xmm2/m128, xmm1","66 0F 38 09 /r","V","V","SSSE3","","rw,r","",""
"PSLLD mm1, mm2/m64","PSLLL mm2/m64, mm1","pslld mm2/m64, mm1","0F F2 /r","V","V","MMX","","rw,r","",""
"PSLLD mm2, imm8","PSLLL imm8, mm2","pslld imm8, mm2","0F 72 /6 ib","V","V","MMX","","rw,r","",""
"PSLLD xmm1, xmm2/m128","PSLLL xmm2/m128, xmm1","pslld xmm2/m128, xmm1","66 0F F2 /r","V","V","SSE2","","rw,r","",""
"PSLLD xmm2, imm8","PSLLL imm8, xmm2","pslld imm8, xmm2","66 0F 72 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSLLDQ xmm2, imm8","PSLLO imm8, xmm2","pslldq imm8, xmm2","66 0F 73 /7 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSLLQ mm1, mm2/m64","PSLLQ mm2/m64, mm1","psllq mm2/m64, mm1","0F F3 /r","V","V","MMX","","rw,r","",""
"PSLLQ mm2, imm8","PSLLQ imm8, mm2","psllq imm8, mm2","0F 73 /6 ib","V","V","MMX","","rw,r","",""
"PSLLQ xmm1, xmm2/m128","PSLLQ xmm2/m128, xmm1","psllq xmm2/m128, xmm1","66 0F F3 /r","V","V","SSE2","","rw,r","",""
"PSLLQ xmm2, imm8","PSLLQ imm8, xmm2","psllq imm8, xmm2","66 0F 73 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSLLW mm1, mm2/m64","PSLLW mm2/m64, mm1","psllw mm2/m64, mm1","0F F1 /r","V","V","MMX","","rw,r","",""
"PSLLW mm2, imm8","PSLLW imm8, mm2","psllw imm8, mm2","0F 71 /6 ib","V","V","MMX","","rw,r","",""
"PSLLW xmm1, xmm2/m128","PSLLW xmm2/m128, xmm1","psllw xmm2/m128, xmm1","66 0F F1 /r","V","V","SSE2","","rw,r","",""
"PSLLW xmm2, imm8","PSLLW imm8, xmm2","psllw imm8, xmm2","66 0F 71 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRAD mm1, mm2/m64","PSRAL mm2/m64, mm1","psrad mm2/m64, mm1","0F E2 /r","V","V","MMX","","rw,r","",""
"PSRAD mm2, imm8","PSRAL imm8, mm2","psrad imm8, mm2","0F 72 /4 ib","V","V","MMX","","rw,r","",""
"PSRAD xmm1, xmm2/m128","PSRAL xmm2/m128, xmm1","psrad xmm2/m128, xmm1","66 0F E2 /r","V","V","SSE2","","rw,r","",""
"PSRAD xmm2, imm8","PSRAL imm8, xmm2","psrad imm8, xmm2","66 0F 72 /4 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRAW mm1, mm2/m64","PSRAW mm2/m64, mm1","psraw mm2/m64, mm1","0F E1 /r","V","V","MMX","","rw,r","",""
"PSRAW mm2, imm8","PSRAW imm8, mm2","psraw imm8, mm2","0F 71 /4 ib","V","V","MMX","","rw,r","",""
"PSRAW xmm1, xmm2/m128","PSRAW xmm2/m128, xmm1","psraw xmm2/m128, xmm1","66 0F E1 /r","V","V","SSE2","","rw,r","",""
"PSRAW xmm2, imm8","PSRAW imm8, xmm2","psraw imm8, xmm2","66 0F 71 /4 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRLD mm1, mm2/m64","PSRLL mm2/m64, mm1","psrld mm2/m64, mm1","0F D2 /r","V","V","MMX","","rw,r","",""
"PSRLD mm2, imm8","PSRLL imm8, mm2","psrld imm8, mm2","0F 72 /2 ib","V","V","MMX","","rw,r","",""
"PSRLD xmm1, xmm2/m128","PSRLL xmm2/m128, xmm1","psrld xmm2/m128, xmm1","66 0F D2 /r","V","V","SSE2","","rw,r","",""
"PSRLD xmm2, imm8","PSRLL imm8, xmm2","psrld imm8, xmm2","66 0F 72 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRLDQ xmm2, imm8","PSRLO imm8, xmm2","psrldq imm8, xmm2","66 0F 73 /3 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRLQ mm1, mm2/m64","PSRLQ mm2/m64, mm1","psrlq mm2/m64, mm1","0F D3 /r","V","V","MMX","","rw,r","",""
"PSRLQ mm2, imm8","PSRLQ imm8, mm2","psrlq imm8, mm2","0F 73 /2 ib","V","V","MMX","","rw,r","",""
"PSRLQ xmm1, xmm2/m128","PSRLQ xmm2/m128, xmm1","psrlq xmm2/m128, xmm1","66 0F D3 /r","V","V","SSE2","","rw,r","",""
"PSRLQ xmm2, imm8","PSRLQ imm8, xmm2","psrlq imm8, xmm2","66 0F 73 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSRLW mm1, mm2/m64","PSRLW mm2/m64, mm1","psrlw mm2/m64, mm1","0F D1 /r","V","V","MMX","","rw,r","",""
"PSRLW mm2, imm8","PSRLW imm8, mm2","psrlw imm8, mm2","0F 71 /2 ib","V","V","MMX","","rw,r","",""
"PSRLW xmm1, xmm2/m128","PSRLW xmm2/m128, xmm1","psrlw xmm2/m128, xmm1","66 0F D1 /r","V","V","SSE2","","rw,r","",""
"PSRLW xmm2, imm8","PSRLW imm8, xmm2","psrlw imm8, xmm2","66 0F 71 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
"PSUBB mm1, mm2/m64","PSUBB mm2/m64, mm1","psubb mm2/m64, mm1","0F F8 /r","V","V","MMX","","rw,r","",""
"PSUBB xmm1, xmm2/m128","PSUBB xmm2/m128, xmm1","psubb xmm2/m128, xmm1","66 0F F8 /r","V","V","SSE2","","rw,r","",""
"PSUBD mm1, mm2/m64","PSUBL mm2/m64, mm1","psubd mm2/m64, mm1","0F FA /r","V","V","MMX","","rw,r","",""
"PSUBD xmm1, xmm2/m128","PSUBL xmm2/m128, xmm1","psubd xmm2/m128, xmm1","66 0F FA /r","V","V","SSE2","","rw,r","",""
"PSUBQ mm1, mm2/m64","PSUBQ mm2/m64, mm1","psubq mm2/m64, mm1","0F FB /r","V","V","SSE2","","rw,r","",""
"PSUBQ xmm1, xmm2/m128","PSUBQ xmm2/m128, xmm1","psubq xmm2/m128, xmm1","66 0F FB /r","V","V","SSE2","","rw,r","",""
"PSUBSB mm1, mm2/m64","PSUBSB mm2/m64, mm1","psubsb mm2/m64, mm1","0F E8 /r","V","V","MMX","","rw,r","",""
"PSUBSB xmm1, xmm2/m128","PSUBSB xmm2/m128, xmm1","psubsb xmm2/m128, xmm1","66 0F E8 /r","V","V","SSE2","","rw,r","",""
"PSUBSW mm1, mm2/m64","PSUBSW mm2/m64, mm1","psubsw mm2/m64, mm1","0F E9 /r","V","V","MMX","","rw,r","",""
"PSUBSW xmm1, xmm2/m128","PSUBSW xmm2/m128, xmm1","psubsw xmm2/m128, xmm1","66 0F E9 /r","V","V","SSE2","","rw,r","",""
"PSUBUSB mm1, mm2/m64","PSUBUSB mm2/m64, mm1","psubusb mm2/m64, mm1","0F D8 /r","V","V","MMX","","rw,r","",""
"PSUBUSB xmm1, xmm2/m128","PSUBUSB xmm2/m128, xmm1","psubusb xmm2/m128, xmm1","66 0F D8 /r","V","V","SSE2","","rw,r","",""
"PSUBUSW mm1, mm2/m64","PSUBUSW mm2/m64, mm1","psubusw mm2/m64, mm1","0F D9 /r","V","V","MMX","","rw,r","",""
"PSUBUSW xmm1, xmm2/m128","PSUBUSW xmm2/m128, xmm1","psubusw xmm2/m128, xmm1","66 0F D9 /r","V","V","SSE2","","rw,r","",""
"PSUBW mm1, mm2/m64","PSUBW mm2/m64, mm1","psubw mm2/m64, mm1","0F F9 /r","V","V","MMX","","rw,r","",""
"PSUBW xmm1, xmm2/m128","PSUBW xmm2/m128, xmm1","psubw xmm2/m128, xmm1","66 0F F9 /r","V","V","SSE2","","rw,r","",""
"PTEST xmm1, xmm2/m128","PTEST xmm2/m128, xmm1","ptest xmm2/m128, xmm1","66 0F 38 17 /r","V","V","SSE4_1","","r,r","",""
"PUNPCKHBW mm1, mm2/m64","PUNPCKHBW mm2/m64, mm1","punpckhbw mm2/m64, mm1","0F 68 /r","V","V","MMX","","rw,r","",""
"PUNPCKHBW xmm1, xmm2/m128","PUNPCKHBW xmm2/m128, xmm1","punpckhbw xmm2/m128, xmm1","66 0F 68 /r","V","V","SSE2","","rw,r","",""
"PUNPCKHDQ mm1, mm2/m64","PUNPCKHLQ mm2/m64, mm1","punpckhdq mm2/m64, mm1","0F 6A /r","V","V","MMX","","rw,r","",""
"PUNPCKHDQ xmm1, xmm2/m128","PUNPCKHLQ xmm2/m128, xmm1","punpckhdq xmm2/m128, xmm1","66 0F 6A /r","V","V","SSE2","","rw,r","",""
"PUNPCKHQDQ xmm1, xmm2/m128","PUNPCKHQDQ xmm2/m128, xmm1","punpckhqdq xmm2/m128, xmm1","66 0F 6D /r","V","V","SSE2","","rw,r","",""
"PUNPCKHWD mm1, mm2/m64","PUNPCKHWL mm2/m64, mm1","punpckhwd mm2/m64, mm1","0F 69 /r","V","V","MMX","","rw,r","",""
"PUNPCKHWD xmm1, xmm2/m128","PUNPCKHWL xmm2/m128, xmm1","punpckhwd xmm2/m128, xmm1","66 0F 69 /r","V","V","SSE2","","rw,r","",""
"PUNPCKLBW mm1, mm2/m32","PUNPCKLBW mm2/m32, mm1","punpcklbw mm2/m32, mm1","0F 60 /r","V","V","MMX","","rw,r","",""
"PUNPCKLBW xmm1, xmm2/m128","PUNPCKLBW xmm2/m128, xmm1","punpcklbw xmm2/m128, xmm1","66 0F 60 /r","V","V","SSE2","","rw,r","",""
"PUNPCKLDQ mm1, mm2/m32","PUNPCKLLQ mm2/m32, mm1","punpckldq mm2/m32, mm1","0F 62 /r","V","V","MMX","","rw,r","",""
"PUNPCKLDQ xmm1, xmm2/m128","PUNPCKLLQ xmm2/m128, xmm1","punpckldq xmm2/m128, xmm1","66 0F 62 /r","V","V","SSE2","","rw,r","",""
"PUNPCKLQDQ xmm1, xmm2/m128","PUNPCKLQDQ xmm2/m128, xmm1","punpcklqdq xmm2/m128, xmm1","66 0F 6C /r","V","V","SSE2","","rw,r","",""
"PUNPCKLWD mm1, mm2/m32","PUNPCKLWL mm2/m32, mm1","punpcklwd mm2/m32, mm1","0F 61 /r","V","V","MMX","","rw,r","",""
"PUNPCKLWD xmm1, xmm2/m128","PUNPCKLWL xmm2/m128, xmm1","punpcklwd xmm2/m128, xmm1","66 0F 61 /r","V","V","SSE2","","rw,r","",""
"PUSH CS","PUSHW/PUSHL/PUSHQ CS","pushw/pushl/pushq CS","0E","V","I","","","r","Y",""
"PUSH DS","PUSHW/PUSHL/PUSHQ DS","pushw/pushl/pushq DS","1E","V","I","","","r","Y",""
"PUSH ES","PUSHW/PUSHL/PUSHQ ES","pushw/pushl/pushq ES","06","V","I","","","r","Y",""
"PUSH FS","PUSHW/PUSHL/PUSHQ FS","pushw/pushl/pushq FS","0F A0","V","V","","","r","Y",""
"PUSH GS","PUSHW/PUSHL/PUSHQ GS","pushw/pushl/pushq GS","0F A8","V","V","","","r","Y",""
"PUSH SS","PUSHW/PUSHL/PUSHQ SS","pushw/pushl/pushq SS","16","V","I","","","r","Y",""
"PUSH imm16","PUSHW imm16","pushw imm16","68 iw","V","V","","operand16","r","Y",""
"PUSH imm32","-/PUSHL/PUSHQ imm32","-/pushl/pushq imm32","68 id","V","V","","operand32","r","Y",""
"PUSH imm8","PUSHW/PUSHL/PUSHQ imm8","pushw/pushl/pushq imm8","6A ib","V","V","","","r","Y",""
"PUSH r/m16","PUSHW r/m16","pushw r/m16","FF /6","V","V","","operand16","r","Y","16"
"PUSH r/m32","PUSHL r/m32","pushl r/m32","FF /6","V","N.E.","","operand32","r","Y","32"
"PUSH r/m64","PUSHQ r/m64","pushq r/m64","FF /6","N.E.","V","","operand32,operand64","r","Y","64"
"PUSH r16op","PUSHW r16op","pushw r16op","50+rw","V","V","","operand16","r","Y","16"
"PUSH r32op","PUSHL r32op","pushl r32op","50+rd","V","N.E.","","operand32","r","Y","32"
"PUSH r64op","PUSHQ r64op","pushq r64op","50+rd","N.E.","V","","operand32,operand64","r","Y","64"
"PUSHA","PUSHAW","pushaw","60","V","I","","operand16","","",""
"PUSHAD","PUSHAL","pushal","60","V","I","","operand32","","",""
"PUSHF","PUSHFW","pushfw","9C","V","V","","operand16","","",""
"PUSHFD","PUSHFL","pushfl","9C","V","N.E.","","operand32","","",""
"PUSHFQ","PUSHFQ","pushfq","9C","N.E.","V","","operand32,operand64","","",""
"PXOR mm1, mm2/m64","PXOR mm2/m64, mm1","pxor mm2/m64, mm1","0F EF /r","V","V","MMX","","rw,r","",""
"PXOR xmm1, xmm2/m128","PXOR xmm2/m128, xmm1","pxor xmm2/m128, xmm1","66 0F EF /r","V","V","SSE2","","rw,r","",""
"RCL r/m16, 1","RCLW 1, r/m16","rclw 1, r/m16","D1 /2","V","V","","operand16","w,r","Y","16"
"RCL r/m16, CL","RCLW CL, r/m16","rclw CL, r/m16","D3 /2","V","V","","operand16","w,r","Y","16"
"RCL r/m16, imm8","RCLW imm8, r/m16","rclw imm8, r/m16","C1 /2 ib","V","V","","operand16","w,r","Y","16"
"RCL r/m32, 1","RCLL 1, r/m32","rcll 1, r/m32","D1 /2","V","V","","operand32","w,r","Y","32"
"RCL r/m32, CL","RCLL CL, r/m32","rcll CL, r/m32","D3 /2","V","V","","operand32","w,r","Y","32"
"RCL r/m32, imm8","RCLL imm8, r/m32","rcll imm8, r/m32","C1 /2 ib","V","V","","operand32","w,r","Y","32"
"RCL r/m64, 1","RCLQ 1, r/m64","rclq 1, r/m64","REX.W D1 /2","N.E.","V","","","w,r","Y","64"
"RCL r/m64, CL","RCLQ CL, r/m64","rclq CL, r/m64","REX.W D3 /2","N.E.","V","","","w,r","Y","64"
"RCL r/m64, imm8","RCLQ imm8, r/m64","rclq imm8, r/m64","REX.W C1 /2 ib","N.E.","V","","","w,r","Y","64"
"RCL r/m8, 1","RCLB 1, r/m8","rclb 1, r/m8","D0 /2","V","V","","","w,r","Y","8"
"RCL r/m8, 1","RCLB 1, r/m8","rclb 1, r/m8","REX D0 /2","N.E.","V","","pseudo64","w,r","Y","8"
"RCL r/m8, CL","RCLB CL, r/m8","rclb CL, r/m8","D2 /2","V","V","","","w,r","Y","8"
"RCL r/m8, CL","RCLB CL, r/m8","rclb CL, r/m8","REX D2 /2","N.E.","V","","pseudo64","w,r","Y","8"
"RCL r/m8, imm8","RCLB imm8, r/m8","rclb imm8, r/m8","C0 /2 ib","V","V","","","w,r","Y","8"
"RCL r/m8, imm8","RCLB imm8, r/m8","rclb imm8, r/m8","REX C0 /2 ib","N.E.","V","","pseudo64","w,r","Y","8"
"RCPPS xmm1, xmm2/m128","RCPPS xmm2/m128, xmm1","rcpps xmm2/m128, xmm1","0F 53 /r","V","V","SSE","","w,r","",""
"RCPSS xmm1, xmm2/m32","RCPSS xmm2/m32, xmm1","rcpss xmm2/m32, xmm1","F3 0F 53 /r","V","V","SSE","","w,r","",""
"RCR r/m16, 1","RCRW 1, r/m16","rcrw 1, r/m16","D1 /3","V","V","","operand16","w,r","Y","16"
"RCR r/m16, CL","RCRW CL, r/m16","rcrw CL, r/m16","D3 /3","V","V","","operand16","w,r","Y","16"
"RCR r/m16, imm8","RCRW imm8, r/m16","rcrw imm8, r/m16","C1 /3 ib","V","V","","operand16","w,r","Y","16"
"RCR r/m32, 1","RCRL 1, r/m32","rcrl 1, r/m32","D1 /3","V","V","","operand32","w,r","Y","32"
"RCR r/m32, CL","RCRL CL, r/m32","rcrl CL, r/m32","D3 /3","V","V","","operand32","w,r","Y","32"
"RCR r/m32, imm8","RCRL imm8, r/m32","rcrl imm8, r/m32","C1 /3 ib","V","V","","operand32","w,r","Y","32"
"RCR r/m64, 1","RCRQ 1, r/m64","rcrq 1, r/m64","REX.W D1 /3","N.E.","V","","","w,r","Y","64"
"RCR r/m64, CL","RCRQ CL, r/m64","rcrq CL, r/m64","REX.W D3 /3","N.E.","V","","","w,r","Y","64"
"RCR r/m64, imm8","RCRQ imm8, r/m64","rcrq imm8, r/m64","REX.W C1 /3 ib","N.E.","V","","","w,r","Y","64"
"RCR r/m8, 1","RCRB 1, r/m8","rcrb 1, r/m8","D0 /3","V","V","","","w,r","Y","8"
"RCR r/m8, 1","RCRB 1, r/m8","rcrb 1, r/m8","REX D0 /3","N.E.","V","","pseudo64","w,r","Y","8"
"RCR r/m8, CL","RCRB CL, r/m8","rcrb CL, r/m8","D2 /3","V","V","","","w,r","Y","8"
"RCR r/m8, CL","RCRB CL, r/m8","rcrb CL, r/m8","REX D2 /3","N.E.","V","","pseudo64","w,r","Y","8"
"RCR r/m8, imm8","RCRB imm8, r/m8","rcrb imm8, r/m8","C0 /3 ib","V","V","","","w,r","Y","8"
"RCR r/m8, imm8","RCRB imm8, r/m8","rcrb imm8, r/m8","REX C0 /3 ib","N.E.","V","","pseudo64","w,r","Y","8"
"RDFSBASE rmr32","RDFSBASE rmr32","rdfsbase rmr32","F3 0F AE /0","I","V","FSGSBASE","modrm_regonly,operand16,operand32","w","Y","32"
"RDFSBASE rmr64","RDFSBASE rmr64","rdfsbase rmr64","F3 REX.W 0F AE /0","I","V","FSGSBASE","modrm_regonly","w","Y","64"
"RDGSBASE rmr32","RDGSBASE rmr32","rdgsbase rmr32","F3 0F AE /1","I","V","FSGSBASE","modrm_regonly,operand16,operand32","w","Y","32"
"RDGSBASE rmr64","RDGSBASE rmr64","rdgsbase rmr64","F3 REX.W 0F AE /1","I","V","FSGSBASE","modrm_regonly","w","Y","64"
"RDMSR","RDMSR","rdmsr","0F 32","V","V","Pentium","","","",""
"RDPKRU","RDPKRU","rdpkru","0F 01 EE","V","V","OSPKE","","","",""
"RDPMC","RDPMC","rdpmc","0F 33","V","V","","","","",""
"RDRAND rmr16","RDRAND rmr16","rdrand rmr16","0F C7 /6","V","V","RDRAND","modrm_regonly,operand16","w","Y",""
"RDRAND rmr32","RDRAND rmr32","rdrand rmr32","0F C7 /6","V","V","RDRAND","modrm_regonly,operand32","w","Y","32"
"RDRAND rmr64","RDRAND rmr64","rdrand rmr64","REX.W 0F C7 /6","I","V","RDRAND","modrm_regonly","w","Y","64"
"RDSEED rmr16","RDSEED rmr16","rdseed rmr16","0F C7 /7","V","V","RDSEED","modrm_regonly,operand16","w","Y",""
"RDSEED rmr32","RDSEED rmr32","rdseed rmr32","0F C7 /7","V","V","RDSEED","modrm_regonly,operand32","w","Y","32"
"RDSEED rmr64","RDSEED rmr64","rdseed rmr64","REX.W 0F C7 /7","I","V","RDSEED","modrm_regonly","w","Y","64"
"RDTSC","RDTSC","rdtsc","0F 31","V","V","","","","",""
"RDTSCP","RDTSCP","rdtscp","0F 01 F9","V","V","","","","",""
"RET","RETW/RETL/RETQ","retw/retl/retq","C3","V","V","","","","",""
"RET imm16u","RETW/RETL/RETQ imm16u","retw/retl/retq imm16u","C2 iw","V","V","","","r","",""
"RET_FAR","RETFW/RETFL/RETFQ","lretw/lretl/lretl","CB","V","V","","","","",""
"RET_FAR imm16u","RETFW/RETFL/RETFQ imm16u","lretw/lretl/lretl imm16u","CA iw","V","V","","","r","",""
"ROL r/m16, 1","ROLW 1, r/m16","rolw 1, r/m16","D1 /0","V","V","","operand16","w,r","Y","16"
"ROL r/m16, CL","ROLW CL, r/m16","rolw CL, r/m16","D3 /0","V","V","","operand16","w,r","Y","16"
"ROL r/m16, imm8","ROLW imm8, r/m16","rolw imm8, r/m16","C1 /0 ib","V","V","","operand16","w,r","Y","16"
"ROL r/m32, 1","ROLL 1, r/m32","roll 1, r/m32","D1 /0","V","V","","operand32","w,r","Y","32"
"ROL r/m32, CL","ROLL CL, r/m32","roll CL, r/m32","D3 /0","V","V","","operand32","w,r","Y","32"
"ROL r/m32, imm8","ROLL imm8, r/m32","roll imm8, r/m32","C1 /0 ib","V","V","","operand32","w,r","Y","32"
"ROL r/m64, 1","ROLQ 1, r/m64","rolq 1, r/m64","REX.W D1 /0","N.E.","V","","","w,r","Y","64"
"ROL r/m64, CL","ROLQ CL, r/m64","rolq CL, r/m64","REX.W D3 /0","N.E.","V","","","w,r","Y","64"
"ROL r/m64, imm8","ROLQ imm8, r/m64","rolq imm8, r/m64","REX.W C1 /0 ib","N.E.","V","","","w,r","Y","64"
"ROL r/m8, 1","ROLB 1, r/m8","rolb 1, r/m8","D0 /0","V","V","","","w,r","Y","8"
"ROL r/m8, 1","ROLB 1, r/m8","rolb 1, r/m8","REX D0 /0","N.E.","V","","pseudo64","w,r","Y","8"
"ROL r/m8, CL","ROLB CL, r/m8","rolb CL, r/m8","D2 /0","V","V","","","w,r","Y","8"
"ROL r/m8, CL","ROLB CL, r/m8","rolb CL, r/m8","REX D2 /0","N.E.","V","","pseudo64","w,r","Y","8"
"ROL r/m8, imm8","ROLB imm8, r/m8","rolb imm8, r/m8","C0 /0 ib","V","V","","","w,r","Y","8"
"ROL r/m8, imm8","ROLB imm8, r/m8","rolb imm8, r/m8","REX C0 /0 ib","N.E.","V","","pseudo64","w,r","Y","8"
"ROR r/m16, 1","RORW 1, r/m16","rorw 1, r/m16","D1 /1","V","V","","operand16","w,r","Y","16"
"ROR r/m16, CL","RORW CL, r/m16","rorw CL, r/m16","D3 /1","V","V","","operand16","w,r","Y","16"
"ROR r/m16, imm8","RORW imm8, r/m16","rorw imm8, r/m16","C1 /1 ib","V","V","","operand16","w,r","Y","16"
"ROR r/m32, 1","RORL 1, r/m32","rorl 1, r/m32","D1 /1","V","V","","operand32","w,r","Y","32"
"ROR r/m32, CL","RORL CL, r/m32","rorl CL, r/m32","D3 /1","V","V","","operand32","w,r","Y","32"
"ROR r/m32, imm8","RORL imm8, r/m32","rorl imm8, r/m32","C1 /1 ib","V","V","","operand32","w,r","Y","32"
"ROR r/m64, 1","RORQ 1, r/m64","rorq 1, r/m64","REX.W D1 /1","N.E.","V","","","w,r","Y","64"
"ROR r/m64, CL","RORQ CL, r/m64","rorq CL, r/m64","REX.W D3 /1","N.E.","V","","","w,r","Y","64"
"ROR r/m64, imm8","RORQ imm8, r/m64","rorq imm8, r/m64","REX.W C1 /1 ib","N.E.","V","","","w,r","Y","64"
"ROR r/m8, 1","RORB 1, r/m8","rorb 1, r/m8","D0 /1","V","V","","","w,r","Y","8"
"ROR r/m8, 1","RORB 1, r/m8","rorb 1, r/m8","REX D0 /1","N.E.","V","","pseudo64","w,r","Y","8"
"ROR r/m8, CL","RORB CL, r/m8","rorb CL, r/m8","D2 /1","V","V","","","w,r","Y","8"
"ROR r/m8, CL","RORB CL, r/m8","rorb CL, r/m8","REX D2 /1","N.E.","V","","pseudo64","w,r","Y","8"
"ROR r/m8, imm8","RORB imm8, r/m8","rorb imm8, r/m8","C0 /1 ib","V","V","","","w,r","Y","8"
"ROR r/m8, imm8","RORB imm8, r/m8","rorb imm8, r/m8","REX C0 /1 ib","N.E.","V","","pseudo64","w,r","Y","8"
"RORX r32, r/m32, imm8","RORXL imm8, r/m32, r32","rorxl imm8, r/m32, r32","VEX.LZ.F2.0F3A.W0 F0 /r ib","V","V","BMI2","","w,r,r","Y","32"
"RORX r64, r/m64, imm8","RORXQ imm8, r/m64, r64","rorxq imm8, r/m64, r64","VEX.LZ.F2.0F3A.W1 F0 /r ib","N.E.","V","BMI2","","w,r,r","Y","64"
"ROUNDPD xmm1, xmm2/m128, imm8","ROUNDPD imm8, xmm2/m128, xmm1","roundpd imm8, xmm2/m128, xmm1","66 0F 3A 09 /r ib","V","V","SSE4_1","","w,r,r","",""
"ROUNDPS xmm1, xmm2/m128, imm8","ROUNDPS imm8, xmm2/m128, xmm1","roundps imm8, xmm2/m128, xmm1","66 0F 3A 08 /r ib","V","V","SSE4_1","","w,r,r","",""
"ROUNDSD xmm1, xmm2/m64, imm8","ROUNDSD imm8, xmm2/m64, xmm1","roundsd imm8, xmm2/m64, xmm1","66 0F 3A 0B /r ib","V","V","SSE4_1","","w,r,r","",""
"ROUNDSS xmm1, xmm2/m32, imm8","ROUNDSS imm8, xmm2/m32, xmm1","roundss imm8, xmm2/m32, xmm1","66 0F 3A 0A /r ib","V","V","SSE4_1","","w,r,r","",""
"RSM","RSM","rsm","0F AA","V","V","","","","",""
"RSQRTPS xmm1, xmm2/m128","RSQRTPS xmm2/m128, xmm1","rsqrtps xmm2/m128, xmm1","0F 52 /r","V","V","SSE","","w,r","",""
"RSQRTSS xmm1, xmm2/m32","RSQRTSS xmm2/m32, xmm1","rsqrtss xmm2/m32, xmm1","F3 0F 52 /r","V","V","SSE","","w,r","",""
"SAHF","SAHF","sahf","9E","V","V","","","","",""
"SAL r/m16, 1","SALW 1, r/m16","salw 1, r/m16","D1 /4","V","V","","operand16,pseudo","rw,r","Y","16"
"SAL r/m16, CL","SALW CL, r/m16","salw CL, r/m16","D3 /4","V","V","","operand16,pseudo","rw,r","Y","16"
"SAL r/m16, imm8","SALW imm8, r/m16","salw imm8, r/m16","C1 /4 ib","V","V","","operand16,pseudo","rw,r","Y","16"
"SAL r/m32, 1","SALL 1, r/m32","sall 1, r/m32","D1 /4","V","V","","operand32,pseudo","rw,r","Y","32"
"SAL r/m32, CL","SALL CL, r/m32","sall CL, r/m32","D3 /4","V","V","","operand32,pseudo","rw,r","Y","32"
"SAL r/m32, imm8","SALL imm8, r/m32","sall imm8, r/m32","C1 /4 ib","V","V","","operand32,pseudo","rw,r","Y","32"
"SAL r/m64, 1","SALQ 1, r/m64","salq 1, r/m64","REX.W D1 /4","N.E.","V","","pseudo","rw,r","Y","64"
"SAL r/m64, CL","SALQ CL, r/m64","salq CL, r/m64","REX.W D3 /4","N.E.","V","","pseudo","rw,r","Y","64"
"SAL r/m64, imm8","SALQ imm8, r/m64","salq imm8, r/m64","REX.W C1 /4 ib","N.E.","V","","pseudo","rw,r","Y","64"
"SAL r/m8, 1","SALB 1, r/m8","salb 1, r/m8","D0 /4","V","V","","pseudo","rw,r","Y","8"
"SAL r/m8, 1","SALB 1, r/m8","salb 1, r/m8","REX D0 /4","N.E.","V","","pseudo","rw,r","Y","8"
"SAL r/m8, CL","SALB CL, r/m8","salb CL, r/m8","D2 /4","V","V","","pseudo","rw,r","Y","8"
"SAL r/m8, CL","SALB CL, r/m8","salb CL, r/m8","REX D2 /4","N.E.","V","","pseudo","rw,r","Y","8"
"SAL r/m8, imm8","SALB imm8, r/m8","salb imm8, r/m8","C0 /4 ib","V","V","","pseudo","rw,r","Y","8"
"SAL r/m8, imm8","SALB imm8, r/m8","salb imm8, r/m8","REX C0 /4 ib","N.E.","V","","pseudo","rw,r","Y","8"
"SAR r/m16, 1","SARW 1, r/m16","sarw 1, r/m16","D1 /7","V","V","","operand16","rw,r","Y","16"
"SAR r/m16, CL","SARW CL, r/m16","sarw CL, r/m16","D3 /7","V","V","","operand16","rw,r","Y","16"
"SAR r/m16, imm8","SARW imm8, r/m16","sarw imm8, r/m16","C1 /7 ib","V","V","","operand16","rw,r","Y","16"
"SAR r/m32, 1","SARL 1, r/m32","sarl 1, r/m32","D1 /7","V","V","","operand32","rw,r","Y","32"
"SAR r/m32, CL","SARL CL, r/m32","sarl CL, r/m32","D3 /7","V","V","","operand32","rw,r","Y","32"
"SAR r/m32, imm8","SARL imm8, r/m32","sarl imm8, r/m32","C1 /7 ib","V","V","","operand32","rw,r","Y","32"
"SAR r/m64, 1","SARQ 1, r/m64","sarq 1, r/m64","REX.W D1 /7","N.E.","V","","","rw,r","Y","64"
"SAR r/m64, CL","SARQ CL, r/m64","sarq CL, r/m64","REX.W D3 /7","N.E.","V","","","rw,r","Y","64"
"SAR r/m64, imm8","SARQ imm8, r/m64","sarq imm8, r/m64","REX.W C1 /7 ib","N.E.","V","","","rw,r","Y","64"
"SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","D0 /7","V","V","","","rw,r","Y","8"
"SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","REX D0 /7","N.E.","V","","pseudo64","rw,r","Y","8"
"SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","D2 /7","V","V","","","rw,r","Y","8"
"SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","REX D2 /7","N.E.","V","","pseudo64","rw,r","Y","8"
"SAR r/m8, imm8","SARB imm8, r/m8","sarb imm8, r/m8","C0 /7 ib","V","V","","","rw,r","Y","8"
"SAR r/m8, imm8","SARB imm8, r/m8","sarb imm8, r/m8","REX C0 /7 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"SARX r32, r/m32, r32V","SARXL r32V, r/m32, r32","sarxl r32V, r/m32, r32","VEX.NDS.LZ.F3.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
"SARX r64, r/m64, r64V","SARXQ r64V, r/m64, r64","sarxq r64V, r/m64, r64","VEX.NDS.LZ.F3.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"SBB AL, imm8","SBBB imm8, AL","sbbb imm8, AL","1C ib","V","V","","","rw,r","Y","8"
"SBB AX, imm16","SBBW imm16, AX","sbbw imm16, AX","1D iw","V","V","","operand16","rw,r","Y","16"
"SBB EAX, imm32","SBBL imm32, EAX","sbbl imm32, EAX","1D id","V","V","","operand32","rw,r","Y","32"
"SBB RAX, imm32","SBBQ imm32, RAX","sbbq imm32, RAX","REX.W 1D id","N.E.","V","","","rw,r","Y","64"
"SBB r/m16, imm16","SBBW imm16, r/m16","sbbw imm16, r/m16","81 /3 iw","V","V","","operand16","w,r","Y","16"
"SBB r/m16, imm8","SBBW imm8, r/m16","sbbw imm8, r/m16","83 /3 ib","V","V","","operand16","w,r","Y","16"
"SBB r/m16, r16","SBBW r16, r/m16","sbbw r16, r/m16","19 /r","V","V","","operand16","w,r","Y","16"
"SBB r/m32, imm32","SBBL imm32, r/m32","sbbl imm32, r/m32","81 /3 id","V","V","","operand32","w,r","Y","32"
"SBB r/m32, imm8","SBBL imm8, r/m32","sbbl imm8, r/m32","83 /3 ib","V","V","","operand32","w,r","Y","32"
"SBB r/m32, r32","SBBL r32, r/m32","sbbl r32, r/m32","19 /r","V","V","","operand32","w,r","Y","32"
"SBB r/m64, imm32","SBBQ imm32, r/m64","sbbq imm32, r/m64","REX.W 81 /3 id","N.E.","V","","","w,r","Y","64"
"SBB r/m64, imm8","SBBQ imm8, r/m64","sbbq imm8, r/m64","REX.W 83 /3 ib","N.E.","V","","","w,r","Y","64"
"SBB r/m64, r64","SBBQ r64, r/m64","sbbq r64, r/m64","REX.W 19 /r","N.E.","V","","","w,r","Y","64"
"SBB r/m8, imm8","SBBB imm8, r/m8","sbbb imm8, r/m8","80 /3 ib","V","V","","","w,r","Y","8"
"SBB r/m8, imm8","SBBB imm8, r/m8","sbbb imm8, r/m8","REX 80 /3 ib","N.E.","V","","pseudo64","w,r","Y","8"
"SBB r/m8, r8","SBBB r8, r/m8","sbbb r8, r/m8","18 /r","V","V","","","w,r","Y","8"
"SBB r/m8, r8","SBBB r8, r/m8","sbbb r8, r/m8","REX 18 /r","N.E.","V","","pseudo64","w,r","Y","8"
"SBB r16, r/m16","SBBW r/m16, r16","sbbw r/m16, r16","1B /r","V","V","","operand16","w,r","Y","16"
"SBB r32, r/m32","SBBL r/m32, r32","sbbl r/m32, r32","1B /r","V","V","","operand32","w,r","Y","32"
"SBB r64, r/m64","SBBQ r/m64, r64","sbbq r/m64, r64","REX.W 1B /r","N.E.","V","","","w,r","Y","64"
"SBB r8, r/m8","SBBB r/m8, r8","sbbb r/m8, r8","1A /r","V","V","","","w,r","Y","8"
"SBB r8, r/m8","SBBB r/m8, r8","sbbb r/m8, r8","REX 1A /r","N.E.","V","","pseudo64","w,r","Y","8"
"SCASB","SCASB","scasb","AE","V","V","","","","",""
"SCASD","SCASL","scasl","AF","V","V","","operand32","","",""
"SCASQ","SCASQ","scasq","REX.W AF","N.E.","V","","","","",""
"SCASW","SCASW","scasw","AF","V","V","","operand16","","",""
"SETA r/m8","SETHI r/m8","seta r/m8","0F 97 /r","V","V","","","r","",""
"SETA r/m8","SETHI r/m8","seta r/m8","REX 0F 97 /r","N.E.","V","","pseudo64","r","",""
"SETAE r/m8","SETCC r/m8","setae r/m8","0F 93 /r","V","V","","","r","",""
"SETAE r/m8","SETCC r/m8","setae r/m8","REX 0F 93 /r","N.E.","V","","pseudo64","r","",""
"SETB r/m8","SETCS r/m8","setb r/m8","0F 92 /r","V","V","","","r","",""
"SETB r/m8","SETCS r/m8","setb r/m8","REX 0F 92 /r","N.E.","V","","pseudo64","r","",""
"SETBE r/m8","SETLS r/m8","setbe r/m8","0F 96 /r","V","V","","","r","",""
"SETBE r/m8","SETLS r/m8","setbe r/m8","REX 0F 96 /r","N.E.","V","","pseudo64","r","",""
"SETC r/m8","SETCS r/m8","setc r/m8","0F 92 /r","V","V","","pseudo","r","",""
"SETC r/m8","SETCS r/m8","setc r/m8","REX 0F 92 /r","N.E.","V","","pseudo","r","",""
"SETE r/m8","SETEQ r/m8","sete r/m8","0F 94 /r","V","V","","","r","",""
"SETE r/m8","SETEQ r/m8","sete r/m8","REX 0F 94 /r","N.E.","V","","pseudo64","r","",""
"SETG r/m8","SETGT r/m8","setg r/m8","0F 9F /r","V","V","","","r","",""
"SETG r/m8","SETGT r/m8","setg r/m8","REX 0F 9F /r","N.E.","V","","pseudo64","r","",""
"SETGE r/m8","SETGE r/m8","setge r/m8","0F 9D /r","V","V","","","r","",""
"SETGE r/m8","SETGE r/m8","setge r/m8","REX 0F 9D /r","N.E.","V","","pseudo64","r","",""
"SETL r/m8","SETLT r/m8","setl r/m8","0F 9C /r","V","V","","","r","",""
"SETL r/m8","SETLT r/m8","setl r/m8","REX 0F 9C /r","N.E.","V","","pseudo64","r","",""
"SETLE r/m8","SETLE r/m8","setle r/m8","0F 9E /r","V","V","","","r","",""
"SETLE r/m8","SETLE r/m8","setle r/m8","REX 0F 9E /r","N.E.","V","","pseudo64","r","",""
"SETNA r/m8","SETLS r/m8","setna r/m8","0F 96 /r","V","V","","pseudo","r","",""
"SETNA r/m8","SETLS r/m8","setna r/m8","REX 0F 96 /r","N.E.","V","","pseudo","r","",""
"SETNAE r/m8","SETCS r/m8","setnae r/m8","0F 92 /r","V","V","","pseudo","r","",""
"SETNAE r/m8","SETCS r/m8","setnae r/m8","REX 0F 92 /r","N.E.","V","","pseudo","r","",""
"SETNB r/m8","SETCC r/m8","setnb r/m8","0F 93 /r","V","V","","pseudo","r","",""
"SETNB r/m8","SETCC r/m8","setnb r/m8","REX 0F 93 /r","N.E.","V","","pseudo","r","",""
"SETNBE r/m8","SETHI r/m8","setnbe r/m8","0F 97 /r","V","V","","pseudo","r","",""
"SETNBE r/m8","SETHI r/m8","setnbe r/m8","REX 0F 97 /r","N.E.","V","","pseudo","r","",""
"SETNC r/m8","SETCC r/m8","setnc r/m8","0F 93 /r","V","V","","pseudo","r","",""
"SETNC r/m8","SETCC r/m8","setnc r/m8","REX 0F 93 /r","N.E.","V","","pseudo","r","",""
"SETNE r/m8","SETNE r/m8","setne r/m8","0F 95 /r","V","V","","","r","",""
"SETNE r/m8","SETNE r/m8","setne r/m8","REX 0F 95 /r","N.E.","V","","pseudo64","r","",""
"SETNG r/m8","SETLE r/m8","setng r/m8","0F 9E /r","V","V","","pseudo","r","",""
"SETNG r/m8","SETLE r/m8","setng r/m8","REX 0F 9E /r","N.E.","V","","pseudo","r","",""
"SETNGE r/m8","SETLT r/m8","setnge r/m8","0F 9C /r","V","V","","pseudo","r","",""
"SETNGE r/m8","SETLT r/m8","setnge r/m8","REX 0F 9C /r","N.E.","V","","pseudo","r","",""
"SETNL r/m8","SETGE r/m8","setnl r/m8","0F 9D /r","V","V","","pseudo","r","",""
"SETNL r/m8","SETGE r/m8","setnl r/m8","REX 0F 9D /r","N.E.","V","","pseudo","r","",""
"SETNLE r/m8","SETGT r/m8","setnle r/m8","0F 9F /r","V","V","","pseudo","r","",""
"SETNLE r/m8","SETGT r/m8","setnle r/m8","REX 0F 9F /r","N.E.","V","","pseudo","r","",""
"SETNO r/m8","SETOC r/m8","setno r/m8","0F 91 /r","V","V","","","r","",""
"SETNO r/m8","SETOC r/m8","setno r/m8","REX 0F 91 /r","N.E.","V","","pseudo64","r","",""
"SETNP r/m8","SETPC r/m8","setnp r/m8","0F 9B /r","V","V","","","r","",""
"SETNP r/m8","SETPC r/m8","setnp r/m8","REX 0F 9B /r","N.E.","V","","pseudo64","r","",""
"SETNS r/m8","SETPL r/m8","setns r/m8","0F 99 /r","V","V","","","r","",""
"SETNS r/m8","SETPL r/m8","setns r/m8","REX 0F 99 /r","N.E.","V","","pseudo64","r","",""
"SETNZ r/m8","SETNE r/m8","setnz r/m8","0F 95 /r","V","V","","pseudo","r","",""
"SETNZ r/m8","SETNE r/m8","setnz r/m8","REX 0F 95 /r","N.E.","V","","pseudo","r","",""
"SETO r/m8","SETOS r/m8","seto r/m8","0F 90 /r","V","V","","","r","",""
"SETO r/m8","SETOS r/m8","seto r/m8","REX 0F 90 /r","N.E.","V","","pseudo64","r","",""
"SETP r/m8","SETPS r/m8","setp r/m8","0F 9A /r","V","V","","","r","",""
"SETP r/m8","SETPS r/m8","setp r/m8","REX 0F 9A /r","N.E.","V","","pseudo64","r","",""
"SETPE r/m8","SETPS r/m8","setpe r/m8","0F 9A /r","V","V","","pseudo","r","",""
"SETPE r/m8","SETPS r/m8","setpe r/m8","REX 0F 9A /r","N.E.","V","","pseudo","r","",""
"SETPO r/m8","SETPC r/m8","setpo r/m8","0F 9B /r","V","V","","pseudo","r","",""
"SETPO r/m8","SETPC r/m8","setpo r/m8","REX 0F 9B /r","N.E.","V","","pseudo","r","",""
"SETS r/m8","SETMI r/m8","sets r/m8","0F 98 /r","V","V","","","r","",""
"SETS r/m8","SETMI r/m8","sets r/m8","REX 0F 98 /r","N.E.","V","","pseudo64","r","",""
"SETZ r/m8","SETEQ r/m8","setz r/m8","0F 94 /r","V","V","","pseudo","r","",""
"SETZ r/m8","SETEQ r/m8","setz r/m8","REX 0F 94 /r","N.E.","V","","pseudo","r","",""
"SFENCE","SFENCE","sfence","0F AE F8","V","V","","","","",""
"SGDT m","SGDTW/SGDTL/SGDT m","sgdtw/sgdtl/sgdt m","0F 01 /0","V","V","","","w","",""
"SHL r/m16, 1","SHLW 1, r/m16","shlw 1, r/m16","D1 /4","V","V","","operand16","rw,r","Y","16"
"SHL r/m16, CL","SHLW CL, r/m16","shlw CL, r/m16","D3 /4","V","V","","operand16","rw,r","Y","16"
"SHL r/m16, imm8","SHLW imm8, r/m16","shlw imm8, r/m16","C1 /4 ib","V","V","","operand16","rw,r","Y","16"
"SHL r/m32, 1","SHLL 1, r/m32","shll 1, r/m32","D1 /4","V","V","","operand32","rw,r","Y","32"
"SHL r/m32, CL","SHLL CL, r/m32","shll CL, r/m32","D3 /4","V","V","","operand32","rw,r","Y","32"
"SHL r/m32, imm8","SHLL imm8, r/m32","shll imm8, r/m32","C1 /4 ib","V","V","","operand32","rw,r","Y","32"
"SHL r/m64, 1","SHLQ 1, r/m64","shlq 1, r/m64","REX.W D1 /4","N.E.","V","","","rw,r","Y","64"
"SHL r/m64, CL","SHLQ CL, r/m64","shlq CL, r/m64","REX.W D3 /4","N.E.","V","","","rw,r","Y","64"
"SHL r/m64, imm8","SHLQ imm8, r/m64","shlq imm8, r/m64","REX.W C1 /4 ib","N.E.","V","","","rw,r","Y","64"
"SHL r/m8, 1","SHLB 1, r/m8","shlb 1, r/m8","D0 /4","V","V","","","rw,r","Y","8"
"SHL r/m8, 1","SHLB 1, r/m8","shlb 1, r/m8","REX D0 /4","N.E.","V","","pseudo64","rw,r","Y","8"
"SHL r/m8, CL","SHLB CL, r/m8","shlb CL, r/m8","D2 /4","V","V","","","rw,r","Y","8"
"SHL r/m8, CL","SHLB CL, r/m8","shlb CL, r/m8","REX D2 /4","N.E.","V","","pseudo64","rw,r","Y","8"
"SHL r/m8, imm8","SHLB imm8, r/m8","shlb imm8, r/m8","C0 /4 ib","V","V","","","rw,r","Y","8"
"SHL r/m8, imm8","SHLB imm8, r/m8","shlb imm8, r/m8","REX C0 /4 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"SHLD r/m16, r16, CL","SHLW CL, r16, r/m16","shldw CL, r16, r/m16","0F A5 /r","V","V","","operand16","w,r,r","Y","16"
"SHLD r/m16, r16, imm8","SHLW imm8, r16, r/m16","shldw imm8, r16, r/m16","0F A4 /r ib","V","V","","operand16","w,r,r","Y","16"
"SHLD r/m32, r32, CL","SHLL CL, r32, r/m32","shldl CL, r32, r/m32","0F A5 /r","V","V","","operand32","w,r,r","Y","32"
"SHLD r/m32, r32, imm8","SHLL imm8, r32, r/m32","shldl imm8, r32, r/m32","0F A4 /r ib","V","V","","operand32","w,r,r","Y","32"
"SHLD r/m64, r64, CL","SHLQ CL, r64, r/m64","shldq CL, r64, r/m64","REX.W 0F A5 /r","N.E.","V","","","w,r,r","Y","64"
"SHLD r/m64, r64, imm8","SHLQ imm8, r64, r/m64","shldq imm8, r64, r/m64","REX.W 0F A4 /r ib","N.E.","V","","","w,r,r","Y","64"
"SHLX r32, r/m32, r32V","SHLXL r32V, r/m32, r32","shlxl r32V, r/m32, r32","VEX.NDS.LZ.66.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
"SHLX r64, r/m64, r64V","SHLXQ r64V, r/m64, r64","shlxq r64V, r/m64, r64","VEX.NDS.LZ.66.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"SHR r/m16, 1","SHRW 1, r/m16","shrw 1, r/m16","D1 /5","V","V","","operand16","rw,r","Y","16"
"SHR r/m16, CL","SHRW CL, r/m16","shrw CL, r/m16","D3 /5","V","V","","operand16","rw,r","Y","16"
"SHR r/m16, imm8","SHRW imm8, r/m16","shrw imm8, r/m16","C1 /5 ib","V","V","","operand16","rw,r","Y","16"
"SHR r/m32, 1","SHRL 1, r/m32","shrl 1, r/m32","D1 /5","V","V","","operand32","rw,r","Y","32"
"SHR r/m32, CL","SHRL CL, r/m32","shrl CL, r/m32","D3 /5","V","V","","operand32","rw,r","Y","32"
"SHR r/m32, imm8","SHRL imm8, r/m32","shrl imm8, r/m32","C1 /5 ib","V","V","","operand32","rw,r","Y","32"
"SHR r/m64, 1","SHRQ 1, r/m64","shrq 1, r/m64","REX.W D1 /5","N.E.","V","","","rw,r","Y","64"
"SHR r/m64, CL","SHRQ CL, r/m64","shrq CL, r/m64","REX.W D3 /5","N.E.","V","","","rw,r","Y","64"
"SHR r/m64, imm8","SHRQ imm8, r/m64","shrq imm8, r/m64","REX.W C1 /5 ib","N.E.","V","","","rw,r","Y","64"
"SHR r/m8, 1","SHRB 1, r/m8","shrb 1, r/m8","D0 /5","V","V","","","rw,r","Y","8"
"SHR r/m8, 1","SHRB 1, r/m8","shrb 1, r/m8","REX D0 /5","N.E.","V","","pseudo64","rw,r","Y","8"
"SHR r/m8, CL","SHRB CL, r/m8","shrb CL, r/m8","D2 /5","V","V","","","rw,r","Y","8"
"SHR r/m8, CL","SHRB CL, r/m8","shrb CL, r/m8","REX D2 /5","N.E.","V","","pseudo64","rw,r","Y","8"
"SHR r/m8, imm8","SHRB imm8, r/m8","shrb imm8, r/m8","C0 /5 ib","V","V","","","rw,r","Y","8"
"SHR r/m8, imm8","SHRB imm8, r/m8","shrb imm8, r/m8","REX C0 /5 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"SHRD r/m16, r16, CL","SHRW CL, r16, r/m16","shrdw CL, r16, r/m16","0F AD /r","V","V","","operand16","w,r,r","Y","16"
"SHRD r/m16, r16, imm8","SHRW imm8, r16, r/m16","shrdw imm8, r16, r/m16","0F AC /r ib","V","V","","operand16","w,r,r","Y","16"
"SHRD r/m32, r32, CL","SHRL CL, r32, r/m32","shrdl CL, r32, r/m32","0F AD /r","V","V","","operand32","w,r,r","Y","32"
"SHRD r/m32, r32, imm8","SHRL imm8, r32, r/m32","shrdl imm8, r32, r/m32","0F AC /r ib","V","V","","operand32","w,r,r","Y","32"
"SHRD r/m64, r64, CL","SHRQ CL, r64, r/m64","shrdq CL, r64, r/m64","REX.W 0F AD /r","N.E.","V","","","w,r,r","Y","64"
"SHRD r/m64, r64, imm8","SHRQ imm8, r64, r/m64","shrdq imm8, r64, r/m64","REX.W 0F AC /r ib","N.E.","V","","","w,r,r","Y","64"
"SHRX r32, r/m32, r32V","SHRXL r32V, r/m32, r32","shrxl r32V, r/m32, r32","VEX.NDS.LZ.F2.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
"SHRX r64, r/m64, r64V","SHRXQ r64V, r/m64, r64","shrxq r64V, r/m64, r64","VEX.NDS.LZ.F2.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
"SHUFPD xmm1, xmm2/m128, imm8","SHUFPD imm8, xmm2/m128, xmm1","shufpd imm8, xmm2/m128, xmm1","66 0F C6 /r ib","V","V","SSE2","","rw,r,r","",""
"SHUFPS xmm1, xmm2/m128, imm8","SHUFPS imm8, xmm2/m128, xmm1","shufps imm8, xmm2/m128, xmm1","0F C6 /r ib","V","V","SSE","","rw,r,r","",""
"SIDT m","SIDTW/SIDTL/SIDT m","sidtw/sidtl/sidt m","0F 01 /1","V","V","","","w","",""
"SLDT r/m16","SLDTW r/m16","sldtw r/m16","0F 00 /0","V","V","","operand16","w","Y","16"
"SLDT r32/m16","SLDT{L/W} r32/m16","sldt{l/w} r32/m16","0F 00 /0","V","V","","operand32","w","Y",""
"SLDT r64/m16","SLDT{Q/W} r64/m16","sldt{q/w} r64/m16","REX.W 0F 00 /0","N.E.","V","","","w","Y",""
"SMSW r/m16","SMSWW r/m16","smsww r/m16","0F 01 /4","V","V","","operand16","w","Y","16"
"SMSW r32/m16","SMSW{L/W} r32/m16","smsw{l/w} r32/m16","0F 01 /4","V","V","","operand32","w","Y",""
"SMSW r64/m16","SMSW{Q/W} r64/m16","smsw{q/w} r64/m16","REX.W 0F 01 /4","N.E.","V","","","w","Y",""
"SQRTPD xmm1, xmm2/m128","SQRTPD xmm2/m128, xmm1","sqrtpd xmm2/m128, xmm1","66 0F 51 /r","V","V","SSE2","","w,r","",""
"SQRTPS xmm1, xmm2/m128","SQRTPS xmm2/m128, xmm1","sqrtps xmm2/m128, xmm1","0F 51 /r","V","V","SSE","","w,r","",""
"SQRTSD xmm1, xmm2/m64","SQRTSD xmm2/m64, xmm1","sqrtsd xmm2/m64, xmm1","F2 0F 51 /r","V","V","SSE2","","w,r","",""
"SQRTSS xmm1, xmm2/m32","SQRTSS xmm2/m32, xmm1","sqrtss xmm2/m32, xmm1","F3 0F 51 /r","V","V","SSE","","w,r","",""
"STAC","STAC","stac","0F 01 CB","V","V","","","","",""
"STC","STC","stc","F9","V","V","","","","",""
"STD","STD","std","FD","V","V","","","","",""
"STI","STI","sti","FB","V","V","","","","",""
"STMXCSR m32","STMXCSR m32","stmxcsr m32","0F AE /3","V","V","SSE","modrm_memonly","w","",""
"STOSB","STOSB","stosb","AA","V","V","","","","",""
"STOSD","STOSL","stosl","AB","V","V","","operand32","","",""
"STOSQ","STOSQ","stosq","REX.W AB","N.E.","V","","","","",""
"STOSW","STOSW","stosw","AB","V","V","","operand16","","",""
"STR r/m16","STRW r/m16","strw r/m16","0F 00 /1","V","V","","operand16","w","Y","16"
"STR r32/m16","STR{L/W} r32/m16","str{l/w} r32/m16","0F 00 /1","V","V","","operand32","w","Y",""
"STR r64/m16","STR{Q/W} r64/m16","str{q/w} r64/m16","REX.W 0F 00 /1","N.E.","V","","","w","Y",""
"SUB AL, imm8","SUBB imm8, AL","subb imm8, AL","2C ib","V","V","","","rw,r","Y","8"
"SUB AX, imm16","SUBW imm16, AX","subw imm16, AX","2D iw","V","V","","operand16","rw,r","Y","16"
"SUB EAX, imm32","SUBL imm32, EAX","subl imm32, EAX","2D id","V","V","","operand32","rw,r","Y","32"
"SUB RAX, imm32","SUBQ imm32, RAX","subq imm32, RAX","REX.W 2D id","N.E.","V","","","rw,r","Y","64"
"SUB r/m16, imm16","SUBW imm16, r/m16","subw imm16, r/m16","81 /5 iw","V","V","","operand16","rw,r","Y","16"
"SUB r/m16, imm8","SUBW imm8, r/m16","subw imm8, r/m16","83 /5 ib","V","V","","operand16","rw,r","Y","16"
"SUB r/m16, r16","SUBW r16, r/m16","subw r16, r/m16","29 /r","V","V","","operand16","rw,r","Y","16"
"SUB r/m32, imm32","SUBL imm32, r/m32","subl imm32, r/m32","81 /5 id","V","V","","operand32","rw,r","Y","32"
"SUB r/m32, imm8","SUBL imm8, r/m32","subl imm8, r/m32","83 /5 ib","V","V","","operand32","rw,r","Y","32"
"SUB r/m32, r32","SUBL r32, r/m32","subl r32, r/m32","29 /r","V","V","","operand32","rw,r","Y","32"
"SUB r/m64, imm32","SUBQ imm32, r/m64","subq imm32, r/m64","REX.W 81 /5 id","N.E.","V","","","rw,r","Y","64"
"SUB r/m64, imm8","SUBQ imm8, r/m64","subq imm8, r/m64","REX.W 83 /5 ib","N.E.","V","","","rw,r","Y","64"
"SUB r/m64, r64","SUBQ r64, r/m64","subq r64, r/m64","REX.W 29 /r","N.E.","V","","","rw,r","Y","64"
"SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","80 /5 ib","V","V","","","rw,r","Y","8"
"SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","REX 80 /5 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","28 /r","V","V","","","rw,r","Y","8"
"SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","REX 28 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"SUB r16, r/m16","SUBW r/m16, r16","subw r/m16, r16","2B /r","V","V","","operand16","rw,r","Y","16"
"SUB r32, r/m32","SUBL r/m32, r32","subl r/m32, r32","2B /r","V","V","","operand32","rw,r","Y","32"
"SUB r64, r/m64","SUBQ r/m64, r64","subq r/m64, r64","REX.W 2B /r","N.E.","V","","","rw,r","Y","64"
"SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","2A /r","V","V","","","rw,r","Y","8"
"SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","REX 2A /r","N.E.","V","","pseudo64","rw,r","Y","8"
"SUBPD xmm1, xmm2/m128","SUBPD xmm2/m128, xmm1","subpd xmm2/m128, xmm1","66 0F 5C /r","V","V","SSE2","","rw,r","",""
"SUBPS xmm1, xmm2/m128","SUBPS xmm2/m128, xmm1","subps xmm2/m128, xmm1","0F 5C /r","V","V","SSE","","rw,r","",""
"SUBSD xmm1, xmm2/m64","SUBSD xmm2/m64, xmm1","subsd xmm2/m64, xmm1","F2 0F 5C /r","V","V","SSE2","","rw,r","",""
"SUBSS xmm1, xmm2/m32","SUBSS xmm2/m32, xmm1","subss xmm2/m32, xmm1","F3 0F 5C /r","V","V","SSE","","rw,r","",""
"SWAPGS","SWAPGS","swapgs","0F 01 F8","I","V","","","","",""
"SYSCALL","SYSCALL","syscall","0F 05","I","V","","","","",""
"SYSENTER","SYSENTER","sysenter","0F 34","V","V","PentiumII","","","",""
"SYSEXIT","SYSEXIT","sysexit","0F 35","V","V","PentiumII","ignoreREXW","","",""
"SYSEXIT","SYSEXIT","sysexit","REX.W 0F 35","N.E.","V","","pseudo","","",""
"SYSRET","SYSRET","sysretw/sysretl/sysretl","0F 07","I","V","","ignoreREXW","","",""
"SYSRET","SYSRET","sysretw/sysretl/sysretl","REX.W 0F 07","I","V","","pseudo","","",""
"TEST AL, imm8","TESTB imm8, AL","testb imm8, AL","A8 ib","V","V","","","r,r","Y","8"
"TEST AX, imm16","TESTW imm16, AX","testw imm16, AX","A9 iw","V","V","","operand16","r,r","Y","16"
"TEST EAX, imm32","TESTL imm32, EAX","testl imm32, EAX","A9 id","V","V","","operand32","r,r","Y","32"
"TEST RAX, imm32","TESTQ imm32, RAX","testq imm32, RAX","REX.W A9 id","N.E.","V","","","r,r","Y","64"
"TEST r/m16, imm16","TESTW imm16, r/m16","testw imm16, r/m16","F7 /0 iw","V","V","","operand16","r,r","Y","16"
"TEST r/m16, r16","TESTW r16, r/m16","testw r16, r/m16","85 /r","V","V","","operand16","r,r","Y","16"
"TEST r/m32, imm32","TESTL imm32, r/m32","testl imm32, r/m32","F7 /0 id","V","V","","operand32","r,r","Y","32"
"TEST r/m32, r32","TESTL r32, r/m32","testl r32, r/m32","85 /r","V","V","","operand32","r,r","Y","32"
"TEST r/m64, imm32","TESTQ imm32, r/m64","testq imm32, r/m64","REX.W F7 /0 id","N.E.","V","","","r,r","Y","64"
"TEST r/m64, r64","TESTQ r64, r/m64","testq r64, r/m64","REX.W 85 /r","N.E.","V","","","r,r","Y","64"
"TEST r/m8, imm8","TESTB imm8, r/m8","testb imm8, r/m8","F6 /0 ib","V","V","","","r,r","Y","8"
"TEST r/m8, imm8","TESTB imm8, r/m8","testb imm8, r/m8","REX F6 /0 ib","N.E.","V","","pseudo64","r,r","Y","8"
"TEST r/m8, r8","TESTB r8, r/m8","testb r8, r/m8","84 /r","V","V","","","r,r","Y","8"
"TEST r/m8, r8","TESTB r8, r/m8","testb r8, r/m8","REX 84 /r","N.E.","V","","pseudo64","r,r","Y","8"
"TZCNT r16, r/m16","TZCNTW r/m16, r16","tzcntw r/m16, r16","F3 0F BC /r","V","V","BMI1","operand16","w,r","Y","16"
"TZCNT r32, r/m32","TZCNTL r/m32, r32","tzcntl r/m32, r32","F3 0F BC /r","V","V","BMI1","operand32","w,r","Y","32"
"TZCNT r64, r/m64","TZCNTQ r/m64, r64","tzcntq r/m64, r64","F3 REX.W 0F BC /r","N.E.","V","BMI1","","w,r","Y","64"
"UCOMISD xmm1, xmm2/m64","UCOMISD xmm2/m64, xmm1","ucomisd xmm2/m64, xmm1","66 0F 2E /r","V","V","SSE2","","r,r","",""
"UCOMISS xmm1, xmm2/m32","UCOMISS xmm2/m32, xmm1","ucomiss xmm2/m32, xmm1","0F 2E /r","V","V","SSE","","r,r","",""
"UD1","UD1","ud1","0F B9","V","V","","","","",""
"UD2","UD2","ud2","0F 0B","V","V","","","","",""
"UNPCKHPD xmm1, xmm2/m128","UNPCKHPD xmm2/m128, xmm1","unpckhpd xmm2/m128, xmm1","66 0F 15 /r","V","V","SSE2","","rw,r","",""
"UNPCKHPS xmm1, xmm2/m128","UNPCKHPS xmm2/m128, xmm1","unpckhps xmm2/m128, xmm1","0F 15 /r","V","V","SSE","","rw,r","",""
"UNPCKLPD xmm1, xmm2/m128","UNPCKLPD xmm2/m128, xmm1","unpcklpd xmm2/m128, xmm1","66 0F 14 /r","V","V","SSE2","","rw,r","",""
"UNPCKLPS xmm1, xmm2/m128","UNPCKLPS xmm2/m128, xmm1","unpcklps xmm2/m128, xmm1","0F 14 /r","V","V","SSE","","rw,r","",""
"VADDPD xmm1, xmmV, xmm2/m128","VADDPD xmm2/m128, xmmV, xmm1","vaddpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDPD ymm1, ymmV, ymm2/m256","VADDPD ymm2/m256, ymmV, ymm1","vaddpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDPS xmm1, xmmV, xmm2/m128","VADDPS xmm2/m128, xmmV, xmm1","vaddps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDPS ymm1, ymmV, ymm2/m256","VADDPS ymm2/m256, ymmV, ymm1","vaddps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDSD xmm1, xmmV, xmm2/m64","VADDSD xmm2/m64, xmmV, xmm1","vaddsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDSS xmm1, xmmV, xmm2/m32","VADDSS xmm2/m32, xmmV, xmm1","vaddss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
"VADDSUBPD xmm1, xmmV, xmm2/m128","VADDSUBPD xmm2/m128, xmmV, xmm1","vaddsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
"VADDSUBPD ymm1, ymmV, ymm2/m256","VADDSUBPD ymm2/m256, ymmV, ymm1","vaddsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
"VADDSUBPS xmm1, xmmV, xmm2/m128","VADDSUBPS xmm2/m128, xmmV, xmm1","vaddsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
"VADDSUBPS ymm1, ymmV, ymm2/m256","VADDSUBPS ymm2/m256, ymmV, ymm1","vaddsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
"VAESDEC xmm1, xmmV, xmm2/m128","VAESDEC xmm2/m128, xmmV, xmm1","vaesdec xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DE /r","V","V","Both AES and AVX flags","","w,r,r","",""
"VAESDECLAST xmm1, xmmV, xmm2/m128","VAESDECLAST xmm2/m128, xmmV, xmm1","vaesdeclast xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DF /r","V","V","Both AES and AVX flags","","w,r,r","",""
"VAESENC xmm1, xmmV, xmm2/m128","VAESENC xmm2/m128, xmmV, xmm1","vaesenc xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DC /r","V","V","Both AES and AVX flags","","w,r,r","",""
"VAESENCLAST xmm1, xmmV, xmm2/m128","VAESENCLAST xmm2/m128, xmmV, xmm1","vaesenclast xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DD /r","V","V","Both AES and AVX flags","","w,r,r","",""
"VAESIMC xmm1, xmm2/m128","VAESIMC xmm2/m128, xmm1","vaesimc xmm2/m128, xmm1","VEX.128.66.0F38.WIG DB /r","V","V","Both AES and AVX flags","","w,r","",""
"VAESKEYGENASSIST xmm1, xmm2/m128, imm8","VAESKEYGENASSIST imm8, xmm2/m128, xmm1","vaeskeygenassist imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG DF /r ib","V","V","Both AES and AVX flags","","w,r,r","",""
"VANDNPD xmm1, xmmV, xmm2/m128","VANDNPD xmm2/m128, xmmV, xmm1","vandnpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
"VANDNPD ymm1, ymmV, ymm2/m256","VANDNPD ymm2/m256, ymmV, ymm1","vandnpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
"VANDNPS xmm1, xmmV, xmm2/m128","VANDNPS xmm2/m128, xmmV, xmm1","vandnps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
"VANDNPS ymm1, ymmV, ymm2/m256","VANDNPS ymm2/m256, ymmV, ymm1","vandnps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
"VANDPD xmm1, xmmV, xmm2/m128","VANDPD xmm2/m128, xmmV, xmm1","vandpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
"VANDPD ymm1, ymmV, ymm2/m256","VANDPD ymm2/m256, ymmV, ymm1","vandpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
"VANDPS xmm1, xmmV, xmm2/m128","VANDPS xmm2/m128, xmmV, xmm1","vandps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
"VANDPS ymm1, ymmV, ymm2/m256","VANDPS ymm2/m256, ymmV, ymm1","vandps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
"VBLENDPD xmm1, xmmV, xmm2/m128, imm8","VBLENDPD imm8, xmm2/m128, xmmV, xmm1","vblendpd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0D /r ib","V","V","AVX","","w,r,r,r","",""
"VBLENDPD ymm1, ymmV, ymm2/m256, imm8","VBLENDPD imm8, ymm2/m256, ymmV, ymm1","vblendpd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0D /r ib","V","V","AVX","","w,r,r,r","",""
"VBLENDPS xmm1, xmmV, xmm2/m128, imm8","VBLENDPS imm8, xmm2/m128, xmmV, xmm1","vblendps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0C /r ib","V","V","AVX","","w,r,r,r","",""
"VBLENDPS ymm1, ymmV, ymm2/m256, imm8","VBLENDPS imm8, ymm2/m256, ymmV, ymm1","vblendps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0C /r ib","V","V","AVX","","w,r,r,r","",""
"VBLENDVPD xmm1, xmmV, xmm2/m128, xmmIH","VBLENDVPD xmmIH, xmm2/m128, xmmV, xmm1","vblendvpd xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4B /r /is4","V","V","AVX","","w,r,r,r","",""
"VBLENDVPD ymm1, ymmV, ymm2/m256, ymmIH","VBLENDVPD ymmIH, ymm2/m256, ymmV, ymm1","vblendvpd ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4B /r /is4","V","V","AVX","","w,r,r,r","",""
"VBLENDVPS xmm1, xmmV, xmm2/m128, xmmIH","VBLENDVPS xmmIH, xmm2/m128, xmmV, xmm1","vblendvps xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4A /r /is4","V","V","AVX","","w,r,r,r","",""
"VBLENDVPS ymm1, ymmV, ymm2/m256, ymmIH","VBLENDVPS ymmIH, ymm2/m256, ymmV, ymm1","vblendvps ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4A /r /is4","V","V","AVX","","w,r,r,r","",""
"VBROADCASTF128 ymm1, m128","VBROADCASTF128 m128, ymm1","vbroadcastf128 m128, ymm1","VEX.256.66.0F38.W0 1A /r","V","V","AVX","modrm_memonly","w,r","",""
"VBROADCASTI128 ymm1, m128","VBROADCASTI128 m128, ymm1","vbroadcasti128 m128, ymm1","VEX.256.66.0F38.W0 5A /r","V","V","AVX2","modrm_memonly","w,r","",""
"VBROADCASTSD ymm1, m64","VBROADCASTSD m64, ymm1","vbroadcastsd m64, ymm1","VEX.256.66.0F38.W0 19 /r","V","V","AVX","modrm_memonly","w,r","",""
"VBROADCASTSD ymm1, xmm2","VBROADCASTSD xmm2, ymm1","vbroadcastsd xmm2, ymm1","VEX.256.66.0F38.W0 19 /r","V","V","AVX2","modrm_regonly","w,r","",""
"VBROADCASTSS xmm1, m32","VBROADCASTSS m32, xmm1","vbroadcastss m32, xmm1","VEX.128.66.0F38.W0 18 /r","V","V","AVX","modrm_memonly","w,r","",""
"VBROADCASTSS xmm1, xmm2","VBROADCASTSS xmm2, xmm1","vbroadcastss xmm2, xmm1","VEX.128.66.0F38.W0 18 /r","V","V","AVX2","modrm_regonly","w,r","",""
"VBROADCASTSS ymm1, m32","VBROADCASTSS m32, ymm1","vbroadcastss m32, ymm1","VEX.256.66.0F38.W0 18 /r","V","V","AVX","modrm_memonly","w,r","",""
"VBROADCASTSS ymm1, xmm2","VBROADCASTSS xmm2, ymm1","vbroadcastss xmm2, ymm1","VEX.256.66.0F38.W0 18 /r","V","V","AVX2","modrm_regonly","w,r","",""
"VCMPPD xmm1, xmmV, xmm2/m128, imm8","VCMPPD imm8, xmm2/m128, xmmV, xmm1","vcmppd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCMPPD ymm1, ymmV, ymm2/m256, imm8","VCMPPD imm8, ymm2/m256, ymmV, ymm1","vcmppd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCMPPS xmm1, xmmV, xmm2/m128, imm8","VCMPPS imm8, xmm2/m128, xmmV, xmm1","vcmpps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCMPPS ymm1, ymmV, ymm2/m256, imm8","VCMPPS imm8, ymm2/m256, ymmV, ymm1","vcmpps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCMPSD xmm1, xmmV, xmm2/m64, imm8","VCMPSD imm8, xmm2/m64, xmmV, xmm1","vcmpsd imm8, xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCMPSS xmm1, xmmV, xmm2/m32, imm8","VCMPSS imm8, xmm2/m32, xmmV, xmm1","vcmpss imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
"VCOMISD xmm1, xmm2/m64","VCOMISD xmm2/m64, xmm1","vcomisd xmm2/m64, xmm1","VEX.LIG.66.0F.WIG 2F /r","V","V","AVX","","r,r","",""
"VCOMISS xmm1, xmm2/m32","VCOMISS xmm2/m32, xmm1","vcomiss xmm2/m32, xmm1","VEX.LIG.0F.WIG 2F /r","V","V","AVX","","r,r","",""
"VCVTDQ2PD xmm1, xmm2/m64","VCVTDQ2PD xmm2/m64, xmm1","vcvtdq2pd xmm2/m64, xmm1","VEX.128.F3.0F.WIG E6 /r","V","V","AVX","","w,r","",""
"VCVTDQ2PD ymm1, xmm2/m128","VCVTDQ2PD xmm2/m128, ymm1","vcvtdq2pd xmm2/m128, ymm1","VEX.256.F3.0F.WIG E6 /r","V","V","AVX","","w,r","",""
"VCVTDQ2PS xmm1, xmm2/m128","VCVTDQ2PS xmm2/m128, xmm1","vcvtdq2ps xmm2/m128, xmm1","VEX.128.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTDQ2PS ymm1, ymm2/m256","VCVTDQ2PS ymm2/m256, ymm1","vcvtdq2ps ymm2/m256, ymm1","VEX.256.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTPD2DQ xmm1, xmm2/m128","VCVTPD2DQX xmm2/m128, xmm1","vcvtpd2dqx xmm2/m128, xmm1","VEX.128.F2.0F.WIG E6 /r","V","V","AVX","","w,r","Y","128"
"VCVTPD2DQ xmm1, ymm2/m256","VCVTPD2DQY ymm2/m256, xmm1","vcvtpd2dqy ymm2/m256, xmm1","VEX.256.F2.0F.WIG E6 /r","V","V","AVX","","w,r","Y","256"
"VCVTPD2PS xmm1, xmm2/m128","VCVTPD2PSX xmm2/m128, xmm1","vcvtpd2psx xmm2/m128, xmm1","VEX.128.66.0F.WIG 5A /r","V","V","AVX","","w,r","Y","128"
"VCVTPD2PS xmm1, ymm2/m256","VCVTPD2PSY ymm2/m256, xmm1","vcvtpd2psy ymm2/m256, xmm1","VEX.256.66.0F.WIG 5A /r","V","V","AVX","","w,r","Y","256"
"VCVTPH2PS xmm1, xmm2/m64","VCVTPH2PS xmm2/m64, xmm1","vcvtph2ps xmm2/m64, xmm1","VEX.128.66.0F38.W0 13 /r","V","V","F16C","","w,r","",""
"VCVTPH2PS ymm1, xmm2/m128","VCVTPH2PS xmm2/m128, ymm1","vcvtph2ps xmm2/m128, ymm1","VEX.256.66.0F38.W0 13 /r","V","V","F16C","","w,r","",""
"VCVTPS2DQ xmm1, xmm2/m128","VCVTPS2DQ xmm2/m128, xmm1","vcvtps2dq xmm2/m128, xmm1","VEX.128.66.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTPS2DQ ymm1, ymm2/m256","VCVTPS2DQ ymm2/m256, ymm1","vcvtps2dq ymm2/m256, ymm1","VEX.256.66.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTPS2PD xmm1, xmm2/m64","VCVTPS2PD xmm2/m64, xmm1","vcvtps2pd xmm2/m64, xmm1","VEX.128.0F.WIG 5A /r","V","V","AVX","","w,r","",""
"VCVTPS2PD ymm1, xmm2/m128","VCVTPS2PD xmm2/m128, ymm1","vcvtps2pd xmm2/m128, ymm1","VEX.256.0F.WIG 5A /r","V","V","AVX","","w,r","",""
"VCVTPS2PH xmm2/m128, ymm1, imm8","VCVTPS2PH imm8, ymm1, xmm2/m128","vcvtps2ph imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 1D /r ib","V","V","F16C","","w,r,r","",""
"VCVTPS2PH xmm2/m64, xmm1, imm8","VCVTPS2PH imm8, xmm1, xmm2/m64","vcvtps2ph imm8, xmm1, xmm2/m64","VEX.128.66.0F3A.W0 1D /r ib","V","V","F16C","","w,r,r","",""
"VCVTSD2SI r32, xmm2/m64","VCVTSD2SI xmm2/m64, r32","vcvtsd2si xmm2/m64, r32","VEX.LIG.F2.0F.W0 2D /r","V","V","AVX","","w,r","Y","32"
"VCVTSD2SI r64, xmm2/m64","VCVTSD2SIQ xmm2/m64, r64","vcvtsd2siq xmm2/m64, r64","VEX.LIG.F2.0F.W1 2D /r","N.E.","V","AVX","","w,r","Y","64"
"VCVTSD2SS xmm1, xmmV, xmm2/m64","VCVTSD2SS xmm2/m64, xmmV, xmm1","vcvtsd2ss xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5A /r","V","V","AVX","","w,r,r","",""
"VCVTSI2SD xmm1, xmmV, r/m32","VCVTSI2SDL r/m32, xmmV, xmm1","vcvtsi2sdl r/m32, xmmV, xmm1","VEX.NDS.LIG.F2.0F.W0 2A /r","V","V","AVX","","w,r,r","Y","32"
"VCVTSI2SD xmm1, xmmV, r/m64","VCVTSI2SDQ r/m64, xmmV, xmm1","vcvtsi2sdq r/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.W1 2A /r","N.E.","V","AVX","","w,r,r","Y","64"
"VCVTSI2SS xmm1, xmmV, r/m32","VCVTSI2SSL r/m32, xmmV, xmm1","vcvtsi2ssl r/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.W0 2A /r","V","V","AVX","","w,r,r","Y","32"
"VCVTSI2SS xmm1, xmmV, r/m64","VCVTSI2SSQ r/m64, xmmV, xmm1","vcvtsi2ssq r/m64, xmmV, xmm1","VEX.NDS.LIG.F3.0F.W1 2A /r","N.E.","V","AVX","","w,r,r","Y","64"
"VCVTSS2SD xmm1, xmmV, xmm2/m32","VCVTSS2SD xmm2/m32, xmmV, xmm1","vcvtss2sd xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5A /r","V","V","AVX","","w,r,r","",""
"VCVTSS2SI r32, xmm2/m32","VCVTSS2SI xmm2/m32, r32","vcvtss2si xmm2/m32, r32","VEX.LIG.F3.0F.W0 2D /r","V","V","AVX","","w,r","Y","32"
"VCVTSS2SI r64, xmm2/m32","VCVTSS2SIQ xmm2/m32, r64","vcvtss2siq xmm2/m32, r64","VEX.LIG.F3.0F.W1 2D /r","N.E.","V","AVX","","w,r","Y","64"
"VCVTTPD2DQ xmm1, xmm2/m128","VCVTTPD2DQX xmm2/m128, xmm1","vcvttpd2dqx xmm2/m128, xmm1","VEX.128.66.0F.WIG E6 /r","V","V","AVX","","w,r","Y","128"
"VCVTTPD2DQ xmm1, ymm2/m256","VCVTTPD2DQY ymm2/m256, xmm1","vcvttpd2dqy ymm2/m256, xmm1","VEX.256.66.0F.WIG E6 /r","V","V","AVX","","w,r","Y","256"
"VCVTTPS2DQ xmm1, xmm2/m128","VCVTTPS2DQ xmm2/m128, xmm1","vcvttps2dq xmm2/m128, xmm1","VEX.128.F3.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTTPS2DQ ymm1, ymm2/m256","VCVTTPS2DQ ymm2/m256, ymm1","vcvttps2dq ymm2/m256, ymm1","VEX.256.F3.0F.WIG 5B /r","V","V","AVX","","w,r","",""
"VCVTTSD2SI r32, xmm2/m64","VCVTTSD2SI xmm2/m64, r32","vcvttsd2si xmm2/m64, r32","VEX.LIG.F2.0F.W0 2C /r","V","V","AVX","","w,r","Y","32"
"VCVTTSD2SI r64, xmm2/m64","VCVTTSD2SIQ xmm2/m64, r64","vcvttsd2siq xmm2/m64, r64","VEX.LIG.F2.0F.W1 2C /r","N.E.","V","AVX","","w,r","Y","64"
"VCVTTSS2SI r32, xmm2/m32","VCVTTSS2SI xmm2/m32, r32","vcvttss2si xmm2/m32, r32","VEX.LIG.F3.0F.W0 2C /r","V","V","AVX","","w,r","Y","32"
"VCVTTSS2SI r64, xmm2/m32","VCVTTSS2SIQ xmm2/m32, r64","vcvttss2siq xmm2/m32, r64","VEX.LIG.F3.0F.W1 2C /r","N.E.","V","AVX","","w,r","Y","64"
"VDIVPD xmm1, xmmV, xmm2/m128","VDIVPD xmm2/m128, xmmV, xmm1","vdivpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDIVPD ymm1, ymmV, ymm2/m256","VDIVPD ymm2/m256, ymmV, ymm1","vdivpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDIVPS xmm1, xmmV, xmm2/m128","VDIVPS xmm2/m128, xmmV, xmm1","vdivps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDIVPS ymm1, ymmV, ymm2/m256","VDIVPS ymm2/m256, ymmV, ymm1","vdivps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDIVSD xmm1, xmmV, xmm2/m64","VDIVSD xmm2/m64, xmmV, xmm1","vdivsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDIVSS xmm1, xmmV, xmm2/m32","VDIVSS xmm2/m32, xmmV, xmm1","vdivss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
"VDPPD xmm1, xmmV, xmm2/m128, imm8","VDPPD imm8, xmm2/m128, xmmV, xmm1","vdppd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 41 /r ib","V","V","AVX","","w,r,r,r","",""
"VDPPS xmm1, xmmV, xmm2/m128, imm8","VDPPS imm8, xmm2/m128, xmmV, xmm1","vdpps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 40 /r ib","V","V","AVX","","w,r,r,r","",""
"VDPPS ymm1, ymmV, ymm2/m256, imm8","VDPPS imm8, ymm2/m256, ymmV, ymm1","vdpps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 40 /r ib","V","V","AVX","","w,r,r,r","",""
"VERR r/m16","VERR r/m16","verr r/m16","0F 00 /4","V","V","","","r","",""
"VERW r/m16","VERW r/m16","verw r/m16","0F 00 /5","V","V","","","r","",""
"VEXTRACTF128 xmm2/m128, ymm1, imm8","VEXTRACTF128 imm8, ymm1, xmm2/m128","vextractf128 imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 19 /r ib","V","V","AVX","","w,r,r","",""
"VEXTRACTI128 xmm2/m128, ymm1, imm8","VEXTRACTI128 imm8, ymm1, xmm2/m128","vextracti128 imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 39 /r ib","V","V","AVX2","","w,r,r","",""
"VEXTRACTPS r/m32, xmm1, imm8","VEXTRACTPS imm8, xmm1, r/m32","vextractps imm8, xmm1, r/m32","VEX.128.66.0F3A.WIG 17 /r ib","V","V","AVX","","w,r,r","",""
"VFMADD132PD xmm1, xmmV, xmm2/m128","VFMADD132PD xmm2/m128, xmmV, xmm1","vfmadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 98 /r","V","V","FMA","","rw,r,r","",""
"VFMADD132PD ymm1, ymmV, ymm2/m256","VFMADD132PD ymm2/m256, ymmV, ymm1","vfmadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 98 /r","V","V","FMA","","rw,r,r","",""
"VFMADD132PS xmm1, xmmV, xmm2/m128","VFMADD132PS xmm2/m128, xmmV, xmm1","vfmadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 98 /r","V","V","FMA","","rw,r,r","",""
"VFMADD132PS ymm1, ymmV, ymm2/m256","VFMADD132PS ymm2/m256, ymmV, ymm1","vfmadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 98 /r","V","V","FMA","","rw,r,r","",""
"VFMADD132SD xmm1, xmmV, xmm2/m64","VFMADD132SD xmm2/m64, xmmV, xmm1","vfmadd132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 99 /r","V","V","FMA","","rw,r,r","",""
"VFMADD132SS xmm1, xmmV, xmm2/m32","VFMADD132SS xmm2/m32, xmmV, xmm1","vfmadd132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 99 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213PD xmm1, xmmV, xmm2/m128","VFMADD213PD xmm2/m128, xmmV, xmm1","vfmadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213PD ymm1, ymmV, ymm2/m256","VFMADD213PD ymm2/m256, ymmV, ymm1","vfmadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213PS xmm1, xmmV, xmm2/m128","VFMADD213PS xmm2/m128, xmmV, xmm1","vfmadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213PS ymm1, ymmV, ymm2/m256","VFMADD213PS ymm2/m256, ymmV, ymm1","vfmadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213SD xmm1, xmmV, xmm2/m64","VFMADD213SD xmm2/m64, xmmV, xmm1","vfmadd213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 A9 /r","V","V","FMA","","rw,r,r","",""
"VFMADD213SS xmm1, xmmV, xmm2/m32","VFMADD213SS xmm2/m32, xmmV, xmm1","vfmadd213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 A9 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231PD xmm1, xmmV, xmm2/m128","VFMADD231PD xmm2/m128, xmmV, xmm1","vfmadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231PD ymm1, ymmV, ymm2/m256","VFMADD231PD ymm2/m256, ymmV, ymm1","vfmadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231PS xmm1, xmmV, xmm2/m128","VFMADD231PS xmm2/m128, xmmV, xmm1","vfmadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231PS ymm1, ymmV, ymm2/m256","VFMADD231PS ymm2/m256, ymmV, ymm1","vfmadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B8 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231SD xmm1, xmmV, xmm2/m64","VFMADD231SD xmm2/m64, xmmV, xmm1","vfmadd231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 B9 /r","V","V","FMA","","rw,r,r","",""
"VFMADD231SS xmm1, xmmV, xmm2/m32","VFMADD231SS xmm2/m32, xmmV, xmm1","vfmadd231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 B9 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB132PD xmm1, xmmV, xmm2/m128","VFMADDSUB132PD xmm2/m128, xmmV, xmm1","vfmaddsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 96 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB132PD ymm1, ymmV, ymm2/m256","VFMADDSUB132PD ymm2/m256, ymmV, ymm1","vfmaddsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 96 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB132PS xmm1, xmmV, xmm2/m128","VFMADDSUB132PS xmm2/m128, xmmV, xmm1","vfmaddsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 96 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB132PS ymm1, ymmV, ymm2/m256","VFMADDSUB132PS ymm2/m256, ymmV, ymm1","vfmaddsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 96 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB213PD xmm1, xmmV, xmm2/m128","VFMADDSUB213PD xmm2/m128, xmmV, xmm1","vfmaddsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB213PD ymm1, ymmV, ymm2/m256","VFMADDSUB213PD ymm2/m256, ymmV, ymm1","vfmaddsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB213PS xmm1, xmmV, xmm2/m128","VFMADDSUB213PS xmm2/m128, xmmV, xmm1","vfmaddsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB213PS ymm1, ymmV, ymm2/m256","VFMADDSUB213PS ymm2/m256, ymmV, ymm1","vfmaddsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB231PD xmm1, xmmV, xmm2/m128","VFMADDSUB231PD xmm2/m128, xmmV, xmm1","vfmaddsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB231PD ymm1, ymmV, ymm2/m256","VFMADDSUB231PD ymm2/m256, ymmV, ymm1","vfmaddsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB231PS xmm1, xmmV, xmm2/m128","VFMADDSUB231PS xmm2/m128, xmmV, xmm1","vfmaddsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B6 /r","V","V","FMA","","rw,r,r","",""
"VFMADDSUB231PS ymm1, ymmV, ymm2/m256","VFMADDSUB231PS ymm2/m256, ymmV, ymm1","vfmaddsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B6 /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132PD xmm1, xmmV, xmm2/m128","VFMSUB132PD xmm2/m128, xmmV, xmm1","vfmsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9A /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132PD ymm1, ymmV, ymm2/m256","VFMSUB132PD ymm2/m256, ymmV, ymm1","vfmsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9A /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132PS xmm1, xmmV, xmm2/m128","VFMSUB132PS xmm2/m128, xmmV, xmm1","vfmsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9A /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132PS ymm1, ymmV, ymm2/m256","VFMSUB132PS ymm2/m256, ymmV, ymm1","vfmsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9A /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132SD xmm1, xmmV, xmm2/m64","VFMSUB132SD xmm2/m64, xmmV, xmm1","vfmsub132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9B /r","V","V","FMA","","rw,r,r","",""
"VFMSUB132SS xmm1, xmmV, xmm2/m32","VFMSUB132SS xmm2/m32, xmmV, xmm1","vfmsub132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9B /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213PD xmm1, xmmV, xmm2/m128","VFMSUB213PD xmm2/m128, xmmV, xmm1","vfmsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213PD ymm1, ymmV, ymm2/m256","VFMSUB213PD ymm2/m256, ymmV, ymm1","vfmsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213PS xmm1, xmmV, xmm2/m128","VFMSUB213PS xmm2/m128, xmmV, xmm1","vfmsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213PS ymm1, ymmV, ymm2/m256","VFMSUB213PS ymm2/m256, ymmV, ymm1","vfmsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213SD xmm1, xmmV, xmm2/m64","VFMSUB213SD xmm2/m64, xmmV, xmm1","vfmsub213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AB /r","V","V","FMA","","rw,r,r","",""
"VFMSUB213SS xmm1, xmmV, xmm2/m32","VFMSUB213SS xmm2/m32, xmmV, xmm1","vfmsub213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AB /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231PD xmm1, xmmV, xmm2/m128","VFMSUB231PD xmm2/m128, xmmV, xmm1","vfmsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231PD ymm1, ymmV, ymm2/m256","VFMSUB231PD ymm2/m256, ymmV, ymm1","vfmsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231PS xmm1, xmmV, xmm2/m128","VFMSUB231PS xmm2/m128, xmmV, xmm1","vfmsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231PS ymm1, ymmV, ymm2/m256","VFMSUB231PS ymm2/m256, ymmV, ymm1","vfmsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BA /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231SD xmm1, xmmV, xmm2/m64","VFMSUB231SD xmm2/m64, xmmV, xmm1","vfmsub231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BB /r","V","V","FMA","","rw,r,r","",""
"VFMSUB231SS xmm1, xmmV, xmm2/m32","VFMSUB231SS xmm2/m32, xmmV, xmm1","vfmsub231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BB /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD132PD xmm1, xmmV, xmm2/m128","VFMSUBADD132PD xmm2/m128, xmmV, xmm1","vfmsubadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 97 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD132PD ymm1, ymmV, ymm2/m256","VFMSUBADD132PD ymm2/m256, ymmV, ymm1","vfmsubadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 97 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD132PS xmm1, xmmV, xmm2/m128","VFMSUBADD132PS xmm2/m128, xmmV, xmm1","vfmsubadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 97 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD132PS ymm1, ymmV, ymm2/m256","VFMSUBADD132PS ymm2/m256, ymmV, ymm1","vfmsubadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 97 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD213PD xmm1, xmmV, xmm2/m128","VFMSUBADD213PD xmm2/m128, xmmV, xmm1","vfmsubadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD213PD ymm1, ymmV, ymm2/m256","VFMSUBADD213PD ymm2/m256, ymmV, ymm1","vfmsubadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD213PS xmm1, xmmV, xmm2/m128","VFMSUBADD213PS xmm2/m128, xmmV, xmm1","vfmsubadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD213PS ymm1, ymmV, ymm2/m256","VFMSUBADD213PS ymm2/m256, ymmV, ymm1","vfmsubadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD231PD xmm1, xmmV, xmm2/m128","VFMSUBADD231PD xmm2/m128, xmmV, xmm1","vfmsubadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD231PD ymm1, ymmV, ymm2/m256","VFMSUBADD231PD ymm2/m256, ymmV, ymm1","vfmsubadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD231PS xmm1, xmmV, xmm2/m128","VFMSUBADD231PS xmm2/m128, xmmV, xmm1","vfmsubadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B7 /r","V","V","FMA","","rw,r,r","",""
"VFMSUBADD231PS ymm1, ymmV, ymm2/m256","VFMSUBADD231PS ymm2/m256, ymmV, ymm1","vfmsubadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B7 /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132PD xmm1, xmmV, xmm2/m128","VFNMADD132PD xmm2/m128, xmmV, xmm1","vfnmadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9C /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132PD ymm1, ymmV, ymm2/m256","VFNMADD132PD ymm2/m256, ymmV, ymm1","vfnmadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9C /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132PS xmm1, xmmV, xmm2/m128","VFNMADD132PS xmm2/m128, xmmV, xmm1","vfnmadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9C /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132PS ymm1, ymmV, ymm2/m256","VFNMADD132PS ymm2/m256, ymmV, ymm1","vfnmadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9C /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132SD xmm1, xmmV, xmm2/m64","VFNMADD132SD xmm2/m64, xmmV, xmm1","vfnmadd132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9D /r","V","V","FMA","","rw,r,r","",""
"VFNMADD132SS xmm1, xmmV, xmm2/m32","VFNMADD132SS xmm2/m32, xmmV, xmm1","vfnmadd132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9D /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213PD xmm1, xmmV, xmm2/m128","VFNMADD213PD xmm2/m128, xmmV, xmm1","vfnmadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213PD ymm1, ymmV, ymm2/m256","VFNMADD213PD ymm2/m256, ymmV, ymm1","vfnmadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213PS xmm1, xmmV, xmm2/m128","VFNMADD213PS xmm2/m128, xmmV, xmm1","vfnmadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213PS ymm1, ymmV, ymm2/m256","VFNMADD213PS ymm2/m256, ymmV, ymm1","vfnmadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213SD xmm1, xmmV, xmm2/m64","VFNMADD213SD xmm2/m64, xmmV, xmm1","vfnmadd213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AD /r","V","V","FMA","","rw,r,r","",""
"VFNMADD213SS xmm1, xmmV, xmm2/m32","VFNMADD213SS xmm2/m32, xmmV, xmm1","vfnmadd213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AD /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231PD xmm1, xmmV, xmm2/m128","VFNMADD231PD xmm2/m128, xmmV, xmm1","vfnmadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231PD ymm1, ymmV, ymm2/m256","VFNMADD231PD ymm2/m256, ymmV, ymm1","vfnmadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231PS xmm1, xmmV, xmm2/m128","VFNMADD231PS xmm2/m128, xmmV, xmm1","vfnmadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231PS ymm1, ymmV, ymm2/m256","VFNMADD231PS ymm2/m256, ymmV, ymm1","vfnmadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BC /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231SD xmm1, xmmV, xmm2/m64","VFNMADD231SD xmm2/m64, xmmV, xmm1","vfnmadd231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BD /r","V","V","FMA","","rw,r,r","",""
"VFNMADD231SS xmm1, xmmV, xmm2/m32","VFNMADD231SS xmm2/m32, xmmV, xmm1","vfnmadd231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BD /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132PD xmm1, xmmV, xmm2/m128","VFNMSUB132PD xmm2/m128, xmmV, xmm1","vfnmsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9E /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132PD ymm1, ymmV, ymm2/m256","VFNMSUB132PD ymm2/m256, ymmV, ymm1","vfnmsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9E /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132PS xmm1, xmmV, xmm2/m128","VFNMSUB132PS xmm2/m128, xmmV, xmm1","vfnmsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9E /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132PS ymm1, ymmV, ymm2/m256","VFNMSUB132PS ymm2/m256, ymmV, ymm1","vfnmsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9E /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132SD xmm1, xmmV, xmm2/m64","VFNMSUB132SD xmm2/m64, xmmV, xmm1","vfnmsub132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9F /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB132SS xmm1, xmmV, xmm2/m32","VFNMSUB132SS xmm2/m32, xmmV, xmm1","vfnmsub132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9F /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213PD xmm1, xmmV, xmm2/m128","VFNMSUB213PD xmm2/m128, xmmV, xmm1","vfnmsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213PD ymm1, ymmV, ymm2/m256","VFNMSUB213PD ymm2/m256, ymmV, ymm1","vfnmsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213PS xmm1, xmmV, xmm2/m128","VFNMSUB213PS xmm2/m128, xmmV, xmm1","vfnmsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213PS ymm1, ymmV, ymm2/m256","VFNMSUB213PS ymm2/m256, ymmV, ymm1","vfnmsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213SD xmm1, xmmV, xmm2/m64","VFNMSUB213SD xmm2/m64, xmmV, xmm1","vfnmsub213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AF /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB213SS xmm1, xmmV, xmm2/m32","VFNMSUB213SS xmm2/m32, xmmV, xmm1","vfnmsub213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AF /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231PD xmm1, xmmV, xmm2/m128","VFNMSUB231PD xmm2/m128, xmmV, xmm1","vfnmsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231PD ymm1, ymmV, ymm2/m256","VFNMSUB231PD ymm2/m256, ymmV, ymm1","vfnmsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231PS xmm1, xmmV, xmm2/m128","VFNMSUB231PS xmm2/m128, xmmV, xmm1","vfnmsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231PS ymm1, ymmV, ymm2/m256","VFNMSUB231PS ymm2/m256, ymmV, ymm1","vfnmsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BE /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231SD xmm1, xmmV, xmm2/m64","VFNMSUB231SD xmm2/m64, xmmV, xmm1","vfnmsub231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BF /r","V","V","FMA","","rw,r,r","",""
"VFNMSUB231SS xmm1, xmmV, xmm2/m32","VFNMSUB231SS xmm2/m32, xmmV, xmm1","vfnmsub231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BF /r","V","V","FMA","","rw,r,r","",""
"VHADDPD xmm1, xmmV, xmm2/m128","VHADDPD xmm2/m128, xmmV, xmm1","vhaddpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
"VHADDPD ymm1, ymmV, ymm2/m256","VHADDPD ymm2/m256, ymmV, ymm1","vhaddpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
"VHADDPS xmm1, xmmV, xmm2/m128","VHADDPS xmm2/m128, xmmV, xmm1","vhaddps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
"VHADDPS ymm1, ymmV, ymm2/m256","VHADDPS ymm2/m256, ymmV, ymm1","vhaddps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
"VHSUBPD xmm1, xmmV, xmm2/m128","VHSUBPD xmm2/m128, xmmV, xmm1","vhsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
"VHSUBPD ymm1, ymmV, ymm2/m256","VHSUBPD ymm2/m256, ymmV, ymm1","vhsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
"VHSUBPS xmm1, xmmV, xmm2/m128","VHSUBPS xmm2/m128, xmmV, xmm1","vhsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
"VHSUBPS ymm1, ymmV, ymm2/m256","VHSUBPS ymm2/m256, ymmV, ymm1","vhsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
"VINSERTF128 ymm1, ymmV, xmm2/m128, imm8","VINSERTF128 imm8, xmm2/m128, ymmV, ymm1","vinsertf128 imm8, xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 18 /r ib","V","V","AVX","","w,r,r,r","",""
"VINSERTI128 ymm1, ymmV, xmm2/m128, imm8","VINSERTI128 imm8, xmm2/m128, ymmV, ymm1","vinserti128 imm8, xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 38 /r ib","V","V","AVX2","","w,r,r,r","",""
"VINSERTPS xmm1, xmmV, xmm2/m32, imm8","VINSERTPS imm8, xmm2/m32, xmmV, xmm1","vinsertps imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 21 /r ib","V","V","AVX","","w,r,r,r","",""
"VLDDQU xmm1, m128","VLDDQU m128, xmm1","vlddqu m128, xmm1","VEX.128.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly","w,r","",""
"VLDDQU ymm1, m256","VLDDQU m256, ymm1","vlddqu m256, ymm1","VEX.256.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly","w,r","",""
"VLDMXCSR m32","VLDMXCSR m32","vldmxcsr m32","VEX.LZ.0F.WIG AE /2","V","V","AVX","modrm_memonly","r","",""
"VMASKMOVDQU xmm1, xmm2","VMASKMOVDQU xmm2, xmm1","vmaskmovdqu xmm2, xmm1","VEX.128.66.0F.WIG F7 /r","V","V","AVX","modrm_regonly","r,r","",""
"VMASKMOVPD m128, xmmV, xmm1","VMASKMOVPD xmm1, xmmV, m128","vmaskmovpd xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 2F /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPD m256, ymmV, ymm1","VMASKMOVPD ymm1, ymmV, m256","vmaskmovpd ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 2F /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPD xmm1, xmmV, m128","VMASKMOVPD m128, xmmV, xmm1","vmaskmovpd m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 2D /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPD ymm1, ymmV, m256","VMASKMOVPD m256, ymmV, ymm1","vmaskmovpd m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 2D /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPS m128, xmmV, xmm1","VMASKMOVPS xmm1, xmmV, m128","vmaskmovps xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 2E /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPS m256, ymmV, ymm1","VMASKMOVPS ymm1, ymmV, m256","vmaskmovps ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 2E /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPS xmm1, xmmV, m128","VMASKMOVPS m128, xmmV, xmm1","vmaskmovps m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 2C /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMASKMOVPS ymm1, ymmV, m256","VMASKMOVPS m256, ymmV, ymm1","vmaskmovps m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 2C /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMAXPD xmm1, xmmV, xmm2/m128","VMAXPD xmm2/m128, xmmV, xmm1","vmaxpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMAXPD ymm1, ymmV, ymm2/m256","VMAXPD ymm2/m256, ymmV, ymm1","vmaxpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMAXPS xmm1, xmmV, xmm2/m128","VMAXPS xmm2/m128, xmmV, xmm1","vmaxps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMAXPS ymm1, ymmV, ymm2/m256","VMAXPS ymm2/m256, ymmV, ymm1","vmaxps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMAXSD xmm1, xmmV, xmm2/m64","VMAXSD xmm2/m64, xmmV, xmm1","vmaxsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMAXSS xmm1, xmmV, xmm2/m32","VMAXSS xmm2/m32, xmmV, xmm1","vmaxss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
"VMINPD xmm1, xmmV, xmm2/m128","VMINPD xmm2/m128, xmmV, xmm1","vminpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMINPD ymm1, ymmV, ymm2/m256","VMINPD ymm2/m256, ymmV, ymm1","vminpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMINPS xmm1, xmmV, xmm2/m128","VMINPS xmm2/m128, xmmV, xmm1","vminps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMINPS ymm1, ymmV, ymm2/m256","VMINPS ymm2/m256, ymmV, ymm1","vminps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMINSD xmm1, xmmV, xmm2/m64","VMINSD xmm2/m64, xmmV, xmm1","vminsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMINSS xmm1, xmmV, xmm2/m32","VMINSS xmm2/m32, xmmV, xmm1","vminss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
"VMOVAPD xmm1, xmm2/m128","VMOVAPD xmm2/m128, xmm1","vmovapd xmm2/m128, xmm1","VEX.128.66.0F.WIG 28 /r","V","V","AVX","","w,r","",""
"VMOVAPD xmm2/m128, xmm1","VMOVAPD xmm1, xmm2/m128","vmovapd xmm1, xmm2/m128","VEX.128.66.0F.WIG 29 /r","V","V","AVX","","w,r","",""
"VMOVAPD ymm1, ymm2/m256","VMOVAPD ymm2/m256, ymm1","vmovapd ymm2/m256, ymm1","VEX.256.66.0F.WIG 28 /r","V","V","AVX","","w,r","",""
"VMOVAPD ymm2/m256, ymm1","VMOVAPD ymm1, ymm2/m256","vmovapd ymm1, ymm2/m256","VEX.256.66.0F.WIG 29 /r","V","V","AVX","","w,r","",""
"VMOVAPS xmm1, xmm2/m128","VMOVAPS xmm2/m128, xmm1","vmovaps xmm2/m128, xmm1","VEX.128.0F.WIG 28 /r","V","V","AVX","","w,r","",""
"VMOVAPS xmm2/m128, xmm1","VMOVAPS xmm1, xmm2/m128","vmovaps xmm1, xmm2/m128","VEX.128.0F.WIG 29 /r","V","V","AVX","","w,r","",""
"VMOVAPS ymm1, ymm2/m256","VMOVAPS ymm2/m256, ymm1","vmovaps ymm2/m256, ymm1","VEX.256.0F.WIG 28 /r","V","V","AVX","","w,r","",""
"VMOVAPS ymm2/m256, ymm1","VMOVAPS ymm1, ymm2/m256","vmovaps ymm1, ymm2/m256","VEX.256.0F.WIG 29 /r","V","V","AVX","","w,r","",""
"VMOVD r/m32, xmm1","VMOVD xmm1, r/m32","vmovd xmm1, r/m32","VEX.128.66.0F.W0 7E /r","V","V","AVX","","w,r","",""
"VMOVD xmm1, r/m32","VMOVD r/m32, xmm1","vmovd r/m32, xmm1","VEX.128.66.0F.W0 6E /r","V","V","AVX","","w,r","",""
"VMOVDDUP xmm1, xmm2/m64","VMOVDDUP xmm2/m64, xmm1","vmovddup xmm2/m64, xmm1","VEX.128.F2.0F.WIG 12 /r","V","V","AVX","","w,r","",""
"VMOVDDUP ymm1, ymm2/m256","VMOVDDUP ymm2/m256, ymm1","vmovddup ymm2/m256, ymm1","VEX.256.F2.0F.WIG 12 /r","V","V","AVX","","w,r","",""
"VMOVDQA xmm1, xmm2/m128","VMOVDQA xmm2/m128, xmm1","vmovdqa xmm2/m128, xmm1","VEX.128.66.0F.WIG 6F /r","V","V","AVX","","w,r","",""
"VMOVDQA xmm2/m128, xmm1","VMOVDQA xmm1, xmm2/m128","vmovdqa xmm1, xmm2/m128","VEX.128.66.0F.WIG 7F /r","V","V","AVX","","w,r","",""
"VMOVDQA ymm1, ymm2/m256","VMOVDQA ymm2/m256, ymm1","vmovdqa ymm2/m256, ymm1","VEX.256.66.0F.WIG 6F /r","V","V","AVX","","w,r","",""
"VMOVDQA ymm2/m256, ymm1","VMOVDQA ymm1, ymm2/m256","vmovdqa ymm1, ymm2/m256","VEX.256.66.0F.WIG 7F /r","V","V","AVX","","w,r","",""
"VMOVDQU xmm1, xmm2/m128","VMOVDQU xmm2/m128, xmm1","vmovdqu xmm2/m128, xmm1","VEX.128.F3.0F.WIG 6F /r","V","V","AVX","","w,r","",""
"VMOVDQU xmm2/m128, xmm1","VMOVDQU xmm1, xmm2/m128","vmovdqu xmm1, xmm2/m128","VEX.128.F3.0F.WIG 7F /r","V","V","AVX","","w,r","",""
"VMOVDQU ymm1, ymm2/m256","VMOVDQU ymm2/m256, ymm1","vmovdqu ymm2/m256, ymm1","VEX.256.F3.0F.WIG 6F /r","V","V","AVX","","w,r","",""
"VMOVDQU ymm2/m256, ymm1","VMOVDQU ymm1, ymm2/m256","vmovdqu ymm1, ymm2/m256","VEX.256.F3.0F.WIG 7F /r","V","V","AVX","","w,r","",""
"VMOVHLPS xmm1, xmmV, xmm2","VMOVHLPS xmm2, xmmV, xmm1","vmovhlps xmm2, xmmV, xmm1","VEX.NDS.128.0F.WIG 12 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVHPD m64, xmm1","VMOVHPD xmm1, m64","vmovhpd xmm1, m64","VEX.128.66.0F.WIG 17 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVHPD xmm1, xmmV, m64","VMOVHPD m64, xmmV, xmm1","vmovhpd m64, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 16 /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMOVHPS m64, xmm1","VMOVHPS xmm1, m64","vmovhps xmm1, m64","VEX.128.0F.WIG 17 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVHPS xmm1, xmmV, m64","VMOVHPS m64, xmmV, xmm1","vmovhps m64, xmmV, xmm1","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMOVLHPS xmm1, xmmV, xmm2","VMOVLHPS xmm2, xmmV, xmm1","vmovlhps xmm2, xmmV, xmm1","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVLPD m64, xmm1","VMOVLPD xmm1, m64","vmovlpd xmm1, m64","VEX.128.66.0F.WIG 13 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVLPD xmm1, xmmV, m64","VMOVLPD m64, xmmV, xmm1","vmovlpd m64, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 12 /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMOVLPS m64, xmm1","VMOVLPS xmm1, m64","vmovlps xmm1, m64","VEX.128.0F.WIG 13 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVLPS xmm1, xmmV, m64","VMOVLPS m64, xmmV, xmm1","vmovlps m64, xmmV, xmm1","VEX.NDS.128.0F.WIG 12 /r","V","V","AVX","modrm_memonly","w,r,r","",""
"VMOVMSKPD r32, xmm2","VMOVMSKPD xmm2, r32","vmovmskpd xmm2, r32","VEX.128.66.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
"VMOVMSKPD r32, ymm2","VMOVMSKPD ymm2, r32","vmovmskpd ymm2, r32","VEX.256.66.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
"VMOVMSKPS r32, xmm2","VMOVMSKPS xmm2, r32","vmovmskps xmm2, r32","VEX.128.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
"VMOVMSKPS r32, ymm2","VMOVMSKPS ymm2, r32","vmovmskps ymm2, r32","VEX.256.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
"VMOVNTDQ m128, xmm1","VMOVNTDQ xmm1, m128","vmovntdq xmm1, m128","VEX.128.66.0F.WIG E7 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTDQ m256, ymm1","VMOVNTDQ ymm1, m256","vmovntdq ymm1, m256","VEX.256.66.0F.WIG E7 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTDQA xmm1, m128","VMOVNTDQA m128, xmm1","vmovntdqa m128, xmm1","VEX.128.66.0F38.WIG 2A /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTDQA ymm1, m256","VMOVNTDQA m256, ymm1","vmovntdqa m256, ymm1","VEX.256.66.0F38.WIG 2A /r","V","V","AVX2","modrm_memonly","w,r","",""
"VMOVNTPD m128, xmm1","VMOVNTPD xmm1, m128","vmovntpd xmm1, m128","VEX.128.66.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTPD m256, ymm1","VMOVNTPD ymm1, m256","vmovntpd ymm1, m256","VEX.256.66.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTPS m128, xmm1","VMOVNTPS xmm1, m128","vmovntps xmm1, m128","VEX.128.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVNTPS m256, ymm1","VMOVNTPS ymm1, m256","vmovntps ymm1, m256","VEX.256.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVQ r/m64, xmm1","VMOVQ xmm1, r/m64","vmovq xmm1, r/m64","VEX.128.66.0F.W1 7E /r","N.E.","V","AVX","","w,r","",""
"VMOVQ xmm1, m64","VMOVQ m64, xmm1","vmovq m64, xmm1","VEX.128.F3.0F.WIG 7E /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVQ xmm1, r/m64","VMOVQ r/m64, xmm1","vmovq r/m64, xmm1","VEX.128.66.0F.W1 6E /r","N.E.","V","AVX","","w,r","",""
"VMOVQ xmm1, xmm2","VMOVQ xmm2, xmm1","vmovq xmm2, xmm1","VEX.128.F3.0F.WIG 7E /r","V","V","AVX","modrm_regonly","w,r","",""
"VMOVQ xmm2/m64, xmm1","VMOVQ xmm1, xmm2/m64","vmovq xmm1, xmm2/m64","VEX.128.66.0F.WIG D6 /r","V","V","AVX","","w,r","",""
"VMOVSD m64, xmm1","VMOVSD xmm1, m64","vmovsd xmm1, m64","VEX.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVSD xmm1, m64","VMOVSD m64, xmm1","vmovsd m64, xmm1","VEX.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVSD xmm1, xmmV, xmm2","VMOVSD xmm2, xmmV, xmm1","vmovsd xmm2, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVSD xmm2, xmmV, xmm1","VMOVSD xmm1, xmmV, xmm2","vmovsd xmm1, xmmV, xmm2","VEX.NDS.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVSHDUP xmm1, xmm2/m128","VMOVSHDUP xmm2/m128, xmm1","vmovshdup xmm2/m128, xmm1","VEX.128.F3.0F.WIG 16 /r","V","V","AVX","","w,r","",""
"VMOVSHDUP ymm1, ymm2/m256","VMOVSHDUP ymm2/m256, ymm1","vmovshdup ymm2/m256, ymm1","VEX.256.F3.0F.WIG 16 /r","V","V","AVX","","w,r","",""
"VMOVSLDUP xmm1, xmm2/m128","VMOVSLDUP xmm2/m128, xmm1","vmovsldup xmm2/m128, xmm1","VEX.128.F3.0F.WIG 12 /r","V","V","AVX","","w,r","",""
"VMOVSLDUP ymm1, ymm2/m256","VMOVSLDUP ymm2/m256, ymm1","vmovsldup ymm2/m256, ymm1","VEX.256.F3.0F.WIG 12 /r","V","V","AVX","","w,r","",""
"VMOVSS m32, xmm1","VMOVSS xmm1, m32","vmovss xmm1, m32","VEX.LIG.F3.0F.WIG 11 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVSS xmm1, m32","VMOVSS m32, xmm1","vmovss m32, xmm1","VEX.LIG.F3.0F.WIG 10 /r","V","V","AVX","modrm_memonly","w,r","",""
"VMOVSS xmm1, xmmV, xmm2","VMOVSS xmm2, xmmV, xmm1","vmovss xmm2, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 10 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVSS xmm2, xmmV, xmm1","VMOVSS xmm1, xmmV, xmm2","vmovss xmm1, xmmV, xmm2","VEX.NDS.LIG.F3.0F.WIG 11 /r","V","V","AVX","modrm_regonly","w,r,r","",""
"VMOVUPD xmm1, xmm2/m128","VMOVUPD xmm2/m128, xmm1","vmovupd xmm2/m128, xmm1","VEX.128.66.0F.WIG 10 /r","V","V","AVX","","w,r","",""
"VMOVUPD xmm2/m128, xmm1","VMOVUPD xmm1, xmm2/m128","vmovupd xmm1, xmm2/m128","VEX.128.66.0F.WIG 11 /r","V","V","AVX","","w,r","",""
"VMOVUPD ymm1, ymm2/m256","VMOVUPD ymm2/m256, ymm1","vmovupd ymm2/m256, ymm1","VEX.256.66.0F.WIG 10 /r","V","V","AVX","","w,r","",""
"VMOVUPD ymm2/m256, ymm1","VMOVUPD ymm1, ymm2/m256","vmovupd ymm1, ymm2/m256","VEX.256.66.0F.WIG 11 /r","V","V","AVX","","w,r","",""
"VMOVUPS xmm1, xmm2/m128","VMOVUPS xmm2/m128, xmm1","vmovups xmm2/m128, xmm1","VEX.128.0F.WIG 10 /r","V","V","AVX","","w,r","",""
"VMOVUPS xmm2/m128, xmm1","VMOVUPS xmm1, xmm2/m128","vmovups xmm1, xmm2/m128","VEX.128.0F.WIG 11 /r","V","V","AVX","","w,r","",""
"VMOVUPS ymm1, ymm2/m256","VMOVUPS ymm2/m256, ymm1","vmovups ymm2/m256, ymm1","VEX.256.0F.WIG 10 /r","V","V","AVX","","w,r","",""
"VMOVUPS ymm2/m256, ymm1","VMOVUPS ymm1, ymm2/m256","vmovups ymm1, ymm2/m256","VEX.256.0F.WIG 11 /r","V","V","AVX","","w,r","",""
"VMPSADBW xmm1, xmmV, xmm2/m128, imm8","VMPSADBW imm8, xmm2/m128, xmmV, xmm1","vmpsadbw imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 42 /r ib","V","V","AVX","","w,r,r,r","",""
"VMPSADBW ymm1, ymmV, ymm2/m256, imm8","VMPSADBW imm8, ymm2/m256, ymmV, ymm1","vmpsadbw imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 42 /r ib","V","V","AVX2","","w,r,r,r","",""
"VMULPD xmm1, xmmV, xmm2/m128","VMULPD xmm2/m128, xmmV, xmm1","vmulpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VMULPD ymm1, ymmV, ymm2/m256","VMULPD ymm2/m256, ymmV, ymm1","vmulpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VMULPS xmm1, xmmV, xmm2/m128","VMULPS xmm2/m128, xmmV, xmm1","vmulps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VMULPS ymm1, ymmV, ymm2/m256","VMULPS ymm2/m256, ymmV, ymm1","vmulps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VMULSD xmm1, xmmV, xmm2/m64","VMULSD xmm2/m64, xmmV, xmm1","vmulsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VMULSS xmm1, xmmV, xmm2/m32","VMULSS xmm2/m32, xmmV, xmm1","vmulss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
"VORPD xmm1, xmmV, xmm2/m128","VORPD xmm2/m128, xmmV, xmm1","vorpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
"VORPD ymm1, ymmV, ymm2/m256","VORPD ymm2/m256, ymmV, ymm1","vorpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
"VORPS xmm1, xmmV, xmm2/m128","VORPS xmm2/m128, xmmV, xmm1","vorps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
"VORPS ymm1, ymmV, ymm2/m256","VORPS ymm2/m256, ymmV, ymm1","vorps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
"VPABSB xmm1, xmm2/m128","VPABSB xmm2/m128, xmm1","vpabsb xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1C /r","V","V","AVX","","w,r","",""
"VPABSB ymm1, ymm2/m256","VPABSB ymm2/m256, ymm1","vpabsb ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1C /r","V","V","AVX2","","w,r","",""
"VPABSD xmm1, xmm2/m128","VPABSD xmm2/m128, xmm1","vpabsd xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1E /r","V","V","AVX","","w,r","",""
"VPABSD ymm1, ymm2/m256","VPABSD ymm2/m256, ymm1","vpabsd ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1E /r","V","V","AVX2","","w,r","",""
"VPABSW xmm1, xmm2/m128","VPABSW xmm2/m128, xmm1","vpabsw xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1D /r","V","V","AVX","","w,r","",""
"VPABSW ymm1, ymm2/m256","VPABSW ymm2/m256, ymm1","vpabsw ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1D /r","V","V","AVX2","","w,r","",""
"VPACKSSDW xmm1, xmmV, xmm2/m128","VPACKSSDW xmm2/m128, xmmV, xmm1","vpackssdw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6B /r","V","V","AVX","","w,r,r","",""
"VPACKSSDW ymm1, ymmV, ymm2/m256","VPACKSSDW ymm2/m256, ymmV, ymm1","vpackssdw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6B /r","V","V","AVX2","","w,r,r","",""
"VPACKSSWB xmm1, xmmV, xmm2/m128","VPACKSSWB xmm2/m128, xmmV, xmm1","vpacksswb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 63 /r","V","V","AVX","","w,r,r","",""
"VPACKSSWB ymm1, ymmV, ymm2/m256","VPACKSSWB ymm2/m256, ymmV, ymm1","vpacksswb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 63 /r","V","V","AVX2","","w,r,r","",""
"VPACKUSDW xmm1, xmmV, xmm2/m128","VPACKUSDW xmm2/m128, xmmV, xmm1","vpackusdw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 2B /r","V","V","AVX","","w,r,r","",""
"VPACKUSDW ymm1, ymmV, ymm2/m256","VPACKUSDW ymm2/m256, ymmV, ymm1","vpackusdw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 2B /r","V","V","AVX2","","w,r,r","",""
"VPACKUSWB xmm1, xmmV, xmm2/m128","VPACKUSWB xmm2/m128, xmmV, xmm1","vpackuswb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 67 /r","V","V","AVX","","w,r,r","",""
"VPACKUSWB ymm1, ymmV, ymm2/m256","VPACKUSWB ymm2/m256, ymmV, ymm1","vpackuswb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 67 /r","V","V","AVX2","","w,r,r","",""
"VPADDB xmm1, xmmV, xmm2/m128","VPADDB xmm2/m128, xmmV, xmm1","vpaddb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FC /r","V","V","AVX","","w,r,r","",""
"VPADDB ymm1, ymmV, ymm2/m256","VPADDB ymm2/m256, ymmV, ymm1","vpaddb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FC /r","V","V","AVX2","","w,r,r","",""
"VPADDD xmm1, xmmV, xmm2/m128","VPADDD xmm2/m128, xmmV, xmm1","vpaddd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FE /r","V","V","AVX","","w,r,r","",""
"VPADDD ymm1, ymmV, ymm2/m256","VPADDD ymm2/m256, ymmV, ymm1","vpaddd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FE /r","V","V","AVX2","","w,r,r","",""
"VPADDQ xmm1, xmmV, xmm2/m128","VPADDQ xmm2/m128, xmmV, xmm1","vpaddq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D4 /r","V","V","AVX","","w,r,r","",""
"VPADDQ ymm1, ymmV, ymm2/m256","VPADDQ ymm2/m256, ymmV, ymm1","vpaddq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D4 /r","V","V","AVX2","","w,r,r","",""
"VPADDSB xmm1, xmmV, xmm2/m128","VPADDSB xmm2/m128, xmmV, xmm1","vpaddsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EC /r","V","V","AVX","","w,r,r","",""
"VPADDSB ymm1, ymmV, ymm2/m256","VPADDSB ymm2/m256, ymmV, ymm1","vpaddsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EC /r","V","V","AVX2","","w,r,r","",""
"VPADDSW xmm1, xmmV, xmm2/m128","VPADDSW xmm2/m128, xmmV, xmm1","vpaddsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG ED /r","V","V","AVX","","w,r,r","",""
"VPADDSW ymm1, ymmV, ymm2/m256","VPADDSW ymm2/m256, ymmV, ymm1","vpaddsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG ED /r","V","V","AVX2","","w,r,r","",""
"VPADDUSB xmm1, xmmV, xmm2/m128","VPADDUSB xmm2/m128, xmmV, xmm1","vpaddusb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DC /r","V","V","AVX","","w,r,r","",""
"VPADDUSB ymm1, ymmV, ymm2/m256","VPADDUSB ymm2/m256, ymmV, ymm1","vpaddusb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DC /r","V","V","AVX2","","w,r,r","",""
"VPADDUSW xmm1, xmmV, xmm2/m128","VPADDUSW xmm2/m128, xmmV, xmm1","vpaddusw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DD /r","V","V","AVX","","w,r,r","",""
"VPADDUSW ymm1, ymmV, ymm2/m256","VPADDUSW ymm2/m256, ymmV, ymm1","vpaddusw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DD /r","V","V","AVX2","","w,r,r","",""
"VPADDW xmm1, xmmV, xmm2/m128","VPADDW xmm2/m128, xmmV, xmm1","vpaddw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FD /r","V","V","AVX","","w,r,r","",""
"VPADDW ymm1, ymmV, ymm2/m256","VPADDW ymm2/m256, ymmV, ymm1","vpaddw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FD /r","V","V","AVX2","","w,r,r","",""
"VPALIGNR xmm1, xmmV, xmm2/m128, imm8","VPALIGNR imm8, xmm2/m128, xmmV, xmm1","vpalignr imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0F /r ib","V","V","AVX","","w,r,r,r","",""
"VPALIGNR ymm1, ymmV, ymm2/m256, imm8","VPALIGNR imm8, ymm2/m256, ymmV, ymm1","vpalignr imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0F /r ib","V","V","AVX2","","w,r,r,r","",""
"VPAND xmm1, xmmV, xmm2/m128","VPAND xmm2/m128, xmmV, xmm1","vpand xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DB /r","V","V","AVX","","w,r,r","",""
"VPAND ymm1, ymmV, ymm2/m256","VPAND ymm2/m256, ymmV, ymm1","vpand ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DB /r","V","V","AVX2","","w,r,r","",""
"VPANDN xmm1, xmmV, xmm2/m128","VPANDN xmm2/m128, xmmV, xmm1","vpandn xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DF /r","V","V","AVX","","w,r,r","",""
"VPANDN ymm1, ymmV, ymm2/m256","VPANDN ymm2/m256, ymmV, ymm1","vpandn ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DF /r","V","V","AVX2","","w,r,r","",""
"VPAVGB xmm1, xmmV, xmm2/m128","VPAVGB xmm2/m128, xmmV, xmm1","vpavgb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E0 /r","V","V","AVX","","w,r,r","",""
"VPAVGB ymm1, ymmV, ymm2/m256","VPAVGB ymm2/m256, ymmV, ymm1","vpavgb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E0 /r","V","V","AVX2","","w,r,r","",""
"VPAVGW xmm1, xmmV, xmm2/m128","VPAVGW xmm2/m128, xmmV, xmm1","vpavgw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E3 /r","V","V","AVX","","w,r,r","",""
"VPAVGW ymm1, ymmV, ymm2/m256","VPAVGW ymm2/m256, ymmV, ymm1","vpavgw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E3 /r","V","V","AVX2","","w,r,r","",""
"VPBLENDD xmm1, xmmV, xmm2/m128, imm8","VPBLENDD imm8, xmm2/m128, xmmV, xmm1","vpblendd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 02 /r ib","V","V","AVX2","","w,r,r,r","",""
"VPBLENDD ymm1, ymmV, ymm2/m256, imm8","VPBLENDD imm8, ymm2/m256, ymmV, ymm1","vpblendd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 02 /r ib","V","V","AVX2","","w,r,r,r","",""
"VPBLENDVB xmm1, xmmV, xmm2/m128, xmmIH","VPBLENDVB xmmIH, xmm2/m128, xmmV, xmm1","vpblendvb xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4C /r /is4","V","V","AVX","","w,r,r,r","",""
"VPBLENDVB ymm1, ymmV, ymm2/m256, ymmIH","VPBLENDVB ymmIH, ymm2/m256, ymmV, ymm1","vpblendvb ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4C /r /is4","V","V","AVX2","","w,r,r,r","",""
"VPBLENDW xmm1, xmmV, xmm2/m128, imm8","VPBLENDW imm8, xmm2/m128, xmmV, xmm1","vpblendw imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0E /r ib","V","V","AVX","","w,r,r,r","",""
"VPBLENDW ymm1, ymmV, ymm2/m256, imm8","VPBLENDW imm8, ymm2/m256, ymmV, ymm1","vpblendw imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0E /r ib","V","V","AVX2","","w,r,r,r","",""
"VPBROADCASTB xmm1, xmm2/m8","VPBROADCASTB xmm2/m8, xmm1","vpbroadcastb xmm2/m8, xmm1","VEX.128.66.0F38.W0 78 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTB ymm1, xmm2/m8","VPBROADCASTB xmm2/m8, ymm1","vpbroadcastb xmm2/m8, ymm1","VEX.256.66.0F38.W0 78 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTD xmm1, xmm2/m32","VPBROADCASTD xmm2/m32, xmm1","vpbroadcastd xmm2/m32, xmm1","VEX.128.66.0F38.W0 58 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTD ymm1, xmm2/m32","VPBROADCASTD xmm2/m32, ymm1","vpbroadcastd xmm2/m32, ymm1","VEX.256.66.0F38.W0 58 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTQ xmm1, xmm2/m64","VPBROADCASTQ xmm2/m64, xmm1","vpbroadcastq xmm2/m64, xmm1","VEX.128.66.0F38.W0 59 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTQ ymm1, xmm2/m64","VPBROADCASTQ xmm2/m64, ymm1","vpbroadcastq xmm2/m64, ymm1","VEX.256.66.0F38.W0 59 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTW xmm1, xmm2/m16","VPBROADCASTW xmm2/m16, xmm1","vpbroadcastw xmm2/m16, xmm1","VEX.128.66.0F38.W0 79 /r","V","V","AVX2","","w,r","",""
"VPBROADCASTW ymm1, xmm2/m16","VPBROADCASTW xmm2/m16, ymm1","vpbroadcastw xmm2/m16, ymm1","VEX.256.66.0F38.W0 79 /r","V","V","AVX2","","w,r","",""
"VPCLMULQDQ xmm1, xmmV, xmm2/m128, imm8","VPCLMULQDQ imm8, xmm2/m128, xmmV, xmm1","vpclmulqdq imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 44 /r ib","V","V","PCLMULQDQ+AVX","","w,r,r,r","",""
"VPCMPEQB xmm1, xmmV, xmm2/m128","VPCMPEQB xmm2/m128, xmmV, xmm1","vpcmpeqb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 74 /r","V","V","AVX","","w,r,r","",""
"VPCMPEQB ymm1, ymmV, ymm2/m256","VPCMPEQB ymm2/m256, ymmV, ymm1","vpcmpeqb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 74 /r","V","V","AVX2","","w,r,r","",""
"VPCMPEQD xmm1, xmmV, xmm2/m128","VPCMPEQD xmm2/m128, xmmV, xmm1","vpcmpeqd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 76 /r","V","V","AVX","","w,r,r","",""
"VPCMPEQD ymm1, ymmV, ymm2/m256","VPCMPEQD ymm2/m256, ymmV, ymm1","vpcmpeqd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 76 /r","V","V","AVX2","","w,r,r","",""
"VPCMPEQQ xmm1, xmmV, xmm2/m128","VPCMPEQQ xmm2/m128, xmmV, xmm1","vpcmpeqq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 29 /r","V","V","AVX","","w,r,r","",""
"VPCMPEQQ ymm1, ymmV, ymm2/m256","VPCMPEQQ ymm2/m256, ymmV, ymm1","vpcmpeqq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 29 /r","V","V","AVX2","","w,r,r","",""
"VPCMPEQW xmm1, xmmV, xmm2/m128","VPCMPEQW xmm2/m128, xmmV, xmm1","vpcmpeqw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 75 /r","V","V","AVX","","w,r,r","",""
"VPCMPEQW ymm1, ymmV, ymm2/m256","VPCMPEQW ymm2/m256, ymmV, ymm1","vpcmpeqw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 75 /r","V","V","AVX2","","w,r,r","",""
"VPCMPESTRI xmm1, xmm2/m128, imm8","VPCMPESTRI imm8, xmm2/m128, xmm1","vpcmpestri imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 61 /r ib","V","V","AVX","","r,r,r","",""
"VPCMPESTRM xmm1, xmm2/m128, imm8","VPCMPESTRM imm8, xmm2/m128, xmm1","vpcmpestrm imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 60 /r ib","V","V","AVX","","r,r,r","",""
"VPCMPGTB xmm1, xmmV, xmm2/m128","VPCMPGTB xmm2/m128, xmmV, xmm1","vpcmpgtb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 64 /r","V","V","AVX","","w,r,r","",""
"VPCMPGTB ymm1, ymmV, ymm2/m256","VPCMPGTB ymm2/m256, ymmV, ymm1","vpcmpgtb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 64 /r","V","V","AVX2","","w,r,r","",""
"VPCMPGTD xmm1, xmmV, xmm2/m128","VPCMPGTD xmm2/m128, xmmV, xmm1","vpcmpgtd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 66 /r","V","V","AVX","","w,r,r","",""
"VPCMPGTD ymm1, ymmV, ymm2/m256","VPCMPGTD ymm2/m256, ymmV, ymm1","vpcmpgtd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 66 /r","V","V","AVX2","","w,r,r","",""
"VPCMPGTQ xmm1, xmmV, xmm2/m128","VPCMPGTQ xmm2/m128, xmmV, xmm1","vpcmpgtq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 37 /r","V","V","AVX","","w,r,r","",""
"VPCMPGTQ ymm1, ymmV, ymm2/m256","VPCMPGTQ ymm2/m256, ymmV, ymm1","vpcmpgtq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 37 /r","V","V","AVX2","","w,r,r","",""
"VPCMPGTW xmm1, xmmV, xmm2/m128","VPCMPGTW xmm2/m128, xmmV, xmm1","vpcmpgtw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 65 /r","V","V","AVX","","w,r,r","",""
"VPCMPGTW ymm1, ymmV, ymm2/m256","VPCMPGTW ymm2/m256, ymmV, ymm1","vpcmpgtw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 65 /r","V","V","AVX2","","w,r,r","",""
"VPCMPISTRI xmm1, xmm2/m128, imm8","VPCMPISTRI imm8, xmm2/m128, xmm1","vpcmpistri imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 63 /r ib","V","V","AVX","","r,r,r","",""
"VPCMPISTRM xmm1, xmm2/m128, imm8","VPCMPISTRM imm8, xmm2/m128, xmm1","vpcmpistrm imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 62 /r ib","V","V","AVX","","r,r,r","",""
"VPERM2F128 ymm1, ymmV, ymm2/m256, imm8","VPERM2F128 imm8, ymm2/m256, ymmV, ymm1","vperm2f128 imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 06 /r ib","V","V","AVX","","w,r,r,r","",""
"VPERM2I128 ymm1, ymmV, ymm2/m256, imm8","VPERM2I128 imm8, ymm2/m256, ymmV, ymm1","vperm2i128 imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 46 /r ib","V","V","AVX2","","w,r,r,r","",""
"VPERMD ymm1, ymmV, ymm2/m256","VPERMD ymm2/m256, ymmV, ymm1","vpermd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 36 /r","V","V","AVX2","","w,r,r","",""
"VPERMILPD xmm1, xmm2/m128, imm8","VPERMILPD imm8, xmm2/m128, xmm1","vpermilpd imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.W0 05 /r ib","V","V","AVX","","w,r,r","",""
"VPERMILPD xmm1, xmmV, xmm2/m128","VPERMILPD xmm2/m128, xmmV, xmm1","vpermilpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 0D /r","V","V","AVX","","w,r,r","",""
"VPERMILPD ymm1, ymm2/m256, imm8","VPERMILPD imm8, ymm2/m256, ymm1","vpermilpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W0 05 /r ib","V","V","AVX","","w,r,r","",""
"VPERMILPD ymm1, ymmV, ymm2/m256","VPERMILPD ymm2/m256, ymmV, ymm1","vpermilpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 0D /r","V","V","AVX","","w,r,r","",""
"VPERMILPS xmm1, xmm2/m128, imm8","VPERMILPS imm8, xmm2/m128, xmm1","vpermilps imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.W0 04 /r ib","V","V","AVX","","w,r,r","",""
"VPERMILPS xmm1, xmmV, xmm2/m128","VPERMILPS xmm2/m128, xmmV, xmm1","vpermilps xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 0C /r","V","V","AVX","","w,r,r","",""
"VPERMILPS ymm1, ymm2/m256, imm8","VPERMILPS imm8, ymm2/m256, ymm1","vpermilps imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W0 04 /r ib","V","V","AVX","","w,r,r","",""
"VPERMILPS ymm1, ymmV, ymm2/m256","VPERMILPS ymm2/m256, ymmV, ymm1","vpermilps ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 0C /r","V","V","AVX","","w,r,r","",""
"VPERMPD ymm1, ymm2/m256, imm8","VPERMPD imm8, ymm2/m256, ymm1","vpermpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W1 01 /r ib","V","V","AVX2","","w,r,r","",""
"VPERMPS ymm1, ymmV, ymm2/m256","VPERMPS ymm2/m256, ymmV, ymm1","vpermps ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 16 /r","V","V","AVX2","","w,r,r","",""
"VPERMQ ymm1, ymm2/m256, imm8","VPERMQ imm8, ymm2/m256, ymm1","vpermq imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W1 00 /r ib","V","V","AVX2","","w,r,r","",""
"VPEXTRB r32/m8, xmm1, imm8","VPEXTRB imm8, xmm1, r32/m8","vpextrb imm8, xmm1, r32/m8","VEX.128.66.0F3A.W0 14 /r ib","V","V","AVX","","w,r,r","",""
"VPEXTRD r/m32, xmm1, imm8","VPEXTRD imm8, xmm1, r/m32","vpextrd imm8, xmm1, r/m32","VEX.128.66.0F3A.W0 16 /r ib","V","V","AVX","","w,r,r","",""
"VPEXTRQ r/m64, xmm1, imm8","VPEXTRQ imm8, xmm1, r/m64","vpextrq imm8, xmm1, r/m64","VEX.128.66.0F3A.W1 16 /r ib","I","V","AVX","","w,r,r","",""
"VPEXTRW r32, xmm2, imm8","VPEXTRW imm8, xmm2, r32","vpextrw imm8, xmm2, r32","VEX.128.66.0F.W0 C5 /r ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPEXTRW r32/m16, xmm1, imm8","VPEXTRW imm8, xmm1, r32/m16","vpextrw imm8, xmm1, r32/m16","VEX.128.66.0F3A.W0 15 /r ib","V","V","AVX","","w,r,r","",""
"VPHADDD xmm1, xmmV, xmm2/m128","VPHADDD xmm2/m128, xmmV, xmm1","vphaddd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 02 /r","V","V","AVX","","w,r,r","",""
"VPHADDD ymm1, ymmV, ymm2/m256","VPHADDD ymm2/m256, ymmV, ymm1","vphaddd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 02 /r","V","V","AVX2","","w,r,r","",""
"VPHADDSW xmm1, xmmV, xmm2/m128","VPHADDSW xmm2/m128, xmmV, xmm1","vphaddsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 03 /r","V","V","AVX","","w,r,r","",""
"VPHADDSW ymm1, ymmV, ymm2/m256","VPHADDSW ymm2/m256, ymmV, ymm1","vphaddsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 03 /r","V","V","AVX2","","w,r,r","",""
"VPHADDW xmm1, xmmV, xmm2/m128","VPHADDW xmm2/m128, xmmV, xmm1","vphaddw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 01 /r","V","V","AVX","","w,r,r","",""
"VPHADDW ymm1, ymmV, ymm2/m256","VPHADDW ymm2/m256, ymmV, ymm1","vphaddw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 01 /r","V","V","AVX2","","w,r,r","",""
"VPHMINPOSUW xmm1, xmm2/m128","VPHMINPOSUW xmm2/m128, xmm1","vphminposuw xmm2/m128, xmm1","VEX.128.66.0F38.WIG 41 /r","V","V","AVX","","w,r","",""
"VPHSUBD xmm1, xmmV, xmm2/m128","VPHSUBD xmm2/m128, xmmV, xmm1","vphsubd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 06 /r","V","V","AVX","","rw,r,r","",""
"VPHSUBD ymm1, ymmV, ymm2/m256","VPHSUBD ymm2/m256, ymmV, ymm1","vphsubd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 06 /r","V","V","AVX2","","rw,r,r","",""
"VPHSUBSW xmm1, xmmV, xmm2/m128","VPHSUBSW xmm2/m128, xmmV, xmm1","vphsubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 07 /r","V","V","AVX","","rw,r,r","",""
"VPHSUBSW ymm1, ymmV, ymm2/m256","VPHSUBSW ymm2/m256, ymmV, ymm1","vphsubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 07 /r","V","V","AVX2","","rw,r,r","",""
"VPHSUBW xmm1, xmmV, xmm2/m128","VPHSUBW xmm2/m128, xmmV, xmm1","vphsubw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 05 /r","V","V","AVX","","rw,r,r","",""
"VPHSUBW ymm1, ymmV, ymm2/m256","VPHSUBW ymm2/m256, ymmV, ymm1","vphsubw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 05 /r","V","V","AVX2","","rw,r,r","",""
"VPINSRB xmm1, xmmV, r32/m8, imm8","VPINSRB imm8, r32/m8, xmmV, xmm1","vpinsrb imm8, r32/m8, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 20 /r ib","V","V","AVX","","w,r,r,r","",""
"VPINSRD xmm1, xmmV, r/m32, imm8","VPINSRD imm8, r/m32, xmmV, xmm1","vpinsrd imm8, r/m32, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 22 /r ib","V","V","AVX","","w,r,r,r","",""
"VPINSRQ xmm1, xmmV, r/m64, imm8","VPINSRQ imm8, r/m64, xmmV, xmm1","vpinsrq imm8, r/m64, xmmV, xmm1","VEX.NDS.128.66.0F3A.W1 22 /r ib","I","V","AVX","","w,r,r,r","",""
"VPINSRW xmm1, xmmV, r32/m16, imm8","VPINSRW imm8, r32/m16, xmmV, xmm1","vpinsrw imm8, r32/m16, xmmV, xmm1","VEX.NDS.128.66.0F.W0 C4 /r ib","V","V","AVX","","w,r,r,r","",""
"VPMADDUBSW xmm1, xmmV, xmm2/m128","VPMADDUBSW xmm2/m128, xmmV, xmm1","vpmaddubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 04 /r","V","V","AVX","","w,r,r","",""
"VPMADDUBSW ymm1, ymmV, ymm2/m256","VPMADDUBSW ymm2/m256, ymmV, ymm1","vpmaddubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 04 /r","V","V","AVX2","","w,r,r","",""
"VPMADDWD xmm1, xmmV, xmm2/m128","VPMADDWD xmm2/m128, xmmV, xmm1","vpmaddwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F5 /r","V","V","AVX","","w,r,r","",""
"VPMADDWD ymm1, ymmV, ymm2/m256","VPMADDWD ymm2/m256, ymmV, ymm1","vpmaddwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F5 /r","V","V","AVX2","","w,r,r","",""
"VPMASKMOVD m128, xmmV, xmm1","VPMASKMOVD xmm1, xmmV, m128","vpmaskmovd xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVD m256, ymmV, ymm1","VPMASKMOVD ymm1, ymmV, m256","vpmaskmovd ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVD xmm1, xmmV, m128","VPMASKMOVD m128, xmmV, xmm1","vpmaskmovd m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVD ymm1, ymmV, m256","VPMASKMOVD m256, ymmV, ymm1","vpmaskmovd m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVQ m128, xmmV, xmm1","VPMASKMOVQ xmm1, xmmV, m128","vpmaskmovq xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVQ m256, ymmV, ymm1","VPMASKMOVQ ymm1, ymmV, m256","vpmaskmovq ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVQ xmm1, xmmV, m128","VPMASKMOVQ m128, xmmV, xmm1","vpmaskmovq m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMASKMOVQ ymm1, ymmV, m256","VPMASKMOVQ m256, ymmV, ymm1","vpmaskmovq m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
"VPMAXSB xmm1, xmmV, xmm2/m128","VPMAXSB xmm2/m128, xmmV, xmm1","vpmaxsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3C /r","V","V","AVX","","w,r,r","",""
"VPMAXSB ymm1, ymmV, ymm2/m256","VPMAXSB ymm2/m256, ymmV, ymm1","vpmaxsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3C /r","V","V","AVX2","","w,r,r","",""
"VPMAXSD xmm1, xmmV, xmm2/m128","VPMAXSD xmm2/m128, xmmV, xmm1","vpmaxsd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3D /r","V","V","AVX","","w,r,r","",""
"VPMAXSD ymm1, ymmV, ymm2/m256","VPMAXSD ymm2/m256, ymmV, ymm1","vpmaxsd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3D /r","V","V","AVX2","","w,r,r","",""
"VPMAXSW xmm1, xmmV, xmm2/m128","VPMAXSW xmm2/m128, xmmV, xmm1","vpmaxsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EE /r","V","V","AVX","","w,r,r","",""
"VPMAXSW ymm1, ymmV, ymm2/m256","VPMAXSW ymm2/m256, ymmV, ymm1","vpmaxsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EE /r","V","V","AVX2","","w,r,r","",""
"VPMAXUB xmm1, xmmV, xmm2/m128","VPMAXUB xmm2/m128, xmmV, xmm1","vpmaxub xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DE /r","V","V","AVX","","w,r,r","",""
"VPMAXUB ymm1, ymmV, ymm2/m256","VPMAXUB ymm2/m256, ymmV, ymm1","vpmaxub ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DE /r","V","V","AVX2","","w,r,r","",""
"VPMAXUD xmm1, xmmV, xmm2/m128","VPMAXUD xmm2/m128, xmmV, xmm1","vpmaxud xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3F /r","V","V","AVX","","w,r,r","",""
"VPMAXUD ymm1, ymmV, ymm2/m256","VPMAXUD ymm2/m256, ymmV, ymm1","vpmaxud ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3F /r","V","V","AVX2","","w,r,r","",""
"VPMAXUW xmm1, xmmV, xmm2/m128","VPMAXUW xmm2/m128, xmmV, xmm1","vpmaxuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3E /r","V","V","AVX","","w,r,r","",""
"VPMAXUW ymm1, ymmV, ymm2/m256","VPMAXUW ymm2/m256, ymmV, ymm1","vpmaxuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3E /r","V","V","AVX2","","w,r,r","",""
"VPMINSB xmm1, xmmV, xmm2/m128","VPMINSB xmm2/m128, xmmV, xmm1","vpminsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 38 /r","V","V","AVX","","w,r,r","",""
"VPMINSB ymm1, ymmV, ymm2/m256","VPMINSB ymm2/m256, ymmV, ymm1","vpminsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 38 /r","V","V","AVX2","","w,r,r","",""
"VPMINSD xmm1, xmmV, xmm2/m128","VPMINSD xmm2/m128, xmmV, xmm1","vpminsd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 39 /r","V","V","AVX","","w,r,r","",""
"VPMINSD ymm1, ymmV, ymm2/m256","VPMINSD ymm2/m256, ymmV, ymm1","vpminsd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 39 /r","V","V","AVX2","","w,r,r","",""
"VPMINSW xmm1, xmmV, xmm2/m128","VPMINSW xmm2/m128, xmmV, xmm1","vpminsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EA /r","V","V","AVX","","w,r,r","",""
"VPMINSW ymm1, ymmV, ymm2/m256","VPMINSW ymm2/m256, ymmV, ymm1","vpminsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EA /r","V","V","AVX2","","w,r,r","",""
"VPMINUB xmm1, xmmV, xmm2/m128","VPMINUB xmm2/m128, xmmV, xmm1","vpminub xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DA /r","V","V","AVX","","w,r,r","",""
"VPMINUB ymm1, ymmV, ymm2/m256","VPMINUB ymm2/m256, ymmV, ymm1","vpminub ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DA /r","V","V","AVX2","","w,r,r","",""
"VPMINUD xmm1, xmmV, xmm2/m128","VPMINUD xmm2/m128, xmmV, xmm1","vpminud xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3B /r","V","V","AVX","","w,r,r","",""
"VPMINUD ymm1, ymmV, ymm2/m256","VPMINUD ymm2/m256, ymmV, ymm1","vpminud ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3B /r","V","V","AVX2","","w,r,r","",""
"VPMINUW xmm1, xmmV, xmm2/m128","VPMINUW xmm2/m128, xmmV, xmm1","vpminuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3A /r","V","V","AVX","","w,r,r","",""
"VPMINUW ymm1, ymmV, ymm2/m256","VPMINUW ymm2/m256, ymmV, ymm1","vpminuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3A /r","V","V","AVX2","","w,r,r","",""
"VPMOVMSKB r32, xmm2","VPMOVMSKB xmm2, r32","vpmovmskb xmm2, r32","VEX.128.66.0F.WIG D7 /r","V","V","AVX","modrm_regonly","w,r","",""
"VPMOVMSKB r32, ymm2","VPMOVMSKB ymm2, r32","vpmovmskb ymm2, r32","VEX.256.66.0F.WIG D7 /r","V","V","AVX2","modrm_regonly","w,r","",""
"VPMOVSXBD xmm1, xmm2/m32","VPMOVSXBD xmm2/m32, xmm1","vpmovsxbd xmm2/m32, xmm1","VEX.128.66.0F38.WIG 21 /r","V","V","AVX","","w,r","",""
"VPMOVSXBD ymm1, xmm2/m64","VPMOVSXBD xmm2/m64, ymm1","vpmovsxbd xmm2/m64, ymm1","VEX.256.66.0F38.WIG 21 /r","V","V","AVX2","","w,r","",""
"VPMOVSXBQ xmm1, xmm2/m16","VPMOVSXBQ xmm2/m16, xmm1","vpmovsxbq xmm2/m16, xmm1","VEX.128.66.0F38.WIG 22 /r","V","V","AVX","","w,r","",""
"VPMOVSXBQ ymm1, xmm2/m32","VPMOVSXBQ xmm2/m32, ymm1","vpmovsxbq xmm2/m32, ymm1","VEX.256.66.0F38.WIG 22 /r","V","V","AVX2","","w,r","",""
"VPMOVSXBW xmm1, xmm2/m64","VPMOVSXBW xmm2/m64, xmm1","vpmovsxbw xmm2/m64, xmm1","VEX.128.66.0F38.WIG 20 /r","V","V","AVX","","w,r","",""
"VPMOVSXBW ymm1, xmm2/m128","VPMOVSXBW xmm2/m128, ymm1","vpmovsxbw xmm2/m128, ymm1","VEX.256.66.0F38.WIG 20 /r","V","V","AVX2","","w,r","",""
"VPMOVSXDQ xmm1, xmm2/m64","VPMOVSXDQ xmm2/m64, xmm1","vpmovsxdq xmm2/m64, xmm1","VEX.128.66.0F38.WIG 25 /r","V","V","AVX","","w,r","",""
"VPMOVSXDQ ymm1, xmm2/m128","VPMOVSXDQ xmm2/m128, ymm1","vpmovsxdq xmm2/m128, ymm1","VEX.256.66.0F38.WIG 25 /r","V","V","AVX2","","w,r","",""
"VPMOVSXWD xmm1, xmm2/m64","VPMOVSXWD xmm2/m64, xmm1","vpmovsxwd xmm2/m64, xmm1","VEX.128.66.0F38.WIG 23 /r","V","V","AVX","","w,r","",""
"VPMOVSXWD ymm1, xmm2/m128","VPMOVSXWD xmm2/m128, ymm1","vpmovsxwd xmm2/m128, ymm1","VEX.256.66.0F38.WIG 23 /r","V","V","AVX2","","w,r","",""
"VPMOVSXWQ xmm1, xmm2/m32","VPMOVSXWQ xmm2/m32, xmm1","vpmovsxwq xmm2/m32, xmm1","VEX.128.66.0F38.WIG 24 /r","V","V","AVX","","w,r","",""
"VPMOVSXWQ ymm1, xmm2/m64","VPMOVSXWQ xmm2/m64, ymm1","vpmovsxwq xmm2/m64, ymm1","VEX.256.66.0F38.WIG 24 /r","V","V","AVX2","","w,r","",""
"VPMOVZXBD xmm1, xmm2/m32","VPMOVZXBD xmm2/m32, xmm1","vpmovzxbd xmm2/m32, xmm1","VEX.128.66.0F38.WIG 31 /r","V","V","AVX","","w,r","",""
"VPMOVZXBD ymm1, xmm2/m64","VPMOVZXBD xmm2/m64, ymm1","vpmovzxbd xmm2/m64, ymm1","VEX.256.66.0F38.WIG 31 /r","V","V","AVX2","","w,r","",""
"VPMOVZXBQ xmm1, xmm2/m16","VPMOVZXBQ xmm2/m16, xmm1","vpmovzxbq xmm2/m16, xmm1","VEX.128.66.0F38.WIG 32 /r","V","V","AVX","","w,r","",""
"VPMOVZXBQ ymm1, xmm2/m32","VPMOVZXBQ xmm2/m32, ymm1","vpmovzxbq xmm2/m32, ymm1","VEX.256.66.0F38.WIG 32 /r","V","V","AVX2","","w,r","",""
"VPMOVZXBW xmm1, xmm2/m64","VPMOVZXBW xmm2/m64, xmm1","vpmovzxbw xmm2/m64, xmm1","VEX.128.66.0F38.WIG 30 /r","V","V","AVX","","w,r","",""
"VPMOVZXBW ymm1, xmm2/m128","VPMOVZXBW xmm2/m128, ymm1","vpmovzxbw xmm2/m128, ymm1","VEX.256.66.0F38.WIG 30 /r","V","V","AVX2","","w,r","",""
"VPMOVZXDQ xmm1, xmm2/m64","VPMOVZXDQ xmm2/m64, xmm1","vpmovzxdq xmm2/m64, xmm1","VEX.128.66.0F38.WIG 35 /r","V","V","AVX","","w,r","",""
"VPMOVZXDQ ymm1, xmm2/m128","VPMOVZXDQ xmm2/m128, ymm1","vpmovzxdq xmm2/m128, ymm1","VEX.256.66.0F38.WIG 35 /r","V","V","AVX2","","w,r","",""
"VPMOVZXWD xmm1, xmm2/m64","VPMOVZXWD xmm2/m64, xmm1","vpmovzxwd xmm2/m64, xmm1","VEX.128.66.0F38.WIG 33 /r","V","V","AVX","","w,r","",""
"VPMOVZXWD ymm1, xmm2/m128","VPMOVZXWD xmm2/m128, ymm1","vpmovzxwd xmm2/m128, ymm1","VEX.256.66.0F38.WIG 33 /r","V","V","AVX2","","w,r","",""
"VPMOVZXWQ xmm1, xmm2/m32","VPMOVZXWQ xmm2/m32, xmm1","vpmovzxwq xmm2/m32, xmm1","VEX.128.66.0F38.WIG 34 /r","V","V","AVX","","w,r","",""
"VPMOVZXWQ ymm1, xmm2/m64","VPMOVZXWQ xmm2/m64, ymm1","vpmovzxwq xmm2/m64, ymm1","VEX.256.66.0F38.WIG 34 /r","V","V","AVX2","","w,r","",""
"VPMULDQ xmm1, xmmV, xmm2/m128","VPMULDQ xmm2/m128, xmmV, xmm1","vpmuldq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 28 /r","V","V","AVX","","w,r,r","",""
"VPMULDQ ymm1, ymmV, ymm2/m256","VPMULDQ ymm2/m256, ymmV, ymm1","vpmuldq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 28 /r","V","V","AVX2","","w,r,r","",""
"VPMULHRSW xmm1, xmmV, xmm2/m128","VPMULHRSW xmm2/m128, xmmV, xmm1","vpmulhrsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 0B /r","V","V","AVX","","w,r,r","",""
"VPMULHRSW ymm1, ymmV, ymm2/m256","VPMULHRSW ymm2/m256, ymmV, ymm1","vpmulhrsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 0B /r","V","V","AVX2","","w,r,r","",""
"VPMULHUW xmm1, xmmV, xmm2/m128","VPMULHUW xmm2/m128, xmmV, xmm1","vpmulhuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E4 /r","V","V","AVX","","w,r,r","",""
"VPMULHUW ymm1, ymmV, ymm2/m256","VPMULHUW ymm2/m256, ymmV, ymm1","vpmulhuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E4 /r","V","V","AVX2","","w,r,r","",""
"VPMULHW xmm1, xmmV, xmm2/m128","VPMULHW xmm2/m128, xmmV, xmm1","vpmulhw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E5 /r","V","V","AVX","","w,r,r","",""
"VPMULHW ymm1, ymmV, ymm2/m256","VPMULHW ymm2/m256, ymmV, ymm1","vpmulhw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E5 /r","V","V","AVX2","","w,r,r","",""
"VPMULLD xmm1, xmmV, xmm2/m128","VPMULLD xmm2/m128, xmmV, xmm1","vpmulld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 40 /r","V","V","AVX","","w,r,r","",""
"VPMULLD ymm1, ymmV, ymm2/m256","VPMULLD ymm2/m256, ymmV, ymm1","vpmulld ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 40 /r","V","V","AVX2","","w,r,r","",""
"VPMULLW xmm1, xmmV, xmm2/m128","VPMULLW xmm2/m128, xmmV, xmm1","vpmullw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D5 /r","V","V","AVX","","w,r,r","",""
"VPMULLW ymm1, ymmV, ymm2/m256","VPMULLW ymm2/m256, ymmV, ymm1","vpmullw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D5 /r","V","V","AVX2","","w,r,r","",""
"VPMULUDQ xmm1, xmmV, xmm2/m128","VPMULUDQ xmm2/m128, xmmV, xmm1","vpmuludq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F4 /r","V","V","AVX","","w,r,r","",""
"VPMULUDQ ymm1, ymmV, ymm2/m256","VPMULUDQ ymm2/m256, ymmV, ymm1","vpmuludq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F4 /r","V","V","AVX2","","w,r,r","",""
"VPOR xmm1, xmmV, xmm2/m128","VPOR xmm2/m128, xmmV, xmm1","vpor xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EB /r","V","V","AVX","","w,r,r","",""
"VPOR ymm1, ymmV, ymm2/m256","VPOR ymm2/m256, ymmV, ymm1","vpor ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EB /r","V","V","AVX2","","w,r,r","",""
"VPSADBW xmm1, xmmV, xmm2/m128","VPSADBW xmm2/m128, xmmV, xmm1","vpsadbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F6 /r","V","V","AVX","","w,r,r","",""
"VPSADBW ymm1, ymmV, ymm2/m256","VPSADBW ymm2/m256, ymmV, ymm1","vpsadbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F6 /r","V","V","AVX2","","w,r,r","",""
"VPSHUFB xmm1, xmmV, xmm2/m128","VPSHUFB xmm2/m128, xmmV, xmm1","vpshufb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 00 /r","V","V","AVX","","w,r,r","",""
"VPSHUFB ymm1, ymmV, ymm2/m256","VPSHUFB ymm2/m256, ymmV, ymm1","vpshufb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 00 /r","V","V","AVX2","","w,r,r","",""
"VPSHUFD xmm1, xmm2/m128, imm8","VPSHUFD imm8, xmm2/m128, xmm1","vpshufd imm8, xmm2/m128, xmm1","VEX.128.66.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
"VPSHUFD ymm1, ymm2/m256, imm8","VPSHUFD imm8, ymm2/m256, ymm1","vpshufd imm8, ymm2/m256, ymm1","VEX.256.66.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
"VPSHUFHW xmm1, xmm2/m128, imm8","VPSHUFHW imm8, xmm2/m128, xmm1","vpshufhw imm8, xmm2/m128, xmm1","VEX.128.F3.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
"VPSHUFHW ymm1, ymm2/m256, imm8","VPSHUFHW imm8, ymm2/m256, ymm1","vpshufhw imm8, ymm2/m256, ymm1","VEX.256.F3.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
"VPSHUFLW xmm1, xmm2/m128, imm8","VPSHUFLW imm8, xmm2/m128, xmm1","vpshuflw imm8, xmm2/m128, xmm1","VEX.128.F2.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
"VPSHUFLW ymm1, ymm2/m256, imm8","VPSHUFLW imm8, ymm2/m256, ymm1","vpshuflw imm8, ymm2/m256, ymm1","VEX.256.F2.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
"VPSIGNB xmm1, xmmV, xmm2/m128","VPSIGNB xmm2/m128, xmmV, xmm1","vpsignb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 08 /r","V","V","AVX","","w,r,r","",""
"VPSIGNB ymm1, ymmV, ymm2/m256","VPSIGNB ymm2/m256, ymmV, ymm1","vpsignb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 08 /r","V","V","AVX2","","w,r,r","",""
"VPSIGND xmm1, xmmV, xmm2/m128","VPSIGND xmm2/m128, xmmV, xmm1","vpsignd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 0A /r","V","V","AVX","","w,r,r","",""
"VPSIGND ymm1, ymmV, ymm2/m256","VPSIGND ymm2/m256, ymmV, ymm1","vpsignd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 0A /r","V","V","AVX2","","w,r,r","",""
"VPSIGNW xmm1, xmmV, xmm2/m128","VPSIGNW xmm2/m128, xmmV, xmm1","vpsignw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 09 /r","V","V","AVX","","w,r,r","",""
"VPSIGNW ymm1, ymmV, ymm2/m256","VPSIGNW ymm2/m256, ymmV, ymm1","vpsignw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 09 /r","V","V","AVX2","","w,r,r","",""
"VPSLLD xmm1, xmmV, xmm2/m128","VPSLLD xmm2/m128, xmmV, xmm1","vpslld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F2 /r","V","V","AVX","","w,r,r","",""
"VPSLLD xmmV, xmm2, imm8","VPSLLD imm8, xmm2, xmmV","vpslld imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSLLDQ xmmV, xmm2, imm8","VPSLLDQ imm8, xmm2, xmmV","vpslldq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /7 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSLLDQ ymmV, ymm2, imm8","VPSLLDQ imm8, ymm2, ymmV","vpslldq imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 73 /7 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSLLQ xmm1, xmmV, xmm2/m128","VPSLLQ xmm2/m128, xmmV, xmm1","vpsllq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F3 /r","V","V","AVX","","w,r,r","",""
"VPSLLQ xmmV, xmm2, imm8","VPSLLQ imm8, xmm2, xmmV","vpsllq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSLLVD xmm1, xmmV, xmm2/m128","VPSLLVD xmm2/m128, xmmV, xmm1","vpsllvd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 47 /r","V","V","AVX2","","w,r,r","",""
"VPSLLVD ymm1, ymmV, ymm2/m256","VPSLLVD ymm2/m256, ymmV, ymm1","vpsllvd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 47 /r","V","V","AVX2","","w,r,r","",""
"VPSLLVQ xmm1, xmmV, xmm2/m128","VPSLLVQ xmm2/m128, xmmV, xmm1","vpsllvq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 47 /r","V","V","AVX2","","w,r,r","",""
"VPSLLVQ ymm1, ymmV, ymm2/m256","VPSLLVQ ymm2/m256, ymmV, ymm1","vpsllvq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 47 /r","V","V","AVX2","","w,r,r","",""
"VPSLLW xmm1, xmmV, xmm2/m128","VPSLLW xmm2/m128, xmmV, xmm1","vpsllw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F1 /r","V","V","AVX","","w,r,r","",""
"VPSLLW xmmV, xmm2, imm8","VPSLLW imm8, xmm2, xmmV","vpsllw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSLLW ymm1, ymmV, xmm2/m128","VPSLLW xmm2/m128, ymmV, ymm1","vpsllw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F1 /r","V","V","AVX2","","w,r,r","",""
"VPSLLW ymmV, ymm2, imm8","VPSLLW imm8, ymm2, ymmV","vpsllw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /6 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSRAD xmm1, xmmV, xmm2/m128","VPSRAD xmm2/m128, xmmV, xmm1","vpsrad xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E2 /r","V","V","AVX","","w,r,r","",""
"VPSRAD xmmV, xmm2, imm8","VPSRAD imm8, xmm2, xmmV","vpsrad imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /4 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRAD ymm1, ymmV, xmm2/m128","VPSRAD xmm2/m128, ymmV, ymm1","vpsrad xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E2 /r","V","V","AVX2","","w,r,r","",""
"VPSRAD ymmV, ymm2, imm8","VPSRAD imm8, ymm2, ymmV","vpsrad imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 72 /4 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSRAVD xmm1, xmmV, xmm2/m128","VPSRAVD xmm2/m128, xmmV, xmm1","vpsravd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 46 /r","V","V","AVX2","","w,r,r","",""
"VPSRAVD ymm1, ymmV, ymm2/m256","VPSRAVD ymm2/m256, ymmV, ymm1","vpsravd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 46 /r","V","V","AVX2","","w,r,r","",""
"VPSRAW xmm1, xmmV, xmm2/m128","VPSRAW xmm2/m128, xmmV, xmm1","vpsraw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E1 /r","V","V","AVX","","w,r,r","",""
"VPSRAW xmmV, xmm2, imm8","VPSRAW imm8, xmm2, xmmV","vpsraw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /4 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRAW ymm1, ymmV, xmm2/m128","VPSRAW xmm2/m128, ymmV, ymm1","vpsraw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E1 /r","V","V","AVX2","","w,r,r","",""
"VPSRAW ymmV, ymm2, imm8","VPSRAW imm8, ymm2, ymmV","vpsraw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /4 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSRLD xmm1, xmmV, xmm2/m128","VPSRLD xmm2/m128, xmmV, xmm1","vpsrld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D2 /r","V","V","AVX","","w,r,r","",""
"VPSRLD xmmV, xmm2, imm8","VPSRLD imm8, xmm2, xmmV","vpsrld imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRLDQ xmmV, xmm2, imm8","VPSRLDQ imm8, xmm2, xmmV","vpsrldq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /3 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRLDQ ymmV, ymm2, imm8","VPSRLDQ imm8, ymm2, ymmV","vpsrldq imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 73 /3 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSRLQ xmm1, xmmV, xmm2/m128","VPSRLQ xmm2/m128, xmmV, xmm1","vpsrlq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D3 /r","V","V","AVX","","w,r,r","",""
"VPSRLQ xmmV, xmm2, imm8","VPSRLQ imm8, xmm2, xmmV","vpsrlq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRLVD xmm1, xmmV, xmm2/m128","VPSRLVD xmm2/m128, xmmV, xmm1","vpsrlvd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 45 /r","V","V","AVX2","","w,r,r","",""
"VPSRLVD ymm1, ymmV, ymm2/m256","VPSRLVD ymm2/m256, ymmV, ymm1","vpsrlvd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 45 /r","V","V","AVX2","","w,r,r","",""
"VPSRLVQ xmm1, xmmV, xmm2/m128","VPSRLVQ xmm2/m128, xmmV, xmm1","vpsrlvq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 45 /r","V","V","AVX2","","w,r,r","",""
"VPSRLVQ ymm1, ymmV, ymm2/m256","VPSRLVQ ymm2/m256, ymmV, ymm1","vpsrlvq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 45 /r","V","V","AVX2","","w,r,r","",""
"VPSRLW xmm1, xmmV, xmm2/m128","VPSRLW xmm2/m128, xmmV, xmm1","vpsrlw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D1 /r","V","V","AVX","","w,r,r","",""
"VPSRLW xmmV, xmm2, imm8","VPSRLW imm8, xmm2, xmmV","vpsrlw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
"VPSRLW ymm1, ymmV, xmm2/m128","VPSRLW xmm2/m128, ymmV, ymm1","vpsrlw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D1 /r","V","V","AVX2","","w,r,r","",""
"VPSRLW ymmV, ymm2, imm8","VPSRLW imm8, ymm2, ymmV","vpsrlw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /2 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
"VPSUBB xmm1, xmmV, xmm2/m128","VPSUBB xmm2/m128, xmmV, xmm1","vpsubb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F8 /r","V","V","AVX","","w,r,r","",""
"VPSUBB ymm1, ymmV, ymm2/m256","VPSUBB ymm2/m256, ymmV, ymm1","vpsubb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F8 /r","V","V","AVX2","","w,r,r","",""
"VPSUBD xmm1, xmmV, xmm2/m128","VPSUBD xmm2/m128, xmmV, xmm1","vpsubd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FA /r","V","V","AVX","","w,r,r","",""
"VPSUBD ymm1, ymmV, ymm2/m256","VPSUBD ymm2/m256, ymmV, ymm1","vpsubd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FA /r","V","V","AVX2","","w,r,r","",""
"VPSUBQ xmm1, xmmV, xmm2/m128","VPSUBQ xmm2/m128, xmmV, xmm1","vpsubq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FB /r","V","V","AVX","","w,r,r","",""
"VPSUBQ ymm1, ymmV, ymm2/m256","VPSUBQ ymm2/m256, ymmV, ymm1","vpsubq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FB /r","V","V","AVX2","","w,r,r","",""
"VPSUBSB xmm1, xmmV, xmm2/m128","VPSUBSB xmm2/m128, xmmV, xmm1","vpsubsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E8 /r","V","V","AVX","","w,r,r","",""
"VPSUBSB ymm1, ymmV, ymm2/m256","VPSUBSB ymm2/m256, ymmV, ymm1","vpsubsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E8 /r","V","V","AVX2","","w,r,r","",""
"VPSUBSW xmm1, xmmV, xmm2/m128","VPSUBSW xmm2/m128, xmmV, xmm1","vpsubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E9 /r","V","V","AVX","","w,r,r","",""
"VPSUBSW ymm1, ymmV, ymm2/m256","VPSUBSW ymm2/m256, ymmV, ymm1","vpsubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E9 /r","V","V","AVX2","","w,r,r","",""
"VPSUBUSB xmm1, xmmV, xmm2/m128","VPSUBUSB xmm2/m128, xmmV, xmm1","vpsubusb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D8 /r","V","V","AVX","","w,r,r","",""
"VPSUBUSB ymm1, ymmV, ymm2/m256","VPSUBUSB ymm2/m256, ymmV, ymm1","vpsubusb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D8 /r","V","V","AVX2","","w,r,r","",""
"VPSUBUSW xmm1, xmmV, xmm2/m128","VPSUBUSW xmm2/m128, xmmV, xmm1","vpsubusw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D9 /r","V","V","AVX","","w,r,r","",""
"VPSUBUSW ymm1, ymmV, ymm2/m256","VPSUBUSW ymm2/m256, ymmV, ymm1","vpsubusw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D9 /r","V","V","AVX2","","w,r,r","",""
"VPSUBW xmm1, xmmV, xmm2/m128","VPSUBW xmm2/m128, xmmV, xmm1","vpsubw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F9 /r","V","V","AVX","","w,r,r","",""
"VPSUBW ymm1, ymmV, ymm2/m256","VPSUBW ymm2/m256, ymmV, ymm1","vpsubw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F9 /r","V","V","AVX2","","w,r,r","",""
"VPTEST xmm1, xmm2/m128","VPTEST xmm2/m128, xmm1","vptest xmm2/m128, xmm1","VEX.128.66.0F38.WIG 17 /r","V","V","AVX","","r,r","",""
"VPTEST ymm1, ymm2/m256","VPTEST ymm2/m256, ymm1","vptest ymm2/m256, ymm1","VEX.256.66.0F38.WIG 17 /r","V","V","AVX","","r,r","",""
"VPUNPCKHBW xmm1, xmmV, xmm2/m128","VPUNPCKHBW xmm2/m128, xmmV, xmm1","vpunpckhbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 68 /r","V","V","AVX","","w,r,r","",""
"VPUNPCKHBW ymm1, ymmV, ymm2/m256","VPUNPCKHBW ymm2/m256, ymmV, ymm1","vpunpckhbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 68 /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKHDQ xmm1, xmmV, xmm2/m128","VPUNPCKHDQ xmm2/m128, xmmV, xmm1","vpunpckhdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6A /r","V","V","AVX","","w,r,r","",""
"VPUNPCKHDQ ymm1, ymmV, ymm2/m256","VPUNPCKHDQ ymm2/m256, ymmV, ymm1","vpunpckhdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6A /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKHQDQ xmm1, xmmV, xmm2/m128","VPUNPCKHQDQ xmm2/m128, xmmV, xmm1","vpunpckhqdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6D /r","V","V","AVX","","w,r,r","",""
"VPUNPCKHQDQ ymm1, ymmV, ymm2/m256","VPUNPCKHQDQ ymm2/m256, ymmV, ymm1","vpunpckhqdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6D /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKHWD xmm1, xmmV, xmm2/m128","VPUNPCKHWD xmm2/m128, xmmV, xmm1","vpunpckhwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 69 /r","V","V","AVX","","w,r,r","",""
"VPUNPCKHWD ymm1, ymmV, ymm2/m256","VPUNPCKHWD ymm2/m256, ymmV, ymm1","vpunpckhwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 69 /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKLBW xmm1, xmmV, xmm2/m128","VPUNPCKLBW xmm2/m128, xmmV, xmm1","vpunpcklbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 60 /r","V","V","AVX","","w,r,r","",""
"VPUNPCKLBW ymm1, ymmV, ymm2/m256","VPUNPCKLBW ymm2/m256, ymmV, ymm1","vpunpcklbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 60 /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKLDQ xmm1, xmmV, xmm2/m128","VPUNPCKLDQ xmm2/m128, xmmV, xmm1","vpunpckldq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 62 /r","V","V","AVX","","w,r,r","",""
"VPUNPCKLDQ ymm1, ymmV, ymm2/m256","VPUNPCKLDQ ymm2/m256, ymmV, ymm1","vpunpckldq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 62 /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKLQDQ xmm1, xmmV, xmm2/m128","VPUNPCKLQDQ xmm2/m128, xmmV, xmm1","vpunpcklqdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6C /r","V","V","AVX","","w,r,r","",""
"VPUNPCKLQDQ ymm1, ymmV, ymm2/m256","VPUNPCKLQDQ ymm2/m256, ymmV, ymm1","vpunpcklqdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6C /r","V","V","AVX2","","w,r,r","",""
"VPUNPCKLWD xmm1, xmmV, xmm2/m128","VPUNPCKLWD xmm2/m128, xmmV, xmm1","vpunpcklwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 61 /r","V","V","AVX","","w,r,r","",""
"VPUNPCKLWD ymm1, ymmV, ymm2/m256","VPUNPCKLWD ymm2/m256, ymmV, ymm1","vpunpcklwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 61 /r","V","V","AVX2","","w,r,r","",""
"VPXOR xmm1, xmmV, xmm2/m128","VPXOR xmm2/m128, xmmV, xmm1","vpxor xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EF /r","V","V","AVX","","w,r,r","",""
"VPXOR ymm1, ymmV, ymm2/m256","VPXOR ymm2/m256, ymmV, ymm1","vpxor ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EF /r","V","V","AVX2","","w,r,r","",""
"VRCPPS xmm1, xmm2/m128","VRCPPS xmm2/m128, xmm1","vrcpps xmm2/m128, xmm1","VEX.128.0F.WIG 53 /r","V","V","AVX","","w,r","",""
"VRCPPS ymm1, ymm2/m256","VRCPPS ymm2/m256, ymm1","vrcpps ymm2/m256, ymm1","VEX.256.0F.WIG 53 /r","V","V","AVX","","w,r","",""
"VRCPSS xmm1, xmmV, xmm2/m32","VRCPSS xmm2/m32, xmmV, xmm1","vrcpss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 53 /r","V","V","AVX","","w,r,r","",""
"VROUNDPD xmm1, xmm2/m128, imm8","VROUNDPD imm8, xmm2/m128, xmm1","vroundpd imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 09 /r ib","V","V","AVX","","w,r,r","",""
"VROUNDPD ymm1, ymm2/m256, imm8","VROUNDPD imm8, ymm2/m256, ymm1","vroundpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.WIG 09 /r ib","V","V","AVX","","w,r,r","",""
"VROUNDPS xmm1, xmm2/m128, imm8","VROUNDPS imm8, xmm2/m128, xmm1","vroundps imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 08 /r ib","V","V","AVX","","w,r,r","",""
"VROUNDPS ymm1, ymm2/m256, imm8","VROUNDPS imm8, ymm2/m256, ymm1","vroundps imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.WIG 08 /r ib","V","V","AVX","","w,r,r","",""
"VROUNDSD xmm1, xmmV, xmm2/m64, imm8","VROUNDSD imm8, xmm2/m64, xmmV, xmm1","vroundsd imm8, xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.66.0F3A.WIG 0B /r ib","V","V","AVX","","w,r,r,r","",""
"VROUNDSS xmm1, xmmV, xmm2/m32, imm8","VROUNDSS imm8, xmm2/m32, xmmV, xmm1","vroundss imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.66.0F3A.WIG 0A /r ib","V","V","AVX","","w,r,r,r","",""
"VRSQRTPS xmm1, xmm2/m128","VRSQRTPS xmm2/m128, xmm1","vrsqrtps xmm2/m128, xmm1","VEX.128.0F.WIG 52 /r","V","V","AVX","","w,r","",""
"VRSQRTPS ymm1, ymm2/m256","VRSQRTPS ymm2/m256, ymm1","vrsqrtps ymm2/m256, ymm1","VEX.256.0F.WIG 52 /r","V","V","AVX","","w,r","",""
"VRSQRTSS xmm1, xmmV, xmm2/m32","VRSQRTSS xmm2/m32, xmmV, xmm1","vrsqrtss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 52 /r","V","V","AVX","","w,r,r","",""
"VSHUFPD xmm1, xmmV, xmm2/m128, imm8","VSHUFPD imm8, xmm2/m128, xmmV, xmm1","vshufpd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
"VSHUFPD ymm1, ymmV, ymm2/m256, imm8","VSHUFPD imm8, ymm2/m256, ymmV, ymm1","vshufpd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
"VSHUFPS xmm1, xmmV, xmm2/m128, imm8","VSHUFPS imm8, xmm2/m128, xmmV, xmm1","vshufps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
"VSHUFPS ymm1, ymmV, ymm2/m256, imm8","VSHUFPS imm8, ymm2/m256, ymmV, ymm1","vshufps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
"VSQRTPD xmm1, xmm2/m128","VSQRTPD xmm2/m128, xmm1","vsqrtpd xmm2/m128, xmm1","VEX.128.66.0F.WIG 51 /r","V","V","AVX","","w,r","",""
"VSQRTPD ymm1, ymm2/m256","VSQRTPD ymm2/m256, ymm1","vsqrtpd ymm2/m256, ymm1","VEX.256.66.0F.WIG 51 /r","V","V","AVX","","w,r","",""
"VSQRTPS xmm1, xmm2/m128","VSQRTPS xmm2/m128, xmm1","vsqrtps xmm2/m128, xmm1","VEX.128.0F.WIG 51 /r","V","V","AVX","","w,r","",""
"VSQRTPS ymm1, ymm2/m256","VSQRTPS ymm2/m256, ymm1","vsqrtps ymm2/m256, ymm1","VEX.256.0F.WIG 51 /r","V","V","AVX","","w,r","",""
"VSQRTSD xmm1, xmmV, xmm2/m64","VSQRTSD xmm2/m64, xmmV, xmm1","vsqrtsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 51 /r","V","V","AVX","","w,r,r","",""
"VSQRTSS xmm1, xmmV, xmm2/m32","VSQRTSS xmm2/m32, xmmV, xmm1","vsqrtss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 51 /r","V","V","AVX","","w,r,r","",""
"VSTMXCSR m32","VSTMXCSR m32","vstmxcsr m32","VEX.LZ.0F.WIG AE /3","V","V","AVX","modrm_memonly","w","",""
"VSUBPD xmm1, xmmV, xmm2/m128","VSUBPD xmm2/m128, xmmV, xmm1","vsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VSUBPD ymm1, ymmV, ymm2/m256","VSUBPD ymm2/m256, ymmV, ymm1","vsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VSUBPS xmm1, xmmV, xmm2/m128","VSUBPS xmm2/m128, xmmV, xmm1","vsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VSUBPS ymm1, ymmV, ymm2/m256","VSUBPS ymm2/m256, ymmV, ymm1","vsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VSUBSD xmm1, xmmV, xmm2/m64","VSUBSD xmm2/m64, xmmV, xmm1","vsubsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VSUBSS xmm1, xmmV, xmm2/m32","VSUBSS xmm2/m32, xmmV, xmm1","vsubss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
"VTESTPD xmm1, xmm2/m128","VTESTPD xmm2/m128, xmm1","vtestpd xmm2/m128, xmm1","VEX.128.66.0F38.W0 0F /r","V","V","AVX","","r,r","",""
"VTESTPD ymm1, ymm2/m256","VTESTPD ymm2/m256, ymm1","vtestpd ymm2/m256, ymm1","VEX.256.66.0F38.W0 0F /r","V","V","AVX","","r,r","",""
"VTESTPS xmm1, xmm2/m128","VTESTPS xmm2/m128, xmm1","vtestps xmm2/m128, xmm1","VEX.128.66.0F38.W0 0E /r","V","V","AVX","","r,r","",""
"VTESTPS ymm1, ymm2/m256","VTESTPS ymm2/m256, ymm1","vtestps ymm2/m256, ymm1","VEX.256.66.0F38.W0 0E /r","V","V","AVX","","r,r","",""
"VUCOMISD xmm1, xmm2/m64","VUCOMISD xmm2/m64, xmm1","vucomisd xmm2/m64, xmm1","VEX.LIG.66.0F.WIG 2E /r","V","V","AVX","","r,r","",""
"VUCOMISS xmm1, xmm2/m32","VUCOMISS xmm2/m32, xmm1","vucomiss xmm2/m32, xmm1","VEX.LIG.0F.WIG 2E /r","V","V","AVX","","r,r","",""
"VUNPCKHPD xmm1, xmmV, xmm2/m128","VUNPCKHPD xmm2/m128, xmmV, xmm1","vunpckhpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
"VUNPCKHPD ymm1, ymmV, ymm2/m256","VUNPCKHPD ymm2/m256, ymmV, ymm1","vunpckhpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
"VUNPCKHPS xmm1, xmmV, xmm2/m128","VUNPCKHPS xmm2/m128, xmmV, xmm1","vunpckhps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
"VUNPCKHPS ymm1, ymmV, ymm2/m256","VUNPCKHPS ymm2/m256, ymmV, ymm1","vunpckhps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
"VUNPCKLPD xmm1, xmmV, xmm2/m128","VUNPCKLPD xmm2/m128, xmmV, xmm1","vunpcklpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
"VUNPCKLPD ymm1, ymmV, ymm2/m256","VUNPCKLPD ymm2/m256, ymmV, ymm1","vunpcklpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
"VUNPCKLPS xmm1, xmmV, xmm2/m128","VUNPCKLPS xmm2/m128, xmmV, xmm1","vunpcklps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
"VUNPCKLPS ymm1, ymmV, ymm2/m256","VUNPCKLPS ymm2/m256, ymmV, ymm1","vunpcklps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
"VXORPD xmm1, xmmV, xmm2/m128","VXORPD xmm2/m128, xmmV, xmm1","vxorpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
"VXORPD ymm1, ymmV, ymm2/m256","VXORPD ymm2/m256, ymmV, ymm1","vxorpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
"VXORPS xmm1, xmmV, xmm2/m128","VXORPS xmm2/m128, xmmV, xmm1","vxorps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
"VXORPS ymm1, ymmV, ymm2/m256","VXORPS ymm2/m256, ymmV, ymm1","vxorps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
"VZEROALL","VZEROALL","vzeroall","VEX.256.0F.WIG 77","V","V","AVX","","","",""
"VZEROUPPER","VZEROUPPER","vzeroupper","VEX.128.0F.WIG 77","V","V","AVX","","","",""
"WAIT","WAIT","wait","9B","V","V","","pseudo","","",""
"WBINVD","WBINVD","wbinvd","0F 09","V","V","486","","","",""
"WRFSBASE rmr32","WRFSBASE rmr32","wrfsbase rmr32","F3 0F AE /2","I","V","FSGSBASE","modrm_regonly,operand16,operand32","r","Y","32"
"WRFSBASE rmr64","WRFSBASE rmr64","wrfsbase rmr64","F3 REX.W 0F AE /2","I","V","FSGSBASE","modrm_regonly","r","Y","64"
"WRGSBASE rmr32","WRGSBASE rmr32","wrgsbase rmr32","F3 0F AE /3","I","V","FSGSBASE","modrm_regonly,operand16,operand32","r","Y","32"
"WRGSBASE rmr64","WRGSBASE rmr64","wrgsbase rmr64","F3 REX.W 0F AE /3","I","V","FSGSBASE","modrm_regonly","r","Y","64"
"WRMSR","WRMSR","wrmsr","0F 30","V","V","Pentium","","","",""
"WRPKRU","WRPKRU","wrpkru","0F 01 EF","V","V","OSPKE","","","",""
"XABORT imm8","XABORT imm8","xabort imm8","C6 F8 ib","V","V","RTM","","r","",""
"XACQUIRE","XACQUIRE","xacquire","F2","V","V","HLE","pseudo","","",""
"XADD r/m16, r16","XADDW r16, r/m16","xaddw r16, r/m16","0F C1 /r","V","V","","operand16","rw,w","Y","16"
"XADD r/m32, r32","XADDL r32, r/m32","xaddl r32, r/m32","0F C1 /r","V","V","","operand32","rw,w","Y","32"
"XADD r/m64, r64","XADDQ r64, r/m64","xaddq r64, r/m64","REX.W 0F C1 /r","N.E.","V","","","rw,w","Y","64"
"XADD r/m8, r8","XADDB r8, r/m8","xaddb r8, r/m8","0F C0 /r","V","V","","","rw,w","Y","8"
"XADD r/m8, r8","XADDB r8, r/m8","xaddb r8, r/m8","REX 0F C0 /r","N.E.","V","","pseudo64","rw,w","Y","8"
"XBEGIN rel16","XBEGIN rel16","xbegin rel16","C7 F8 cw","V","V","RTM","operand16","r","",""
"XBEGIN rel32","XBEGIN rel32","xbegin rel32","C7 F8 cd","V","V","RTM","operand32,operand64","r","",""
"XCHG AX, r16op","XCHGW r16op, AX","xchgw r16op, AX","90+rw","V","V","","operand16,pseudo","rw,rw","Y","16"
"XCHG EAX, r32op","XCHGL r32op, EAX","xchgl r32op, EAX","90+rd","V","V","","operand32,pseudo","rw,rw","Y","32"
"XCHG RAX, r64op","XCHGQ r64op, RAX","xchgq r64op, RAX","REX.W 90+rd","N.E.","V","","pseudo","rw,rw","Y","64"
"XCHG r/m16, r16","XCHGW r16, r/m16","xchgw r16, r/m16","87 /r","V","V","","operand16","rw,r","Y","16"
"XCHG r/m32, r32","XCHGL r32, r/m32","xchgl r32, r/m32","87 /r","V","V","","operand32","rw,r","Y","32"
"XCHG r/m64, r64","XCHGQ r64, r/m64","xchgq r64, r/m64","REX.W 87 /r","N.E.","V","","","rw,r","Y","64"
"XCHG r/m8, r8","XCHGB r8, r/m8","xchgb r8, r/m8","86 /r","V","V","","","rw,r","Y","8"
"XCHG r/m8, r8","XCHGB r8, r/m8","xchgb r8, r/m8","REX 86 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"XCHG r16, r/m16","XCHGW r/m16, r16","xchgw r/m16, r16","87 /r","V","V","","operand16,pseudo","w,r","Y","16"
"XCHG r16op, AX","XCHGW AX, r16op","xchgw AX, r16op","90+rw","V","V","","operand16","rw,rw","Y","16"
"XCHG r32, r/m32","XCHGL r/m32, r32","xchgl r/m32, r32","87 /r","V","V","","operand32,pseudo","w,r","Y","32"
"XCHG r32op, EAX","XCHGL EAX, r32op","xchgl EAX, r32op","90+rd","V","V","","operand32","rw,rw","Y","32"
"XCHG r64, r/m64","XCHGQ r/m64, r64","xchgq r/m64, r64","REX.W 87 /r","N.E.","V","","pseudo","w,r","Y","64"
"XCHG r64op, RAX","XCHGQ RAX, r64op","xchgq RAX, r64op","REX.W 90+rd","N.E.","V","","","rw,rw","Y","64"
"XCHG r8, r/m8","XCHGB r/m8, r8","xchgb r/m8, r8","86 /r","V","V","","pseudo","w,r","Y","8"
"XCHG r8, r/m8","XCHGB r/m8, r8","xchgb r/m8, r8","REX 86 /r","N.E.","V","","pseudo","w,r","Y","8"
"XEND","XEND","xend","0F 01 D5","V","V","RTM","","","",""
"XGETBV","XGETBV","xgetbv","0F 01 D0","V","V","","","","",""
"XLATB","XLAT","xlat","D7","V","V","","ignoreREXW","","",""
"XLATB","XLAT","xlat","REX.W D7","N.E.","V","","pseudo","","",""
"XOR AL, imm8","XORB imm8, AL","xorb imm8, AL","34 ib","V","V","","","rw,r","Y","8"
"XOR AX, imm16","XORW imm16, AX","xorw imm16, AX","35 iw","V","V","","operand16","rw,r","Y","16"
"XOR EAX, imm32","XORL imm32, EAX","xorl imm32, EAX","35 id","V","V","","operand32","rw,r","Y","32"
"XOR RAX, imm32","XORQ imm32, RAX","xorq imm32, RAX","REX.W 35 id","N.E.","V","","","rw,r","Y","64"
"XOR r/m16, imm16","XORW imm16, r/m16","xorw imm16, r/m16","81 /6 iw","V","V","","operand16","rw,r","Y","16"
"XOR r/m16, imm8","XORW imm8, r/m16","xorw imm8, r/m16","83 /6 ib","V","V","","operand16","rw,r","Y","16"
"XOR r/m16, r16","XORW r16, r/m16","xorw r16, r/m16","31 /r","V","V","","operand16","rw,r","Y","16"
"XOR r/m32, imm32","XORL imm32, r/m32","xorl imm32, r/m32","81 /6 id","V","V","","operand32","rw,r","Y","32"
"XOR r/m32, imm8","XORL imm8, r/m32","xorl imm8, r/m32","83 /6 ib","V","V","","operand32","rw,r","Y","32"
"XOR r/m32, r32","XORL r32, r/m32","xorl r32, r/m32","31 /r","V","V","","operand32","rw,r","Y","32"
"XOR r/m64, imm32","XORQ imm32, r/m64","xorq imm32, r/m64","REX.W 81 /6 id","N.E.","V","","","rw,r","Y","64"
"XOR r/m64, imm8","XORQ imm8, r/m64","xorq imm8, r/m64","REX.W 83 /6 ib","N.E.","V","","","rw,r","Y","64"
"XOR r/m64, r64","XORQ r64, r/m64","xorq r64, r/m64","REX.W 31 /r","N.E.","V","","","rw,r","Y","64"
"XOR r/m8, imm8","XORB imm8, r/m8","xorb imm8, r/m8","80 /6 ib","V","V","","","rw,r","Y","8"
"XOR r/m8, imm8","XORB imm8, r/m8","xorb imm8, r/m8","REX 80 /6 ib","N.E.","V","","pseudo64","rw,r","Y","8"
"XOR r/m8, r8","XORB r8, r/m8","xorb r8, r/m8","30 /r","V","V","","","rw,r","Y","8"
"XOR r/m8, r8","XORB r8, r/m8","xorb r8, r/m8","REX 30 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"XOR r16, r/m16","XORW r/m16, r16","xorw r/m16, r16","33 /r","V","V","","operand16","rw,r","Y","16"
"XOR r32, r/m32","XORL r/m32, r32","xorl r/m32, r32","33 /r","V","V","","operand32","rw,r","Y","32"
"XOR r64, r/m64","XORQ r/m64, r64","xorq r/m64, r64","REX.W 33 /r","N.E.","V","","","rw,r","Y","64"
"XOR r8, r/m8","XORB r/m8, r8","xorb r/m8, r8","32 /r","V","V","","","rw,r","Y","8"
"XOR r8, r/m8","XORB r/m8, r8","xorb r/m8, r8","REX 32 /r","N.E.","V","","pseudo64","rw,r","Y","8"
"XORPD xmm1, xmm2/m128","XORPD xmm2/m128, xmm1","xorpd xmm2/m128, xmm1","66 0F 57 /r","V","V","SSE2","","rw,r","",""
"XORPS xmm1, xmm2/m128","XORPS xmm2/m128, xmm1","xorps xmm2/m128, xmm1","0F 57 /r","V","V","SSE","","rw,r","",""
"XRELEASE","XRELEASE","xrelease","F3","V","V","HLE","pseudo","","",""
"XRSTOR mem","XRSTOR mem","xrstor mem","0F AE /5","V","V","","operand16,operand32","r","",""
"XRSTOR64 mem","XRSTOR64 mem","xrstor64 mem","REX.W 0F AE /5","N.E.","V","","","r","",""
"XRSTORS mem","XRSTORS mem","xrstors mem","0F C7 /3","V","V","","operand16,operand32","r","",""
"XRSTORS64 mem","XRSTORS64 mem","xrstors64 mem","REX.W 0F C7 /3","N.E.","V","","","r","",""
"XSAVE mem","XSAVE mem","xsave mem","0F AE /4","V","V","","operand16,operand32","w","",""
"XSAVE64 mem","XSAVE64 mem","xsave64 mem","REX.W 0F AE /4","N.E.","V","","","w","",""
"XSAVEC mem","XSAVEC mem","xsavec mem","0F C7 /4","V","V","","operand16,operand32","w","",""
"XSAVEC64 mem","XSAVEC64 mem","xsavec64 mem","REX.W 0F C7 /4","N.E.","V","","","w","",""
"XSAVEOPT mem","XSAVEOPT mem","xsaveopt mem","0F AE /6","V","V","XSAVEOPT","operand16,operand32","w","",""
"XSAVEOPT64 mem","XSAVEOPT64 mem","xsaveopt64 mem","REX.W 0F AE /6","N.E.","V","XSAVEOPT","","w","",""
"XSAVES mem","XSAVES mem","xsaves mem","0F C7 /5","V","V","","operand16,operand32","w","",""
"XSAVES64 mem","XSAVES64 mem","xsaves64 mem","REX.W 0F C7 /5","N.E.","V","","","w","",""
"XSETBV","XSETBV","xsetbv","0F 01 D1","V","V","","","","",""
"XTEST","XTEST","xtest","0F 01 D6","V","V","HLE or RTM","","","",""
golang-github-mmcloughlin-avo-0.5.0/internal/data/x86_64.xml 0000664 0000000 0000000 00013404520 14370657153 0023573 0 ustar 00root root 0000000 0000000
golang-github-mmcloughlin-avo-0.5.0/internal/gen/ 0000775 0000000 0000000 00000000000 14370657153 0021742 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/gen/api.go 0000664 0000000 0000000 00000016424 14370657153 0023051 0 ustar 00root root 0000000 0000000 package gen
import (
"fmt"
"sort"
"strings"
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
)
// Enum is a generated enumeration type. This assists with mapping between the
// conceptual values of the enum, and it's materialization as Go code.
type Enum struct {
name string
doc []string
values []string
}
// NewEnum initializes an empty enum type with the given name.
func NewEnum(name string) *Enum {
return &Enum{name: name}
}
// Name returns the type name.
func (e *Enum) Name() string { return e.name }
// Receiver returns the receiver variable name.
func (e *Enum) Receiver() string {
return strings.ToLower(e.name[:1])
}
// SetDoc sets type documentation, as a list of lines.
func (e *Enum) SetDoc(doc ...string) {
e.doc = doc
}
// Doc returns the type documentation.
func (e *Enum) Doc() []string { return e.doc }
// AddValue adds a named enumerator.
func (e *Enum) AddValue(value string) {
e.values = append(e.values, value)
}
// Values returns all enumerators.
func (e *Enum) Values() []string { return e.values }
// None returns the name of the "unset" constant of this enumeration.
func (e *Enum) None() string {
return e.ConstName("None")
}
// ConstName returns the constant name that refers to the given enumerator
// value.
func (e *Enum) ConstName(value string) string {
return e.name + value
}
// ConstNames returns the constant names for all enumerator values.
func (e *Enum) ConstNames() []string {
var consts []string
for _, v := range e.values {
consts = append(consts, e.ConstName(v))
}
return consts
}
// MaxName returns the name of the constant that represents the maximum
// enumerator. This value is placed at the very end of the enum, so all values
// will be between the None and Max enumerators.
func (e *Enum) MaxName() string {
return strings.ToLower(e.ConstName("max"))
}
// Max returns the value of the maximum enumerator.
func (e *Enum) Max() int {
return len(e.values)
}
// UnderlyingType returns the underlying unsigned integer type used for the
// enumeration. This will be the smallest type that can represent all the
// values.
func (e *Enum) UnderlyingType() string {
b := uint(8)
for ; b < 64 && e.Max() > ((1< 0 {
opcode += "." + suffixes.String()
}
a.Printf("\t%s\t%s\n", opcode, strings.Join(as, ", "))
}
}
a.Printf("\n")
}
a.Printf("\tRET\n")
return a.Result()
}
func (a asmtest) skip(opcode string) (bool, string) {
prefixes := map[string]string{
"PUSH": "PUSH can produce 'unbalanced PUSH/POP' assembler error",
"POP": "POP can produce 'unbalanced PUSH/POP' assembler error",
}
for p, m := range prefixes {
if strings.HasPrefix(opcode, p) {
return true, m
}
}
return false, ""
}
func (a asmtest) args(opcode string, ops []inst.Operand) ([]string, error) {
// Special case for CALL, since it needs a different type of rel32 argument than others.
if opcode == "CALL" {
return []string{a.sym}, nil
}
as := make([]string, len(ops))
for i, op := range ops {
a := a.arg(op.Type, i)
if a == "" {
return nil, fmt.Errorf("unsupported operand type %q", op.Type)
}
as[i] = a
}
return as, nil
}
// arg generates an argument for an operand of the given type.
func (a asmtest) arg(t string, i int) string {
m := map[string]string{
"1": "$1", //
"3": "$3", //
"imm2u": "$3",
//
"imm8": fmt.Sprintf("$%d", math.MaxInt8), //
"imm16": fmt.Sprintf("$%d", math.MaxInt16), //
"imm32": fmt.Sprintf("$%d", math.MaxInt32), //
"imm64": fmt.Sprintf("$%d", math.MaxInt64), //
"al": "AL", //
"cl": "CL", //
"r8": "CH", //
"ax": "AX", //
"r16": "SI", //
"eax": "AX", //
"r32": "DX", //
"rax": "AX", //
"r64": "R15", //
"mm": "M5", //
"xmm0": "X0", //
"xmm": "X" + strconv.Itoa(7+i), //
//
//
"ymm": "Y" + strconv.Itoa(3+i), //
//
//
"zmm": "Z" + strconv.Itoa(16+i), //
//
//
"k": "K" + strconv.Itoa(1+i), //
//
//
//
"m": "0(AX)(CX*2)", //
"m8": "8(AX)(CX*2)", //
"m16": "16(AX)(CX*2)", //
//
"m32": "32(AX)(CX*2)", //
//
//
"m64": "64(AX)(CX*2)", //
//
//
"m128": "128(AX)(CX*2)", //
//
"m256": "256(AX)(CX*2)", //
//
"m512": "512(AX)(CX*2)", //
//
"vm32x": "32(X14*8)", //
//
"vm64x": "64(X14*8)", //
//
"vm32y": "32(Y13*8)", //
//
"vm64y": "64(Y13*8)", //
//
"vm32z": "32(Z13*8)", //
//
"vm64z": "64(Z13*8)", //
//
"rel8": a.rel8, //
"rel32": a.rel32, //
//
//
// Appear unused:
"r8l": "????", //
"r16l": "????", //
"r32l": "????", //
}
return m[t]
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/build.go 0000664 0000000 0000000 00000004025 14370657153 0023371 0 ustar 00root root 0000000 0000000 package gen
import (
"fmt"
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type build struct {
cfg printer.Config
prnt.Generator
}
// NewBuild builds a printer that will generate instruction functions in the
// build package. Each instruction will have one method on the build.Context
// type, and a corresponding wrapper operating on the global Context. These
// functions are thin wrappers around constructors generated by NewCtors.
func NewBuild(cfg printer.Config) Interface {
return GoFmt(&build{cfg: cfg})
}
func (b *build) Generate(is []inst.Instruction) ([]byte, error) {
b.Printf("// %s\n\n", b.cfg.GeneratedWarning())
b.Printf("package build\n\n")
b.Printf("import (\n")
b.Printf("\t%q\n", api.ImportPath(api.IRPackage))
b.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
b.Printf("\t%q\n", api.ImportPath("x86"))
b.Printf(")\n\n")
// Helper to reduce source code size a little.
b.Printf("func (c *Context) addinstruction(i *ir.Instruction, err error) {\n")
b.Printf("if err == nil { c.Instruction(i) }")
b.Printf(" else { c.adderror(err) }\n")
b.Printf("}\n\n")
// Generate build functions.
fns := api.InstructionsFunctions(is)
for _, fn := range fns {
b.function(fn)
}
return b.Result()
}
func (b *build) function(fn *api.Function) {
s := fn.Signature()
d := fn.Doc()
// Context method.
methoddoc := append([]string{}, d...)
methoddoc = append(methoddoc, fmt.Sprintf("Construct and append a %s instruction to the active function.", fn.Opcode()))
b.Comment(methoddoc...)
b.Printf("func (c *Context) %s(%s) {\n", fn.Name(), s.ParameterList())
b.Printf("c.addinstruction(x86.%s(%s))", fn.Name(), s.Arguments())
b.Printf("}\n\n")
// Global version.
globaldoc := append([]string{}, methoddoc...)
globaldoc = append(globaldoc, "Operates on the global context.")
b.Comment(globaldoc...)
b.Printf("func %s(%s) { ctx.%s(%s) }\n\n", fn.Name(), s.ParameterList(), fn.Name(), s.Arguments())
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/buildtest.go 0000664 0000000 0000000 00000002411 14370657153 0024266 0 ustar 00root root 0000000 0000000 package gen
import (
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type buildtest struct {
cfg printer.Config
prnt.Generator
}
// NewBuildTest autogenerates tests for instruction methods on the build
// context.
func NewBuildTest(cfg printer.Config) Interface {
return GoFmt(&buildtest{cfg: cfg})
}
func (b *buildtest) Generate(is []inst.Instruction) ([]byte, error) {
b.Printf("// %s\n\n", b.cfg.GeneratedWarning())
b.BuildTag("!integration")
b.NL()
b.Printf("package build\n\n")
b.Printf("import (\n")
b.Printf("\t\"math\"\n")
b.Printf("\t\"testing\"\n")
b.NL()
b.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
b.Printf("\t%q\n", api.ImportPath(api.RegisterPackage))
b.Printf(")\n\n")
DeclareTestArguments(&b.Generator)
b.Printf("func TestContextInstructions(t *testing.T) {")
b.Printf("ctx := NewContext()\n")
b.Printf("ctx.Function(\"Instructions\")\n")
fns := api.InstructionsFunctions(is)
for _, fn := range fns {
f := fn.Forms[0]
s := TestSignature(f)
b.Printf("ctx.%s(%s)\n", fn.Name(), s.Arguments())
}
b.Printf("if _, err := ctx.Result(); err != nil { t.Fatal(err) }\n")
b.Printf("}\n\n")
return b.Result()
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/ctors.go 0000664 0000000 0000000 00000002461 14370657153 0023426 0 ustar 00root root 0000000 0000000 package gen
import (
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type ctors struct {
cfg printer.Config
prnt.Generator
}
// NewCtors will build instruction constructors. Each constructor delegates to
// the optab-based instruction builder, providing it with a candidate list of
// forms to match against.
func NewCtors(cfg printer.Config) Interface {
return GoFmt(&ctors{cfg: cfg})
}
func (c *ctors) Generate(is []inst.Instruction) ([]byte, error) {
c.Printf("// %s\n\n", c.cfg.GeneratedWarning())
c.Printf("package x86\n\n")
c.Printf("import (\n")
c.Printf("\tintrep %q\n", api.ImportPath(api.IRPackage))
c.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
c.Printf(")\n\n")
fns := api.InstructionsFunctions(is)
table := NewTable(is)
for _, fn := range fns {
c.function(fn, table)
}
return c.Result()
}
func (c *ctors) function(fn *api.Function, table *Table) {
c.Comment(fn.Doc()...)
s := fn.Signature()
c.Printf("func %s(%s) (*intrep.Instruction, error) {\n", fn.Name(), s.ParameterList())
c.Printf(
"return build(%s.Forms(), %s, %s)\n",
table.OpcodeConst(fn.Instruction.Opcode),
table.SuffixesConst(fn.Suffixes),
s.ParameterSlice(),
)
c.Printf("}\n\n")
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/ctorstest.go 0000664 0000000 0000000 00000012047 14370657153 0024327 0 ustar 00root root 0000000 0000000 package gen
import (
"bytes"
"fmt"
"strings"
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type ctorstest struct {
cfg printer.Config
prnt.Generator
}
// NewCtorsTest autogenerates tests for the constructors build by NewCtors.
func NewCtorsTest(cfg printer.Config) Interface {
return GoFmt(&ctorstest{cfg: cfg})
}
func (c *ctorstest) Generate(is []inst.Instruction) ([]byte, error) {
c.Printf("// %s\n\n", c.cfg.GeneratedWarning())
c.BuildTag("!integration")
c.NL()
c.Printf("package x86\n\n")
c.Printf("import (\n")
c.Printf("\t\"math\"\n")
c.Printf("\t\"testing\"\n")
c.NL()
c.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
c.Printf("\t%q\n", api.ImportPath(api.RegisterPackage))
c.Printf(")\n\n")
DeclareTestArguments(&c.Generator)
fns := api.InstructionsFunctions(is)
for _, fn := range fns {
c.function(fn)
}
return c.Result()
}
func (c *ctorstest) function(fn *api.Function) {
c.Printf("func Test%sValidFormsNoError(t *testing.T) {", fn.Name())
for _, f := range fn.Forms {
s := TestSignature(f)
c.Printf("if _, err := %s(%s); err != nil { t.Fatal(err) }\n", fn.Name(), s.Arguments())
}
c.Printf("}\n\n")
}
type ctorsstress struct {
cfg printer.Config
prnt.Generator
}
// NewCtorsStress autogenerates stress tests for instruction constructors.
func NewCtorsStress(cfg printer.Config) Interface {
return GoFmt(&ctorsstress{cfg: cfg})
}
func (c *ctorsstress) Generate(is []inst.Instruction) ([]byte, error) {
c.Printf("// %s\n\n", c.cfg.GeneratedWarning())
c.BuildTag("stress")
c.NL()
c.Printf("package x86\n\n")
c.Printf("import (\n")
c.Printf("\t\"reflect\"\n")
c.Printf("\t\"testing\"\n")
c.NL()
c.Printf("\t%q\n", api.ImportPath(api.IRPackage))
c.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
c.Printf("\t%q\n", api.ImportPath(api.RegisterPackage))
c.Printf(")\n\n")
fns := api.InstructionsFunctions(is)
for _, fn := range fns {
c.function(fn)
}
return c.Result()
}
func (c *ctorsstress) function(fn *api.Function) {
c.Printf("func Test%sValidFormsCorrectInstruction(t *testing.T) {", fn.Name())
for _, f := range fn.Forms {
name := strings.Join(f.Signature(), "_")
c.Printf("t.Run(\"form=%s\", func(t *testing.T) {\n", name)
s := TestSignature(f)
c.Printf("expect := &%s\n", construct(fn, f, s))
c.Printf("got, err := %s(%s);\n", fn.Name(), s.Arguments())
c.Printf("if err != nil { t.Fatal(err) }\n")
c.Printf("if !reflect.DeepEqual(got, expect) { t.Fatal(\"mismatch\") }\n")
c.Printf("})\n")
}
c.Printf("}\n\n")
}
type ctorsbench struct {
cfg printer.Config
prnt.Generator
}
// NewCtorsBench autogenerates a benchmark for the instruction constructors.
func NewCtorsBench(cfg printer.Config) Interface {
return GoFmt(&ctorsbench{cfg: cfg})
}
func (c *ctorsbench) Generate(is []inst.Instruction) ([]byte, error) {
c.Printf("// %s\n\n", c.cfg.GeneratedWarning())
c.BuildTag("stress")
c.NL()
c.Printf("package x86\n\n")
c.Printf("import (\n")
c.Printf("\t\"time\"\n")
c.Printf("\t\"testing\"\n")
c.Printf(")\n\n")
c.Printf("func BenchmarkConstructors(b *testing.B) {\n")
c.Printf("start := time.Now()\n")
c.Printf("for i := 0; i < b.N; i++ {\n")
n := 0
for _, fn := range api.InstructionsFunctions(is) {
for _, f := range fn.Forms {
n++
c.Printf("%s(%s)\n", fn.Name(), TestSignature(f).Arguments())
}
}
c.Printf("}\n")
c.Printf("elapsed := time.Since(start)\n")
c.Printf("\tb.ReportMetric(%d * float64(b.N) / elapsed.Seconds(), \"inst/s\")\n", n)
c.Printf("}\n\n")
return c.Result()
}
func construct(fn *api.Function, f inst.Form, s api.Signature) string {
buf := bytes.NewBuffer(nil)
fmt.Fprintf(buf, "ir.Instruction{\n")
fmt.Fprintf(buf, "\tOpcode: %#v,\n", fn.Instruction.Opcode)
if len(fn.Suffixes) > 0 {
fmt.Fprintf(buf, "\tSuffixes: %#v,\n", fn.Suffixes.Strings())
}
fmt.Fprintf(buf, "\tOperands: %s,\n", s.ParameterSlice())
// Inputs.
fmt.Fprintf(buf, "\tInputs: %s,\n", operandsWithAction(f, inst.R, s))
// Outputs.
fmt.Fprintf(buf, "\tOutputs: %s,\n", operandsWithAction(f, inst.W, s))
// ISAs.
if len(f.ISA) > 0 {
fmt.Fprintf(buf, "\tISA: %#v,\n", f.ISA)
}
// Branch variables.
if fn.Instruction.IsTerminal() {
fmt.Fprintf(buf, "\tIsTerminal: true,\n")
}
if fn.Instruction.IsBranch() {
fmt.Fprintf(buf, "\tIsBranch: true,\n")
fmt.Fprintf(buf, "\tIsConditional: %#v,\n", fn.Instruction.IsConditionalBranch())
}
// Cancelling inputs.
if f.CancellingInputs {
fmt.Fprintf(buf, "\tCancellingInputs: true,\n")
}
fmt.Fprintf(buf, "}")
return buf.String()
}
func operandsWithAction(f inst.Form, a inst.Action, s api.Signature) string {
var opexprs []string
for i, op := range f.Operands {
if op.Action.ContainsAny(a) {
opexprs = append(opexprs, s.ParameterName(i))
}
}
for _, op := range f.ImplicitOperands {
if op.Action.ContainsAny(a) {
opexprs = append(opexprs, api.ImplicitRegister(op.Register))
}
}
if len(opexprs) == 0 {
return "nil"
}
return fmt.Sprintf("[]%s{%s}", api.OperandType, strings.Join(opexprs, ", "))
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/doc.go 0000664 0000000 0000000 00000000127 14370657153 0023036 0 ustar 00root root 0000000 0000000 // Package gen provides code generators based on the instruction database.
package gen
golang-github-mmcloughlin-avo-0.5.0/internal/gen/gen.go 0000664 0000000 0000000 00000001524 14370657153 0023044 0 ustar 00root root 0000000 0000000 package gen
import (
"go/format"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/printer"
)
// Interface of an instruction code generator.
type Interface interface {
Generate([]inst.Instruction) ([]byte, error)
}
// Func adapts a function to Interface.
type Func func([]inst.Instruction) ([]byte, error)
// Generate calls f.
func (f Func) Generate(is []inst.Instruction) ([]byte, error) {
return f(is)
}
// Builder constructs a code generator.
type Builder func(printer.Config) Interface
// GoFmt formats Go code produced from the given generator.
func GoFmt(i Interface) Interface {
return Func(func(is []inst.Instruction) ([]byte, error) {
b, err := i.Generate(is)
if err != nil {
return nil, err
}
formatted, err := format.Source(b)
if err != nil {
return b, err
}
return formatted, nil
})
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/gen_test.go 0000664 0000000 0000000 00000000275 14370657153 0024105 0 ustar 00root root 0000000 0000000 package gen
import "testing"
func TestBuilderInterfaces(t *testing.T) {
_ = []Builder{
NewAsmTest,
NewGoData,
NewGoDataTest,
NewCtors,
NewCtorsTest,
NewBuild,
NewMOV,
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/godata.go 0000664 0000000 0000000 00000006101 14370657153 0023526 0 ustar 00root root 0000000 0000000 package gen
import (
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type godata struct {
cfg printer.Config
prnt.Generator
}
// NewGoData writes a Go variable containing the instructions database. This is
// intended to provide a more friendly version of the instruction database,
// rather than having to use the raw data sources all the time.
func NewGoData(cfg printer.Config) Interface {
return GoFmt(&godata{cfg: cfg})
}
func (g *godata) Generate(is []inst.Instruction) ([]byte, error) {
g.Printf("// %s\n\n", g.cfg.GeneratedWarning())
g.Printf("package inst\n\n")
g.Printf("var Instructions = []Instruction{\n")
for _, i := range is {
g.Printf("{\n")
g.Printf("Opcode: %#v,\n", i.Opcode)
if i.AliasOf != "" {
g.Printf("AliasOf: %#v,\n", i.AliasOf)
}
g.Printf("Summary: %#v,\n", i.Summary)
g.Printf("Forms: []Form{\n")
for _, f := range i.Forms {
g.Printf("{\n")
if f.ISA != nil {
g.Printf("ISA: %#v,\n", f.ISA)
}
if f.Operands != nil {
g.Printf("Operands: []Operand{\n")
for _, op := range f.Operands {
g.Printf("{Type: %#v, Action: %#v},\n", op.Type, op.Action)
}
g.Printf("},\n")
}
if f.ImplicitOperands != nil {
g.Printf("ImplicitOperands: []ImplicitOperand{\n")
for _, op := range f.ImplicitOperands {
g.Printf("{Register: %#v, Action: %#v},\n", op.Register, op.Action)
}
g.Printf("},\n")
}
g.Printf("EncodingType: %#v,\n", f.EncodingType)
for _, flag := range []struct {
Field string
Enabled bool
}{
{"CancellingInputs", f.CancellingInputs},
{"Zeroing", f.Zeroing},
{"EmbeddedRounding", f.EmbeddedRounding},
{"SuppressAllExceptions", f.SuppressAllExceptions},
{"Broadcast", f.Broadcast},
} {
if flag.Enabled {
g.Printf("%s: true,\n", flag.Field)
}
}
g.Printf("},\n")
}
g.Printf("},\n")
g.Printf("},\n")
}
g.Printf("}\n")
return g.Result()
}
type godatatest struct {
cfg printer.Config
prnt.Generator
}
// NewGoDataTest writes a test case to confirm that NewGoData faithfully
// represented the list. The reason for this is that NewGoData uses custom code
// to "pretty print" the database so it is somewhat human-readable. In the
// process we could easily mistakenly print the database incorrectly. This test
// prints the same slice of instructions with the ugly but correct "%#v" format
// specifier, and confirms that the two arrays agree.
func NewGoDataTest(cfg printer.Config) Interface {
return GoFmt(&godatatest{cfg: cfg})
}
func (g *godatatest) Generate(is []inst.Instruction) ([]byte, error) {
g.Printf("// %s\n\n", g.cfg.GeneratedWarning())
g.NL()
g.Printf("package inst_test\n\n")
g.Printf(`import (
"reflect"
"testing"
"%s/internal/inst"
)
`, api.Package)
g.Printf("var raw = %#v\n\n", is)
g.Printf(`func TestVerifyInstructionsList(t *testing.T) {
if !reflect.DeepEqual(raw, inst.Instructions) {
t.Fatal("bad code generation for instructions list")
}
}
`)
return g.Result()
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/mov.go 0000664 0000000 0000000 00000007275 14370657153 0023105 0 ustar 00root root 0000000 0000000 package gen
import (
"errors"
"fmt"
"strings"
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type mov struct {
cfg printer.Config
prnt.Generator
}
// NewMOV generates a function that will auto-select the correct MOV instruction
// based on operand types and and sizes.
func NewMOV(cfg printer.Config) Interface {
return GoFmt(&mov{cfg: cfg})
}
func (m *mov) Generate(is []inst.Instruction) ([]byte, error) {
m.Printf("// %s\n\n", m.cfg.GeneratedWarning())
m.Printf("package build\n\n")
m.Printf("import (\n")
m.Printf("\t\"go/types\"\n")
m.NL()
m.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
m.Printf(")\n\n")
m.Printf("func (c *Context) mov(a, b operand.Op, an, bn int, t *types.Basic) {\n")
m.Printf("switch {\n")
for _, i := range is {
if ismov(i) {
m.instruction(i)
}
}
m.Printf("default:\n")
m.Printf("c.adderrormessage(\"could not deduce mov instruction\")\n")
m.Printf("}\n")
m.Printf("}\n")
return m.Result()
}
func (m *mov) instruction(i inst.Instruction) {
tcs := typecases(i)
mfs, err := movforms(i)
if err != nil {
m.AddError(err)
return
}
for _, mf := range mfs {
conds := []string{
fmt.Sprintf("an == %d", opsize[mf.A]),
fmt.Sprintf("%s(a)", api.CheckerName(mf.A)),
fmt.Sprintf("bn == %d", opsize[mf.B]),
fmt.Sprintf("%s(b)", api.CheckerName(mf.B)),
}
for _, tc := range tcs {
typecase := fmt.Sprintf("(t.Info() & %s) %s %s", tc.Mask, tc.Op, tc.Value)
m.Printf("case %s && %s:\n", strings.Join(conds, " && "), typecase)
m.Printf("c.%s(a, b)\n", i.Opcode)
}
}
}
// ismov decides whether the given instruction is a plain move instruction.
func ismov(i inst.Instruction) bool {
// Ignore aliases.
if i.AliasOf != "" {
return false
}
// Accept specific move instruction prefixes.
prefixes := []string{"MOV", "KMOV", "VMOV"}
accept := false
for _, prefix := range prefixes {
accept = strings.HasPrefix(i.Opcode, prefix) || accept
}
if !accept {
return false
}
// Exclude some cases based on instruction descriptions.
exclude := []string{"Packed", "Duplicate", "Aligned", "Hint", "Swapping"}
for _, substring := range exclude {
if strings.Contains(i.Summary, substring) {
return false
}
}
return true
}
type typecase struct {
Mask string
Op string
Value string
}
func typecases(i inst.Instruction) []typecase {
switch {
case strings.Contains(i.Summary, "Floating-Point"):
return []typecase{
{"types.IsFloat", "!=", "0"},
}
case strings.Contains(i.Summary, "Zero-Extend"):
return []typecase{
{"(types.IsInteger|types.IsUnsigned)", "==", "(types.IsInteger|types.IsUnsigned)"},
{"types.IsBoolean", "!=", "0"},
}
case strings.Contains(i.Summary, "Sign-Extension"):
return []typecase{
{"(types.IsInteger|types.IsUnsigned)", "==", "types.IsInteger"},
}
default:
return []typecase{
{"(types.IsInteger|types.IsBoolean)", "!=", "0"},
}
}
}
type movform struct{ A, B string }
func movforms(i inst.Instruction) ([]movform, error) {
var mfs []movform
for _, f := range i.Forms {
if f.Arity() != 2 {
continue
}
mf := movform{
A: f.Operands[0].Type,
B: f.Operands[1].Type,
}
if opsize[mf.A] < 0 || opsize[mf.B] < 0 {
continue
}
if opsize[mf.A] == 0 || opsize[mf.B] == 0 {
return nil, errors.New("unknown operand type")
}
mfs = append(mfs, mf)
}
return mfs, nil
}
var opsize = map[string]int8{
"imm8": -1,
"imm16": -1,
"imm32": -1,
"imm64": -1,
"r8": 1,
"r16": 2,
"r32": 4,
"r64": 8,
"xmm": 16,
"ymm": 32,
"zmm": 64,
"m8": 1,
"m16": 2,
"m32": 4,
"m64": 8,
"m128": 16,
"m256": 32,
"m512": 64,
"k": 8,
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/optab.go 0000664 0000000 0000000 00000017174 14370657153 0023410 0 ustar 00root root 0000000 0000000 package gen
import (
"fmt"
"sort"
"strconv"
"strings"
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/printer"
)
type optab struct {
prnt.Generator
cfg printer.Config
table *Table
}
// NewOptab builds the operator table. This contains a more compact
// representation of the instruction database, containing the data needed for
// instruction builders to match against provided operands, and build the
// selected instruction.
func NewOptab(cfg printer.Config) Interface {
return GoFmt(&optab{cfg: cfg})
}
func (t *optab) Generate(is []inst.Instruction) ([]byte, error) {
t.Printf("// %s\n\n", t.cfg.GeneratedWarning())
t.Printf("package x86\n\n")
t.Printf("import (\n")
t.Printf("\t%q\n", api.ImportPath(api.OperandPackage))
t.Printf("\t%q\n", api.ImportPath(api.RegisterPackage))
t.Printf(")\n\n")
// Generate instruction data table.
t.table = NewTable(is)
// Size constants.
t.maxOperands(is)
// Types.
t.operandTypeEnum(is)
t.implicitRegisterEnum(is)
t.enum(t.table.Suffix())
t.suffixesType(is)
t.suffixesClassEnum(is)
t.isasEnum(is)
t.opcodeEnum(is)
// Forms table.
t.forms(is)
return t.Result()
}
func (t *optab) maxOperands(is []inst.Instruction) {
max := 0
for _, i := range inst.Instructions {
for _, f := range i.Forms {
a := len(f.Operands) + len(f.ImplicitOperands)
if a > max {
max = a
}
}
}
t.Comment("maxoperands is the maximum number of operands in an instruction form, including implicit operands.")
t.Printf("const maxoperands = %d\n\n", max)
}
func (t *optab) operandTypeEnum(is []inst.Instruction) {
// Operand type enum.
e := t.table.OperandType()
t.enum(e)
// Operand match function.
types := inst.OperandTypes(is)
t.Printf("func (%s %s) Match(op %s) bool {\n", e.Receiver(), e.Name(), api.OperandType)
t.Printf("\tswitch %s {\n", e.Receiver())
t.Printf("\t\tdefault: return false\n")
for _, typ := range types {
t.Printf("\t\tcase %s: return %s(op)\n", t.table.OperandTypeConst(typ), api.CheckerName(typ))
}
t.Printf("\t}\n")
t.Printf("}\n\n")
}
func (t *optab) implicitRegisterEnum(is []inst.Instruction) {
// Implicit register enum.
e := t.table.ImplicitRegister()
t.enum(e)
// Register conversion function.
registers := inst.ImplicitRegisters(is)
t.Printf("func (%s %s) Register() %s {\n", e.Receiver(), e.Name(), api.RegisterType)
t.Printf("\tswitch %s {\n", e.Receiver())
t.Printf("\t\tdefault: panic(\"unexpected implicit register type\")\n")
for _, r := range registers {
t.Printf("\t\tcase %s: return %s\n", t.table.ImplicitRegisterConst(r), api.ImplicitRegister(r))
}
t.Printf("\t}\n")
t.Printf("}\n\n")
}
func (t *optab) suffixesType(is []inst.Instruction) {
// Declare the type as an array. This requires us to know the maximum number
// of suffixes an instruction can have.
max := 0
for _, class := range inst.SuffixesClasses(is) {
for _, suffixes := range class {
if len(suffixes) > max {
max = len(suffixes)
}
}
}
t.Comment("maxsuffixes is the maximum number of suffixes an instruction can have.")
t.Printf("const maxsuffixes = %d\n\n", max)
name := t.table.SuffixesTypeName()
t.Printf("type %s [maxsuffixes]%s\n", name, t.table.Suffix().Name())
// Conversion function to list of strings.
mapname := name + "stringsmap"
t.Printf("func (s %s) Strings() []string {\n", name)
t.Printf("return %s[s]", mapname)
t.Printf("}\n")
var entries []string
for _, class := range inst.SuffixesClasses(is) {
for _, suffixes := range class {
entry := fmt.Sprintf("%s: %s", t.table.SuffixesList(suffixes), stringsliteral(suffixes.Strings()))
entries = append(entries, entry)
}
}
t.Printf("var %s = map[%s][]string{\n", mapname, name)
sort.Strings(entries)
for _, entry := range entries {
t.Printf("%s,\n", entry)
}
t.Printf("}\n")
}
func (t *optab) suffixesClassEnum(is []inst.Instruction) {
// Suffixes class enum.
e := t.table.SuffixesClass()
t.enum(e)
// Mapping method to the set of accepted suffixes.
sets := map[string]string{}
for key, class := range inst.SuffixesClasses(is) {
var entries []string
for _, suffixes := range class {
entry := fmt.Sprintf("%s: true", t.table.SuffixesConst(suffixes))
entries = append(entries, entry)
}
sort.Strings(entries)
sets[api.SuffixesClassIdentifier(key)] = "{" + strings.Join(entries, ", ") + "}"
}
settype := fmt.Sprintf("map[%s]bool", t.table.SuffixesTypeName())
t.mapping(e, "SuffixesSet", settype, "nil", sets)
}
func (t *optab) isasEnum(is []inst.Instruction) {
// ISAs enum.
e := t.table.ISAs()
t.enum(e)
// Mapping method to produce the list of ISAs.
lists := map[string]string{}
for _, isas := range inst.ISACombinations(is) {
lists[api.ISAsIdentifier(isas)] = stringsliteral(isas)
}
t.mapping(e, "List", "[]string", "nil", lists)
}
func (t *optab) opcodeEnum(is []inst.Instruction) {
e := t.table.Opcode()
t.enum(e)
t.stringmethod(e)
}
func (t *optab) forms(is []inst.Instruction) {
// We require all instructions for a given opcode to be in a contiguous
// block. This is likely true already but we'll make a sorted copy to ensure
// the optab is robust to changes elsewhere.
is = append([]inst.Instruction(nil), is...)
sort.Slice(is, func(i, j int) bool {
return is[i].Opcode < is[j].Opcode
})
// Output instruction forms table.
table := "forms"
t.Printf("var %s = []form{\n", table)
for _, i := range is {
for _, f := range i.Forms {
t.Printf("{")
// Basic properties.
t.Printf("%s, ", t.table.OpcodeConst(i.Opcode))
t.Printf("%s, ", t.table.SuffixesClassConst(f.SuffixesClass()))
t.Printf("%s, ", Features(i, f))
t.Printf("%s, ", t.table.ISAsConst(f.ISA))
// Operands.
t.Printf("%d, ", len(f.Operands))
t.Printf("oprnds{")
for _, op := range f.Operands {
t.Printf(
"{uint8(%s),false,%s},",
t.table.OperandTypeConst(op.Type),
Action(op.Action),
)
}
for _, op := range f.ImplicitOperands {
t.Printf(
"{uint8(%s),true,%s},",
t.table.ImplicitRegisterConst(op.Register),
Action(op.Action),
)
}
t.Printf("}")
t.Printf("},\n")
}
}
t.Printf("}\n\n")
// Build mapping from opcode to corresponding forms.
forms := map[string]string{}
n := 0
for _, i := range is {
e := n + len(i.Forms)
forms[i.Opcode] = fmt.Sprintf("%s[%d:%d]", table, n, e)
n = e
}
t.mapping(t.table.Opcode(), "Forms", "[]form", "nil", forms)
}
func (t *optab) enum(e *Enum) {
// Type declaration.
t.Comment(e.Doc()...)
t.Printf("type %s %s\n\n", e.Name(), e.UnderlyingType())
// Supported values.
t.Printf("const (\n")
t.Printf("\t%s %s = iota\n", e.None(), e.name)
for _, name := range e.ConstNames() {
t.Printf("\t%s\n", name)
}
t.Printf("\t%s\n", e.MaxName())
t.Printf(")\n\n")
}
func (t *optab) mapping(e *Enum, name, ret, zero string, to map[string]string) {
table := strings.ToLower(e.Name() + name + "table")
r := e.Receiver()
t.Printf("func (%s %s) %s() %s {\n", r, e.Name(), name, ret)
t.Printf("if %s < %s && %s < %s {\n", e.None(), r, r, e.MaxName())
t.Printf("return %s[%s-1]\n", table, r)
t.Printf("}\n")
t.Printf("return %s\n", zero)
t.Printf("}\n\n")
t.Printf("var %s = []%s{\n", table, ret)
for _, value := range e.Values() {
t.Printf("\t%s,\n", to[value])
}
t.Printf("}\n\n")
}
func (t *optab) stringmethod(e *Enum) {
s := map[string]string{}
for _, value := range e.Values() {
s[value] = strconv.Quote(value)
}
t.mapping(e, "String", "string", `""`, s)
}
func stringsliteral(ss []string) string {
if ss == nil {
return "nil"
}
var quoted []string
for _, s := range ss {
quoted = append(quoted, strconv.Quote(s))
}
return "{" + strings.Join(quoted, ", ") + "}"
}
golang-github-mmcloughlin-avo-0.5.0/internal/gen/testing.go 0000664 0000000 0000000 00000005120 14370657153 0023744 0 ustar 00root root 0000000 0000000 package gen
import (
"github.com/mmcloughlin/avo/internal/api"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/prnt"
)
// DeclareTestArguments prints a block of variables declaring a valid operand of
// each operand type.
func DeclareTestArguments(g *prnt.Generator) {
g.Printf("var (\n")
for _, arg := range validArgs {
g.Printf("\t%s operand.Op = %s\n", TestArgumentName(arg.Type), arg.Code)
}
g.Printf(")\n")
}
// TestSignature returns a function signature with arguments matching the given
// instruction form. Requires variables declared by DeclareTestArguments().
func TestSignature(f inst.Form) api.Signature {
var names []string
for _, op := range f.Operands {
names = append(names, TestArgumentName(op.Type))
}
return api.ArgsList(names)
}
// TestArgumentName returns the name of the variable of operand type t declared
// by DeclareTestArguments().
func TestArgumentName(t string) string {
return "op" + t
}
var validArgs = []struct {
Type string
Code string
}{
// Immediates
{"1", "operand.Imm(1)"},
{"3", "operand.Imm(3)"},
{"imm2u", "operand.Imm(3)"},
{"imm8", "operand.Imm(math.MaxInt8)"},
{"imm16", "operand.Imm(math.MaxInt16)"},
{"imm32", "operand.Imm(math.MaxInt32)"},
{"imm64", "operand.Imm(math.MaxInt64)"},
// Registers
{"al", "reg.AL"},
{"cl", "reg.CL"},
{"ax", "reg.AX"},
{"eax", "reg.EAX"},
{"rax", "reg.RAX"},
{"r8", "reg.CH"},
{"r16", "reg.R9W"},
{"r32", "reg.R10L"},
{"r64", "reg.R11"},
{"xmm0", "reg.X0"},
{"xmm", "reg.X7"},
{"ymm", "reg.Y15"},
{"zmm", "reg.Z31"},
{"k", "reg.K7"},
// Memory
{"m", "operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}"},
{"m8", "operand.Mem{Base: reg.BL, Index: reg.CH, Scale: 1}"},
{"m16", "operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}"},
{"m32", "operand.Mem{Base: reg.EBX, Index: reg.ECX, Scale: 4}"},
{"m64", "operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}"},
{"m128", "operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}"},
{"m256", "operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}"},
{"m512", "operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}"},
// Vector memory
{"vm32x", "operand.Mem{Base: reg.R13, Index: reg.X4, Scale: 1}"},
{"vm64x", "operand.Mem{Base: reg.R13, Index: reg.X8, Scale: 1}"},
{"vm32y", "operand.Mem{Base: reg.R13, Index: reg.Y4, Scale: 1}"},
{"vm64y", "operand.Mem{Base: reg.R13, Index: reg.Y8, Scale: 1}"},
{"vm32z", "operand.Mem{Base: reg.R13, Index: reg.Z4, Scale: 1}"},
{"vm64z", "operand.Mem{Base: reg.R13, Index: reg.Z8, Scale: 1}"},
// Relative
{"rel8", "operand.Rel(math.MaxInt8)"},
{"rel32", "operand.LabelRef(\"lbl\")"},
}
golang-github-mmcloughlin-avo-0.5.0/internal/github/ 0000775 0000000 0000000 00000000000 14370657153 0022453 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/github/client.go 0000664 0000000 0000000 00000005455 14370657153 0024271 0 ustar 00root root 0000000 0000000 // Package github provides a client for the Github REST API.
package github
import (
"context"
"encoding/json"
"errors"
"fmt"
"net/http"
"os"
)
// Client for the Github REST API.
type Client struct {
client *http.Client
base string
token string
}
// Option configures a Github client.
type Option func(*Client)
// WithHTTPClient configures the HTTP client that should be used for Github API
// requests.
func WithHTTPClient(h *http.Client) Option {
return func(c *Client) { c.client = h }
}
// WithToken configures a Client with an authentication token for Github API
// requests.
func WithToken(token string) Option {
return func(c *Client) { c.token = token }
}
// WithTokenFromEnvironment configures a Client using the GITHUB_TOKEN
// environment variable.
func WithTokenFromEnvironment() Option {
return WithToken(os.Getenv("GITHUB_TOKEN"))
}
// NewClient initializes a client using the given HTTP client.
func NewClient(opts ...Option) *Client {
c := &Client{
client: http.DefaultClient,
base: "https://api.github.com",
}
for _, opt := range opts {
opt(c)
}
return c
}
// Repository gets information about the given Github repository.
func (c *Client) Repository(ctx context.Context, owner, name string) (*Repository, error) {
// Build request.
u := c.base + "/repos/" + owner + "/" + name
req, err := http.NewRequestWithContext(ctx, http.MethodGet, u, nil)
if err != nil {
return nil, err
}
// Execute.
repo := &Repository{}
if err := c.request(req, repo); err != nil {
return nil, err
}
return repo, nil
}
// Issue gets information about the given Github issue.
func (c *Client) Issue(ctx context.Context, owner, name string, number int) (*Issue, error) {
// Build request.
u := fmt.Sprintf("%s/repos/%s/%s/issues/%d", c.base, owner, name, number)
req, err := http.NewRequestWithContext(ctx, http.MethodGet, u, nil)
if err != nil {
return nil, err
}
// Execute.
issue := &Issue{}
if err := c.request(req, issue); err != nil {
return nil, err
}
return issue, nil
}
func (c *Client) request(req *http.Request, payload interface{}) (err error) {
// Add common headers.
if c.token != "" {
req.Header.Set("Authorization", "Bearer "+c.token)
}
req.Header.Set("Accept", "application/vnd.github.v3+json")
// Execute the request.
res, err := c.client.Do(req)
if err != nil {
return err
}
defer func() {
if errc := res.Body.Close(); errc != nil && err == nil {
err = errc
}
}()
// Check status.
if res.StatusCode != http.StatusOK {
return fmt.Errorf("http status %d: %s", res.StatusCode, http.StatusText(res.StatusCode))
}
// Parse response body.
d := json.NewDecoder(res.Body)
if err := d.Decode(payload); err != nil {
return err
}
// Should not have trailing data.
if d.More() {
return errors.New("unexpected extra data after JSON")
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/internal/github/client_test.go 0000664 0000000 0000000 00000001534 14370657153 0025322 0 ustar 00root root 0000000 0000000 package github
import (
"context"
"encoding/json"
"net/http"
"testing"
"github.com/mmcloughlin/avo/internal/test"
)
func TestClientRepository(t *testing.T) {
test.RequiresNetwork(t)
ctx := context.Background()
g := NewClient(WithHTTPClient(http.DefaultClient), WithTokenFromEnvironment())
r, err := g.Repository(ctx, "golang", "go")
if err != nil {
t.Fatal(err)
}
j, err := json.MarshalIndent(r, "", "\t")
if err != nil {
t.Fatal(err)
}
t.Logf("repository = %s", j)
}
func TestClientIssue(t *testing.T) {
test.RequiresNetwork(t)
ctx := context.Background()
g := NewClient(WithHTTPClient(http.DefaultClient), WithTokenFromEnvironment())
r, err := g.Issue(ctx, "octocat", "hello-world", 42)
if err != nil {
t.Fatal(err)
}
j, err := json.MarshalIndent(r, "", "\t")
if err != nil {
t.Fatal(err)
}
t.Logf("issue = %s", j)
}
golang-github-mmcloughlin-avo-0.5.0/internal/github/models.go 0000664 0000000 0000000 00000021152 14370657153 0024266 0 ustar 00root root 0000000 0000000 package github
import "time"
// Repository is a github repository.
type Repository struct {
ID int `json:"id"`
NodeID string `json:"node_id"`
Name string `json:"name"`
FullName string `json:"full_name"`
Private bool `json:"private"`
Owner *User `json:"owner"`
HTMLURL string `json:"html_url"`
Description string `json:"description"`
Fork bool `json:"fork"`
URL string `json:"url"`
ForksURL string `json:"forks_url"`
KeysURL string `json:"keys_url"`
CollaboratorsURL string `json:"collaborators_url"`
TeamsURL string `json:"teams_url"`
HooksURL string `json:"hooks_url"`
IssueEventsURL string `json:"issue_events_url"`
EventsURL string `json:"events_url"`
AssigneesURL string `json:"assignees_url"`
BranchesURL string `json:"branches_url"`
TagsURL string `json:"tags_url"`
BlobsURL string `json:"blobs_url"`
GitTagsURL string `json:"git_tags_url"`
GitRefsURL string `json:"git_refs_url"`
TreesURL string `json:"trees_url"`
StatusesURL string `json:"statuses_url"`
LanguagesURL string `json:"languages_url"`
StargazersURL string `json:"stargazers_url"`
ContributorsURL string `json:"contributors_url"`
SubscribersURL string `json:"subscribers_url"`
SubscriptionURL string `json:"subscription_url"`
CommitsURL string `json:"commits_url"`
GitCommitsURL string `json:"git_commits_url"`
CommentsURL string `json:"comments_url"`
IssueCommentURL string `json:"issue_comment_url"`
ContentsURL string `json:"contents_url"`
CompareURL string `json:"compare_url"`
MergesURL string `json:"merges_url"`
ArchiveURL string `json:"archive_url"`
DownloadsURL string `json:"downloads_url"`
IssuesURL string `json:"issues_url"`
PullsURL string `json:"pulls_url"`
MilestonesURL string `json:"milestones_url"`
NotificationsURL string `json:"notifications_url"`
LabelsURL string `json:"labels_url"`
ReleasesURL string `json:"releases_url"`
DeploymentsURL string `json:"deployments_url"`
CreatedAt time.Time `json:"created_at"`
UpdatedAt time.Time `json:"updated_at"`
PushedAt time.Time `json:"pushed_at"`
GitURL string `json:"git_url"`
SSHURL string `json:"ssh_url"`
CloneURL string `json:"clone_url"`
SvnURL string `json:"svn_url"`
Homepage string `json:"homepage"`
Size int `json:"size"`
StargazersCount int `json:"stargazers_count"`
WatchersCount int `json:"watchers_count"`
Language string `json:"language"`
HasIssues bool `json:"has_issues"`
HasProjects bool `json:"has_projects"`
HasDownloads bool `json:"has_downloads"`
HasWiki bool `json:"has_wiki"`
HasPages bool `json:"has_pages"`
ForksCount int `json:"forks_count"`
MirrorURL string `json:"mirror_url"`
Archived bool `json:"archived"`
Disabled bool `json:"disabled"`
OpenIssuesCount int `json:"open_issues_count"`
License *License `json:"license"`
AllowForking bool `json:"allow_forking"`
IsTemplate bool `json:"is_template"`
Topics []string `json:"topics"`
Visibility string `json:"visibility"`
Forks int `json:"forks"`
OpenIssues int `json:"open_issues"`
Watchers int `json:"watchers"`
DefaultBranch string `json:"default_branch"`
Organization *Organization `json:"organization"`
NetworkCount int `json:"network_count"`
SubscribersCount int `json:"subscribers_count"`
}
// Issue is a Github issue.
type Issue struct {
URL string `json:"url"`
RepositoryURL string `json:"repository_url"`
LabelsURL string `json:"labels_url"`
CommentsURL string `json:"comments_url"`
EventsURL string `json:"events_url"`
HTMLURL string `json:"html_url"`
ID int `json:"id"`
NodeID string `json:"node_id"`
Number int `json:"number"`
Title string `json:"title"`
User *User `json:"user"`
Labels []*Label `json:"labels"`
State string `json:"state"`
Locked bool `json:"locked"`
Assignee *User `json:"assignee"`
Assignees []*User `json:"assignees"`
Comments int `json:"comments"`
CreatedAt time.Time `json:"created_at"`
UpdatedAt time.Time `json:"updated_at"`
ClosedAt time.Time `json:"closed_at"`
AuthorAssociation string `json:"author_association"`
ActiveLockReason string `json:"active_lock_reason"`
PullRequestLinks *PullRequestLinks `json:"pull_request"`
Body string `json:"body"`
ClosedBy *User `json:"closed_by"`
Reactions *Reactions `json:"reactions"`
TimelineURL string `json:"timeline_url"`
}
// Label is a Github label on an issue or PR.
type Label struct {
ID int `json:"id"`
NodeID string `json:"node_id"`
URL string `json:"url"`
Name string `json:"name"`
Color string `json:"color"`
Default bool `json:"default"`
Description string `json:"description"`
}
// Reactions summarizes Github reactions.
type Reactions struct {
URL string `json:"url"`
TotalCount int `json:"total_count"`
PlusOne int `json:"+1"`
MinusOne int `json:"-1"`
Laugh int `json:"laugh"`
Hooray int `json:"hooray"`
Confused int `json:"confused"`
Heart int `json:"heart"`
Rocket int `json:"rocket"`
Eyes int `json:"eyes"`
}
// PullRequestLinks are attached to an Issue object when it represents a PR.
type PullRequestLinks struct {
URL string `json:"url"`
HTMLURL string `json:"html_url"`
DiffURL string `json:"diff_url"`
PatchURL string `json:"patch_url"`
}
// User is a Github user.
type User struct {
Login string `json:"login"`
ID int `json:"id"`
NodeID string `json:"node_id"`
AvatarURL string `json:"avatar_url"`
GravatarID string `json:"gravatar_id"`
URL string `json:"url"`
HTMLURL string `json:"html_url"`
FollowersURL string `json:"followers_url"`
FollowingURL string `json:"following_url"`
GistsURL string `json:"gists_url"`
StarredURL string `json:"starred_url"`
SubscriptionsURL string `json:"subscriptions_url"`
OrganizationsURL string `json:"organizations_url"`
ReposURL string `json:"repos_url"`
EventsURL string `json:"events_url"`
ReceivedEventsURL string `json:"received_events_url"`
Type string `json:"type"`
SiteAdmin bool `json:"site_admin"`
}
// Organization is a Github organization.
type Organization struct {
Login string `json:"login"`
ID int `json:"id"`
NodeID string `json:"node_id"`
AvatarURL string `json:"avatar_url"`
GravatarID string `json:"gravatar_id"`
URL string `json:"url"`
HTMLURL string `json:"html_url"`
FollowersURL string `json:"followers_url"`
FollowingURL string `json:"following_url"`
GistsURL string `json:"gists_url"`
StarredURL string `json:"starred_url"`
SubscriptionsURL string `json:"subscriptions_url"`
OrganizationsURL string `json:"organizations_url"`
ReposURL string `json:"repos_url"`
EventsURL string `json:"events_url"`
ReceivedEventsURL string `json:"received_events_url"`
Type string `json:"type"`
SiteAdmin bool `json:"site_admin"`
}
// License is an open source license.
type License struct {
Key string `json:"key"`
Name string `json:"name"`
SPDXID string `json:"spdx_id"`
URL string `json:"url"`
NodeID string `json:"node_id"`
}
golang-github-mmcloughlin-avo-0.5.0/internal/inst/ 0000775 0000000 0000000 00000000000 14370657153 0022146 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/inst/doc.go 0000664 0000000 0000000 00000000076 14370657153 0023245 0 ustar 00root root 0000000 0000000 // Package inst is the avo instruction database.
package inst
golang-github-mmcloughlin-avo-0.5.0/internal/inst/stress_test.go 0000664 0000000 0000000 00000000346 14370657153 0025062 0 ustar 00root root 0000000 0000000 // The godata test relies on a huge generated file, so we limit it to a
// stress-test only build.
//go:build stress
// +build stress
package inst
//go:generate avogen -bootstrap -data ../data -output ztable_test.go godatatest
golang-github-mmcloughlin-avo-0.5.0/internal/inst/table.go 0000664 0000000 0000000 00000005766 14370657153 0023602 0 ustar 00root root 0000000 0000000 package inst
import (
"sort"
"strings"
)
//go:generate avogen -bootstrap -data ../data -output ztable.go godata
// Lookup returns the instruction with the given opcode. Boolean return value
// indicates whether the instruction was found.
func Lookup(opcode string) (Instruction, bool) {
for _, i := range Instructions {
if i.Opcode == opcode {
return i, true
}
}
return Instruction{}, false
}
// OperandTypes returns all the operand types that appear in the provided
// instructions.
func OperandTypes(is []Instruction) []string {
set := map[string]bool{}
for _, i := range is {
for _, f := range i.Forms {
for _, op := range f.Operands {
set[op.Type] = true
}
}
}
return sortedslice(set)
}
// ImplicitRegisters returns all the registers that appear as implicit operands
// in the provided instructions.
func ImplicitRegisters(is []Instruction) []string {
set := map[string]bool{}
for _, i := range is {
for _, f := range i.Forms {
for _, op := range f.ImplicitOperands {
set[op.Register] = true
}
}
}
return sortedslice(set)
}
// UniqueSuffixes returns all the non-empty suffixes that appear in the provided
// instructions.
func UniqueSuffixes(is []Instruction) []Suffix {
// Collect set.
set := map[Suffix]bool{}
for _, i := range is {
for _, f := range i.Forms {
for _, suffixes := range f.SupportedSuffixes() {
for _, suffix := range suffixes {
set[suffix] = true
}
}
}
}
// Convert to sorted slice.
suffixes := make([]Suffix, 0, len(set))
for suffix := range set {
suffixes = append(suffixes, suffix)
}
sort.Slice(suffixes, func(i, j int) bool {
return suffixes[i] < suffixes[j]
})
return suffixes
}
// SuffixesClasses returns all possible classes of suffix combinations.
func SuffixesClasses(is []Instruction) map[string][]Suffixes {
classes := map[string][]Suffixes{}
for _, i := range is {
for _, f := range i.Forms {
class := f.SuffixesClass()
if _, ok := classes[class]; ok {
continue
}
classes[class] = f.SupportedSuffixes()
}
}
return classes
}
// ISAs returns all the unique ISAs seen in the given instructions.
func ISAs(is []Instruction) []string {
set := map[string]bool{}
for _, i := range is {
for _, f := range i.Forms {
for _, isa := range f.ISA {
set[isa] = true
}
}
}
return sortedslice(set)
}
// ISACombinations returns all the unique combinations of ISAs seen in the given
// instructions.
func ISACombinations(is []Instruction) [][]string {
var combinations [][]string
seen := map[string]bool{}
for _, i := range is {
for _, f := range i.Forms {
isas := append([]string(nil), f.ISA...)
sort.Strings(isas)
key := strings.Join(isas, ",")
if !seen[key] {
combinations = append(combinations, isas)
seen[key] = true
}
}
}
return combinations
}
// sortedslice builds a sorted slice of strings from a set.
func sortedslice(set map[string]bool) []string {
ss := make([]string, 0, len(set))
for s := range set {
ss = append(ss, s)
}
sort.Strings(ss)
return ss
}
golang-github-mmcloughlin-avo-0.5.0/internal/inst/table_test.go 0000664 0000000 0000000 00000016516 14370657153 0024634 0 ustar 00root root 0000000 0000000 package inst_test
import (
"os"
"reflect"
"sort"
"strings"
"testing"
"github.com/mmcloughlin/avo/internal/gen"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/test"
"github.com/mmcloughlin/avo/printer"
)
func TestHaveInstructions(t *testing.T) {
n := len(inst.Instructions)
t.Logf("number of instructions = %d", n)
if n == 0 {
t.Fatalf("no instructions")
}
}
func TestOpcodeDupes(t *testing.T) {
count := map[string]int{}
for _, i := range inst.Instructions {
count[i.Opcode]++
}
for opcode, n := range count {
if n > 1 {
t.Errorf("opcode %s appears %d times", opcode, n)
}
}
}
func TestFormDupes(t *testing.T) {
for _, i := range inst.Instructions {
if HasFormDupe(i) {
t.Errorf("%s has duplicate forms", i.Opcode)
}
}
}
func HasFormDupe(i inst.Instruction) bool {
n := len(i.Forms)
for a := 0; a < n; a++ {
for b := a + 1; b < n; b++ {
if reflect.DeepEqual(i.Forms[a], i.Forms[b]) {
return true
}
}
}
return false
}
func TestInstructionProperties(t *testing.T) {
for _, i := range inst.Instructions {
if len(i.Opcode) == 0 {
t.Errorf("empty opcode")
}
if len(i.Forms) == 0 {
t.Errorf("instruction %s has no forms", i.Opcode)
}
if len(i.Arities()) == 0 {
t.Errorf("instruction %s has empty arities list", i.Opcode)
}
if i.IsNiladic() && len(i.Forms) != 1 {
t.Errorf("%s breaks our expectation that niladic functions have one form", i.Opcode)
}
}
}
func TestHaveSuffixes(t *testing.T) {
for _, i := range inst.Instructions {
for _, f := range i.Forms {
if len(f.SupportedSuffixes()) == 0 {
t.Errorf("%s: no supported suffixes", i.Opcode)
}
}
}
}
func TestAcceptsSuffixes(t *testing.T) {
// Verify consistency between the AcceptsSuffixes and SupportedSuffixes methods.
for _, i := range inst.Instructions {
for _, f := range i.Forms {
expect := false
for _, suffixes := range f.SupportedSuffixes() {
if len(suffixes) > 0 {
expect = true
}
}
if got := f.AcceptsSuffixes(); got != expect {
t.Errorf("%s: AcceptsSuffixes() = %v; expect %v", i.Opcode, got, expect)
}
}
}
}
func TestSuffixesClasses(t *testing.T) {
// Verify that all instructions in a suffix class support the same suffixes.
reps := map[string][]inst.Suffixes{}
for _, i := range inst.Instructions {
for _, f := range i.Forms {
class := f.SuffixesClass()
expect, ok := reps[class]
if !ok {
t.Logf("new class %q: representative from instruction %s", class, i.Opcode)
reps[class] = f.SupportedSuffixes()
continue
}
got := f.SupportedSuffixes()
if !reflect.DeepEqual(expect, got) {
t.Fatalf("suffixes mismatch for class %q", class)
}
}
}
}
func TestSuffixesHaveSummaries(t *testing.T) {
set := map[inst.Suffix]bool{}
for _, i := range inst.Instructions {
for _, f := range i.Forms {
for _, suffixes := range f.SupportedSuffixes() {
for _, suffix := range suffixes {
set[suffix] = true
}
}
}
}
for suffix := range set {
if suffix.Summary() == "" {
t.Errorf("suffix %q missing summary", suffix)
}
}
}
func TestISASorted(t *testing.T) {
for _, i := range inst.Instructions {
for _, f := range i.Forms {
if !sort.StringsAreSorted(f.ISA) {
t.Fatalf("%s: isa not sorted", i.Opcode)
}
}
}
}
func TestAssembles(t *testing.T) {
g := gen.NewAsmTest(printer.NewArgvConfig())
b, err := g.Generate(inst.Instructions)
if err != nil {
t.Fatal(err)
}
test.Assembles(t, b)
}
func TestLookup(t *testing.T) {
if _, found := inst.Lookup("CPUID"); !found {
t.Fatalf("missing CPUID")
}
if _, found := inst.Lookup(strings.Repeat("XXX", 13)); found {
t.Fatalf("lookup returns true on an absurd opcode")
}
}
func TestInstructionArities(t *testing.T) {
cases := map[string][]int{
"AESDEC": {2},
"EXTRACTPS": {3},
"SHRQ": {2, 3},
"VMOVHPD": {2, 3},
}
for opcode, expect := range cases {
i, ok := inst.Lookup(opcode)
if !ok {
t.Fatalf("could not find %s", opcode)
}
got := i.Arities()
if !reflect.DeepEqual(got, expect) {
t.Errorf("arity of %s is %v expected %v", opcode, got, expect)
}
}
}
func TestStdLibOpcodes(t *testing.T) {
b, err := os.ReadFile("testdata/stdlibopcodes.txt")
if err != nil {
t.Fatal(err)
}
opcodes := strings.Fields(string(b))
for _, opcode := range opcodes {
if _, found := inst.Lookup(opcode); !found {
t.Errorf("missing instruction %s (used in stdlib asm)", opcode)
}
}
}
func TestCancellingInputs(t *testing.T) {
// Expect all instruction forms with cancelling inputs to have two input operands of register type.
//
// Reference: https://github.com/Maratyszcza/PeachPy/blob/01d15157a973a4ae16b8046313ddab371ea582db/peachpy/x86_64/instructions.py#L136-L138
//
// assert len(input_operands) == 2, "Instruction forms with cancelling inputs must have two inputs"
// assert all(map(lambda op: isinstance(op, Register), input_operands)), \
// "Both inputs of instruction form with cancelling inputs must be registers"
//
for _, i := range inst.Instructions {
for _, f := range i.Forms {
if !f.CancellingInputs {
continue
}
if len(f.ImplicitOperands) > 0 {
t.Errorf("%s: expected no implicit operands", i.Opcode)
}
// Expect two register inputs.
n := 0
for _, op := range f.Operands {
if op.Action.Read() {
switch op.Type {
case "r8", "r16", "r32", "r64", "xmm", "ymm", "zmm":
n++
case "k":
// skip mask registers
default:
t.Errorf("%s: unexpected operand type %q for self-cancelling input", i.Opcode, op.Type)
}
}
}
if n < 2 {
t.Log(f)
t.Errorf("%s: expected at least two inputs for self-cancelling form", i.Opcode)
}
}
}
}
func TestFlagOperandTypes(t *testing.T) {
for _, i := range inst.Instructions {
for _, f := range i.Forms {
// Check for memory operands.
mem := false
for _, op := range f.Operands {
if strings.HasPrefix(op.Type, "m") {
mem = true
}
}
// Broadcast applies to memory instructions only.
if f.Broadcast && !mem {
t.Errorf("%s: expect broadcast form to have memory operand", i.Opcode)
}
// Embedded rounding must be register-only.
if f.EmbeddedRounding && mem {
t.Errorf("%s: embedded-rounding only supported for register-only forms", i.Opcode)
}
// Suppress all exceptions is register only.
if f.SuppressAllExceptions && mem {
t.Errorf("%s: embedded-rounding only supported for register-only forms", i.Opcode)
}
}
}
}
func TestFlagCombinations(t *testing.T) {
for _, i := range inst.Instructions {
for _, f := range i.Forms {
if f.EmbeddedRounding && f.SuppressAllExceptions {
t.Errorf("%s: embedded-rounding cannot be combined with suppress-all-exceptions", i.Opcode)
}
if f.Broadcast && f.EmbeddedRounding {
t.Errorf("%s: broadcast cannot be combined with embedded-rounding", i.Opcode)
}
if f.Broadcast && f.SuppressAllExceptions {
t.Errorf("%s: broadcast cannot be combined with suppress-all-exceptions", i.Opcode)
}
}
}
}
func TestZeroingHasMask(t *testing.T) {
for _, i := range inst.Instructions {
for _, f := range i.Forms {
if !f.Zeroing {
continue
}
// Expect mask operand.
mask := false
for _, op := range f.Operands {
if op.Type == "k" {
mask = true
}
}
if !mask {
t.Errorf("%s: expect mask operand if zeroing is enabled", i.Opcode)
}
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/inst/testdata/ 0000775 0000000 0000000 00000000000 14370657153 0023757 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/inst/testdata/stdlibopcodes.txt 0000664 0000000 0000000 00000002371 14370657153 0027361 0 ustar 00root root 0000000 0000000 ADCQ
ADCXQ
ADDB
ADDL
ADDQ
ADDSD
ADOXQ
AESDEC
AESDECLAST
AESENC
AESENCLAST
AESIMC
AESKEYGENASSIST
ANDB
ANDL
ANDNPD
ANDPD
ANDQ
BSFL
BSFQ
BSRQ
BSWAPL
BSWAPQ
BTQ
CALL
CMOVQCC
CMOVQCS
CMOVQEQ
CMOVQGT
CMOVQLT
CMOVQNE
CMPB
CMPL
CMPQ
CMPSD
CMPW
CMPXCHGL
CMPXCHGQ
COMISD
CRC32B
CRC32L
CRC32Q
CRC32W
CVTSD2SL
CVTSL2SD
CVTSQ2SD
CVTTSD2SQ
DECB
DECQ
DIVL
DIVQ
DIVSD
IMUL3Q
IMULQ
INCB
INCQ
INT
JA
JAE
JB
JBE
JC
JCC
JE
JEQ
JG
JGE
JGT
JHI
JL
JLE
JLS
JLT
JMP
JNC
JNE
JNZ
JZ
LDMXCSR
LEAL
LEAQ
MAXSD
MINSD
MOVAPD
MOVAPS
MOVB
MOVBLZX
MOVBQZX
MOVD
MOVL
MOVLQSX
MOVLQZX
MOVO
MOVOA
MOVOU
MOVQ
MOVSD
MOVUPS
MOVW
MULL
MULQ
MULSD
MULXQ
NEGQ
NOTL
NOTQ
ORB
ORL
ORPD
ORQ
PADDD
PADDL
PAND
PANDN
PCLMULQDQ
PCMPEQB
PCMPEQL
PCMPESTRI
PEXTRB
PEXTRD
PINSRB
PINSRD
PINSRQ
PINSRW
PMOVMSKB
POPCNTL
POPQ
PREFETCHNTA
PSHUFB
PSHUFD
PSHUFHW
PSHUFL
PSLLDQ
PSLLL
PSLLQ
PSRAL
PSRLDQ
PSRLL
PSRLQ
PSUBL
PUNPCKLBW
PUSHQ
PXOR
RCRQ
RORXL
RORXQ
SALQ
SARQ
SBBQ
SETEQ
SETGT
SETHI
SHLL
SHLQ
SHRL
SHRQ
SHUFPS
SQRTSD
STMXCSR
SUBL
SUBQ
SUBSD
TESTB
TESTL
TESTQ
TESTW
VADDSD
VFMADD213SD
VFNMADD231SD
VMOVDQA
VMOVDQU
VMOVNTDQ
VPADDD
VPADDQ
VPALIGNR
VPAND
VPBLENDD
VPBROADCASTB
VPCMPEQB
VPERM2F128
VPERM2I128
VPMOVMSKB
VPOR
VPSHUFB
VPSHUFD
VPSLLD
VPSLLQ
VPSRLD
VPSRLDQ
VPSRLQ
VPTEST
VPXOR
XADDL
XADDQ
XCHGL
XCHGQ
XORB
XORL
XORPS
XORQ
golang-github-mmcloughlin-avo-0.5.0/internal/inst/types.go 0000664 0000000 0000000 00000020431 14370657153 0023641 0 ustar 00root root 0000000 0000000 package inst
import (
"sort"
"strings"
)
// Instruction represents an x86 instruction.
type Instruction struct {
Opcode string // Golang assembly mnemonic
AliasOf string // Opcode of instruction that this is an alias for
Summary string // Description of the instruction
Forms // Accepted operand forms
}
// IsTerminal reports whether the instruction exits a function.
func (i Instruction) IsTerminal() bool {
// TODO(mbm): how about the RETF* instructions
return i.Opcode == "RET"
}
// IsBranch reports whether the instruction is a branch; that is, if it can
// cause control flow to jump to another location.
func (i Instruction) IsBranch() bool {
if i.Opcode == "CALL" {
return false
}
for _, f := range i.Forms {
for _, op := range f.Operands {
if strings.HasPrefix(op.Type, "rel") {
return true
}
}
}
return false
}
// IsConditionalBranch reports whether the instruction branches dependent on some condition.
func (i Instruction) IsConditionalBranch() bool {
return i.IsBranch() && i.Opcode != "JMP"
}
// Forms is a collection of instruction forms.
type Forms []Form
// Arities returns the unique arities among the instruction forms.
func (fs Forms) Arities() []int {
s := map[int]bool{}
for _, f := range fs {
s[f.Arity()] = true
}
a := make([]int, 0, len(s))
for n := range s {
a = append(a, n)
}
sort.Ints(a)
return a
}
// Arity is a convenience for returning the unique instruction arity when you
// know it is not variadic. Panics for a variadic instruction.
func (fs Forms) Arity() int {
if fs.IsVariadic() {
panic("variadic")
}
a := fs.Arities()
return a[0]
}
// IsVariadic reports whether the instruction has more than one arity.
func (fs Forms) IsVariadic() bool {
return len(fs.Arities()) > 1
}
// IsNiladic reports whether the instruction takes no operands.
func (fs Forms) IsNiladic() bool {
a := fs.Arities()
return len(a) == 1 && a[0] == 0
}
// Form specifies one accepted set of operands for an instruction.
type Form struct {
// Instruction sets this instruction form requires.
ISA []string
// Operands required for this form.
Operands []Operand
// Registers read or written but not explicitly passed to the instruction.
ImplicitOperands []ImplicitOperand
// Encoding type required for this instruction form.
EncodingType EncodingType
// CancellingInputs indicates this instruction form has no dependency on the
// input operands when they refer to the same register. The classic example of
// this is "XORQ RAX, RAX", in which case the output has no dependence on the
// value of RAX. Instruction forms with cancelling inputs have only two input
// operands, which have the same register type.
CancellingInputs bool
// Zeroing indicates whether the instruction form uses AVX-512 zeroing. This
// is the .Z suffix in Go, usually indicated with {z} operand suffix in
// Intel manuals.
Zeroing bool
// EmbeddedRounding indicates whether the instruction form uses AVX-512
// embedded rounding. This is the RN_SAE, RZ_SAE, RD_SAE and RU_SAE suffixes
// in Go, usually indicated with {er} in Intel manuals.
EmbeddedRounding bool
// SuppressAllExceptions indicates whether the instruction form uses AVX-512
// "suppress all exceptions". This is the SAE suffix in Go, usually
// indicated with {sae} in Intel manuals.
SuppressAllExceptions bool
// Broadcast indicates whether the instruction form uses AVX-512
// broadcast. This is the BCST suffix in Go, usually indicated by operand
// types like "m64bcst" in Intel manuals.
Broadcast bool
}
// Arity returns the number of operands this form expects.
func (f Form) Arity() int {
return len(f.Operands)
}
// Signature returns the list of operand types.
func (f Form) Signature() []string {
s := make([]string, f.Arity())
for i, op := range f.Operands {
s[i] = op.Type
}
return s
}
// Clone the instruction form.
func (f Form) Clone() Form {
c := f
c.ISA = append([]string(nil), f.ISA...)
c.Operands = append([]Operand(nil), f.Operands...)
c.ImplicitOperands = append([]ImplicitOperand(nil), f.ImplicitOperands...)
return c
}
// AcceptsSuffixes reports whether this form takes any opcode suffixes.
func (f Form) AcceptsSuffixes() bool {
return f.Broadcast || f.EmbeddedRounding || f.SuppressAllExceptions || f.Zeroing
}
// SuffixesClass returns a key representing the class of instruction suffixes it
// accepts. All instructions sharing a suffix class accept the same suffixes.
func (f Form) SuffixesClass() string {
if !f.AcceptsSuffixes() {
return "nil"
}
var parts []string
for _, flag := range []struct {
Name string
Enabled bool
}{
{"er", f.EmbeddedRounding},
{"sae", f.SuppressAllExceptions},
{"bcst", f.Broadcast},
{"z", f.Zeroing},
} {
if flag.Enabled {
parts = append(parts, flag.Name)
}
}
return strings.Join(parts, "_")
}
// SupportedSuffixes returns the list of all possible suffix combinations
// supported by this instruction form.
func (f Form) SupportedSuffixes() []Suffixes {
suffixes := []Suffixes{
{},
}
add := func(ss ...Suffix) {
var exts []Suffixes
for _, s := range ss {
for _, suffix := range suffixes {
ext := append(Suffixes(nil), suffix...)
ext = append(ext, s)
exts = append(exts, ext)
}
}
suffixes = exts
}
if f.Broadcast {
add(BCST)
}
if f.EmbeddedRounding {
add(RN_SAE, RZ_SAE, RD_SAE, RU_SAE)
}
if f.SuppressAllExceptions {
add(SAE)
}
if f.Zeroing {
add(Z)
}
return suffixes
}
// Suffix is an opcode suffix.
type Suffix string
// Supported opcode suffixes in x86 assembly.
const (
BCST Suffix = "BCST"
RN_SAE Suffix = "RN_SAE"
RZ_SAE Suffix = "RZ_SAE"
RD_SAE Suffix = "RD_SAE"
RU_SAE Suffix = "RU_SAE"
SAE Suffix = "SAE"
Z Suffix = "Z"
)
func (s Suffix) String() string {
return string(s)
}
// Summary of the opcode suffix, for documentation purposes.
func (s Suffix) Summary() string {
return suffixsummary[s]
}
var suffixsummary = map[Suffix]string{
BCST: "Broadcast",
RN_SAE: "Round Towards Nearest",
RZ_SAE: "Round Towards Zero",
RD_SAE: "Round Towards Negative Infinity",
RU_SAE: "Round Towards Positive Infinity",
SAE: "Suppress All Exceptions",
Z: "Zeroing Masking",
}
// Suffixes is a list of opcode suffixes.
type Suffixes []Suffix
// String returns the dot-separated suffixes.
func (s Suffixes) String() string { return s.Join(".") }
// Join suffixes with the given separator.
func (s Suffixes) Join(sep string) string {
return strings.Join(s.Strings(), sep)
}
// Strings returns the suffixes as strings.
func (s Suffixes) Strings() []string {
var ss []string
for _, suffix := range s {
ss = append(ss, suffix.String())
}
return ss
}
// Summaries returns all the suffix summaries.
func (s Suffixes) Summaries() []string {
var summaries []string
for _, suffix := range s {
summaries = append(summaries, suffix.Summary())
}
return summaries
}
// Operand is an operand to an instruction, describing the expected type and read/write action.
type Operand struct {
Type string
Action Action
}
// ImplicitOperand describes a register that is implicitly read/written by an instruction.
type ImplicitOperand struct {
Register string
Action Action
}
// Action specifies the read/write operation of an instruction on an operand.
type Action uint8
// Possible Action types.
const (
R Action = 1 << iota // Read
W // Write
RW Action = R | W // Read-Write
)
// ActionFromReadWrite builds an Action from boolean flags.
func ActionFromReadWrite(r, w bool) Action {
var a Action
if r {
a |= R
}
if w {
a |= W
}
return a
}
// ContainsAll reports whether a supports all actions in s.
func (a Action) ContainsAll(s Action) bool {
return (a & s) == s
}
// ContainsAny reports whether a supports any actions in s.
func (a Action) ContainsAny(s Action) bool {
return (a & s) != 0
}
// Read reports whether a supports read.
func (a Action) Read() bool {
return a.ContainsAll(R)
}
// Write reports whether a supports write.
func (a Action) Write() bool {
return a.ContainsAll(W)
}
// String represents a as a human-readable string.
func (a Action) String() string {
s := ""
if a.Read() {
s += "r"
}
if a.Write() {
s += "w"
}
return s
}
// EncodingType specifies a category of encoding types.
type EncodingType uint8
// Supported encoding types.
const (
EncodingTypeLegacy EncodingType = 1 + iota
EncodingTypeREX
EncodingTypeVEX
EncodingTypeEVEX
)
golang-github-mmcloughlin-avo-0.5.0/internal/inst/types_test.go 0000664 0000000 0000000 00000002156 14370657153 0024704 0 ustar 00root root 0000000 0000000 package inst
import (
"reflect"
"testing"
)
func TestFormSupportedSuffixes(t *testing.T) {
cases := []struct {
Form Form
Expect []Suffixes
}{
{
Form: Form{},
Expect: []Suffixes{
{},
},
},
{
Form: Form{
Broadcast: true,
},
Expect: []Suffixes{
{BCST},
},
},
{
Form: Form{
EmbeddedRounding: true,
},
Expect: []Suffixes{
{RN_SAE},
{RZ_SAE},
{RD_SAE},
{RU_SAE},
},
},
{
Form: Form{
SuppressAllExceptions: true,
},
Expect: []Suffixes{
{SAE},
},
},
{
Form: Form{
Zeroing: true,
},
Expect: []Suffixes{
{Z},
},
},
{
Form: Form{
EmbeddedRounding: true,
Zeroing: true,
},
Expect: []Suffixes{
{RN_SAE, Z},
{RZ_SAE, Z},
{RD_SAE, Z},
{RU_SAE, Z},
},
},
{
Form: Form{
Broadcast: true,
Zeroing: true,
},
Expect: []Suffixes{
{BCST, Z},
},
},
}
for _, c := range cases {
got := c.Form.SupportedSuffixes()
if !reflect.DeepEqual(c.Expect, got) {
t.Errorf("%v.SupportedSuffixes() = %v; expect %v", c.Form, got, c.Expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/inst/ztable.go 0000664 0000000 0000000 00011752502 14370657153 0023773 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -bootstrap -data ../data -output ztable.go godata. DO NOT EDIT.
package inst
var Instructions = []Instruction{
{
Opcode: "ADCB",
Summary: "Add with Carry",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADCL",
Summary: "Add with Carry",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADCQ",
Summary: "Add with Carry",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADCW",
Summary: "Add with Carry",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADCXL",
Summary: "Unsigned Integer Addition of Two Operands with Carry Flag",
Forms: []Form{
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADCXQ",
Summary: "Unsigned Integer Addition of Two Operands with Carry Flag",
Forms: []Form{
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDB",
Summary: "Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDL",
Summary: "Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDPD",
Summary: "Add Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDPS",
Summary: "Add Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDQ",
Summary: "Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDSD",
Summary: "Add Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDSS",
Summary: "Add Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDSUBPD",
Summary: "Packed Double-FP Add/Subtract",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDSUBPS",
Summary: "Packed Single-FP Add/Subtract",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADDW",
Summary: "Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADOXL",
Summary: "Unsigned Integer Addition of Two Operands with Overflow Flag",
Forms: []Form{
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ADOXQ",
Summary: "Unsigned Integer Addition of Two Operands with Overflow Flag",
Forms: []Form{
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"ADX"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESDEC",
Summary: "Perform One Round of an AES Decryption Flow",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESDECLAST",
Summary: "Perform Last Round of an AES Decryption Flow",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESENC",
Summary: "Perform One Round of an AES Encryption Flow",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESENCLAST",
Summary: "Perform Last Round of an AES Encryption Flow",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESIMC",
Summary: "Perform the AES InvMixColumn Transformation",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "AESKEYGENASSIST",
Summary: "AES Round Key Generation Assist",
Forms: []Form{
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"AES"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDB",
Summary: "Logical AND",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDL",
Summary: "Logical AND",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDNL",
Summary: "Logical AND NOT",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "ANDNPD",
Summary: "Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "ANDNPS",
Summary: "Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "ANDNQ",
Summary: "Logical AND NOT",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "ANDPD",
Summary: "Bitwise Logical AND of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDPS",
Summary: "Bitwise Logical AND of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDQ",
Summary: "Logical AND",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ANDW",
Summary: "Logical AND",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BEXTRL",
Summary: "Bit Field Extract",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BEXTRQ",
Summary: "Bit Field Extract",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLENDPD",
Summary: "Blend Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BLENDPS",
Summary: " Blend Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BLENDVPD",
Summary: " Variable Blend Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BLENDVPS",
Summary: " Variable Blend Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BLSIL",
Summary: "Isolate Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLSIQ",
Summary: "Isolate Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLSMSKL",
Summary: "Mask From Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLSMSKQ",
Summary: "Mask From Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLSRL",
Summary: "Reset Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BLSRQ",
Summary: "Reset Lowest Set Bit",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BSFL",
Summary: "Bit Scan Forward",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSFQ",
Summary: "Bit Scan Forward",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSFW",
Summary: "Bit Scan Forward",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSRL",
Summary: "Bit Scan Reverse",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSRQ",
Summary: "Bit Scan Reverse",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSRW",
Summary: "Bit Scan Reverse",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSWAPL",
Summary: "Byte Swap",
Forms: []Form{
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BSWAPQ",
Summary: "Byte Swap",
Forms: []Form{
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTCL",
Summary: "Bit Test and Complement",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTCQ",
Summary: "Bit Test and Complement",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTCW",
Summary: "Bit Test and Complement",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTL",
Summary: "Bit Test",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTQ",
Summary: "Bit Test",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTRL",
Summary: "Bit Test and Reset",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTRQ",
Summary: "Bit Test and Reset",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTRW",
Summary: "Bit Test and Reset",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTSL",
Summary: "Bit Test and Set",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTSQ",
Summary: "Bit Test and Set",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTSW",
Summary: "Bit Test and Set",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BTW",
Summary: "Bit Test",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "BZHIL",
Summary: "Zero High Bits Starting with Specified Bit Position",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "BZHIQ",
Summary: "Zero High Bits Starting with Specified Bit Position",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "CALL",
Summary: "Call Procedure",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "CBW",
Summary: "Convert Byte to Word",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x2},
{Register: "al", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "CDQ",
Summary: "Convert Doubleword to Quadword",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "CDQE",
Summary: "Convert Doubleword to Quadword",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "rax", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CLC",
Summary: "Clear Carry Flag",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "CLD",
Summary: "Clear Direction Flag",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "CLFLUSH",
Summary: "Flush Cache Line",
Forms: []Form{
{
ISA: []string{"CLFLUSH"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CLFLUSHOPT",
Summary: "Flush Cache Line Optimized",
Forms: []Form{
{
ISA: []string{"CLFLUSHOPT"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMC",
Summary: "Complement Carry Flag",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "CMOVLCC",
Summary: "Move if above or equal (CF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLCS",
Summary: "Move if below (CF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLEQ",
Summary: "Move if equal (ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLGE",
Summary: "Move if greater or equal (SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLGT",
Summary: "Move if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLHI",
Summary: "Move if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLLE",
Summary: "Move if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLLS",
Summary: "Move if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLLT",
Summary: "Move if less (SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLMI",
Summary: "Move if sign (SF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLNE",
Summary: "Move if not equal (ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLOC",
Summary: "Move if not overflow (OF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLOS",
Summary: "Move if overflow (OF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLPC",
Summary: "Move if not parity (PF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLPL",
Summary: "Move if not sign (SF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVLPS",
Summary: "Move if parity (PF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQCC",
Summary: "Move if above or equal (CF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQCS",
Summary: "Move if below (CF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQEQ",
Summary: "Move if equal (ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQGE",
Summary: "Move if greater or equal (SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQGT",
Summary: "Move if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQHI",
Summary: "Move if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQLE",
Summary: "Move if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQLS",
Summary: "Move if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQLT",
Summary: "Move if less (SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQMI",
Summary: "Move if sign (SF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQNE",
Summary: "Move if not equal (ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQOC",
Summary: "Move if not overflow (OF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQOS",
Summary: "Move if overflow (OF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQPC",
Summary: "Move if not parity (PF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQPL",
Summary: "Move if not sign (SF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVQPS",
Summary: "Move if parity (PF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWCC",
Summary: "Move if above or equal (CF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWCS",
Summary: "Move if below (CF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWEQ",
Summary: "Move if equal (ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWGE",
Summary: "Move if greater or equal (SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWGT",
Summary: "Move if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWHI",
Summary: "Move if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWLE",
Summary: "Move if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWLS",
Summary: "Move if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWLT",
Summary: "Move if less (SF != OF)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWMI",
Summary: "Move if sign (SF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWNE",
Summary: "Move if not equal (ZF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWOC",
Summary: "Move if not overflow (OF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWOS",
Summary: "Move if overflow (OF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWPC",
Summary: "Move if not parity (PF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWPL",
Summary: "Move if not sign (SF == 0)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMOVWPS",
Summary: "Move if parity (PF == 1)",
Forms: []Form{
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"CMOV"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPB",
Summary: "Compare Two Operands",
Forms: []Form{
{
Operands: []Operand{
{Type: "al", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x1},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "CMPL",
Summary: "Compare Two Operands",
Forms: []Form{
{
Operands: []Operand{
{Type: "eax", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "CMPPD",
Summary: "Compare Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPPS",
Summary: "Compare Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPQ",
Summary: "Compare Two Operands",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
CancellingInputs: true,
},
{
Operands: []Operand{
{Type: "rax", Action: 0x1},
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPSD",
Summary: "Compare Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPSS",
Summary: "Compare Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPW",
Summary: "Compare Two Operands",
Forms: []Form{
{
Operands: []Operand{
{Type: "ax", Action: 0x1},
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "CMPXCHG16B",
Summary: "Compare and Exchange 16 Bytes",
Forms: []Form{
{
Operands: []Operand{
{Type: "m128", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rbx", Action: 0x1},
{Register: "rcx", Action: 0x1},
{Register: "rdx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPXCHG8B",
Summary: "Compare and Exchange 8 Bytes",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "ebx", Action: 0x1},
{Register: "ecx", Action: 0x1},
{Register: "edx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPXCHGB",
Summary: "Compare and Exchange",
Forms: []Form{
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPXCHGL",
Summary: "Compare and Exchange",
Forms: []Form{
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPXCHGQ",
Summary: "Compare and Exchange",
Forms: []Form{
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CMPXCHGW",
Summary: "Compare and Exchange",
Forms: []Form{
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "COMISD",
Summary: "Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "COMISS",
Summary: "Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CPUID",
Summary: "CPU Identification",
Forms: []Form{
{
ISA: []string{"CPUID"},
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "ebx", Action: 0x2},
{Register: "ecx", Action: 0x3},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "CQO",
Summary: "Convert Quadword to Octaword",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x1},
{Register: "rdx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CRC32B",
Summary: "Accumulate CRC32 Value",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CRC32L",
Summary: "Accumulate CRC32 Value",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CRC32Q",
Summary: "Accumulate CRC32 Value",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CRC32W",
Summary: "Accumulate CRC32 Value",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPD2PL",
Summary: "Convert Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPD2PS",
Summary: "Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPL2PD",
Summary: "Convert Packed Dword Integers to Packed Double-Precision FP Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPL2PS",
Summary: "Convert Packed Dword Integers to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPS2PD",
Summary: "Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTPS2PL",
Summary: "Convert Packed Single-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSD2SL",
Summary: "Convert Scalar Double-Precision FP Value to Integer",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSD2SS",
Summary: "Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSL2SD",
Summary: "Convert Dword Integer to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSL2SS",
Summary: "Convert Dword Integer to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSQ2SD",
Summary: "Convert Dword Integer to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSQ2SS",
Summary: "Convert Dword Integer to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSS2SD",
Summary: "Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTSS2SL",
Summary: "Convert Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTTPD2PL",
Summary: "Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTTPS2PL",
Summary: "Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTTSD2SL",
Summary: "Convert with Truncation Scalar Double-Precision FP Value to Signed Integer",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTTSD2SQ",
Summary: "Convert with Truncation Scalar Double-Precision FP Value to Signed Integer",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CVTTSS2SL",
Summary: "Convert with Truncation Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "CWD",
Summary: "Convert Word to Doubleword",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x1},
{Register: "dx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "CWDE",
Summary: "Convert Word to Doubleword",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x1},
{Register: "eax", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "DECB",
Summary: "Decrement by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DECL",
Summary: "Decrement by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DECQ",
Summary: "Decrement by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DECW",
Summary: "Decrement by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVB",
Summary: "Unsigned Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVL",
Summary: "Unsigned Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVPD",
Summary: "Divide Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVPS",
Summary: "Divide Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVQ",
Summary: "Unsigned Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVSD",
Summary: "Divide Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVSS",
Summary: "Divide Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DIVW",
Summary: "Unsigned Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DPPD",
Summary: "Dot Product of Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "DPPS",
Summary: "Dot Product of Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "EXTRACTPS",
Summary: "Extract Packed Single Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm2u", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm2u", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "HADDPD",
Summary: "Packed Double-FP Horizontal Add",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "HADDPS",
Summary: "Packed Single-FP Horizontal Add",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "HSUBPD",
Summary: "Packed Double-FP Horizontal Subtract",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "HSUBPS",
Summary: "Packed Single-FP Horizontal Subtract",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IDIVB",
Summary: "Signed Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IDIVL",
Summary: "Signed Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IDIVQ",
Summary: "Signed Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IDIVW",
Summary: "Signed Divide",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMUL3L",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMUL3Q",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMUL3W",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMULB",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x2},
{Register: "al", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x2},
{Register: "al", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMULL",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMULQ",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "IMULW",
Summary: "Signed Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INCB",
Summary: "Increment by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INCL",
Summary: "Increment by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INCQ",
Summary: "Increment by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INCW",
Summary: "Increment by 1",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INSERTPS",
Summary: "Insert Packed Single Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "INT",
Summary: "Call to Interrupt Procedure",
Forms: []Form{
{
Operands: []Operand{
{Type: "3", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JA",
AliasOf: "JHI",
Summary: "Jump if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JAE",
AliasOf: "JCC",
Summary: "Jump if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JB",
AliasOf: "JCS",
Summary: "Jump if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JBE",
AliasOf: "JLS",
Summary: "Jump if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JC",
AliasOf: "JCS",
Summary: "Jump if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JCC",
Summary: "Jump if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JCS",
Summary: "Jump if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JCXZL",
Summary: "Jump if ECX register is 0",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ecx", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JCXZQ",
Summary: "Jump if RCX register is 0",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rcx", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JE",
AliasOf: "JEQ",
Summary: "Jump if equal (ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JEQ",
Summary: "Jump if equal (ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JG",
AliasOf: "JGT",
Summary: "Jump if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JGE",
Summary: "Jump if greater or equal (SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JGT",
Summary: "Jump if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JHI",
Summary: "Jump if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JHS",
AliasOf: "JCC",
Summary: "Jump if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JL",
AliasOf: "JLT",
Summary: "Jump if less (SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JLE",
Summary: "Jump if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JLO",
AliasOf: "JCS",
Summary: "Jump if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JLS",
Summary: "Jump if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JLT",
Summary: "Jump if less (SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JMI",
Summary: "Jump if sign (SF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JMP",
Summary: "Jump Unconditionally",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "JNA",
AliasOf: "JLS",
Summary: "Jump if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNAE",
AliasOf: "JCS",
Summary: "Jump if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNB",
AliasOf: "JCC",
Summary: "Jump if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNBE",
AliasOf: "JHI",
Summary: "Jump if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNC",
AliasOf: "JCC",
Summary: "Jump if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNE",
Summary: "Jump if not equal (ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNG",
AliasOf: "JLE",
Summary: "Jump if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNGE",
AliasOf: "JLT",
Summary: "Jump if less (SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNL",
AliasOf: "JGE",
Summary: "Jump if greater or equal (SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNLE",
AliasOf: "JGT",
Summary: "Jump if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNO",
AliasOf: "JOC",
Summary: "Jump if not overflow (OF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNP",
AliasOf: "JPC",
Summary: "Jump if not parity (PF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNS",
AliasOf: "JPL",
Summary: "Jump if not sign (SF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JNZ",
AliasOf: "JNE",
Summary: "Jump if not equal (ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JO",
AliasOf: "JOS",
Summary: "Jump if overflow (OF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JOC",
Summary: "Jump if not overflow (OF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JOS",
Summary: "Jump if overflow (OF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JP",
AliasOf: "JPS",
Summary: "Jump if parity (PF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JPC",
Summary: "Jump if not parity (PF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JPE",
AliasOf: "JPS",
Summary: "Jump if parity (PF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JPL",
Summary: "Jump if not sign (SF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JPO",
AliasOf: "JPC",
Summary: "Jump if not parity (PF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JPS",
Summary: "Jump if parity (PF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JS",
AliasOf: "JMI",
Summary: "Jump if sign (SF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "JZ",
AliasOf: "JEQ",
Summary: "Jump if equal (ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "rel32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "rel8", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "KADDB",
Summary: "ADD Two 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KADDD",
Summary: "ADD Two 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KADDQ",
Summary: "ADD Two 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KADDW",
Summary: "ADD Two 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDB",
Summary: "Bitwise Logical AND 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDD",
Summary: "Bitwise Logical AND 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDNB",
Summary: "Bitwise Logical AND NOT 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDND",
Summary: "Bitwise Logical AND NOT 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDNQ",
Summary: "Bitwise Logical AND NOT 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDNW",
Summary: "Bitwise Logical AND NOT 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDQ",
Summary: "Bitwise Logical AND 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KANDW",
Summary: "Bitwise Logical AND 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KMOVB",
Summary: "Move 8-bit Mask",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "m8", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KMOVD",
Summary: "Move 32-bit Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KMOVQ",
Summary: "Move 64-bit Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KMOVW",
Summary: "Move 16-bit Mask",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KNOTB",
Summary: "NOT 8-bit Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KNOTD",
Summary: "NOT 32-bit Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KNOTQ",
Summary: "NOT 64-bit Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KNOTW",
Summary: "NOT 16-bit Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORB",
Summary: "Bitwise Logical OR 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORD",
Summary: "Bitwise Logical OR 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORQ",
Summary: "Bitwise Logical OR 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORTESTB",
Summary: "OR 8-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORTESTD",
Summary: "OR 32-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORTESTQ",
Summary: "OR 64-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORTESTW",
Summary: "OR 16-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KORW",
Summary: "Bitwise Logical OR 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTLB",
Summary: "Shift Left 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTLD",
Summary: "Shift Left 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTLQ",
Summary: "Shift Left 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTLW",
Summary: "Shift Left 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTRB",
Summary: "Shift Right 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTRD",
Summary: "Shift Right 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTRQ",
Summary: "Shift Right 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KSHIFTRW",
Summary: "Shift Right 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KTESTB",
Summary: "Bit Test 8-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KTESTD",
Summary: "Bit Test 32-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KTESTQ",
Summary: "Bit Test 64-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KTESTW",
Summary: "Bit Test 16-bit Masks and Set Flags",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KUNPCKBW",
Summary: "Unpack and Interleave 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KUNPCKDQ",
Summary: "Unpack and Interleave 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KUNPCKWD",
Summary: "Unpack and Interleave 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXNORB",
Summary: "Bitwise Logical XNOR 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXNORD",
Summary: "Bitwise Logical XNOR 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXNORQ",
Summary: "Bitwise Logical XNOR 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXNORW",
Summary: "Bitwise Logical XNOR 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXORB",
Summary: "Bitwise Logical XOR 8-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXORD",
Summary: "Bitwise Logical XOR 32-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXORQ",
Summary: "Bitwise Logical XOR 64-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "KXORW",
Summary: "Bitwise Logical XOR 16-bit Masks",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "LDDQU",
Summary: "Load Unaligned Integer 128 Bits",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LDMXCSR",
Summary: "Load MXCSR Register",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LEAL",
Summary: "Load Effective Address",
Forms: []Form{
{
Operands: []Operand{
{Type: "m", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LEAQ",
Summary: "Load Effective Address",
Forms: []Form{
{
Operands: []Operand{
{Type: "m", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LEAW",
Summary: "Load Effective Address",
Forms: []Form{
{
Operands: []Operand{
{Type: "m", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LFENCE",
Summary: "Load Fence",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "LZCNTL",
Summary: "Count the Number of Leading Zero Bits",
Forms: []Form{
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LZCNTQ",
Summary: "Count the Number of Leading Zero Bits",
Forms: []Form{
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "LZCNTW",
Summary: "Count the Number of Leading Zero Bits",
Forms: []Form{
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"LZCNT"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MASKMOVDQU",
AliasOf: "MASKMOVOU",
Summary: "Store Selected Bytes of Double Quadword",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rdi", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MASKMOVOU",
Summary: "Store Selected Bytes of Double Quadword",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rdi", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MAXPD",
Summary: "Return Maximum Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MAXPS",
Summary: "Return Maximum Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MAXSD",
Summary: "Return Maximum Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MAXSS",
Summary: "Return Maximum Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MFENCE",
Summary: "Memory Fence",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "MINPD",
Summary: "Return Minimum Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MINPS",
Summary: "Return Minimum Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MINSD",
Summary: "Return Minimum Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MINSS",
Summary: "Return Minimum Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MONITOR",
Summary: "Monitor a Linear Address Range",
Forms: []Form{
{
ISA: []string{"MONITOR"},
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x1},
{Register: "ecx", Action: 0x1},
{Register: "edx", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "MOVAPD",
Summary: "Move Aligned Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVAPS",
Summary: "Move Aligned Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVB",
Summary: "Move",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBELL",
Summary: "Move Data After Swapping Bytes",
Forms: []Form{
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBEQQ",
Summary: "Move Data After Swapping Bytes",
Forms: []Form{
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBEWW",
Summary: "Move Data After Swapping Bytes",
Forms: []Form{
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"MOVBE"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBLSX",
Summary: "Move with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBLZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBQSX",
Summary: "Move with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBQZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBWSX",
Summary: "Move with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVBWZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVD",
AliasOf: "MOVQ",
Summary: "Move",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm64", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVDDUP",
Summary: "Move One Double-FP and Duplicate",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVDQ2Q",
AliasOf: "MOVQ",
Summary: "Move",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm64", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVHLPS",
Summary: "Move Packed Single-Precision Floating-Point Values High to Low",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVHPD",
Summary: "Move High Packed Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVHPS",
Summary: "Move High Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVL",
Summary: "Move",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVLHPS",
Summary: "Move Packed Single-Precision Floating-Point Values Low to High",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVLPD",
Summary: "Move Low Packed Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVLPS",
Summary: "Move Low Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVLQSX",
Summary: "Move Doubleword to Quadword with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVLQZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x0,
},
},
},
{
Opcode: "MOVMSKPD",
Summary: "Extract Packed Double-Precision Floating-Point Sign Mask",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVMSKPS",
Summary: "Extract Packed Single-Precision Floating-Point Sign Mask",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTDQ",
AliasOf: "MOVNTO",
Summary: "Store Double Quadword Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTDQA",
Summary: "Load Double Quadword Non-Temporal Aligned Hint",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTIL",
Summary: "Store Doubleword Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTIQ",
Summary: "Store Doubleword Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTO",
Summary: "Store Double Quadword Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTPD",
Summary: "Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVNTPS",
Summary: "Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVO",
Summary: "Move Aligned Double Quadword",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVOA",
AliasOf: "MOVO",
Summary: "Move Aligned Double Quadword",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVOU",
Summary: "Move Unaligned Double Quadword",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVQ",
Summary: "Move",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm64", Action: 0x0},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVSD",
Summary: "Move Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVSHDUP",
Summary: "Move Packed Single-FP High and Duplicate",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVSLDUP",
Summary: "Move Packed Single-FP Low and Duplicate",
Forms: []Form{
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVSS",
Summary: "Move Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVUPD",
Summary: "Move Unaligned Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVUPS",
Summary: "Move Unaligned Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVW",
Summary: "Move",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVWLSX",
Summary: "Move with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVWLZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVWQSX",
Summary: "Move with Sign-Extension",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MOVWQZX",
Summary: "Move with Zero-Extend",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MPSADBW",
Summary: "Compute Multiple Packed Sums of Absolute Difference",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULB",
Summary: "Unsigned Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x2},
{Register: "al", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x2},
{Register: "al", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULL",
Summary: "Unsigned Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x3},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULPD",
Summary: "Multiply Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULPS",
Summary: "Multiply Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULQ",
Summary: "Unsigned Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rax", Action: 0x3},
{Register: "rdx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULSD",
Summary: "Multiply Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULSS",
Summary: "Multiply Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULW",
Summary: "Unsigned Multiply",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ax", Action: 0x3},
{Register: "dx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "MULXL",
Summary: "Unsigned Multiply Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
{Type: "r32", Action: 0x2},
},
ImplicitOperands: []ImplicitOperand{
{Register: "edx", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
{Type: "r32", Action: 0x2},
},
ImplicitOperands: []ImplicitOperand{
{Register: "edx", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "MULXQ",
Summary: "Unsigned Multiply Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
{Type: "r64", Action: 0x2},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rdx", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
{Type: "r64", Action: 0x2},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rdx", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "MWAIT",
Summary: "Monitor Wait",
Forms: []Form{
{
ISA: []string{"MONITOR"},
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "ecx", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "NEGB",
Summary: "Two's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NEGL",
Summary: "Two's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NEGQ",
Summary: "Two's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NEGW",
Summary: "Two's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NOP",
Summary: "No Operation",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "NOTB",
Summary: "One's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NOTL",
Summary: "One's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NOTQ",
Summary: "One's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "NOTW",
Summary: "One's Complement Negation",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORB",
Summary: "Logical Inclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORL",
Summary: "Logical Inclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORPD",
Summary: "Bitwise Logical OR of Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORPS",
Summary: "Bitwise Logical OR of Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORQ",
Summary: "Logical Inclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ORW",
Summary: "Logical Inclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PABSB",
Summary: "Packed Absolute Value of Byte Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PABSD",
Summary: "Packed Absolute Value of Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PABSW",
Summary: "Packed Absolute Value of Word Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PACKSSLW",
Summary: "Pack Doublewords into Words with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PACKSSWB",
Summary: "Pack Words into Bytes with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PACKUSDW",
Summary: "Pack Doublewords into Words with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PACKUSWB",
Summary: "Pack Words into Bytes with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDB",
Summary: "Add Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDD",
AliasOf: "PADDL",
Summary: "Add Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDL",
Summary: "Add Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDQ",
Summary: "Add Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDSB",
Summary: "Add Packed Signed Byte Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDSW",
Summary: "Add Packed Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDUSB",
Summary: "Add Packed Unsigned Byte Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDUSW",
Summary: "Add Packed Unsigned Word Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PADDW",
Summary: "Add Packed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PALIGNR",
Summary: "Packed Align Right",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PAND",
Summary: "Packed Bitwise Logical AND",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PANDN",
Summary: "Packed Bitwise Logical AND NOT",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PAUSE",
Summary: "Spin Loop Hint",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "PAVGB",
Summary: "Average Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PAVGW",
Summary: "Average Packed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PBLENDVB",
Summary: "Variable Blend Packed Bytes",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PBLENDW",
Summary: "Blend Packed Words",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PCLMULQDQ",
Summary: "Carry-Less Quadword Multiplication",
Forms: []Form{
{
ISA: []string{"PCLMULQDQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"PCLMULQDQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PCMPEQB",
Summary: "Compare Packed Byte Data for Equality",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPEQL",
Summary: "Compare Packed Doubleword Data for Equality",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPEQQ",
Summary: "Compare Packed Quadword Data for Equality",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPEQW",
Summary: "Compare Packed Word Data for Equality",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPESTRI",
Summary: "Packed Compare Explicit Length Strings, Return Index",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "ecx", Action: 0x2},
{Register: "edx", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "ecx", Action: 0x2},
{Register: "edx", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PCMPESTRM",
Summary: "Packed Compare Explicit Length Strings, Return Mask",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "edx", Action: 0x1},
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "edx", Action: 0x1},
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PCMPGTB",
Summary: "Compare Packed Signed Byte Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPGTL",
Summary: "Compare Packed Signed Doubleword Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPGTQ",
Summary: "Compare Packed Data for Greater Than",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPGTW",
Summary: "Compare Packed Signed Word Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PCMPISTRI",
Summary: "Packed Compare Implicit Length Strings, Return Index",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ecx", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ecx", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PCMPISTRM",
Summary: "Packed Compare Implicit Length Strings, Return Mask",
Forms: []Form{
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PDEPL",
Summary: "Parallel Bits Deposit",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "PDEPQ",
Summary: "Parallel Bits Deposit",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "PEXTL",
Summary: "Parallel Bits Extract",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "PEXTQ",
Summary: "Parallel Bits Extract",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "PEXTRB",
Summary: "Extract Byte",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PEXTRD",
Summary: "Extract Doubleword",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PEXTRQ",
Summary: "Extract Quadword",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PEXTRW",
Summary: "Extract Word",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PHADDD",
Summary: "Packed Horizontal Add Doubleword Integer",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PHADDSW",
Summary: "Packed Horizontal Add Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PHADDW",
Summary: "Packed Horizontal Add Word Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PHMINPOSUW",
Summary: "Packed Horizontal Minimum of Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PHSUBD",
Summary: "Packed Horizontal Subtract Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PHSUBSW",
Summary: "Packed Horizontal Subtract Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PHSUBW",
Summary: "Packed Horizontal Subtract Word Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PINSRB",
Summary: "Insert Byte",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PINSRD",
Summary: "Insert Doubleword",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PINSRQ",
Summary: "Insert Quadword",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PINSRW",
Summary: "Insert Word",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMADDUBSW",
Summary: "Multiply and Add Packed Signed and Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMADDWL",
Summary: "Multiply and Add Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXSB",
Summary: "Maximum of Packed Signed Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXSD",
Summary: "Maximum of Packed Signed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXSW",
Summary: "Maximum of Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXUB",
Summary: "Maximum of Packed Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXUD",
Summary: "Maximum of Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMAXUW",
Summary: "Maximum of Packed Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINSB",
Summary: "Minimum of Packed Signed Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINSD",
Summary: "Minimum of Packed Signed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINSW",
Summary: "Minimum of Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINUB",
Summary: "Minimum of Packed Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINUD",
Summary: "Minimum of Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMINUW",
Summary: "Minimum of Packed Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVMSKB",
Summary: "Move Byte Mask",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXBD",
Summary: "Move Packed Byte Integers to Doubleword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXBQ",
Summary: "Move Packed Byte Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXBW",
Summary: "Move Packed Byte Integers to Word Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXDQ",
Summary: "Move Packed Doubleword Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXWD",
Summary: "Move Packed Word Integers to Doubleword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVSXWQ",
Summary: "Move Packed Word Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXBD",
Summary: "Move Packed Byte Integers to Doubleword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXBQ",
Summary: "Move Packed Byte Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXBW",
Summary: "Move Packed Byte Integers to Word Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXDQ",
Summary: "Move Packed Doubleword Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXWD",
Summary: "Move Packed Word Integers to Doubleword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMOVZXWQ",
Summary: "Move Packed Word Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULDQ",
Summary: "Multiply Packed Signed Doubleword Integers and Store Quadword Result",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULHRSW",
Summary: "Packed Multiply Signed Word Integers and Store High Result with Round and Scale",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULHUW",
Summary: "Multiply Packed Unsigned Word Integers and Store High Result",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULHW",
Summary: "Multiply Packed Signed Word Integers and Store High Result",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULLD",
Summary: "Multiply Packed Signed Doubleword Integers and Store Low Result",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULLW",
Summary: "Multiply Packed Signed Word Integers and Store Low Result",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PMULULQ",
Summary: "Multiply Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POPCNTL",
Summary: "Count of Number of Bits Set to 1",
Forms: []Form{
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POPCNTQ",
Summary: "Count of Number of Bits Set to 1",
Forms: []Form{
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POPCNTW",
Summary: "Count of Number of Bits Set to 1",
Forms: []Form{
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"POPCNT"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POPQ",
Summary: "Pop a Value from the Stack",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POPW",
Summary: "Pop a Value from the Stack",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "POR",
Summary: "Packed Bitwise Logical OR",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PREFETCHNTA",
Summary: "Prefetch Data Into Caches using NTA Hint",
Forms: []Form{
{
ISA: []string{"MMX+"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PREFETCHT0",
Summary: "Prefetch Data Into Caches using T0 Hint",
Forms: []Form{
{
ISA: []string{"MMX+"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PREFETCHT1",
Summary: "Prefetch Data Into Caches using T1 Hint",
Forms: []Form{
{
ISA: []string{"MMX+"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PREFETCHT2",
Summary: "Prefetch Data Into Caches using T2 Hint",
Forms: []Form{
{
ISA: []string{"MMX+"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSADBW",
Summary: "Compute Sum of Absolute Differences",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSHUFB",
Summary: "Packed Shuffle Bytes",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSHUFD",
AliasOf: "PSHUFL",
Summary: "Shuffle Packed Doublewords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSHUFHW",
Summary: "Shuffle Packed High Words",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSHUFL",
Summary: "Shuffle Packed Doublewords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSHUFLW",
Summary: "Shuffle Packed Low Words",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSIGNB",
Summary: "Packed Sign of Byte Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSIGND",
Summary: "Packed Sign of Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSIGNW",
Summary: "Packed Sign of Word Integers",
Forms: []Form{
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSSE3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSLLDQ",
AliasOf: "PSLLO",
Summary: "Shift Packed Double Quadword Left Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSLLL",
Summary: "Shift Packed Doubleword Data Left Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSLLO",
Summary: "Shift Packed Double Quadword Left Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSLLQ",
Summary: "Shift Packed Quadword Data Left Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSLLW",
Summary: "Shift Packed Word Data Left Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRAL",
Summary: "Shift Packed Doubleword Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRAW",
Summary: "Shift Packed Word Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRLDQ",
AliasOf: "PSRLO",
Summary: "Shift Packed Double Quadword Right Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRLL",
Summary: "Shift Packed Doubleword Data Right Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRLO",
Summary: "Shift Packed Double Quadword Right Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRLQ",
Summary: "Shift Packed Quadword Data Right Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSRLW",
Summary: "Shift Packed Word Data Right Logical",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PSUBB",
Summary: "Subtract Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBL",
Summary: "Subtract Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBQ",
Summary: "Subtract Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBSB",
Summary: "Subtract Packed Signed Byte Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBSW",
Summary: "Subtract Packed Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBUSB",
Summary: "Subtract Packed Unsigned Byte Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBUSW",
Summary: "Subtract Packed Unsigned Word Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PSUBW",
Summary: "Subtract Packed Word Integers",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "PTEST",
Summary: "Packed Logical Compare",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKHBW",
Summary: "Unpack and Interleave High-Order Bytes into Words",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKHLQ",
Summary: "Unpack and Interleave High-Order Doublewords into Quadwords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKHQDQ",
Summary: "Unpack and Interleave High-Order Quadwords into Double Quadwords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKHWL",
Summary: "Unpack and Interleave High-Order Words into Doublewords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKLBW",
Summary: "Unpack and Interleave Low-Order Bytes into Words",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKLLQ",
Summary: "Unpack and Interleave Low-Order Doublewords into Quadwords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKLQDQ",
Summary: "Unpack and Interleave Low-Order Quadwords into Double Quadwords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUNPCKLWL",
Summary: "Unpack and Interleave Low-Order Words into Doublewords",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUSHQ",
Summary: "Push Value Onto the Stack",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PUSHW",
Summary: "Push Value Onto the Stack",
Forms: []Form{
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "PXOR",
Summary: "Packed Bitwise Logical Exclusive OR",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "RCLB",
Summary: "Rotate Left through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCLL",
Summary: "Rotate Left through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCLQ",
Summary: "Rotate Left through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCLW",
Summary: "Rotate Left through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCPPS",
Summary: "Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCPSS",
Summary: "Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCRB",
Summary: "Rotate Right through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCRL",
Summary: "Rotate Right through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCRQ",
Summary: "Rotate Right through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RCRW",
Summary: "Rotate Right through Carry Flag",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RDRANDL",
Summary: "Read Random Number",
Forms: []Form{
{
ISA: []string{"RDRAND"},
Operands: []Operand{
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"RDRAND"},
Operands: []Operand{
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"RDRAND"},
Operands: []Operand{
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RDSEEDL",
Summary: "Read Random SEED",
Forms: []Form{
{
ISA: []string{"RDSEED"},
Operands: []Operand{
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"RDSEED"},
Operands: []Operand{
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"RDSEED"},
Operands: []Operand{
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RDTSC",
Summary: "Read Time-Stamp Counter",
Forms: []Form{
{
ISA: []string{"RDTSC"},
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x2},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "RDTSCP",
Summary: "Read Time-Stamp Counter and Processor ID",
Forms: []Form{
{
ISA: []string{"RDTSCP"},
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x2},
{Register: "ecx", Action: 0x2},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "RET",
Summary: "Return from Procedure",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "RETFL",
Summary: "Return from Procedure",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "RETFQ",
Summary: "Return from Procedure",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "RETFW",
Summary: "Return from Procedure",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "ROLB",
Summary: "Rotate Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROLL",
Summary: "Rotate Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROLQ",
Summary: "Rotate Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROLW",
Summary: "Rotate Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RORB",
Summary: "Rotate Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RORL",
Summary: "Rotate Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RORQ",
Summary: "Rotate Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RORW",
Summary: "Rotate Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RORXL",
Summary: "Rotate Right Logical Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "RORXQ",
Summary: "Rotate Right Logical Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "ROUNDPD",
Summary: "Round Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROUNDPS",
Summary: "Round Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROUNDSD",
Summary: "Round Scalar Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "ROUNDSS",
Summary: "Round Scalar Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE4.1"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RSQRTPS",
Summary: "Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "RSQRTSS",
Summary: "Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SALB",
Summary: "Arithmetic Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SALL",
Summary: "Arithmetic Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SALQ",
Summary: "Arithmetic Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SALW",
Summary: "Arithmetic Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SARB",
Summary: "Arithmetic Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SARL",
Summary: "Arithmetic Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SARQ",
Summary: "Arithmetic Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SARW",
Summary: "Arithmetic Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SARXL",
Summary: "Arithmetic Shift Right Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SARXQ",
Summary: "Arithmetic Shift Right Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SBBB",
Summary: "Subtract with Borrow",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SBBL",
Summary: "Subtract with Borrow",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SBBQ",
Summary: "Subtract with Borrow",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SBBW",
Summary: "Subtract with Borrow",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SETCC",
Summary: "Set byte if above or equal (CF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETCS",
Summary: "Set byte if below (CF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETEQ",
Summary: "Set byte if equal (ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETGE",
Summary: "Set byte if greater or equal (SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETGT",
Summary: "Set byte if greater (ZF == 0 and SF == OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETHI",
Summary: "Set byte if above (CF == 0 and ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETLE",
Summary: "Set byte if less or equal (ZF == 1 or SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETLS",
Summary: "Set byte if below or equal (CF == 1 or ZF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETLT",
Summary: "Set byte if less (SF != OF)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETMI",
Summary: "Set byte if sign (SF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETNE",
Summary: "Set byte if not equal (ZF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETOC",
Summary: "Set byte if not overflow (OF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETOS",
Summary: "Set byte if overflow (OF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETPC",
Summary: "Set byte if not parity (PF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETPL",
Summary: "Set byte if not sign (SF == 0)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SETPS",
Summary: "Set byte if parity (PF == 1)",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x2},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SFENCE",
Summary: "Store Fence",
Forms: []Form{
{
ISA: []string{"MMX+"},
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "SHA1MSG1",
Summary: "Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA1MSG2",
Summary: "Perform a Final Calculation for the Next Four SHA1 Message Doublewords",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA1NEXTE",
Summary: "Calculate SHA1 State Variable E after Four Rounds",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA1RNDS4",
Summary: "Perform Four Rounds of SHA1 Operation",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "imm2u", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "imm2u", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA256MSG1",
Summary: "Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA256MSG2",
Summary: "Perform a Final Calculation for the Next Four SHA256 Message Doublewords",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHA256RNDS2",
Summary: "Perform Two Rounds of SHA256 Operation",
Forms: []Form{
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SHA"},
Operands: []Operand{
{Type: "xmm0", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHLB",
Summary: "Logical Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHLL",
Summary: "Logical Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHLQ",
Summary: "Logical Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHLW",
Summary: "Logical Shift Left",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHLXL",
Summary: "Logical Shift Left Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SHLXQ",
Summary: "Logical Shift Left Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SHRB",
Summary: "Logical Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHRL",
Summary: "Logical Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHRQ",
Summary: "Logical Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHRW",
Summary: "Logical Shift Right",
Forms: []Form{
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "1", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "cl", Action: 0x1},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHRXL",
Summary: "Logical Shift Right Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SHRXQ",
Summary: "Logical Shift Right Without Affecting Flags",
Forms: []Form{
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"BMI2"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "SHUFPD",
Summary: "Shuffle Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SHUFPS",
Summary: "Shuffle Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SQRTPD",
Summary: "Compute Square Roots of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SQRTPS",
Summary: "Compute Square Roots of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SQRTSD",
Summary: "Compute Square Root of Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SQRTSS",
Summary: "Compute Square Root of Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "STC",
Summary: "Set Carry Flag",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "STD",
Summary: "Set Direction Flag",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "STMXCSR",
Summary: "Store MXCSR Register State",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SUBB",
Summary: "Subtract",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SUBL",
Summary: "Subtract",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SUBPD",
Summary: "Subtract Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SUBPS",
Summary: "Subtract Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SUBQ",
Summary: "Subtract",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SUBSD",
Summary: "Subtract Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SUBSS",
Summary: "Subtract Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "SUBW",
Summary: "Subtract",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "SYSCALL",
Summary: "Fast System Call",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "r11", Action: 0x2},
{Register: "rcx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "TESTB",
Summary: "Logical Compare",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x1},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TESTL",
Summary: "Logical Compare",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x1},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TESTQ",
Summary: "Logical Compare",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TESTW",
Summary: "Logical Compare",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x1},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x1},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TZCNTL",
Summary: "Count the Number of Trailing Zero Bits",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TZCNTQ",
Summary: "Count the Number of Trailing Zero Bits",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "TZCNTW",
Summary: "Count the Number of Trailing Zero Bits",
Forms: []Form{
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
{
ISA: []string{"BMI"},
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x2},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UCOMISD",
Summary: "Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UCOMISS",
Summary: "Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UD2",
Summary: "Undefined Instruction",
Forms: []Form{
{
Operands: []Operand{},
EncodingType: 0x1,
},
},
},
{
Opcode: "UNPCKHPD",
Summary: "Unpack and Interleave High Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UNPCKHPS",
Summary: "Unpack and Interleave High Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UNPCKLPD",
Summary: "Unpack and Interleave Low Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "UNPCKLPS",
Summary: "Unpack and Interleave Low Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "VADDPD",
Summary: "Add Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VADDPS",
Summary: "Add Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VADDSD",
Summary: "Add Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VADDSS",
Summary: "Add Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VADDSUBPD",
Summary: "Packed Double-FP Add/Subtract",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VADDSUBPS",
Summary: "Packed Single-FP Add/Subtract",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESDEC",
Summary: "Perform One Round of an AES Decryption Flow",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESDECLAST",
Summary: "Perform Last Round of an AES Decryption Flow",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESENC",
Summary: "Perform One Round of an AES Encryption Flow",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESENCLAST",
Summary: "Perform Last Round of an AES Encryption Flow",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESIMC",
Summary: "Perform the AES InvMixColumn Transformation",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VAESKEYGENASSIST",
Summary: "AES Round Key Generation Assist",
Forms: []Form{
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AES", "AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VALIGND",
Summary: "Align Doubleword Vectors",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VALIGNQ",
Summary: "Align Quadword Vectors",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VANDNPD",
Summary: "Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VANDNPS",
Summary: "Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VANDPD",
Summary: "Bitwise Logical AND of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VANDPS",
Summary: "Bitwise Logical AND of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBLENDMPD",
Summary: "Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBLENDMPS",
Summary: "Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBLENDPD",
Summary: "Blend Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBLENDPS",
Summary: " Blend Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBLENDVPD",
Summary: " Variable Blend Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBLENDVPS",
Summary: " Variable Blend Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBROADCASTF128",
Summary: "Broadcast 128 Bit of Floating-Point Data",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBROADCASTF32X2",
Summary: "Broadcast Two Single-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTF32X4",
Summary: "Broadcast Four Single-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTF32X8",
Summary: "Broadcast Eight Single-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTF64X2",
Summary: "Broadcast Two Double-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTF64X4",
Summary: "Broadcast Four Double-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTI128",
Summary: "Broadcast 128 Bits of Integer Data",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VBROADCASTI32X2",
Summary: "Broadcast Two Doubleword Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTI32X4",
Summary: "Broadcast Four Doubleword Elements",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTI32X8",
Summary: "Broadcast Eight Doubleword Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTI64X2",
Summary: "Broadcast Two Quadword Elements",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTI64X4",
Summary: "Broadcast Four Quadword Elements",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTSD",
Summary: "Broadcast Double-Precision Floating-Point Element",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VBROADCASTSS",
Summary: "Broadcast Single-Precision Floating-Point Element",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCMPPD",
Summary: "Compare Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCMPPS",
Summary: "Compare Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCMPSD",
Summary: "Compare Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCMPSS",
Summary: "Compare Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCOMISD",
Summary: "Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCOMISS",
Summary: "Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCOMPRESSPD",
Summary: "Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCOMPRESSPS",
Summary: "Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTDQ2PD",
Summary: "Convert Packed Dword Integers to Packed Double-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTDQ2PS",
Summary: "Convert Packed Dword Integers to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPD2DQ",
Summary: "Convert Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPD2DQX",
Summary: "Convert Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTPD2DQY",
Summary: "Convert Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTPD2PS",
Summary: "Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPD2PSX",
Summary: "Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTPD2PSY",
Summary: "Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTPD2QQ",
Summary: "Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPD2UDQ",
Summary: "Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPD2UDQX",
Summary: "Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTPD2UDQY",
Summary: "Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTPD2UQQ",
Summary: "Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPH2PS",
Summary: "Convert Half-Precision FP Values to Single-Precision FP Values",
Forms: []Form{
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTPS2DQ",
Summary: "Convert Packed Single-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPS2PD",
Summary: "Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTPS2PH",
Summary: "Convert Single-Precision FP value to Half-Precision FP value",
Forms: []Form{
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"F16C"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTPS2QQ",
Summary: "Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPS2UDQ",
Summary: "Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTPS2UQQ",
Summary: "Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTQQ2PD",
Summary: "Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTQQ2PS",
Summary: "Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTQQ2PSX",
Summary: "Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTQQ2PSY",
Summary: "Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTSD2SI",
Summary: "Convert Scalar Double-Precision FP Value to Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSD2SIQ",
Summary: "Convert Scalar Double-Precision FP Value to Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSD2SS",
Summary: "Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSD2USIL",
Summary: "Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSD2USIQ",
Summary: "Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSI2SDL",
Summary: "Convert Dword Integer to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VCVTSI2SDQ",
Summary: "Convert Dword Integer to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSI2SSL",
Summary: "Convert Dword Integer to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSI2SSQ",
Summary: "Convert Dword Integer to Scalar Single-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSS2SD",
Summary: "Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTSS2SI",
Summary: "Convert Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSS2SIQ",
Summary: "Convert Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSS2USIL",
Summary: "Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTSS2USIQ",
Summary: "Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTTPD2DQ",
Summary: "Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPD2DQX",
Summary: "Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTTPD2DQY",
Summary: "Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VCVTTPD2QQ",
Summary: "Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPD2UDQ",
Summary: "Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPD2UDQX",
Summary: "Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTTPD2UDQY",
Summary: "Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTTPD2UQQ",
Summary: "Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPS2DQ",
Summary: "Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPS2QQ",
Summary: "Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPS2UDQ",
Summary: "Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTPS2UQQ",
Summary: "Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSD2SI",
Summary: "Convert with Truncation Scalar Double-Precision FP Value to Signed Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSD2SIQ",
Summary: "Convert with Truncation Scalar Double-Precision FP Value to Signed Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSD2USIL",
Summary: "Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSD2USIQ",
Summary: "Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSS2SI",
Summary: "Convert with Truncation Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSS2SIQ",
Summary: "Convert with Truncation Scalar Single-Precision FP Value to Dword Integer",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSS2USIL",
Summary: "Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTTSS2USIQ",
Summary: "Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VCVTUDQ2PD",
Summary: "Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTUDQ2PS",
Summary: "Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTUQQ2PD",
Summary: "Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTUQQ2PS",
Summary: "Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTUQQ2PSX",
Summary: "Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTUQQ2PSY",
Summary: "Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTUSI2SDL",
Summary: "Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VCVTUSI2SDQ",
Summary: "Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTUSI2SSL",
Summary: "Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VCVTUSI2SSQ",
Summary: "Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VDBPSADBW",
Summary: "Double Block Packed Sum-Absolute-Differences on Unsigned Bytes",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VDIVPD",
Summary: "Divide Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VDIVPS",
Summary: "Divide Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VDIVSD",
Summary: "Divide Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VDIVSS",
Summary: "Divide Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VDPPD",
Summary: "Dot Product of Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VDPPS",
Summary: "Dot Product of Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VEXP2PD",
Summary: "Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VEXP2PS",
Summary: "Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VEXPANDPD",
Summary: "Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXPANDPS",
Summary: "Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTF128",
Summary: "Extract Packed Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VEXTRACTF32X4",
Summary: "Extract 128 Bits of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTF32X8",
Summary: "Extract 256 Bits of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTF64X2",
Summary: "Extract 128 Bits of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTF64X4",
Summary: "Extract 256 Bits of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTI128",
Summary: "Extract Packed Integer Values",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VEXTRACTI32X4",
Summary: "Extract 128 Bits of Packed Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTI32X8",
Summary: "Extract 256 Bits of Packed Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTI64X2",
Summary: "Extract 128 Bits of Packed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTI64X4",
Summary: "Extract 256 Bits of Packed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VEXTRACTPS",
Summary: "Extract Packed Single Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VFIXUPIMMPD",
Summary: "Fix Up Special Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VFIXUPIMMPS",
Summary: "Fix Up Special Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFIXUPIMMSD",
Summary: "Fix Up Special Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VFIXUPIMMSS",
Summary: "Fix Up Special Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VFMADD132PD",
Summary: "Fused Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD132PS",
Summary: "Fused Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD132SD",
Summary: "Fused Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD132SS",
Summary: "Fused Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD213PD",
Summary: "Fused Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD213PS",
Summary: "Fused Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD213SD",
Summary: "Fused Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD213SS",
Summary: "Fused Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD231PD",
Summary: "Fused Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD231PS",
Summary: "Fused Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD231SD",
Summary: "Fused Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADD231SS",
Summary: "Fused Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB132PD",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB132PS",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB213PD",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB213PS",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB231PD",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMADDSUB231PS",
Summary: "Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB132PD",
Summary: "Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB132PS",
Summary: "Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB132SD",
Summary: "Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB132SS",
Summary: "Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB213PD",
Summary: "Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB213PS",
Summary: "Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB213SD",
Summary: "Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB213SS",
Summary: "Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB231PD",
Summary: "Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB231PS",
Summary: "Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB231SD",
Summary: "Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUB231SS",
Summary: "Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD132PD",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD132PS",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD213PD",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD213PS",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD231PD",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFMSUBADD231PS",
Summary: "Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD132PD",
Summary: "Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD132PS",
Summary: "Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD132SD",
Summary: "Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD132SS",
Summary: "Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD213PD",
Summary: "Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD213PS",
Summary: "Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD213SD",
Summary: "Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD213SS",
Summary: "Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD231PD",
Summary: "Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD231PS",
Summary: "Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD231SD",
Summary: "Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMADD231SS",
Summary: "Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB132PD",
Summary: "Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB132PS",
Summary: "Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB132SD",
Summary: "Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB132SS",
Summary: "Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB213PD",
Summary: "Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB213PS",
Summary: "Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB213SD",
Summary: "Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB213SS",
Summary: "Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB231PD",
Summary: "Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB231PS",
Summary: "Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB231SD",
Summary: "Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFNMSUB231SS",
Summary: "Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"FMA3"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VFPCLASSPDX",
Summary: "Test Class of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSPDY",
Summary: "Test Class of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSPDZ",
Summary: "Test Class of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSPSX",
Summary: "Test Class of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSPSY",
Summary: "Test Class of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSPSZ",
Summary: "Test Class of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSSD",
Summary: "Test Class of Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VFPCLASSSS",
Summary: "Test Class of Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VGATHERDPD",
Summary: "Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm32y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VGATHERDPS",
Summary: "Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm32y", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm32z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VGATHERQPD",
Summary: "Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm64y", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm64z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VGATHERQPS",
Summary: "Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64y", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm64z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VGETEXPPD",
Summary: "Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETEXPPS",
Summary: "Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETEXPSD",
Summary: "Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETEXPSS",
Summary: "Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETMANTPD",
Summary: "Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETMANTPS",
Summary: "Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETMANTSD",
Summary: "Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VGETMANTSS",
Summary: "Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VHADDPD",
Summary: "Packed Double-FP Horizontal Add",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VHADDPS",
Summary: "Packed Single-FP Horizontal Add",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VHSUBPD",
Summary: "Packed Double-FP Horizontal Subtract",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VHSUBPS",
Summary: "Packed Single-FP Horizontal Subtract",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VINSERTF128",
Summary: "Insert Packed Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VINSERTF32X4",
Summary: "Insert 128 Bits of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTF32X8",
Summary: "Insert 256 Bits of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTF64X2",
Summary: "Insert 128 Bits of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTF64X4",
Summary: "Insert 256 Bits of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTI128",
Summary: "Insert Packed Integer Values",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VINSERTI32X4",
Summary: "Insert 128 Bits of Packed Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTI32X8",
Summary: "Insert 256 Bits of Packed Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTI64X2",
Summary: "Insert 128 Bits of Packed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTI64X4",
Summary: "Insert 256 Bits of Packed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VINSERTPS",
Summary: "Insert Packed Single Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VLDDQU",
Summary: "Load Unaligned Integer 128 Bits",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VLDMXCSR",
Summary: "Load MXCSR Register",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMASKMOVDQU",
Summary: "Store Selected Bytes of Double Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "rdi", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMASKMOVPD",
Summary: "Conditional Move Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMASKMOVPS",
Summary: "Conditional Move Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMAXPD",
Summary: "Return Maximum Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMAXPS",
Summary: "Return Maximum Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMAXSD",
Summary: "Return Maximum Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMAXSS",
Summary: "Return Maximum Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMINPD",
Summary: "Return Minimum Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMINPS",
Summary: "Return Minimum Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMINSD",
Summary: "Return Minimum Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMINSS",
Summary: "Return Minimum Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VMOVAPD",
Summary: "Move Aligned Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVAPS",
Summary: "Move Aligned Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVD",
Summary: "Move Doubleword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVDDUP",
Summary: "Move One Double-FP and Duplicate",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQA",
Summary: "Move Aligned Double Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVDQA32",
Summary: "Move Aligned Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQA64",
Summary: "Move Aligned Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQU",
Summary: "Move Unaligned Double Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVDQU16",
Summary: "Move Unaligned Word Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQU32",
Summary: "Move Unaligned Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQU64",
Summary: "Move Unaligned Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVDQU8",
Summary: "Move Unaligned Byte Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVHLPS",
Summary: "Move Packed Single-Precision Floating-Point Values High to Low",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVHPD",
Summary: "Move High Packed Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVHPS",
Summary: "Move High Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVLHPS",
Summary: "Move Packed Single-Precision Floating-Point Values Low to High",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVLPD",
Summary: "Move Low Packed Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVLPS",
Summary: "Move Low Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVMSKPD",
Summary: "Extract Packed Double-Precision Floating-Point Sign Mask",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVMSKPS",
Summary: "Extract Packed Single-Precision Floating-Point Sign Mask",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVNTDQ",
Summary: "Store Double Quadword Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVNTDQA",
Summary: "Load Double Quadword Non-Temporal Aligned Hint",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVNTPD",
Summary: "Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVNTPS",
Summary: "Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVQ",
Summary: "Move Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMOVSD",
Summary: "Move Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VMOVSHDUP",
Summary: "Move Packed Single-FP High and Duplicate",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVSLDUP",
Summary: "Move Packed Single-FP Low and Duplicate",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVSS",
Summary: "Move Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
},
},
{
Opcode: "VMOVUPD",
Summary: "Move Unaligned Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMOVUPS",
Summary: "Move Unaligned Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VMPSADBW",
Summary: "Compute Multiple Packed Sums of Absolute Difference",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VMULPD",
Summary: "Multiply Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VMULPS",
Summary: "Multiply Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VMULSD",
Summary: "Multiply Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VMULSS",
Summary: "Multiply Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VORPD",
Summary: "Bitwise Logical OR of Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VORPS",
Summary: "Bitwise Logical OR of Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPABSB",
Summary: "Packed Absolute Value of Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPABSD",
Summary: "Packed Absolute Value of Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPABSQ",
Summary: "Packed Absolute Value of Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPABSW",
Summary: "Packed Absolute Value of Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPACKSSDW",
Summary: "Pack Doublewords into Words with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPACKSSWB",
Summary: "Pack Words into Bytes with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPACKUSDW",
Summary: "Pack Doublewords into Words with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPACKUSWB",
Summary: "Pack Words into Bytes with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDB",
Summary: "Add Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDD",
Summary: "Add Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDQ",
Summary: "Add Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDSB",
Summary: "Add Packed Signed Byte Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDSW",
Summary: "Add Packed Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDUSB",
Summary: "Add Packed Unsigned Byte Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDUSW",
Summary: "Add Packed Unsigned Word Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPADDW",
Summary: "Add Packed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPALIGNR",
Summary: "Packed Align Right",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPAND",
Summary: "Packed Bitwise Logical AND",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPANDD",
Summary: "Bitwise Logical AND of Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPANDN",
Summary: "Packed Bitwise Logical AND NOT",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "VPANDND",
Summary: "Bitwise Logical AND NOT of Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPANDNQ",
Summary: "Bitwise Logical AND NOT of Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPANDQ",
Summary: "Bitwise Logical AND of Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPAVGB",
Summary: "Average Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPAVGW",
Summary: "Average Packed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBLENDD",
Summary: "Blend Packed Doublewords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPBLENDMB",
Summary: "Blend Byte Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBLENDMD",
Summary: "Blend Doubleword Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBLENDMQ",
Summary: "Blend Quadword Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBLENDMW",
Summary: "Blend Word Vectors Using an OpMask Control",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBLENDVB",
Summary: "Variable Blend Packed Bytes",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPBLENDW",
Summary: "Blend Packed Words",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPBROADCASTB",
Summary: "Broadcast Byte Integer",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBROADCASTD",
Summary: "Broadcast Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBROADCASTMB2Q",
Summary: "Broadcast Low Byte of Mask Register to Packed Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBROADCASTMW2D",
Summary: "Broadcast Low Word of Mask Register to Packed Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBROADCASTQ",
Summary: "Broadcast Quadword Integer",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPBROADCASTW",
Summary: "Broadcast Word Integer",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCLMULQDQ",
Summary: "Carry-Less Quadword Multiplication",
Forms: []Form{
{
ISA: []string{"AVX", "PCLMULQDQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX", "PCLMULQDQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPCMPB",
Summary: "Compare Packed Signed Byte Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPD",
Summary: "Compare Packed Signed Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPEQB",
Summary: "Compare Packed Byte Data for Equality",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPEQD",
Summary: "Compare Packed Doubleword Data for Equality",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPEQQ",
Summary: "Compare Packed Quadword Data for Equality",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPEQW",
Summary: "Compare Packed Word Data for Equality",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPESTRI",
Summary: "Packed Compare Explicit Length Strings, Return Index",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "ecx", Action: 0x2},
{Register: "edx", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "ecx", Action: 0x2},
{Register: "edx", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPCMPESTRM",
Summary: "Packed Compare Explicit Length Strings, Return Mask",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "edx", Action: 0x1},
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x1},
{Register: "edx", Action: 0x1},
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPCMPGTB",
Summary: "Compare Packed Signed Byte Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPGTD",
Summary: "Compare Packed Signed Doubleword Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPGTQ",
Summary: "Compare Packed Data for Greater Than",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPGTW",
Summary: "Compare Packed Signed Word Integers for Greater Than",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPCMPISTRI",
Summary: "Packed Compare Implicit Length Strings, Return Index",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ecx", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "ecx", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPCMPISTRM",
Summary: "Packed Compare Implicit Length Strings, Return Mask",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
ImplicitOperands: []ImplicitOperand{
{Register: "xmm0", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPCMPQ",
Summary: "Compare Packed Signed Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPUB",
Summary: "Compare Packed Unsigned Byte Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPUD",
Summary: "Compare Packed Unsigned Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPUQ",
Summary: "Compare Packed Unsigned Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPUW",
Summary: "Compare Packed Unsigned Word Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCMPW",
Summary: "Compare Packed Signed Word Values",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCOMPRESSD",
Summary: "Store Sparse Packed Doubleword Integer Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCOMPRESSQ",
Summary: "Store Sparse Packed Quadword Integer Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m512", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCONFLICTD",
Summary: "Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPCONFLICTQ",
Summary: "Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERM2F128",
Summary: "Permute Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPERM2I128",
Summary: "Permute 128-Bit Integer Values",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPERMB",
Summary: "Permute Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMD",
Summary: "Permute Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2B",
Summary: "Full Permute of Bytes From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2D",
Summary: "Full Permute of Doublewords From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2PD",
Summary: "Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2PS",
Summary: "Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2Q",
Summary: "Full Permute of Quadwords From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMI2W",
Summary: "Full Permute of Words From Two Tables Overwriting the Index",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMILPD",
Summary: "Permute Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMILPS",
Summary: "Permute Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMPD",
Summary: "Permute Double-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMPS",
Summary: "Permute Single-Precision Floating-Point Elements",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMQ",
Summary: "Permute Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2B",
Summary: "Full Permute of Bytes From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2D",
Summary: "Full Permute of Doublewords From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2PD",
Summary: "Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2PS",
Summary: "Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2Q",
Summary: "Full Permute of Quadwords From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMT2W",
Summary: "Full Permute of Words From Two Tables Overwriting a Table",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPERMW",
Summary: "Permute Word Integers",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPEXPANDD",
Summary: "Load Sparse Packed Doubleword Integer Values from Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPEXPANDQ",
Summary: "Load Sparse Packed Quadword Integer Values from Dense Memory/Register",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPEXTRB",
Summary: "Extract Byte",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m8", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPEXTRD",
Summary: "Extract Doubleword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPEXTRQ",
Summary: "Extract Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r64", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPEXTRW",
Summary: "Extract Word",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPGATHERDD",
Summary: "Gather Packed Doubleword Values Using Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm32y", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm32z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPGATHERDQ",
Summary: "Gather Packed Quadword Values Using Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm32x", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm32x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm32y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPGATHERQD",
Summary: "Gather Packed Doubleword Values Using Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64y", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm64z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPGATHERQQ",
Summary: "Gather Packed Quadword Values Using Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x3},
{Type: "vm64x", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x3},
{Type: "vm64y", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64x", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "vm64y", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "vm64z", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPHADDD",
Summary: "Packed Horizontal Add Doubleword Integer",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPHADDSW",
Summary: "Packed Horizontal Add Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPHADDW",
Summary: "Packed Horizontal Add Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPHMINPOSUW",
Summary: "Packed Horizontal Minimum of Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPHSUBD",
Summary: "Packed Horizontal Subtract Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "VPHSUBSW",
Summary: "Packed Horizontal Subtract Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "VPHSUBW",
Summary: "Packed Horizontal Subtract Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "VPINSRB",
Summary: "Insert Byte",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPINSRD",
Summary: "Insert Doubleword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPINSRQ",
Summary: "Insert Quadword",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPINSRW",
Summary: "Insert Word",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPLZCNTD",
Summary: "Count the Number of Leading Zero Bits for Packed Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPLZCNTQ",
Summary: "Count the Number of Leading Zero Bits for Packed Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512CD"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMADD52HUQ",
Summary: "Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators",
Forms: []Form{
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMADD52LUQ",
Summary: "Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators",
Forms: []Form{
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512IFMA"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMADDUBSW",
Summary: "Multiply and Add Packed Signed and Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMADDWD",
Summary: "Multiply and Add Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMASKMOVD",
Summary: "Conditional Move Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPMASKMOVQ",
Summary: "Conditional Move Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPMAXSB",
Summary: "Maximum of Packed Signed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXSD",
Summary: "Maximum of Packed Signed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXSQ",
Summary: "Maximum of Packed Signed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXSW",
Summary: "Maximum of Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXUB",
Summary: "Maximum of Packed Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXUD",
Summary: "Maximum of Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXUQ",
Summary: "Maximum of Packed Unsigned Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMAXUW",
Summary: "Maximum of Packed Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINSB",
Summary: "Minimum of Packed Signed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINSD",
Summary: "Minimum of Packed Signed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINSQ",
Summary: "Minimum of Packed Signed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINSW",
Summary: "Minimum of Packed Signed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINUB",
Summary: "Minimum of Packed Unsigned Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINUD",
Summary: "Minimum of Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINUQ",
Summary: "Minimum of Packed Unsigned Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMINUW",
Summary: "Minimum of Packed Unsigned Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVB2M",
Summary: "Move Signs of Packed Byte Integers to Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVD2M",
Summary: "Move Signs of Packed Doubleword Integers to Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVDB",
Summary: "Down Convert Packed Doubleword Values to Byte Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVDW",
Summary: "Down Convert Packed Doubleword Values to Word Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVM2B",
Summary: "Expand Bits of Mask Register to Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVM2D",
Summary: "Expand Bits of Mask Register to Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVM2Q",
Summary: "Expand Bits of Mask Register to Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVM2W",
Summary: "Expand Bits of Mask Register to Packed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVMSKB",
Summary: "Move Byte Mask",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "r32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPMOVQ2M",
Summary: "Move Signs of Packed Quadword Integers to Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVQB",
Summary: "Down Convert Packed Quadword Values to Byte Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVQD",
Summary: "Down Convert Packed Quadword Values to Doubleword Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVQW",
Summary: "Down Convert Packed Quadword Values to Word Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSDB",
Summary: "Down Convert Packed Doubleword Values to Byte Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSDW",
Summary: "Down Convert Packed Doubleword Values to Word Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSQB",
Summary: "Down Convert Packed Quadword Values to Byte Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSQD",
Summary: "Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSQW",
Summary: "Down Convert Packed Quadword Values to Word Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSWB",
Summary: "Down Convert Packed Word Values to Byte Values with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXBD",
Summary: "Move Packed Byte Integers to Doubleword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXBQ",
Summary: "Move Packed Byte Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXBW",
Summary: "Move Packed Byte Integers to Word Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXDQ",
Summary: "Move Packed Doubleword Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXWD",
Summary: "Move Packed Word Integers to Doubleword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVSXWQ",
Summary: "Move Packed Word Integers to Quadword Integers with Sign Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSDB",
Summary: "Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSDW",
Summary: "Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSQB",
Summary: "Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m16", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSQD",
Summary: "Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSQW",
Summary: "Down Convert Packed Quadword Values to Word Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m32", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVUSWB",
Summary: "Down Convert Packed Word Values to Byte Values with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVW2M",
Summary: "Move Signs of Packed Word Integers to Mask Register",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVWB",
Summary: "Down Convert Packed Word Values to Byte Values with Truncation",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "m64", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "m128", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "m256", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXBD",
Summary: "Move Packed Byte Integers to Doubleword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXBQ",
Summary: "Move Packed Byte Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXBW",
Summary: "Move Packed Byte Integers to Word Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXDQ",
Summary: "Move Packed Doubleword Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXWD",
Summary: "Move Packed Word Integers to Doubleword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMOVZXWQ",
Summary: "Move Packed Word Integers to Quadword Integers with Zero Extension",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULDQ",
Summary: "Multiply Packed Signed Doubleword Integers and Store Quadword Result",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULHRSW",
Summary: "Packed Multiply Signed Word Integers and Store High Result with Round and Scale",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULHUW",
Summary: "Multiply Packed Unsigned Word Integers and Store High Result",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULHW",
Summary: "Multiply Packed Signed Word Integers and Store High Result",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULLD",
Summary: "Multiply Packed Signed Doubleword Integers and Store Low Result",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULLQ",
Summary: "Multiply Packed Signed Quadword Integers and Store Low Result",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULLW",
Summary: "Multiply Packed Signed Word Integers and Store Low Result",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULTISHIFTQB",
Summary: "Select Packed Unaligned Bytes from Quadword Sources",
Forms: []Form{
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VBMI"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPMULUDQ",
Summary: "Multiply Packed Unsigned Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPOPCNTD",
Summary: "Packed Population Count for Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPOPCNTQ",
Summary: "Packed Population Count for Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512VPOPCNTDQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPOR",
Summary: "Packed Bitwise Logical OR",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPORD",
Summary: "Bitwise Logical OR of Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPORQ",
Summary: "Bitwise Logical OR of Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPROLD",
Summary: "Rotate Packed Doubleword Left",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPROLQ",
Summary: "Rotate Packed Quadword Left",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPROLVD",
Summary: "Variable Rotate Packed Doubleword Left",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPROLVQ",
Summary: "Variable Rotate Packed Quadword Left",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPRORD",
Summary: "Rotate Packed Doubleword Right",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPRORQ",
Summary: "Rotate Packed Quadword Right",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPRORVD",
Summary: "Variable Rotate Packed Doubleword Right",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPRORVQ",
Summary: "Variable Rotate Packed Quadword Right",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSADBW",
Summary: "Compute Sum of Absolute Differences",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSCATTERDD",
Summary: "Scatter Packed Doubleword Values with Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSCATTERDQ",
Summary: "Scatter Packed Quadword Values with Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32y", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSCATTERQD",
Summary: "Scatter Packed Doubleword Values with Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSCATTERQQ",
Summary: "Scatter Packed Quadword Values with Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSHUFB",
Summary: "Packed Shuffle Bytes",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSHUFD",
Summary: "Shuffle Packed Doublewords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSHUFHW",
Summary: "Shuffle Packed High Words",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSHUFLW",
Summary: "Shuffle Packed Low Words",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSIGNB",
Summary: "Packed Sign of Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPSIGND",
Summary: "Packed Sign of Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPSIGNW",
Summary: "Packed Sign of Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPSLLD",
Summary: "Shift Packed Doubleword Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLDQ",
Summary: "Shift Packed Double Quadword Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLQ",
Summary: "Shift Packed Quadword Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLVD",
Summary: "Variable Shift Packed Doubleword Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLVQ",
Summary: "Variable Shift Packed Quadword Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLVW",
Summary: "Variable Shift Packed Word Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSLLW",
Summary: "Shift Packed Word Data Left Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAD",
Summary: "Shift Packed Doubleword Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAQ",
Summary: "Shift Packed Quadword Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAVD",
Summary: "Variable Shift Packed Doubleword Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAVQ",
Summary: "Variable Shift Packed Quadword Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAVW",
Summary: "Variable Shift Packed Word Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRAW",
Summary: "Shift Packed Word Data Right Arithmetic",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLD",
Summary: "Shift Packed Doubleword Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLDQ",
Summary: "Shift Packed Double Quadword Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLQ",
Summary: "Shift Packed Quadword Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLVD",
Summary: "Variable Shift Packed Doubleword Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLVQ",
Summary: "Variable Shift Packed Quadword Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLVW",
Summary: "Variable Shift Packed Word Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSRLW",
Summary: "Shift Packed Word Data Right Logical",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPSUBB",
Summary: "Subtract Packed Byte Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBD",
Summary: "Subtract Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBQ",
Summary: "Subtract Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBSB",
Summary: "Subtract Packed Signed Byte Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBSW",
Summary: "Subtract Packed Signed Word Integers with Signed Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBUSB",
Summary: "Subtract Packed Unsigned Byte Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBUSW",
Summary: "Subtract Packed Unsigned Word Integers with Unsigned Saturation",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPSUBW",
Summary: "Subtract Packed Word Integers",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VPTERNLOGD",
Summary: "Bitwise Ternary Logical Operation on Doubleword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTERNLOGQ",
Summary: "Bitwise Ternary Logical Operation on Quadword Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTEST",
Summary: "Packed Logical Compare",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VPTESTMB",
Summary: "Logical AND of Packed Byte Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTMD",
Summary: "Logical AND of Packed Doubleword Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTMQ",
Summary: "Logical AND of Packed Quadword Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTMW",
Summary: "Logical AND of Packed Word Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTNMB",
Summary: "Logical NAND of Packed Byte Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTNMD",
Summary: "Logical NAND of Packed Doubleword Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTNMQ",
Summary: "Logical NAND of Packed Quadword Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPTESTNMW",
Summary: "Logical NAND of Packed Word Integer Values and Set Mask",
Forms: []Form{
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKHBW",
Summary: "Unpack and Interleave High-Order Bytes into Words",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKHDQ",
Summary: "Unpack and Interleave High-Order Doublewords into Quadwords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKHQDQ",
Summary: "Unpack and Interleave High-Order Quadwords into Double Quadwords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKHWD",
Summary: "Unpack and Interleave High-Order Words into Doublewords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKLBW",
Summary: "Unpack and Interleave Low-Order Bytes into Words",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKLDQ",
Summary: "Unpack and Interleave Low-Order Doublewords into Quadwords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKLQDQ",
Summary: "Unpack and Interleave Low-Order Quadwords into Double Quadwords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPUNPCKLWD",
Summary: "Unpack and Interleave Low-Order Words into Doublewords",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512BW"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPXOR",
Summary: "Packed Bitwise Logical Exclusive OR",
Forms: []Form{
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX2"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
},
},
{
Opcode: "VPXORD",
Summary: "Bitwise Logical Exclusive OR of Packed Doubleword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VPXORQ",
Summary: "Bitwise Logical Exclusive OR of Packed Quadword Integers",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRANGEPD",
Summary: "Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRANGEPS",
Summary: "Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRANGESD",
Summary: "Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRANGESS",
Summary: "Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRCP14PD",
Summary: "Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRCP14PS",
Summary: "Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRCP14SD",
Summary: "Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRCP14SS",
Summary: "Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRCP28PD",
Summary: "Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRCP28PS",
Summary: "Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRCP28SD",
Summary: "Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRCP28SS",
Summary: "Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRCPPS",
Summary: "Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VRCPSS",
Summary: "Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VREDUCEPD",
Summary: "Perform Reduction Transformation on Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VREDUCEPS",
Summary: "Perform Reduction Transformation on Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VREDUCESD",
Summary: "Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VREDUCESS",
Summary: "Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRNDSCALEPD",
Summary: "Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRNDSCALEPS",
Summary: "Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRNDSCALESD",
Summary: "Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRNDSCALESS",
Summary: "Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VROUNDPD",
Summary: "Round Packed Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VROUNDPS",
Summary: "Round Packed Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VROUNDSD",
Summary: "Round Scalar Double Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VROUNDSS",
Summary: "Round Scalar Single Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VRSQRT14PD",
Summary: "Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRSQRT14PS",
Summary: "Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRSQRT14SD",
Summary: "Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRSQRT14SS",
Summary: "Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VRSQRT28PD",
Summary: "Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRSQRT28PS",
Summary: "Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRSQRT28SD",
Summary: "Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRSQRT28SS",
Summary: "Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error",
Forms: []Form{
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
SuppressAllExceptions: true,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512ER"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VRSQRTPS",
Summary: "Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VRSQRTSS",
Summary: "Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VSCALEFPD",
Summary: "Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSCALEFPS",
Summary: "Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSCALEFSD",
Summary: "Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSCALEFSS",
Summary: "Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSCATTERDPD",
Summary: "Scatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32y", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSCATTERDPS",
Summary: "Scatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm32z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSCATTERQPD",
Summary: "Scatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSCATTERQPS",
Summary: "Scatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64x", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64y", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "vm64z", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFF32X4",
Summary: "Shuffle 128-Bit Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFF64X2",
Summary: "Shuffle 128-Bit Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFI32X4",
Summary: "Shuffle 128-Bit Packed Doubleword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFI64X2",
Summary: "Shuffle 128-Bit Packed Quadword Integer Values",
Forms: []Form{
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFPD",
Summary: "Shuffle Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSHUFPS",
Summary: "Shuffle Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VSQRTPD",
Summary: "Compute Square Roots of Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSQRTPS",
Summary: "Compute Square Roots of Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSQRTSD",
Summary: "Compute Square Root of Scalar Double-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSQRTSS",
Summary: "Compute Square Root of Scalar Single-Precision Floating-Point Value",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSTMXCSR",
Summary: "Store MXCSR Register State",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x2},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VSUBPD",
Summary: "Subtract Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSUBPS",
Summary: "Subtract Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSUBSD",
Summary: "Subtract Scalar Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VSUBSS",
Summary: "Subtract Scalar Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
EmbeddedRounding: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
EmbeddedRounding: true,
},
},
},
{
Opcode: "VTESTPD",
Summary: "Packed Double-Precision Floating-Point Bit Test",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VTESTPS",
Summary: "Packed Single-Precision Floating-Point Bit Test",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
},
EncodingType: 0x3,
},
},
},
{
Opcode: "VUCOMISD",
Summary: "Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VUCOMISS",
Summary: "Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
},
EncodingType: 0x4,
SuppressAllExceptions: true,
},
},
},
{
Opcode: "VUNPCKHPD",
Summary: "Unpack and Interleave High Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VUNPCKHPS",
Summary: "Unpack and Interleave High Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VUNPCKLPD",
Summary: "Unpack and Interleave Low Packed Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VUNPCKLPS",
Summary: "Unpack and Interleave Low Packed Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512F"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
},
},
{
Opcode: "VXORPD",
Summary: "Bitwise Logical XOR for Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VXORPS",
Summary: "Bitwise Logical XOR for Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x3,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m256", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "xmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ", "AVX512VL"},
Operands: []Operand{
{Type: "ymm", Action: 0x1},
{Type: "ymm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "ymm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Broadcast: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "m512", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x3},
},
EncodingType: 0x4,
CancellingInputs: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "k", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
Zeroing: true,
},
{
ISA: []string{"AVX512DQ"},
Operands: []Operand{
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x1},
{Type: "zmm", Action: 0x2},
},
EncodingType: 0x4,
CancellingInputs: true,
},
},
},
{
Opcode: "VZEROALL",
Summary: "Zero All YMM Registers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{},
EncodingType: 0x3,
},
},
},
{
Opcode: "VZEROUPPER",
Summary: "Zero Upper Bits of YMM Registers",
Forms: []Form{
{
ISA: []string{"AVX"},
Operands: []Operand{},
EncodingType: 0x3,
},
},
},
{
Opcode: "XADDB",
Summary: "Exchange and Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XADDL",
Summary: "Exchange and Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XADDQ",
Summary: "Exchange and Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XADDW",
Summary: "Exchange and Add",
Forms: []Form{
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XCHGB",
Summary: "Exchange Register/Memory with Register",
Forms: []Form{
{
Operands: []Operand{
{Type: "m8", Action: 0x3},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x3},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XCHGL",
Summary: "Exchange Register/Memory with Register",
Forms: []Form{
{
Operands: []Operand{
{Type: "eax", Action: 0x3},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x3},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x3},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XCHGQ",
Summary: "Exchange Register/Memory with Register",
Forms: []Form{
{
Operands: []Operand{
{Type: "m64", Action: 0x3},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x3},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "rax", Action: 0x3},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XCHGW",
Summary: "Exchange Register/Memory with Register",
Forms: []Form{
{
Operands: []Operand{
{Type: "ax", Action: 0x3},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x3},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x3},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
},
},
{
Opcode: "XGETBV",
Summary: "Get Value of Extended Control Register",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "eax", Action: 0x2},
{Register: "ecx", Action: 0x1},
{Register: "edx", Action: 0x2},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "XLAT",
Summary: "Table Look-up Translation",
Forms: []Form{
{
Operands: []Operand{},
ImplicitOperands: []ImplicitOperand{
{Register: "al", Action: 0x3},
{Register: "ebx", Action: 0x1},
},
EncodingType: 0x1,
},
},
},
{
Opcode: "XORB",
Summary: "Logical Exclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "al", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "m8", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r8", Action: 0x1},
{Type: "r8", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "XORL",
Summary: "Logical Exclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "eax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "m32", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r32", Action: 0x1},
{Type: "r32", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "XORPD",
Summary: "Bitwise Logical XOR for Double-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE2"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "XORPS",
Summary: "Bitwise Logical XOR for Single-Precision Floating-Point Values",
Forms: []Form{
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "m128", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
},
{
ISA: []string{"SSE"},
Operands: []Operand{
{Type: "xmm", Action: 0x1},
{Type: "xmm", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "XORQ",
Summary: "Logical Exclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm32", Action: 0x0},
{Type: "rax", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "m64", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r64", Action: 0x1},
{Type: "r64", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
{
Opcode: "XORW",
Summary: "Logical Exclusive OR",
Forms: []Form{
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "ax", Action: 0x3},
},
EncodingType: 0x1,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm16", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "imm8", Action: 0x0},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "m16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "m16", Action: 0x3},
},
EncodingType: 0x2,
},
{
Operands: []Operand{
{Type: "r16", Action: 0x1},
{Type: "r16", Action: 0x3},
},
EncodingType: 0x2,
CancellingInputs: true,
},
},
},
}
golang-github-mmcloughlin-avo-0.5.0/internal/load/ 0000775 0000000 0000000 00000000000 14370657153 0022110 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/load/annoyingaliases.sh 0000775 0000000 0000000 00000001300 14370657153 0025625 0 ustar 00root root 0000000 0000000 #!/bin/bash -e
self=$(basename $0)
output=$1
# Based on an archived copy of src/cmd/asm/internal/arch/arch.go.
arch="../data/arch.go.txt"
{
echo "// Code generated by ${self}. DO NOT EDIT."
echo
echo 'package load'
echo
echo 'var annoyingaliases = []alias{'
awk '
/archX86/ { x86=1 }
/^}/ { x86=0 }
x86 && /x86/ && /instructions\[/ {
from=$1
to=$3
sub(/instructions\[\"/, "", from)
sub(/\"\]/, "", from)
sub(/x86\.A/, "", to)
if(from != to) {
printf("\t{\"%s\", \"%s\"},\n", from, to)
}
}
' ${arch}
echo '}'
} | gofmt > ${output}
golang-github-mmcloughlin-avo-0.5.0/internal/load/doc.go 0000664 0000000 0000000 00000000123 14370657153 0023200 0 ustar 00root root 0000000 0000000 // Package load loads the instruction database from external sources.
package load
golang-github-mmcloughlin-avo-0.5.0/internal/load/load.go 0000664 0000000 0000000 00000056120 14370657153 0023362 0 ustar 00root root 0000000 0000000 package load
import (
"errors"
"fmt"
"path/filepath"
"reflect"
"regexp"
"sort"
"strconv"
"strings"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/opcodescsv"
"github.com/mmcloughlin/avo/internal/opcodesxml"
)
// This file is a mess. Some of this complexity is unavoidable, since the state
// of x86 instruction databases is also a mess, especially when it comes to
// idiosyncrasies of the Go assembler implementation. Some of the complexity is
// probably avoidable by migrating to using Intel XED
// (https://github.com/mmcloughlin/avo/issues/23), but for now this is an unholy
// mix of PeachPy's Opcodes database and Go's x86 CSV file.
//
// The goal is simply to keep as much of the uglyness in this file as possible,
// producing a clean instruction database for the rest of avo to use. Any nasty
// logic here should be backed up with a test somewhere to ensure the result is
// correct, even if the code that produced it is awful.
// Expected data source filenames.
const (
DefaultCSVName = "x86.v0.2.csv"
DefaultOpcodesXMLName = "x86_64.xml"
)
// Loader builds an instruction database from underlying datasources.
type Loader struct {
X86CSVPath string
OpcodesXMLPath string
alias map[opcodescsv.Alias]string
order map[string]opcodescsv.OperandOrder
}
// NewLoaderFromDataDir constructs an instruction loader from datafiles in the
// given directory. The files themselves are expected to have the standard
// names: see Default*Name constants.
func NewLoaderFromDataDir(dir string) *Loader {
return &Loader{
X86CSVPath: filepath.Join(dir, DefaultCSVName),
OpcodesXMLPath: filepath.Join(dir, DefaultOpcodesXMLName),
}
}
// Load performs instruction loading.
func (l *Loader) Load() ([]inst.Instruction, error) {
if err := l.init(); err != nil {
return nil, err
}
// Load Opcodes XML file.
iset, err := opcodesxml.ReadFile(l.OpcodesXMLPath)
if err != nil {
return nil, err
}
// Load opcodes XML data, grouped by Go opcode.
im := map[string]*inst.Instruction{}
for _, i := range iset.Instructions {
for _, f := range i.Forms {
if !l.include(f) {
continue
}
for _, opcode := range l.gonames(f) {
if im[opcode] == nil {
im[opcode] = &inst.Instruction{
Opcode: opcode,
Summary: i.Summary,
}
}
forms := l.forms(opcode, f)
im[opcode].Forms = append(im[opcode].Forms, forms...)
}
}
}
// Add extras to our list.
for _, e := range extras {
im[e.Opcode] = e
}
// Merge aliased forms. This is primarily for MOVQ (issue #50).
for _, a := range aliases {
if existing, found := im[a.From]; found {
im[a.To].Forms = append(im[a.To].Forms, existing.Forms...)
}
}
// Apply list of aliases.
for _, a := range aliases {
cpy := *im[a.To]
cpy.Opcode = a.From
cpy.AliasOf = a.To
im[a.From] = &cpy
}
// Dedupe forms.
for _, i := range im {
i.Forms = dedupe(i.Forms)
}
// Resolve forms that have VEX and EVEX encoded forms.
for _, i := range im {
i.Forms, err = vexevex(i.Forms)
if err != nil {
return nil, err
}
}
// Convert to a slice. Sort instructions and forms for reproducibility.
is := make([]inst.Instruction, 0, len(im))
for _, i := range im {
is = append(is, *i)
}
sort.Slice(is, func(i, j int) bool {
return is[i].Opcode < is[j].Opcode
})
for _, i := range im {
sortforms(i.Forms)
}
return is, nil
}
func (l *Loader) init() error {
icsv, err := opcodescsv.ReadFile(l.X86CSVPath)
if err != nil {
return err
}
l.alias, err = opcodescsv.BuildAliasMap(icsv)
if err != nil {
return err
}
l.order = opcodescsv.BuildOrderMap(icsv)
return nil
}
// include decides whether to include the instruction form in the avo listing.
// This discards some opcodes that are not supported in Go.
func (l Loader) include(f opcodesxml.Form) bool {
// Exclude certain ISAs simply not present in Go
for _, isa := range f.ISA {
switch isa.ID {
// AMD-only.
case "TBM", "CLZERO", "FMA4", "XOP", "SSE4A", "3dnow!", "3dnow!+":
return false
// AVX512PF doesn't work without some special case handling, and is only on Knights Landing/Knights Mill.
case "AVX512PF":
return false
// Incomplete support for some prefetching instructions.
case "PREFETCH", "PREFETCHW", "PREFETCHWT1", "CLWB":
return false
// Remaining oddities.
case "MONITORX", "FEMMS":
return false
}
}
// Go appears to have skeleton support for MMX instructions. See the many TODO lines in the testcases:
// Reference: https://github.com/golang/go/blob/649b89377e91ad6dbe710784f9e662082d31a1ff/src/cmd/asm/internal/asm/testdata/amd64enc.s#L3310-L3312
//
// //TODO: PALIGNR $7, (BX), M2 // 0f3a0f1307
// //TODO: PALIGNR $7, (R11), M2 // 410f3a0f1307
// //TODO: PALIGNR $7, M2, M2 // 0f3a0fd207
//
if f.MMXMode == "MMX" {
return false
}
// x86 csv contains a number of CMOV* instructions which are actually not valid
// Go instructions. The valid Go forms should have different opcodes from GNU.
// Therefore a decent "heuristic" is CMOV* instructions that do not have
// aliases.
if strings.HasPrefix(f.GASName, "cmov") && l.lookupAlias(f) == "" {
return false
}
// Some specific exclusions.
switch f.GASName {
// Certain branch instructions appear to not be supported.
//
// Reference: https://github.com/golang/go/blob/649b89377e91ad6dbe710784f9e662082d31a1ff/src/cmd/asm/internal/asm/testdata/amd64enc.s#L757
//
// //TODO: CALLQ* (BX) // ff13
//
// Reference: https://github.com/golang/go/blob/649b89377e91ad6dbe710784f9e662082d31a1ff/src/cmd/asm/internal/asm/testdata/amd64enc.s#L2108
//
// //TODO: LJMPL* (R11) // 41ff2b
//
case "callq", "jmpl":
return false
// MOVABS doesn't seem to be supported either.
//
// Reference: https://github.com/golang/go/blob/1ac84999b93876bb06887e483ae45b27e03d7423/src/cmd/asm/internal/asm/testdata/amd64enc.s#L2354
//
// //TODO: MOVABSB 0x123456789abcdef1, AL // a0f1debc9a78563412
//
case "movabs":
return false
// Only one XLAT form is supported.
//
// Reference: https://github.com/golang/arch/blob/b19384d3c130858bb31a343ea8fce26be71b5998/x86/x86.v0.2.csv#L2221-L2222
//
// "XLATB","XLAT","xlat","D7","V","V","","ignoreREXW","","",""
// "XLATB","XLAT","xlat","REX.W D7","N.E.","V","","pseudo","","",""
//
// Reference: https://github.com/golang/go/blob/b3294d9491b898396e134bad5412d85337c37b64/src/cmd/internal/obj/x86/asm6.go#L1519
//
// {AXLAT, ynone, Px, opBytes{0xd7}},
//
// TODO(mbm): confirm the Px prefix means non REX mode
case "xlatb":
return f.Encoding.REX == nil
}
return true
}
func (l Loader) lookupAlias(f opcodesxml.Form) string {
// Attempt lookup with datasize.
k := opcodescsv.Alias{
Opcode: f.GASName,
DataSize: datasize(f),
NumOperands: len(f.Operands),
}
if a := l.alias[k]; a != "" {
return a
}
// Fallback to unknown datasize.
k.DataSize = 0
return l.alias[k]
}
func (l Loader) gonames(f opcodesxml.Form) []string {
s := datasize(f)
// Suspect a "bug" in x86 CSV for the CVTTSD2SQ instruction, as CVTTSD2SL appears twice.
//
// Reference: https://github.com/golang/arch/blob/b19384d3c130858bb31a343ea8fce26be71b5998/x86/x86.v0.2.csv#L345-L346
//
// "CVTTSD2SI r32, xmm2/m64","CVTTSD2SL xmm2/m64, r32","cvttsd2si xmm2/m64, r32","F2 0F 2C /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
// "CVTTSD2SI r64, xmm2/m64","CVTTSD2SL xmm2/m64, r64","cvttsd2siq xmm2/m64, r64","F2 REX.W 0F 2C /r","N.E.","V","SSE2","","w,r","Y","64"
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/internal/obj/x86/asm6.go#L1073-L1074
//
// {ACVTTSD2SL, yxcvfl, Pf2, opBytes{0x2c}},
// {ACVTTSD2SQ, yxcvfq, Pw, opBytes{Pf2, 0x2c}},
//
if f.GASName == "cvttsd2si" && s == 64 {
return []string{"CVTTSD2SQ"}
}
// Return alias if available.
if a := l.lookupAlias(f); a != "" {
return []string{a}
}
// Some odd special cases.
// TODO(mbm): can this be handled by processing csv entries with slashes /
if f.GoName == "RET" && len(f.Operands) == 1 {
return []string{"RETFW", "RETFL", "RETFQ"}
}
// IMUL 3-operand forms are not recorded correctly in either x86 CSV or opcodes. They are supposed to be called IMUL3{W,L,Q}
//
// Reference: https://github.com/golang/go/blob/649b89377e91ad6dbe710784f9e662082d31a1ff/src/cmd/internal/obj/x86/asm6.go#L1112-L1114
//
// {AIMUL3W, yimul3, Pe, opBytes{0x6b, 00, 0x69, 00}},
// {AIMUL3L, yimul3, Px, opBytes{0x6b, 00, 0x69, 00}},
// {AIMUL3Q, yimul3, Pw, opBytes{0x6b, 00, 0x69, 00}},
//
// Reference: https://github.com/golang/arch/blob/b19384d3c130858bb31a343ea8fce26be71b5998/x86/x86.v0.2.csv#L549
//
// "IMUL r32, r/m32, imm32","IMULL imm32, r/m32, r32","imull imm32, r/m32, r32","69 /r id","V","V","","operand32","rw,r,r","Y","32"
//
if strings.HasPrefix(f.GASName, "imul") && len(f.Operands) == 3 {
return []string{strings.ToUpper(f.GASName[:4] + "3" + f.GASName[4:])}
}
// Use go opcode from Opcodes XML where available.
if f.GoName != "" {
return []string{f.GoName}
}
// Fallback to GAS name.
n := strings.ToUpper(f.GASName)
// Some need data sizes added to them.
n += sizesuffix(n, f)
return []string{n}
}
func (l Loader) forms(opcode string, f opcodesxml.Form) []inst.Form {
// Map operands to avo format and ensure correct order.
ops := operands(f.Operands)
switch l.order[opcode] {
case opcodescsv.IntelOrder:
// Nothing to do.
case opcodescsv.CMP3Order:
ops[0], ops[1] = ops[1], ops[0]
case opcodescsv.UnknownOrder:
// Instructions not in x86 CSV are assumed to have reverse intel order.
fallthrough
case opcodescsv.ReverseIntelOrder:
for l, r := 0, len(ops)-1; l < r; l, r = l+1, r-1 {
ops[l], ops[r] = ops[r], ops[l]
}
}
// Handle some exceptions.
// TODO(mbm): consider if there's some nicer way to handle the list of special cases.
switch opcode {
// Go assembler has an internal Yu2 operand type for unsigned 2-bit immediates.
//
// Reference: https://github.com/golang/go/blob/6d5caf38e37bf9aeba3291f1f0b0081f934b1187/src/cmd/internal/obj/x86/asm6.go#L109
//
// Yu2 // $x, x fits in uint2
//
// Reference: https://github.com/golang/go/blob/6d5caf38e37bf9aeba3291f1f0b0081f934b1187/src/cmd/internal/obj/x86/asm6.go#L858-L864
//
// var yextractps = []ytab{
// {Zibr_m, 2, argList{Yu2, Yxr, Yml}},
// }
//
// var ysha1rnds4 = []ytab{
// {Zibm_r, 2, argList{Yu2, Yxm, Yxr}},
// }
//
case "SHA1RNDS4", "EXTRACTPS":
ops[0].Type = "imm2u"
}
// Extract implicit operands.
var implicits []inst.ImplicitOperand
for _, implicit := range f.ImplicitOperands {
implicits = append(implicits, inst.ImplicitOperand{
Register: implicit.ID,
Action: inst.ActionFromReadWrite(implicit.Input, implicit.Output),
})
}
// Extract ISA flags.
var isas []string
for _, isa := range f.ISA {
isas = append(isas, isa.ID)
}
sort.Strings(isas)
// Initialize form.
form := inst.Form{
ISA: isas,
Operands: ops,
ImplicitOperands: implicits,
EncodingType: enctype(f),
CancellingInputs: f.CancellingInputs,
}
// Apply modification stages to produce final list of forms.
stages := []func(string, inst.Form) []inst.Form{
avx512rounding,
avx512sae,
avx512bcst,
avx512masking,
avx512zeroing,
}
forms := []inst.Form{form}
for _, stage := range stages {
var next []inst.Form
for _, f := range forms {
next = append(next, stage(opcode, f)...)
}
forms = next
}
return forms
}
// operands maps Opcodes XML operands to avo format. Returned in Intel order.
func operands(ops []opcodesxml.Operand) []inst.Operand {
n := len(ops)
r := make([]inst.Operand, n)
for i, op := range ops {
r[i] = operand(op)
}
return r
}
// operand maps an Opcodes XML operand to avo format.
func operand(op opcodesxml.Operand) inst.Operand {
return inst.Operand{
Type: op.Type,
Action: inst.ActionFromReadWrite(op.Input, op.Output),
}
}
// avx512rounding handles AVX-512 embedded rounding. Opcodes database represents
// these as {er} operands, whereas Go uses instruction suffixes. Remove the
// operand if present and set the corresponding flag.
func avx512rounding(opcode string, f inst.Form) []inst.Form {
i, found := findoperand(f.Operands, "{er}")
if !found {
return []inst.Form{f}
}
// Delete the {er} operand.
f.Operands = append(f.Operands[:i], f.Operands[i+1:]...)
// Create a second form with the rounding flag.
er := f.Clone()
er.EmbeddedRounding = true
return []inst.Form{f, er}
}
// avx512sae handles AVX-512 "suppress all exceptions". Opcodes database
// represents these as {sae} operands, whereas Go uses instruction suffixes.
// Remove the operand if present and set the corresponding flag.
func avx512sae(opcode string, f inst.Form) []inst.Form {
i, found := findoperand(f.Operands, "{sae}")
if !found {
return []inst.Form{f}
}
// Delete the {sae} operand.
f.Operands = append(f.Operands[:i], f.Operands[i+1:]...)
// Create a second form with the rounding flag.
sae := f.Clone()
sae.SuppressAllExceptions = true
return []inst.Form{f, sae}
}
// avx512bcst handles AVX-512 broadcast. Opcodes database uses operands like
// "m512/m64bcst" to indicate broadcast. Go uses the BCST suffix to enable it.
// Split the form into two, the regular and broadcast versions.
func avx512bcst(opcode string, f inst.Form) []inst.Form {
// Look for broadcast operand.
idx := -1
for i, op := range f.Operands {
if bcstrx.MatchString(op.Type) {
idx = i
break
}
}
if idx < 0 {
return []inst.Form{f}
}
// Create two forms.
match := bcstrx.FindStringSubmatch(f.Operands[idx].Type)
mem := f.Clone()
mem.Operands[idx].Type = match[1]
bcst := f.Clone()
bcst.Broadcast = true
bcst.Operands[idx].Type = match[2]
return []inst.Form{mem, bcst}
}
var bcstrx = regexp.MustCompile(`^(m\d+)/(m\d+)bcst$`)
// avx512masking handles AVX-512 masking forms.
func avx512masking(opcode string, f inst.Form) []inst.Form {
// In order to support implicit masking (with K0), Go has two instruction
// forms, one with the mask and one without. The mask register precedes the
// output register. The Opcodes database (similar to Intel manuals)
// represents masking with the {k} operand suffix, possibly with {z} for
// zeroing.
// Look for masking with possible zeroing. Zeroing is handled by a later
// processing stage, but we need to be sure to notice and preserve it here.
masking := false
zeroing := false
idx := -1
for i := range f.Operands {
op := &f.Operands[i]
if strings.HasSuffix(op.Type, "{z}") {
zeroing = true
op.Type = strings.TrimSuffix(op.Type, "{z}")
}
if strings.HasSuffix(op.Type, "{k}") {
masking = true
idx = i
op.Type = strings.TrimSuffix(op.Type, "{k}")
break
}
}
// Bail if no masking.
if !masking {
return []inst.Form{f}
}
// Unmasked variant.
unmasked := f.Clone()
// Masked form has "k" operand inserted.
masked := f.Clone()
mask := inst.Operand{Type: "k", Action: inst.R}
ops := append([]inst.Operand(nil), masked.Operands[:idx]...)
ops = append(ops, mask)
ops = append(ops, masked.Operands[idx:]...)
masked.Operands = ops
// Restore zeroing suffix, so it can he handled later.
if zeroing {
masked.Operands[idx+1].Type += "{z}"
}
// Almost all instructions take an optional mask, apart from a few
// special cases.
if maskrequired[opcode] {
return []inst.Form{masked}
}
return []inst.Form{unmasked, masked}
}
// avx512zeroing handles AVX-512 zeroing forms.
func avx512zeroing(opcode string, f inst.Form) []inst.Form {
// Zeroing in Go is handled with the Z opcode suffix. Note that zeroing has
// an important effect on the instruction form, since the merge masking form
// has an input dependency for the output register, and the zeroing form
// does not.
// Look for zeroing operand.
idx := -1
for i := range f.Operands {
op := &f.Operands[i]
if strings.HasSuffix(op.Type, "{z}") {
idx = i
op.Type = strings.TrimSuffix(op.Type, "{z}")
}
}
if idx < 0 {
return []inst.Form{f}
}
// Duplicate into two forms for merging and zeroing.
merging := f.Clone()
merging.Operands[idx].Action |= inst.R
zeroing := f.Clone()
zeroing.Zeroing = true
return []inst.Form{merging, zeroing}
}
// findoperand looks for an operand type and returns its index, if found.
func findoperand(ops []inst.Operand, t string) (int, bool) {
for i, op := range ops {
if op.Type == t {
return i, true
}
}
return 0, false
}
// enctype selects the encoding type for the instruction form.
func enctype(f opcodesxml.Form) inst.EncodingType {
switch {
case f.Encoding.EVEX != nil:
return inst.EncodingTypeEVEX
case f.Encoding.VEX != nil:
return inst.EncodingTypeVEX
case f.Encoding.REX != nil:
return inst.EncodingTypeREX
default:
return inst.EncodingTypeLegacy
}
}
// datasize (intelligently) guesses the datasize of an instruction form.
func datasize(f opcodesxml.Form) int {
// Determine from encoding bits.
e := f.Encoding
if e.VEX != nil && e.VEX.W == nil {
return 128 << e.VEX.L
}
// Guess from operand types.
size := 0
for _, op := range f.Operands {
s := operandsize(op)
if s != 0 && (size == 0 || op.Output) {
size = s
}
}
return size
}
func operandsize(op opcodesxml.Operand) int {
for s := 256; s >= 8; s /= 2 {
if strings.HasSuffix(op.Type, strconv.Itoa(s)) {
return s
}
}
return 0
}
// sizesuffix returns an optional size suffix to be added to the opcode name.
func sizesuffix(n string, f opcodesxml.Form) string {
// Reference: https://github.com/golang/arch/blob/5de9028c2478e6cb4e1c1b1f4386f3f0a93e383a/x86/x86avxgen/main.go#L275-L322
//
// func addGoSuffixes(ctx *context) {
// var opcodeSuffixMatchers map[string][]string
// {
// opXY := []string{"VL=0", "X", "VL=1", "Y"}
// opXYZ := []string{"VL=0", "X", "VL=1", "Y", "VL=2", "Z"}
// opQ := []string{"REXW=1", "Q"}
// opLQ := []string{"REXW=0", "L", "REXW=1", "Q"}
//
// opcodeSuffixMatchers = map[string][]string{
// "VCVTPD2DQ": opXY,
// "VCVTPD2PS": opXY,
// "VCVTTPD2DQ": opXY,
// "VCVTQQ2PS": opXY,
// "VCVTUQQ2PS": opXY,
// "VCVTPD2UDQ": opXY,
// "VCVTTPD2UDQ": opXY,
//
// "VFPCLASSPD": opXYZ,
// "VFPCLASSPS": opXYZ,
//
// "VCVTSD2SI": opQ,
// "VCVTTSD2SI": opQ,
// "VCVTTSS2SI": opQ,
// "VCVTSS2SI": opQ,
//
// "VCVTSD2USI": opLQ,
// "VCVTSS2USI": opLQ,
// "VCVTTSD2USI": opLQ,
// "VCVTTSS2USI": opLQ,
// "VCVTUSI2SD": opLQ,
// "VCVTUSI2SS": opLQ,
// "VCVTSI2SD": opLQ,
// "VCVTSI2SS": opLQ,
// "ANDN": opLQ,
// "BEXTR": opLQ,
// "BLSI": opLQ,
// "BLSMSK": opLQ,
// "BLSR": opLQ,
// "BZHI": opLQ,
// "MULX": opLQ,
// "PDEP": opLQ,
// "PEXT": opLQ,
// "RORX": opLQ,
// "SARX": opLQ,
// "SHLX": opLQ,
// "SHRX": opLQ,
// }
// }
//
type rule struct {
Size func(opcodesxml.Form) int
Suffix map[int]string
}
var (
XY = rule{evexLLsize, map[int]string{128: "X", 256: "Y"}}
XYZ = rule{evexLLsize, map[int]string{128: "X", 256: "Y", 512: "Z"}}
Q = rule{rexWsize, map[int]string{64: "Q"}}
LQ = rule{rexWsize, map[int]string{32: "L", 64: "Q"}}
WLQ = rule{datasize, map[int]string{16: "W", 32: "L", 64: "Q"}}
)
rules := map[string]rule{
"VCVTPD2DQ": XY,
"VCVTPD2PS": XY,
"VCVTTPD2DQ": XY,
"VCVTQQ2PS": XY,
"VCVTUQQ2PS": XY,
"VCVTPD2UDQ": XY,
"VCVTTPD2UDQ": XY,
"VFPCLASSPD": XYZ,
"VFPCLASSPS": XYZ,
"VCVTSD2SI": Q,
"VCVTTSD2SI": Q,
"VCVTTSS2SI": Q,
"VCVTSS2SI": Q,
"VCVTSD2USI": LQ,
"VCVTSS2USI": LQ,
"VCVTTSD2USI": LQ,
"VCVTTSS2USI": LQ,
"VCVTUSI2SD": LQ,
"VCVTUSI2SS": LQ,
"VCVTSI2SD": LQ,
"VCVTSI2SS": LQ,
"ANDN": LQ,
"BEXTR": LQ,
"BLSI": LQ,
"BLSMSK": LQ,
"BLSR": LQ,
"BZHI": LQ,
"MULX": LQ,
"PDEP": LQ,
"PEXT": LQ,
"RORX": LQ,
"SARX": LQ,
"SHLX": LQ,
"SHRX": LQ,
"RDRAND": LQ,
"RDSEED": LQ,
// MOVEBE* instructions seem to be inconsistent with x86 CSV.
//
// Reference: https://github.com/golang/arch/blob/b19384d3c130858bb31a343ea8fce26be71b5998/x86/x86spec/format.go#L282-L287
//
// "MOVBE r16, m16": "movbeww",
// "MOVBE m16, r16": "movbeww",
// "MOVBE m32, r32": "movbell",
// "MOVBE r32, m32": "movbell",
// "MOVBE m64, r64": "movbeqq",
// "MOVBE r64, m64": "movbeqq",
//
"MOVBEW": WLQ,
"MOVBEL": WLQ,
"MOVBEQ": WLQ,
}
r, ok := rules[n]
if !ok {
return ""
}
s := r.Size(f)
return r.Suffix[s]
}
func rexWsize(f opcodesxml.Form) int {
e := f.Encoding
switch {
case e.EVEX != nil && e.EVEX.W != nil:
return 32 << *e.EVEX.W
default:
return 32
}
}
func evexLLsize(f opcodesxml.Form) int {
e := f.Encoding
if e.EVEX == nil {
return 0
}
size := map[string]int{"00": 128, "01": 256, "10": 512}
return size[e.EVEX.LL]
}
// vexevex fixes instructions that have both VEX and EVEX encoded forms with the
// same operand types. Go uses the VEX encoded form unless EVEX-only features
// are used. This function will only keep the VEX encoded version in the case
// where both exist.
//
// Note this is somewhat of a hack. There are real reasons to use the EVEX
// encoded version even when both exist. The main reason to use the EVEX version
// rather than VEX is to use the registers Z16, Z17, ... and up. However, avo
// does not implement the logic to distinguish between the two halfs of the
// vector registers. So in its current state the only reason to need the EVEX
// version is to encode suffixes, and these are represented by other instruction
// forms.
//
// TODO(mbm): restrict use of vector registers https://github.com/mmcloughlin/avo/issues/146
func vexevex(fs []inst.Form) ([]inst.Form, error) {
// Group forms by deduping ID.
byid := map[string][]inst.Form{}
for _, f := range fs {
id := fmt.Sprintf(
"%s {%t,%t,%t,%t}",
strings.Join(f.Signature(), "_"),
f.Zeroing,
f.EmbeddedRounding,
f.SuppressAllExceptions,
f.Broadcast,
)
byid[id] = append(byid[id], f)
}
// Resolve overlaps.
var results []inst.Form
for id, group := range byid {
if len(group) < 2 {
results = append(results, group...)
continue
}
// We expect these conflicts are caused by VEX/EVEX pairs. Bail if it's
// something else.
if len(group) > 2 {
return nil, fmt.Errorf("more than two forms of type %q", id)
}
if group[0].EncodingType == inst.EncodingTypeEVEX {
group[0], group[1] = group[1], group[0]
}
if group[0].EncodingType != inst.EncodingTypeVEX || group[1].EncodingType != inst.EncodingTypeEVEX {
fmt.Println(group)
return nil, errors.New("expected pair of VEX/EVEX encoded forms")
}
vex := group[0]
// In this case we only keep the VEX encoded form.
results = append(results, vex)
}
return results, nil
}
// dedupe a list of forms.
func dedupe(fs []inst.Form) []inst.Form {
uniq := make([]inst.Form, 0, len(fs))
for _, f := range fs {
have := false
for _, u := range uniq {
if reflect.DeepEqual(u, f) {
have = true
break
}
}
if !have {
uniq = append(uniq, f)
}
}
return uniq
}
// sortforms sorts a list of forms.
func sortforms(fs []inst.Form) {
sort.Slice(fs, func(i, j int) bool {
return sortkey(fs[i]) < sortkey(fs[j])
})
}
func sortkey(f inst.Form) string {
return fmt.Sprintf("%d %v %v", f.EncodingType, f.ISA, f)
}
golang-github-mmcloughlin-avo-0.5.0/internal/load/load_test.go 0000664 0000000 0000000 00000001140 14370657153 0024411 0 ustar 00root root 0000000 0000000 package load_test
import (
"testing"
"github.com/mmcloughlin/avo/internal/gen"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/load"
"github.com/mmcloughlin/avo/internal/test"
"github.com/mmcloughlin/avo/printer"
)
func Load(t *testing.T) []inst.Instruction {
t.Helper()
l := load.NewLoaderFromDataDir("testdata")
is, err := l.Load()
if err != nil {
t.Fatal(err)
}
return is
}
func TestAssembles(t *testing.T) {
is := Load(t)
g := gen.NewAsmTest(printer.NewArgvConfig())
b, err := g.Generate(is)
if err != nil {
t.Fatal(err)
}
test.Assembles(t, b)
}
golang-github-mmcloughlin-avo-0.5.0/internal/load/tables.go 0000664 0000000 0000000 00000015045 14370657153 0023716 0 ustar 00root root 0000000 0000000 package load
import "github.com/mmcloughlin/avo/internal/inst"
// alias defines an opcode alias.
type alias struct {
From string
To string
}
// aliases defines a list of opcode aliases. Where possible these are extracted
// from the code (see note below).
var aliases = []alias{
// The PSHUFD/PSHUFL alias is not recorded in the list of "Annoying aliases" below. However the instructions are identical.
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/internal/obj/x86/asm6.go#L1365
//
// {APSHUFL, yxshuf, Pq, opBytes{0x70, 00}},
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/internal/obj/x86/asm6.go#L1688
//
// {APSHUFD, yxshuf, Pq, opBytes{0x70, 0}},
//
{"PSHUFD", "PSHUFL"},
}
// Go contains a list of self-proclaimed "Annoying aliases", as follows. We use
// a script to automatically extract this list from the source code (see the
// following go:generate line). Then we merge this with the manual list above.
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/asm/internal/arch/arch.go#L126-L182
//
// }
// // Annoying aliases.
// instructions["JA"] = x86.AJHI /* alternate */
// instructions["JAE"] = x86.AJCC /* alternate */
// instructions["JB"] = x86.AJCS /* alternate */
// instructions["JBE"] = x86.AJLS /* alternate */
// instructions["JC"] = x86.AJCS /* alternate */
// instructions["JCC"] = x86.AJCC /* carry clear (CF = 0) */
// instructions["JCS"] = x86.AJCS /* carry set (CF = 1) */
// instructions["JE"] = x86.AJEQ /* alternate */
// instructions["JEQ"] = x86.AJEQ /* equal (ZF = 1) */
// instructions["JG"] = x86.AJGT /* alternate */
// instructions["JGE"] = x86.AJGE /* greater than or equal (signed) (SF = OF) */
// instructions["JGT"] = x86.AJGT /* greater than (signed) (ZF = 0 && SF = OF) */
// instructions["JHI"] = x86.AJHI /* higher (unsigned) (CF = 0 && ZF = 0) */
// instructions["JHS"] = x86.AJCC /* alternate */
// instructions["JL"] = x86.AJLT /* alternate */
// instructions["JLE"] = x86.AJLE /* less than or equal (signed) (ZF = 1 || SF != OF) */
// instructions["JLO"] = x86.AJCS /* alternate */
// instructions["JLS"] = x86.AJLS /* lower or same (unsigned) (CF = 1 || ZF = 1) */
// instructions["JLT"] = x86.AJLT /* less than (signed) (SF != OF) */
// instructions["JMI"] = x86.AJMI /* negative (minus) (SF = 1) */
// instructions["JNA"] = x86.AJLS /* alternate */
// instructions["JNAE"] = x86.AJCS /* alternate */
// instructions["JNB"] = x86.AJCC /* alternate */
// instructions["JNBE"] = x86.AJHI /* alternate */
// instructions["JNC"] = x86.AJCC /* alternate */
// instructions["JNE"] = x86.AJNE /* not equal (ZF = 0) */
// instructions["JNG"] = x86.AJLE /* alternate */
// instructions["JNGE"] = x86.AJLT /* alternate */
// instructions["JNL"] = x86.AJGE /* alternate */
// instructions["JNLE"] = x86.AJGT /* alternate */
// instructions["JNO"] = x86.AJOC /* alternate */
// instructions["JNP"] = x86.AJPC /* alternate */
// instructions["JNS"] = x86.AJPL /* alternate */
// instructions["JNZ"] = x86.AJNE /* alternate */
// instructions["JO"] = x86.AJOS /* alternate */
// instructions["JOC"] = x86.AJOC /* overflow clear (OF = 0) */
// instructions["JOS"] = x86.AJOS /* overflow set (OF = 1) */
// instructions["JP"] = x86.AJPS /* alternate */
// instructions["JPC"] = x86.AJPC /* parity clear (PF = 0) */
// instructions["JPE"] = x86.AJPS /* alternate */
// instructions["JPL"] = x86.AJPL /* non-negative (plus) (SF = 0) */
// instructions["JPO"] = x86.AJPC /* alternate */
// instructions["JPS"] = x86.AJPS /* parity set (PF = 1) */
// instructions["JS"] = x86.AJMI /* alternate */
// instructions["JZ"] = x86.AJEQ /* alternate */
// instructions["MASKMOVDQU"] = x86.AMASKMOVOU
// instructions["MOVD"] = x86.AMOVQ
// instructions["MOVDQ2Q"] = x86.AMOVQ
// instructions["MOVNTDQ"] = x86.AMOVNTO
// instructions["MOVOA"] = x86.AMOVO
// instructions["PSLLDQ"] = x86.APSLLO
// instructions["PSRLDQ"] = x86.APSRLO
// instructions["PADDD"] = x86.APADDL
//
// return &Arch{
//
//go:generate ./annoyingaliases.sh zannoyingaliases.go
func init() {
aliases = append(aliases, annoyingaliases...)
}
// maskrequired is a set of AVX-512 opcodes where the mask register is required.
// Usually the mask register can be omitted, in which case K0 is implied.
var maskrequired = map[string]bool{
// Reference: https://github.com/golang/go/blob/4fd94558820100129b98f284e21b19fc27a99926/src/cmd/internal/obj/x86/asm6.go#L4219-L4240
//
// // Checks to warn about instruction/arguments combinations that
// // will unconditionally trigger illegal instruction trap (#UD).
// switch p.As {
// case AVGATHERDPD,
// AVGATHERQPD,
// AVGATHERDPS,
// AVGATHERQPS,
// AVPGATHERDD,
// AVPGATHERQD,
// AVPGATHERDQ,
// AVPGATHERQQ:
// // AVX512 gather requires explicit K mask.
// if p.GetFrom3().Reg >= REG_K0 && p.GetFrom3().Reg <= REG_K7 {
// if !avx512gatherValid(ctxt, p) {
// return
// }
// } else {
// if !avx2gatherValid(ctxt, p) {
// return
// }
// }
// }
//
"VGATHERDPD": true,
"VGATHERQPD": true,
"VGATHERDPS": true,
"VGATHERQPS": true,
"VPGATHERDD": true,
"VPGATHERQD": true,
"VPGATHERDQ": true,
"VPGATHERQQ": true,
// Restriction applies to SCATTER instructions too.
"VPSCATTERDD": true,
"VPSCATTERDQ": true,
"VPSCATTERQD": true,
"VPSCATTERQQ": true,
"VSCATTERDPD": true,
"VSCATTERDPS": true,
"VSCATTERQPD": true,
"VSCATTERQPS": true,
}
// extras is simply a list of extra instructions to add to the database.
var extras = []*inst.Instruction{
// MOVLQZX does not appear in either x86 CSV or Opcodes, but does appear in stdlib assembly.
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/runtime/asm_amd64.s#L451-L453
//
// TEXT ·reflectcall(SB), NOSPLIT, $0-32
// MOVLQZX argsize+24(FP), CX
// DISPATCH(runtime·call32, 32)
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/internal/obj/x86/asm6.go#L1217
//
// {AMOVLQZX, yml_rl, Px, opBytes{0x8b}},
//
// Reference: https://github.com/golang/go/blob/048c9164a0c5572df18325e377473e7893dbfb07/src/cmd/internal/obj/x86/asm6.go#L515-L517
//
// var yml_rl = []ytab{
// {Zm_r, 1, argList{Yml, Yrl}},
// }
//
{
Opcode: "MOVLQZX",
Summary: "Move with Zero-Extend",
Forms: []inst.Form{
{
Operands: []inst.Operand{
{Type: "m32", Action: inst.R},
{Type: "r64", Action: inst.W},
},
},
},
},
}
golang-github-mmcloughlin-avo-0.5.0/internal/load/testdata 0000777 0000000 0000000 00000000000 14370657153 0024706 2../data ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/load/zannoyingaliases.go 0000664 0000000 0000000 00000001401 14370657153 0026011 0 ustar 00root root 0000000 0000000 // Code generated by annoyingaliases.sh. DO NOT EDIT.
package load
var annoyingaliases = []alias{
{"JA", "JHI"},
{"JAE", "JCC"},
{"JB", "JCS"},
{"JBE", "JLS"},
{"JC", "JCS"},
{"JE", "JEQ"},
{"JG", "JGT"},
{"JHS", "JCC"},
{"JL", "JLT"},
{"JLO", "JCS"},
{"JNA", "JLS"},
{"JNAE", "JCS"},
{"JNB", "JCC"},
{"JNBE", "JHI"},
{"JNC", "JCC"},
{"JNG", "JLE"},
{"JNGE", "JLT"},
{"JNL", "JGE"},
{"JNLE", "JGT"},
{"JNO", "JOC"},
{"JNP", "JPC"},
{"JNS", "JPL"},
{"JNZ", "JNE"},
{"JO", "JOS"},
{"JP", "JPS"},
{"JPE", "JPS"},
{"JPO", "JPC"},
{"JS", "JMI"},
{"JZ", "JEQ"},
{"MASKMOVDQU", "MASKMOVOU"},
{"MOVD", "MOVQ"},
{"MOVDQ2Q", "MOVQ"},
{"MOVNTDQ", "MOVNTO"},
{"MOVOA", "MOVO"},
{"PSLLDQ", "PSLLO"},
{"PSRLDQ", "PSRLO"},
{"PADDD", "PADDL"},
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/ 0000775 0000000 0000000 00000000000 14370657153 0023341 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/analysis.go 0000664 0000000 0000000 00000005060 14370657153 0025514 0 ustar 00root root 0000000 0000000 package opcodescsv
import (
"reflect"
"strconv"
"strings"
"golang.org/x/arch/x86/x86csv"
)
// Alias records another possible name for an instruction configuration.
type Alias struct {
Opcode string
DataSize int
NumOperands int
}
// BuildAliasMap constructs a map from AT&T/GNU/Intel to Go syntax.
func BuildAliasMap(is []*x86csv.Inst) (map[Alias]string, error) {
m := map[Alias]string{}
for _, i := range is {
if skip(i) {
continue
}
s, err := strconv.Atoi("0" + i.DataSize)
if err != nil {
return nil, err
}
for _, alt := range []string{i.IntelOpcode(), i.GNUOpcode()} {
if strings.ToUpper(alt) != i.GoOpcode() {
a := Alias{
Opcode: strings.ToLower(alt),
DataSize: s,
NumOperands: len(i.GoArgs()),
}
m[a] = i.GoOpcode()
}
}
}
return m, nil
}
// OperandOrder describes the order an instruction takes its operands.
type OperandOrder uint8
// Possible operand orders.
const (
UnknownOrder = iota
IntelOrder
ReverseIntelOrder
CMP3Order
)
// BuildOrderMap collects operand order information from the instruction list.
func BuildOrderMap(is []*x86csv.Inst) map[string]OperandOrder {
s := map[string]OperandOrder{}
for _, i := range is {
if skip(i) {
continue
}
s[i.GoOpcode()] = order(i)
}
return s
}
// order categorizes the operand order of an instruction.
func order(i *x86csv.Inst) OperandOrder {
// Is it Intel order already?
intel := i.IntelArgs()
if reflect.DeepEqual(i.GoArgs(), intel) {
return IntelOrder
}
// Check if it's reverse Intel.
for l, r := 0, len(intel)-1; l < r; l, r = l+1, r-1 {
intel[l], intel[r] = intel[r], intel[l]
}
if reflect.DeepEqual(i.GoArgs(), intel) {
return ReverseIntelOrder
}
// Otherwise we could be in the bizarre special-case of 3-argument CMP instructions.
//
// Reference: https://github.com/golang/arch/blob/b19384d3c130858bb31a343ea8fce26be71b5998/x86/x86spec/format.go#L138-L144
//
// case "CMPPD", "CMPPS", "CMPSD", "CMPSS":
// // rotate destination to end but don't swap comparison operands
// if len(args) == 3 {
// args[0], args[1], args[2] = args[2], args[0], args[1]
// break
// }
// fallthrough
//
switch i.GoOpcode() {
case "CMPPD", "CMPPS", "CMPSD", "CMPSS":
if len(i.GoArgs()) == 3 {
return CMP3Order
}
}
return UnknownOrder
}
// skip decides whether to ignore the instruction for analysis purposes.
func skip(i *x86csv.Inst) bool {
switch {
case strings.ContainsAny(i.GoOpcode(), "/*"):
return true
case i.Mode64 == "I": // Invalid in 64-bit mode.
return true
}
return false
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/analysis_test.go 0000664 0000000 0000000 00000000464 14370657153 0026556 0 ustar 00root root 0000000 0000000 package opcodescsv
import "testing"
func TestBuildOrderMap(t *testing.T) {
is, err := ReadFile("testdata/x86.v0.2.csv")
if err != nil {
t.Fatal(err)
}
orders := BuildOrderMap(is)
for opcode, order := range orders {
if order == UnknownOrder {
t.Errorf("%s has unknown order", opcode)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/doc.go 0000664 0000000 0000000 00000000125 14370657153 0024433 0 ustar 00root root 0000000 0000000 // Package opcodescsv extracts data from the Go x86.csv database.
package opcodescsv
golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/io.go 0000664 0000000 0000000 00000000457 14370657153 0024305 0 ustar 00root root 0000000 0000000 package opcodescsv
import (
"os"
"golang.org/x/arch/x86/x86csv"
)
// ReadFile reads the given x86 CSV file.
func ReadFile(filename string) ([]*x86csv.Inst, error) {
f, err := os.Open(filename)
if err != nil {
return nil, err
}
defer f.Close()
r := x86csv.NewReader(f)
return r.ReadAll()
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodescsv/testdata 0000777 0000000 0000000 00000000000 14370657153 0026137 2../data ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/opcodesxml/ 0000775 0000000 0000000 00000000000 14370657153 0023346 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/opcodesxml/opcodesxml.go 0000664 0000000 0000000 00000070653 14370657153 0026065 0 ustar 00root root 0000000 0000000 // Package opcodesxml is a reader for the Opcodes XML database.
package opcodesxml
import (
"encoding/xml"
"io"
"os"
)
// Read reads Opcodes XML format.
func Read(r io.Reader) (*InstructionSet, error) {
d := xml.NewDecoder(r)
is := &InstructionSet{}
if err := d.Decode(is); err != nil {
return nil, err
}
return is, nil
}
// ReadFile reads the given Opcodes XML file.
func ReadFile(filename string) (*InstructionSet, error) {
f, err := os.Open(filename)
if err != nil {
return nil, err
}
defer f.Close()
return Read(f)
}
// InstructionSet is entire x86-64 instruction set.
type InstructionSet struct {
Name string `xml:"name,attr"`
Instructions []Instruction `xml:"Instruction"`
}
// Instruction represents one x86 mnemonic and its forms.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L7-L14
//
// """Instruction is defined by its mnemonic name (in Intel-style assembly).
//
// An instruction may have multiple forms, that mainly differ by operand types.
//
// :ivar name: instruction name in Intel-style assembly (PeachPy, NASM and YASM assemblers).
// :ivar summary: a summary description of the instruction name.
// :ivar forms: a list of :class:`InstructionForm` objects representing the instruction forms.
// """
type Instruction struct {
Name string `xml:"name,attr"`
Summary string `xml:"summary,attr"`
Forms []Form `xml:"InstructionForm"`
}
// Form represents one possible collection of operands an instruction may take.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L29-L85
//
// """Instruction form is a combination of mnemonic name and operand types.
//
// An instruction form may have multiple possible encodings.
//
// :ivar name: instruction name in PeachPy, NASM and YASM assemblers.
// :ivar gas_name: instruction form name in GNU assembler (gas).
// :ivar go_name: instruction form name in Go/Plan 9 assembler (8a).
//
// None means instruction is not supported in Go/Plan 9 assembler.
//
// :ivar mmx_mode: MMX technology state required or forced by this instruction. Possible values are:
//
// "FPU"
// Instruction requires the MMX technology state to be clear.
//
// "MMX"
// Instruction causes transition to MMX technology state.
//
// None
// Instruction neither affects nor cares about the MMX technology state.
//
// :ivar xmm_mode: XMM registers state accessed by this instruction. Possible values are:
//
// "SSE"
// Instruction accesses XMM registers in legacy SSE mode.
//
// "AVX"
// Instruction accesses XMM registers in AVX mode.
//
// None
// Instruction does not affect XMM registers and does not change XMM registers access mode.
//
// :ivar cancelling_inputs: indicates that the instruction form has not dependency on the values of input operands
// when they refer to the same register. E.g. **VPXOR xmm1, xmm0, xmm0** does not depend on *xmm0*.
//
// Instruction forms with cancelling inputs have only two input operands, which have the same register type.
//
// :ivar nacl_version: indicates the earliest Pepper API version where validator supports this instruction.
//
// Possible values are integers >= 33 or None. Pepper 33 is the earliest version for which information on
// supported instructions is available; if instruction forms supported before Pepper 33 would have
// nacl_version == 33. None means instruction is either not yet supported by Native Client validator, or
// is forbidden in Native Client SFI model.
//
// :ivar nacl_zero_extends_outputs: indicates that Native Client validator recognizes that the instruction zeroes
// the upper 32 bits of the output registers.
//
// In x86-64 Native Client SFI model this means that the subsequent instruction can use registers written by
// this instruction for memory addressing.
//
// :ivar operands: a list of :class:`Operand` objects representing the instruction operands.
// :ivar implicit_inputs: a set of register names that are implicitly read by this instruction.
// :ivar implicit_outputs: a set of register names that are implicitly written by this instruction.
// :ivar isa_extensions: a list of :class:`ISAExtension` objects that represent the ISA extensions required to execute
// the instruction.
// :ivar encodings: a list of :class:`Encoding` objects representing the possible encodings for this instruction.
// """
type Form struct {
GASName string `xml:"gas-name,attr"`
GoName string `xml:"go-name,attr"`
MMXMode string `xml:"mmx-mode,attr"`
XMMMode string `xml:"xmm-mode,attr"`
CancellingInputs bool `xml:"cancelling-inputs,attr"`
Operands []Operand `xml:"Operand"`
ImplicitOperands []ImplicitOperand `xml:"ImplicitOperand"`
ISA []ISA `xml:"ISA"`
Encoding Encoding `xml:"Encoding"`
}
// Operand describes an accepted operand type and the read/write action the instruction will perform.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L114-L338
//
// """An explicit instruction operand.
//
// :ivar type: the type of the instruction operand. Possible values are:
//
// "1"
// The constant value `1`.
//
// "3"
// The constant value `3`.
//
// "al"
// The al register.
//
// "ax"
// The ax register.
//
// "eax"
// The eax register.
//
// "rax"
// The rax register.
//
// "cl"
// The cl register.
//
// "xmm0"
// The xmm0 register.
//
// "rel8"
// An 8-bit signed offset relative to the address of instruction end.
//
// "rel32"
// A 32-bit signed offset relative to the address of instruction end.
//
// "imm4"
// A 4-bit immediate value.
//
// "imm8"
// An 8-bit immediate value.
//
// "imm16"
// A 16-bit immediate value.
//
// "imm32"
// A 32-bit immediate value.
//
// "imm64"
// A 64-bit immediate value.
//
// "r8"
// An 8-bit general-purpose register (al, bl, cl, dl, sil, dil, bpl, spl, r8b-r15b).
//
// "r16"
// A 16-bit general-purpose register (ax, bx, cx, dx, si, di, bp, sp, r8w-r15w).
//
// "r32"
// A 32-bit general-purpose register (eax, ebx, ecx, edx, esi, edi, ebp, esp, r8d-r15d).
//
// "r64"
// A 64-bit general-purpose register (rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp, r8-r15).
//
// "mm"
// A 64-bit MMX SIMD register (mm0-mm7).
//
// "xmm"
// A 128-bit XMM SIMD register (xmm0-xmm31).
//
// "xmm{k}"
// A 128-bit XMM SIMD register (xmm0-xmm31), optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "xmm{k}{z}"
// A 128-bit XMM SIMD register (xmm0-xmm31), optionally masked by an AVX-512 mask register (k1-k7).
//
// "ymm"
// A 256-bit YMM SIMD register (ymm0-ymm31).
//
// "ymm{k}"
// A 256-bit YMM SIMD register (ymm0-ymm31), optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "ymm{k}{z}"
// A 256-bit YMM SIMD register (ymm0-ymm31), optionally masked by an AVX-512 mask register (k1-k7).
//
// "zmm"
// A 512-bit ZMM SIMD register (zmm0-zmm31).
//
// "zmm{k}"
// A 512-bit ZMM SIMD register (zmm0-zmm31), optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "zmm{k}{z}"
// A 512-bit ZMM SIMD register (zmm0-zmm31), optionally masked by an AVX-512 mask register (k1-k7).
//
// "k"
// An AVX-512 mask register (k0-k7).
//
// "k{k}"
// An AVX-512 mask register (k0-k7), optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "m"
// A memory operand of any size.
//
// "m8"
// An 8-bit memory operand.
//
// "m16"
// A 16-bit memory operand.
//
// "m16{k}{z}"
// A 16-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m32"
// A 32-bit memory operand.
//
// "m32{k}"
// A 32-bit memory operand, optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "m32{k}{z}"
// A 32-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m64"
// A 64-bit memory operand.
//
// "m64{k}"
// A 64-bit memory operand, optionally merge-masked by an AVX-512 mask register (k1-k7).
//
// "m64{k}{z}"
// A 64-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m80"
// An 80-bit memory operand.
//
// "m128"
// A 128-bit memory operand.
//
// "m128{k}{z}"
// A 128-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m256"
// A 256-bit memory operand.
//
// "m256{k}{z}"
// A 256-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m512"
// A 512-bit memory operand.
//
// "m512{k}{z}"
// A 512-bit memory operand, optionally masked by an AVX-512 mask register (k1-k7).
//
// "m64/m32bcst"
// A 64-bit memory operand or a 32-bit memory operand broadcasted to 64 bits {1to2}.
//
// "m128/m32bcst"
// A 128-bit memory operand or a 32-bit memory operand broadcasted to 128 bits {1to4}.
//
// "m256/m32bcst"
// A 256-bit memory operand or a 32-bit memory operand broadcasted to 256 bits {1to8}.
//
// "m512/m32bcst"
// A 512-bit memory operand or a 32-bit memory operand broadcasted to 512 bits {1to16}.
//
// "m128/m64bcst"
// A 128-bit memory operand or a 64-bit memory operand broadcasted to 128 bits {1to2}.
//
// "m256/m64bcst"
// A 256-bit memory operand or a 64-bit memory operand broadcasted to 256 bits {1to4}.
//
// "m512/m64bcst"
// A 512-bit memory operand or a 64-bit memory operand broadcasted to 512 bits {1to8}.
//
// "vm32x"
// A vector of memory addresses using VSIB with 32-bit indices in XMM register.
//
// "vm32x{k}"
// A vector of memory addresses using VSIB with 32-bit indices in XMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "vm32y"
// A vector of memory addresses using VSIB with 32-bit indices in YMM register.
//
// "vm32y{k}"
// A vector of memory addresses using VSIB with 32-bit indices in YMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "vm32z"
// A vector of memory addresses using VSIB with 32-bit indices in ZMM register.
//
// "vm32z{k}"
// A vector of memory addresses using VSIB with 32-bit indices in ZMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "vm64x"
// A vector of memory addresses using VSIB with 64-bit indices in XMM register.
//
// "vm64x{k}"
// A vector of memory addresses using VSIB with 64-bit indices in XMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "vm64y"
// A vector of memory addresses using VSIB with 64-bit indices in YMM register.
//
// "vm64y{k}"
// A vector of memory addresses using VSIB with 64-bit indices in YMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "vm64z"
// A vector of memory addresses using VSIB with 64-bit indices in ZMM register.
//
// "vm64z{k}"
// A vector of memory addresses using VSIB with 64-bit indices in ZMM register merge-masked by an AVX-512 mask
// register (k1-k7).
//
// "{sae}"
// Suppress-all-exceptions modifier. This operand is optional and can be omitted.
//
// "{er}"
// Embedded rounding control. This operand is optional and can be omitted.
//
// :ivar is_input: indicates if the instruction reads the variable specified by this operand.
// :ivar is_output: indicates if the instruction writes the variable specified by this operand.
// :ivar extended_size: for immediate operands the size of the value in bytes after size-extension.
//
// The extended size affects which operand values can be encoded. E.g. a signed imm8 operand would normally \
// encode values in the [-128, 127] range. But if it is extended to 4 bytes, it can also encode values in \
// [2**32 - 128, 2**32 - 1] range.
// """
type Operand struct {
Type string `xml:"type,attr"`
Input bool `xml:"input,attr"`
Output bool `xml:"output,attr"`
}
// ImplicitOperand represents the implicit action of an instruction on a register.
type ImplicitOperand struct {
ID string `xml:"id,attr"`
Input bool `xml:"input,attr"`
Output bool `xml:"output,attr"`
}
// ISA is the name of an instruction set extension an instruction form belongs to.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L430-L487
//
// """An extension to x86-64 instruction set.
//
// :ivar name: name of the ISA extension. Possible values are:
//
// - "RDTSC" := The `RDTSC` instruction.
// - "RDTSCP" := The `RDTSCP` instruction.
// - "CPUID" := The `CPUID` instruction.
// - "FEMMS" := The `FEMMS` instruction.
// - "MOVBE" := The `MOVBE` instruction.
// - "POPCNT" := The `POPCNT` instruction.
// - "LZCNT" := The `LZCNT` instruction.
// - "PCLMULQDQ" := The `PCLMULQDQ` instruction.
// - "RDRAND" := The `RDRAND` instruction.
// - "RDSEED" := The `RDSEED` instruction.
// - "CLFLUSH" := The `CLFLUSH` instruction.
// - "CLFLUSHOPT" := The `CLFLUSHOPT` instruction.
// - "CLWB" := The `CLWB` instruction.
// - "CLZERO" := The `CLZERO` instruction.
// - "PREFETCH" := The `PREFETCH` instruction (3dnow! Prefetch).
// - "PREFETCHW" := The `PREFETCHW` instruction (3dnow! Prefetch/Intel PRFCHW).
// - "PREFETCHWT1" := The `PREFETCHWT1` instruction.
// - "MONITOR" := The `MONITOR` and `MWAIT` instructions.
// - "MONITORX" := The `MONITORX` and `MWAITX` instructions.
// - "CMOV" := Conditional MOVe instructions.
// - "MMX" := MultiMedia eXtension.
// - "MMX+" := AMD MMX+ extension / Integer SSE (Intel).
// - "3dnow!" := AMD 3dnow! extension.
// - "3dnow+!" := AMD 3dnow!+ extension.
// - "SSE" := Streaming SIMD Extension.
// - "SSE2" := Streaming SIMD Extension 2.
// - "SSE3" := Streaming SIMD Extension 3.
// - "SSSE3" := Supplemental Streaming SIMD Extension 3.
// - "SSE4.1" := Streaming SIMD Extension 4.1.
// - "SSE4.2" := Streaming SIMD Extension 4.2.
// - "SSE4A" := Streaming SIMD Extension 4a.
// - "AVX" := Advanced Vector eXtension.
// - "AVX2" := Advanced Vector eXtension 2.
// - "AVX512F" := AVX-512 Foundation instructions.
// - "AVX512BW" := AVX-512 Byte and Word instructions.
// - "AVX512DQ" := AVX-512 Doubleword and Quadword instructions.
// - "AVX512VL" := AVX-512 Vector Length extension (EVEX-encoded XMM/YMM operations).
// - "AVX512PF" := AVX-512 Prefetch instructions.
// - "AVX512ER" := AVX-512 Exponential and Reciprocal instructions.
// - "AVX512CD" := AVX-512 Conflict Detection instructions.
// - "AVX512VBMI" := AVX-512 Vector Bit Manipulation instructions.
// - "AVX512IFMA" := AVX-512 Integer 52-bit Multiply-Accumulate instructions.
// - "AVX512VPOPCNTDQ" := AVX-512 Vector Population Count instructions.
// - "XOP" := eXtended OPerations extension.
// - "F16C" := Half-Precision (F16) Conversion instructions.
// - "FMA3" := Fused Multiply-Add instructions (3-operand).
// - "FMA4" := Fused Multiply-Add instructions (4-operand).
// - "BMI" := Bit Manipulation Instructions.
// - "BMI2" := Bit Manipulation Instructions 2.
// - "TBM" := Trailing Bit Manipulation instructions.
// - "ADX" := The `ADCX` and `ADOX` instructions.
// - "AES" := `AES` instruction set.
// - "SHA" := `SHA` instruction set.
// """
type ISA struct {
ID string `xml:"id,attr"`
}
// Encoding describes the instruction form binary representation.
type Encoding struct {
REX *REX `xml:"REX"`
VEX *VEX `xml:"VEX"`
EVEX *EVEX `xml:"EVEX"`
}
// REX specifies the REX encoding of an instruction form.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L541-L574
//
// """REX prefix.
//
// Encoding may have only one REX prefix and if present, it immediately precedes the opcode.
//
// :ivar is_mandatory: indicates whether the REX prefix must be encoded even if no extended registers are used.
//
// REX is mandatory for most 64-bit instructions (encoded with REX.W = 1) and instructions that operate on the \
// extended set of 8-bit registers (to indicate access to dil/sil/bpl/spl as opposed to ah/bh/ch/dh which use the \
// same ModR/M).
//
// :ivar W: the REX.W bit. Possible values are 0, 1, and None.
//
// None indicates that the bit is ignored.
//
// :ivar R: the REX.R bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If R is a reference to an instruction operand, the operand is of register type and REX.R bit specifies the \
// high bit (bit 3) of the register number.
//
// :ivar B: the REX.B bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If R is a reference to an instruction operand, the operand can be of register or memory type. If the operand \
// is of register type, the REX.R bit specifies the high bit (bit 3) of the register number, and the REX.X bit is \
// ignored. If the operand is of memory type, the REX.R bit specifies the high bit (bit 3) of the base register \
// number, and the X instance variable refers to the same operand.
//
// :ivar X: the REX.X bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If X is a reference to an instruction operand, the operand is of memory type and the REX.X bit specifies the \
// high bit (bit 3) of the index register number, and the B instance variable refers to the same operand.
// """
type REX struct {
Mandatory bool `xml:"mandatory,attr"`
W uint `xml:"W,attr"`
R string `xml:"R,attr"`
X string `xml:"X,attr"`
B string `xml:"B,attr"`
}
// VEX specifies the VEX encoding of an instruction form.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L606-L691
//
// """VEX or XOP prefix.
//
// VEX and XOP prefixes use the same format and differ only by leading byte.
// The `type` property helps to differentiate between the two prefix types.
//
// Encoding may have only one VEX prefix and if present, it immediately precedes the opcode, and no other prefix is \
// allowed.
//
// :ivar type: the type of the leading byte for VEX encoding. Possible values are:
//
// "VEX"
// The VEX prefix (0xC4 or 0xC5) is used.
//
// "XOP"
// The XOP prefix (0x8F) is used.
//
// :ivar mmmmm: the VEX m-mmmm (implied leading opcode bytes) field. In AMD documentation this field is called map_select. Possible values are:
//
// 0b00001
// Implies 0x0F leading opcode byte.
//
// 0b00010
// Implies 0x0F 0x38 leading opcode bytes.
//
// 0b00011
// Implies 0x0F 0x3A leading opcode bytes.
//
// 0b01000
// This value does not have opcode byte interpretation. Only XOP instructions use this value.
//
// 0b01001
// This value does not have opcode byte interpretation. Only XOP and TBM instructions use this value.
//
// 0b01010
// This value does not have opcode byte interpretation. Only TBM instructions use this value.
//
// Only VEX prefix with m-mmmm equal to 0b00001 could be encoded in two bytes.
//
// :ivar pp: the VEX pp (implied legacy prefix) field. Possible values are:
//
// 0b00
// No implied prefix.
//
// 0b01
// Implied 0x66 prefix.
//
// 0b10
// Implied 0xF3 prefix.
//
// 0b11
// Implied 0xF2 prefix.
//
// :ivar W: the VEX.W bit. Possible values are 0, 1, and None.
//
// None indicates that the bit is ignored.
//
// :ivar L: the VEX.L bit. Possible values are 0, 1, and None.
//
// None indicates that the bit is ignored.
//
// :ivar R: the VEX.R bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If R is a reference to an instruction operand, the operand is of register type and VEX.R bit specifies the \
// high bit (bit 3) of the register number.
//
// :ivar B: the VEX.B bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If R is a reference to an instruction operand, the operand can be of register or memory type. If the operand is \
// of register type, the VEX.R bit specifies the high bit (bit 3) of the register number, and the VEX.X bit is \
// ignored. If the operand is of memory type, the VEX.R bit specifies the high bit (bit 3) of the base register \
// number, and the X instance variable refers to the same operand.
//
// :ivar X: the VEX.X bit. Possible values are 0, 1, None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If X is a reference to an instruction operand, the operand is of memory type and the VEX.X bit specifies the \
// high bit (bit 3) of the index register number, and the B instance variable refers to the same operand.
//
// :ivar vvvv: the VEX vvvv field. Possible values are 0b0000 or a reference to one of the instruction operands.
//
// The value 0b0000 indicates that this field is not used. \
// If vvvv is a reference to an instruction operand, the operand is of register type and VEX.vvvv field specifies \
// its number.
// """
type VEX struct {
Type string `xml:"type,attr"`
W *uint `xml:"W,attr"`
L uint `xml:"L,attr"`
M5 string `xml:"m-mmmm,attr"`
PP string `xml:"pp,attr"`
R string `xml:"R,attr"`
X string `xml:"X,attr"`
B string `xml:"B,attr"`
V4 string `xml:"vvvv,attr"`
}
// EVEX specifies the EVEX encoding of an instruction form.
//
// Reference: https://github.com/Maratyszcza/Opcodes/blob/6e2b0cd9f1403ecaf164dea7019dd54db5aea252/opcodes/x86_64.py#L731-L845
//
// """EVEX prefix.
//
// Encoding may have only one EVEX prefix and if present, it immediately precedes the opcode, and no other prefix is \
// allowed.
//
// :ivar mm: the EVEX mm (compressed legacy escape) field. Identical to two low bits of VEX.m-mmmm field. Possible \
// values are:
//
// 0b01
// Implies 0x0F leading opcode byte.
//
// 0b10
// Implies 0x0F 0x38 leading opcode bytes.
//
// 0b11
// Implies 0x0F 0x3A leading opcode bytes.
//
// :ivar pp: the EVEX pp (compressed legacy prefix) field. Possible values are:
//
// 0b00
// No implied prefix.
//
// 0b01
// Implied 0x66 prefix.
//
// 0b10
// Implied 0xF3 prefix.
//
// 0b11
// Implied 0xF2 prefix.
//
// :ivar W: the EVEX.W bit. Possible values are 0, 1, and None.
//
// None indicates that the bit is ignored.
//
// :ivar LL: the EVEX.L'L bits. Specify either vector length for the operation, or explicit rounding control \
// (in which case operation is 512 bits wide). Possible values:
//
// None
// Indicates that the EVEX.L'L field is ignored.
//
// 0b00
// 128-bits wide operation.
//
// 0b01
// 256-bits wide operation.
//
// 0b10
// 512-bits wide operation.
//
// Reference to the last instruction operand
// EVEX.L'L are interpreted as rounding control and set to the value specified by the operand. If the rounding
// control operand is omitted, EVEX.L'L is set to 0b10 (embedded rounding control is only supported for 512-bit
// wide operations).
//
// :ivar RR: the EVEX.R'R bits. Possible values are None, or a reference to an register-type instruction operand.
//
// None indicates that the field is ignored.
// The R' bit specifies bit 4 of the register number and the R bit specifies bit 3 of the register number.
//
// :ivar B: the EVEX.B bit. Possible values are None, or a reference to one of the instruction operands.
//
// None indicates that this bit is ignored. \
// If R is a reference to an instruction operand, the operand can be of register or memory type. If the operand is\
// of register type, the EVEX.R bit specifies the high bit (bit 3) of the register number, and the EVEX.X bit is \
// ignored. If the operand is of memory type, the EVEX.R bit specifies the high bit (bit 3) of the base register \
// number, and the X instance variable refers to the same operand.
//
// :ivar X: the EVEX.X bit. Possible values are None, or a reference to one of the instruction operands.
//
// The value None indicates that this bit is ignored. \
// If X is a reference to an instruction operand, the operand is of memory type and the EVEX.X bit specifies the \
// high bit (bit 3) of the index register number, and the B instance variable refers to the same operand.
//
// :ivar vvvv: the EVEX vvvv field. Possible values are 0b0000 or a reference to one of the instruction operands.
//
// The value 0b0000 indicates that this field is not used. \
// If vvvv is a reference to an instruction operand, the operand is of register type and EVEX.vvvv field \
// specifies the register number.
//
// :ivar V: the EVEX V field. Possible values are 0, or a reference to one of the instruction operands.
//
// The value 0 indicates that this field is not used (EVEX.vvvv is not used or encodes a general-purpose register).
//
// :ivar b: the EVEX b (broadcast/rounding control/suppress all exceptions context) bit. Possible values are 0 or a \
// reference to one of the instruction operands.
//
// The value 0 indicates that this field is not used. \
// If b is a reference to an instruction operand, the operand can be a memory operand with optional broadcasting, \
// an optional rounding specification, or an optional Suppress-all-exceptions specification. \
// If b is a reference to a memory operand, EVEX.b encodes whether broadcasting is used to the operand. \
// If b is a reference to a optional rounding control specification, EVEX.b encodes whether explicit rounding \
// control is used. \
// If b is a reference to a suppress-all-exceptions specification, EVEX.b encodes whether suppress-all-exceptions \
// is enabled.
//
// :ivar aaa: the EVEX aaa (embedded opmask register specifier) field. Possible values are 0 or a reference to one of \
// the instruction operands.
//
// The value 0 indicates that this field is not used. \
// If aaa is a reference to an instruction operand, the operand supports register mask, and EVEX.aaa encodes the \
// mask register.
//
// :ivar z: the EVEX z bit. Possible values are None, 0 or a reference to one of the instruction operands.
//
// None indicates that the bit is ignored. \
// The value 0 indicates that the bit is not used. \
// If z is a reference to an instruction operand, the operand supports zero-masking with register mask, and \
// EVEX.z indicates whether zero-masking is used.
//
// :ivar disp8xN: the N value used for encoding compressed 8-bit displacement. Possible values are powers of 2 in \
// [1, 64] range or None.
//
// None indicates that this instruction form does not use displacement (the form has no memory operands).
// """
type EVEX struct {
M2 string `xml:"mm,attr"`
PP string `xml:"pp,attr"`
W *uint `xml:"W,attr"`
LL string `xml:"LL,attr"`
V4 string `xml:"vvvv,attr"`
V string `xml:"V,attr"`
RR string `xml:"RR,attr"`
B string `xml:"B,attr"`
X string `xml:"X,attr"`
Bsml string `xml:"b,attr"`
A3 string `xml:"aaa,attr"`
Z string `xml:"Z,attr"`
Disp8xN string `xml:"disp8xN,attr"`
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodesxml/opcodesxml_test.go 0000664 0000000 0000000 00000000230 14370657153 0027104 0 ustar 00root root 0000000 0000000 package opcodesxml
import "testing"
func TestReadFile(t *testing.T) {
_, err := ReadFile("testdata/x86_64.xml")
if err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/opcodesxml/testdata/ 0000775 0000000 0000000 00000000000 14370657153 0025157 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/opcodesxml/testdata/x86_64.xml 0000777 0000000 0000000 00000000000 14370657153 0031651 2../../data/x86_64.xml ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/prnt/ 0000775 0000000 0000000 00000000000 14370657153 0022154 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/prnt/printer.go 0000664 0000000 0000000 00000004721 14370657153 0024172 0 ustar 00root root 0000000 0000000 // Package prnt provides common functionality for code generators.
package prnt
import (
"bytes"
"fmt"
"io"
"strings"
)
// Generator provides convenience methods for code generators. In particular it
// provides fmt-like methods which print to an internal buffer. It also allows
// any errors to be stored so they can be checked at the end, rather than having
// error checks obscuring the code generation.
type Generator struct {
buf bytes.Buffer
level int // current indentation level
indent string // indentation string
pending bool // if there's a pending indentation
err error // saved error from printing
}
// Raw provides direct access to the underlying output stream.
func (g *Generator) Raw() io.Writer {
return &g.buf
}
// SetIndentString sets the string used for one level of indentation. Use
// Indent() and Dedent() to control indent level.
func (g *Generator) SetIndentString(indent string) {
g.indent = indent
}
// Indent increments the indent level.
func (g *Generator) Indent() {
g.level++
}
// Dedent decrements the indent level.
func (g *Generator) Dedent() {
g.level--
}
// Linef prints formatted output terminated with a new line.
func (g *Generator) Linef(format string, args ...interface{}) {
g.Printf(format, args...)
g.NL()
}
// Printf prints to the internal buffer.
func (g *Generator) Printf(format string, args ...interface{}) {
if g.err != nil {
return
}
if g.pending {
indent := strings.Repeat(g.indent, g.level)
format = indent + format
g.pending = false
}
_, err := fmt.Fprintf(&g.buf, format, args...)
g.AddError(err)
}
// NL prints a new line.
func (g *Generator) NL() {
g.Printf("\n")
g.pending = true
}
// Comment writes comment lines prefixed with "// ".
func (g *Generator) Comment(lines ...string) {
for _, line := range lines {
line = strings.TrimSpace("// " + line)
g.Printf("%s\n", line)
}
}
// BuildTag outputs a build tag.
func (g *Generator) BuildTag(tag string) {
g.Comment("+build " + tag)
}
// AddError records an error in code generation. The first non-nil error will
// prevent printing operations from writing anything else, and the error will be
// returned from Result().
func (g *Generator) AddError(err error) {
if err != nil && g.err == nil {
g.err = err
}
}
// Result returns the printed bytes. If any error was recorded with AddError
// during code generation, the first such error will be returned here.
func (g *Generator) Result() ([]byte, error) {
return g.buf.Bytes(), g.err
}
golang-github-mmcloughlin-avo-0.5.0/internal/stack/ 0000775 0000000 0000000 00000000000 14370657153 0022276 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/stack/stack.go 0000664 0000000 0000000 00000002771 14370657153 0023741 0 ustar 00root root 0000000 0000000 // Package stack provides helpers for querying the callstack.
package stack
import (
"path"
"runtime"
"strings"
)
// Frames returns at most max callstack Frames, starting with its caller and
// skipping skip Frames.
func Frames(skip, max int) []runtime.Frame {
pc := make([]uintptr, max)
n := runtime.Callers(skip+2, pc)
if n == 0 {
return nil
}
pc = pc[:n]
frames := runtime.CallersFrames(pc)
var fs []runtime.Frame
for {
f, more := frames.Next()
fs = append(fs, f)
if !more {
break
}
}
return fs
}
// Match returns the first stack frame for which the predicate function returns
// true. Returns nil if no match is found. Starts matching after skip frames,
// starting with its caller.
func Match(skip int, predicate func(runtime.Frame) bool) *runtime.Frame {
i, n := skip+1, 16
for {
fs := Frames(i, n)
for j, f := range fs {
if predicate(f) {
return &fs[j]
}
}
if len(fs) < n {
break
}
i += n
}
return nil
}
// Main returns the main() function Frame.
func Main() *runtime.Frame {
return Match(1, func(f runtime.Frame) bool {
return f.Function == "main.main"
})
}
// ExternalCaller returns the first frame outside the callers package.
func ExternalCaller() *runtime.Frame {
var first *runtime.Frame
return Match(1, func(f runtime.Frame) bool {
if first == nil {
first = &f
}
return pkg(first.Function) != pkg(f.Function)
})
}
func pkg(ident string) string {
dir, name := path.Split(ident)
parts := strings.Split(name, ".")
return dir + parts[0]
}
golang-github-mmcloughlin-avo-0.5.0/internal/stack/stack_test.go 0000664 0000000 0000000 00000001306 14370657153 0024771 0 ustar 00root root 0000000 0000000 package stack_test
import (
"runtime"
"testing"
"github.com/mmcloughlin/avo/internal/stack"
)
const pkg = "github.com/mmcloughlin/avo/internal/stack_test"
func TestFramesFirst(t *testing.T) {
fs := stack.Frames(0, 1)
if len(fs) == 0 {
t.Fatalf("empty slice")
}
got := fs[0].Function
expect := pkg + ".TestFramesFirst"
if got != expect {
t.Fatalf("bad function name %s; expect %s", got, expect)
}
}
func TestMatchFirst(t *testing.T) {
first := stack.Match(0, func(_ runtime.Frame) bool { return true })
if first == nil {
t.Fatalf("nil match")
}
got := first.Function
expect := pkg + ".TestMatchFirst"
if got != expect {
t.Fatalf("bad function name %s; expect %s", got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/internal/test/ 0000775 0000000 0000000 00000000000 14370657153 0022150 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/internal/test/utils.go 0000664 0000000 0000000 00000005173 14370657153 0023645 0 ustar 00root root 0000000 0000000 // Package test provides testing utilities.
package test
import (
"flag"
"io"
"log"
"os"
"os/exec"
"path/filepath"
"runtime"
"testing"
)
var network = flag.Bool("net", false, "allow network access")
// RequiresNetwork declares that a test requires network access. The test is
// skipped if network access isn't enabled with the -net flag.
func RequiresNetwork(t *testing.T) {
t.Helper()
if !*network {
t.Skip("requires network: enable with -net flag")
}
}
// Assembles asserts that the given assembly code passes the go assembler.
func Assembles(t *testing.T, asm []byte) {
t.Helper()
dir, clean := TempDir(t)
defer clean()
asmfilename := filepath.Join(dir, "asm.s")
if err := os.WriteFile(asmfilename, asm, 0o600); err != nil {
t.Fatal(err)
}
objfilename := filepath.Join(dir, "asm.o")
goexec(t, "tool", "asm", "-e", "-o", objfilename, asmfilename)
}
// TempDir creates a temp directory. Returns the path to the directory and a
// cleanup function.
func TempDir(t *testing.T) (string, func()) {
t.Helper()
dir, err := os.MkdirTemp("", "avo")
if err != nil {
t.Fatal(err)
}
return dir, func() {
if err := os.RemoveAll(dir); err != nil {
t.Fatal(err)
}
}
}
// ExecCommand executes the command, logging the command and output and failing
// the test on error.
func ExecCommand(t *testing.T, cmd *exec.Cmd) {
t.Helper()
t.Logf("exec: %s", cmd.Args)
if cmd.Dir != "" {
t.Logf("dir: %s", cmd.Dir)
}
b, err := cmd.CombinedOutput()
t.Logf("output:\n%s\n", string(b))
if err != nil {
t.Fatal(err)
}
}
// Exec executes the named program with the given arguments, logging the command
// and output and failing the test on error.
func Exec(t *testing.T, name string, arg ...string) {
t.Helper()
cmd := exec.Command(name, arg...)
ExecCommand(t, cmd)
}
// GoTool returns a best guess path to the "go" binary.
func GoTool() string {
var exeSuffix string
if runtime.GOOS == "windows" {
exeSuffix = ".exe"
}
path := filepath.Join(runtime.GOROOT(), "bin", "go"+exeSuffix)
if _, err := os.Stat(path); err == nil {
return path
}
return "go"
}
// goexec runs a "go" command and checks the output.
func goexec(t *testing.T, arg ...string) {
t.Helper()
Exec(t, GoTool(), arg...)
}
// Logger builds a logger that writes to the test object.
func Logger(tb testing.TB) *log.Logger {
tb.Helper()
return log.New(Writer(tb), "test", log.LstdFlags)
}
type writer struct {
tb testing.TB
}
// Writer builds a writer that logs all writes to the test object.
func Writer(tb testing.TB) io.Writer {
tb.Helper()
return writer{tb}
}
func (w writer) Write(p []byte) (n int, err error) {
w.tb.Log(string(p))
return len(p), nil
}
golang-github-mmcloughlin-avo-0.5.0/ir/ 0000775 0000000 0000000 00000000000 14370657153 0017767 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/ir/doc.go 0000664 0000000 0000000 00000000123 14370657153 0021057 0 ustar 00root root 0000000 0000000 // Package ir provides the intermediate representation of avo programs.
package ir
golang-github-mmcloughlin-avo-0.5.0/ir/ir.go 0000664 0000000 0000000 00000017562 14370657153 0020743 0 ustar 00root root 0000000 0000000 package ir
import (
"errors"
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/gotypes"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
// Node is a part of a Function.
type Node interface {
node()
}
// Label within a function.
type Label string
func (l Label) node() {}
// Comment represents a multi-line comment.
type Comment struct {
Lines []string
}
func (c *Comment) node() {}
// NewComment builds a Comment consisting of the provided lines.
func NewComment(lines ...string) *Comment {
return &Comment{
Lines: lines,
}
}
// Instruction is a single instruction in a function.
type Instruction struct {
Opcode string
Suffixes []string
Operands []operand.Op
Inputs []operand.Op
Outputs []operand.Op
IsTerminal bool
IsBranch bool
IsConditional bool
CancellingInputs bool
// ISA is the list of required instruction set extensions.
ISA []string
// CFG.
Pred []*Instruction
Succ []*Instruction
// LiveIn/LiveOut are sets of live register IDs pre/post execution.
LiveIn reg.MaskSet
LiveOut reg.MaskSet
}
func (i *Instruction) node() {}
// OpcodeWithSuffixes returns the full opcode, including dot-separated suffixes.
func (i *Instruction) OpcodeWithSuffixes() string {
opcode := i.Opcode
for _, s := range i.Suffixes {
opcode += "." + s
}
return opcode
}
// IsUnconditionalBranch reports whether i is an unconditional branch.
func (i Instruction) IsUnconditionalBranch() bool {
return i.IsBranch && !i.IsConditional
}
// TargetLabel returns the label referenced by this instruction. Returns nil if
// no label is referenced.
func (i Instruction) TargetLabel() *Label {
if !i.IsBranch {
return nil
}
if len(i.Operands) == 0 {
return nil
}
if ref, ok := i.Operands[0].(operand.LabelRef); ok {
lbl := Label(ref)
return &lbl
}
return nil
}
// Registers returns all registers involved in the instruction.
func (i Instruction) Registers() []reg.Register {
var rs []reg.Register
for _, op := range i.Operands {
rs = append(rs, operand.Registers(op)...)
}
return rs
}
// InputRegisters returns all registers read by this instruction.
func (i Instruction) InputRegisters() []reg.Register {
var rs []reg.Register
for _, op := range i.Inputs {
rs = append(rs, operand.Registers(op)...)
}
if i.CancellingInputs && rs[0] == rs[1] {
rs = []reg.Register{}
}
for _, op := range i.Outputs {
if operand.IsMem(op) {
rs = append(rs, operand.Registers(op)...)
}
}
return rs
}
// OutputRegisters returns all registers written by this instruction.
func (i Instruction) OutputRegisters() []reg.Register {
var rs []reg.Register
for _, op := range i.Outputs {
if r, ok := op.(reg.Register); ok {
rs = append(rs, r)
}
}
return rs
}
// Section is a part of a file.
type Section interface {
section()
}
// File represents an assembly file.
type File struct {
Constraints buildtags.Constraints
Includes []string
Sections []Section
}
// NewFile initializes an empty file.
func NewFile() *File {
return &File{}
}
// AddSection appends a Section to the file.
func (f *File) AddSection(s Section) {
f.Sections = append(f.Sections, s)
}
// Functions returns all functions in the file.
func (f *File) Functions() []*Function {
var fns []*Function
for _, s := range f.Sections {
if fn, ok := s.(*Function); ok {
fns = append(fns, fn)
}
}
return fns
}
// Pragma represents a function compiler directive.
type Pragma struct {
Directive string
Arguments []string
}
// Function represents an assembly function.
type Function struct {
Name string
Attributes attr.Attribute
Pragmas []Pragma
Doc []string
Signature *gotypes.Signature
LocalSize int
Nodes []Node
// LabelTarget maps from label name to the following instruction.
LabelTarget map[Label]*Instruction
// Register allocation.
Allocation reg.Allocation
// ISA is the list of required instruction set extensions.
ISA []string
}
func (f *Function) section() {}
// NewFunction builds an empty function of the given name.
func NewFunction(name string) *Function {
return &Function{
Name: name,
Signature: gotypes.NewSignatureVoid(),
}
}
// AddPragma adds a pragma to this function.
func (f *Function) AddPragma(directive string, args ...string) {
f.Pragmas = append(f.Pragmas, Pragma{
Directive: directive,
Arguments: args,
})
}
// SetSignature sets the function signature.
func (f *Function) SetSignature(s *gotypes.Signature) {
f.Signature = s
}
// AllocLocal allocates size bytes in this function's stack.
// Returns a reference to the base pointer for the newly allocated region.
func (f *Function) AllocLocal(size int) operand.Mem {
ptr := operand.NewStackAddr(f.LocalSize)
f.LocalSize += size
return ptr
}
// AddInstruction appends an instruction to f.
func (f *Function) AddInstruction(i *Instruction) {
f.AddNode(i)
}
// AddLabel appends a label to f.
func (f *Function) AddLabel(l Label) {
f.AddNode(l)
}
// AddComment adds comment lines to f.
func (f *Function) AddComment(lines ...string) {
f.AddNode(NewComment(lines...))
}
// AddNode appends a Node to f.
func (f *Function) AddNode(n Node) {
f.Nodes = append(f.Nodes, n)
}
// Instructions returns just the list of instruction nodes.
func (f *Function) Instructions() []*Instruction {
var is []*Instruction
for _, n := range f.Nodes {
i, ok := n.(*Instruction)
if ok {
is = append(is, i)
}
}
return is
}
// Labels returns just the list of label nodes.
func (f *Function) Labels() []Label {
var lbls []Label
for _, n := range f.Nodes {
lbl, ok := n.(Label)
if ok {
lbls = append(lbls, lbl)
}
}
return lbls
}
// Stub returns the Go function declaration.
func (f *Function) Stub() string {
return "func " + f.Name + f.Signature.String()
}
// FrameBytes returns the size of the stack frame in bytes.
func (f *Function) FrameBytes() int {
return f.LocalSize
}
// ArgumentBytes returns the size of the arguments in bytes.
func (f *Function) ArgumentBytes() int {
return f.Signature.Bytes()
}
// Datum represents a data element at a particular offset of a data section.
type Datum struct {
Offset int
Value operand.Constant
}
// NewDatum builds a Datum from the given constant.
func NewDatum(offset int, v operand.Constant) Datum {
return Datum{
Offset: offset,
Value: v,
}
}
// Interval returns the range of bytes this datum will occupy within its section.
func (d Datum) Interval() (int, int) {
return d.Offset, d.Offset + d.Value.Bytes()
}
// Overlaps returns whether d overlaps with other.
func (d Datum) Overlaps(other Datum) bool {
s, e := d.Interval()
so, eo := other.Interval()
return !(eo <= s || e <= so)
}
// Global represents a DATA section.
type Global struct {
Symbol operand.Symbol
Attributes attr.Attribute
Data []Datum
Size int
}
// NewGlobal constructs an empty DATA section.
func NewGlobal(sym operand.Symbol) *Global {
return &Global{
Symbol: sym,
}
}
// NewStaticGlobal is a convenience for building a static DATA section.
func NewStaticGlobal(name string) *Global {
return NewGlobal(operand.NewStaticSymbol(name))
}
func (g *Global) section() {}
// Base returns a pointer to the start of the data section.
func (g *Global) Base() operand.Mem {
return operand.NewDataAddr(g.Symbol, 0)
}
// Grow ensures that the data section has at least the given size.
func (g *Global) Grow(size int) {
if g.Size < size {
g.Size = size
}
}
// AddDatum adds d to this data section, growing it if necessary. Errors if the datum overlaps with existing data.
func (g *Global) AddDatum(d Datum) error {
for _, other := range g.Data {
if d.Overlaps(other) {
return errors.New("overlaps existing datum")
}
}
g.add(d)
return nil
}
// Append the constant to the end of the data section.
func (g *Global) Append(v operand.Constant) {
g.add(Datum{
Offset: g.Size,
Value: v,
})
}
func (g *Global) add(d Datum) {
_, end := d.Interval()
g.Grow(end)
g.Data = append(g.Data, d)
}
golang-github-mmcloughlin-avo-0.5.0/ir/ir_test.go 0000664 0000000 0000000 00000003263 14370657153 0021773 0 ustar 00root root 0000000 0000000 package ir
import (
"reflect"
"testing"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
func TestFunctionLabels(t *testing.T) {
f := NewFunction("labels")
f.AddInstruction(&Instruction{})
f.AddLabel("a")
f.AddInstruction(&Instruction{})
f.AddLabel("b")
f.AddInstruction(&Instruction{})
f.AddLabel("c")
f.AddInstruction(&Instruction{})
expect := []Label{"a", "b", "c"}
if got := f.Labels(); !reflect.DeepEqual(expect, got) {
t.Fatalf("f.Labels() = %v; expect %v", got, expect)
}
}
func TestInputRegisters(t *testing.T) {
cases := []struct {
Name string
Inst *Instruction
Expect []reg.Register
}{
{
Name: "reg",
Inst: &Instruction{
Inputs: []operand.Op{
reg.RAX,
reg.R13,
},
Outputs: []operand.Op{
reg.RBX,
},
},
Expect: []reg.Register{reg.RAX, reg.R13},
},
{
Name: "mem",
Inst: &Instruction{
Inputs: []operand.Op{
operand.Mem{
Base: reg.RSI,
Index: reg.RDI,
},
reg.R13,
},
Outputs: []operand.Op{
operand.Mem{
Base: reg.R9,
Index: reg.R11,
},
},
},
Expect: []reg.Register{
reg.RSI,
reg.RDI,
reg.R13,
reg.R9,
reg.R11,
},
},
{
Name: "cancelling_inputs",
Inst: &Instruction{
CancellingInputs: true,
Inputs: []operand.Op{
reg.R13,
reg.R13,
},
Outputs: []operand.Op{
operand.Mem{
Base: reg.R9,
Index: reg.R11,
},
},
},
Expect: []reg.Register{reg.R9, reg.R11},
},
}
for _, c := range cases {
if got := c.Inst.InputRegisters(); !reflect.DeepEqual(got, c.Expect) {
t.Errorf("%s: got %v; expect %v", c.Inst.Opcode, got, c.Expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/logo.svg 0000664 0000000 0000000 00000005256 14370657153 0021046 0 ustar 00root root 0000000 0000000
golang-github-mmcloughlin-avo-0.5.0/operand/ 0000775 0000000 0000000 00000000000 14370657153 0021005 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/operand/checks.go 0000664 0000000 0000000 00000016222 14370657153 0022577 0 ustar 00root root 0000000 0000000 package operand
import "github.com/mmcloughlin/avo/reg"
// Pure type assertion checks:
// IsRegister returns whether op has type reg.Register.
func IsRegister(op Op) bool { _, ok := op.(reg.Register); return ok }
// IsMem returns whether op has type Mem.
func IsMem(op Op) bool { _, ok := op.(Mem); return ok }
// IsRel returns whether op has type Rel.
func IsRel(op Op) bool { _, ok := op.(Rel); return ok }
// Checks corresponding to specific operand types in the Intel Manual:
// Is1 returns true if op is the immediate constant 1.
func Is1(op Op) bool {
i, ok := op.(U8)
return ok && i == 1
}
// Is3 returns true if op is the immediate constant 3.
func Is3(op Op) bool {
i, ok := op.(U8)
return ok && i == 3
}
// IsIMM2U returns true if op is a 2-bit unsigned immediate (less than 4).
func IsIMM2U(op Op) bool {
i, ok := op.(U8)
return ok && i < 4
}
// IsIMM8 returns true is op is an 8-bit immediate.
func IsIMM8(op Op) bool {
_, uok := op.(U8)
_, iok := op.(I8)
return uok || iok
}
// IsIMM16 returns true is op is a 16-bit immediate.
func IsIMM16(op Op) bool {
_, uok := op.(U16)
_, iok := op.(I16)
return uok || iok
}
// IsIMM32 returns true is op is a 32-bit immediate.
func IsIMM32(op Op) bool {
_, uok := op.(U32)
_, iok := op.(I32)
return uok || iok
}
// IsIMM64 returns true is op is a 64-bit immediate.
func IsIMM64(op Op) bool {
_, uok := op.(U64)
_, iok := op.(I64)
return uok || iok
}
// IsAL returns true if op is the AL register.
func IsAL(op Op) bool {
return op == reg.AL
}
// IsCL returns true if op is the CL register.
func IsCL(op Op) bool {
return op == reg.CL
}
// IsAX returns true if op is the 16-bit AX register.
func IsAX(op Op) bool {
return op == reg.AX
}
// IsEAX returns true if op is the 32-bit EAX register.
func IsEAX(op Op) bool {
return op == reg.EAX
}
// IsRAX returns true if op is the 64-bit RAX register.
func IsRAX(op Op) bool {
return op == reg.RAX
}
// IsR8 returns true if op is an 8-bit general-purpose register.
func IsR8(op Op) bool {
return IsGP(op, 1)
}
// IsR16 returns true if op is a 16-bit general-purpose register.
func IsR16(op Op) bool {
return IsGP(op, 2)
}
// IsR32 returns true if op is a 32-bit general-purpose register.
func IsR32(op Op) bool {
return IsGP(op, 4)
}
// IsR64 returns true if op is a 64-bit general-purpose register.
func IsR64(op Op) bool {
return IsGP(op, 8)
}
// IsPseudo returns true if op is a pseudo register.
func IsPseudo(op Op) bool {
return IsRegisterKind(op, reg.KindPseudo)
}
// IsGP returns true if op is a general-purpose register of size n bytes.
func IsGP(op Op, n uint) bool {
return IsRegisterKindSize(op, reg.KindGP, n)
}
// IsXMM0 returns true if op is the X0 register.
func IsXMM0(op Op) bool {
return op == reg.X0
}
// IsXMM returns true if op is a 128-bit XMM register.
func IsXMM(op Op) bool {
return IsRegisterKindSize(op, reg.KindVector, 16)
}
// IsYMM returns true if op is a 256-bit YMM register.
func IsYMM(op Op) bool {
return IsRegisterKindSize(op, reg.KindVector, 32)
}
// IsZMM returns true if op is a 512-bit ZMM register.
func IsZMM(op Op) bool {
return IsRegisterKindSize(op, reg.KindVector, 64)
}
// IsK returns true if op is an Opmask register.
func IsK(op Op) bool {
return IsRegisterKind(op, reg.KindOpmask)
}
// IsRegisterKindSize returns true if op is a register of the given kind and size in bytes.
func IsRegisterKindSize(op Op, k reg.Kind, n uint) bool {
r, ok := op.(reg.Register)
return ok && r.Kind() == k && r.Size() == n
}
// IsRegisterKind returns true if op is a register of the given kind.
func IsRegisterKind(op Op, k reg.Kind) bool {
r, ok := op.(reg.Register)
return ok && r.Kind() == k
}
// IsM returns true if op is a 16-, 32- or 64-bit memory operand.
func IsM(op Op) bool {
// TODO(mbm): confirm "m" check is defined correctly
// Intel manual: "A 16-, 32- or 64-bit operand in memory."
return IsM16(op) || IsM32(op) || IsM64(op)
}
// IsM8 returns true if op is an 8-bit memory operand.
func IsM8(op Op) bool {
// TODO(mbm): confirm "m8" check is defined correctly
// Intel manual: "A byte operand in memory, usually expressed as a variable or
// array name, but pointed to by the DS:(E)SI or ES:(E)DI registers. In 64-bit
// mode, it is pointed to by the RSI or RDI registers."
return IsMSize(op, 1)
}
// IsM16 returns true if op is a 16-bit memory operand.
func IsM16(op Op) bool {
return IsMSize(op, 2)
}
// IsM32 returns true if op is a 16-bit memory operand.
func IsM32(op Op) bool {
return IsMSize(op, 4)
}
// IsM64 returns true if op is a 64-bit memory operand.
func IsM64(op Op) bool {
return IsMSize(op, 8)
}
// IsMSize returns true if op is a memory operand using general-purpose address
// registers of the given size in bytes.
func IsMSize(op Op, n uint) bool {
// TODO(mbm): should memory operands have a size attribute as well?
// TODO(mbm): m8,m16,m32,m64 checks do not actually check size
m, ok := op.(Mem)
return ok && IsMReg(m.Base) && (m.Index == nil || IsMReg(m.Index))
}
// IsMReg returns true if op is a register that can be used in a memory operand.
func IsMReg(op Op) bool {
return IsPseudo(op) || IsRegisterKind(op, reg.KindGP)
}
// IsM128 returns true if op is a 128-bit memory operand.
func IsM128(op Op) bool {
// TODO(mbm): should "m128" be the same as "m64"?
return IsM64(op)
}
// IsM256 returns true if op is a 256-bit memory operand.
func IsM256(op Op) bool {
// TODO(mbm): should "m256" be the same as "m64"?
return IsM64(op)
}
// IsM512 returns true if op is a 512-bit memory operand.
func IsM512(op Op) bool {
// TODO(mbm): should "m512" be the same as "m64"?
return IsM64(op)
}
// IsVM32X returns true if op is a vector memory operand with 32-bit XMM index.
func IsVM32X(op Op) bool {
return IsVmx(op)
}
// IsVM64X returns true if op is a vector memory operand with 64-bit XMM index.
func IsVM64X(op Op) bool {
return IsVmx(op)
}
// IsVmx returns true if op is a vector memory operand with XMM index.
func IsVmx(op Op) bool {
return isvm(op, IsXMM)
}
// IsVM32Y returns true if op is a vector memory operand with 32-bit YMM index.
func IsVM32Y(op Op) bool {
return IsVmy(op)
}
// IsVM64Y returns true if op is a vector memory operand with 64-bit YMM index.
func IsVM64Y(op Op) bool {
return IsVmy(op)
}
// IsVmy returns true if op is a vector memory operand with YMM index.
func IsVmy(op Op) bool {
return isvm(op, IsYMM)
}
// IsVM32Z returns true if op is a vector memory operand with 32-bit ZMM index.
func IsVM32Z(op Op) bool {
return IsVmz(op)
}
// IsVM64Z returns true if op is a vector memory operand with 64-bit ZMM index.
func IsVM64Z(op Op) bool {
return IsVmz(op)
}
// IsVmz returns true if op is a vector memory operand with ZMM index.
func IsVmz(op Op) bool {
return isvm(op, IsZMM)
}
func isvm(op Op, idx func(Op) bool) bool {
m, ok := op.(Mem)
return ok && IsR64(m.Base) && idx(m.Index)
}
// IsREL8 returns true if op is an 8-bit offset relative to instruction pointer.
func IsREL8(op Op) bool {
r, ok := op.(Rel)
return ok && r == Rel(int8(r))
}
// IsREL32 returns true if op is an offset relative to instruction pointer, or a
// label reference.
func IsREL32(op Op) bool {
// TODO(mbm): should labels be considered separately?
_, rel := op.(Rel)
_, label := op.(LabelRef)
return rel || label
}
golang-github-mmcloughlin-avo-0.5.0/operand/checks_test.go 0000664 0000000 0000000 00000011725 14370657153 0023641 0 ustar 00root root 0000000 0000000 package operand
import (
"math"
"reflect"
"runtime"
"testing"
"github.com/mmcloughlin/avo/reg"
)
func TestChecks(t *testing.T) {
cases := []struct {
Predicate func(Op) bool
Operand Op
Expect bool
}{
// Immediates
{Is1, Imm(1), true},
{Is1, Imm(23), false},
{Is3, Imm(3), true},
{Is3, Imm(23), false},
{IsIMM2U, Imm(3), true},
{IsIMM2U, Imm(4), false},
{IsIMM8, Imm(255), true},
{IsIMM8, Imm(256), false},
{IsIMM16, Imm((1 << 16) - 1), true},
{IsIMM16, Imm(1 << 16), false},
{IsIMM32, Imm((1 << 32) - 1), true},
{IsIMM32, Imm(1 << 32), false},
{IsIMM64, Imm((1 << 64) - 1), true},
// Signed Immediates
{IsIMM8, I8(-1), true},
{IsIMM16, I16(-1), true},
{IsIMM32, I32(-1), true},
{IsIMM64, I64(-1), true},
// Specific registers
{IsAL, reg.AL, true},
{IsAL, reg.CL, false},
{IsCL, reg.CL, true},
{IsCL, reg.DH, false},
{IsAX, reg.AX, true},
{IsAX, reg.DX, false},
{IsEAX, reg.EAX, true},
{IsEAX, reg.ECX, false},
{IsRAX, reg.RAX, true},
{IsRAX, reg.R13, false},
// General-purpose registers
{IsR8, reg.AL, true},
{IsR8, reg.CH, true},
{IsR8, reg.EAX, false},
{IsR16, reg.DX, true},
{IsR16, reg.R10W, true},
{IsR16, reg.R10B, false},
{IsR32, reg.EBP, true},
{IsR32, reg.R14L, true},
{IsR32, reg.R8, false},
{IsR64, reg.RDX, true},
{IsR64, reg.R10, true},
{IsR64, reg.EBX, false},
// Vector registers
{IsXMM0, reg.X0, true},
{IsXMM0, reg.X13, false},
{IsXMM0, reg.Y3, false},
{IsXMM, reg.X0, true},
{IsXMM, reg.X13, true},
{IsXMM, reg.Y3, false},
{IsXMM, reg.Z23, false},
{IsYMM, reg.Y0, true},
{IsYMM, reg.Y13, true},
{IsYMM, reg.Y31, true},
{IsYMM, reg.X3, false},
{IsYMM, reg.Z3, false},
// Pseudo registers.
{IsPseudo, reg.FramePointer, true},
{IsPseudo, reg.ProgramCounter, true},
{IsPseudo, reg.StaticBase, true},
{IsPseudo, reg.StackPointer, true},
{IsPseudo, reg.ECX, false},
{IsPseudo, reg.X9, false},
// Memory operands
{IsM, Mem{Base: reg.CX}, true},
{IsM, Mem{Base: reg.ECX}, true},
{IsM, Mem{Base: reg.RCX}, true},
{IsM, Mem{Base: reg.X0}, false},
{IsM8, Mem{Disp: 8, Base: reg.CL}, true},
{IsM8, Mem{Disp: 8, Base: reg.CL, Index: reg.AH, Scale: 2}, true},
{IsM8, Mem{Disp: 8, Base: reg.X0, Index: reg.AH, Scale: 2}, false},
{IsM8, Mem{Disp: 8, Base: reg.CL, Index: reg.X0, Scale: 2}, false},
{IsM16, Mem{Disp: 4, Base: reg.DX}, true},
{IsM16, Mem{Disp: 4, Base: reg.R13W, Index: reg.R8W, Scale: 2}, true},
{IsM16, Mem{Disp: 4, Base: reg.X0, Index: reg.R8W, Scale: 2}, false},
{IsM16, Mem{Disp: 4, Base: reg.R13W, Index: reg.X0, Scale: 2}, false},
{IsM32, Mem{Base: reg.R13L, Index: reg.EBX, Scale: 2}, true},
{IsM32, Mem{Base: reg.X0}, false},
{IsM64, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
{IsM64, Mem{Base: reg.X0}, false},
{IsM128, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
{IsM128, Mem{Base: reg.X0}, false},
{IsM256, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
{IsM256, Mem{Base: reg.X0}, false},
{IsM512, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
{IsM512, Mem{Base: reg.X0}, false},
// Argument references (special cases of memory operands)
{IsM, NewParamAddr("foo", 4), true},
{IsM8, NewParamAddr("foo", 4), true},
{IsM16, NewParamAddr("foo", 4), true},
{IsM32, NewParamAddr("foo", 4), true},
{IsM64, NewParamAddr("foo", 4), true},
// Vector memory operands
{IsVM32X, Mem{Base: reg.R14, Index: reg.X11}, true},
{IsVM32X, Mem{Base: reg.R14L, Index: reg.X11}, false},
{IsVM32X, Mem{Base: reg.R14, Index: reg.Y11}, false},
{IsVM64X, Mem{Base: reg.R14, Index: reg.X11}, true},
{IsVM64X, Mem{Base: reg.R14L, Index: reg.X11}, false},
{IsVM64X, Mem{Base: reg.R14, Index: reg.Y11}, false},
{IsVM32Y, Mem{Base: reg.R9, Index: reg.Y11}, true},
{IsVM32Y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
{IsVM32Y, Mem{Base: reg.R8, Index: reg.Z11}, false},
{IsVM64Y, Mem{Base: reg.R9, Index: reg.Y11}, true},
{IsVM64Y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
{IsVM64Y, Mem{Base: reg.R8, Index: reg.Z11}, false},
{IsVM32Z, Mem{Base: reg.R9, Index: reg.Z11}, true},
{IsVM32Z, Mem{Base: reg.R11L, Index: reg.Z11}, false},
{IsVM32Z, Mem{Base: reg.R8, Index: reg.Y11}, false},
{IsVM64Z, Mem{Base: reg.R9, Index: reg.Z11}, true},
{IsVM64Z, Mem{Base: reg.R11L, Index: reg.Z11}, false},
{IsVM64Z, Mem{Base: reg.R8, Index: reg.X11}, false},
// Relative operands
{IsREL8, Rel(math.MinInt8), true},
{IsREL8, Rel(math.MaxInt8), true},
{IsREL8, Rel(math.MinInt8 - 1), false},
{IsREL8, Rel(math.MaxInt8 + 1), false},
{IsREL8, reg.R9B, false},
{IsREL32, Rel(math.MinInt32), true},
{IsREL32, Rel(math.MaxInt32), true},
{IsREL32, LabelRef("label"), true},
{IsREL32, reg.R9L, false},
}
for _, c := range cases {
if c.Predicate(c.Operand) != c.Expect {
t.Errorf("%s( %#v ) != %v", funcname(c.Predicate), c.Operand, c.Expect)
}
}
}
func funcname(f interface{}) string {
return runtime.FuncForPC(reflect.ValueOf(f).Pointer()).Name()
}
golang-github-mmcloughlin-avo-0.5.0/operand/const.go 0000664 0000000 0000000 00000001351 14370657153 0022462 0 ustar 00root root 0000000 0000000 package operand
import "fmt"
// Constant represents a constant literal.
type Constant interface {
Op
Bytes() int
constant()
}
//go:generate go run make_const.go -output zconst.go
// String is a string constant.
type String string
// Asm returns an assembly syntax representation of the string s.
func (s String) Asm() string { return fmt.Sprintf("$%q", s) }
// Bytes returns the length of s.
func (s String) Bytes() int { return len(s) }
func (s String) constant() {}
// Imm returns an unsigned integer constant with size guessed from x.
func Imm(x uint64) Constant {
switch {
case uint64(uint8(x)) == x:
return U8(x)
case uint64(uint16(x)) == x:
return U16(x)
case uint64(uint32(x)) == x:
return U32(x)
}
return U64(x)
}
golang-github-mmcloughlin-avo-0.5.0/operand/const_test.go 0000664 0000000 0000000 00000001402 14370657153 0023516 0 ustar 00root root 0000000 0000000 package operand
import "testing"
func TestConstants(t *testing.T) {
cases := []struct {
Const Constant
Asm string
Bytes int
}{
{F32(3.1415), "$(3.1415)", 4},
{F64(3.1415), "$(3.1415)", 8},
{U8(42), "$0x2a", 1},
{U16(42), "$0x002a", 2},
{U32(42), "$0x0000002a", 4},
{U64(42), "$0x000000000000002a", 8},
{I8(-42), "$-42", 1},
{I16(-42), "$-42", 2},
{I32(-42), "$-42", 4},
{I64(-42), "$-42", 8},
{String("hello"), "$\"hello\"", 5},
{String("quot:\"q\""), "$\"quot:\\\"q\\\"\"", 8},
}
for _, c := range cases {
if c.Const.Asm() != c.Asm {
t.Errorf("%v.Asm() = %v; expect %v", c.Const, c.Const.Asm(), c.Asm)
}
if c.Const.Bytes() != c.Bytes {
t.Errorf("%v.Bytes() = %v; expect %v", c.Const, c.Const.Bytes(), c.Bytes)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/operand/doc.go 0000664 0000000 0000000 00000000114 14370657153 0022075 0 ustar 00root root 0000000 0000000 // Package operand provides types for instruction operands.
package operand
golang-github-mmcloughlin-avo-0.5.0/operand/make_const.go 0000664 0000000 0000000 00000003341 14370657153 0023460 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"bytes"
"flag"
"fmt"
"go/format"
"io"
"log"
"os"
"path/filepath"
"runtime"
"strconv"
)
var output = flag.String("output", "", "path to output file (default stdout)")
func PrintConstType(w io.Writer, name, typ, format string, size int, doc string) {
r := typ[0]
fmt.Fprintf(w, "// %s\n", doc)
fmt.Fprintf(w, "type %s %s\n", name, typ)
fmt.Fprintf(w, "\n")
fmt.Fprintf(w, "func (%c %s) Asm() string { return fmt.Sprintf(\"$%s\", %c) }\n", r, name, format, r)
fmt.Fprintf(w, "func (%c %s) Bytes() int { return %d }\n", r, name, size)
fmt.Fprintf(w, "func (%c %s) constant() {}\n", r, name)
fmt.Fprintf(w, "\n")
}
func PrintConstTypes(w io.Writer) {
_, self, _, _ := runtime.Caller(0)
fmt.Fprintf(w, "// Code generated by %s. DO NOT EDIT.\n\n", filepath.Base(self))
fmt.Fprintf(w, "package operand\n\n")
fmt.Fprintf(w, "import \"fmt\"\n\n")
for n := 1; n <= 8; n *= 2 {
bits := n * 8
bs := strconv.Itoa(bits)
if n >= 4 {
PrintConstType(w, "F"+bs, "float"+bs, "(%#v)", n, fmt.Sprintf("F%d is a %d-bit floating point constant.", bits, bits))
}
PrintConstType(w, "I"+bs, "int"+bs, "%+d", n, fmt.Sprintf("I%d is a %d-bit signed integer constant.", bits, bits))
PrintConstType(w, "U"+bs, "uint"+bs, "%#0"+strconv.Itoa(2*n)+"x", n, fmt.Sprintf("U%d is a %d-bit unsigned integer constant.", bits, bits))
}
}
func main() {
flag.Parse()
w := os.Stdout
if *output != "" {
f, err := os.Create(*output)
if err != nil {
log.Fatal(err)
}
defer f.Close()
w = f
}
buf := bytes.NewBuffer(nil)
PrintConstTypes(buf)
src, err := format.Source(buf.Bytes())
if err != nil {
log.Fatal(err)
}
_, err = w.Write(src)
if err != nil {
log.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/operand/types.go 0000664 0000000 0000000 00000006233 14370657153 0022504 0 ustar 00root root 0000000 0000000 package operand
import (
"fmt"
"github.com/mmcloughlin/avo/reg"
)
// Op is an operand.
type Op interface {
Asm() string
}
// Symbol represents a symbol name.
type Symbol struct {
Name string
Static bool // only visible in current source file
}
// NewStaticSymbol builds a static Symbol. Static symbols are only visible in the current source file.
func NewStaticSymbol(name string) Symbol {
return Symbol{Name: name, Static: true}
}
func (s Symbol) String() string {
n := s.Name
if s.Static {
n += "<>"
}
return n
}
// Mem represents a memory reference.
type Mem struct {
Symbol Symbol
Disp int
Base reg.Register
Index reg.Register
Scale uint8
}
// NewParamAddr is a convenience to build a Mem operand pointing to a function
// parameter, which is a named offset from the frame pointer pseudo register.
func NewParamAddr(name string, offset int) Mem {
return Mem{
Symbol: Symbol{
Name: name,
Static: false,
},
Disp: offset,
Base: reg.FramePointer,
}
}
// NewStackAddr returns a memory reference relative to the stack pointer.
func NewStackAddr(offset int) Mem {
return Mem{
Disp: offset,
Base: reg.StackPointer,
}
}
// NewDataAddr returns a memory reference relative to the named data symbol.
func NewDataAddr(sym Symbol, offset int) Mem {
return Mem{
Symbol: sym,
Disp: offset,
Base: reg.StaticBase,
}
}
// Offset returns a reference to m plus idx bytes.
func (m Mem) Offset(idx int) Mem {
a := m
a.Disp += idx
return a
}
// Idx returns a new memory reference with (Index, Scale) set to (r, s).
func (m Mem) Idx(r reg.Register, s uint8) Mem {
a := m
a.Index = r
a.Scale = s
return a
}
// Asm returns an assembly syntax representation of m.
func (m Mem) Asm() string {
a := m.Symbol.String()
if a != "" {
a += fmt.Sprintf("%+d", m.Disp)
} else if m.Disp != 0 {
a += fmt.Sprintf("%d", m.Disp)
}
if m.Base != nil {
a += fmt.Sprintf("(%s)", m.Base.Asm())
}
if m.Index != nil && m.Scale != 0 {
a += fmt.Sprintf("(%s*%d)", m.Index.Asm(), m.Scale)
}
return a
}
// Rel is an offset relative to the instruction pointer.
type Rel int32
// Asm returns an assembly syntax representation of r.
func (r Rel) Asm() string {
return fmt.Sprintf(".%+d", r)
}
// LabelRef is a reference to a label.
type LabelRef string
// Asm returns an assembly syntax representation of l.
func (l LabelRef) Asm() string {
return string(l)
}
// Registers returns the list of all operands involved in the given operand.
func Registers(op Op) []reg.Register {
switch op := op.(type) {
case reg.Register:
return []reg.Register{op}
case Mem:
var r []reg.Register
if op.Base != nil {
r = append(r, op.Base)
}
if op.Index != nil {
r = append(r, op.Index)
}
return r
case Constant, Rel, LabelRef:
return nil
}
panic("unknown operand type")
}
// ApplyAllocation returns an operand with allocated registers replaced. Registers missing from the allocation are left alone.
func ApplyAllocation(op Op, a reg.Allocation) Op {
switch op := op.(type) {
case reg.Register:
return a.LookupRegisterDefault(op)
case Mem:
op.Base = a.LookupRegisterDefault(op.Base)
op.Index = a.LookupRegisterDefault(op.Index)
return op
}
return op
}
golang-github-mmcloughlin-avo-0.5.0/operand/types_test.go 0000664 0000000 0000000 00000004110 14370657153 0023533 0 ustar 00root root 0000000 0000000 package operand
import (
"reflect"
"testing"
"github.com/mmcloughlin/avo/reg"
)
func TestSymbolString(t *testing.T) {
cases := []struct {
Symbol Symbol
Expect string
}{
{Symbol{}, ""},
{Symbol{Name: "name"}, "name"},
{Symbol{Name: "static", Static: true}, "static<>"},
}
for _, c := range cases {
got := c.Symbol.String()
if got != c.Expect {
t.Errorf("%#v.String() = %s expected %s", c.Symbol, got, c.Expect)
}
}
}
func TestMemAsm(t *testing.T) {
cases := []struct {
Mem Mem
Expect string
}{
{Mem{Base: reg.EAX}, "(AX)"},
{Mem{Disp: 16, Base: reg.RAX}, "16(AX)"},
{Mem{Disp: -7, Base: reg.RAX}, "-7(AX)"},
{Mem{Base: reg.R11, Index: reg.RAX, Scale: 4}, "(R11)(AX*4)"},
{Mem{Base: reg.R11, Index: reg.RAX, Scale: 1}, "(R11)(AX*1)"},
{Mem{Base: reg.R11, Index: reg.RAX}, "(R11)"},
{Mem{Base: reg.R11, Scale: 8}, "(R11)"},
{Mem{Disp: 2048, Base: reg.R11, Index: reg.RAX, Scale: 8}, "2048(R11)(AX*8)"},
{Mem{Symbol: Symbol{Name: "foo"}, Base: reg.StaticBase}, "foo+0(SB)"},
{Mem{Symbol: Symbol{Name: "foo"}, Base: reg.StaticBase, Disp: 4}, "foo+4(SB)"},
{Mem{Symbol: Symbol{Name: "foo"}, Base: reg.StaticBase, Disp: -7}, "foo-7(SB)"},
{Mem{Symbol: Symbol{Name: "bar", Static: true}, Base: reg.StaticBase, Disp: 4, Index: reg.R11, Scale: 4}, "bar<>+4(SB)(R11*4)"},
{NewParamAddr("param", 16), "param+16(FP)"},
{NewStackAddr(42), "42(SP)"},
{NewDataAddr(Symbol{Name: "data", Static: true}, 13), "data<>+13(SB)"},
}
for _, c := range cases {
got := c.Mem.Asm()
if got != c.Expect {
t.Errorf("%#v.Asm() = %s expected %s", c.Mem, got, c.Expect)
}
}
}
func TestRegisters(t *testing.T) {
cases := []struct {
Op Op
Expect []reg.Register
}{
{reg.R11, []reg.Register{reg.R11}},
{Mem{Base: reg.EAX}, []reg.Register{reg.EAX}},
{Mem{Base: reg.RBX, Index: reg.R10}, []reg.Register{reg.RBX, reg.R10}},
{Imm(42), nil},
{Rel(42), nil},
{LabelRef("idk"), nil},
}
for _, c := range cases {
got := Registers(c.Op)
if !reflect.DeepEqual(got, c.Expect) {
t.Errorf("Registers(%#v) = %#v expected %#v", c.Op, got, c.Expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/operand/zconst.go 0000664 0000000 0000000 00000003701 14370657153 0022655 0 ustar 00root root 0000000 0000000 // Code generated by make_const.go. DO NOT EDIT.
package operand
import "fmt"
// I8 is a 8-bit signed integer constant.
type I8 int8
func (i I8) Asm() string { return fmt.Sprintf("$%+d", i) }
func (i I8) Bytes() int { return 1 }
func (i I8) constant() {}
// U8 is a 8-bit unsigned integer constant.
type U8 uint8
func (u U8) Asm() string { return fmt.Sprintf("$%#02x", u) }
func (u U8) Bytes() int { return 1 }
func (u U8) constant() {}
// I16 is a 16-bit signed integer constant.
type I16 int16
func (i I16) Asm() string { return fmt.Sprintf("$%+d", i) }
func (i I16) Bytes() int { return 2 }
func (i I16) constant() {}
// U16 is a 16-bit unsigned integer constant.
type U16 uint16
func (u U16) Asm() string { return fmt.Sprintf("$%#04x", u) }
func (u U16) Bytes() int { return 2 }
func (u U16) constant() {}
// F32 is a 32-bit floating point constant.
type F32 float32
func (f F32) Asm() string { return fmt.Sprintf("$(%#v)", f) }
func (f F32) Bytes() int { return 4 }
func (f F32) constant() {}
// I32 is a 32-bit signed integer constant.
type I32 int32
func (i I32) Asm() string { return fmt.Sprintf("$%+d", i) }
func (i I32) Bytes() int { return 4 }
func (i I32) constant() {}
// U32 is a 32-bit unsigned integer constant.
type U32 uint32
func (u U32) Asm() string { return fmt.Sprintf("$%#08x", u) }
func (u U32) Bytes() int { return 4 }
func (u U32) constant() {}
// F64 is a 64-bit floating point constant.
type F64 float64
func (f F64) Asm() string { return fmt.Sprintf("$(%#v)", f) }
func (f F64) Bytes() int { return 8 }
func (f F64) constant() {}
// I64 is a 64-bit signed integer constant.
type I64 int64
func (i I64) Asm() string { return fmt.Sprintf("$%+d", i) }
func (i I64) Bytes() int { return 8 }
func (i I64) constant() {}
// U64 is a 64-bit unsigned integer constant.
type U64 uint64
func (u U64) Asm() string { return fmt.Sprintf("$%#016x", u) }
func (u U64) Bytes() int { return 8 }
func (u U64) constant() {}
golang-github-mmcloughlin-avo-0.5.0/pass/ 0000775 0000000 0000000 00000000000 14370657153 0020323 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/pass/alloc.go 0000664 0000000 0000000 00000012252 14370657153 0021746 0 ustar 00root root 0000000 0000000 package pass
import (
"errors"
"math"
"sort"
"github.com/mmcloughlin/avo/reg"
)
// edge is an edge of the interference graph, indicating that registers X and Y
// must be in non-conflicting registers.
type edge struct {
X, Y reg.ID
}
// Allocator is a graph-coloring register allocator.
type Allocator struct {
registers []reg.ID
priority map[reg.ID]int
allocation reg.Allocation
edges []*edge
possible map[reg.ID][]reg.ID
}
// NewAllocator builds an allocator for the given physical registers.
func NewAllocator(rs []reg.Physical) (*Allocator, error) {
// Set of IDs, excluding restricted registers.
idset := map[reg.ID]bool{}
for _, r := range rs {
if (r.Info() & reg.Restricted) != 0 {
continue
}
idset[r.ID()] = true
}
if len(idset) == 0 {
return nil, errors.New("no allocatable registers")
}
// Produce slice of unique register IDs.
var ids []reg.ID
for id := range idset {
ids = append(ids, id)
}
a := &Allocator{
registers: ids,
priority: map[reg.ID]int{},
allocation: reg.NewEmptyAllocation(),
possible: map[reg.ID][]reg.ID{},
}
a.sortregisters()
return a, nil
}
// NewAllocatorForKind builds an allocator for the given kind of registers.
func NewAllocatorForKind(k reg.Kind) (*Allocator, error) {
f := reg.FamilyOfKind(k)
if f == nil {
return nil, errors.New("unknown register family")
}
return NewAllocator(f.Registers())
}
// SetPriority sets the priority of the given regiser to p. Higher priority
// registers are preferred in allocations. By default all registers have 0
// priority. Priority will only apply to subsequent Add() calls, therefore
// typically all SetPriority calls should happen at allocator initialization.
func (a *Allocator) SetPriority(id reg.ID, p int) {
a.priority[id] = p
a.sortregisters()
}
// sortregisters sorts the list of available registers: higher priority first,
// falling back to sorting by ID.
func (a *Allocator) sortregisters() {
sort.Slice(a.registers, func(i, j int) bool {
ri, rj := a.registers[i], a.registers[j]
pi, pj := a.priority[ri], a.priority[rj]
return (pi > pj) || (pi == pj && ri < rj)
})
}
// AddInterferenceSet records that r interferes with every register in s. Convenience wrapper around AddInterference.
func (a *Allocator) AddInterferenceSet(r reg.Register, s reg.MaskSet) {
for id, mask := range s {
if (r.Mask() & mask) != 0 {
a.AddInterference(r.ID(), id)
}
}
}
// AddInterference records that x and y must be assigned to non-conflicting physical registers.
func (a *Allocator) AddInterference(x, y reg.ID) {
a.Add(x)
a.Add(y)
a.edges = append(a.edges, &edge{X: x, Y: y})
}
// Add adds a register to be allocated. Does nothing if the register has already been added.
func (a *Allocator) Add(v reg.ID) {
if !v.IsVirtual() {
return
}
if _, found := a.possible[v]; found {
return
}
a.possible[v] = a.possibleregisters(v)
}
// Allocate allocates physical registers.
func (a *Allocator) Allocate() (reg.Allocation, error) {
for {
if err := a.update(); err != nil {
return nil, err
}
if a.remaining() == 0 {
break
}
v := a.mostrestricted()
if err := a.alloc(v); err != nil {
return nil, err
}
}
return a.allocation, nil
}
// update possible allocations based on edges.
func (a *Allocator) update() error {
var rem []*edge
for _, e := range a.edges {
x := a.allocation.LookupDefault(e.X)
y := a.allocation.LookupDefault(e.Y)
switch {
case x.IsVirtual() && y.IsVirtual():
rem = append(rem, e)
continue
case x.IsPhysical() && y.IsPhysical():
if x == y {
return errors.New("impossible register allocation")
}
case x.IsPhysical() && y.IsVirtual():
a.discardconflicting(y, x)
case x.IsVirtual() && y.IsPhysical():
a.discardconflicting(x, y)
default:
panic("unreachable")
}
}
a.edges = rem
return nil
}
// mostrestricted returns the virtual register with the least possibilities.
func (a *Allocator) mostrestricted() reg.ID {
n := int(math.MaxInt32)
var v reg.ID
for w, p := range a.possible {
// On a tie, choose the smallest ID in numeric order. This avoids
// non-deterministic allocations due to map iteration order.
if len(p) < n || (len(p) == n && w < v) {
n = len(p)
v = w
}
}
return v
}
// discardconflicting removes registers from vs possible list that conflict with p.
func (a *Allocator) discardconflicting(v, p reg.ID) {
a.possible[v] = filterregisters(a.possible[v], func(r reg.ID) bool {
return r != p
})
}
// alloc attempts to allocate a register to v.
func (a *Allocator) alloc(v reg.ID) error {
ps := a.possible[v]
if len(ps) == 0 {
return errors.New("failed to allocate registers")
}
p := ps[0]
a.allocation[v] = p
delete(a.possible, v)
return nil
}
// remaining returns the number of unallocated registers.
func (a *Allocator) remaining() int {
return len(a.possible)
}
// possibleregisters returns all allocate-able registers for the given virtual.
func (a *Allocator) possibleregisters(v reg.ID) []reg.ID {
return filterregisters(a.registers, func(r reg.ID) bool {
return v.Kind() == r.Kind()
})
}
func filterregisters(in []reg.ID, predicate func(reg.ID) bool) []reg.ID {
var rs []reg.ID
for _, r := range in {
if predicate(r) {
rs = append(rs, r)
}
}
return rs
}
golang-github-mmcloughlin-avo-0.5.0/pass/alloc_test.go 0000664 0000000 0000000 00000003536 14370657153 0023012 0 ustar 00root root 0000000 0000000 package pass
import (
"testing"
"github.com/mmcloughlin/avo/reg"
)
func TestAllocatorSimple(t *testing.T) {
c := reg.NewCollection()
x, y := c.XMM(), c.YMM()
a, err := NewAllocatorForKind(reg.KindVector)
if err != nil {
t.Fatal(err)
}
a.Add(x.ID())
a.Add(y.ID())
a.AddInterference(x.ID(), y.ID())
alloc, err := a.Allocate()
if err != nil {
t.Fatal(err)
}
t.Log(alloc)
if alloc.LookupRegister(x) != reg.X0 || alloc.LookupRegister(y) != reg.Y1 {
t.Fatalf("unexpected allocation")
}
}
func TestAllocatorImpossible(t *testing.T) {
a, err := NewAllocatorForKind(reg.KindVector)
if err != nil {
t.Fatal(err)
}
a.AddInterference(reg.X7.ID(), reg.Z7.ID())
_, err = a.Allocate()
if err == nil {
t.Fatal("expected allocation error")
}
}
func TestAllocatorPriority(t *testing.T) {
const n = 4
// Create an allocator with custom priorities.
a, err := NewAllocatorForKind(reg.KindVector)
if err != nil {
t.Fatal(err)
}
a.SetPriority(reg.X0.ID(), -1)
a.SetPriority(reg.X7.ID(), 1)
a.SetPriority(reg.X13.ID(), 1)
a.SetPriority(reg.X3.ID(), 2)
// The expected n highest priority registers.
expect := [n]reg.Physical{
reg.X3, // priority 2, id 3
reg.X7, // priority 1, id 7
reg.X13, // priority 1, id 13
reg.X1, // priority 0, id 1 (X0 has priority -1)
}
// Setup allocation problem with n conflicting registers.
c := reg.NewCollection()
x := make([]reg.Virtual, n)
for i := range x {
x[i] = c.XMM()
}
for i := range x {
a.Add(x[i].ID())
}
for i := 0; i < n; i++ {
for j := i + 1; j < n; j++ {
a.AddInterference(x[i].ID(), x[j].ID())
}
}
// Allocate and confirm expectation.
alloc, err := a.Allocate()
if err != nil {
t.Fatal(err)
}
for i := range x {
if got := alloc.LookupRegister(x[i]); got != expect[i] {
t.Errorf("x[%d] allocated %s; expected %s", i, got.Asm(), expect[i].Asm())
}
}
}
golang-github-mmcloughlin-avo-0.5.0/pass/cfg.go 0000664 0000000 0000000 00000003174 14370657153 0021416 0 ustar 00root root 0000000 0000000 package pass
import (
"errors"
"fmt"
"github.com/mmcloughlin/avo/ir"
)
// LabelTarget populates the LabelTarget of the given function. This maps from
// label name to the following instruction.
func LabelTarget(fn *ir.Function) error {
target := map[ir.Label]*ir.Instruction{}
var pending []ir.Label
for _, node := range fn.Nodes {
switch n := node.(type) {
case ir.Label:
if _, found := target[n]; found {
return fmt.Errorf("duplicate label \"%s\"", n)
}
pending = append(pending, n)
case *ir.Instruction:
for _, label := range pending {
target[label] = n
}
pending = nil
}
}
if len(pending) != 0 {
return errors.New("function ends with label")
}
fn.LabelTarget = target
return nil
}
// CFG constructs the call-flow-graph for the function.
func CFG(fn *ir.Function) error {
is := fn.Instructions()
n := len(is)
// Populate successors.
for i := 0; i < n; i++ {
cur := is[i]
var nxt *ir.Instruction
if i+1 < n {
nxt = is[i+1]
}
// If it's a branch, locate the target.
if cur.IsBranch {
lbl := cur.TargetLabel()
if lbl == nil {
return errors.New("no label for branch instruction")
}
target, found := fn.LabelTarget[*lbl]
if !found {
return fmt.Errorf("unknown label %q", *lbl)
}
cur.Succ = append(cur.Succ, target)
}
// Otherwise, could continue to the following instruction.
switch {
case cur.IsTerminal:
case cur.IsUnconditionalBranch():
default:
cur.Succ = append(cur.Succ, nxt)
}
}
// Populate predecessors.
for _, i := range is {
for _, s := range i.Succ {
if s != nil {
s.Pred = append(s.Pred, i)
}
}
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/pass/cfg_test.go 0000664 0000000 0000000 00000016607 14370657153 0022462 0 ustar 00root root 0000000 0000000 package pass
import (
"reflect"
"sort"
"testing"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
func TestLabelTarget(t *testing.T) {
expect := map[ir.Label]*ir.Instruction{
"lblA": {Opcode: "A"},
"lblB": {Opcode: "B"},
}
f := ir.NewFunction("happypath")
for lbl, i := range expect {
f.AddLabel(lbl)
f.AddComment("comments should be ignored")
f.AddInstruction(i)
f.AddInstruction(&ir.Instruction{Opcode: "IDK"})
}
if err := LabelTarget(f); err != nil {
t.Fatal(err)
}
if !reflect.DeepEqual(expect, f.LabelTarget) {
t.Fatalf("incorrect LabelTarget value\ngot=%#v\nexpext=%#v\n", f.LabelTarget, expect)
}
}
func TestLabelTargetDuplicate(t *testing.T) {
f := ir.NewFunction("dupelabel")
f.AddLabel(ir.Label("lblA"))
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddLabel(ir.Label("lblA"))
f.AddInstruction(&ir.Instruction{Opcode: "A"})
err := LabelTarget(f)
if err == nil || err.Error() != "duplicate label \"lblA\"" {
t.Fatalf("expected error on duplcate label; got %v", err)
}
}
func TestLabelTargetEndsWithLabel(t *testing.T) {
f := ir.NewFunction("endswithlabel")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddLabel(ir.Label("theend"))
err := LabelTarget(f)
if err == nil || err.Error() != "function ends with label" {
t.Fatalf("expected error when function ends with label; got %v", err)
}
}
func TestLabelTargetConsecutiveLabels(t *testing.T) {
i := &ir.Instruction{Opcode: "A"}
f := ir.NewFunction("consecutivelabels")
f.AddLabel(ir.Label("lblA"))
f.AddLabel(ir.Label("lblB"))
f.AddInstruction(i)
expect := map[ir.Label]*ir.Instruction{
"lblA": i,
"lblB": i,
}
if err := LabelTarget(f); err != nil {
t.Fatal(err)
}
if !reflect.DeepEqual(expect, f.LabelTarget) {
t.Fatalf("incorrect LabelTarget value\ngot=%#v\nexpext=%#v\n", f.LabelTarget, expect)
}
}
func TestCFGSingleBasicBlock(t *testing.T) {
f := ir.NewFunction("simple")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddInstruction(&ir.Instruction{Opcode: "B"})
f.AddInstruction(Terminal("RET"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"A": {"B"},
"B": {"RET"},
"RET": {},
})
AssertPredecessors(t, f, map[string][]string{
"A": {},
"B": {"A"},
"RET": {"B"},
})
}
func TestCFGCondBranch(t *testing.T) {
f := ir.NewFunction("condbranch")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddLabel(ir.Label("lblB"))
f.AddInstruction(&ir.Instruction{Opcode: "B"})
f.AddInstruction(&ir.Instruction{Opcode: "C"})
f.AddInstruction(CondBranch("J", "lblB"))
f.AddInstruction(Terminal("RET"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"A": {"B"},
"B": {"C"},
"C": {"J"},
"J": {"B", "RET"},
"RET": {},
})
}
func TestCFGUncondBranch(t *testing.T) {
f := ir.NewFunction("uncondbranch")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddLabel(ir.Label("lblB"))
f.AddInstruction(&ir.Instruction{Opcode: "B"})
f.AddInstruction(UncondBranch("JMP", "lblB"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"A": {"B"},
"B": {"JMP"},
"JMP": {"B"},
})
}
func TestCFGJumpForward(t *testing.T) {
f := ir.NewFunction("forward")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddInstruction(CondBranch("J", "done"))
f.AddInstruction(&ir.Instruction{Opcode: "B"})
f.AddLabel(ir.Label("done"))
f.AddInstruction(Terminal("RET"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"A": {"J"},
"J": {"B", "RET"},
"B": {"RET"},
"RET": {},
})
}
func TestCFGMultiReturn(t *testing.T) {
f := ir.NewFunction("multireturn")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddInstruction(CondBranch("J", "fork"))
f.AddInstruction(&ir.Instruction{Opcode: "B"})
f.AddInstruction(Terminal("RET1"))
f.AddLabel(ir.Label("fork"))
f.AddInstruction(&ir.Instruction{Opcode: "C"})
f.AddInstruction(Terminal("RET2"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"A": {"J"},
"J": {"B", "C"},
"B": {"RET1"},
"RET1": {},
"C": {"RET2"},
"RET2": {},
})
}
func TestCFGShortLoop(t *testing.T) {
f := ir.NewFunction("shortloop")
f.AddLabel(ir.Label("cycle"))
f.AddInstruction(UncondBranch("JMP", "cycle"))
if err := ComputeCFG(t, f); err != nil {
t.Fatal(err)
}
AssertSuccessors(t, f, map[string][]string{
"JMP": {"JMP"},
})
}
func TestCFGUndefinedLabel(t *testing.T) {
f := ir.NewFunction("undeflabel")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddInstruction(CondBranch("J", "undef"))
err := ComputeCFG(t, f)
if err == nil {
t.Fatal("expect error on undefined label")
}
}
func TestCFGMissingLabel(t *testing.T) {
f := ir.NewFunction("missinglabel")
f.AddInstruction(&ir.Instruction{Opcode: "A"})
f.AddInstruction(&ir.Instruction{Opcode: "J", IsBranch: true}) // no label operand
err := ComputeCFG(t, f)
if err == nil {
t.Fatal("expect error on missing label")
}
}
// Terminal builds a terminal instruction.
func Terminal(opcode string) *ir.Instruction {
return &ir.Instruction{Opcode: opcode, IsTerminal: true}
}
// CondBranch builds a conditional branch instruction to the given label.
func CondBranch(opcode, lbl string) *ir.Instruction {
return &ir.Instruction{
Opcode: opcode,
Operands: []operand.Op{operand.LabelRef(lbl)},
IsBranch: true,
IsConditional: true,
}
}
// UncondBranch builds an unconditional branch instruction to the given label.
func UncondBranch(opcode, lbl string) *ir.Instruction {
return &ir.Instruction{
Opcode: opcode,
Operands: []operand.Op{operand.LabelRef(lbl)},
IsBranch: true,
IsConditional: false,
}
}
func ComputeCFG(t *testing.T, f *ir.Function) error {
t.Helper()
if err := LabelTarget(f); err != nil {
t.Fatal(err)
}
return CFG(f)
}
func AssertSuccessors(t *testing.T, f *ir.Function, expect map[string][]string) {
t.Helper()
AssertEqual(t, "successors", OpcodeSuccessorGraph(f), expect)
}
func AssertPredecessors(t *testing.T, f *ir.Function, expect map[string][]string) {
t.Helper()
AssertEqual(t, "predecessors", OpcodePredecessorGraph(f), expect)
}
func AssertEqual(t *testing.T, what string, got, expect interface{}) {
t.Helper()
t.Logf("%s=%#v\n", what, got)
if reflect.DeepEqual(expect, got) {
return
}
t.Fatalf("bad %s; expected=%#v", what, expect)
}
// OpcodeSuccessorGraph builds a map from opcode name to successor opcode names.
func OpcodeSuccessorGraph(f *ir.Function) map[string][]string {
return OpcodeGraph(f, func(i *ir.Instruction) []*ir.Instruction { return i.Succ })
}
// OpcodePredecessorGraph builds a map from opcode name to predecessor opcode names.
func OpcodePredecessorGraph(f *ir.Function) map[string][]string {
return OpcodeGraph(f, func(i *ir.Instruction) []*ir.Instruction { return i.Pred })
}
// OpcodeGraph builds a map from opcode name to neighboring opcode names. Each list of neighbors is sorted.
func OpcodeGraph(f *ir.Function, neighbors func(*ir.Instruction) []*ir.Instruction) map[string][]string {
g := map[string][]string{}
for _, i := range f.Instructions() {
opcodes := []string{}
for _, n := range neighbors(i) {
opcode := ""
if n != nil {
opcode = n.Opcode
}
opcodes = append(opcodes, opcode)
}
sort.Strings(opcodes)
g[i.Opcode] = opcodes
}
return g
}
golang-github-mmcloughlin-avo-0.5.0/pass/cleanup.go 0000664 0000000 0000000 00000005311 14370657153 0022301 0 ustar 00root root 0000000 0000000 package pass
import (
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
// PruneJumpToFollowingLabel removes jump instructions that target an
// immediately following label.
func PruneJumpToFollowingLabel(fn *ir.Function) error {
for i := 0; i+1 < len(fn.Nodes); i++ {
node := fn.Nodes[i]
next := fn.Nodes[i+1]
// This node is an unconditional jump.
inst, ok := node.(*ir.Instruction)
if !ok || !inst.IsBranch || inst.IsConditional {
continue
}
target := inst.TargetLabel()
if target == nil {
continue
}
// And the jump target is the immediately following node.
lbl, ok := next.(ir.Label)
if !ok || lbl != *target {
continue
}
// Then the jump is unnecessary and can be removed.
fn.Nodes = deletenode(fn.Nodes, i)
i--
}
return nil
}
// PruneDanglingLabels removes labels that are not referenced by any branches.
func PruneDanglingLabels(fn *ir.Function) error {
// Count label references.
count := map[ir.Label]int{}
for _, n := range fn.Nodes {
i, ok := n.(*ir.Instruction)
if !ok || !i.IsBranch {
continue
}
target := i.TargetLabel()
if target == nil {
continue
}
count[*target]++
}
// Look for labels with no references.
for i := 0; i < len(fn.Nodes); i++ {
node := fn.Nodes[i]
lbl, ok := node.(ir.Label)
if !ok {
continue
}
if count[lbl] == 0 {
fn.Nodes = deletenode(fn.Nodes, i)
i--
}
}
return nil
}
// PruneSelfMoves removes move instructions from one register to itself.
func PruneSelfMoves(fn *ir.Function) error {
return removeinstructions(fn, func(i *ir.Instruction) bool {
switch i.Opcode {
case "MOVB", "MOVW", "MOVL", "MOVQ":
default:
return false
}
return operand.IsRegister(i.Operands[0]) && operand.IsRegister(i.Operands[1]) && i.Operands[0] == i.Operands[1]
})
}
// removeinstructions deletes instructions from the given function which match predicate.
func removeinstructions(fn *ir.Function, predicate func(*ir.Instruction) bool) error {
// Removal of instructions has the potential to invalidate CFG structures.
// Clear them to prevent accidental use of stale structures after this pass.
invalidatecfg(fn)
for i := 0; i < len(fn.Nodes); i++ {
n := fn.Nodes[i]
inst, ok := n.(*ir.Instruction)
if !ok || !predicate(inst) {
continue
}
fn.Nodes = deletenode(fn.Nodes, i)
}
return nil
}
// deletenode deletes node i from nodes and returns the resulting slice.
func deletenode(nodes []ir.Node, i int) []ir.Node {
n := len(nodes)
copy(nodes[i:], nodes[i+1:])
nodes[n-1] = nil
return nodes[:n-1]
}
// invalidatecfg clears CFG structures.
func invalidatecfg(fn *ir.Function) {
fn.LabelTarget = nil
for _, i := range fn.Instructions() {
i.Pred = nil
i.Succ = nil
}
}
golang-github-mmcloughlin-avo-0.5.0/pass/cleanup_test.go 0000664 0000000 0000000 00000004275 14370657153 0023350 0 ustar 00root root 0000000 0000000 package pass_test
import (
"reflect"
"testing"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/pass"
"github.com/mmcloughlin/avo/reg"
)
func TestPruneSelfMoves(t *testing.T) {
// Construct a function containing a self-move.
ctx := build.NewContext()
ctx.Function("add")
ctx.MOVQ(operand.U64(1), reg.RAX)
ctx.MOVQ(operand.U64(2), reg.RCX)
ctx.MOVQ(reg.RAX, reg.RAX) // self move
ctx.MOVQ(reg.RCX, reg.R8)
ctx.ADDQ(reg.R8, reg.RAX)
// Build the function without the pass and save the nodes.
fn := BuildFunction(t, ctx)
pre := append([]ir.Node{}, fn.Nodes...)
// Apply the pass.
if err := pass.PruneSelfMoves(fn); err != nil {
t.Fatal(err)
}
// Confirm the self-move was removed and everything else was untouched.
expect := []ir.Node{}
for i, n := range pre {
if i != 2 {
expect = append(expect, n)
}
}
if !reflect.DeepEqual(fn.Nodes, expect) {
t.Fatal("unexpected result from self-move pruning")
}
}
func TestPruneJumpToFollowingLabel(t *testing.T) {
// Construct a function containing a jump to following.
ctx := build.NewContext()
ctx.Function("add")
ctx.XORQ(reg.RAX, reg.RAX)
ctx.JMP(operand.LabelRef("next"))
ctx.Label("next")
ctx.XORQ(reg.RAX, reg.RAX)
// Build the function with the PruneJumpToFollowingLabel pass.
fn := BuildFunction(t, ctx, pass.PruneJumpToFollowingLabel)
// Confirm no JMP instruction remains.
for _, i := range fn.Instructions() {
if i.Opcode == "JMP" {
t.Fatal("JMP instruction not removed")
}
}
}
func TestPruneDanglingLabels(t *testing.T) {
// Construct a function containing an unreferenced label.
ctx := build.NewContext()
ctx.Function("add")
ctx.XORQ(reg.RAX, reg.RAX)
ctx.JMP(operand.LabelRef("referenced"))
ctx.XORQ(reg.RAX, reg.RAX)
ctx.Label("dangling")
ctx.XORQ(reg.RAX, reg.RAX)
ctx.Label("referenced")
ctx.XORQ(reg.RAX, reg.RAX)
// Build the function with the PruneDanglingLabels pass.
fn := BuildFunction(t, ctx, pass.PruneDanglingLabels)
// Confirm the only label remaining is "referenced".
expect := []ir.Label{"referenced"}
if !reflect.DeepEqual(expect, fn.Labels()) {
t.Fatal("expected dangling label to be removed")
}
}
golang-github-mmcloughlin-avo-0.5.0/pass/isa.go 0000664 0000000 0000000 00000001076 14370657153 0021432 0 ustar 00root root 0000000 0000000 package pass
import (
"sort"
"github.com/mmcloughlin/avo/ir"
)
// RequiredISAExtensions determines ISA extensions required for the given
// function. Populates the ISA field.
func RequiredISAExtensions(fn *ir.Function) error {
// Collect ISA set.
set := map[string]bool{}
for _, i := range fn.Instructions() {
for _, isa := range i.ISA {
set[isa] = true
}
}
if len(set) == 0 {
return nil
}
// Populate the function's ISA field with the unique sorted list.
for isa := range set {
fn.ISA = append(fn.ISA, isa)
}
sort.Strings(fn.ISA)
return nil
}
golang-github-mmcloughlin-avo-0.5.0/pass/isa_test.go 0000664 0000000 0000000 00000000747 14370657153 0022475 0 ustar 00root root 0000000 0000000 package pass
import (
"reflect"
"testing"
"github.com/mmcloughlin/avo/ir"
)
func TestRequiredISAExtensions(t *testing.T) {
f := ir.NewFunction("ISAs")
f.AddInstruction(&ir.Instruction{ISA: nil})
f.AddInstruction(&ir.Instruction{ISA: []string{"B", "A"}})
f.AddInstruction(&ir.Instruction{ISA: []string{"A", "C"}})
err := RequiredISAExtensions(f)
if err != nil {
t.Fatal(err)
}
expect := []string{"A", "B", "C"}
if !reflect.DeepEqual(f.ISA, expect) {
t.FailNow()
}
}
golang-github-mmcloughlin-avo-0.5.0/pass/pass.go 0000664 0000000 0000000 00000004754 14370657153 0021632 0 ustar 00root root 0000000 0000000 // Package pass implements processing passes on avo Files.
package pass
import (
"io"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/printer"
)
// Compile pass compiles an avo file. Upon successful completion the avo file
// may be printed to Go assembly.
var Compile = Concat(
Verify,
FunctionPass(PruneJumpToFollowingLabel),
FunctionPass(PruneDanglingLabels),
FunctionPass(LabelTarget),
FunctionPass(CFG),
InstructionPass(ZeroExtend32BitOutputs),
FunctionPass(Liveness),
FunctionPass(AllocateRegisters),
FunctionPass(BindRegisters),
FunctionPass(VerifyAllocation),
FunctionPass(EnsureBasePointerCalleeSaved),
Func(IncludeTextFlagHeader),
FunctionPass(PruneSelfMoves),
FunctionPass(RequiredISAExtensions),
)
// Interface for a processing pass.
type Interface interface {
Execute(*ir.File) error
}
// Func adapts a function to the pass Interface.
type Func func(*ir.File) error
// Execute calls p.
func (p Func) Execute(f *ir.File) error {
return p(f)
}
// FunctionPass is a convenience for implementing a full file pass with a
// function that operates on each avo Function independently.
type FunctionPass func(*ir.Function) error
// Execute calls p on every function in the file. Exits on the first error.
func (p FunctionPass) Execute(f *ir.File) error {
for _, fn := range f.Functions() {
if err := p(fn); err != nil {
return err
}
}
return nil
}
// InstructionPass is a convenience for implementing a full file pass with a
// function that operates on each Instruction independently.
type InstructionPass func(*ir.Instruction) error
// Execute calls p on every instruction in the file. Exits on the first error.
func (p InstructionPass) Execute(f *ir.File) error {
for _, fn := range f.Functions() {
for _, i := range fn.Instructions() {
if err := p(i); err != nil {
return err
}
}
}
return nil
}
// Concat returns a pass that executes the given passes in order, stopping on the first error.
func Concat(passes ...Interface) Interface {
return Func(func(f *ir.File) error {
for _, p := range passes {
if err := p.Execute(f); err != nil {
return err
}
}
return nil
})
}
// Output pass prints a file.
type Output struct {
Writer io.WriteCloser
Printer printer.Printer
}
// Execute prints f with the configured Printer and writes output to Writer.
func (o *Output) Execute(f *ir.File) error {
b, err := o.Printer.Print(f)
if err != nil {
return err
}
if _, err = o.Writer.Write(b); err != nil {
return err
}
return o.Writer.Close()
}
golang-github-mmcloughlin-avo-0.5.0/pass/reg.go 0000664 0000000 0000000 00000014203 14370657153 0021427 0 ustar 00root root 0000000 0000000 package pass
import (
"errors"
"github.com/mmcloughlin/avo/gotypes"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
// ZeroExtend32BitOutputs applies the rule that "32-bit operands generate a
// 32-bit result, zero-extended to a 64-bit result in the destination
// general-purpose register" (Intel Software Developer’s Manual, Volume 1,
// 3.4.1.1).
func ZeroExtend32BitOutputs(i *ir.Instruction) error {
for j, op := range i.Outputs {
if !operand.IsR32(op) {
continue
}
r, ok := op.(reg.GP)
if !ok {
panic("r32 operand should satisfy reg.GP")
}
i.Outputs[j] = r.As64()
}
return nil
}
// Liveness computes register liveness.
func Liveness(fn *ir.Function) error {
// Note this implementation is initially naive so as to be "obviously correct".
// There are a well-known optimizations we can apply if necessary.
is := fn.Instructions()
// Process instructions in reverse: poor approximation to topological sort.
// TODO(mbm): process instructions in topological sort order
for l, r := 0, len(is)-1; l < r; l, r = l+1, r-1 {
is[l], is[r] = is[r], is[l]
}
// Initialize.
for _, i := range is {
i.LiveIn = reg.NewMaskSetFromRegisters(i.InputRegisters())
i.LiveOut = reg.NewEmptyMaskSet()
}
// Iterative dataflow analysis.
for {
changes := false
for _, i := range is {
// out[n] = UNION[s IN succ[n]] in[s]
for _, s := range i.Succ {
if s == nil {
continue
}
changes = i.LiveOut.Update(s.LiveIn) || changes
}
// in[n] = use[n] UNION (out[n] - def[n])
def := reg.NewMaskSetFromRegisters(i.OutputRegisters())
changes = i.LiveIn.Update(i.LiveOut.Difference(def)) || changes
}
if !changes {
break
}
}
return nil
}
// AllocateRegisters performs register allocation.
func AllocateRegisters(fn *ir.Function) error {
// Initialize one allocator per kind.
as := map[reg.Kind]*Allocator{}
for _, i := range fn.Instructions() {
for _, r := range i.Registers() {
k := r.Kind()
if _, found := as[k]; !found {
a, err := NewAllocatorForKind(k)
if err != nil {
return err
}
as[k] = a
}
}
}
// De-prioritize the base pointer register. This can be used as a general
// purpose register, but it's callee-save so needs to be saved/restored if
// it is clobbered. For this reason we prefer to avoid using it unless
// forced to by register pressure.
for k, a := range as {
f := reg.FamilyOfKind(k)
for _, r := range f.Registers() {
if (r.Info() & reg.BasePointer) != 0 {
// Negative priority penalizes this register relative to all
// others (having default zero priority).
a.SetPriority(r.ID(), -1)
}
}
}
// Populate registers to be allocated.
for _, i := range fn.Instructions() {
for _, r := range i.Registers() {
as[r.Kind()].Add(r.ID())
}
}
// Record register interferences.
for _, i := range fn.Instructions() {
for _, d := range i.OutputRegisters() {
k := d.Kind()
out := i.LiveOut.OfKind(k)
out.DiscardRegister(d)
as[k].AddInterferenceSet(d, out)
}
}
// Execute register allocation.
fn.Allocation = reg.NewEmptyAllocation()
for _, a := range as {
al, err := a.Allocate()
if err != nil {
return err
}
if err := fn.Allocation.Merge(al); err != nil {
return err
}
}
return nil
}
// BindRegisters applies the result of register allocation, replacing all virtual registers with their assigned physical registers.
func BindRegisters(fn *ir.Function) error {
for _, i := range fn.Instructions() {
for idx := range i.Operands {
i.Operands[idx] = operand.ApplyAllocation(i.Operands[idx], fn.Allocation)
}
for idx := range i.Inputs {
i.Inputs[idx] = operand.ApplyAllocation(i.Inputs[idx], fn.Allocation)
}
for idx := range i.Outputs {
i.Outputs[idx] = operand.ApplyAllocation(i.Outputs[idx], fn.Allocation)
}
}
return nil
}
// VerifyAllocation performs sanity checks following register allocation.
func VerifyAllocation(fn *ir.Function) error {
// All registers should be physical.
for _, i := range fn.Instructions() {
for _, r := range i.Registers() {
if reg.ToPhysical(r) == nil {
return errors.New("non physical register found")
}
}
}
return nil
}
// EnsureBasePointerCalleeSaved ensures that the base pointer register will be
// saved and restored if it has been clobbered by the function.
func EnsureBasePointerCalleeSaved(fn *ir.Function) error {
// Check to see if the base pointer is written to.
clobbered := false
for _, i := range fn.Instructions() {
for _, r := range i.OutputRegisters() {
if p := reg.ToPhysical(r); p != nil && (p.Info()®.BasePointer) != 0 {
clobbered = true
}
}
}
if !clobbered {
return nil
}
// This function clobbers the base pointer register so we need to ensure it
// will be saved and restored. The Go assembler will do this automatically,
// with a few exceptions detailed below. In summary, we can usually ensure
// this happens by ensuring the function is not frameless (apart from
// NOFRAME functions).
//
// Reference: https://github.com/golang/go/blob/3f4977bd5800beca059defb5de4dc64cd758cbb9/src/cmd/internal/obj/x86/obj6.go#L591-L609
//
// var bpsize int
// if ctxt.Arch.Family == sys.AMD64 &&
// !p.From.Sym.NoFrame() && // (1) below
// !(autoffset == 0 && p.From.Sym.NoSplit()) && // (2) below
// !(autoffset == 0 && !hasCall) { // (3) below
// // Make room to save a base pointer.
// // There are 2 cases we must avoid:
// // 1) If noframe is set (which we do for functions which tail call).
// // 2) Scary runtime internals which would be all messed up by frame pointers.
// // We detect these using a heuristic: frameless nosplit functions.
// // TODO: Maybe someday we label them all with NOFRAME and get rid of this heuristic.
// // For performance, we also want to avoid:
// // 3) Frameless leaf functions
// bpsize = ctxt.Arch.PtrSize
// autoffset += int32(bpsize)
// p.To.Offset += int64(bpsize)
// } else {
// bpsize = 0
// }
//
if fn.Attributes.NOFRAME() {
return errors.New("NOFRAME function clobbers base pointer register")
}
if fn.LocalSize == 0 {
fn.AllocLocal(int(gotypes.PointerSize))
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/pass/reg_test.go 0000664 0000000 0000000 00000011536 14370657153 0022474 0 ustar 00root root 0000000 0000000 package pass_test
import (
"testing"
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/pass"
"github.com/mmcloughlin/avo/reg"
)
func TestZeroExtend32BitOutputs(t *testing.T) {
collection := reg.NewCollection()
v16 := collection.GP16()
v32 := collection.GP32()
i := &ir.Instruction{
Outputs: []operand.Op{
reg.R8B,
reg.R9W,
reg.R10L,
reg.R11,
v16,
v32,
},
}
err := pass.ZeroExtend32BitOutputs(i)
if err != nil {
t.Fatal(err)
}
got := i.Outputs
expect := []reg.Register{
reg.R8B,
reg.R9W,
reg.R10, // converted from R10L
reg.R11,
v16,
v32.As64(), // converted from 32-bit
}
if len(expect) != len(got) {
t.Fatal("length mismatch")
}
for j := range got {
r, ok := got[j].(reg.Register)
if !ok {
t.Fatalf("expected register; got %s", got[j].Asm())
}
if !reg.Equal(expect[j], r) {
t.Fatalf("got %s; expect %s", expect[j].Asm(), r.Asm())
}
}
}
func TestLivenessBasic(t *testing.T) {
// Build: a = 1, b = 2, a = a+b
ctx := build.NewContext()
ctx.Function("add")
a := ctx.GP64()
b := ctx.GP64()
ctx.MOVQ(operand.U64(1), a)
ctx.MOVQ(operand.U64(2), b)
ctx.ADDQ(a, b)
AssertLiveness(t, ctx,
[][]reg.Register{
{},
{a},
{a, b},
},
[][]reg.Register{
{a},
{a, b},
{},
},
)
}
func AssertLiveness(t *testing.T, ctx *build.Context, in, out [][]reg.Register) {
t.Helper()
fn := ConstructLiveness(t, ctx)
is := fn.Instructions()
if len(in) != len(is) || len(out) != len(is) {
t.Fatalf("%d instructions: %d/%d in/out expectations", len(is), len(in), len(out))
}
for idx, i := range is {
AssertRegistersMatchSet(t, in[idx], i.LiveIn)
AssertRegistersMatchSet(t, out[idx], i.LiveOut)
}
}
func AssertRegistersMatchSet(t *testing.T, rs []reg.Register, s reg.MaskSet) {
t.Helper()
if !s.Equals(reg.NewMaskSetFromRegisters(rs)) {
t.Fatalf("register slice does not match set: %#v and %#v", rs, s)
}
}
func ConstructLiveness(t *testing.T, ctx *build.Context) *ir.Function {
t.Helper()
return BuildFunction(t, ctx, pass.LabelTarget, pass.CFG, pass.Liveness)
}
func TestAllocateRegistersBasePointerDeprioritized(t *testing.T) {
// Construct a function that requires n general-purpose registers all live
// at once. Choose n to be the maximal possible number of registers without
// touching the base pointer.
n := 14
ctx := build.NewContext()
ctx.Function("sum")
ctx.SignatureExpr("func() uint64")
x := make([]reg.GPVirtual, n)
for i := 0; i < n; i++ {
x[i] = ctx.GP64()
ctx.MOVQ(operand.U64(i), x[i])
}
for i := 1; i < n; i++ {
ctx.ADDQ(x[i], x[0])
}
ctx.Store(x[0], ctx.ReturnIndex(0))
ctx.RET()
// Build and compile the function up to register allocation.
fn := BuildFunction(t, ctx, pass.LabelTarget, pass.CFG, pass.Liveness, pass.AllocateRegisters, pass.BindRegisters)
// Verify this function uses n registers, but not the base pointer.
ps := map[reg.Physical]bool{}
for _, i := range fn.Instructions() {
for _, r := range i.OutputRegisters() {
ps[reg.ToPhysical(r)] = true
}
}
if len(ps) != n {
t.Fatalf("expected function to require %d registers", n)
}
for p := range ps {
if (p.Info() & reg.BasePointer) != 0 {
t.Fatal("base pointer used")
}
}
}
func TestEnsureBasePointerCalleeSavedFrameless(t *testing.T) {
// Construct a function that writes to the base pointer.
ctx := build.NewContext()
ctx.Function("clobber")
ctx.ADDQ(reg.RAX, reg.RBP)
// Build the function with the EnsureBasePointerCalleeSaved pass.
fn := BuildFunction(t, ctx, pass.EnsureBasePointerCalleeSaved)
// Since the function was frameless, expect that the pass would have
expect := 8
if fn.LocalSize != expect {
t.Fatalf("expected frame size %d; got %d", expect, fn.LocalSize)
}
}
func TestEnsureBasePointerCalleeSavedWithFrame(t *testing.T) {
// Construct a function that writes to the base pointer, but already has a
// stack frame.
expect := 64
ctx := build.NewContext()
ctx.Function("clobber")
ctx.AllocLocal(expect)
ctx.ADDQ(reg.RAX, reg.RBP)
// Build the function with the EnsureBasePointerCalleeSaved pass.
fn := BuildFunction(t, ctx, pass.EnsureBasePointerCalleeSaved)
// Expect that since the function already has a stack frame, there's no need to increase its size.
if fn.LocalSize != expect {
t.Fatalf("expected frame size %d; got %d", expect, fn.LocalSize)
}
}
func TestEnsureBasePointerCalleeSavedNOFRAME(t *testing.T) {
// Construct a NOFRAME function that writes to base pointer.
ctx := build.NewContext()
ctx.Function("clobber")
ctx.Attributes(attr.NOFRAME)
ctx.ADDQ(reg.RAX, reg.RBP)
// Build the function.
fn := BuildFunction(t, ctx)
// Expect the pass to fail due to NOFRAME exception.
if err := pass.EnsureBasePointerCalleeSaved(fn); err == nil {
t.Fatal("expected error from NOFRAME function that clobbers base pointer")
}
}
golang-github-mmcloughlin-avo-0.5.0/pass/textflag.go 0000664 0000000 0000000 00000001504 14370657153 0022470 0 ustar 00root root 0000000 0000000 package pass
import (
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/ir"
)
// IncludeTextFlagHeader includes textflag.h if necessary.
func IncludeTextFlagHeader(f *ir.File) error {
const textflagheader = "textflag.h"
// Check if we already have it.
for _, path := range f.Includes {
if path == textflagheader {
return nil
}
}
// Add it if necessary.
if requirestextflags(f) {
f.Includes = append(f.Includes, textflagheader)
}
return nil
}
// requirestextflags returns whether the file uses flags in the textflags.h header.
func requirestextflags(f *ir.File) bool {
for _, s := range f.Sections {
var a attr.Attribute
switch s := s.(type) {
case *ir.Function:
a = s.Attributes
case *ir.Global:
a = s.Attributes
}
if a.ContainsTextFlags() {
return true
}
}
return false
}
golang-github-mmcloughlin-avo-0.5.0/pass/util_test.go 0000664 0000000 0000000 00000001335 14370657153 0022670 0 ustar 00root root 0000000 0000000 package pass_test
import (
"testing"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/internal/test"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/pass"
)
// BuildFunction is a helper to compile a build context containing a single
// function and (optionally) apply a list of FunctionPasses to it.
func BuildFunction(t *testing.T, ctx *build.Context, passes ...pass.FunctionPass) *ir.Function {
t.Helper()
f, err := ctx.Result()
if err != nil {
build.LogError(test.Logger(t), err, 0)
t.FailNow()
}
fns := f.Functions()
if len(fns) != 1 {
t.Fatalf("expect 1 function")
}
fn := fns[0]
for _, p := range passes {
if err := p(fn); err != nil {
t.Fatal(err)
}
}
return fn
}
golang-github-mmcloughlin-avo-0.5.0/pass/verify.go 0000664 0000000 0000000 00000001170 14370657153 0022155 0 ustar 00root root 0000000 0000000 package pass
import (
"errors"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
// Verify pass validates an avo file.
var Verify = Concat(
InstructionPass(VerifyMemOperands),
)
// VerifyMemOperands checks the instruction's memory operands.
func VerifyMemOperands(i *ir.Instruction) error {
for _, op := range i.Operands {
m, ok := op.(operand.Mem)
if !ok {
continue
}
if m.Base == nil {
return errors.New("bad memory operand: missing base register")
}
if m.Index != nil && m.Scale == 0 {
return errors.New("bad memory operand: index register with scale 0")
}
}
return nil
}
golang-github-mmcloughlin-avo-0.5.0/pass/verify_test.go 0000664 0000000 0000000 00000002070 14370657153 0023214 0 ustar 00root root 0000000 0000000 package pass
import (
"strings"
"testing"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
func TestVerifyMemOperands(t *testing.T) {
i := &ir.Instruction{
Operands: []operand.Op{
reg.RAX,
operand.Mem{
Base: reg.R10,
Disp: 42,
},
},
}
if err := VerifyMemOperands(i); err != nil {
t.Fatal(err)
}
}
func TestVerifyMemOperandsErrors(t *testing.T) {
cases := []struct {
Operands []operand.Op
ErrorSubstring string
}{
{
Operands: []operand.Op{
reg.RAX,
operand.Mem{
Disp: 42,
},
},
ErrorSubstring: "missing base",
},
{
Operands: []operand.Op{
operand.Mem{
Base: reg.EBX,
Index: reg.R9L,
},
reg.ECX,
},
ErrorSubstring: "index register with scale 0",
},
}
for _, c := range cases {
i := &ir.Instruction{Operands: c.Operands}
if err := VerifyMemOperands(i); err == nil || !strings.Contains(err.Error(), c.ErrorSubstring) {
t.Errorf("got error %v; expected error to contain %q", err, c.ErrorSubstring)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/printer/ 0000775 0000000 0000000 00000000000 14370657153 0021040 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/printer/goasm.go 0000664 0000000 0000000 00000010152 14370657153 0022474 0 ustar 00root root 0000000 0000000 package printer
import (
"strconv"
"strings"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
// dot is the pesky unicode dot used in Go assembly.
const dot = "\u00b7"
type goasm struct {
cfg Config
prnt.Generator
instructions []*ir.Instruction
clear bool
}
// NewGoAsm constructs a printer for writing Go assembly files.
func NewGoAsm(cfg Config) Printer {
return &goasm{cfg: cfg}
}
func (p *goasm) Print(f *ir.File) ([]byte, error) {
p.header(f)
for _, s := range f.Sections {
switch s := s.(type) {
case *ir.Function:
p.function(s)
case *ir.Global:
p.global(s)
default:
panic("unknown section type")
}
}
return p.Result()
}
func (p *goasm) header(f *ir.File) {
p.Comment(p.cfg.GeneratedWarning())
if len(f.Constraints) > 0 {
constraints, err := buildtags.Format(f.Constraints)
if err != nil {
p.AddError(err)
}
p.NL()
p.Printf(constraints)
}
if len(f.Includes) > 0 {
p.NL()
p.includes(f.Includes)
}
}
func (p *goasm) includes(paths []string) {
for _, path := range paths {
p.Printf("#include \"%s\"\n", path)
}
}
func (p *goasm) function(f *ir.Function) {
p.NL()
p.Comment(f.Stub())
if len(f.ISA) > 0 {
p.Comment("Requires: " + strings.Join(f.ISA, ", "))
}
// Reference: https://github.com/golang/go/blob/b115207baf6c2decc3820ada4574ef4e5ad940ec/src/cmd/internal/obj/util.go#L166-L176
//
// if p.As == ATEXT {
// // If there are attributes, print them. Otherwise, skip the comma.
// // In short, print one of these two:
// // TEXT foo(SB), DUPOK|NOSPLIT, $0
// // TEXT foo(SB), $0
// s := p.From.Sym.Attribute.TextAttrString()
// if s != "" {
// fmt.Fprintf(&buf, "%s%s", sep, s)
// sep = ", "
// }
// }
//
p.Printf("TEXT %s%s(SB)", dot, f.Name)
if f.Attributes != 0 {
p.Printf(", %s", f.Attributes.Asm())
}
p.Printf(", %s\n", textsize(f))
p.clear = true
for _, node := range f.Nodes {
switch n := node.(type) {
case *ir.Instruction:
p.instruction(n)
if n.IsTerminal || n.IsUnconditionalBranch() {
p.flush()
}
case ir.Label:
p.flush()
p.ensureclear()
p.Printf("%s:\n", n)
case *ir.Comment:
p.flush()
p.ensureclear()
for _, line := range n.Lines {
p.Printf("\t// %s\n", line)
}
default:
panic("unexpected node type")
}
}
p.flush()
}
func (p *goasm) instruction(i *ir.Instruction) {
p.instructions = append(p.instructions, i)
p.clear = false
}
func (p *goasm) flush() {
if len(p.instructions) == 0 {
return
}
// Determine instruction width. Instructions with no operands are not
// considered in this calculation.
width := 0
for _, i := range p.instructions {
opcode := i.OpcodeWithSuffixes()
if len(i.Operands) > 0 && len(opcode) > width {
width = len(opcode)
}
}
// Output instruction block.
for _, i := range p.instructions {
if len(i.Operands) > 0 {
p.Printf("\t%-*s%s\n", width+1, i.OpcodeWithSuffixes(), joinOperands(i.Operands))
} else {
p.Printf("\t%s\n", i.OpcodeWithSuffixes())
}
}
p.instructions = nil
}
func (p *goasm) ensureclear() {
if !p.clear {
p.NL()
p.clear = true
}
}
func (p *goasm) global(g *ir.Global) {
p.NL()
for _, d := range g.Data {
a := operand.NewDataAddr(g.Symbol, d.Offset)
p.Printf("DATA %s/%d, %s\n", a.Asm(), d.Value.Bytes(), d.Value.Asm())
}
p.Printf("GLOBL %s(SB), %s, $%d\n", g.Symbol, g.Attributes.Asm(), g.Size)
}
func textsize(f *ir.Function) string {
// Reference: https://github.com/golang/go/blob/b115207baf6c2decc3820ada4574ef4e5ad940ec/src/cmd/internal/obj/util.go#L260-L265
//
// case TYPE_TEXTSIZE:
// if a.Val.(int32) == objabi.ArgsSizeUnknown {
// str = fmt.Sprintf("$%d", a.Offset)
// } else {
// str = fmt.Sprintf("$%d-%d", a.Offset, a.Val.(int32))
// }
//
s := "$" + strconv.Itoa(f.FrameBytes())
if argsize := f.ArgumentBytes(); argsize > 0 {
return s + "-" + strconv.Itoa(argsize)
}
return s
}
func joinOperands(operands []operand.Op) string {
asm := make([]string, len(operands))
for i, op := range operands {
asm[i] = op.Asm()
}
return strings.Join(asm, ", ")
}
golang-github-mmcloughlin-avo-0.5.0/printer/goasm_test.go 0000664 0000000 0000000 00000006275 14370657153 0023546 0 ustar 00root root 0000000 0000000 package printer_test
import (
"testing"
"github.com/mmcloughlin/avo/attr"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/printer"
"github.com/mmcloughlin/avo/reg"
)
func TestBasic(t *testing.T) {
ctx := build.NewContext()
ctx.Function("add")
ctx.SignatureExpr("func(x, y uint64) uint64")
x := ctx.Load(ctx.Param("x"), reg.RAX)
y := ctx.Load(ctx.Param("y"), reg.R9)
ctx.ADDQ(x, y)
ctx.Store(y, ctx.ReturnIndex(0))
ctx.RET()
AssertPrintsLines(t, ctx, printer.NewGoAsm, []string{
"// Code generated by avo. DO NOT EDIT.",
"",
"// func add(x uint64, y uint64) uint64",
"TEXT ·add(SB), $0-24",
"\tMOVQ x+0(FP), AX",
"\tMOVQ y+8(FP), R9",
"\tADDQ AX, R9",
"\tMOVQ R9, ret+16(FP)",
"\tRET",
"",
})
}
func TestTextDecl(t *testing.T) {
ctx := build.NewContext()
ctx.Function("noargs")
ctx.SignatureExpr("func()")
ctx.AllocLocal(16)
ctx.RET()
ctx.Function("withargs")
ctx.SignatureExpr("func(x, y uint64) uint64")
ctx.RET()
ctx.Function("withattr")
ctx.SignatureExpr("func()")
ctx.Attributes(attr.NOSPLIT | attr.TLSBSS)
ctx.RET()
AssertPrintsLines(t, ctx, printer.NewGoAsm, []string{
"// Code generated by avo. DO NOT EDIT.",
"",
"// func noargs()",
"TEXT ·noargs(SB), $16", // expect only the frame size
"\tRET",
"",
"// func withargs(x uint64, y uint64) uint64",
"TEXT ·withargs(SB), $0-24", // expect both frame size and argument size
"\tRET",
"",
"// func withattr()",
"TEXT ·withattr(SB), NOSPLIT|TLSBSS, $0", // expect to see attributes
"\tRET",
"",
})
}
func TestConstraints(t *testing.T) {
ctx := build.NewContext()
ctx.ConstraintExpr("linux,386 darwin,!cgo")
ctx.ConstraintExpr("!noasm")
expect := []string{
"// Code generated by avo. DO NOT EDIT.",
"",
}
if buildtags.GoBuildSyntaxSupported() {
expect = append(expect,
"//go:build ((linux && 386) || (darwin && !cgo)) && !noasm",
)
}
if buildtags.PlusBuildSyntaxSupported() {
expect = append(expect,
"// +build linux,386 darwin,!cgo",
"// +build !noasm",
)
}
expect = append(expect, "")
AssertPrintsLines(t, ctx, printer.NewGoAsm, expect)
}
func TestAlignmentNoOperands(t *testing.T) {
ctx := build.NewContext()
ctx.Function("alignment")
ctx.SignatureExpr("func()")
ctx.ADDQ(reg.RAX, reg.RBX)
ctx.VMOVDQU(reg.Y4, reg.Y11)
ctx.VZEROUPPER()
ctx.ADDQ(reg.R9, reg.R13)
ctx.RET()
AssertPrintsLines(t, ctx, printer.NewGoAsm, []string{
"// Code generated by avo. DO NOT EDIT.",
"",
"// func alignment()",
"TEXT ·alignment(SB), $0",
"\tADDQ AX, BX",
"\tVMOVDQU Y4, Y11",
"\tVZEROUPPER", // instruction with no alignment doesn't affect width
"\tADDQ R9, R13", // retains alignment from above
"\tRET",
"",
})
}
func TestOpcodeSuffixes(t *testing.T) {
ctx := build.NewContext()
ctx.Function("suffixes")
ctx.SignatureExpr("func()")
ctx.VADDPD_RD_SAE_Z(reg.Z1, reg.Z2, reg.K1, reg.Z3)
ctx.ADDQ(reg.RAX, reg.RBX)
AssertPrintsLines(t, ctx, printer.NewGoAsm, []string{
"// Code generated by avo. DO NOT EDIT.",
"",
"// func suffixes()",
"TEXT ·suffixes(SB), $0",
"\tVADDPD.RD_SAE.Z Z1, Z2, K1, Z3",
"\tADDQ AX, BX", // suffixes count towards alignment width
"",
})
}
golang-github-mmcloughlin-avo-0.5.0/printer/printer.go 0000664 0000000 0000000 00000004424 14370657153 0023056 0 ustar 00root root 0000000 0000000 // Package printer implements printing of avo files in various formats.
package printer
import (
"fmt"
"os"
"path/filepath"
"strings"
"github.com/mmcloughlin/avo/internal/stack"
"github.com/mmcloughlin/avo/ir"
)
// Printer can produce output for an avo File.
type Printer interface {
Print(*ir.File) ([]byte, error)
}
// Builder can construct a printer.
type Builder func(Config) Printer
// Config represents general printing configuration.
type Config struct {
// Command-line arguments passed to the generator. If provided, this will be
// included in a code generation warning.
Argv []string
// Name of the code generator.
Name string
// Name of Go package the generated code will belong to.
Pkg string
}
// NewDefaultConfig produces a config with Name "avo".
// The package name is guessed from the current directory.
func NewDefaultConfig() Config {
return Config{
Name: "avo",
Pkg: pkg(),
}
}
// NewArgvConfig constructs a Config from os.Args.
// The package name is guessed from the current directory.
func NewArgvConfig() Config {
return Config{
Argv: os.Args,
Pkg: pkg(),
}
}
// NewGoRunConfig produces a Config for a generator that's expected to be
// executed via "go run ...".
func NewGoRunConfig() Config {
path := mainfile()
if path == "" {
return NewDefaultConfig()
}
argv := []string{"go", "run", filepath.Base(path)}
if len(os.Args) > 1 {
argv = append(argv, os.Args[1:]...)
}
return Config{
Argv: argv,
Pkg: pkg(),
}
}
// GeneratedBy returns a description of the code generator.
func (c Config) GeneratedBy() string {
if c.Argv == nil {
return c.Name
}
return fmt.Sprintf("command: %s", strings.Join(c.Argv, " "))
}
// GeneratedWarning returns text for a code generation warning. Conforms to https://golang.org/s/generatedcode.
func (c Config) GeneratedWarning() string {
return fmt.Sprintf("Code generated by %s. DO NOT EDIT.", c.GeneratedBy())
}
// mainfile attempts to determine the file path of the main function by
// inspecting the stack. Returns empty string on failure.
func mainfile() string {
if m := stack.Main(); m != nil {
return m.File
}
return ""
}
// pkg guesses the name of the package from the working directory.
func pkg() string {
if cwd, err := os.Getwd(); err == nil {
return filepath.Base(cwd)
}
return ""
}
golang-github-mmcloughlin-avo-0.5.0/printer/printer_test.go 0000664 0000000 0000000 00000001035 14370657153 0024110 0 ustar 00root root 0000000 0000000 package printer_test
import (
"fmt"
"github.com/mmcloughlin/avo/printer"
)
func ExampleConfig_GeneratedBy() {
// Default configuration named "avo".
cfg := printer.NewDefaultConfig()
fmt.Println(cfg.GeneratedBy())
// Name can be customized.
cfg = printer.Config{
Name: "mildred",
}
fmt.Println(cfg.GeneratedBy())
// Argv takes precedence.
cfg = printer.Config{
Argv: []string{"echo", "hello", "world"},
Name: "mildred",
}
fmt.Println(cfg.GeneratedBy())
// Output:
// avo
// mildred
// command: echo hello world
}
golang-github-mmcloughlin-avo-0.5.0/printer/stubs.go 0000664 0000000 0000000 00000002300 14370657153 0022522 0 ustar 00root root 0000000 0000000 package printer
import (
"go/format"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/ir"
)
type stubs struct {
cfg Config
prnt.Generator
}
// NewStubs constructs a printer for writing stub function declarations.
func NewStubs(cfg Config) Printer {
return &stubs{cfg: cfg}
}
func (s *stubs) Print(f *ir.File) ([]byte, error) {
s.Comment(s.cfg.GeneratedWarning())
if len(f.Constraints) > 0 {
constraints, err := buildtags.Format(f.Constraints)
if err != nil {
s.AddError(err)
}
s.NL()
s.Printf(constraints)
}
s.NL()
s.Printf("package %s\n", s.cfg.Pkg)
for _, fn := range f.Functions() {
s.NL()
s.Comment(fn.Doc...)
for _, pragma := range fn.Pragmas {
s.pragma(pragma)
}
s.Printf("%s\n", fn.Stub())
}
// Apply formatting to the result. This is the simplest way to ensure
// comment formatting rules introduced in Go 1.19 are applied. See
// https://go.dev/doc/comment.
src, err := s.Result()
if err != nil {
return nil, err
}
return format.Source(src)
}
func (s *stubs) pragma(p ir.Pragma) {
s.Printf("//go:%s", p.Directive)
for _, arg := range p.Arguments {
s.Printf(" %s", arg)
}
s.NL()
}
golang-github-mmcloughlin-avo-0.5.0/printer/stubs_test.go 0000664 0000000 0000000 00000002277 14370657153 0023576 0 ustar 00root root 0000000 0000000 package printer_test
import (
"testing"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/printer"
)
func TestStubsPragmas(t *testing.T) {
ctx := build.NewContext()
ctx.Function("f")
ctx.Pragma("noescape")
ctx.Pragma("linkname f remote.f")
ctx.SignatureExpr("func(x *uint64)")
ctx.RET()
AssertPrintsLines(t, ctx, printer.NewStubs, []string{
"// Code generated by avo. DO NOT EDIT.",
"",
"package printer",
"",
"//go:noescape",
"//go:linkname f remote.f",
"func f(x *uint64)",
"",
})
}
func TestStubsConstraints(t *testing.T) {
ctx := build.NewContext()
ctx.ConstraintExpr("linux darwin")
ctx.ConstraintExpr("amd64 arm64 mips64x ppc64x")
expect := []string{
"// Code generated by avo. DO NOT EDIT.",
"",
}
if buildtags.GoBuildSyntaxSupported() {
expect = append(expect,
"//go:build (linux || darwin) && (amd64 || arm64 || mips64x || ppc64x)",
)
}
if buildtags.PlusBuildSyntaxSupported() {
expect = append(expect,
"// +build linux darwin",
"// +build amd64 arm64 mips64x ppc64x",
)
}
expect = append(expect,
"",
"package printer",
"",
)
AssertPrintsLines(t, ctx, printer.NewStubs, expect)
}
golang-github-mmcloughlin-avo-0.5.0/printer/util_test.go 0000664 0000000 0000000 00000001544 14370657153 0023407 0 ustar 00root root 0000000 0000000 package printer_test
import (
"strings"
"testing"
"github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/printer"
)
func AssertPrintsLines(t *testing.T, ctx *build.Context, pb printer.Builder, expect []string) {
t.Helper()
output := Print(t, ctx, pb)
lines := strings.Split(output, "\n")
if len(expect) != len(lines) {
t.Logf("output:\n%s", output)
t.Fatalf("have %d lines of output; expected %d", len(lines), len(expect))
}
for i := range expect {
if expect[i] != lines[i] {
t.Errorf("mismatch on line %d:\n\tgot\t%s\n\texpect\t%s\n", i, lines[i], expect[i])
}
}
}
func Print(t *testing.T, ctx *build.Context, pb printer.Builder) string {
t.Helper()
f, errs := ctx.Result()
if errs != nil {
t.Fatal(errs)
}
p := pb(printer.NewDefaultConfig())
b, err := p.Print(f)
if err != nil {
t.Fatal(err)
}
return string(b)
}
golang-github-mmcloughlin-avo-0.5.0/reg/ 0000775 0000000 0000000 00000000000 14370657153 0020132 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/reg/collection.go 0000664 0000000 0000000 00000004167 14370657153 0022624 0 ustar 00root root 0000000 0000000 package reg
// Collection represents a collection of virtual registers. This is primarily
// useful for allocating virtual registers with distinct IDs.
type Collection struct {
idx map[Kind]Index
}
// NewCollection builds an empty register collection.
func NewCollection() *Collection {
return &Collection{
idx: map[Kind]Index{},
}
}
// VirtualRegister allocates and returns a new virtual register of the given kind and width.
func (c *Collection) VirtualRegister(k Kind, s Spec) Virtual {
idx := c.idx[k]
c.idx[k]++
return NewVirtual(idx, k, s)
}
// GP8L allocates and returns a general-purpose 8-bit register (low byte).
func (c *Collection) GP8L() GPVirtual { return c.GP(S8L) }
// GP8H allocates and returns a general-purpose 8-bit register (high byte).
func (c *Collection) GP8H() GPVirtual { return c.GP(S8H) }
// GP8 allocates and returns a general-purpose 8-bit register (low byte).
func (c *Collection) GP8() GPVirtual { return c.GP8L() }
// GP16 allocates and returns a general-purpose 16-bit register.
func (c *Collection) GP16() GPVirtual { return c.GP(S16) }
// GP32 allocates and returns a general-purpose 32-bit register.
func (c *Collection) GP32() GPVirtual { return c.GP(S32) }
// GP64 allocates and returns a general-purpose 64-bit register.
func (c *Collection) GP64() GPVirtual { return c.GP(S64) }
// GP allocates and returns a general-purpose register of the given width.
func (c *Collection) GP(s Spec) GPVirtual { return newgpv(c.VirtualRegister(KindGP, s)) }
// XMM allocates and returns a 128-bit vector register.
func (c *Collection) XMM() VecVirtual { return c.Vec(S128) }
// YMM allocates and returns a 256-bit vector register.
func (c *Collection) YMM() VecVirtual { return c.Vec(S256) }
// ZMM allocates and returns a 512-bit vector register.
func (c *Collection) ZMM() VecVirtual { return c.Vec(S512) }
// Vec allocates and returns a vector register of the given width.
func (c *Collection) Vec(s Spec) VecVirtual { return newvecv(c.VirtualRegister(KindVector, s)) }
// K allocates and returns an opmask register.
func (c *Collection) K() OpmaskVirtual { return newopmaskv(c.VirtualRegister(KindOpmask, S64)) }
golang-github-mmcloughlin-avo-0.5.0/reg/doc.go 0000664 0000000 0000000 00000000173 14370657153 0021227 0 ustar 00root root 0000000 0000000 // Package reg provides types for physical and virtual registers, and definitions of x86-64 register families.
package reg
golang-github-mmcloughlin-avo-0.5.0/reg/reg_test.go 0000664 0000000 0000000 00000007123 14370657153 0022300 0 ustar 00root root 0000000 0000000 package reg
import (
"testing"
"testing/quick"
)
func TestIDFields(t *testing.T) {
f := func(v uint8, kind Kind, idx Index) bool {
id := newid(v, kind, idx)
return id.Kind() == kind && id.Index() == idx
}
if err := quick.Check(f, nil); err != nil {
t.Fatal(err)
}
}
func TestIDIsVirtual(t *testing.T) {
cases := []Virtual{
GeneralPurpose.Virtual(42, S64),
Vector.Virtual(42, S128),
Opmask.Virtual(42, S64),
}
for _, r := range cases {
if !r.ID().IsVirtual() {
t.FailNow()
}
}
}
func TestIDIsPhysical(t *testing.T) {
cases := []Physical{AL, AH, AX, EAX, RAX, X1, Y2, Z31, K1}
for _, r := range cases {
if !r.ID().IsPhysical() {
t.FailNow()
}
}
}
func TestSpecSize(t *testing.T) {
cases := []struct {
Spec Spec
Size uint
}{
{S0, 0},
{S8L, 1},
{S8H, 1},
{S16, 2},
{S32, 4},
{S64, 8},
{S128, 16},
{S256, 32},
{S512, 64},
}
for _, c := range cases {
if c.Spec.Size() != c.Size {
t.Errorf("%v.Size() = %d; expect = %d", c.Spec, c.Spec.Size(), c.Size)
}
}
}
func TestToVirtual(t *testing.T) {
v := GeneralPurpose.Virtual(42, S32)
if ToVirtual(v) != v {
t.Errorf("ToVirtual(v) != v for virtual register")
}
if ToVirtual(ECX) != nil {
t.Errorf("ToVirtual should be nil for physical registers")
}
}
func TestToPhysical(t *testing.T) {
v := GeneralPurpose.Virtual(42, S32)
if ToPhysical(v) != nil {
t.Errorf("ToPhysical should be nil for virtual registers")
}
if ToPhysical(ECX) != ECX {
t.Errorf("ToPhysical(p) != p for physical register")
}
}
func TestFamilyLookup(t *testing.T) {
cases := []struct {
Family *Family
ID Index
Spec Spec
Expect Physical
}{
{GeneralPurpose, 0, S8, AL},
{GeneralPurpose, 1, S8L, CL},
{GeneralPurpose, 2, S8H, DH},
{GeneralPurpose, 3, S16, BX},
{GeneralPurpose, 9, S32, R9L},
{GeneralPurpose, 13, S64, R13},
{GeneralPurpose, 13, S512, nil},
{GeneralPurpose, 133, S64, nil},
{Vector, 1, S128, X1},
{Vector, 13, S256, Y13},
{Vector, 27, S512, Z27},
{Vector, 1, S16, nil},
{Vector, 299, S256, nil},
{Opmask, 1, S64, K1},
{Opmask, 8, S64, nil},
{Opmask, 0, S64, K0},
}
for _, c := range cases {
got := c.Family.Lookup(c.ID, c.Spec)
if got != c.Expect {
t.Errorf("idx=%v spec=%v: lookup got %v expect %v", c.ID, c.Spec, got, c.Expect)
}
}
}
func TestPhysicalAs(t *testing.T) {
cases := []struct {
Register Physical
Spec Spec
Expect Physical
}{
{DX, S8L, DL},
{DX, S8H, DH},
{DX, S8, DL},
{DX, S16, DX},
{DX, S32, EDX},
{DX, S64, RDX},
{DX, S256, nil},
}
for _, c := range cases {
got := c.Register.as(c.Spec)
if got != c.Expect {
t.Errorf("%s.as(%v) = %v; expect %v", c.Register.Asm(), c.Spec, got, c.Expect)
}
}
}
func TestVirtualAs(t *testing.T) {
v := GeneralPurpose.Virtual(0, S64)
specs := []Spec{S8, S8L, S8H, S16, S32, S64}
for _, s := range specs {
if v.as(s).Mask() != s.Mask() {
t.FailNow()
}
}
}
func TestLookupPhysical(t *testing.T) {
cases := []struct {
Kind Kind
Index Index
Spec Spec
Expect Physical
}{
{KindGP, 0, S8L, AL},
{KindGP, 1, S8H, CH},
{KindGP, 7, S8, DIB},
{KindGP, 8, S16, R8W},
{KindGP, 9, S32, R9L},
{KindGP, 10, S64, R10},
{KindVector, 7, S128, X7},
{KindVector, 17, S256, Y17},
{KindVector, 27, S512, Z27},
{KindOpmask, 1, S64, K1},
}
for _, c := range cases {
if got := LookupPhysical(c.Kind, c.Index, c.Spec); !Equal(got, c.Expect) {
t.FailNow()
}
}
}
func TestLookupIDSelf(t *testing.T) {
cases := []Physical{AL, AH, AX, EAX, RAX, X1, Y2, Z31, K1}
for _, r := range cases {
if got := LookupID(r.ID(), r.spec()); !Equal(got, r) {
t.FailNow()
}
}
}
golang-github-mmcloughlin-avo-0.5.0/reg/set.go 0000664 0000000 0000000 00000005017 14370657153 0021257 0 ustar 00root root 0000000 0000000 package reg
// MaskSet maps register IDs to masks.
type MaskSet map[ID]uint16
// NewEmptyMaskSet builds an empty register mask set.
func NewEmptyMaskSet() MaskSet {
return MaskSet{}
}
// NewMaskSetFromRegisters forms a mask set from the given register list.
func NewMaskSetFromRegisters(rs []Register) MaskSet {
s := NewEmptyMaskSet()
for _, r := range rs {
s.AddRegister(r)
}
return s
}
// Clone returns a copy of s.
func (s MaskSet) Clone() MaskSet {
c := NewEmptyMaskSet()
for id, mask := range s {
c.Add(id, mask)
}
return c
}
// Add mask to the given register ID.
// Reports whether this made any change to the set.
func (s MaskSet) Add(id ID, mask uint16) bool {
if (s[id] & mask) == mask {
return false
}
s[id] |= mask
return true
}
// AddRegister is a convenience for adding the register's (ID, mask) to the set.
// Reports whether this made any change to the set.
func (s MaskSet) AddRegister(r Register) bool {
return s.Add(r.ID(), r.Mask())
}
// Discard clears masked bits from register ID.
// Reports whether this made any change to the set.
func (s MaskSet) Discard(id ID, mask uint16) bool {
if curr, found := s[id]; !found || (curr&mask) == 0 {
return false
}
s[id] &^= mask
if s[id] == 0 {
delete(s, id)
}
return true
}
// DiscardRegister is a convenience for discarding the register's (ID, mask) from the set.
// Reports whether this made any change to the set.
func (s MaskSet) DiscardRegister(r Register) bool {
return s.Discard(r.ID(), r.Mask())
}
// Update adds masks in t to s.
// Reports whether this made any change to the set.
func (s MaskSet) Update(t MaskSet) bool {
change := false
for id, mask := range t {
change = s.Add(id, mask) || change
}
return change
}
// Difference returns the set of registers in s but not t.
func (s MaskSet) Difference(t MaskSet) MaskSet {
d := s.Clone()
d.DifferenceUpdate(t)
return d
}
// DifferenceUpdate removes every element of t from s.
func (s MaskSet) DifferenceUpdate(t MaskSet) bool {
change := false
for id, mask := range t {
change = s.Discard(id, mask) || change
}
return change
}
// Equals returns true if s and t contain the same masks.
func (s MaskSet) Equals(t MaskSet) bool {
if len(s) != len(t) {
return false
}
for id, mask := range s {
if _, found := t[id]; !found || mask != t[id] {
return false
}
}
return true
}
// OfKind returns the set of elements of s with kind k.
func (s MaskSet) OfKind(k Kind) MaskSet {
t := NewEmptyMaskSet()
for id, mask := range s {
if id.Kind() == k {
t.Add(id, mask)
}
}
return t
}
golang-github-mmcloughlin-avo-0.5.0/reg/types.go 0000664 0000000 0000000 00000016062 14370657153 0021632 0 ustar 00root root 0000000 0000000 package reg
import (
"errors"
"fmt"
)
// Kind is a class of registers.
type Kind uint8
// Index of a register within a kind.
type Index uint16
// Family is a collection of Physical registers of a common kind.
type Family struct {
Kind Kind
registers []Physical
}
// define builds a register and adds it to the Family.
func (f *Family) define(s Spec, idx Index, name string, flags ...Info) Physical {
r := newregister(f, s, idx, name, flags...)
f.add(r)
return r
}
// add r to the family.
func (f *Family) add(r Physical) {
if r.Kind() != f.Kind {
panic("bad kind")
}
f.registers = append(f.registers, r)
}
// Virtual returns a virtual register from this family's kind.
func (f *Family) Virtual(idx Index, s Spec) Virtual {
return NewVirtual(idx, f.Kind, s)
}
// Registers returns the registers in this family.
func (f *Family) Registers() []Physical {
return append([]Physical(nil), f.registers...)
}
// Lookup returns the register with given physical index and spec. Returns nil if no such register exists.
func (f *Family) Lookup(idx Index, s Spec) Physical {
for _, r := range f.registers {
if r.PhysicalIndex() == idx && r.Mask() == s.Mask() {
return r
}
}
return nil
}
// ID is a register identifier.
type ID uint32
// newid builds a new register ID from the virtual flag v, kind and index.
func newid(v uint8, kind Kind, idx Index) ID {
return ID(v) | (ID(kind) << 8) | (ID(idx) << 16)
}
// IsVirtual reports whether this is an ID for a virtual register.
func (id ID) IsVirtual() bool { return (id & 1) == 1 }
// IsPhysical reports whether this is an ID for a physical register.
func (id ID) IsPhysical() bool { return !id.IsVirtual() }
// Kind extracts the kind from the register ID.
func (id ID) Kind() Kind { return Kind(id >> 8) }
// Index extracts the index from the register ID.
func (id ID) Index() Index { return Index(id >> 16) }
// Register represents a virtual or physical register.
type Register interface {
ID() ID
Kind() Kind
Size() uint
Mask() uint16
Asm() string
as(Spec) Register
spec() Spec
register()
}
// Equal reports whether a and b are equal registers.
func Equal(a, b Register) bool {
return (a.ID() == b.ID()) && (a.Mask() == b.Mask())
}
// Virtual is a register of a given type and size, not yet allocated to a physical register.
type Virtual interface {
VirtualIndex() Index
Register
}
// ToVirtual converts r to Virtual if possible, otherwise returns nil.
func ToVirtual(r Register) Virtual {
if v, ok := r.(Virtual); ok {
return v
}
return nil
}
type virtual struct {
idx Index
kind Kind
Spec
}
// NewVirtual builds a Virtual register.
func NewVirtual(idx Index, k Kind, s Spec) Virtual {
return virtual{
idx: idx,
kind: k,
Spec: s,
}
}
func (v virtual) ID() ID { return newid(1, v.kind, v.idx) }
func (v virtual) VirtualIndex() Index { return v.idx }
func (v virtual) Kind() Kind { return v.kind }
func (v virtual) Asm() string {
// TODO(mbm): decide on virtual register syntax
return fmt.Sprintf("", v.idx, v.Kind(), v.Size())
}
func (v virtual) as(s Spec) Register {
return virtual{
idx: v.idx,
kind: v.kind,
Spec: s,
}
}
func (v virtual) spec() Spec { return v.Spec }
func (v virtual) register() {}
// Info is a bitmask of register properties.
type Info uint8
// Defined register Info flags.
const (
None Info = 0
Restricted Info = 1 << iota
BasePointer
)
// Physical is a concrete register.
type Physical interface {
PhysicalIndex() Index
Info() Info
Register
}
// ToPhysical converts r to Physical if possible, otherwise returns nil.
func ToPhysical(r Register) Physical {
if p, ok := r.(Physical); ok {
return p
}
return nil
}
// register implements Physical.
type register struct {
family *Family
idx Index
name string
info Info
Spec
}
func newregister(f *Family, s Spec, idx Index, name string, flags ...Info) register {
r := register{
family: f,
idx: idx,
name: name,
info: None,
Spec: s,
}
for _, flag := range flags {
r.info |= flag
}
return r
}
func (r register) ID() ID { return newid(0, r.Kind(), r.idx) }
func (r register) PhysicalIndex() Index { return r.idx }
func (r register) Kind() Kind { return r.family.Kind }
func (r register) Asm() string { return r.name }
func (r register) Info() Info { return r.info }
func (r register) as(s Spec) Register {
return r.family.Lookup(r.PhysicalIndex(), s)
}
func (r register) spec() Spec { return r.Spec }
func (r register) register() {}
// Spec defines the size of a register as well as the bit ranges it occupies in
// an underlying physical register.
type Spec uint16
// Spec values required for x86-64.
const (
S0 Spec = 0x0 // zero value reserved for pseudo registers
S8L Spec = 0x1
S8H Spec = 0x2
S8 = S8L
S16 Spec = 0x3
S32 Spec = 0x7
S64 Spec = 0xf
S128 Spec = 0x1f
S256 Spec = 0x3f
S512 Spec = 0x7f
)
// Mask returns a mask representing which bytes of an underlying register are
// used by this register. This is almost always the low bytes, except for the
// case of the high-byte registers. If bit n of the mask is set, this means
// bytes 2^(n-1) to 2^n-1 are used.
func (s Spec) Mask() uint16 {
return uint16(s)
}
// Size returns the register width in bytes.
func (s Spec) Size() uint {
x := uint(s)
return (x >> 1) + (x & 1)
}
// LookupPhysical returns the physical register with the given parameters, or nil if not found.
func LookupPhysical(k Kind, idx Index, s Spec) Physical {
f := FamilyOfKind(k)
if f == nil {
return nil
}
return f.Lookup(idx, s)
}
// LookupID returns the physical register with the given id and spec, or nil if not found.
func LookupID(id ID, s Spec) Physical {
if id.IsVirtual() {
return nil
}
return LookupPhysical(id.Kind(), id.Index(), s)
}
// Allocation records a register allocation.
type Allocation map[ID]ID
// NewEmptyAllocation builds an empty register allocation.
func NewEmptyAllocation() Allocation {
return Allocation{}
}
// Merge allocations from b into a. Errors if there is disagreement on a common
// register.
func (a Allocation) Merge(b Allocation) error {
for id, p := range b {
if alt, found := a[id]; found && alt != p {
return errors.New("disagreement on overlapping register")
}
a[id] = p
}
return nil
}
// LookupDefault returns the register ID assigned by this allocation, returning
// id if none is found.
func (a Allocation) LookupDefault(id ID) ID {
if _, found := a[id]; found {
return a[id]
}
return id
}
// LookupRegister the allocation for register r, or return nil if there is none.
func (a Allocation) LookupRegister(r Register) Physical {
// Return immediately if it is already a physical register.
if p := ToPhysical(r); p != nil {
return p
}
// Lookup an allocation for this virtual ID.
id, found := a[r.ID()]
if !found {
return nil
}
return LookupID(id, r.spec())
}
// LookupRegisterDefault returns the register assigned to r, or r itself if there is none.
func (a Allocation) LookupRegisterDefault(r Register) Register {
if r == nil {
return nil
}
if p := a.LookupRegister(r); p != nil {
return p
}
return r
}
golang-github-mmcloughlin-avo-0.5.0/reg/x86.go 0000664 0000000 0000000 00000022450 14370657153 0021111 0 ustar 00root root 0000000 0000000 package reg
// Register kinds.
const (
KindPseudo Kind = iota
KindGP
KindVector
KindOpmask
)
// Declare register families.
var (
Pseudo = &Family{Kind: KindPseudo}
GeneralPurpose = &Family{Kind: KindGP}
Vector = &Family{Kind: KindVector}
Opmask = &Family{Kind: KindOpmask}
Families = []*Family{
Pseudo,
GeneralPurpose,
Vector,
Opmask,
}
)
var familiesByKind = map[Kind]*Family{}
func init() {
for _, f := range Families {
familiesByKind[f.Kind] = f
}
}
// FamilyOfKind returns the Family of registers of the given kind, or nil if not found.
func FamilyOfKind(k Kind) *Family {
return familiesByKind[k]
}
// Pseudo registers.
var (
FramePointer = Pseudo.define(S0, 0, "FP")
ProgramCounter = Pseudo.define(S0, 0, "PC")
StaticBase = Pseudo.define(S0, 0, "SB")
StackPointer = Pseudo.define(S0, 0, "SP")
)
// GP provides additional methods for general purpose registers.
type GP interface {
As8() Register
As8L() Register
As8H() Register
As16() Register
As32() Register
As64() Register
}
// GPPhysical is a general-purpose physical register.
type GPPhysical interface {
Physical
GP
}
type gpp struct {
Physical
}
func newgpp(r Physical) GPPhysical { return gpp{Physical: r} }
func (p gpp) As8() Register { return newgpp(p.as(S8).(Physical)) }
func (p gpp) As8L() Register { return newgpp(p.as(S8L).(Physical)) }
func (p gpp) As8H() Register { return newgpp(p.as(S8H).(Physical)) }
func (p gpp) As16() Register { return newgpp(p.as(S16).(Physical)) }
func (p gpp) As32() Register { return newgpp(p.as(S32).(Physical)) }
func (p gpp) As64() Register { return newgpp(p.as(S64).(Physical)) }
// GPVirtual is a general-purpose virtual register.
type GPVirtual interface {
Virtual
GP
}
type gpv struct {
Virtual
}
func newgpv(v Virtual) GPVirtual { return gpv{Virtual: v} }
func (v gpv) As8() Register { return newgpv(v.as(S8).(Virtual)) }
func (v gpv) As8L() Register { return newgpv(v.as(S8L).(Virtual)) }
func (v gpv) As8H() Register { return newgpv(v.as(S8H).(Virtual)) }
func (v gpv) As16() Register { return newgpv(v.as(S16).(Virtual)) }
func (v gpv) As32() Register { return newgpv(v.as(S32).(Virtual)) }
func (v gpv) As64() Register { return newgpv(v.as(S64).(Virtual)) }
func gp(s Spec, id Index, name string, flags ...Info) GPPhysical {
r := newgpp(newregister(GeneralPurpose, s, id, name, flags...))
GeneralPurpose.add(r)
return r
}
// General purpose registers.
var (
// Low byte.
AL = gp(S8L, 0, "AL")
CL = gp(S8L, 1, "CL")
DL = gp(S8L, 2, "DL")
BL = gp(S8L, 3, "BL")
// High byte.
AH = gp(S8H, 0, "AH")
CH = gp(S8H, 1, "CH")
DH = gp(S8H, 2, "DH")
BH = gp(S8H, 3, "BH")
// 8-bit.
SPB = gp(S8, 4, "SP", Restricted)
BPB = gp(S8, 5, "BP", BasePointer)
SIB = gp(S8, 6, "SI")
DIB = gp(S8, 7, "DI")
R8B = gp(S8, 8, "R8")
R9B = gp(S8, 9, "R9")
R10B = gp(S8, 10, "R10")
R11B = gp(S8, 11, "R11")
R12B = gp(S8, 12, "R12")
R13B = gp(S8, 13, "R13")
R14B = gp(S8, 14, "R14")
R15B = gp(S8, 15, "R15")
// 16-bit.
AX = gp(S16, 0, "AX")
CX = gp(S16, 1, "CX")
DX = gp(S16, 2, "DX")
BX = gp(S16, 3, "BX")
SP = gp(S16, 4, "SP", Restricted)
BP = gp(S16, 5, "BP", BasePointer)
SI = gp(S16, 6, "SI")
DI = gp(S16, 7, "DI")
R8W = gp(S16, 8, "R8")
R9W = gp(S16, 9, "R9")
R10W = gp(S16, 10, "R10")
R11W = gp(S16, 11, "R11")
R12W = gp(S16, 12, "R12")
R13W = gp(S16, 13, "R13")
R14W = gp(S16, 14, "R14")
R15W = gp(S16, 15, "R15")
// 32-bit.
EAX = gp(S32, 0, "AX")
ECX = gp(S32, 1, "CX")
EDX = gp(S32, 2, "DX")
EBX = gp(S32, 3, "BX")
ESP = gp(S32, 4, "SP", Restricted)
EBP = gp(S32, 5, "BP", BasePointer)
ESI = gp(S32, 6, "SI")
EDI = gp(S32, 7, "DI")
R8L = gp(S32, 8, "R8")
R9L = gp(S32, 9, "R9")
R10L = gp(S32, 10, "R10")
R11L = gp(S32, 11, "R11")
R12L = gp(S32, 12, "R12")
R13L = gp(S32, 13, "R13")
R14L = gp(S32, 14, "R14")
R15L = gp(S32, 15, "R15")
// 64-bit.
RAX = gp(S64, 0, "AX")
RCX = gp(S64, 1, "CX")
RDX = gp(S64, 2, "DX")
RBX = gp(S64, 3, "BX")
RSP = gp(S64, 4, "SP", Restricted)
RBP = gp(S64, 5, "BP", BasePointer)
RSI = gp(S64, 6, "SI")
RDI = gp(S64, 7, "DI")
R8 = gp(S64, 8, "R8")
R9 = gp(S64, 9, "R9")
R10 = gp(S64, 10, "R10")
R11 = gp(S64, 11, "R11")
R12 = gp(S64, 12, "R12")
R13 = gp(S64, 13, "R13")
R14 = gp(S64, 14, "R14")
R15 = gp(S64, 15, "R15")
)
// Vec provides methods for vector registers.
type Vec interface {
AsX() Register
AsY() Register
AsZ() Register
}
// VecPhysical is a physical vector register.
type VecPhysical interface {
Physical
Vec
}
type vecp struct {
Physical
Vec
}
func newvecp(r Physical) VecPhysical { return vecp{Physical: r} }
func (p vecp) AsX() Register { return newvecp(p.as(S128).(Physical)) }
func (p vecp) AsY() Register { return newvecp(p.as(S256).(Physical)) }
func (p vecp) AsZ() Register { return newvecp(p.as(S512).(Physical)) }
// VecVirtual is a virtual vector register.
type VecVirtual interface {
Virtual
Vec
}
type vecv struct {
Virtual
Vec
}
func newvecv(v Virtual) VecVirtual { return vecv{Virtual: v} }
func (v vecv) AsX() Register { return newvecv(v.as(S128).(Virtual)) }
func (v vecv) AsY() Register { return newvecv(v.as(S256).(Virtual)) }
func (v vecv) AsZ() Register { return newvecv(v.as(S512).(Virtual)) }
func vec(s Spec, id Index, name string, flags ...Info) VecPhysical {
r := newvecp(newregister(Vector, s, id, name, flags...))
Vector.add(r)
return r
}
// Vector registers.
var (
// 128-bit.
X0 = vec(S128, 0, "X0")
X1 = vec(S128, 1, "X1")
X2 = vec(S128, 2, "X2")
X3 = vec(S128, 3, "X3")
X4 = vec(S128, 4, "X4")
X5 = vec(S128, 5, "X5")
X6 = vec(S128, 6, "X6")
X7 = vec(S128, 7, "X7")
X8 = vec(S128, 8, "X8")
X9 = vec(S128, 9, "X9")
X10 = vec(S128, 10, "X10")
X11 = vec(S128, 11, "X11")
X12 = vec(S128, 12, "X12")
X13 = vec(S128, 13, "X13")
X14 = vec(S128, 14, "X14")
X15 = vec(S128, 15, "X15")
X16 = vec(S128, 16, "X16")
X17 = vec(S128, 17, "X17")
X18 = vec(S128, 18, "X18")
X19 = vec(S128, 19, "X19")
X20 = vec(S128, 20, "X20")
X21 = vec(S128, 21, "X21")
X22 = vec(S128, 22, "X22")
X23 = vec(S128, 23, "X23")
X24 = vec(S128, 24, "X24")
X25 = vec(S128, 25, "X25")
X26 = vec(S128, 26, "X26")
X27 = vec(S128, 27, "X27")
X28 = vec(S128, 28, "X28")
X29 = vec(S128, 29, "X29")
X30 = vec(S128, 30, "X30")
X31 = vec(S128, 31, "X31")
// 256-bit.
Y0 = vec(S256, 0, "Y0")
Y1 = vec(S256, 1, "Y1")
Y2 = vec(S256, 2, "Y2")
Y3 = vec(S256, 3, "Y3")
Y4 = vec(S256, 4, "Y4")
Y5 = vec(S256, 5, "Y5")
Y6 = vec(S256, 6, "Y6")
Y7 = vec(S256, 7, "Y7")
Y8 = vec(S256, 8, "Y8")
Y9 = vec(S256, 9, "Y9")
Y10 = vec(S256, 10, "Y10")
Y11 = vec(S256, 11, "Y11")
Y12 = vec(S256, 12, "Y12")
Y13 = vec(S256, 13, "Y13")
Y14 = vec(S256, 14, "Y14")
Y15 = vec(S256, 15, "Y15")
Y16 = vec(S256, 16, "Y16")
Y17 = vec(S256, 17, "Y17")
Y18 = vec(S256, 18, "Y18")
Y19 = vec(S256, 19, "Y19")
Y20 = vec(S256, 20, "Y20")
Y21 = vec(S256, 21, "Y21")
Y22 = vec(S256, 22, "Y22")
Y23 = vec(S256, 23, "Y23")
Y24 = vec(S256, 24, "Y24")
Y25 = vec(S256, 25, "Y25")
Y26 = vec(S256, 26, "Y26")
Y27 = vec(S256, 27, "Y27")
Y28 = vec(S256, 28, "Y28")
Y29 = vec(S256, 29, "Y29")
Y30 = vec(S256, 30, "Y30")
Y31 = vec(S256, 31, "Y31")
// 512-bit.
Z0 = vec(S512, 0, "Z0")
Z1 = vec(S512, 1, "Z1")
Z2 = vec(S512, 2, "Z2")
Z3 = vec(S512, 3, "Z3")
Z4 = vec(S512, 4, "Z4")
Z5 = vec(S512, 5, "Z5")
Z6 = vec(S512, 6, "Z6")
Z7 = vec(S512, 7, "Z7")
Z8 = vec(S512, 8, "Z8")
Z9 = vec(S512, 9, "Z9")
Z10 = vec(S512, 10, "Z10")
Z11 = vec(S512, 11, "Z11")
Z12 = vec(S512, 12, "Z12")
Z13 = vec(S512, 13, "Z13")
Z14 = vec(S512, 14, "Z14")
Z15 = vec(S512, 15, "Z15")
Z16 = vec(S512, 16, "Z16")
Z17 = vec(S512, 17, "Z17")
Z18 = vec(S512, 18, "Z18")
Z19 = vec(S512, 19, "Z19")
Z20 = vec(S512, 20, "Z20")
Z21 = vec(S512, 21, "Z21")
Z22 = vec(S512, 22, "Z22")
Z23 = vec(S512, 23, "Z23")
Z24 = vec(S512, 24, "Z24")
Z25 = vec(S512, 25, "Z25")
Z26 = vec(S512, 26, "Z26")
Z27 = vec(S512, 27, "Z27")
Z28 = vec(S512, 28, "Z28")
Z29 = vec(S512, 29, "Z29")
Z30 = vec(S512, 30, "Z30")
Z31 = vec(S512, 31, "Z31")
)
// OpmaskPhysical is a opmask physical register.
type OpmaskPhysical interface {
Physical
}
type opmaskp struct {
Physical
}
func newopmaskp(r Physical) OpmaskPhysical { return opmaskp{Physical: r} }
// OpmaskVirtual is a virtual opmask register.
type OpmaskVirtual interface {
Virtual
}
type opmaskv struct {
Virtual
}
func newopmaskv(v Virtual) OpmaskVirtual { return opmaskv{Virtual: v} }
func opmask(s Spec, id Index, name string, flags ...Info) OpmaskPhysical {
r := newopmaskp(newregister(Opmask, s, id, name, flags...))
Opmask.add(r)
return r
}
// Opmask registers.
//
// Note that while K0 is a physical opmask register (it is a valid opmask source
// and destination operand), it cannot be used as an opmask predicate value
// because in that context K0 means "all true" or "no mask" regardless of the
// actual contents of the physical register. For that reason, K0 should never be
// assigned as a "general purpose" opmask register. However, it can be
// explicitly operated upon by name as non-predicate operand, for example to
// hold a constant or temporary value during calculations on other opmask
// registers.
var (
K0 = opmask(S64, 0, "K0", Restricted)
K1 = opmask(S64, 1, "K1")
K2 = opmask(S64, 2, "K2")
K3 = opmask(S64, 3, "K3")
K4 = opmask(S64, 4, "K4")
K5 = opmask(S64, 5, "K5")
K6 = opmask(S64, 6, "K6")
K7 = opmask(S64, 7, "K7")
)
golang-github-mmcloughlin-avo-0.5.0/reg/x86_test.go 0000664 0000000 0000000 00000002760 14370657153 0022152 0 ustar 00root root 0000000 0000000 package reg
import "testing"
func TestAsMethods(t *testing.T) {
cases := [][2]Register{
{RAX.As8(), AL},
{ECX.As8L(), CL},
{EBX.As8H(), BH},
{R9B.As16(), R9W},
{DH.As32(), EDX},
{R14L.As64(), R14},
{X2.AsX(), X2},
{X4.AsY(), Y4},
{X9.AsZ(), Z9},
{Y2.AsX(), X2},
{Y4.AsY(), Y4},
{Y9.AsZ(), Z9},
{Z2.AsX(), X2},
{Z4.AsY(), Y4},
{Z9.AsZ(), Z9},
}
for _, c := range cases {
if !Equal(c[0], c[1]) {
t.FailNow()
}
}
}
func TestAsPreservesGPPhysical(t *testing.T) {
cases := []Register{
RAX.As8(),
R13.As8L(),
AL.As8H(),
EAX.As16(),
CH.As32(),
EBX.As64(),
}
for _, r := range cases {
if _, ok := r.(GPPhysical); !ok {
t.FailNow()
}
}
}
func TestAsPreservesGPVirtual(t *testing.T) {
collection := NewCollection()
cases := []Register{
collection.GP16().As8(),
collection.GP32().As8L(),
collection.GP64().As8H(),
collection.GP8().As16(),
collection.GP8L().As32(),
collection.GP8H().As64(),
}
for _, r := range cases {
if _, ok := r.(GPVirtual); !ok {
t.FailNow()
}
}
}
func TestAsPreservesVecPhysical(t *testing.T) {
cases := []Register{
Y13.AsX(),
X3.AsY(),
Y10.AsZ(),
}
for _, r := range cases {
if _, ok := r.(VecPhysical); !ok {
t.FailNow()
}
}
}
func TestAsPreservesVecVirtual(t *testing.T) {
collection := NewCollection()
cases := []Register{
collection.ZMM().AsX(),
collection.XMM().AsY(),
collection.YMM().AsZ(),
}
for _, r := range cases {
if _, ok := r.(VecVirtual); !ok {
t.FailNow()
}
}
}
golang-github-mmcloughlin-avo-0.5.0/script/ 0000775 0000000 0000000 00000000000 14370657153 0020661 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/script/bootstrap 0000775 0000000 0000000 00000001662 14370657153 0022631 0 ustar 00root root 0000000 0000000 #!/bin/bash -ex
# Standalone version of the assembly checks in go vet.
go install ./internal/cmd/asmvet
# golangci-lint for linting
golangci_lint_version='v1.49.0'
golangci_install_script="https://raw.githubusercontent.com/golangci/golangci-lint/${golangci_lint_version}/install.sh"
curl -sfL "${golangci_install_script}" | sh -s -- -b "$GOPATH/bin" "${golangci_lint_version}"
# embedmd required for documentation generation
go install github.com/campoy/embedmd@v1.0.0
# covertool for merging coverage reports
go install github.com/dlespiau/covertool@v0.0.0-20180314162135-b0c4c6d0583a
# asmfmt for enforcing assembly style
go install github.com/klauspost/asmfmt/cmd/asmfmt@v1.3.2
# goimports for import grouping.
go install golang.org/x/tools/cmd/goimports@v0.1.10
# gofumpt for stricter formatting.
go install mvdan.cc/gofumpt@v0.3.1
# yamlfmt for yaml formatting.
go install github.com/gechr/yamlfmt@v0.0.0-20220216093356-e9288cd48d12
golang-github-mmcloughlin-avo-0.5.0/script/coverage 0000775 0000000 0000000 00000001134 14370657153 0022401 0 ustar 00root root 0000000 0000000 #!/bin/bash -ex
ext=".coverprofile"
# Clean existing coverage files.
find . -name '*'${ext} | xargs rm -f
# Unit test coverage.
go test -covermode=count -coverprofile=unittests${ext} ./...
# Integration test coverage.
coverprofiles=()
for main in $(find . -name 'asm.go'); do
dir=$(dirname ${main})
name=$(basename ${dir})
coverprofile="${dir}/${name}${ext}"
./script/covermain ${main} ${coverprofile} > /dev/null
coverprofiles+=(${coverprofile})
done
covertool merge --output integration${ext} ${coverprofiles[@]}
# Merge.
covertool merge --output all${ext} unittests${ext} integration${ext}
golang-github-mmcloughlin-avo-0.5.0/script/covermain 0000775 0000000 0000000 00000001117 14370657153 0022572 0 ustar 00root root 0000000 0000000 #!/bin/bash -e
main=$1
coverprofile=$2
# Temporary working directory.
workdir=$(mktemp -d tmpXXXXXXXX)
# Wrap the main function in a go test.
cp ${main} ${workdir}
cat > ${workdir}/main_test.go < ${include}/go_asm.h
# Preprocess all assembly files.
asm=${workdir}/all.s
find ${GOROOT}/src -name '*_amd64.s' | grep -v testdata | while read s; do
gcc -E -I${GOROOT}/pkg/include -I${include} ${s} >>${asm}
done
# Extract instructions.
awk '/^[[:space:]]+[A-Z0-9]+[[:space:]]+/ { print $1 }' ${asm} | \
sort | uniq | \
grep -Ev '(TEXT|FUNCDATA|PCDATA|BYTE|WORD)'
# Clean.
rm -rf ${workdir}
golang-github-mmcloughlin-avo-0.5.0/src/ 0000775 0000000 0000000 00000000000 14370657153 0020144 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/src/src.go 0000664 0000000 0000000 00000002634 14370657153 0021267 0 ustar 00root root 0000000 0000000 // Package src provides types for working with source files.
package src
import (
"os"
"path/filepath"
"runtime"
"strconv"
)
// Position represents a position in a source file.
type Position struct {
Filename string
Line int // 1-up
}
// FramePosition returns the Position of the given stack frame.
func FramePosition(f runtime.Frame) Position {
return Position{
Filename: f.File,
Line: f.Line,
}
}
// IsValid reports whether the position is valid: Line must be positive, but
// Filename may be empty.
func (p Position) IsValid() bool {
return p.Line > 0
}
// String represents Position as a string.
func (p Position) String() string {
if !p.IsValid() {
return "-"
}
var s string
if p.Filename != "" {
s += p.Filename + ":"
}
s += strconv.Itoa(p.Line)
return s
}
// Rel returns Position relative to basepath. If the given filename cannot be
// expressed relative to basepath the position will be returned unchanged.
func (p Position) Rel(basepath string) Position {
q := p
if rel, err := filepath.Rel(basepath, q.Filename); err == nil {
q.Filename = rel
}
return q
}
// Relwd returns Position relative to the current working directory. Returns p
// unchanged if the working directory cannot be determined, or the filename
// cannot be expressed relative to the working directory.
func (p Position) Relwd() Position {
if wd, err := os.Getwd(); err == nil {
return p.Rel(wd)
}
return p
}
golang-github-mmcloughlin-avo-0.5.0/src/src_test.go 0000664 0000000 0000000 00000000746 14370657153 0022330 0 ustar 00root root 0000000 0000000 package src_test
import (
"fmt"
"github.com/mmcloughlin/avo/src"
)
func ExamplePosition_IsValid() {
fmt.Println(src.Position{"a.go", 42}.IsValid())
fmt.Println(src.Position{"", 42}.IsValid())
fmt.Println(src.Position{"a.go", -1}.IsValid())
// Output:
// true
// true
// false
}
func ExamplePosition_String() {
fmt.Println(src.Position{"a.go", 42})
fmt.Println(src.Position{"", 42})
fmt.Println(src.Position{"a.go", -1}) // invalid
// Output:
// a.go:42
// 42
// -
}
golang-github-mmcloughlin-avo-0.5.0/tests/ 0000775 0000000 0000000 00000000000 14370657153 0020517 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/README.md 0000664 0000000 0000000 00000000050 14370657153 0021771 0 ustar 00root root 0000000 0000000 # tests
System-level testing of `avo`.
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/ 0000775 0000000 0000000 00000000000 14370657153 0021611 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/ 0000775 0000000 0000000 00000000000 14370657153 0022307 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/asm.go 0000664 0000000 0000000 00000001553 14370657153 0023422 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"strconv"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
// n is the number of 8-bit registers to use.
// 15 low-byte registers (excluding SP)
// 4 high-byte registers AH,BH,CH,DH
const n = 19
TEXT("GP8", NOSPLIT, "func() uint8")
Doc("GP8 returns the sum 1+2+...+" + strconv.Itoa(n) + " using " + strconv.Itoa(n) + " distinct 8-bit registers.")
// Allocate registers and initialize.
x := make([]Register, n)
i := 0
// Low byte registers.
for ; i < 15; i++ {
x[i] = GP8L()
MOVB(U8(i+1), x[i])
}
// High byte registers.
for ; i < n; i++ {
x[i] = GP8H()
MOVB(U8(i+1), x[i])
}
// Sum them up.
for i := 1; i < n; i++ {
ADDB(x[i], x[0])
}
// Return.
Store(x[0], ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/doc.go 0000664 0000000 0000000 00000000146 14370657153 0023404 0 ustar 00root root 0000000 0000000 // Package gp8 tests the register allocator by using as many 8-bit registers as possible.
package gp8
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/gp8.s 0000664 0000000 0000000 00000001335 14370657153 0023173 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out gp8.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func GP8() uint8
TEXT ·GP8(SB), NOSPLIT, $8-1
MOVB $0x01, AL
MOVB $0x02, CL
MOVB $0x03, DL
MOVB $0x04, BL
MOVB $0x05, SI
MOVB $0x06, DI
MOVB $0x07, R8
MOVB $0x08, R9
MOVB $0x09, R10
MOVB $0x0a, R11
MOVB $0x0b, R12
MOVB $0x0c, R13
MOVB $0x0d, R14
MOVB $0x0e, R15
MOVB $0x0f, BP
MOVB $0x10, AH
MOVB $0x11, CH
MOVB $0x12, DH
MOVB $0x13, BH
ADDB CL, AL
ADDB DL, AL
ADDB BL, AL
ADDB SI, AL
ADDB DI, AL
ADDB R8, AL
ADDB R9, AL
ADDB R10, AL
ADDB R11, AL
ADDB R12, AL
ADDB R13, AL
ADDB R14, AL
ADDB R15, AL
ADDB BP, AL
ADDB AH, AL
ADDB CH, AL
ADDB DH, AL
ADDB BH, AL
MOVB AL, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/gp8_test.go 0000664 0000000 0000000 00000000400 14370657153 0024365 0 ustar 00root root 0000000 0000000 package gp8
import (
"testing"
)
//go:generate go run asm.go -out gp8.s -stubs stub.go
func TestGP8(t *testing.T) {
const n = 19
expect := uint8(n * (n + 1) / 2)
if got := GP8(); got != expect {
t.Fatalf("GP8() = %d; expect %d", got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/gp8/stub.go 0000664 0000000 0000000 00000000270 14370657153 0023612 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out gp8.s -stubs stub.go. DO NOT EDIT.
package gp8
// GP8 returns the sum 1+2+...+19 using 19 distinct 8-bit registers.
func GP8() uint8
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/ 0000775 0000000 0000000 00000000000 14370657153 0022727 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/asm.go 0000664 0000000 0000000 00000003375 14370657153 0024046 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"strconv"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
// The goal of this test is to create a synthetic scenario in which register
// allocation would fail if register liveness and allocation passes didn't take
// masks into account.
//
// The idea is to create a set of 15 64-bit virtual registers (15 being total
// number of allocatable 64-bit general purpose registers). For each one: write
// to the whole register and then later write to only the low 16 bits, and
// finally consume the whole 64-bit register. This means there is an interval in
// which only the high 48-bits are live. During this interval we should be able
// to allocate and use a set of 15 16-bit virtual registers.
func main() {
const n = 15
TEXT("Masks", NOSPLIT, "func() (uint16, uint64)")
Doc("Masks computes the sum 1+2+...+" + strconv.Itoa(n) + " in two ways.")
// Step 1: Allocate n 64-bit registers A that we will arrange to live in their top 48 bits.
A := make([]GPVirtual, n)
for i := 0; i < n; i++ {
A[i] = GP64()
c := ((i + 1) << 16) | 42 // 42 in low bits will be cleared later
MOVQ(U32(c), A[i])
}
// Step 3: Allocate n 16-bit registers B.
B := make([]Register, n)
for i := 0; i < n; i++ {
B[i] = GP16()
MOVW(U16(i+1), B[i])
}
// Step 3: Sum up all the B registers and return.
for i := 1; i < n; i++ {
ADDW(B[i], B[0])
}
Store(B[0], ReturnIndex(0))
// Step 4: Clear the low 16-bits of the A registers.
for i := 0; i < n; i++ {
MOVW(U16(0), A[i].As16())
}
// Step 5: Sum up all the A registers and return.
for i := 1; i < n; i++ {
ADDQ(A[i], A[0])
}
SHRQ(U8(16), A[0])
Store(A[0], ReturnIndex(1))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/doc.go 0000664 0000000 0000000 00000000152 14370657153 0024021 0 ustar 00root root 0000000 0000000 // Package masks tests that register liveness and allocation passes handle masks correctly.
package masks
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/masks.s 0000664 0000000 0000000 00000002736 14370657153 0024241 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out masks.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Masks() (uint16, uint64)
TEXT ·Masks(SB), NOSPLIT, $8-16
MOVQ $0x0001002a, AX
MOVQ $0x0002002a, CX
MOVQ $0x0003002a, DX
MOVQ $0x0004002a, BX
MOVQ $0x0005002a, SI
MOVQ $0x0006002a, DI
MOVQ $0x0007002a, R8
MOVQ $0x0008002a, R9
MOVQ $0x0009002a, R10
MOVQ $0x000a002a, R11
MOVQ $0x000b002a, R12
MOVQ $0x000c002a, R13
MOVQ $0x000d002a, R14
MOVQ $0x000e002a, R15
MOVQ $0x000f002a, BP
MOVW $0x0001, AX
MOVW $0x0002, CX
MOVW $0x0003, DX
MOVW $0x0004, BX
MOVW $0x0005, SI
MOVW $0x0006, DI
MOVW $0x0007, R8
MOVW $0x0008, R9
MOVW $0x0009, R10
MOVW $0x000a, R11
MOVW $0x000b, R12
MOVW $0x000c, R13
MOVW $0x000d, R14
MOVW $0x000e, R15
MOVW $0x000f, BP
ADDW CX, AX
ADDW DX, AX
ADDW BX, AX
ADDW SI, AX
ADDW DI, AX
ADDW R8, AX
ADDW R9, AX
ADDW R10, AX
ADDW R11, AX
ADDW R12, AX
ADDW R13, AX
ADDW R14, AX
ADDW R15, AX
ADDW BP, AX
MOVW AX, ret+0(FP)
MOVW $0x0000, AX
MOVW $0x0000, CX
MOVW $0x0000, DX
MOVW $0x0000, BX
MOVW $0x0000, SI
MOVW $0x0000, DI
MOVW $0x0000, R8
MOVW $0x0000, R9
MOVW $0x0000, R10
MOVW $0x0000, R11
MOVW $0x0000, R12
MOVW $0x0000, R13
MOVW $0x0000, R14
MOVW $0x0000, R15
MOVW $0x0000, BP
ADDQ CX, AX
ADDQ DX, AX
ADDQ BX, AX
ADDQ SI, AX
ADDQ DI, AX
ADDQ R8, AX
ADDQ R9, AX
ADDQ R10, AX
ADDQ R11, AX
ADDQ R12, AX
ADDQ R13, AX
ADDQ R14, AX
ADDQ R15, AX
ADDQ BP, AX
SHRQ $0x10, AX
MOVQ AX, ret1+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/masks_test.go 0000664 0000000 0000000 00000000477 14370657153 0025443 0 ustar 00root root 0000000 0000000 package masks
import (
"testing"
)
//go:generate go run asm.go -out masks.s -stubs stub.go
func TestMasks(t *testing.T) {
const n = 15
const expect = n * (n + 1) / 2
if got16, got64 := Masks(); got16 != expect || got64 != expect {
t.Fatalf("Masks() = %v, %v; expect %v, %v", got16, got64, expect, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/masks/stub.go 0000664 0000000 0000000 00000000266 14370657153 0024237 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out masks.s -stubs stub.go. DO NOT EDIT.
package masks
// Masks computes the sum 1+2+...+15 in two ways.
func Masks() (uint16, uint64)
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/ 0000775 0000000 0000000 00000000000 14370657153 0023111 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/asm.go 0000664 0000000 0000000 00000003044 14370657153 0024221 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"strconv"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
// The goal is to test for correct handling of 32-bit operands in 64-bit mode,
// specifically that writes are zero-extended to 64 bits. This test is
// constructed such that the register allocator would fail if this feature is
// not accounted for. It consists of multiple copies of a 32-bit write followed
// by a 64-bit read of the same register. Without special treatment liveness
// analysis would consider the upper 32 bits to still be live prior to the
// write. Therefore if we stack up enough copies of this, we could cause the
// register allocator to fail.
func main() {
const (
r = 14 // number of registers
m = 3 // number of iterations
n = r * m
)
TEXT("Upper32", NOSPLIT, "func() uint64")
Doc("Upper32 computes the sum 1+2+...+" + strconv.Itoa(n) + ".")
Comment("Initialize sum.")
s := GP64()
XORQ(s, s)
// Allocate n 64-bit registers and populate them.
Comment("Initialize registers.")
x := make([]GPVirtual, n)
for i := 0; i < n; i++ {
x[i] = GP64()
MOVQ(U64(0x9e77d78aacb8cbcc), x[i])
}
k := 0
for i := 0; i < m; i++ {
Commentf("Iteration %d.", i+1)
// Write to the 32-bit aliases of r registers.
for j := 0; j < r; j++ {
MOVL(U32(k+j+1), x[k+j].As32())
}
// Sum them up.
for j := 0; j < r; j++ {
ADDQ(x[k+j], s)
}
k += r
}
Comment("Store result and return.")
Store(s, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/doc.go 0000664 0000000 0000000 00000000145 14370657153 0024205 0 ustar 00root root 0000000 0000000 // Package upper32 tests liveness analysis of 32-bit operations on 64-bit registers.
package upper32
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/stub.go 0000664 0000000 0000000 00000000250 14370657153 0024412 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out upper32.s -stubs stub.go. DO NOT EDIT.
package upper32
// Upper32 computes the sum 1+2+...+42.
func Upper32() uint64
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/upper32.s 0000664 0000000 0000000 00000006064 14370657153 0024603 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out upper32.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Upper32() uint64
TEXT ·Upper32(SB), NOSPLIT, $8-8
// Initialize sum.
XORQ AX, AX
// Initialize registers.
MOVQ $0x9e77d78aacb8cbcc, CX
MOVQ $0x9e77d78aacb8cbcc, DX
MOVQ $0x9e77d78aacb8cbcc, BX
MOVQ $0x9e77d78aacb8cbcc, SI
MOVQ $0x9e77d78aacb8cbcc, DI
MOVQ $0x9e77d78aacb8cbcc, R8
MOVQ $0x9e77d78aacb8cbcc, R9
MOVQ $0x9e77d78aacb8cbcc, R10
MOVQ $0x9e77d78aacb8cbcc, R11
MOVQ $0x9e77d78aacb8cbcc, R12
MOVQ $0x9e77d78aacb8cbcc, R13
MOVQ $0x9e77d78aacb8cbcc, R14
MOVQ $0x9e77d78aacb8cbcc, R15
MOVQ $0x9e77d78aacb8cbcc, BP
MOVQ $0x9e77d78aacb8cbcc, CX
MOVQ $0x9e77d78aacb8cbcc, DX
MOVQ $0x9e77d78aacb8cbcc, BX
MOVQ $0x9e77d78aacb8cbcc, SI
MOVQ $0x9e77d78aacb8cbcc, DI
MOVQ $0x9e77d78aacb8cbcc, R8
MOVQ $0x9e77d78aacb8cbcc, R9
MOVQ $0x9e77d78aacb8cbcc, R10
MOVQ $0x9e77d78aacb8cbcc, R11
MOVQ $0x9e77d78aacb8cbcc, R12
MOVQ $0x9e77d78aacb8cbcc, R13
MOVQ $0x9e77d78aacb8cbcc, R14
MOVQ $0x9e77d78aacb8cbcc, R15
MOVQ $0x9e77d78aacb8cbcc, BP
MOVQ $0x9e77d78aacb8cbcc, CX
MOVQ $0x9e77d78aacb8cbcc, DX
MOVQ $0x9e77d78aacb8cbcc, BX
MOVQ $0x9e77d78aacb8cbcc, SI
MOVQ $0x9e77d78aacb8cbcc, DI
MOVQ $0x9e77d78aacb8cbcc, R8
MOVQ $0x9e77d78aacb8cbcc, R9
MOVQ $0x9e77d78aacb8cbcc, R10
MOVQ $0x9e77d78aacb8cbcc, R11
MOVQ $0x9e77d78aacb8cbcc, R12
MOVQ $0x9e77d78aacb8cbcc, R13
MOVQ $0x9e77d78aacb8cbcc, R14
MOVQ $0x9e77d78aacb8cbcc, R15
MOVQ $0x9e77d78aacb8cbcc, BP
// Iteration 1.
MOVL $0x00000001, CX
MOVL $0x00000002, DX
MOVL $0x00000003, BX
MOVL $0x00000004, SI
MOVL $0x00000005, DI
MOVL $0x00000006, R8
MOVL $0x00000007, R9
MOVL $0x00000008, R10
MOVL $0x00000009, R11
MOVL $0x0000000a, R12
MOVL $0x0000000b, R13
MOVL $0x0000000c, R14
MOVL $0x0000000d, R15
MOVL $0x0000000e, BP
ADDQ CX, AX
ADDQ DX, AX
ADDQ BX, AX
ADDQ SI, AX
ADDQ DI, AX
ADDQ R8, AX
ADDQ R9, AX
ADDQ R10, AX
ADDQ R11, AX
ADDQ R12, AX
ADDQ R13, AX
ADDQ R14, AX
ADDQ R15, AX
ADDQ BP, AX
// Iteration 2.
MOVL $0x0000000f, CX
MOVL $0x00000010, DX
MOVL $0x00000011, BX
MOVL $0x00000012, SI
MOVL $0x00000013, DI
MOVL $0x00000014, R8
MOVL $0x00000015, R9
MOVL $0x00000016, R10
MOVL $0x00000017, R11
MOVL $0x00000018, R12
MOVL $0x00000019, R13
MOVL $0x0000001a, R14
MOVL $0x0000001b, R15
MOVL $0x0000001c, BP
ADDQ CX, AX
ADDQ DX, AX
ADDQ BX, AX
ADDQ SI, AX
ADDQ DI, AX
ADDQ R8, AX
ADDQ R9, AX
ADDQ R10, AX
ADDQ R11, AX
ADDQ R12, AX
ADDQ R13, AX
ADDQ R14, AX
ADDQ R15, AX
ADDQ BP, AX
// Iteration 3.
MOVL $0x0000001d, CX
MOVL $0x0000001e, DX
MOVL $0x0000001f, BX
MOVL $0x00000020, SI
MOVL $0x00000021, DI
MOVL $0x00000022, R8
MOVL $0x00000023, R9
MOVL $0x00000024, R10
MOVL $0x00000025, R11
MOVL $0x00000026, R12
MOVL $0x00000027, R13
MOVL $0x00000028, R14
MOVL $0x00000029, R15
MOVL $0x0000002a, BP
ADDQ CX, AX
ADDQ DX, AX
ADDQ BX, AX
ADDQ SI, AX
ADDQ DI, AX
ADDQ R8, AX
ADDQ R9, AX
ADDQ R10, AX
ADDQ R11, AX
ADDQ R12, AX
ADDQ R13, AX
ADDQ R14, AX
ADDQ R15, AX
ADDQ BP, AX
// Store result and return.
MOVQ AX, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/upper32/upper32_test.go 0000664 0000000 0000000 00000000426 14370657153 0026001 0 ustar 00root root 0000000 0000000 package upper32
import (
"testing"
)
//go:generate go run asm.go -out upper32.s -stubs stub.go
func TestUpper32(t *testing.T) {
const n = 14 * 3
const expect = n * (n + 1) / 2
if got := Upper32(); got != expect {
t.Fatalf("Upper32() = %v; expect %v", got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/ 0000775 0000000 0000000 00000000000 14370657153 0023266 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/asm.go 0000664 0000000 0000000 00000003734 14370657153 0024404 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"strconv"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
// The goal of this test is to confirm correct liveness analysis of zeroing mode
// when masking in AVX-512. In merge masking, some of the bits of the output
// register will be preserved, so the register is live coming into the
// instruction. Zeroing mode removes any input dependency.
//
// This synthetic test sets up a situation where we allocate multiple temporary
// registers. Allocation is only feasible if the liveness pass correctly
// identifies that they are not all live at once.
func main() {
const n = 32
TEXT("Zeroing", NOSPLIT, "func(out *[8]uint64)")
Doc("Zeroing computes the sum 1+2+...+" + strconv.Itoa(n) + " in 8 lanes of 512-bit register.")
out := Load(Param("out"), GP64())
Comment("Initialize sum.")
s := ZMM()
VPXORD(s, s, s)
// Allocate registers for the terms of the sum. Write garbage to them.
//
// The point here is that under merge-masking, or an incorrect handling of
// zeroing-masking, these registers would be live from this point. And there
// would be too many of them so register allocation would fail.
Comment("Initialize summand registers.")
filler := GP64()
MOVQ(U64(0x9e77d78aacb8cbcc), filler)
z := make([]VecVirtual, n)
for i := 0; i < n; i++ {
z[i] = ZMM()
VPBROADCASTQ(filler, z[i])
}
// Prepare a mask register set to all ones.
Comment("Prepare mask register.")
k := K()
KXNORW(k, k, k)
// Prepare an increment register set to 1 in each lane.
Comment("Prepare constant registers.")
one := GP64()
MOVQ(U64(1), one)
ones := ZMM()
VPBROADCASTQ(one, ones)
zero := ZMM()
VPXORD(zero, zero, zero)
last := zero
for i := 0; i < n; i++ {
Commentf("Summand %d.", i+1)
VPADDD_Z(last, ones, k, z[i])
VPADDD(s, z[i], s)
last = z[i]
}
Comment("Write result to output pointer.")
VMOVDQU64(s, Mem{Base: out})
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/doc.go 0000664 0000000 0000000 00000000147 14370657153 0024364 0 ustar 00root root 0000000 0000000 // Package zeroing tests liveness analysis of AVX-512 operations with zeroing masking.
package zeroing
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/stub.go 0000664 0000000 0000000 00000000316 14370657153 0024572 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out zeroing.s -stubs stub.go. DO NOT EDIT.
package zeroing
// Zeroing computes the sum 1+2+...+32 in 8 lanes of 512-bit register.
func Zeroing(out *[8]uint64)
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/zeroing.s 0000664 0000000 0000000 00000006245 14370657153 0025136 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out zeroing.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Zeroing(out *[8]uint64)
// Requires: AVX512F
TEXT ·Zeroing(SB), NOSPLIT, $0-8
MOVQ out+0(FP), AX
// Initialize sum.
VPXORD Z0, Z0, Z0
// Initialize summand registers.
MOVQ $0x9e77d78aacb8cbcc, CX
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
VPBROADCASTQ CX, Z1
// Prepare mask register.
KXNORW K1, K1, K1
// Prepare constant registers.
MOVQ $0x0000000000000001, CX
VPBROADCASTQ CX, Z2
VPXORD Z3, Z3, Z3
// Summand 1.
VPADDD.Z Z3, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 2.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 3.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 4.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 5.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 6.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 7.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 8.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 9.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 10.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 11.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 12.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 13.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 14.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 15.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 16.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 17.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 18.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 19.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 20.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 21.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 22.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 23.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 24.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 25.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 26.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 27.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 28.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 29.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 30.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 31.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Summand 32.
VPADDD.Z Z1, Z2, K1, Z1
VPADDD Z0, Z1, Z0
// Write result to output pointer.
VMOVDQU64 Z0, (AX)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/alloc/zeroing/zeroing_test.go 0000664 0000000 0000000 00000000645 14370657153 0026336 0 ustar 00root root 0000000 0000000 package zeroing
import (
"testing"
"golang.org/x/sys/cpu"
)
//go:generate go run asm.go -out zeroing.s -stubs stub.go
func TestZeroing(t *testing.T) {
const (
n = 32
expect = n * (n + 1) / 2
)
if !cpu.X86.HasAVX512F {
t.Skip("require AVX512F")
}
var got [8]uint64
Zeroing(&got)
for i := 0; i < 8; i++ {
if got[i] != expect {
t.Errorf("got[%d] = %d; expect %d", i, got[i], expect)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/cast/ 0000775 0000000 0000000 00000000000 14370657153 0021451 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/cast/asm.go 0000664 0000000 0000000 00000000751 14370657153 0022563 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Split", NOSPLIT, "func(x uint64) (q uint64, l uint32, w uint16, b uint8)")
Doc(
"Split returns the low 64, 32, 16 and 8 bits of x.",
"Tests the As() methods of virtual general-purpose registers.",
)
x := GP64()
Load(Param("x"), x)
Store(x, Return("q"))
Store(x.As32(), Return("l"))
Store(x.As16(), Return("w"))
Store(x.As8(), Return("b"))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/cast/cast.s 0000664 0000000 0000000 00000000460 14370657153 0022567 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out cast.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Split(x uint64) (q uint64, l uint32, w uint16, b uint8)
TEXT ·Split(SB), NOSPLIT, $0-23
MOVQ x+0(FP), AX
MOVQ AX, q+8(FP)
MOVL AX, l+16(FP)
MOVW AX, w+20(FP)
MOVB AL, b+22(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/cast/cast_test.go 0000664 0000000 0000000 00000000511 14370657153 0023766 0 ustar 00root root 0000000 0000000 package cast
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out cast.s -stubs stub.go
func TestSplit(t *testing.T) {
expect := func(x uint64) (uint64, uint32, uint16, uint8) {
return x, uint32(x), uint16(x), uint8(x)
}
if err := quick.CheckEqual(Split, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/cast/doc.go 0000664 0000000 0000000 00000000121 14370657153 0022537 0 ustar 00root root 0000000 0000000 // Package cast tests casting virtual registers to different sizes.
package cast
golang-github-mmcloughlin-avo-0.5.0/tests/cast/stub.go 0000664 0000000 0000000 00000000426 14370657153 0022757 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out cast.s -stubs stub.go. DO NOT EDIT.
package cast
// Split returns the low 64, 32, 16 and 8 bits of x.
// Tests the As() methods of virtual general-purpose registers.
func Split(x uint64) (q uint64, l uint32, w uint16, b uint8)
golang-github-mmcloughlin-avo-0.5.0/tests/doc.go 0000664 0000000 0000000 00000000077 14370657153 0021617 0 ustar 00root root 0000000 0000000 // Package tests contains avo integration tests.
package tests
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/ 0000775 0000000 0000000 00000000000 14370657153 0022477 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/ 0000775 0000000 0000000 00000000000 14370657153 0024050 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/ 0000775 0000000 0000000 00000000000 14370657153 0025776 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/LICENSE 0000664 0000000 0000000 00000003002 14370657153 0026776 0 ustar 00root root 0000000 0000000 Copyright (c) 2011 The Snappy-Go Authors. All rights reserved.
Copyright (c) 2019 Klaus Post. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/README.md 0000664 0000000 0000000 00000000702 14370657153 0027254 0 ustar 00root root 0000000 0000000 Regression test for [issue
#100](https://github.com/mmcloughlin/avo/issues/100) based on the original
reported allocation failure.
Based on the pull request
[`klauspost/compress#186`](https://github.com/klauspost/compress/pull/186) at
`c1f3cf132cd8e214b38cc16e418bf2e501ccda93` with the lines after `FIXME`
comments re-activated and other minimal edits to make it work in this
environment.
Original code covered by [BSD 3-Clause License](LICENSE).
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/allocfail.s 0000664 0000000 0000000 00000745670 14370657153 0030133 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out allocfail.s -stubs stubs.go. DO NOT EDIT.
//go:build !appengine && !noasm && gc
#include "textflag.h"
// func encodeBlockAsm(dst []byte, src []byte) int
// Requires: SSE2
TEXT ·encodeBlockAsm(SB), $65568-56
MOVQ $0x00000200, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsm:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsm
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsm:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x06, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsm
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x30, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x30, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsm
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsm
repeat_extend_back_loop_encodeBlockAsm:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsm
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsm
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsm
JMP repeat_extend_back_loop_encodeBlockAsm
repeat_extend_back_end_encodeBlockAsm:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsm
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsm
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsm
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsm
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsm
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsm
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsm
four_bytes_repeat_emit_encodeBlockAsm:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsm
three_bytes_repeat_emit_encodeBlockAsm:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsm
two_bytes_repeat_emit_encodeBlockAsm:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsm
one_byte_repeat_emit_encodeBlockAsm:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsm:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsm
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_256through2048
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R8
MOVB R9, (BX)
MOVB R8, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R8
MOVW R9, (BX)
MOVB R8, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R8
MOVL R9, (BX)
MOVL R8, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R8
MOVQ R9, (BX)
MOVQ R8, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm
emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm_memmove_tail
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsm:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsm:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsm
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsm
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsm
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsm:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsm
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_as_copy_encodeBlockAsm:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsm
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsm
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsm
emit_repeat_again_repeat_as_copy_encodeBlockAsm_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsm_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_four_repeat_as_copy_encodeBlockAsm_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_three_repeat_as_copy_encodeBlockAsm_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_repeat_as_copy_encodeBlockAsm_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
four_bytes_remain_repeat_as_copy_encodeBlockAsm:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsm
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm
two_byte_offset_repeat_as_copy_encodeBlockAsm:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsm
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsm_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsm_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_four_repeat_as_copy_encodeBlockAsm_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_three_repeat_as_copy_encodeBlockAsm_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_repeat_as_copy_encodeBlockAsm_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
repeat_two_offset_repeat_as_copy_encodeBlockAsm_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
two_byte_offset_short_repeat_as_copy_encodeBlockAsm:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm
emit_copy_three_repeat_as_copy_encodeBlockAsm:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsm:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsm
JMP search_loop_encodeBlockAsm
no_repeat_found_encodeBlockAsm:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x30, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsm
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsm
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsm
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsm
candidate3_match_encodeBlockAsm:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsm
candidate2_match_encodeBlockAsm:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsm:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsm
match_extend_back_loop_encodeBlockAsm:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsm
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsm
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsm
JMP match_extend_back_loop_encodeBlockAsm
match_extend_back_end_encodeBlockAsm:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsm
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsm:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsm
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsm
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsm
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsm
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsm
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsm
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsm
four_bytes_match_emit_encodeBlockAsm:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsm
three_bytes_match_emit_encodeBlockAsm:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsm
two_bytes_match_emit_encodeBlockAsm:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsm
one_byte_match_emit_encodeBlockAsm:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsm:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsm
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_256through2048
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), SI
MOVB R9, (DI)
MOVB SI, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), SI
MOVW R9, (DI)
MOVB SI, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), SI
MOVL R9, (DI)
MOVL SI, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), SI
MOVQ R9, (DI)
MOVQ SI, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm
emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsm_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsm_memmove_tail
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsm:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsm:
NOP
match_nolit_loop_encodeBlockAsm:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsm
matchlen_loopback_match_nolit_encodeBlockAsm:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsm
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsm
matchlen_loop_match_nolit_encodeBlockAsm:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsm
matchlen_single_match_nolit_encodeBlockAsm:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsm
matchlen_single_loopback_match_nolit_encodeBlockAsm:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsm
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsm
match_nolit_end_encodeBlockAsm:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsm
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsm
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsm
emit_repeat_again_match_nolit_encodeBlockAsm_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm_emit_copy
repeat_five_match_nolit_encodeBlockAsm_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_four_match_nolit_encodeBlockAsm_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_three_match_nolit_encodeBlockAsm_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_two_match_nolit_encodeBlockAsm_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
four_bytes_remain_match_nolit_encodeBlockAsm:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsm
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
two_byte_offset_match_nolit_encodeBlockAsm:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsm
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsm_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm_emit_copy_short
repeat_five_match_nolit_encodeBlockAsm_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_four_match_nolit_encodeBlockAsm_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_three_match_nolit_encodeBlockAsm_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_two_match_nolit_encodeBlockAsm_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
repeat_two_offset_match_nolit_encodeBlockAsm_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
two_byte_offset_short_match_nolit_encodeBlockAsm:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsm
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsm
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm
emit_copy_three_match_nolit_encodeBlockAsm:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsm:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsm
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsm
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsm:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x30, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x30, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsm
INCL AX
JMP search_loop_encodeBlockAsm
emit_remainder_encodeBlockAsm:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsm
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsm:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsm
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsm
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsm
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsm
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsm
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsm
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsm
four_bytes_emit_remainder_encodeBlockAsm:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsm
three_bytes_emit_remainder_encodeBlockAsm:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsm
two_bytes_emit_remainder_encodeBlockAsm:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsm
one_byte_emit_remainder_encodeBlockAsm:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsm:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsm
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_256through2048
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), AL
MOVB DL, (CX)
MOVB AL, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), AL
MOVW DX, (CX)
MOVB AL, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), AX
MOVL DX, (CX)
MOVL AX, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), AX
MOVQ DX, (CX)
MOVQ AX, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm
emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm_memmove_tail
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsm:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsm:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func encodeBlockAsm14B(dst []byte, src []byte) int
// Requires: SSE2
TEXT ·encodeBlockAsm14B(SB), $16416-56
MOVQ $0x00000080, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsm14B:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsm14B
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsm14B:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x05, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsm14B
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x32, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x32, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsm14B
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsm14B
repeat_extend_back_loop_encodeBlockAsm14B:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsm14B
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsm14B
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsm14B
JMP repeat_extend_back_loop_encodeBlockAsm14B
repeat_extend_back_end_encodeBlockAsm14B:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsm14B
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsm14B
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsm14B
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsm14B
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsm14B
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsm14B
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsm14B
four_bytes_repeat_emit_encodeBlockAsm14B:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsm14B
three_bytes_repeat_emit_encodeBlockAsm14B:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsm14B
two_bytes_repeat_emit_encodeBlockAsm14B:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsm14B
one_byte_repeat_emit_encodeBlockAsm14B:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsm14B:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsm14B
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_256through2048
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R8
MOVB R9, (BX)
MOVB R8, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R8
MOVW R9, (BX)
MOVB R8, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R8
MOVL R9, (BX)
MOVL R8, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R8
MOVQ R9, (BX)
MOVQ R8, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14B
emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm14B_memmove_tail
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsm14B:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsm14B:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsm14B
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsm14B
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsm14B
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsm14B:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsm14B
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_as_copy_encodeBlockAsm14B:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsm14B
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsm14B
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsm14B
emit_repeat_again_repeat_as_copy_encodeBlockAsm14B_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm14B_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm14B_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm14B_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm14B_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm14B_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsm14B_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_four_repeat_as_copy_encodeBlockAsm14B_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_three_repeat_as_copy_encodeBlockAsm14B_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_repeat_as_copy_encodeBlockAsm14B_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
four_bytes_remain_repeat_as_copy_encodeBlockAsm14B:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsm14B
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14B
two_byte_offset_repeat_as_copy_encodeBlockAsm14B:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsm14B
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm14B_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_four_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_three_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
repeat_two_offset_repeat_as_copy_encodeBlockAsm14B_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
two_byte_offset_short_repeat_as_copy_encodeBlockAsm14B:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm14B
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm14B
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14B
emit_copy_three_repeat_as_copy_encodeBlockAsm14B:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsm14B:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsm14B
JMP search_loop_encodeBlockAsm14B
no_repeat_found_encodeBlockAsm14B:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x32, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsm14B
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsm14B
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsm14B
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsm14B
candidate3_match_encodeBlockAsm14B:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsm14B
candidate2_match_encodeBlockAsm14B:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsm14B:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsm14B
match_extend_back_loop_encodeBlockAsm14B:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsm14B
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsm14B
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsm14B
JMP match_extend_back_loop_encodeBlockAsm14B
match_extend_back_end_encodeBlockAsm14B:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsm14B
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsm14B:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsm14B
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsm14B
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsm14B
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsm14B
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsm14B
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsm14B
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsm14B
four_bytes_match_emit_encodeBlockAsm14B:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsm14B
three_bytes_match_emit_encodeBlockAsm14B:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsm14B
two_bytes_match_emit_encodeBlockAsm14B:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsm14B
one_byte_match_emit_encodeBlockAsm14B:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsm14B:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsm14B
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_256through2048
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), SI
MOVB R9, (DI)
MOVB SI, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), SI
MOVW R9, (DI)
MOVB SI, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), SI
MOVL R9, (DI)
MOVL SI, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), SI
MOVQ R9, (DI)
MOVQ SI, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14B
emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsm14B_memmove_tail
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsm14B:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsm14B:
NOP
match_nolit_loop_encodeBlockAsm14B:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsm14B
matchlen_loopback_match_nolit_encodeBlockAsm14B:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsm14B
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsm14B
matchlen_loop_match_nolit_encodeBlockAsm14B:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsm14B
matchlen_single_match_nolit_encodeBlockAsm14B:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsm14B
matchlen_single_loopback_match_nolit_encodeBlockAsm14B:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsm14B
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsm14B
match_nolit_end_encodeBlockAsm14B:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsm14B
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsm14B
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsm14B
emit_repeat_again_match_nolit_encodeBlockAsm14B_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm14B_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm14B_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm14B_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm14B_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm14B_emit_copy
repeat_five_match_nolit_encodeBlockAsm14B_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_four_match_nolit_encodeBlockAsm14B_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_three_match_nolit_encodeBlockAsm14B_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_two_match_nolit_encodeBlockAsm14B_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
four_bytes_remain_match_nolit_encodeBlockAsm14B:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsm14B
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
two_byte_offset_match_nolit_encodeBlockAsm14B:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsm14B
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsm14B_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm14B_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm14B_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm14B_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm14B_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm14B_emit_copy_short
repeat_five_match_nolit_encodeBlockAsm14B_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_four_match_nolit_encodeBlockAsm14B_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_three_match_nolit_encodeBlockAsm14B_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_two_match_nolit_encodeBlockAsm14B_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
repeat_two_offset_match_nolit_encodeBlockAsm14B_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
two_byte_offset_short_match_nolit_encodeBlockAsm14B:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsm14B
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsm14B
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14B
emit_copy_three_match_nolit_encodeBlockAsm14B:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsm14B:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsm14B
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsm14B
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsm14B:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x32, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x32, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsm14B
INCL AX
JMP search_loop_encodeBlockAsm14B
emit_remainder_encodeBlockAsm14B:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsm14B
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsm14B:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsm14B
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsm14B
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsm14B
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsm14B
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsm14B
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsm14B
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsm14B
four_bytes_emit_remainder_encodeBlockAsm14B:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsm14B
three_bytes_emit_remainder_encodeBlockAsm14B:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsm14B
two_bytes_emit_remainder_encodeBlockAsm14B:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsm14B
one_byte_emit_remainder_encodeBlockAsm14B:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsm14B:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsm14B
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_256through2048
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), AL
MOVB DL, (CX)
MOVB AL, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), AL
MOVW DX, (CX)
MOVB AL, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), AX
MOVL DX, (CX)
MOVL AX, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), AX
MOVQ DX, (CX)
MOVQ AX, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14B
emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm14B_memmove_tail
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsm14B:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsm14B:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func encodeBlockAsm12B(dst []byte, src []byte) int
// Requires: SSE2
TEXT ·encodeBlockAsm12B(SB), $4128-56
MOVQ $0x00000020, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsm12B:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsm12B
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsm12B:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x04, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsm12B
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x34, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x34, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsm12B
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsm12B
repeat_extend_back_loop_encodeBlockAsm12B:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsm12B
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsm12B
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsm12B
JMP repeat_extend_back_loop_encodeBlockAsm12B
repeat_extend_back_end_encodeBlockAsm12B:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsm12B
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsm12B
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsm12B
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsm12B
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsm12B
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsm12B
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsm12B
four_bytes_repeat_emit_encodeBlockAsm12B:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsm12B
three_bytes_repeat_emit_encodeBlockAsm12B:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsm12B
two_bytes_repeat_emit_encodeBlockAsm12B:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsm12B
one_byte_repeat_emit_encodeBlockAsm12B:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsm12B:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsm12B
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_256through2048
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R8
MOVB R9, (BX)
MOVB R8, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R8
MOVW R9, (BX)
MOVB R8, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R8
MOVL R9, (BX)
MOVL R8, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R8
MOVQ R9, (BX)
MOVQ R8, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12B
emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm12B_memmove_tail
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsm12B:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsm12B:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsm12B
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsm12B
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsm12B
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsm12B:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsm12B
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_as_copy_encodeBlockAsm12B:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsm12B
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsm12B
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsm12B
emit_repeat_again_repeat_as_copy_encodeBlockAsm12B_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm12B_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm12B_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm12B_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm12B_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm12B_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsm12B_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_four_repeat_as_copy_encodeBlockAsm12B_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_three_repeat_as_copy_encodeBlockAsm12B_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_repeat_as_copy_encodeBlockAsm12B_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
four_bytes_remain_repeat_as_copy_encodeBlockAsm12B:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsm12B
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12B
two_byte_offset_repeat_as_copy_encodeBlockAsm12B:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsm12B
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm12B_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_four_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_three_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
repeat_two_offset_repeat_as_copy_encodeBlockAsm12B_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
two_byte_offset_short_repeat_as_copy_encodeBlockAsm12B:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm12B
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm12B
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12B
emit_copy_three_repeat_as_copy_encodeBlockAsm12B:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsm12B:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsm12B
JMP search_loop_encodeBlockAsm12B
no_repeat_found_encodeBlockAsm12B:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x34, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsm12B
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsm12B
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsm12B
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsm12B
candidate3_match_encodeBlockAsm12B:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsm12B
candidate2_match_encodeBlockAsm12B:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsm12B:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsm12B
match_extend_back_loop_encodeBlockAsm12B:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsm12B
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsm12B
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsm12B
JMP match_extend_back_loop_encodeBlockAsm12B
match_extend_back_end_encodeBlockAsm12B:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsm12B
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsm12B:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsm12B
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsm12B
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsm12B
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsm12B
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsm12B
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsm12B
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsm12B
four_bytes_match_emit_encodeBlockAsm12B:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsm12B
three_bytes_match_emit_encodeBlockAsm12B:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsm12B
two_bytes_match_emit_encodeBlockAsm12B:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsm12B
one_byte_match_emit_encodeBlockAsm12B:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsm12B:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsm12B
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_256through2048
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), SI
MOVB R9, (DI)
MOVB SI, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), SI
MOVW R9, (DI)
MOVB SI, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), SI
MOVL R9, (DI)
MOVL SI, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), SI
MOVQ R9, (DI)
MOVQ SI, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12B
emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsm12B_memmove_tail
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsm12B:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsm12B:
NOP
match_nolit_loop_encodeBlockAsm12B:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsm12B
matchlen_loopback_match_nolit_encodeBlockAsm12B:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsm12B
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsm12B
matchlen_loop_match_nolit_encodeBlockAsm12B:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsm12B
matchlen_single_match_nolit_encodeBlockAsm12B:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsm12B
matchlen_single_loopback_match_nolit_encodeBlockAsm12B:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsm12B
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsm12B
match_nolit_end_encodeBlockAsm12B:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsm12B
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsm12B
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsm12B
emit_repeat_again_match_nolit_encodeBlockAsm12B_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm12B_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm12B_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm12B_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm12B_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm12B_emit_copy
repeat_five_match_nolit_encodeBlockAsm12B_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_four_match_nolit_encodeBlockAsm12B_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_three_match_nolit_encodeBlockAsm12B_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_two_match_nolit_encodeBlockAsm12B_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
four_bytes_remain_match_nolit_encodeBlockAsm12B:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsm12B
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
two_byte_offset_match_nolit_encodeBlockAsm12B:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsm12B
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsm12B_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm12B_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm12B_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm12B_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm12B_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm12B_emit_copy_short
repeat_five_match_nolit_encodeBlockAsm12B_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_four_match_nolit_encodeBlockAsm12B_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_three_match_nolit_encodeBlockAsm12B_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_two_match_nolit_encodeBlockAsm12B_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
repeat_two_offset_match_nolit_encodeBlockAsm12B_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
two_byte_offset_short_match_nolit_encodeBlockAsm12B:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsm12B
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsm12B
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12B
emit_copy_three_match_nolit_encodeBlockAsm12B:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsm12B:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsm12B
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsm12B
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsm12B:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x34, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x34, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsm12B
INCL AX
JMP search_loop_encodeBlockAsm12B
emit_remainder_encodeBlockAsm12B:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsm12B
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsm12B:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsm12B
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsm12B
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsm12B
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsm12B
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsm12B
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsm12B
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsm12B
four_bytes_emit_remainder_encodeBlockAsm12B:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsm12B
three_bytes_emit_remainder_encodeBlockAsm12B:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsm12B
two_bytes_emit_remainder_encodeBlockAsm12B:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsm12B
one_byte_emit_remainder_encodeBlockAsm12B:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsm12B:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsm12B
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_256through2048
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), AL
MOVB DL, (CX)
MOVB AL, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), AL
MOVW DX, (CX)
MOVB AL, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), AX
MOVL DX, (CX)
MOVL AX, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), AX
MOVQ DX, (CX)
MOVQ AX, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12B
emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm12B_memmove_tail
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsm12B:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsm12B:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func encodeBlockAsmAvx(dst []byte, src []byte) int
// Requires: AVX, SSE2
TEXT ·encodeBlockAsmAvx(SB), $65568-56
MOVQ $0x00000200, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsmAvx:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsmAvx
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsmAvx:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x06, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsmAvx
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x30, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x30, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsmAvx
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsmAvx
repeat_extend_back_loop_encodeBlockAsmAvx:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsmAvx
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsmAvx
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsmAvx
JMP repeat_extend_back_loop_encodeBlockAsmAvx
repeat_extend_back_end_encodeBlockAsmAvx:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsmAvx
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsmAvx
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsmAvx
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsmAvx
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsmAvx
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsmAvx
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsmAvx
four_bytes_repeat_emit_encodeBlockAsmAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsmAvx
three_bytes_repeat_emit_encodeBlockAsmAvx:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsmAvx
two_bytes_repeat_emit_encodeBlockAsmAvx:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsmAvx
one_byte_repeat_emit_encodeBlockAsmAvx:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsmAvx:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsmAvx
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_avxUnaligned
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R10
MOVB R9, (BX)
MOVB R10, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R10
MOVW R9, (BX)
MOVB R10, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R10
MOVL R9, (BX)
MOVL R10, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R10
MOVQ R9, (BX)
MOVQ R10, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_tail
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_avxUnaligned:
LEAQ (R8)(DI*1), R10
MOVQ BX, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, BX
ADDQ $0x20, BX
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ BX, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, DI
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (R8), Y4
ADDQ R11, R8
SUBQ R9, DI
emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_gobble_128_loop:
VMOVDQU (R8), Y0
VMOVDQU 32(R8), Y1
VMOVDQU 64(R8), Y2
VMOVDQU 96(R8), Y3
ADDQ R9, R8
VMOVDQA Y0, (BX)
VMOVDQA Y1, 32(BX)
VMOVDQA Y2, 64(BX)
VMOVDQA Y3, 96(BX)
ADDQ R9, BX
SUBQ R9, DI
JA emit_lit_memmove_repeat_emit_encodeBlockAsmAvx_memmove_gobble_128_loop
ADDQ R9, DI
ADDQ BX, DI
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(DI)
MOVOU X6, -112(DI)
MOVOU X7, -96(DI)
MOVOU X8, -80(DI)
MOVOU X9, -64(DI)
MOVOU X10, -48(DI)
MOVOU X11, -32(DI)
MOVOU X12, -16(DI)
JMP emit_literal_done_repeat_emit_encodeBlockAsmAvx
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsmAvx:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsmAvx:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsmAvx
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsmAvx
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsmAvx
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsmAvx:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsmAvx
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_as_copy_encodeBlockAsmAvx:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsmAvx
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsmAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsmAvx
emit_repeat_again_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsmAvx_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsmAvx_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsmAvx_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsmAvx_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsmAvx_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_four_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_three_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
four_bytes_remain_repeat_as_copy_encodeBlockAsmAvx:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsmAvx
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsmAvx
two_byte_offset_repeat_as_copy_encodeBlockAsmAvx:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsmAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_four_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_three_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsmAvx_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
two_byte_offset_short_repeat_as_copy_encodeBlockAsmAvx:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsmAvx
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsmAvx
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsmAvx
emit_copy_three_repeat_as_copy_encodeBlockAsmAvx:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsmAvx:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsmAvx
JMP search_loop_encodeBlockAsmAvx
no_repeat_found_encodeBlockAsmAvx:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x30, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsmAvx
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsmAvx
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsmAvx
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsmAvx
candidate3_match_encodeBlockAsmAvx:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsmAvx
candidate2_match_encodeBlockAsmAvx:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsmAvx:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsmAvx
match_extend_back_loop_encodeBlockAsmAvx:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsmAvx
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsmAvx
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsmAvx
JMP match_extend_back_loop_encodeBlockAsmAvx
match_extend_back_end_encodeBlockAsmAvx:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsmAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsmAvx:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsmAvx
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsmAvx
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsmAvx
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsmAvx
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsmAvx
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsmAvx
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsmAvx
four_bytes_match_emit_encodeBlockAsmAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsmAvx
three_bytes_match_emit_encodeBlockAsmAvx:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsmAvx
two_bytes_match_emit_encodeBlockAsmAvx:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsmAvx
one_byte_match_emit_encodeBlockAsmAvx:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsmAvx:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsmAvx
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_avxUnaligned
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), R10
MOVB R9, (DI)
MOVB R10, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), R10
MOVW R9, (DI)
MOVB R10, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), R10
MOVL R9, (DI)
MOVL R10, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), R10
MOVQ R9, (DI)
MOVQ R10, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_tail
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_avxUnaligned:
LEAQ (SI)(R8*1), R10
MOVQ DI, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, DI
ADDQ $0x20, DI
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ DI, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, R8
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (SI), Y4
ADDQ R11, SI
SUBQ R9, R8
emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_gobble_128_loop:
VMOVDQU (SI), Y0
VMOVDQU 32(SI), Y1
VMOVDQU 64(SI), Y2
VMOVDQU 96(SI), Y3
ADDQ R9, SI
VMOVDQA Y0, (DI)
VMOVDQA Y1, 32(DI)
VMOVDQA Y2, 64(DI)
VMOVDQA Y3, 96(DI)
ADDQ R9, DI
SUBQ R9, R8
JA emit_lit_memmove_match_emit_encodeBlockAsmAvx_memmove_gobble_128_loop
ADDQ R9, R8
ADDQ DI, R8
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(R8)
MOVOU X6, -112(R8)
MOVOU X7, -96(R8)
MOVOU X8, -80(R8)
MOVOU X9, -64(R8)
MOVOU X10, -48(R8)
MOVOU X11, -32(R8)
MOVOU X12, -16(R8)
JMP emit_literal_done_match_emit_encodeBlockAsmAvx
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsmAvx:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsmAvx:
NOP
match_nolit_loop_encodeBlockAsmAvx:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsmAvx
matchlen_loopback_match_nolit_encodeBlockAsmAvx:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsmAvx
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsmAvx
matchlen_loop_match_nolit_encodeBlockAsmAvx:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsmAvx
matchlen_single_match_nolit_encodeBlockAsmAvx:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsmAvx
matchlen_single_loopback_match_nolit_encodeBlockAsmAvx:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsmAvx
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsmAvx
match_nolit_end_encodeBlockAsmAvx:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsmAvx
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsmAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsmAvx
emit_repeat_again_match_nolit_encodeBlockAsmAvx_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsmAvx_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsmAvx_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsmAvx_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsmAvx_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsmAvx_emit_copy
repeat_five_match_nolit_encodeBlockAsmAvx_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_four_match_nolit_encodeBlockAsmAvx_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_three_match_nolit_encodeBlockAsmAvx_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_two_match_nolit_encodeBlockAsmAvx_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
four_bytes_remain_match_nolit_encodeBlockAsmAvx:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsmAvx
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
two_byte_offset_match_nolit_encodeBlockAsmAvx:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsmAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsmAvx_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsmAvx_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsmAvx_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsmAvx_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsmAvx_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsmAvx_emit_copy_short
repeat_five_match_nolit_encodeBlockAsmAvx_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_four_match_nolit_encodeBlockAsmAvx_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_three_match_nolit_encodeBlockAsmAvx_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_two_match_nolit_encodeBlockAsmAvx_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
repeat_two_offset_match_nolit_encodeBlockAsmAvx_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
two_byte_offset_short_match_nolit_encodeBlockAsmAvx:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsmAvx
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsmAvx
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsmAvx
emit_copy_three_match_nolit_encodeBlockAsmAvx:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsmAvx:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsmAvx
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsmAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsmAvx:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x30, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x30, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsmAvx
INCL AX
JMP search_loop_encodeBlockAsmAvx
emit_remainder_encodeBlockAsmAvx:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsmAvx
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsmAvx:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsmAvx
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsmAvx
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsmAvx
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsmAvx
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsmAvx
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsmAvx
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsmAvx
four_bytes_emit_remainder_encodeBlockAsmAvx:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsmAvx
three_bytes_emit_remainder_encodeBlockAsmAvx:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsmAvx
two_bytes_emit_remainder_encodeBlockAsmAvx:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsmAvx
one_byte_emit_remainder_encodeBlockAsmAvx:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsmAvx:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsmAvx
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_avxUnaligned
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), SI
MOVB DL, (CX)
MOVB SI, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), SI
MOVW DX, (CX)
MOVB SI, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), SI
MOVL DX, (CX)
MOVL SI, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), SI
MOVQ DX, (CX)
MOVQ SI, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_tail
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_avxUnaligned:
LEAQ (AX)(BX*1), SI
MOVQ CX, R8
MOVOU -128(SI), X5
MOVOU -112(SI), X6
MOVQ $0x00000080, DX
ANDQ $0xffffffe0, CX
ADDQ $0x20, CX
MOVOU -96(SI), X7
MOVOU -80(SI), X8
MOVQ CX, DI
SUBQ R8, DI
MOVOU -64(SI), X9
MOVOU -48(SI), X10
SUBQ DI, BX
MOVOU -32(SI), X11
MOVOU -16(SI), X12
VMOVDQU (AX), Y4
ADDQ DI, AX
SUBQ DX, BX
emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_gobble_128_loop:
VMOVDQU (AX), Y0
VMOVDQU 32(AX), Y1
VMOVDQU 64(AX), Y2
VMOVDQU 96(AX), Y3
ADDQ DX, AX
VMOVDQA Y0, (CX)
VMOVDQA Y1, 32(CX)
VMOVDQA Y2, 64(CX)
VMOVDQA Y3, 96(CX)
ADDQ DX, CX
SUBQ DX, BX
JA emit_lit_memmove_emit_remainder_encodeBlockAsmAvx_memmove_gobble_128_loop
ADDQ DX, BX
ADDQ CX, BX
VMOVDQU Y4, (R8)
VZEROUPPER
MOVOU X5, -128(BX)
MOVOU X6, -112(BX)
MOVOU X7, -96(BX)
MOVOU X8, -80(BX)
MOVOU X9, -64(BX)
MOVOU X10, -48(BX)
MOVOU X11, -32(BX)
MOVOU X12, -16(BX)
JMP emit_literal_done_emit_remainder_encodeBlockAsmAvx
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsmAvx:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsmAvx:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func encodeBlockAsm14BAvx(dst []byte, src []byte) int
// Requires: AVX, SSE2
TEXT ·encodeBlockAsm14BAvx(SB), $16416-56
MOVQ $0x00000080, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsm14BAvx:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsm14BAvx
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsm14BAvx:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x05, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsm14BAvx
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x32, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x32, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsm14BAvx
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsm14BAvx
repeat_extend_back_loop_encodeBlockAsm14BAvx:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsm14BAvx
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsm14BAvx
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsm14BAvx
JMP repeat_extend_back_loop_encodeBlockAsm14BAvx
repeat_extend_back_end_encodeBlockAsm14BAvx:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsm14BAvx
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsm14BAvx
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsm14BAvx
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsm14BAvx
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsm14BAvx
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsm14BAvx
four_bytes_repeat_emit_encodeBlockAsm14BAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsm14BAvx
three_bytes_repeat_emit_encodeBlockAsm14BAvx:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsm14BAvx
two_bytes_repeat_emit_encodeBlockAsm14BAvx:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsm14BAvx
one_byte_repeat_emit_encodeBlockAsm14BAvx:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsm14BAvx:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_avxUnaligned
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R10
MOVB R9, (BX)
MOVB R10, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R10
MOVW R9, (BX)
MOVB R10, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R10
MOVL R9, (BX)
MOVL R10, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R10
MOVQ R9, (BX)
MOVQ R10, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_tail
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_avxUnaligned:
LEAQ (R8)(DI*1), R10
MOVQ BX, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, BX
ADDQ $0x20, BX
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ BX, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, DI
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (R8), Y4
ADDQ R11, R8
SUBQ R9, DI
emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_gobble_128_loop:
VMOVDQU (R8), Y0
VMOVDQU 32(R8), Y1
VMOVDQU 64(R8), Y2
VMOVDQU 96(R8), Y3
ADDQ R9, R8
VMOVDQA Y0, (BX)
VMOVDQA Y1, 32(BX)
VMOVDQA Y2, 64(BX)
VMOVDQA Y3, 96(BX)
ADDQ R9, BX
SUBQ R9, DI
JA emit_lit_memmove_repeat_emit_encodeBlockAsm14BAvx_memmove_gobble_128_loop
ADDQ R9, DI
ADDQ BX, DI
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(DI)
MOVOU X6, -112(DI)
MOVOU X7, -96(DI)
MOVOU X8, -80(DI)
MOVOU X9, -64(DI)
MOVOU X10, -48(DI)
MOVOU X11, -32(DI)
MOVOU X12, -16(DI)
JMP emit_literal_done_repeat_emit_encodeBlockAsm14BAvx
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsm14BAvx:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsm14BAvx:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsm14BAvx
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsm14BAvx
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsm14BAvx
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsm14BAvx:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsm14BAvx
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_as_copy_encodeBlockAsm14BAvx:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsm14BAvx
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsm14BAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsm14BAvx
emit_repeat_again_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_four_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_three_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
four_bytes_remain_repeat_as_copy_encodeBlockAsm14BAvx:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsm14BAvx
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
two_byte_offset_repeat_as_copy_encodeBlockAsm14BAvx:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsm14BAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_four_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_three_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsm14BAvx_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
two_byte_offset_short_repeat_as_copy_encodeBlockAsm14BAvx:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm14BAvx
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm14BAvx
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm14BAvx
emit_copy_three_repeat_as_copy_encodeBlockAsm14BAvx:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsm14BAvx:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsm14BAvx
JMP search_loop_encodeBlockAsm14BAvx
no_repeat_found_encodeBlockAsm14BAvx:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x32, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsm14BAvx
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsm14BAvx
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsm14BAvx
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsm14BAvx
candidate3_match_encodeBlockAsm14BAvx:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsm14BAvx
candidate2_match_encodeBlockAsm14BAvx:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsm14BAvx:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsm14BAvx
match_extend_back_loop_encodeBlockAsm14BAvx:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsm14BAvx
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsm14BAvx
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsm14BAvx
JMP match_extend_back_loop_encodeBlockAsm14BAvx
match_extend_back_end_encodeBlockAsm14BAvx:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsm14BAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsm14BAvx:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsm14BAvx
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsm14BAvx
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsm14BAvx
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsm14BAvx
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsm14BAvx
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsm14BAvx
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsm14BAvx
four_bytes_match_emit_encodeBlockAsm14BAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsm14BAvx
three_bytes_match_emit_encodeBlockAsm14BAvx:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsm14BAvx
two_bytes_match_emit_encodeBlockAsm14BAvx:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsm14BAvx
one_byte_match_emit_encodeBlockAsm14BAvx:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsm14BAvx:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsm14BAvx
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_avxUnaligned
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), R10
MOVB R9, (DI)
MOVB R10, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), R10
MOVW R9, (DI)
MOVB R10, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), R10
MOVL R9, (DI)
MOVL R10, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), R10
MOVQ R9, (DI)
MOVQ R10, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_tail
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_avxUnaligned:
LEAQ (SI)(R8*1), R10
MOVQ DI, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, DI
ADDQ $0x20, DI
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ DI, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, R8
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (SI), Y4
ADDQ R11, SI
SUBQ R9, R8
emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_gobble_128_loop:
VMOVDQU (SI), Y0
VMOVDQU 32(SI), Y1
VMOVDQU 64(SI), Y2
VMOVDQU 96(SI), Y3
ADDQ R9, SI
VMOVDQA Y0, (DI)
VMOVDQA Y1, 32(DI)
VMOVDQA Y2, 64(DI)
VMOVDQA Y3, 96(DI)
ADDQ R9, DI
SUBQ R9, R8
JA emit_lit_memmove_match_emit_encodeBlockAsm14BAvx_memmove_gobble_128_loop
ADDQ R9, R8
ADDQ DI, R8
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(R8)
MOVOU X6, -112(R8)
MOVOU X7, -96(R8)
MOVOU X8, -80(R8)
MOVOU X9, -64(R8)
MOVOU X10, -48(R8)
MOVOU X11, -32(R8)
MOVOU X12, -16(R8)
JMP emit_literal_done_match_emit_encodeBlockAsm14BAvx
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsm14BAvx:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsm14BAvx:
NOP
match_nolit_loop_encodeBlockAsm14BAvx:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsm14BAvx
matchlen_loopback_match_nolit_encodeBlockAsm14BAvx:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsm14BAvx
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsm14BAvx
matchlen_loop_match_nolit_encodeBlockAsm14BAvx:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsm14BAvx
matchlen_single_match_nolit_encodeBlockAsm14BAvx:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsm14BAvx
matchlen_single_loopback_match_nolit_encodeBlockAsm14BAvx:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsm14BAvx
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsm14BAvx
match_nolit_end_encodeBlockAsm14BAvx:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsm14BAvx
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsm14BAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsm14BAvx
emit_repeat_again_match_nolit_encodeBlockAsm14BAvx_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm14BAvx_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm14BAvx_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm14BAvx_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm14BAvx_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm14BAvx_emit_copy
repeat_five_match_nolit_encodeBlockAsm14BAvx_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_four_match_nolit_encodeBlockAsm14BAvx_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_three_match_nolit_encodeBlockAsm14BAvx_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_two_match_nolit_encodeBlockAsm14BAvx_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
four_bytes_remain_match_nolit_encodeBlockAsm14BAvx:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsm14BAvx
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
two_byte_offset_match_nolit_encodeBlockAsm14BAvx:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsm14BAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm14BAvx_emit_copy_short
repeat_five_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_four_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_three_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_two_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
repeat_two_offset_match_nolit_encodeBlockAsm14BAvx_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
two_byte_offset_short_match_nolit_encodeBlockAsm14BAvx:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsm14BAvx
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsm14BAvx
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm14BAvx
emit_copy_three_match_nolit_encodeBlockAsm14BAvx:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsm14BAvx:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsm14BAvx
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsm14BAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsm14BAvx:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x32, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x32, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsm14BAvx
INCL AX
JMP search_loop_encodeBlockAsm14BAvx
emit_remainder_encodeBlockAsm14BAvx:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsm14BAvx
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsm14BAvx:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsm14BAvx
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsm14BAvx
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsm14BAvx
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsm14BAvx
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsm14BAvx
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsm14BAvx
four_bytes_emit_remainder_encodeBlockAsm14BAvx:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsm14BAvx
three_bytes_emit_remainder_encodeBlockAsm14BAvx:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsm14BAvx
two_bytes_emit_remainder_encodeBlockAsm14BAvx:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsm14BAvx
one_byte_emit_remainder_encodeBlockAsm14BAvx:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsm14BAvx:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_avxUnaligned
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), SI
MOVB DL, (CX)
MOVB SI, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), SI
MOVW DX, (CX)
MOVB SI, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), SI
MOVL DX, (CX)
MOVL SI, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), SI
MOVQ DX, (CX)
MOVQ SI, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_tail
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_avxUnaligned:
LEAQ (AX)(BX*1), SI
MOVQ CX, R8
MOVOU -128(SI), X5
MOVOU -112(SI), X6
MOVQ $0x00000080, DX
ANDQ $0xffffffe0, CX
ADDQ $0x20, CX
MOVOU -96(SI), X7
MOVOU -80(SI), X8
MOVQ CX, DI
SUBQ R8, DI
MOVOU -64(SI), X9
MOVOU -48(SI), X10
SUBQ DI, BX
MOVOU -32(SI), X11
MOVOU -16(SI), X12
VMOVDQU (AX), Y4
ADDQ DI, AX
SUBQ DX, BX
emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_gobble_128_loop:
VMOVDQU (AX), Y0
VMOVDQU 32(AX), Y1
VMOVDQU 64(AX), Y2
VMOVDQU 96(AX), Y3
ADDQ DX, AX
VMOVDQA Y0, (CX)
VMOVDQA Y1, 32(CX)
VMOVDQA Y2, 64(CX)
VMOVDQA Y3, 96(CX)
ADDQ DX, CX
SUBQ DX, BX
JA emit_lit_memmove_emit_remainder_encodeBlockAsm14BAvx_memmove_gobble_128_loop
ADDQ DX, BX
ADDQ CX, BX
VMOVDQU Y4, (R8)
VZEROUPPER
MOVOU X5, -128(BX)
MOVOU X6, -112(BX)
MOVOU X7, -96(BX)
MOVOU X8, -80(BX)
MOVOU X9, -64(BX)
MOVOU X10, -48(BX)
MOVOU X11, -32(BX)
MOVOU X12, -16(BX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm14BAvx
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsm14BAvx:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsm14BAvx:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func encodeBlockAsm12BAvx(dst []byte, src []byte) int
// Requires: AVX, SSE2
TEXT ·encodeBlockAsm12BAvx(SB), $4128-56
MOVQ $0x00000020, AX
LEAQ 32(SP), CX
PXOR X0, X0
zero_loop_encodeBlockAsm12BAvx:
MOVOU X0, (CX)
MOVOU X0, 16(CX)
MOVOU X0, 32(CX)
MOVOU X0, 48(CX)
MOVOU X0, 64(CX)
MOVOU X0, 80(CX)
MOVOU X0, 96(CX)
MOVOU X0, 112(CX)
ADDQ $0x80, CX
DECQ AX
JNZ zero_loop_encodeBlockAsm12BAvx
MOVL AX, 20(SP)
MOVQ src_len+32(FP), AX
LEAQ -5(AX), CX
LEAQ -8(AX), BX
SHRQ $0x05, AX
SUBL AX, CX
MOVL BX, 16(SP)
MOVQ dst_base+0(FP), AX
MOVQ AX, 8(SP)
LEAQ (AX)(CX*1), CX
MOVQ CX, (SP)
MOVL $0x00000001, AX
MOVL AX, 24(SP)
MOVQ src_base+24(FP), CX
search_loop_encodeBlockAsm12BAvx:
MOVQ (CX)(AX*1), SI
MOVL AX, BX
SUBL 20(SP), BX
SHRL $0x04, BX
LEAQ 4(AX)(BX*1), BX
MOVL 16(SP), DI
CMPL BX, DI
JGT emit_remainder_encodeBlockAsm12BAvx
MOVL BX, 28(SP)
MOVQ $0x0000cf1bbcdcbf9b, BX
MOVQ SI, R8
MOVQ SI, R9
SHRQ $0x08, R9
SHLQ $0x10, R8
IMULQ BX, R8
SHRQ $0x34, R8
SHLQ $0x10, R9
IMULQ BX, R9
SHRQ $0x34, R9
MOVL 32(SP)(R8*1), BX
MOVL 32(SP)(R9*1), DI
MOVL AX, 32(SP)(R8*1)
LEAL 1(AX), R8
MOVL R8, 32(SP)(R9*1)
MOVL AX, R8
SUBL 24(SP), R8
MOVL 1(CX)(R8*1), R10
MOVQ SI, R9
SHLQ $0x08, R9
CMPL R9, R10
JNE no_repeat_found_encodeBlockAsm12BAvx
LEAQ 1(AX), SI
MOVL 20(SP), BX
TESTL R8, R8
JZ repeat_extend_back_end_encodeBlockAsm12BAvx
repeat_extend_back_loop_encodeBlockAsm12BAvx:
CMPL SI, BX
JG repeat_extend_back_end_encodeBlockAsm12BAvx
MOVB -1(CX)(R8*1), DL
MOVB -1(CX)(SI*1), DI
CMPB DL, DI
JNE repeat_extend_back_end_encodeBlockAsm12BAvx
LEAQ -1(SI), SI
DECL R8
JZ repeat_extend_back_end_encodeBlockAsm12BAvx
JMP repeat_extend_back_loop_encodeBlockAsm12BAvx
repeat_extend_back_end_encodeBlockAsm12BAvx:
MOVL 20(SP), BX
CMPL BX, SI
JEQ emit_literal_skip_repeat_emit_encodeBlockAsm12BAvx
MOVL SI, DI
MOVL SI, 20(SP)
LEAQ (CX)(BX*1), R8
SUBL BX, DI
MOVQ dst_base+0(FP), BX
MOVQ DI, R9
SUBL $0x01, R9
JC emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
CMPL R9, $0x3c
JLT one_byte_repeat_emit_encodeBlockAsm12BAvx
CMPL R9, $0x00000100
JLT two_bytes_repeat_emit_encodeBlockAsm12BAvx
CMPL R9, $0x00010000
JLT three_bytes_repeat_emit_encodeBlockAsm12BAvx
CMPL R9, $0x01000000
JLT four_bytes_repeat_emit_encodeBlockAsm12BAvx
MOVB $0xfc, (BX)
MOVL R9, 1(BX)
ADDQ $0x05, BX
JMP memmove_repeat_emit_encodeBlockAsm12BAvx
four_bytes_repeat_emit_encodeBlockAsm12BAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (BX)
MOVW R9, 1(BX)
MOVB R10, 3(BX)
ADDQ $0x04, BX
JMP memmove_repeat_emit_encodeBlockAsm12BAvx
three_bytes_repeat_emit_encodeBlockAsm12BAvx:
MOVB $0xf4, (BX)
MOVW R9, 1(BX)
ADDQ $0x03, BX
JMP memmove_repeat_emit_encodeBlockAsm12BAvx
two_bytes_repeat_emit_encodeBlockAsm12BAvx:
MOVB $0xf0, (BX)
MOVB R9, 1(BX)
ADDQ $0x02, BX
JMP memmove_repeat_emit_encodeBlockAsm12BAvx
one_byte_repeat_emit_encodeBlockAsm12BAvx:
SHLB $0x02, R9
MOVB R9, (BX)
ADDQ $0x01, BX
memmove_repeat_emit_encodeBlockAsm12BAvx:
LEAQ (BX)(DI*1), R9
NOP
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_tail:
TESTQ DI, DI
JEQ emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
CMPQ DI, $0x02
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_1or2
CMPQ DI, $0x04
JB emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_3
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_4
CMPQ DI, $0x08
JB emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_5through7
JE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_8
CMPQ DI, $0x10
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_9through16
CMPQ DI, $0x20
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_17through32
CMPQ DI, $0x40
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_33through64
CMPQ DI, $0x80
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_65through128
CMPQ DI, $0x00000100
JBE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_129through256
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_avxUnaligned
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_1or2:
MOVB (R8), R9
MOVB -1(R8)(DI*1), R10
MOVB R9, (BX)
MOVB R10, -1(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_4:
MOVL (R8), R9
MOVL R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_3:
MOVW (R8), R9
MOVB 2(R8), R10
MOVW R9, (BX)
MOVB R10, 2(BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_5through7:
MOVL (R8), R9
MOVL -4(R8)(DI*1), R10
MOVL R9, (BX)
MOVL R10, -4(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_8:
MOVQ (R8), R9
MOVQ R9, (BX)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_9through16:
MOVQ (R8), R9
MOVQ -8(R8)(DI*1), R10
MOVQ R9, (BX)
MOVQ R10, -8(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_17through32:
MOVOU (R8), X0
MOVOU -16(R8)(DI*1), X1
MOVOU X0, (BX)
MOVOU X1, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_33through64:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU -32(R8)(DI*1), X2
MOVOU -16(R8)(DI*1), X3
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, -32(BX)(DI*1)
MOVOU X3, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_65through128:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_129through256:
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU -128(R8)(DI*1), X8
MOVOU -112(R8)(DI*1), X9
MOVOU -96(R8)(DI*1), X10
MOVOU -80(R8)(DI*1), X11
MOVOU -64(R8)(DI*1), X12
MOVOU -48(R8)(DI*1), X13
MOVOU -32(R8)(DI*1), X14
MOVOU -16(R8)(DI*1), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, -128(BX)(DI*1)
MOVOU X9, -112(BX)(DI*1)
MOVOU X10, -96(BX)(DI*1)
MOVOU X11, -80(BX)(DI*1)
MOVOU X12, -64(BX)(DI*1)
MOVOU X13, -48(BX)(DI*1)
MOVOU X14, -32(BX)(DI*1)
MOVOU X15, -16(BX)(DI*1)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_256through2048:
LEAQ -256(DI), DI
MOVOU (R8), X0
MOVOU 16(R8), X1
MOVOU 32(R8), X2
MOVOU 48(R8), X3
MOVOU 64(R8), X4
MOVOU 80(R8), X5
MOVOU 96(R8), X6
MOVOU 112(R8), X7
MOVOU 128(R8), X8
MOVOU 144(R8), X9
MOVOU 160(R8), X10
MOVOU 176(R8), X11
MOVOU 192(R8), X12
MOVOU 208(R8), X13
MOVOU 224(R8), X14
MOVOU 240(R8), X15
MOVOU X0, (BX)
MOVOU X1, 16(BX)
MOVOU X2, 32(BX)
MOVOU X3, 48(BX)
MOVOU X4, 64(BX)
MOVOU X5, 80(BX)
MOVOU X6, 96(BX)
MOVOU X7, 112(BX)
MOVOU X8, 128(BX)
MOVOU X9, 144(BX)
MOVOU X10, 160(BX)
MOVOU X11, 176(BX)
MOVOU X12, 192(BX)
MOVOU X13, 208(BX)
MOVOU X14, 224(BX)
MOVOU X15, 240(BX)
CMPQ DI, $0x00000100
LEAQ 256(R8), R8
LEAQ 256(BX), BX
JGE emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_move_256through2048
JMP emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_tail
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_avxUnaligned:
LEAQ (R8)(DI*1), R10
MOVQ BX, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, BX
ADDQ $0x20, BX
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ BX, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, DI
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (R8), Y4
ADDQ R11, R8
SUBQ R9, DI
emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_gobble_128_loop:
VMOVDQU (R8), Y0
VMOVDQU 32(R8), Y1
VMOVDQU 64(R8), Y2
VMOVDQU 96(R8), Y3
ADDQ R9, R8
VMOVDQA Y0, (BX)
VMOVDQA Y1, 32(BX)
VMOVDQA Y2, 64(BX)
VMOVDQA Y3, 96(BX)
ADDQ R9, BX
SUBQ R9, DI
JA emit_lit_memmove_repeat_emit_encodeBlockAsm12BAvx_memmove_gobble_128_loop
ADDQ R9, DI
ADDQ BX, DI
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(DI)
MOVOU X6, -112(DI)
MOVOU X7, -96(DI)
MOVOU X8, -80(DI)
MOVOU X9, -64(DI)
MOVOU X10, -48(DI)
MOVOU X11, -32(DI)
MOVOU X12, -16(DI)
JMP emit_literal_done_repeat_emit_encodeBlockAsm12BAvx
MOVQ R9, BX
emit_literal_done_repeat_emit_encodeBlockAsm12BAvx:
MOVQ BX, dst_base+0(FP)
emit_literal_skip_repeat_emit_encodeBlockAsm12BAvx:
ADDL $0x05, AX
MOVL AX, BX
SUBL 24(SP), BX
MOVL 16(SP), BX
SUBL AX, BX
XORQ R8, R8
CMPQ BX, $0x08
JL matchlen_single_repeat_extend
matchlen_loopback_repeat_extend:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_repeat_extend
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP repeat_extend_forward_end_encodeBlockAsm12BAvx
matchlen_loop_repeat_extend:
LEAQ -8(BX), BX
LEAQ 8(R8), R8
CMPQ BX, $0x08
JGE matchlen_loopback_repeat_extend
matchlen_single_repeat_extend:
TESTQ BX, BX
JZ repeat_extend_forward_end_encodeBlockAsm12BAvx
matchlen_single_loopback_repeat_extend:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE repeat_extend_forward_end_encodeBlockAsm12BAvx
LEAQ 1(R8), R8
DECQ BX
JNZ matchlen_single_loopback_repeat_extend
repeat_extend_forward_end_encodeBlockAsm12BAvx:
ADDL R8, AX
MOVL AX, BX
SUBL SI, BX
MOVL 24(SP), SI
MOVQ dst_base+0(FP), DI
MOVL 20(SP), R8
TESTL R8, R8
JZ repeat_as_copy_encodeBlockAsm12BAvx
emit_repeat_again_match_repeat_:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_match_repeat_
CMPL R8, $0x0c
JGE cant_repeat_two_offset_match_repeat_
CMPL SI, $0x00000800
JLT repeat_two_offset_match_repeat_
cant_repeat_two_offset_match_repeat_:
CMPL BX, $0x00000104
JLT repeat_three_match_repeat_
CMPL BX, $0x00010100
JLT repeat_four_match_repeat_
CMPL BX, $0x0100ffff
JLT repeat_five_match_repeat_
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_repeat_
repeat_five_match_repeat_:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_four_match_repeat_:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_three_match_repeat_:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_match_repeat_:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_offset_match_repeat_:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_as_copy_encodeBlockAsm12BAvx:
CMPL SI, $0x00010000
JL two_byte_offset_repeat_as_copy_encodeBlockAsm12BAvx
CMPL BX, $0x40
JLE four_bytes_remain_repeat_as_copy_encodeBlockAsm12BAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(BX), BX
ADDQ $0x05, DI
CMPL BX, $0x04
JL four_bytes_remain_repeat_as_copy_encodeBlockAsm12BAvx
emit_repeat_again_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy
repeat_five_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_four_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_three_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
four_bytes_remain_repeat_as_copy_encodeBlockAsm12BAvx:
TESTL BX, BX
JZ repeat_end_emit_encodeBlockAsm12BAvx
MOVB $0x03, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
two_byte_offset_repeat_as_copy_encodeBlockAsm12BAvx:
CMPL BX, $0x40
JLE two_byte_offset_short_repeat_as_copy_encodeBlockAsm12BAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(BX), BX
ADDQ $0x03, DI
emit_repeat_again_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
MOVQ BX, R8
LEAQ -4(BX), BX
CMPL R8, $0x08
JLE repeat_two_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
CMPL R8, $0x0c
JGE cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
cant_repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
CMPL BX, $0x00000104
JLT repeat_three_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
CMPL BX, $0x00010100
JLT repeat_four_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
CMPL BX, $0x0100ffff
JLT repeat_five_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
LEAQ -16842747(BX), BX
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short
repeat_five_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -65536(BX), BX
MOVQ BX, SI
MOVW $0x001d, (DI)
MOVW BX, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_four_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -256(BX), BX
MOVW $0x0019, (DI)
MOVW BX, 2(DI)
ADDQ $0x04, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_three_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -4(BX), BX
MOVW $0x0015, (DI)
MOVB BL, 2(DI)
ADDQ $0x03, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
SHLL $0x02, BX
ORL $0x01, BX
MOVW BX, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
repeat_two_offset_repeat_as_copy_encodeBlockAsm12BAvx_emit_copy_short:
XORQ R8, R8
LEAQ 1(R8)(BX*4), BX
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
two_byte_offset_short_repeat_as_copy_encodeBlockAsm12BAvx:
CMPL BX, $0x0c
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm12BAvx
CMPL SI, $0x00000800
JGE emit_copy_three_repeat_as_copy_encodeBlockAsm12BAvx
MOVB $0x01, DL
LEAQ -16(DX)(BX*4), BX
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, BX
MOVB BL, (DI)
ADDQ $0x02, DI
JMP repeat_end_emit_encodeBlockAsm12BAvx
emit_copy_three_repeat_as_copy_encodeBlockAsm12BAvx:
MOVB $0x02, DL
LEAQ -4(DX)(BX*4), BX
MOVB BL, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
repeat_end_emit_encodeBlockAsm12BAvx:
MOVQ DI, dst_base+0(FP)
MOVL 16(SP), BX
CMPL AX, BX
JGT emit_remainder_encodeBlockAsm12BAvx
JMP search_loop_encodeBlockAsm12BAvx
no_repeat_found_encodeBlockAsm12BAvx:
MOVQ $0x0000cf1bbcdcbf9b, R9
MOVQ SI, R8
SHRQ $0x10, R8
SHLQ $0x10, R8
IMULQ R9, R8
SHRQ $0x34, R8
CMPL (CX)(BX*1), SI
SHRQ $0x08, SI
JEQ candidate_match_encodeBlockAsm12BAvx
MOVL 32(SP)(R8*1), BX
CMPL (CX)(DI*1), SI
JEQ candidate2_match_encodeBlockAsm12BAvx
LEAQ 2(AX), DI
MOVL DI, 32(SP)(R8*1)
SHRQ $0x08, SI
CMPL (CX)(BX*1), SI
JEQ candidate3_match_encodeBlockAsm12BAvx
MOVL 28(SP), AX
JMP search_loop_encodeBlockAsm12BAvx
candidate3_match_encodeBlockAsm12BAvx:
ADDL $0x02, AX
JMP candidate_match_encodeBlockAsm12BAvx
candidate2_match_encodeBlockAsm12BAvx:
LEAQ -2(AX), BX
MOVL BX, 32(SP)(R8*1)
INCL AX
MOVL DI, BX
candidate_match_encodeBlockAsm12BAvx:
MOVL 20(SP), SI
TESTL BX, BX
JZ match_extend_back_end_encodeBlockAsm12BAvx
match_extend_back_loop_encodeBlockAsm12BAvx:
CMPL AX, SI
JG match_extend_back_end_encodeBlockAsm12BAvx
MOVB -1(CX)(BX*1), DL
MOVB -1(CX)(AX*1), DI
CMPB DL, DI
JNE match_extend_back_end_encodeBlockAsm12BAvx
LEAL -1(AX), AX
DECL BX
JZ match_extend_back_end_encodeBlockAsm12BAvx
JMP match_extend_back_loop_encodeBlockAsm12BAvx
match_extend_back_end_encodeBlockAsm12BAvx:
MOVL AX, SI
SUBL 20(SP), SI
LEAQ dst_base+0(FP)(SI*1), SI
CMPQ SI, (SP)
JL match_dst_size_check_encodeBlockAsm12BAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_dst_size_check_encodeBlockAsm12BAvx:
MOVL BX, SI
MOVL 20(SP), DI
CMPL DI, SI
JEQ emit_literal_skip_match_emit_encodeBlockAsm12BAvx
MOVL SI, R8
MOVL SI, 20(SP)
LEAQ (CX)(DI*1), SI
SUBL DI, R8
MOVQ dst_base+0(FP), DI
MOVQ R8, R9
SUBL $0x01, R9
JC emit_literal_done_match_emit_encodeBlockAsm12BAvx
CMPL R9, $0x3c
JLT one_byte_match_emit_encodeBlockAsm12BAvx
CMPL R9, $0x00000100
JLT two_bytes_match_emit_encodeBlockAsm12BAvx
CMPL R9, $0x00010000
JLT three_bytes_match_emit_encodeBlockAsm12BAvx
CMPL R9, $0x01000000
JLT four_bytes_match_emit_encodeBlockAsm12BAvx
MOVB $0xfc, (DI)
MOVL R9, 1(DI)
ADDQ $0x05, DI
JMP memmove_match_emit_encodeBlockAsm12BAvx
four_bytes_match_emit_encodeBlockAsm12BAvx:
MOVQ R9, R10
SHRL $0x10, R10
MOVB $0xf8, (DI)
MOVW R9, 1(DI)
MOVB R10, 3(DI)
ADDQ $0x04, DI
JMP memmove_match_emit_encodeBlockAsm12BAvx
three_bytes_match_emit_encodeBlockAsm12BAvx:
MOVB $0xf4, (DI)
MOVW R9, 1(DI)
ADDQ $0x03, DI
JMP memmove_match_emit_encodeBlockAsm12BAvx
two_bytes_match_emit_encodeBlockAsm12BAvx:
MOVB $0xf0, (DI)
MOVB R9, 1(DI)
ADDQ $0x02, DI
JMP memmove_match_emit_encodeBlockAsm12BAvx
one_byte_match_emit_encodeBlockAsm12BAvx:
SHLB $0x02, R9
MOVB R9, (DI)
ADDQ $0x01, DI
memmove_match_emit_encodeBlockAsm12BAvx:
LEAQ (DI)(R8*1), R9
NOP
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_tail:
TESTQ R8, R8
JEQ emit_literal_done_match_emit_encodeBlockAsm12BAvx
CMPQ R8, $0x02
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_1or2
CMPQ R8, $0x04
JB emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_3
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_4
CMPQ R8, $0x08
JB emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_5through7
JE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_8
CMPQ R8, $0x10
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_9through16
CMPQ R8, $0x20
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_17through32
CMPQ R8, $0x40
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_33through64
CMPQ R8, $0x80
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_65through128
CMPQ R8, $0x00000100
JBE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_129through256
JMP emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_avxUnaligned
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_1or2:
MOVB (SI), R9
MOVB -1(SI)(R8*1), R10
MOVB R9, (DI)
MOVB R10, -1(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_4:
MOVL (SI), R9
MOVL R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_3:
MOVW (SI), R9
MOVB 2(SI), R10
MOVW R9, (DI)
MOVB R10, 2(DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_5through7:
MOVL (SI), R9
MOVL -4(SI)(R8*1), R10
MOVL R9, (DI)
MOVL R10, -4(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_8:
MOVQ (SI), R9
MOVQ R9, (DI)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_9through16:
MOVQ (SI), R9
MOVQ -8(SI)(R8*1), R10
MOVQ R9, (DI)
MOVQ R10, -8(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_17through32:
MOVOU (SI), X0
MOVOU -16(SI)(R8*1), X1
MOVOU X0, (DI)
MOVOU X1, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_33through64:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU -32(SI)(R8*1), X2
MOVOU -16(SI)(R8*1), X3
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, -32(DI)(R8*1)
MOVOU X3, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_65through128:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_129through256:
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU -128(SI)(R8*1), X8
MOVOU -112(SI)(R8*1), X9
MOVOU -96(SI)(R8*1), X10
MOVOU -80(SI)(R8*1), X11
MOVOU -64(SI)(R8*1), X12
MOVOU -48(SI)(R8*1), X13
MOVOU -32(SI)(R8*1), X14
MOVOU -16(SI)(R8*1), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, -128(DI)(R8*1)
MOVOU X9, -112(DI)(R8*1)
MOVOU X10, -96(DI)(R8*1)
MOVOU X11, -80(DI)(R8*1)
MOVOU X12, -64(DI)(R8*1)
MOVOU X13, -48(DI)(R8*1)
MOVOU X14, -32(DI)(R8*1)
MOVOU X15, -16(DI)(R8*1)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_256through2048:
LEAQ -256(R8), R8
MOVOU (SI), X0
MOVOU 16(SI), X1
MOVOU 32(SI), X2
MOVOU 48(SI), X3
MOVOU 64(SI), X4
MOVOU 80(SI), X5
MOVOU 96(SI), X6
MOVOU 112(SI), X7
MOVOU 128(SI), X8
MOVOU 144(SI), X9
MOVOU 160(SI), X10
MOVOU 176(SI), X11
MOVOU 192(SI), X12
MOVOU 208(SI), X13
MOVOU 224(SI), X14
MOVOU 240(SI), X15
MOVOU X0, (DI)
MOVOU X1, 16(DI)
MOVOU X2, 32(DI)
MOVOU X3, 48(DI)
MOVOU X4, 64(DI)
MOVOU X5, 80(DI)
MOVOU X6, 96(DI)
MOVOU X7, 112(DI)
MOVOU X8, 128(DI)
MOVOU X9, 144(DI)
MOVOU X10, 160(DI)
MOVOU X11, 176(DI)
MOVOU X12, 192(DI)
MOVOU X13, 208(DI)
MOVOU X14, 224(DI)
MOVOU X15, 240(DI)
CMPQ R8, $0x00000100
LEAQ 256(SI), SI
LEAQ 256(DI), DI
JGE emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_move_256through2048
JMP emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_tail
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_avxUnaligned:
LEAQ (SI)(R8*1), R10
MOVQ DI, R12
MOVOU -128(R10), X5
MOVOU -112(R10), X6
MOVQ $0x00000080, R9
ANDQ $0xffffffe0, DI
ADDQ $0x20, DI
MOVOU -96(R10), X7
MOVOU -80(R10), X8
MOVQ DI, R11
SUBQ R12, R11
MOVOU -64(R10), X9
MOVOU -48(R10), X10
SUBQ R11, R8
MOVOU -32(R10), X11
MOVOU -16(R10), X12
VMOVDQU (SI), Y4
ADDQ R11, SI
SUBQ R9, R8
emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_gobble_128_loop:
VMOVDQU (SI), Y0
VMOVDQU 32(SI), Y1
VMOVDQU 64(SI), Y2
VMOVDQU 96(SI), Y3
ADDQ R9, SI
VMOVDQA Y0, (DI)
VMOVDQA Y1, 32(DI)
VMOVDQA Y2, 64(DI)
VMOVDQA Y3, 96(DI)
ADDQ R9, DI
SUBQ R9, R8
JA emit_lit_memmove_match_emit_encodeBlockAsm12BAvx_memmove_gobble_128_loop
ADDQ R9, R8
ADDQ DI, R8
VMOVDQU Y4, (R12)
VZEROUPPER
MOVOU X5, -128(R8)
MOVOU X6, -112(R8)
MOVOU X7, -96(R8)
MOVOU X8, -80(R8)
MOVOU X9, -64(R8)
MOVOU X10, -48(R8)
MOVOU X11, -32(R8)
MOVOU X12, -16(R8)
JMP emit_literal_done_match_emit_encodeBlockAsm12BAvx
MOVQ R9, DI
emit_literal_done_match_emit_encodeBlockAsm12BAvx:
MOVQ DI, dst_base+0(FP)
emit_literal_skip_match_emit_encodeBlockAsm12BAvx:
NOP
match_nolit_loop_encodeBlockAsm12BAvx:
MOVL AX, SI
MOVL AX, SI
SUBL BX, SI
MOVL SI, 24(SP)
ADDL $0x04, AX
ADDL $0x04, BX
MOVL 16(SP), SI
SUBL AX, SI
XORQ R8, R8
CMPQ SI, $0x08
JL matchlen_single_match_nolit_encodeBlockAsm12BAvx
matchlen_loopback_match_nolit_encodeBlockAsm12BAvx:
MOVQ (CX)(R8*1), DI
XORQ (CX)(R8*1), DI
TESTQ DI, DI
JZ matchlen_loop_match_nolit_encodeBlockAsm12BAvx
BSFQ DI, DI
SARQ $0x03, DI
LEAQ (R8)(DI*1), R8
JMP match_nolit_end_encodeBlockAsm12BAvx
matchlen_loop_match_nolit_encodeBlockAsm12BAvx:
LEAQ -8(SI), SI
LEAQ 8(R8), R8
CMPQ SI, $0x08
JGE matchlen_loopback_match_nolit_encodeBlockAsm12BAvx
matchlen_single_match_nolit_encodeBlockAsm12BAvx:
TESTQ SI, SI
JZ match_nolit_end_encodeBlockAsm12BAvx
matchlen_single_loopback_match_nolit_encodeBlockAsm12BAvx:
MOVB (CX)(R8*1), DI
CMPB (CX)(R8*1), DI
JNE match_nolit_end_encodeBlockAsm12BAvx
LEAQ 1(R8), R8
DECQ SI
JNZ matchlen_single_loopback_match_nolit_encodeBlockAsm12BAvx
match_nolit_end_encodeBlockAsm12BAvx:
MOVL 24(SP), SI
ADDQ $0x04, R8
MOVQ dst_base+0(FP), DI
ADDL R8, AX
CMPL SI, $0x00010000
JL two_byte_offset_match_nolit_encodeBlockAsm12BAvx
CMPL R8, $0x40
JLE four_bytes_remain_match_nolit_encodeBlockAsm12BAvx
MOVB $0xff, (DI)
MOVD SI, 1(DI)
LEAQ -64(R8), R8
ADDQ $0x05, DI
CMPL R8, $0x04
JL four_bytes_remain_match_nolit_encodeBlockAsm12BAvx
emit_repeat_again_match_nolit_encodeBlockAsm12BAvx_emit_copy:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm12BAvx_emit_copy
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy
cant_repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm12BAvx_emit_copy
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm12BAvx_emit_copy
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm12BAvx_emit_copy
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm12BAvx_emit_copy
repeat_five_match_nolit_encodeBlockAsm12BAvx_emit_copy:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_four_match_nolit_encodeBlockAsm12BAvx_emit_copy:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_three_match_nolit_encodeBlockAsm12BAvx_emit_copy:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_two_match_nolit_encodeBlockAsm12BAvx_emit_copy:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
four_bytes_remain_match_nolit_encodeBlockAsm12BAvx:
TESTL R8, R8
JZ match_nolit_emitcopy_end_encodeBlockAsm12BAvx
MOVB $0x03, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVD SI, 1(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
two_byte_offset_match_nolit_encodeBlockAsm12BAvx:
CMPL R8, $0x40
JLE two_byte_offset_short_match_nolit_encodeBlockAsm12BAvx
MOVB $0xee, (DI)
MOVW SI, 1(DI)
LEAQ -60(R8), R8
ADDQ $0x03, DI
emit_repeat_again_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
MOVQ R8, R9
LEAQ -4(R8), R8
CMPL R9, $0x08
JLE repeat_two_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
CMPL R9, $0x0c
JGE cant_repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
CMPL SI, $0x00000800
JLT repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
cant_repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
CMPL R8, $0x00000104
JLT repeat_three_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
CMPL R8, $0x00010100
JLT repeat_four_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
CMPL R8, $0x0100ffff
JLT repeat_five_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
LEAQ -16842747(R8), R8
MOVW $0x001d, (DI)
MOVW $0xfffb, 2(DI)
MOVB $0xff, 4(DI)
ADDQ $0x05, DI
JMP emit_repeat_again_match_nolit_encodeBlockAsm12BAvx_emit_copy_short
repeat_five_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -65536(R8), R8
MOVQ R8, SI
MOVW $0x001d, (DI)
MOVW R8, 2(DI)
SARQ $0x10, SI
MOVB SI, 4(DI)
ADDQ $0x05, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_four_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -256(R8), R8
MOVW $0x0019, (DI)
MOVW R8, 2(DI)
ADDQ $0x04, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_three_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
LEAQ -4(R8), R8
MOVW $0x0015, (DI)
MOVB R8, 2(DI)
ADDQ $0x03, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_two_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
SHLL $0x02, R8
ORL $0x01, R8
MOVW R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
repeat_two_offset_match_nolit_encodeBlockAsm12BAvx_emit_copy_short:
XORQ R9, R9
LEAQ 1(R9)(R8*4), R8
MOVB SI, 1(DI)
SARL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
two_byte_offset_short_match_nolit_encodeBlockAsm12BAvx:
CMPL R8, $0x0c
JGE emit_copy_three_match_nolit_encodeBlockAsm12BAvx
CMPL SI, $0x00000800
JGE emit_copy_three_match_nolit_encodeBlockAsm12BAvx
MOVB $0x01, DL
LEAQ -16(DX)(R8*4), R8
MOVB SI, 1(DI)
SHRL $0x08, SI
SHLL $0x05, SI
ORL SI, R8
MOVB R8, (DI)
ADDQ $0x02, DI
JMP match_nolit_emitcopy_end_encodeBlockAsm12BAvx
emit_copy_three_match_nolit_encodeBlockAsm12BAvx:
MOVB $0x02, DL
LEAQ -4(DX)(R8*4), R8
MOVB R8, (DI)
MOVW SI, 1(DI)
ADDQ $0x03, DI
match_nolit_emitcopy_end_encodeBlockAsm12BAvx:
MOVQ DI, dst_base+0(FP)
MOVL AX, 20(SP)
CMPL AX, 16(SP)
JGE emit_remainder_encodeBlockAsm12BAvx
CMPQ DI, (SP)
JL match_nolit_dst_ok_encodeBlockAsm12BAvx
MOVQ $0x00000000, ret+48(FP)
RET
match_nolit_dst_ok_encodeBlockAsm12BAvx:
MOVQ -2(CX)(AX*1), SI
MOVQ $0x0000cf1bbcdcbf9b, DI
MOVQ SI, R8
SHRQ $0x10, SI
MOVQ SI, R9
SHLQ $0x10, R8
IMULQ DI, R8
SHRQ $0x34, R8
SHLQ $0x10, R9
IMULQ DI, R9
SHRQ $0x34, R9
MOVL 32(SP)(R8*1), DI
MOVL 32(SP)(R9*1), DI
LEAQ -2(AX), DI
MOVL DI, 32(SP)(R8*1)
MOVL AX, 32(SP)(R9*1)
CMPL (CX)(R9*1), SI
JEQ match_nolit_loop_encodeBlockAsm12BAvx
INCL AX
JMP search_loop_encodeBlockAsm12BAvx
emit_remainder_encodeBlockAsm12BAvx:
MOVQ src_len+32(FP), AX
SUBL 20(SP), AX
MOVQ dst_base+0(FP), DX
LEAQ (DX)(AX*1), DX
CMPQ DX, (SP)
JL emit_remainder_ok_encodeBlockAsm12BAvx
MOVQ $0x00000000, ret+48(FP)
RET
emit_remainder_ok_encodeBlockAsm12BAvx:
MOVQ src_len+32(FP), AX
MOVL 20(SP), DX
CMPL DX, AX
JEQ emit_literal_skip_emit_remainder_encodeBlockAsm12BAvx
MOVL AX, BX
MOVL AX, 20(SP)
LEAQ (CX)(DX*1), AX
SUBL DX, BX
MOVQ dst_base+0(FP), CX
MOVQ BX, DX
SUBL $0x01, DX
JC emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
CMPL DX, $0x3c
JLT one_byte_emit_remainder_encodeBlockAsm12BAvx
CMPL DX, $0x00000100
JLT two_bytes_emit_remainder_encodeBlockAsm12BAvx
CMPL DX, $0x00010000
JLT three_bytes_emit_remainder_encodeBlockAsm12BAvx
CMPL DX, $0x01000000
JLT four_bytes_emit_remainder_encodeBlockAsm12BAvx
MOVB $0xfc, (CX)
MOVL DX, 1(CX)
ADDQ $0x05, CX
JMP memmove_emit_remainder_encodeBlockAsm12BAvx
four_bytes_emit_remainder_encodeBlockAsm12BAvx:
MOVQ DX, SI
SHRL $0x10, SI
MOVB $0xf8, (CX)
MOVW DX, 1(CX)
MOVB SI, 3(CX)
ADDQ $0x04, CX
JMP memmove_emit_remainder_encodeBlockAsm12BAvx
three_bytes_emit_remainder_encodeBlockAsm12BAvx:
MOVB $0xf4, (CX)
MOVW DX, 1(CX)
ADDQ $0x03, CX
JMP memmove_emit_remainder_encodeBlockAsm12BAvx
two_bytes_emit_remainder_encodeBlockAsm12BAvx:
MOVB $0xf0, (CX)
MOVB DL, 1(CX)
ADDQ $0x02, CX
JMP memmove_emit_remainder_encodeBlockAsm12BAvx
one_byte_emit_remainder_encodeBlockAsm12BAvx:
SHLB $0x02, DL
MOVB DL, (CX)
ADDQ $0x01, CX
memmove_emit_remainder_encodeBlockAsm12BAvx:
LEAQ (CX)(BX*1), DX
NOP
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_tail:
TESTQ BX, BX
JEQ emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
CMPQ BX, $0x02
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_1or2
CMPQ BX, $0x04
JB emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_3
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_4
CMPQ BX, $0x08
JB emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_5through7
JE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_8
CMPQ BX, $0x10
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_9through16
CMPQ BX, $0x20
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_17through32
CMPQ BX, $0x40
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_33through64
CMPQ BX, $0x80
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_65through128
CMPQ BX, $0x00000100
JBE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_129through256
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_avxUnaligned
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_1or2:
MOVB (AX), DL
MOVB -1(AX)(BX*1), SI
MOVB DL, (CX)
MOVB SI, -1(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_4:
MOVL (AX), DX
MOVL DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_3:
MOVW (AX), DX
MOVB 2(AX), SI
MOVW DX, (CX)
MOVB SI, 2(CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_5through7:
MOVL (AX), DX
MOVL -4(AX)(BX*1), SI
MOVL DX, (CX)
MOVL SI, -4(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_8:
MOVQ (AX), DX
MOVQ DX, (CX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_9through16:
MOVQ (AX), DX
MOVQ -8(AX)(BX*1), SI
MOVQ DX, (CX)
MOVQ SI, -8(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_17through32:
MOVOU (AX), X0
MOVOU -16(AX)(BX*1), X1
MOVOU X0, (CX)
MOVOU X1, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_33through64:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU -32(AX)(BX*1), X2
MOVOU -16(AX)(BX*1), X3
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, -32(CX)(BX*1)
MOVOU X3, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_65through128:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_129through256:
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU -128(AX)(BX*1), X8
MOVOU -112(AX)(BX*1), X9
MOVOU -96(AX)(BX*1), X10
MOVOU -80(AX)(BX*1), X11
MOVOU -64(AX)(BX*1), X12
MOVOU -48(AX)(BX*1), X13
MOVOU -32(AX)(BX*1), X14
MOVOU -16(AX)(BX*1), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, -128(CX)(BX*1)
MOVOU X9, -112(CX)(BX*1)
MOVOU X10, -96(CX)(BX*1)
MOVOU X11, -80(CX)(BX*1)
MOVOU X12, -64(CX)(BX*1)
MOVOU X13, -48(CX)(BX*1)
MOVOU X14, -32(CX)(BX*1)
MOVOU X15, -16(CX)(BX*1)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_256through2048:
LEAQ -256(BX), BX
MOVOU (AX), X0
MOVOU 16(AX), X1
MOVOU 32(AX), X2
MOVOU 48(AX), X3
MOVOU 64(AX), X4
MOVOU 80(AX), X5
MOVOU 96(AX), X6
MOVOU 112(AX), X7
MOVOU 128(AX), X8
MOVOU 144(AX), X9
MOVOU 160(AX), X10
MOVOU 176(AX), X11
MOVOU 192(AX), X12
MOVOU 208(AX), X13
MOVOU 224(AX), X14
MOVOU 240(AX), X15
MOVOU X0, (CX)
MOVOU X1, 16(CX)
MOVOU X2, 32(CX)
MOVOU X3, 48(CX)
MOVOU X4, 64(CX)
MOVOU X5, 80(CX)
MOVOU X6, 96(CX)
MOVOU X7, 112(CX)
MOVOU X8, 128(CX)
MOVOU X9, 144(CX)
MOVOU X10, 160(CX)
MOVOU X11, 176(CX)
MOVOU X12, 192(CX)
MOVOU X13, 208(CX)
MOVOU X14, 224(CX)
MOVOU X15, 240(CX)
CMPQ BX, $0x00000100
LEAQ 256(AX), AX
LEAQ 256(CX), CX
JGE emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_move_256through2048
JMP emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_tail
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_avxUnaligned:
LEAQ (AX)(BX*1), SI
MOVQ CX, R8
MOVOU -128(SI), X5
MOVOU -112(SI), X6
MOVQ $0x00000080, DX
ANDQ $0xffffffe0, CX
ADDQ $0x20, CX
MOVOU -96(SI), X7
MOVOU -80(SI), X8
MOVQ CX, DI
SUBQ R8, DI
MOVOU -64(SI), X9
MOVOU -48(SI), X10
SUBQ DI, BX
MOVOU -32(SI), X11
MOVOU -16(SI), X12
VMOVDQU (AX), Y4
ADDQ DI, AX
SUBQ DX, BX
emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_gobble_128_loop:
VMOVDQU (AX), Y0
VMOVDQU 32(AX), Y1
VMOVDQU 64(AX), Y2
VMOVDQU 96(AX), Y3
ADDQ DX, AX
VMOVDQA Y0, (CX)
VMOVDQA Y1, 32(CX)
VMOVDQA Y2, 64(CX)
VMOVDQA Y3, 96(CX)
ADDQ DX, CX
SUBQ DX, BX
JA emit_lit_memmove_emit_remainder_encodeBlockAsm12BAvx_memmove_gobble_128_loop
ADDQ DX, BX
ADDQ CX, BX
VMOVDQU Y4, (R8)
VZEROUPPER
MOVOU X5, -128(BX)
MOVOU X6, -112(BX)
MOVOU X7, -96(BX)
MOVOU X8, -80(BX)
MOVOU X9, -64(BX)
MOVOU X10, -48(BX)
MOVOU X11, -32(BX)
MOVOU X12, -16(BX)
JMP emit_literal_done_emit_remainder_encodeBlockAsm12BAvx
MOVQ DX, CX
emit_literal_done_emit_remainder_encodeBlockAsm12BAvx:
MOVQ CX, dst_base+0(FP)
emit_literal_skip_emit_remainder_encodeBlockAsm12BAvx:
MOVQ 8(SP), AX
SUBQ dst_base+0(FP), AX
MOVQ AX, ret+48(FP)
RET
// func emitLiteral(dst []byte, lit []byte) int
// Requires: SSE2
TEXT ·emitLiteral(SB), NOSPLIT, $0-56
MOVQ dst_base+0(FP), AX
MOVQ lit_base+24(FP), CX
MOVQ lit_len+32(FP), DX
MOVQ DX, BX
MOVQ DX, SI
SUBL $0x01, SI
JC emit_literal_end_standalone
CMPL SI, $0x3c
JLT one_byte_standalone
CMPL SI, $0x00000100
JLT two_bytes_standalone
CMPL SI, $0x00010000
JLT three_bytes_standalone
CMPL SI, $0x01000000
JLT four_bytes_standalone
MOVB $0xfc, (AX)
MOVL SI, 1(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP memmove_standalone
four_bytes_standalone:
MOVQ SI, DI
SHRL $0x10, DI
MOVB $0xf8, (AX)
MOVW SI, 1(AX)
MOVB DI, 3(AX)
ADDQ $0x04, BX
ADDQ $0x04, AX
JMP memmove_standalone
three_bytes_standalone:
MOVB $0xf4, (AX)
MOVW SI, 1(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
JMP memmove_standalone
two_bytes_standalone:
MOVB $0xf0, (AX)
MOVB SI, 1(AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP memmove_standalone
one_byte_standalone:
SHLB $0x02, SI
MOVB SI, (AX)
ADDQ $0x01, BX
ADDQ $0x01, AX
memmove_standalone:
NOP
emit_lit_memmove_standalone_memmove_tail:
TESTQ DX, DX
JEQ emit_literal_end_standalone
CMPQ DX, $0x02
JBE emit_lit_memmove_standalone_memmove_move_1or2
CMPQ DX, $0x04
JB emit_lit_memmove_standalone_memmove_move_3
JBE emit_lit_memmove_standalone_memmove_move_4
CMPQ DX, $0x08
JB emit_lit_memmove_standalone_memmove_move_5through7
JE emit_lit_memmove_standalone_memmove_move_8
CMPQ DX, $0x10
JBE emit_lit_memmove_standalone_memmove_move_9through16
CMPQ DX, $0x20
JBE emit_lit_memmove_standalone_memmove_move_17through32
CMPQ DX, $0x40
JBE emit_lit_memmove_standalone_memmove_move_33through64
CMPQ DX, $0x80
JBE emit_lit_memmove_standalone_memmove_move_65through128
CMPQ DX, $0x00000100
JBE emit_lit_memmove_standalone_memmove_move_129through256
JMP emit_lit_memmove_standalone_memmove_move_256through2048
emit_lit_memmove_standalone_memmove_move_1or2:
MOVB (CX), SI
MOVB -1(CX)(DX*1), CL
MOVB SI, (AX)
MOVB CL, -1(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_4:
MOVL (CX), SI
MOVL SI, (AX)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_3:
MOVW (CX), SI
MOVB 2(CX), CL
MOVW SI, (AX)
MOVB CL, 2(AX)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_5through7:
MOVL (CX), SI
MOVL -4(CX)(DX*1), CX
MOVL SI, (AX)
MOVL CX, -4(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_8:
MOVQ (CX), SI
MOVQ SI, (AX)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_9through16:
MOVQ (CX), SI
MOVQ -8(CX)(DX*1), CX
MOVQ SI, (AX)
MOVQ CX, -8(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_17through32:
MOVOU (CX), X0
MOVOU -16(CX)(DX*1), X1
MOVOU X0, (AX)
MOVOU X1, -16(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_33through64:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU -32(CX)(DX*1), X2
MOVOU -16(CX)(DX*1), X3
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, -32(AX)(DX*1)
MOVOU X3, -16(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_65through128:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU -64(CX)(DX*1), X12
MOVOU -48(CX)(DX*1), X13
MOVOU -32(CX)(DX*1), X14
MOVOU -16(CX)(DX*1), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X12, -64(AX)(DX*1)
MOVOU X13, -48(AX)(DX*1)
MOVOU X14, -32(AX)(DX*1)
MOVOU X15, -16(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_129through256:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU 64(CX), X4
MOVOU 80(CX), X5
MOVOU 96(CX), X6
MOVOU 112(CX), X7
MOVOU -128(CX)(DX*1), X8
MOVOU -112(CX)(DX*1), X9
MOVOU -96(CX)(DX*1), X10
MOVOU -80(CX)(DX*1), X11
MOVOU -64(CX)(DX*1), X12
MOVOU -48(CX)(DX*1), X13
MOVOU -32(CX)(DX*1), X14
MOVOU -16(CX)(DX*1), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X4, 64(AX)
MOVOU X5, 80(AX)
MOVOU X6, 96(AX)
MOVOU X7, 112(AX)
MOVOU X8, -128(AX)(DX*1)
MOVOU X9, -112(AX)(DX*1)
MOVOU X10, -96(AX)(DX*1)
MOVOU X11, -80(AX)(DX*1)
MOVOU X12, -64(AX)(DX*1)
MOVOU X13, -48(AX)(DX*1)
MOVOU X14, -32(AX)(DX*1)
MOVOU X15, -16(AX)(DX*1)
JMP emit_literal_end_standalone
emit_lit_memmove_standalone_memmove_move_256through2048:
LEAQ -256(DX), DX
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU 64(CX), X4
MOVOU 80(CX), X5
MOVOU 96(CX), X6
MOVOU 112(CX), X7
MOVOU 128(CX), X8
MOVOU 144(CX), X9
MOVOU 160(CX), X10
MOVOU 176(CX), X11
MOVOU 192(CX), X12
MOVOU 208(CX), X13
MOVOU 224(CX), X14
MOVOU 240(CX), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X4, 64(AX)
MOVOU X5, 80(AX)
MOVOU X6, 96(AX)
MOVOU X7, 112(AX)
MOVOU X8, 128(AX)
MOVOU X9, 144(AX)
MOVOU X10, 160(AX)
MOVOU X11, 176(AX)
MOVOU X12, 192(AX)
MOVOU X13, 208(AX)
MOVOU X14, 224(AX)
MOVOU X15, 240(AX)
CMPQ DX, $0x00000100
LEAQ 256(CX), CX
LEAQ 256(AX), AX
JGE emit_lit_memmove_standalone_memmove_move_256through2048
JMP emit_lit_memmove_standalone_memmove_tail
emit_literal_end_standalone:
MOVQ BX, ret+48(FP)
RET
// func emitLiteralAvx(dst []byte, lit []byte) int
// Requires: AVX, SSE2
TEXT ·emitLiteralAvx(SB), NOSPLIT, $0-56
MOVQ dst_base+0(FP), AX
MOVQ lit_base+24(FP), CX
MOVQ lit_len+32(FP), DX
MOVQ DX, BX
MOVQ DX, SI
SUBL $0x01, SI
JC emit_literal_end_avx_standalone
CMPL SI, $0x3c
JLT one_byte_standalone
CMPL SI, $0x00000100
JLT two_bytes_standalone
CMPL SI, $0x00010000
JLT three_bytes_standalone
CMPL SI, $0x01000000
JLT four_bytes_standalone
MOVB $0xfc, (AX)
MOVL SI, 1(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP memmove_standalone
four_bytes_standalone:
MOVQ SI, DI
SHRL $0x10, DI
MOVB $0xf8, (AX)
MOVW SI, 1(AX)
MOVB DI, 3(AX)
ADDQ $0x04, BX
ADDQ $0x04, AX
JMP memmove_standalone
three_bytes_standalone:
MOVB $0xf4, (AX)
MOVW SI, 1(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
JMP memmove_standalone
two_bytes_standalone:
MOVB $0xf0, (AX)
MOVB SI, 1(AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP memmove_standalone
one_byte_standalone:
SHLB $0x02, SI
MOVB SI, (AX)
ADDQ $0x01, BX
ADDQ $0x01, AX
memmove_standalone:
NOP
emit_lit_memmove_standalone_memmove_tail:
TESTQ DX, DX
JEQ emit_literal_end_avx_standalone
CMPQ DX, $0x02
JBE emit_lit_memmove_standalone_memmove_move_1or2
CMPQ DX, $0x04
JB emit_lit_memmove_standalone_memmove_move_3
JBE emit_lit_memmove_standalone_memmove_move_4
CMPQ DX, $0x08
JB emit_lit_memmove_standalone_memmove_move_5through7
JE emit_lit_memmove_standalone_memmove_move_8
CMPQ DX, $0x10
JBE emit_lit_memmove_standalone_memmove_move_9through16
CMPQ DX, $0x20
JBE emit_lit_memmove_standalone_memmove_move_17through32
CMPQ DX, $0x40
JBE emit_lit_memmove_standalone_memmove_move_33through64
CMPQ DX, $0x80
JBE emit_lit_memmove_standalone_memmove_move_65through128
CMPQ DX, $0x00000100
JBE emit_lit_memmove_standalone_memmove_move_129through256
JMP emit_lit_memmove_standalone_memmove_avxUnaligned
emit_lit_memmove_standalone_memmove_move_1or2:
MOVB (CX), SI
MOVB -1(CX)(DX*1), DI
MOVB SI, (AX)
MOVB DI, -1(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_4:
MOVL (CX), SI
MOVL SI, (AX)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_3:
MOVW (CX), SI
MOVB 2(CX), DI
MOVW SI, (AX)
MOVB DI, 2(AX)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_5through7:
MOVL (CX), SI
MOVL -4(CX)(DX*1), DI
MOVL SI, (AX)
MOVL DI, -4(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_8:
MOVQ (CX), SI
MOVQ SI, (AX)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_9through16:
MOVQ (CX), SI
MOVQ -8(CX)(DX*1), DI
MOVQ SI, (AX)
MOVQ DI, -8(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_17through32:
MOVOU (CX), X0
MOVOU -16(CX)(DX*1), X1
MOVOU X0, (AX)
MOVOU X1, -16(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_33through64:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU -32(CX)(DX*1), X2
MOVOU -16(CX)(DX*1), X3
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, -32(AX)(DX*1)
MOVOU X3, -16(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_65through128:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU -64(CX)(DX*1), X12
MOVOU -48(CX)(DX*1), X13
MOVOU -32(CX)(DX*1), X14
MOVOU -16(CX)(DX*1), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X12, -64(AX)(DX*1)
MOVOU X13, -48(AX)(DX*1)
MOVOU X14, -32(AX)(DX*1)
MOVOU X15, -16(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_129through256:
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU 64(CX), X4
MOVOU 80(CX), X5
MOVOU 96(CX), X6
MOVOU 112(CX), X7
MOVOU -128(CX)(DX*1), X8
MOVOU -112(CX)(DX*1), X9
MOVOU -96(CX)(DX*1), X10
MOVOU -80(CX)(DX*1), X11
MOVOU -64(CX)(DX*1), X12
MOVOU -48(CX)(DX*1), X13
MOVOU -32(CX)(DX*1), X14
MOVOU -16(CX)(DX*1), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X4, 64(AX)
MOVOU X5, 80(AX)
MOVOU X6, 96(AX)
MOVOU X7, 112(AX)
MOVOU X8, -128(AX)(DX*1)
MOVOU X9, -112(AX)(DX*1)
MOVOU X10, -96(AX)(DX*1)
MOVOU X11, -80(AX)(DX*1)
MOVOU X12, -64(AX)(DX*1)
MOVOU X13, -48(AX)(DX*1)
MOVOU X14, -32(AX)(DX*1)
MOVOU X15, -16(AX)(DX*1)
JMP emit_literal_end_avx_standalone
emit_lit_memmove_standalone_memmove_move_256through2048:
LEAQ -256(DX), DX
MOVOU (CX), X0
MOVOU 16(CX), X1
MOVOU 32(CX), X2
MOVOU 48(CX), X3
MOVOU 64(CX), X4
MOVOU 80(CX), X5
MOVOU 96(CX), X6
MOVOU 112(CX), X7
MOVOU 128(CX), X8
MOVOU 144(CX), X9
MOVOU 160(CX), X10
MOVOU 176(CX), X11
MOVOU 192(CX), X12
MOVOU 208(CX), X13
MOVOU 224(CX), X14
MOVOU 240(CX), X15
MOVOU X0, (AX)
MOVOU X1, 16(AX)
MOVOU X2, 32(AX)
MOVOU X3, 48(AX)
MOVOU X4, 64(AX)
MOVOU X5, 80(AX)
MOVOU X6, 96(AX)
MOVOU X7, 112(AX)
MOVOU X8, 128(AX)
MOVOU X9, 144(AX)
MOVOU X10, 160(AX)
MOVOU X11, 176(AX)
MOVOU X12, 192(AX)
MOVOU X13, 208(AX)
MOVOU X14, 224(AX)
MOVOU X15, 240(AX)
CMPQ DX, $0x00000100
LEAQ 256(CX), CX
LEAQ 256(AX), AX
JGE emit_lit_memmove_standalone_memmove_move_256through2048
JMP emit_lit_memmove_standalone_memmove_tail
emit_lit_memmove_standalone_memmove_avxUnaligned:
LEAQ (CX)(DX*1), DI
MOVQ AX, R9
MOVOU -128(DI), X5
MOVOU -112(DI), X6
MOVQ $0x00000080, SI
ANDQ $0xffffffe0, AX
ADDQ $0x20, AX
MOVOU -96(DI), X7
MOVOU -80(DI), X8
MOVQ AX, R8
SUBQ R9, R8
MOVOU -64(DI), X9
MOVOU -48(DI), X10
SUBQ R8, DX
MOVOU -32(DI), X11
MOVOU -16(DI), X12
VMOVDQU (CX), Y4
ADDQ R8, CX
SUBQ SI, DX
emit_lit_memmove_standalone_memmove_gobble_128_loop:
VMOVDQU (CX), Y0
VMOVDQU 32(CX), Y1
VMOVDQU 64(CX), Y2
VMOVDQU 96(CX), Y3
ADDQ SI, CX
VMOVDQA Y0, (AX)
VMOVDQA Y1, 32(AX)
VMOVDQA Y2, 64(AX)
VMOVDQA Y3, 96(AX)
ADDQ SI, AX
SUBQ SI, DX
JA emit_lit_memmove_standalone_memmove_gobble_128_loop
ADDQ SI, DX
ADDQ AX, DX
VMOVDQU Y4, (R9)
VZEROUPPER
MOVOU X5, -128(DX)
MOVOU X6, -112(DX)
MOVOU X7, -96(DX)
MOVOU X8, -80(DX)
MOVOU X9, -64(DX)
MOVOU X10, -48(DX)
MOVOU X11, -32(DX)
MOVOU X12, -16(DX)
emit_literal_end_avx_standalone:
MOVQ BX, ret+48(FP)
RET
// func emitRepeat(dst []byte, offset int, length int) int
TEXT ·emitRepeat(SB), NOSPLIT, $0-48
XORQ BX, BX
MOVQ dst_base+0(FP), AX
MOVQ offset+24(FP), CX
MOVQ length+32(FP), DX
emit_repeat_again_standalone:
MOVQ DX, SI
LEAQ -4(DX), DX
CMPL SI, $0x08
JLE repeat_two_standalone
CMPL SI, $0x0c
JGE cant_repeat_two_offset_standalone
CMPL CX, $0x00000800
JLT repeat_two_offset_standalone
cant_repeat_two_offset_standalone:
CMPL DX, $0x00000104
JLT repeat_three_standalone
CMPL DX, $0x00010100
JLT repeat_four_standalone
CMPL DX, $0x0100ffff
JLT repeat_five_standalone
LEAQ -16842747(DX), DX
MOVW $0x001d, (AX)
MOVW $0xfffb, 2(AX)
MOVB $0xff, 4(AX)
ADDQ $0x05, AX
ADDQ $0x05, BX
JMP emit_repeat_again_standalone
repeat_five_standalone:
LEAQ -65536(DX), DX
MOVQ DX, CX
MOVW $0x001d, (AX)
MOVW DX, 2(AX)
SARQ $0x10, CX
MOVB CL, 4(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP gen_emit_repeat_end
repeat_four_standalone:
LEAQ -256(DX), DX
MOVW $0x0019, (AX)
MOVW DX, 2(AX)
ADDQ $0x04, BX
ADDQ $0x04, AX
JMP gen_emit_repeat_end
repeat_three_standalone:
LEAQ -4(DX), DX
MOVW $0x0015, (AX)
MOVB DL, 2(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
JMP gen_emit_repeat_end
repeat_two_standalone:
SHLL $0x02, DX
ORL $0x01, DX
MOVW DX, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_repeat_end
repeat_two_offset_standalone:
XORQ SI, SI
LEAQ 1(SI)(DX*4), DX
MOVB CL, 1(AX)
SARL $0x08, CX
SHLL $0x05, CX
ORL CX, DX
MOVB DL, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
gen_emit_repeat_end:
MOVQ BX, ret+40(FP)
RET
// func emitCopy(dst []byte, offset int, length int) int
TEXT ·emitCopy(SB), NOSPLIT, $0-48
XORQ BX, BX
MOVQ dst_base+0(FP), AX
MOVQ offset+24(FP), CX
MOVQ length+32(FP), DX
CMPL CX, $0x00010000
JL two_byte_offset_standalone
CMPL DX, $0x40
JLE four_bytes_remain_standalone
MOVB $0xff, (AX)
MOVD CX, 1(AX)
LEAQ -64(DX), DX
ADDQ $0x05, BX
ADDQ $0x05, AX
CMPL DX, $0x04
JL four_bytes_remain_standalone
emit_repeat_again_standalone_emit_copy:
MOVQ DX, SI
LEAQ -4(DX), DX
CMPL SI, $0x08
JLE repeat_two_standalone_emit_copy
CMPL SI, $0x0c
JGE cant_repeat_two_offset_standalone_emit_copy
CMPL CX, $0x00000800
JLT repeat_two_offset_standalone_emit_copy
cant_repeat_two_offset_standalone_emit_copy:
CMPL DX, $0x00000104
JLT repeat_three_standalone_emit_copy
CMPL DX, $0x00010100
JLT repeat_four_standalone_emit_copy
CMPL DX, $0x0100ffff
JLT repeat_five_standalone_emit_copy
LEAQ -16842747(DX), DX
MOVW $0x001d, (AX)
MOVW $0xfffb, 2(AX)
MOVB $0xff, 4(AX)
ADDQ $0x05, AX
ADDQ $0x05, BX
JMP emit_repeat_again_standalone_emit_copy
repeat_five_standalone_emit_copy:
LEAQ -65536(DX), DX
MOVQ DX, CX
MOVW $0x001d, (AX)
MOVW DX, 2(AX)
SARQ $0x10, CX
MOVB CL, 4(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP gen_emit_copy_end
repeat_four_standalone_emit_copy:
LEAQ -256(DX), DX
MOVW $0x0019, (AX)
MOVW DX, 2(AX)
ADDQ $0x04, BX
ADDQ $0x04, AX
JMP gen_emit_copy_end
repeat_three_standalone_emit_copy:
LEAQ -4(DX), DX
MOVW $0x0015, (AX)
MOVB DL, 2(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
JMP gen_emit_copy_end
repeat_two_standalone_emit_copy:
SHLL $0x02, DX
ORL $0x01, DX
MOVW DX, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_copy_end
repeat_two_offset_standalone_emit_copy:
XORQ SI, SI
LEAQ 1(SI)(DX*4), DX
MOVB CL, 1(AX)
SARL $0x08, CX
SHLL $0x05, CX
ORL CX, DX
MOVB DL, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_copy_end
four_bytes_remain_standalone:
TESTL DX, DX
JZ gen_emit_copy_end
MOVB $0x03, SI
LEAQ -4(SI)(DX*4), DX
MOVB DL, (AX)
MOVD CX, 1(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP gen_emit_copy_end
two_byte_offset_standalone:
CMPL DX, $0x40
JLE two_byte_offset_short_standalone
MOVB $0xee, (AX)
MOVW CX, 1(AX)
LEAQ -60(DX), DX
ADDQ $0x03, AX
ADDQ $0x03, BX
emit_repeat_again_standalone_emit_copy_short:
MOVQ DX, SI
LEAQ -4(DX), DX
CMPL SI, $0x08
JLE repeat_two_standalone_emit_copy_short
CMPL SI, $0x0c
JGE cant_repeat_two_offset_standalone_emit_copy_short
CMPL CX, $0x00000800
JLT repeat_two_offset_standalone_emit_copy_short
cant_repeat_two_offset_standalone_emit_copy_short:
CMPL DX, $0x00000104
JLT repeat_three_standalone_emit_copy_short
CMPL DX, $0x00010100
JLT repeat_four_standalone_emit_copy_short
CMPL DX, $0x0100ffff
JLT repeat_five_standalone_emit_copy_short
LEAQ -16842747(DX), DX
MOVW $0x001d, (AX)
MOVW $0xfffb, 2(AX)
MOVB $0xff, 4(AX)
ADDQ $0x05, AX
ADDQ $0x05, BX
JMP emit_repeat_again_standalone_emit_copy_short
repeat_five_standalone_emit_copy_short:
LEAQ -65536(DX), DX
MOVQ DX, CX
MOVW $0x001d, (AX)
MOVW DX, 2(AX)
SARQ $0x10, CX
MOVB CL, 4(AX)
ADDQ $0x05, BX
ADDQ $0x05, AX
JMP gen_emit_copy_end
repeat_four_standalone_emit_copy_short:
LEAQ -256(DX), DX
MOVW $0x0019, (AX)
MOVW DX, 2(AX)
ADDQ $0x04, BX
ADDQ $0x04, AX
JMP gen_emit_copy_end
repeat_three_standalone_emit_copy_short:
LEAQ -4(DX), DX
MOVW $0x0015, (AX)
MOVB DL, 2(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
JMP gen_emit_copy_end
repeat_two_standalone_emit_copy_short:
SHLL $0x02, DX
ORL $0x01, DX
MOVW DX, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_copy_end
repeat_two_offset_standalone_emit_copy_short:
XORQ SI, SI
LEAQ 1(SI)(DX*4), DX
MOVB CL, 1(AX)
SARL $0x08, CX
SHLL $0x05, CX
ORL CX, DX
MOVB DL, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_copy_end
two_byte_offset_short_standalone:
CMPL DX, $0x0c
JGE emit_copy_three_standalone
CMPL CX, $0x00000800
JGE emit_copy_three_standalone
MOVB $0x01, SI
LEAQ -16(SI)(DX*4), DX
MOVB CL, 1(AX)
SHRL $0x08, CX
SHLL $0x05, CX
ORL CX, DX
MOVB DL, (AX)
ADDQ $0x02, BX
ADDQ $0x02, AX
JMP gen_emit_copy_end
emit_copy_three_standalone:
MOVB $0x02, SI
LEAQ -4(SI)(DX*4), DX
MOVB DL, (AX)
MOVW CX, 1(AX)
ADDQ $0x03, BX
ADDQ $0x03, AX
gen_emit_copy_end:
MOVQ BX, ret+40(FP)
RET
// func matchLen(a []byte, b []byte) int
TEXT ·matchLen(SB), NOSPLIT, $0-56
MOVQ a_base+0(FP), AX
MOVQ b_base+24(FP), CX
MOVQ a_len+8(FP), DX
XORQ SI, SI
CMPQ DX, $0x08
JL matchlen_single_standalone
matchlen_loopback_standalone:
MOVQ (AX)(SI*1), BX
XORQ (CX)(SI*1), BX
TESTQ BX, BX
JZ matchlen_loop_standalone
BSFQ BX, BX
SARQ $0x03, BX
LEAQ (SI)(BX*1), SI
JMP gen_match_len_end
matchlen_loop_standalone:
LEAQ -8(DX), DX
LEAQ 8(SI), SI
CMPQ DX, $0x08
JGE matchlen_loopback_standalone
matchlen_single_standalone:
TESTQ DX, DX
JZ gen_match_len_end
matchlen_single_loopback_standalone:
MOVB (AX)(SI*1), BL
CMPB (CX)(SI*1), BL
JNE gen_match_len_end
LEAQ 1(SI), SI
DECQ DX
JNZ matchlen_single_loopback_standalone
gen_match_len_end:
MOVQ SI, ret+48(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/asm.go 0000664 0000000 0000000 00000136564 14370657153 0027124 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"fmt"
"log"
. "github.com/mmcloughlin/avo/build"
"github.com/mmcloughlin/avo/buildtags"
"github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
func main() {
Constraint(buildtags.Not("appengine").ToConstraint())
Constraint(buildtags.Not("noasm").ToConstraint())
Constraint(buildtags.Term("gc").ToConstraint())
genEncodeBlockAsm("encodeBlockAsm", 16, 6, false)
genEncodeBlockAsm("encodeBlockAsm14B", 14, 5, false)
genEncodeBlockAsm("encodeBlockAsm12B", 12, 4, false)
genEncodeBlockAsm("encodeBlockAsmAvx", 16, 6, true)
genEncodeBlockAsm("encodeBlockAsm14BAvx", 14, 5, true)
genEncodeBlockAsm("encodeBlockAsm12BAvx", 12, 4, true)
genEmitLiteral()
genEmitRepeat()
genEmitCopy()
genMatchLen()
Generate()
}
func debugval(v operand.Op) {
value := reg.R15
MOVQ(v, value)
INT(Imm(3))
}
func genEncodeBlockAsm(name string, tableBits, skipLog int, avx bool) {
TEXT(name, 0, "func(dst, src []byte) int")
Doc(name+" encodes a non-empty src to a guaranteed-large-enough dst.",
"It assumes that the varint-encoded length of the decompressed bytes has already been written.", "")
Pragma("noescape")
// "var table [maxTableSize]uint32" takes up 4 * (1 << tableBits) bytes of stack space.
// Extra bytes are added to keep less used values.
var (
tableSize = 1 << uint(tableBits)
// Keep base stack multiple of 16.
baseStack = 0
// try to keep extraStack + baseStack multiple of 16
// for best chance of table alignment.
extraStack = 32
allocStack = baseStack + extraStack + tableSize
)
// Memzero needs at least 128 bytes.
if tableSize < 128 {
panic("tableSize must be at least 128 bytes")
}
lenSrcBasic, err := Param("src").Len().Resolve()
if err != nil {
panic(err)
}
lenSrcQ := lenSrcBasic.Addr
stack := AllocLocal(allocStack)
table := stack.Offset(allocStack - tableSize)
tmpStack := baseStack
// Bail if we can't compress to at least this.
dstLimitPtrQ := stack.Offset(tmpStack)
tmpStack += 8
// dstStartPtrQ contains the original dst pointer for returning the length
dstStartPtrQ := stack.Offset(tmpStack)
tmpStack += 8
// sLimitL is when to stop looking for offset/length copies.
sLimitL := stack.Offset(tmpStack)
tmpStack += 4
// nextEmitL keeps track of the point we have emitted to.
nextEmitL := stack.Offset(tmpStack)
tmpStack += 4
// Repeat stores the last match offset.
repeatL := stack.Offset(tmpStack)
tmpStack += 4
// nextSTempL keeps nextS while other functions are being called.
nextSTempL := stack.Offset(tmpStack)
tmpStack += 4
// Ensure we have the correct extra stack.
// Could be automatic, but whatever.
if tmpStack-baseStack != extraStack {
log.Fatal("adjust extraStack to ", tmpStack-baseStack)
}
dstBaseBasic, err := Param("dst").Base().Resolve()
if err != nil {
panic(err)
}
dstBase := dstBaseBasic.Addr
if tmpStack > extraStack+baseStack {
panic(fmt.Sprintf("tmp stack exceeded: %v", tmpStack))
}
// Zero table
{
iReg := GP64()
MOVQ(U32(tableSize/8/16), iReg)
tablePtr := GP64()
LEAQ(table, tablePtr)
zeroXmm := XMM()
PXOR(zeroXmm, zeroXmm)
Label("zero_loop_" + name)
for i := 0; i < 8; i++ {
MOVOU(zeroXmm, Mem{Base: tablePtr, Disp: i * 16})
}
ADDQ(U8(16*8), tablePtr)
DECQ(iReg)
JNZ(LabelRef("zero_loop_" + name))
// nextEmit is offset n src where the next emitLiteral should start from.
MOVL(iReg.As32(), nextEmitL)
}
{
const inputMargin = 8
tmp, tmp2, tmp3 := GP64(), GP64(), GP64()
MOVQ(lenSrcQ, tmp)
LEAQ(Mem{Base: tmp, Disp: -5}, tmp2)
// sLimitL := len(src) - inputMargin
LEAQ(Mem{Base: tmp, Disp: -inputMargin}, tmp3)
// dstLimit := len(src) - len(src)>>5 - 5
SHRQ(U8(5), tmp)
SUBL(tmp.As32(), tmp2.As32()) // tmp2 = tmp2 - tmp
MOVL(tmp3.As32(), sLimitL)
dstAddr := GP64()
MOVQ(dstBase, dstAddr)
// Store dst start address
MOVQ(dstAddr, dstStartPtrQ)
LEAQ(Mem{Base: dstAddr, Index: tmp2, Scale: 1}, tmp2)
MOVQ(tmp2, dstLimitPtrQ)
}
// s = 1
s := GP64().As32()
MOVL(U32(1), s)
// repeatL = 1
MOVL(s, repeatL)
src := GP64()
Load(Param("src").Base(), src)
// Load cv
Label("search_loop_" + name)
candidate := GP64().As32()
{
cv := GP64()
MOVQ(Mem{Base: src, Index: s, Scale: 1}, cv)
nextS := GP64()
// nextS := s + (s-nextEmit)>>6 + 4
{
tmp := GP64()
MOVL(s, tmp.As32()) // tmp = s
SUBL(nextEmitL, tmp.As32()) // tmp = s - nextEmit
SHRL(U8(skipLog), tmp.As32()) // tmp = (s - nextEmit) >> skipLog
LEAQ(Mem{Base: s, Disp: 4, Index: tmp, Scale: 1}, nextS)
}
// if nextS > sLimit {goto emitRemainder}
{
tmp := GP64()
MOVL(sLimitL, tmp.As32())
CMPL(nextS.As32(), tmp.As32())
JGT(LabelRef("emit_remainder_" + name))
}
// move nextS to stack.
MOVL(nextS.As32(), nextSTempL)
candidate2 := GP64().As32()
hasher := hash6(tableBits)
{
hash0, hash1 := GP64(), GP64()
MOVQ(cv, hash0)
MOVQ(cv, hash1)
SHRQ(U8(8), hash1)
hasher.hash(hash0)
hasher.hash(hash1)
MOVL(table.Idx(hash0, 1), candidate)
MOVL(table.Idx(hash1, 1), candidate2)
MOVL(s, table.Idx(hash0, 1))
tmp := GP64().As32()
LEAL(Mem{Base: s, Disp: 1}, tmp)
MOVL(tmp, table.Idx(hash1, 1))
}
// Check repeat at offset checkRep
const checkRep = 1
if true {
// rep = s - repeat
rep := GP64().As32()
if true {
// if uint32(cv>>(checkRep*8)) == load32(src, s-repeat+checkRep) {
left, right := GP64(), GP64()
MOVL(s, rep)
SUBL(repeatL, rep) // rep = s - repeat
MOVL(Mem{Base: src, Index: rep, Scale: 1, Disp: checkRep}, right.As32())
MOVQ(cv, left)
SHLQ(U8(checkRep*8), left)
CMPL(left.As32(), right.As32())
// FIXME: Unable to allocate if enabled.
JNE(LabelRef("no_repeat_found_" + name))
}
// base = s + 1
base := GP64()
LEAQ(Mem{Base: s, Disp: 1}, base)
// Extend back
if true {
ne := GP64().As32()
MOVL(nextEmitL, ne)
TESTL(rep, rep)
JZ(LabelRef("repeat_extend_back_end_" + name))
// I is tested when decremented, so we loop back here.
Label("repeat_extend_back_loop_" + name)
CMPL(base.As32(), ne)
JG(LabelRef("repeat_extend_back_end_" + name))
// if src[i-1] == src[base-1]
tmp, tmp2 := GP64(), GP64()
MOVB(Mem{Base: src, Index: rep, Scale: 1, Disp: -1}, tmp.As8())
MOVB(Mem{Base: src, Index: base, Scale: 1, Disp: -1}, tmp2.As8())
CMPB(tmp.As8(), tmp2.As8())
JNE(LabelRef("repeat_extend_back_end_" + name))
LEAQ(Mem{Base: base, Disp: -1}, base)
DECL(rep)
JZ(LabelRef("repeat_extend_back_end_" + name))
JMP(LabelRef("repeat_extend_back_loop_" + name))
}
Label("repeat_extend_back_end_" + name)
// Base is now at start.
// d += emitLiteral(dst[d:], src[nextEmitL:base])
if true {
emitLiterals(nextEmitL, base, src, dstBase, "repeat_emit_"+name, avx)
}
// Extend forward
if true {
// s += 4 + checkRep
ADDL(U8(4+checkRep), s)
// candidate := s - repeat + 4 + checkRep
MOVL(s, candidate)
SUBL(repeatL, candidate) // candidate = s - repeatL
{
// srcLeft = sLimitL - s
srcLeft := GP64()
MOVL(sLimitL, srcLeft.As32())
SUBL(s, srcLeft.As32())
// Forward address
forwardStart := Mem{Base: src, Index: s, Scale: 1}
// End address
backStart := Mem{Base: src, Index: candidate, Scale: 1}
length := matchLen("repeat_extend", forwardStart, backStart, srcLeft, LabelRef("repeat_extend_forward_end_"+name))
Label("repeat_extend_forward_end_" + name)
// s+= length
ADDL(length.As32(), s)
}
}
// Emit
if true {
// length = s-base
length := GP64()
MOVL(s, length.As32())
SUBL(base.As32(), length.As32())
offsetVal := GP64()
MOVL(repeatL, offsetVal.As32())
dst := GP64()
MOVQ(dstBase, dst)
// if nextEmit > 0
tmp := GP64()
MOVL(nextEmitL, tmp.As32())
TESTL(tmp.As32(), tmp.As32())
// FIXME: fails to allocate regs if enabled:
JZ(LabelRef("repeat_as_copy_" + name))
emitRepeat("match_repeat_", length, offsetVal, nil, dst, LabelRef("repeat_end_emit_"+name))
// JUMPS TO HERE:
Label("repeat_as_copy_" + name)
emitCopy("repeat_as_copy_"+name, length, offsetVal, nil, dst, LabelRef("repeat_end_emit_"+name))
Label("repeat_end_emit_" + name)
// Store new dst and nextEmit
MOVQ(dst, dstBase)
}
// if s >= sLimit
// can be omitted.
if true {
tmp := GP64()
MOVL(sLimitL, tmp.As32())
CMPL(s, tmp.As32())
JGT(LabelRef("emit_remainder_" + name))
}
JMP(LabelRef("search_loop_" + name))
}
Label("no_repeat_found_" + name)
{
// Can be moved up if registers are available.
hash2 := GP64()
{
// hash2 := hash6(cv>>16, tableBits)
hasher = hash6(tableBits)
MOVQ(cv, hash2)
SHRQ(U8(16), hash2)
hasher.hash(hash2)
}
CMPL(Mem{Base: src, Index: candidate, Scale: 1}, cv.As32())
// cv >>= 8
SHRQ(U8(8), cv)
JEQ(LabelRef("candidate_match_" + name))
// candidate = int(table[hash2])
MOVL(table.Idx(hash2, 1), candidate)
// if uint32(cv>>8) == load32(src, candidate2)
CMPL(Mem{Base: src, Index: candidate2, Scale: 1}, cv.As32())
JEQ(LabelRef("candidate2_match_" + name))
// table[hash2] = uint32(s + 2)
tmp := GP64()
LEAQ(Mem{Base: s, Disp: 2}, tmp)
MOVL(tmp.As32(), table.Idx(hash2, 1))
// if uint32(cv>>16) == load32(src, candidate)
SHRQ(U8(8), cv)
CMPL(Mem{Base: src, Index: candidate, Scale: 1}, cv.As32())
JEQ(LabelRef("candidate3_match_" + name))
// s = nextS
MOVL(nextSTempL, s)
JMP(LabelRef("search_loop_" + name))
// Matches candidate3
Label("candidate3_match_" + name)
ADDL(U8(2), s)
JMP(LabelRef("candidate_match_" + name))
Label("candidate2_match_" + name)
// table[hash2] = uint32(s + 2)
tmp = GP64()
LEAQ(Mem{Base: s, Disp: -2}, tmp)
MOVL(tmp.As32(), table.Idx(hash2, 1))
// s++
INCL(s)
MOVL(candidate2, candidate)
}
}
Label("candidate_match_" + name)
// We have a match at 's' with src offset in "candidate" that matches at least 4 bytes.
// Extend backwards
{
ne := GP64()
MOVL(nextEmitL, ne.As32())
TESTL(candidate, candidate)
JZ(LabelRef("match_extend_back_end_" + name))
// candidate is tested when decremented, so we loop back here.
Label("match_extend_back_loop_" + name)
CMPL(s, ne.As32())
JG(LabelRef("match_extend_back_end_" + name))
// if src[candidate-1] == src[s-1]
tmp, tmp2 := GP64(), GP64()
MOVB(Mem{Base: src, Index: candidate, Scale: 1, Disp: -1}, tmp.As8())
MOVB(Mem{Base: src, Index: s, Scale: 1, Disp: -1}, tmp2.As8())
CMPB(tmp.As8(), tmp2.As8())
JNE(LabelRef("match_extend_back_end_" + name))
LEAL(Mem{Base: s, Disp: -1}, s)
DECL(candidate)
JZ(LabelRef("match_extend_back_end_" + name))
JMP(LabelRef("match_extend_back_loop_" + name))
}
Label("match_extend_back_end_" + name)
// Bail if we exceed the maximum size.
if true {
// tmp = s-nextEmitL
tmp := GP64()
MOVL(s, tmp.As32())
SUBL(nextEmitL, tmp.As32())
LEAQ(dstBase.Idx(tmp, 1), tmp)
CMPQ(tmp, dstLimitPtrQ)
JL(LabelRef("match_dst_size_check_" + name))
ri, err := ReturnIndex(0).Resolve()
if err != nil {
panic(err)
}
MOVQ(U32(0), ri.Addr)
RET()
}
Label("match_dst_size_check_" + name)
{
base := GP64()
MOVL(candidate, base.As32())
emitLiterals(nextEmitL, base, src, dstBase, "match_emit_"+name, avx)
NOP()
}
Label("match_nolit_loop_" + name)
{
base := GP64().As32()
MOVL(s, base)
// Update repeat
{
// repeat = base - candidate
repeatVal := GP64().As32()
MOVL(s, repeatVal)
SUBL(candidate, repeatVal)
MOVL(repeatVal, repeatL)
}
// s+=4, candidate+=4
ADDL(U8(4), s)
ADDL(U8(4), candidate)
// Extend the 4-byte match as long as possible and emit copy.
{
// srcLeft = sLimitL - s
srcLeft := GP64()
MOVL(sLimitL, srcLeft.As32())
SUBL(s, srcLeft.As32())
length := matchLen("match_nolit_"+name,
Mem{Base: src, Index: s, Scale: 1},
Mem{Base: src, Index: candidate, Scale: 1},
srcLeft,
LabelRef("match_nolit_end_"+name),
)
Label("match_nolit_end_" + name)
offset := GP64()
MOVL(repeatL, offset.As32())
ADDQ(U8(4), length)
dst := GP64()
MOVQ(dstBase, dst)
// s += length (lenght is destroyed, use it now)
ADDL(length.As32(), s)
emitCopy("match_nolit_"+name, length, offset, nil, dst, LabelRef("match_nolit_emitcopy_end_"+name))
Label("match_nolit_emitcopy_end_" + name)
MOVQ(dst, dstBase)
MOVL(s, nextEmitL)
CMPL(s, sLimitL)
JGE(LabelRef("emit_remainder_" + name))
// Bail if we exceed the maximum size.
{
CMPQ(dst, dstLimitPtrQ)
JL(LabelRef("match_nolit_dst_ok_" + name))
ri, err := ReturnIndex(0).Resolve()
if err != nil {
panic(err)
}
MOVQ(U32(0), ri.Addr)
RET()
Label("match_nolit_dst_ok_" + name)
}
}
{
// Check for an immediate match, otherwise start search at s+1
x := GP64()
// Index s-2
MOVQ(Mem{Base: src, Index: s, Scale: 1, Disp: -2}, x)
hasher := hash6(tableBits)
hash0, hash1 := GP64(), GP64()
MOVQ(x, hash0) // s-2
SHRQ(U8(16), x)
MOVQ(x, hash1) // s
hasher.hash(hash0)
hasher.hash(hash1)
c0, c1 := GP64(), GP64()
MOVL(table.Idx(hash0, 1), c0.As32())
MOVL(table.Idx(hash1, 1), c1.As32())
sm2 := GP64()
LEAQ(Mem{Base: s, Disp: -2}, sm2)
MOVL(sm2.As32(), table.Idx(hash0, 1))
MOVL(s, table.Idx(hash1, 1))
CMPL(Mem{Base: src, Index: hash1, Scale: 1}, x.As32())
JEQ(LabelRef("match_nolit_loop_" + name))
INCL(s)
}
JMP(LabelRef("search_loop_" + name))
}
Label("emit_remainder_" + name)
// Bail if we exceed the maximum size.
// if d+len(src)-nextEmitL > dstLimitPtrQ { return 0
{
// remain = lenSrc - nextEmitL
remain := GP64()
MOVQ(lenSrcQ, remain)
SUBL(nextEmitL, remain.As32())
dst := GP64()
MOVQ(dstBase, dst)
// dst := dst + (len(src)-nextEmitL)
LEAQ(Mem{Base: dst, Index: remain, Scale: 1}, dst)
CMPQ(dst, dstLimitPtrQ)
JL(LabelRef("emit_remainder_ok_" + name))
ri, err := ReturnIndex(0).Resolve()
if err != nil {
panic(err)
}
MOVQ(U32(0), ri.Addr)
RET()
Label("emit_remainder_ok_" + name)
}
// emitLiteral(dst[d:], src[nextEmitL:])
emitEnd := GP64()
MOVQ(lenSrcQ, emitEnd)
// Emit final literals.
emitLiterals(nextEmitL, emitEnd, src, dstBase, "emit_remainder_"+name, avx)
// length := start - base (ptr arithmetic)
length := GP64()
MOVQ(dstStartPtrQ, length)
SUBQ(dstBase, length)
Store(length, ReturnIndex(0))
RET()
}
// emitLiterals emits literals from nextEmit to base, updates nextEmit, dstBase.
// Checks if base == nextemit.
// src & base are untouched.
func emitLiterals(nextEmitL Mem, base reg.GPVirtual, src reg.GPVirtual, dstBase Mem, name string, avx bool) {
nextEmit, litLen, dstBaseTmp, litBase := GP64().As32(), GP64(), GP64(), GP64()
MOVL(nextEmitL, nextEmit)
CMPL(nextEmit, base.As32())
JEQ(LabelRef("emit_literal_skip_" + name))
MOVL(base.As32(), litLen.As32())
// Base is now next emit.
MOVL(base.As32(), nextEmitL)
// litBase = src[nextEmitL:]
LEAQ(Mem{Base: src, Index: nextEmit, Scale: 1}, litBase)
SUBL(nextEmit, litLen.As32()) // litlen = base - nextEmit
// Load (and store when we return)
MOVQ(dstBase, dstBaseTmp)
emitLiteral(name, litLen, nil, dstBaseTmp, litBase, LabelRef("emit_literal_done_"+name), avx, true)
Label("emit_literal_done_" + name)
// Store updated dstBase
MOVQ(dstBaseTmp, dstBase)
Label("emit_literal_skip_" + name)
}
type hashGen struct {
bytes int
tablebits int
mulreg reg.GPVirtual
}
// hash uses multiply to get a 'output' hash on the hash of the lowest 'bytes' bytes in value.
func hash6(tablebits int) hashGen {
h := hashGen{
bytes: 6,
tablebits: tablebits,
mulreg: GP64(),
}
MOVQ(Imm(227718039650203), h.mulreg)
return h
}
// hash uses multiply to get hash of the value.
func (h hashGen) hash(val reg.GPVirtual) {
// Move value to top of register.
SHLQ(U8(64-8*h.bytes), val)
IMULQ(h.mulreg, val)
// Move value to bottom
SHRQ(U8(64-h.tablebits), val)
}
func genEmitLiteral() {
TEXT("emitLiteral", NOSPLIT, "func(dst, lit []byte) int")
Doc("emitLiteral writes a literal chunk and returns the number of bytes written.", "",
"It assumes that:",
" dst is long enough to hold the encoded bytes",
" 0 <= len(lit) && len(lit) <= math.MaxUint32", "")
Pragma("noescape")
dstBase, litBase, litLen, retval := GP64(), GP64(), GP64(), GP64()
Load(Param("dst").Base(), dstBase)
Load(Param("lit").Base(), litBase)
Load(Param("lit").Len(), litLen)
emitLiteral("standalone", litLen, retval, dstBase, litBase, "emit_literal_end_standalone", false, false)
Label("emit_literal_end_standalone")
Store(retval, ReturnIndex(0))
RET()
TEXT("emitLiteralAvx", NOSPLIT, "func(dst, lit []byte) int")
Doc("emitLiteralAvx writes a literal chunk and returns the number of bytes written.", "",
"It assumes that:",
" dst is long enough to hold the encoded bytes",
" 0 <= len(lit) && len(lit) <= math.MaxUint32", "")
Pragma("noescape")
dstBase, litBase, litLen, retval = GP64(), GP64(), GP64(), GP64()
Load(Param("dst").Base(), dstBase)
Load(Param("lit").Base(), litBase)
Load(Param("lit").Len(), litLen)
emitLiteral("standalone", litLen, retval, dstBase, litBase, "emit_literal_end_avx_standalone", true, false)
Label("emit_literal_end_avx_standalone")
Store(retval, ReturnIndex(0))
RET()
}
// emitLiteral can be used for inlining an emitLiteral call.
// stack must have at least 32 bytes.
// retval will contain emitted bytes, but can be nil if this is not interesting.
// dstBase and litBase are updated.
// Uses 2 GP registers. With AVX 4 registers.
// If updateDst is true dstBase will have the updated end pointer and an additional register will be used.
func emitLiteral(name string, litLen, retval, dstBase, litBase reg.GPVirtual, end LabelRef, avx, updateDst bool) {
n := GP64()
n16 := GP64()
// We always add litLen bytes
if retval != nil {
MOVQ(litLen, retval)
}
MOVQ(litLen, n)
SUBL(U8(1), n.As32())
// Return if AX was 0
JC(end)
// Find number of bytes to emit for tag.
CMPL(n.As32(), U8(60))
JLT(LabelRef("one_byte_" + name))
CMPL(n.As32(), U32(1<<8))
JLT(LabelRef("two_bytes_" + name))
CMPL(n.As32(), U32(1<<16))
JLT(LabelRef("three_bytes_" + name))
CMPL(n.As32(), U32(1<<24))
JLT(LabelRef("four_bytes_" + name))
Label("five_bytes_" + name)
MOVB(U8(252), Mem{Base: dstBase})
MOVL(n.As32(), Mem{Base: dstBase, Disp: 1})
if retval != nil {
ADDQ(U8(5), retval)
}
ADDQ(U8(5), dstBase)
JMP(LabelRef("memmove_" + name))
Label("four_bytes_" + name)
MOVQ(n, n16)
SHRL(U8(16), n16.As32())
MOVB(U8(248), Mem{Base: dstBase})
MOVW(n.As16(), Mem{Base: dstBase, Disp: 1})
MOVB(n16.As8(), Mem{Base: dstBase, Disp: 3})
if retval != nil {
ADDQ(U8(4), retval)
}
ADDQ(U8(4), dstBase)
JMP(LabelRef("memmove_" + name))
Label("three_bytes_" + name)
MOVB(U8(0xf4), Mem{Base: dstBase})
MOVW(n.As16(), Mem{Base: dstBase, Disp: 1})
if retval != nil {
ADDQ(U8(3), retval)
}
ADDQ(U8(3), dstBase)
JMP(LabelRef("memmove_" + name))
Label("two_bytes_" + name)
MOVB(U8(0xf0), Mem{Base: dstBase})
MOVB(n.As8(), Mem{Base: dstBase, Disp: 1})
if retval != nil {
ADDQ(U8(2), retval)
}
ADDQ(U8(2), dstBase)
JMP(LabelRef("memmove_" + name))
Label("one_byte_" + name)
SHLB(U8(2), n.As8())
MOVB(n.As8(), Mem{Base: dstBase})
if retval != nil {
ADDQ(U8(1), retval)
}
ADDQ(U8(1), dstBase)
// Fallthrough
Label("memmove_" + name)
// copy(dst[i:], lit)
if true {
dstEnd := GP64()
if updateDst {
LEAQ(Mem{Base: dstBase, Index: litLen, Scale: 1}, dstEnd)
}
genMemMove2("emit_lit_memmove_"+name, dstBase, litBase, litLen, end, avx)
if updateDst {
MOVQ(dstEnd, dstBase)
}
} else {
genMemMove("emit_lit_memmove_"+name, dstBase, litBase, litLen, end)
}
return
}
// genEmitRepeat generates a standlone emitRepeat.
func genEmitRepeat() {
TEXT("emitRepeat", NOSPLIT, "func(dst []byte, offset, length int) int")
Doc("emitRepeat writes a repeat chunk and returns the number of bytes written.",
"Length must be at least 4 and < 1<<32", "")
Pragma("noescape")
dstBase, offset, length, retval := GP64(), GP64(), GP64(), GP64()
// retval = 0
XORQ(retval, retval)
Load(Param("dst").Base(), dstBase)
Load(Param("offset"), offset)
Load(Param("length"), length)
emitRepeat("standalone", length, offset, retval, dstBase, LabelRef("gen_emit_repeat_end"))
Label("gen_emit_repeat_end")
Store(retval, ReturnIndex(0))
RET()
}
// emitRepeat can be used for inlining an emitRepeat call.
// length >= 4 and < 1<<32
// length is modified. dstBase is updated. retval is added to input.
// retval can be nil.
// Will jump to end label when finished.
// Uses 1 GP register.
func emitRepeat(name string, length, offset, retval, dstBase reg.GPVirtual, end LabelRef) {
Label("emit_repeat_again_" + name)
tmp := GP64()
MOVQ(length, tmp) // Copy length
// length -= 4
LEAQ(Mem{Base: length, Disp: -4}, length)
// if length <= 4 (use copied value)
CMPL(tmp.As32(), U8(8))
JLE(LabelRef("repeat_two_" + name))
// length < 8 && offset < 2048
CMPL(tmp.As32(), U8(12))
JGE(LabelRef("cant_repeat_two_offset_" + name))
CMPL(offset.As32(), U32(2048))
JLT(LabelRef("repeat_two_offset_" + name))
const maxRepeat = ((1 << 24) - 1) + 65536
Label("cant_repeat_two_offset_" + name)
CMPL(length.As32(), U32((1<<8)+4))
JLT(LabelRef("repeat_three_" + name)) // if length < (1<<8)+4
CMPL(length.As32(), U32((1<<16)+(1<<8)))
JLT(LabelRef("repeat_four_" + name)) // if length < (1 << 16) + (1 << 8)
CMPL(length.As32(), U32(maxRepeat))
JLT(LabelRef("repeat_five_" + name)) // If less than 24 bits to represent.
// We have have more than 24 bits
// Emit so we have at least 4 bytes left.
LEAQ(Mem{Base: length, Disp: -(maxRepeat - 4)}, length) // length -= (maxRepeat - 4)
MOVW(U16(7<<2|tagCopy1), Mem{Base: dstBase}) // dst[0] = 7<<2 | tagCopy1, dst[1] = 0
MOVW(U16(65531), Mem{Base: dstBase, Disp: 2}) // 0xfffb
MOVB(U8(255), Mem{Base: dstBase, Disp: 4})
ADDQ(U8(5), dstBase)
if retval != nil {
ADDQ(U8(5), retval)
}
JMP(LabelRef("emit_repeat_again_" + name))
// Must be able to be within 5 bytes.
Label("repeat_five_" + name)
LEAQ(Mem{Base: length, Disp: -65536}, length) // length -= 65536
MOVQ(length, offset)
MOVW(U16(7<<2|tagCopy1), Mem{Base: dstBase}) // dst[0] = 7<<2 | tagCopy1, dst[1] = 0
MOVW(length.As16(), Mem{Base: dstBase, Disp: 2}) // dst[2] = uint8(length), dst[3] = uint8(length >> 8)
SARQ(U8(16), offset) // offset = length >> 16
MOVB(offset.As8(), Mem{Base: dstBase, Disp: 4}) // dst[4] = length >> 16
if retval != nil {
ADDQ(U8(5), retval) // i += 5
}
ADDQ(U8(5), dstBase) // dst += 5
JMP(end)
Label("repeat_four_" + name)
LEAQ(Mem{Base: length, Disp: -256}, length) // length -= 256
MOVW(U16(6<<2|tagCopy1), Mem{Base: dstBase}) // dst[0] = 6<<2 | tagCopy1, dst[1] = 0
MOVW(length.As16(), Mem{Base: dstBase, Disp: 2}) // dst[2] = uint8(length), dst[3] = uint8(length >> 8)
if retval != nil {
ADDQ(U8(4), retval) // i += 4
}
ADDQ(U8(4), dstBase) // dst += 4
JMP(end)
Label("repeat_three_" + name)
LEAQ(Mem{Base: length, Disp: -4}, length) // length -= 4
MOVW(U16(5<<2|tagCopy1), Mem{Base: dstBase}) // dst[0] = 5<<2 | tagCopy1, dst[1] = 0
MOVB(length.As8(), Mem{Base: dstBase, Disp: 2}) // dst[2] = uint8(length)
if retval != nil {
ADDQ(U8(3), retval) // i += 3
}
ADDQ(U8(3), dstBase) // dst += 3
JMP(end)
Label("repeat_two_" + name)
// dst[0] = uint8(length)<<2 | tagCopy1, dst[1] = 0
SHLL(U8(2), length.As32())
ORL(U8(tagCopy1), length.As32())
MOVW(length.As16(), Mem{Base: dstBase}) // dst[0] = 7<<2 | tagCopy1, dst[1] = 0
if retval != nil {
ADDQ(U8(2), retval) // i += 2
}
ADDQ(U8(2), dstBase) // dst += 2
JMP(end)
Label("repeat_two_offset_" + name)
// Emit the remaining copy, encoded as 2 bytes.
// dst[1] = uint8(offset)
// dst[0] = uint8(offset>>8)<<5 | uint8(length)<<2 | tagCopy1
tmp = GP64()
XORQ(tmp, tmp)
// Use scale and displacement to shift and subtract values from length.
LEAQ(Mem{Base: tmp, Index: length, Scale: 4, Disp: tagCopy1}, length)
MOVB(offset.As8(), Mem{Base: dstBase, Disp: 1}) // Store offset lower byte
SARL(U8(8), offset.As32()) // Remove lower
SHLL(U8(5), offset.As32()) // Shift back up
ORL(offset.As32(), length.As32()) // OR result
MOVB(length.As8(), Mem{Base: dstBase, Disp: 0})
if retval != nil {
ADDQ(U8(2), retval) // i += 2
}
ADDQ(U8(2), dstBase) // dst += 2
JMP(end)
}
// emitCopy writes a copy chunk and returns the number of bytes written.
//
// It assumes that:
// dst is long enough to hold the encoded bytes
// 1 <= offset && offset <= math.MaxUint32
// 4 <= length && length <= 1 << 24
// genEmitCopy generates a standlone emitCopy
func genEmitCopy() {
TEXT("emitCopy", NOSPLIT, "func(dst []byte, offset, length int) int")
Doc("emitCopy writes a copy chunk and returns the number of bytes written.", "",
"It assumes that:",
" dst is long enough to hold the encoded bytes",
" 1 <= offset && offset <= math.MaxUint32",
" 4 <= length && length <= 1 << 24", "")
Pragma("noescape")
dstBase, offset, length, retval := GP64(), GP64(), GP64(), GP64()
// i := 0
XORQ(retval, retval)
Load(Param("dst").Base(), dstBase)
Load(Param("offset"), offset)
Load(Param("length"), length)
emitCopy("standalone", length, offset, retval, dstBase, LabelRef("gen_emit_copy_end"))
Label("gen_emit_copy_end")
Store(retval, ReturnIndex(0))
RET()
}
const (
tagLiteral = 0x00
tagCopy1 = 0x01
tagCopy2 = 0x02
tagCopy4 = 0x03
)
// emitCopy can be used for inlining an emitCopy call.
// length is modified (and junk). dstBase is updated. retval is added to input.
// retval can be nil.
// Will jump to end label when finished.
// Uses 2 GP registers.
func emitCopy(name string, length, offset, retval, dstBase reg.GPVirtual, end LabelRef) {
// if offset >= 65536 {
CMPL(offset.As32(), U32(65536))
JL(LabelRef("two_byte_offset_" + name))
// offset is >= 65536
// if length <= 64 goto four_bytes_remain_
CMPL(length.As32(), U8(64))
JLE(LabelRef("four_bytes_remain_" + name))
// Emit a length 64 copy, encoded as 5 bytes.
// dst[0] = 63<<2 | tagCopy4
MOVB(U8(63<<2|tagCopy4), Mem{Base: dstBase})
// dst[4] = uint8(offset >> 24)
// dst[3] = uint8(offset >> 16)
// dst[2] = uint8(offset >> 8)
// dst[1] = uint8(offset)
MOVD(offset, Mem{Base: dstBase, Disp: 1})
// length -= 64
LEAQ(Mem{Base: length, Disp: -64}, length)
if retval != nil {
ADDQ(U8(5), retval) // i+=5
}
ADDQ(U8(5), dstBase) // dst+=5
// if length >= 4 {
CMPL(length.As32(), U8(4))
JL(LabelRef("four_bytes_remain_" + name))
// Emit remaining as repeats
// return 5 + emitRepeat(dst[5:], offset, length)
// Inline call to emitRepeat. Will jump to end
emitRepeat(name+"_emit_copy", length, offset, retval, dstBase, end)
Label("four_bytes_remain_" + name)
// if length == 0 {
// return i
// }
TESTL(length.As32(), length.As32())
JZ(end)
// Emit a copy, offset encoded as 4 bytes.
// dst[i+0] = uint8(length-1)<<2 | tagCopy4
// dst[i+1] = uint8(offset)
// dst[i+2] = uint8(offset >> 8)
// dst[i+3] = uint8(offset >> 16)
// dst[i+4] = uint8(offset >> 24)
tmp := GP64()
MOVB(U8(tagCopy4), tmp.As8())
// Use displacement to subtract 1 from upshifted length.
LEAQ(Mem{Base: tmp, Disp: -(1 << 2), Index: length, Scale: 4}, length)
MOVB(length.As8(), Mem{Base: dstBase})
MOVD(offset, Mem{Base: dstBase, Disp: 1})
// return i + 5
if retval != nil {
ADDQ(U8(5), retval)
}
ADDQ(U8(5), dstBase)
JMP(end)
Label("two_byte_offset_" + name)
// Offset no more than 2 bytes.
// if length > 64 {
CMPL(length.As32(), U8(64))
JLE(LabelRef("two_byte_offset_short_" + name))
// Emit a length 60 copy, encoded as 3 bytes.
// Emit remaining as repeat value (minimum 4 bytes).
// dst[2] = uint8(offset >> 8)
// dst[1] = uint8(offset)
// dst[0] = 59<<2 | tagCopy2
MOVB(U8(59<<2|tagCopy2), Mem{Base: dstBase})
MOVW(offset.As16(), Mem{Base: dstBase, Disp: 1})
// length -= 60
LEAQ(Mem{Base: length, Disp: -60}, length)
// Emit remaining as repeats, at least 4 bytes remain.
// return 3 + emitRepeat(dst[3:], offset, length)
//}
ADDQ(U8(3), dstBase)
if retval != nil {
ADDQ(U8(3), retval)
}
// Inline call to emitRepeat. Will jump to end
emitRepeat(name+"_emit_copy_short", length, offset, retval, dstBase, end)
Label("two_byte_offset_short_" + name)
// if length >= 12 || offset >= 2048 {
CMPL(length.As32(), U8(12))
JGE(LabelRef("emit_copy_three_" + name))
CMPL(offset.As32(), U32(2048))
JGE(LabelRef("emit_copy_three_" + name))
// Emit the remaining copy, encoded as 2 bytes.
// dst[1] = uint8(offset)
// dst[0] = uint8(offset>>8)<<5 | uint8(length-4)<<2 | tagCopy1
tmp = GP64()
MOVB(U8(tagCopy1), tmp.As8())
// Use scale and displacement to shift and subtract values from length.
LEAQ(Mem{Base: tmp, Index: length, Scale: 4, Disp: -(4 << 2)}, length)
MOVB(offset.As8(), Mem{Base: dstBase, Disp: 1}) // Store offset lower byte
SHRL(U8(8), offset.As32()) // Remove lower
SHLL(U8(5), offset.As32()) // Shift back up
ORL(offset.As32(), length.As32()) // OR result
MOVB(length.As8(), Mem{Base: dstBase, Disp: 0})
if retval != nil {
ADDQ(U8(2), retval) // i += 2
}
ADDQ(U8(2), dstBase) // dst += 2
// return 2
JMP(end)
Label("emit_copy_three_" + name)
// // Emit the remaining copy, encoded as 3 bytes.
// dst[2] = uint8(offset >> 8)
// dst[1] = uint8(offset)
// dst[0] = uint8(length-1)<<2 | tagCopy2
tmp = GP64()
MOVB(U8(tagCopy2), tmp.As8())
LEAQ(Mem{Base: tmp, Disp: -(1 << 2), Index: length, Scale: 4}, length)
MOVB(length.As8(), Mem{Base: dstBase})
MOVW(offset.As16(), Mem{Base: dstBase, Disp: 1})
// return 3
if retval != nil {
ADDQ(U8(3), retval) // i += 3
}
ADDQ(U8(3), dstBase) // dst += 3
JMP(end)
}
// func memmove(to, from unsafe.Pointer, n uintptr)
// to and from will be at the end, n will be 0.
// to and from may not overlap.
// Fairly simplistic for now, can ofc. be extended.
// Uses one GP register and 8 SSE registers.
func genMemMove(name string, to, from, n reg.GPVirtual, end LabelRef) {
tmp := GP64()
MOVQ(n, tmp)
// tmp = n/128
SHRQ(U8(7), tmp)
TESTQ(tmp, tmp)
JZ(LabelRef("done_128_" + name))
Label("loop_128_" + name)
var xmmregs [8]reg.VecVirtual
// Prefetch destination for next loop.
// Prefetching source doesn't provide speedup.
// This seems to give a small boost.
const preOff = 128
PREFETCHT0(Mem{Base: to, Disp: preOff})
PREFETCHT0(Mem{Base: to, Disp: preOff + 64})
for i := 0; i < 8; i++ {
xmmregs[i] = XMM()
MOVOU(Mem{Base: from}.Offset(i*16), xmmregs[i])
}
for i := 0; i < 8; i++ {
MOVOU(xmmregs[i], Mem{Base: to}.Offset(i*16))
}
LEAQ(Mem{Base: n, Disp: -128}, n)
ADDQ(U8(8*16), from)
ADDQ(U8(8*16), to)
DECQ(tmp)
JNZ(LabelRef("loop_128_" + name))
Label("done_128_" + name)
MOVQ(n, tmp)
// tmp = n/16
SHRQ(U8(4), tmp)
TESTQ(tmp, tmp)
JZ(LabelRef("done_16_" + name))
Label("loop_16_" + name)
xmm := XMM()
MOVOU(Mem{Base: from}, xmm)
MOVOU(xmm, Mem{Base: to})
LEAQ(Mem{Base: n, Disp: -16}, n)
ADDQ(U8(16), from)
ADDQ(U8(16), to)
DECQ(tmp)
JNZ(LabelRef("loop_16_" + name))
Label("done_16_" + name)
// TODO: Use REP; MOVSB somehow.
TESTQ(n, n)
JZ(end)
Label("loop_1_" + name)
MOVB(Mem{Base: from}, tmp.As8())
MOVB(tmp.As8(), Mem{Base: to})
INCQ(from)
INCQ(to)
DECQ(n)
JNZ(LabelRef("loop_1_" + name))
}
// func memmove(to, from unsafe.Pointer, n uintptr)
// src and dst may not overlap.
// Non AVX uses 2 GP register, 16 SSE2 registers.
// AVX uses 4 GP registers 16 AVX/SSE registers.
// All passed registers may be updated.
func genMemMove2(name string, dst, src, length reg.GPVirtual, end LabelRef, avx bool) {
AX, CX := GP64(), GP64()
NOP()
name += "_memmove_"
Label(name + "tail")
// move_129through256 or smaller work whether or not the source and the
// destination memory regions overlap because they load all data into
// registers before writing it back. move_256through2048 on the other
// hand can be used only when the memory regions don't overlap or the copy
// direction is forward.
//
// BSR+branch table make almost all memmove/memclr benchmarks worse. Not worth doing.
TESTQ(length, length)
JEQ(end)
CMPQ(length, U8(2))
JBE(LabelRef(name + "move_1or2"))
CMPQ(length, U8(4))
JB(LabelRef(name + "move_3"))
JBE(LabelRef(name + "move_4"))
CMPQ(length, U8(8))
JB(LabelRef(name + "move_5through7"))
JE(LabelRef(name + "move_8"))
CMPQ(length, U8(16))
JBE(LabelRef(name + "move_9through16"))
CMPQ(length, U8(32))
JBE(LabelRef(name + "move_17through32"))
CMPQ(length, U8(64))
JBE(LabelRef(name + "move_33through64"))
CMPQ(length, U8(128))
JBE(LabelRef(name + "move_65through128"))
CMPQ(length, U32(256))
JBE(LabelRef(name + "move_129through256"))
if avx {
JMP(LabelRef(name + "avxUnaligned"))
} else {
if false {
// Don't check length for now.
Label(name + "forward")
CMPQ(length, U32(2048))
JLS(LabelRef(name + "move_256through2048"))
genMemMove(name+"fallback", dst, src, length, end)
} else {
JMP(LabelRef(name + "move_256through2048"))
}
}
/*
// If REP MOVSB isn't fast, don't use it
// FIXME: internal∕cpu·X86+const_offsetX86HasERMS(SB)
// CMPB(U8(1), U8(1)) // enhanced REP MOVSB/STOSB
JMP(LabelRef(name + "fwdBy8"))
// Check alignment
MOVL(src.As32(), AX.As32())
ORL(dst.As32(), AX.As32())
TESTL(U32(7), AX.As32())
JEQ(LabelRef(name + "fwdBy8"))
// Do 1 byte at a time
// MOVQ(length, CX)
// FIXME:
// REP; MOVSB
JMP(end)
Label(name + "fwdBy8")
// Do 8 bytes at a time
MOVQ(length, CX)
SHRQ(U8(3), CX)
ANDQ(U8(7), length)
// FIXME:
//REP; MOVSQ
JMP(LabelRef(name + "tail"))
Label(name + "back")
//check overlap
MOVQ(src, CX)
ADDQ(length, CX)
CMPQ(CX, dst)
JLS(LabelRef(name + "forward"))
//whole thing backwards has
//adjusted addresses
ADDQ(length, dst)
ADDQ(length, src)
STD()
//
// copy
//
MOVQ(length, CX)
SHRQ(U8(3), CX)
ANDQ(U8(7), length)
SUBQ(U8(8), dst)
SUBQ(U8(8), src)
// FIXME:
//REP; MOVSQ
// FIXME:
//CLD()
ADDQ(U8(8), dst)
ADDQ(U8(8), src)
SUBQ(length, dst)
SUBQ(length, src)
JMP(LabelRef(name + "tail"))
*/
Label(name + "move_1or2")
MOVB(Mem{Base: src}, AX.As8())
MOVB(Mem{Base: src, Disp: -1, Index: length, Scale: 1}, CX.As8())
MOVB(AX.As8(), Mem{Base: dst})
MOVB(CX.As8(), Mem{Base: dst, Disp: -1, Index: length, Scale: 1})
JMP(end)
Label(name + "move_4")
MOVL(Mem{Base: src}, AX.As32())
MOVL(AX.As32(), Mem{Base: dst})
JMP(end)
Label(name + "move_3")
MOVW(Mem{Base: src}, AX.As16())
MOVB(Mem{Base: src, Disp: 2}, CX.As8())
MOVW(AX.As16(), Mem{Base: dst})
MOVB(CX.As8(), Mem{Base: dst, Disp: 2})
JMP(end)
Label(name + "move_5through7")
MOVL(Mem{Base: src}, AX.As32())
MOVL(Mem{Base: src, Disp: -4, Index: length, Scale: 1}, CX.As32())
MOVL(AX.As32(), Mem{Base: dst})
MOVL(CX.As32(), Mem{Base: dst, Disp: -4, Index: length, Scale: 1})
JMP(end)
Label(name + "move_8")
// We need a separate case for 8 to make sure we write pointers atomically.
MOVQ(Mem{Base: src}, AX)
MOVQ(AX, Mem{Base: dst})
JMP(end)
Label(name + "move_9through16")
MOVQ(Mem{Base: src}, AX)
MOVQ(Mem{Base: src, Disp: -8, Index: length, Scale: 1}, CX)
MOVQ(AX, Mem{Base: dst})
MOVQ(CX, Mem{Base: dst, Disp: -8, Index: length, Scale: 1})
JMP(end)
Label(name + "move_17through32")
X0, X1, X2, X3, X4, X5, X6, X7 := XMM(), XMM(), XMM(), XMM(), XMM(), XMM(), XMM(), XMM()
X8, X9, X10, X11, X12, X13, X14, X15 := XMM(), XMM(), XMM(), XMM(), XMM(), XMM(), XMM(), XMM()
MOVOU(Mem{Base: src}, X0)
MOVOU(Mem{Base: src, Disp: -16, Index: length, Scale: 1}, X1)
MOVOU(X0, Mem{Base: dst})
MOVOU(X1, Mem{Base: dst, Disp: -16, Index: length, Scale: 1})
JMP(end)
Label(name + "move_33through64")
MOVOU(Mem{Base: src}, X0)
MOVOU(Mem{Base: src, Disp: 16}, X1)
MOVOU(Mem{Base: src, Disp: -32, Index: length, Scale: 1}, X2)
MOVOU(Mem{Base: src, Disp: -16, Index: length, Scale: 1}, X3)
MOVOU(X0, Mem{Base: dst})
MOVOU(X1, Mem{Base: dst, Disp: 16})
MOVOU(X2, Mem{Base: dst, Disp: -32, Index: length, Scale: 1})
MOVOU(X3, Mem{Base: dst, Disp: -16, Index: length, Scale: 1})
JMP(end)
Label(name + "move_65through128")
MOVOU(Mem{Base: src}, X0)
MOVOU(Mem{Base: src, Disp: 16}, X1)
MOVOU(Mem{Base: src, Disp: 32}, X2)
MOVOU(Mem{Base: src, Disp: 48}, X3)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -64}, X12)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -48}, X13)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -32}, X14)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -16}, X15)
MOVOU(X0, Mem{Base: dst})
MOVOU(X1, Mem{Base: dst, Disp: 16})
MOVOU(X2, Mem{Base: dst, Disp: 32})
MOVOU(X3, Mem{Base: dst, Disp: 48})
MOVOU(X12, Mem{Base: dst, Index: length, Scale: 1, Disp: -64})
MOVOU(X13, Mem{Base: dst, Index: length, Scale: 1, Disp: -48})
MOVOU(X14, Mem{Base: dst, Index: length, Scale: 1, Disp: -32})
MOVOU(X15, Mem{Base: dst, Index: length, Scale: 1, Disp: -16})
JMP(end)
Label(name + "move_129through256")
MOVOU(Mem{Base: src}, X0)
MOVOU(Mem{Base: src, Disp: 16}, X1)
MOVOU(Mem{Base: src, Disp: 32}, X2)
MOVOU(Mem{Base: src, Disp: 48}, X3)
MOVOU(Mem{Base: src, Disp: 64}, X4)
MOVOU(Mem{Base: src, Disp: 80}, X5)
MOVOU(Mem{Base: src, Disp: 96}, X6)
MOVOU(Mem{Base: src, Disp: 112}, X7)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -128}, X8)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -112}, X9)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -96}, X10)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -80}, X11)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -64}, X12)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -48}, X13)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -32}, X14)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -16}, X15)
MOVOU(X0, Mem{Base: dst})
MOVOU(X1, Mem{Base: dst, Disp: 16})
MOVOU(X2, Mem{Base: dst, Disp: 32})
MOVOU(X3, Mem{Base: dst, Disp: 48})
MOVOU(X4, Mem{Base: dst, Disp: 64})
MOVOU(X5, Mem{Base: dst, Disp: 80})
MOVOU(X6, Mem{Base: dst, Disp: 96})
MOVOU(X7, Mem{Base: dst, Disp: 112})
MOVOU(X8, Mem{Base: dst, Index: length, Scale: 1, Disp: -128})
MOVOU(X9, Mem{Base: dst, Index: length, Scale: 1, Disp: -112})
MOVOU(X10, Mem{Base: dst, Index: length, Scale: 1, Disp: -96})
MOVOU(X11, Mem{Base: dst, Index: length, Scale: 1, Disp: -80})
MOVOU(X12, Mem{Base: dst, Index: length, Scale: 1, Disp: -64})
MOVOU(X13, Mem{Base: dst, Index: length, Scale: 1, Disp: -48})
MOVOU(X14, Mem{Base: dst, Index: length, Scale: 1, Disp: -32})
MOVOU(X15, Mem{Base: dst, Index: length, Scale: 1, Disp: -16})
JMP(end)
Label(name + "move_256through2048")
LEAQ(Mem{Base: length, Disp: -256}, length)
MOVOU(Mem{Base: src}, X0)
MOVOU(Mem{Base: src, Disp: 16}, X1)
MOVOU(Mem{Base: src, Disp: 32}, X2)
MOVOU(Mem{Base: src, Disp: 48}, X3)
MOVOU(Mem{Base: src, Disp: 64}, X4)
MOVOU(Mem{Base: src, Disp: 80}, X5)
MOVOU(Mem{Base: src, Disp: 96}, X6)
MOVOU(Mem{Base: src, Disp: 112}, X7)
MOVOU(Mem{Base: src, Disp: 128}, X8)
MOVOU(Mem{Base: src, Disp: 144}, X9)
MOVOU(Mem{Base: src, Disp: 160}, X10)
MOVOU(Mem{Base: src, Disp: 176}, X11)
MOVOU(Mem{Base: src, Disp: 192}, X12)
MOVOU(Mem{Base: src, Disp: 208}, X13)
MOVOU(Mem{Base: src, Disp: 224}, X14)
MOVOU(Mem{Base: src, Disp: 240}, X15)
MOVOU(X0, Mem{Base: dst})
MOVOU(X1, Mem{Base: dst, Disp: 16})
MOVOU(X2, Mem{Base: dst, Disp: 32})
MOVOU(X3, Mem{Base: dst, Disp: 48})
MOVOU(X4, Mem{Base: dst, Disp: 64})
MOVOU(X5, Mem{Base: dst, Disp: 80})
MOVOU(X6, Mem{Base: dst, Disp: 96})
MOVOU(X7, Mem{Base: dst, Disp: 112})
MOVOU(X8, Mem{Base: dst, Disp: 128})
MOVOU(X9, Mem{Base: dst, Disp: 144})
MOVOU(X10, Mem{Base: dst, Disp: 160})
MOVOU(X11, Mem{Base: dst, Disp: 176})
MOVOU(X12, Mem{Base: dst, Disp: 192})
MOVOU(X13, Mem{Base: dst, Disp: 208})
MOVOU(X14, Mem{Base: dst, Disp: 224})
MOVOU(X15, Mem{Base: dst, Disp: 240})
CMPQ(length, U32(256))
LEAQ(Mem{Base: src, Disp: 256}, src)
LEAQ(Mem{Base: dst, Disp: 256}, dst)
JGE(LabelRef(name + "move_256through2048"))
JMP(LabelRef(name + "tail"))
if avx {
Label(name + "avxUnaligned")
R8, R10 := GP64(), GP64()
// There are two implementations of move algorithm.
// The first one for non-overlapped memory regions. It uses forward copying.
// We do not support overlapping input
// Non-temporal copy would be better for big sizes.
// Disabled since big copies are unlikely.
// If enabling, test functionality.
const enableBigData = false
if enableBigData {
CMPQ(length, U32(0x100000))
JAE(LabelRef(name + "gobble_big_data_fwd"))
}
// Memory layout on the source side
// src CX
// |<---------length before correction--------->|
// | |<--length corrected-->| |
// | | |<--- AX --->|
// |<-R11->| |<-128 bytes->|
// +----------------------------------------+
// | Head | Body | Tail |
// +-------+------------------+-------------+
// ^ ^ ^
// | | |
// Save head into Y4 Save tail into X5..X12
// |
// src+R11, where R11 = ((dst & -32) + 32) - dst
// Algorithm:
// 1. Unaligned save of the tail's 128 bytes
// 2. Unaligned save of the head's 32 bytes
// 3. Destination-aligned copying of body (128 bytes per iteration)
// 4. Put head on the new place
// 5. Put the tail on the new place
// It can be important to satisfy processor's pipeline requirements for
// small sizes as the cost of unaligned memory region copying is
// comparable with the cost of main loop. So code is slightly messed there.
// There is more clean implementation of that algorithm for bigger sizes
// where the cost of unaligned part copying is negligible.
// You can see it after gobble_big_data_fwd label.
Y0, Y1, Y2, Y3, Y4 := YMM(), YMM(), YMM(), YMM(), YMM()
LEAQ(Mem{Base: src, Index: length, Scale: 1}, CX)
MOVQ(dst, R10)
// CX points to the end of buffer so we need go back slightly. We will use negative offsets there.
MOVOU(Mem{Base: CX, Disp: -0x80}, X5)
MOVOU(Mem{Base: CX, Disp: -0x70}, X6)
MOVQ(U32(0x80), AX)
// Align destination address
ANDQ(U32(0xffffffe0), dst)
ADDQ(U8(32), dst)
// Continue tail saving.
MOVOU(Mem{Base: CX, Disp: -0x60}, X7)
MOVOU(Mem{Base: CX, Disp: -0x50}, X8)
// Make R8 delta between aligned and unaligned destination addresses.
MOVQ(dst, R8)
SUBQ(R10, R8)
// Continue tail saving.
MOVOU(Mem{Base: CX, Disp: -0x40}, X9)
MOVOU(Mem{Base: CX, Disp: -0x30}, X10)
// Let's make bytes-to-copy value adjusted as we've prepared unaligned part for copying.
SUBQ(R8, length)
// Continue tail saving.
MOVOU(Mem{Base: CX, Disp: -0x20}, X11)
MOVOU(Mem{Base: CX, Disp: -0x10}, X12)
// The tail will be put on its place after main body copying.
// It's time for the unaligned heading part.
VMOVDQU(Mem{Base: src}, Y4)
// Adjust source address to point past head.
ADDQ(R8, src)
SUBQ(AX, length)
// Aligned memory copying there
Label(name + "gobble_128_loop")
VMOVDQU(Mem{Base: src}, Y0)
VMOVDQU(Mem{Base: src, Disp: 0x20}, Y1)
VMOVDQU(Mem{Base: src, Disp: 0x40}, Y2)
VMOVDQU(Mem{Base: src, Disp: 0x60}, Y3)
ADDQ(AX, src)
VMOVDQA(Y0, Mem{Base: dst})
VMOVDQA(Y1, Mem{Base: dst, Disp: 0x20})
VMOVDQA(Y2, Mem{Base: dst, Disp: 0x40})
VMOVDQA(Y3, Mem{Base: dst, Disp: 0x60})
ADDQ(AX, dst)
SUBQ(AX, length)
JA(LabelRef(name + "gobble_128_loop"))
// Now we can store unaligned parts.
ADDQ(AX, length)
ADDQ(dst, length)
VMOVDQU(Y4, Mem{Base: R10})
VZEROUPPER()
MOVOU(X5, Mem{Base: length, Disp: -0x80})
MOVOU(X6, Mem{Base: length, Disp: -0x70})
MOVOU(X7, Mem{Base: length, Disp: -0x60})
MOVOU(X8, Mem{Base: length, Disp: -0x50})
MOVOU(X9, Mem{Base: length, Disp: -0x40})
MOVOU(X10, Mem{Base: length, Disp: -0x30})
MOVOU(X11, Mem{Base: length, Disp: -0x20})
MOVOU(X12, Mem{Base: length, Disp: -0x10})
JMP(end)
if enableBigData {
Label(name + "gobble_big_data_fwd")
// There is forward copying for big regions.
// It uses non-temporal mov instructions.
// Details of this algorithm are commented previously for small sizes.
LEAQ(Mem{Base: src, Index: length, Scale: 1}, CX)
MOVOU(Mem{Base: src, Index: length, Scale: 1, Disp: -0x80}, X5)
MOVOU(Mem{Base: CX, Disp: -0x70}, X6)
MOVOU(Mem{Base: CX, Disp: -0x60}, X7)
MOVOU(Mem{Base: CX, Disp: -0x50}, X8)
MOVOU(Mem{Base: CX, Disp: -0x40}, X9)
MOVOU(Mem{Base: CX, Disp: -0x30}, X10)
MOVOU(Mem{Base: CX, Disp: -0x20}, X11)
MOVOU(Mem{Base: CX, Disp: -0x10}, X12)
VMOVDQU(Mem{Base: src}, Y4)
MOVQ(dst, R8)
ANDQ(U32(0xffffffe0), dst)
ADDQ(U8(32), dst)
MOVQ(dst, R10)
SUBQ(R8, R10)
SUBQ(R10, length)
ADDQ(R10, src)
LEAQ(Mem{Base: dst, Index: length, Scale: 1}, CX)
SUBQ(U8(0x80), length)
Label(name + "gobble_mem_fwd_loop")
PREFETCHNTA(Mem{Base: src, Disp: 0x1c0})
PREFETCHNTA(Mem{Base: src, Disp: 0x280})
// Prefetch values were chosen empirically.
// Approach for prefetch usage as in 7.6.6 of [1]
// [1] 64-ia-32-architectures-optimization-manual.pdf
// https://www.intel.ru/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf
VMOVDQU(Mem{Base: src}, Y0)
VMOVDQU(Mem{Base: src, Disp: 0x20}, Y1)
VMOVDQU(Mem{Base: src, Disp: 0x40}, Y2)
VMOVDQU(Mem{Base: src, Disp: 0x60}, Y3)
ADDQ(U8(0x80), src)
VMOVNTDQ(Y0, Mem{Base: dst})
VMOVNTDQ(Y1, Mem{Base: dst, Disp: 0x20})
VMOVNTDQ(Y2, Mem{Base: dst, Disp: 0x20})
VMOVNTDQ(Y3, Mem{Base: dst, Disp: 0x60})
ADDQ(U8(0x80), dst)
SUBQ(U8(0x80), length)
JA(LabelRef(name + "gobble_mem_fwd_loop"))
// NT instructions don't follow the normal cache-coherency rules.
// We need SFENCE there to make copied data available timely.
SFENCE()
VMOVDQU(Y4, Mem{Base: R8})
VZEROUPPER()
MOVOU(X5, Mem{Base: CX, Disp: -0x80})
MOVOU(X6, Mem{Base: CX, Disp: -0x70})
MOVOU(X7, Mem{Base: CX, Disp: -0x60})
MOVOU(X8, Mem{Base: CX, Disp: -0x50})
MOVOU(X9, Mem{Base: CX, Disp: -0x40})
MOVOU(X10, Mem{Base: CX, Disp: -0x30})
MOVOU(X11, Mem{Base: CX, Disp: -0x20})
MOVOU(X12, Mem{Base: CX, Disp: -0x10})
JMP(end)
}
}
}
// genMatchLen generates standalone matchLen.
func genMatchLen() {
TEXT("matchLen", NOSPLIT, "func(a, b []byte) int")
Doc("matchLen returns how many bytes match in a and b", "",
"It assumes that:",
" len(a) <= len(b)", "")
Pragma("noescape")
aBase, bBase, length := GP64(), GP64(), GP64()
Load(Param("a").Base(), aBase)
Load(Param("b").Base(), bBase)
Load(Param("a").Len(), length)
l := matchLen("standalone", Mem{Base: aBase}, Mem{Base: bBase}, length, LabelRef("gen_match_len_end"))
Label("gen_match_len_end")
Store(l, ReturnIndex(0))
RET()
}
// matchLen returns the number of matching bytes of a and b.
// len is the maximum number of bytes to match.
// Will jump to end when done and returns the length.
// Uses 2 GP registers.
func matchLen(name string, a, b Mem, len reg.GPVirtual, end LabelRef) reg.GPVirtual {
tmp, matched := GP64(), GP64()
XORQ(matched, matched)
CMPQ(len, U8(8))
JL(LabelRef("matchlen_single_" + name))
Label("matchlen_loopback_" + name)
MOVQ(Mem{Base: a.Base, Index: matched, Scale: 1}, tmp)
XORQ(Mem{Base: b.Base, Index: matched, Scale: 1}, tmp)
TESTQ(tmp, tmp)
JZ(LabelRef("matchlen_loop_" + name))
// Not all match.
BSFQ(tmp, tmp)
SARQ(U8(3), tmp)
LEAQ(Mem{Base: matched, Index: tmp, Scale: 1}, matched)
JMP(end)
// All 8 byte matched, update and loop.
Label("matchlen_loop_" + name)
LEAQ(Mem{Base: len, Disp: -8}, len)
LEAQ(Mem{Base: matched, Disp: 8}, matched)
CMPQ(len, U8(8))
JGE(LabelRef("matchlen_loopback_" + name))
// Less than 8 bytes left.
Label("matchlen_single_" + name)
TESTQ(len, len)
JZ(end)
Label("matchlen_single_loopback_" + name)
MOVB(Mem{Base: a.Base, Index: matched, Scale: 1}, tmp.As8())
CMPB(Mem{Base: b.Base, Index: matched, Scale: 1}, tmp.As8())
JNE(end)
LEAQ(Mem{Base: matched, Disp: 1}, matched)
DECQ(len)
JNZ(LabelRef("matchlen_single_loopback_" + name))
JMP(end)
return matched
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/doc.go 0000664 0000000 0000000 00000000657 14370657153 0027102 0 ustar 00root root 0000000 0000000 // Package allocfail is a regression test for issue 100 based on the original reported allocation failure.
//
// Based on the pull request https://github.com/klauspost/compress/pull/186 at
// c1f3cf132cd8e214b38cc16e418bf2e501ccda93 with the lines after "FIXME"
// comments re-activated and other minimal edits to make it work in this
// environment.
package allocfail
//go:generate go run asm.go -out allocfail.s -stubs stubs.go
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/allocfail/stubs.go 0000664 0000000 0000000 00000005361 14370657153 0027472 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out allocfail.s -stubs stubs.go. DO NOT EDIT.
//go:build !appengine && !noasm && gc
package allocfail
// encodeBlockAsm encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsm(dst []byte, src []byte) int
// encodeBlockAsm14B encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsm14B(dst []byte, src []byte) int
// encodeBlockAsm12B encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsm12B(dst []byte, src []byte) int
// encodeBlockAsmAvx encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsmAvx(dst []byte, src []byte) int
// encodeBlockAsm14BAvx encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsm14BAvx(dst []byte, src []byte) int
// encodeBlockAsm12BAvx encodes a non-empty src to a guaranteed-large-enough dst.
// It assumes that the varint-encoded length of the decompressed bytes has already been written.
//
//go:noescape
func encodeBlockAsm12BAvx(dst []byte, src []byte) int
// emitLiteral writes a literal chunk and returns the number of bytes written.
//
// It assumes that:
//
// dst is long enough to hold the encoded bytes
// 0 <= len(lit) && len(lit) <= math.MaxUint32
//
//go:noescape
func emitLiteral(dst []byte, lit []byte) int
// emitLiteralAvx writes a literal chunk and returns the number of bytes written.
//
// It assumes that:
//
// dst is long enough to hold the encoded bytes
// 0 <= len(lit) && len(lit) <= math.MaxUint32
//
//go:noescape
func emitLiteralAvx(dst []byte, lit []byte) int
// emitRepeat writes a repeat chunk and returns the number of bytes written.
// Length must be at least 4 and < 1<<32
//
//go:noescape
func emitRepeat(dst []byte, offset int, length int) int
// emitCopy writes a copy chunk and returns the number of bytes written.
//
// It assumes that:
//
// dst is long enough to hold the encoded bytes
// 1 <= offset && offset <= math.MaxUint32
// 4 <= length && length <= 1 << 24
//
//go:noescape
func emitCopy(dst []byte, offset int, length int) int
// matchLen returns how many bytes match in a and b
//
// It assumes that:
//
// len(a) <= len(b)
//
//go:noescape
func matchLen(a []byte, b []byte) int
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/ 0000775 0000000 0000000 00000000000 14370657153 0025703 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/asm.go 0000664 0000000 0000000 00000000542 14370657153 0027013 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Issue100", NOSPLIT, "func() uint64")
x := GP64()
XORQ(x, x)
for i := 1; i <= 100; i++ {
t := GP64()
MOVQ(U32(i), t)
ADDQ(t.As64(), x)
}
Store(x, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/doc.go 0000664 0000000 0000000 00000000171 14370657153 0026776 0 ustar 00root root 0000000 0000000 // Package minrepro contains a minimal reproducer for the aliased register allocation bug in issue 100.
package minrepro
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/minrepro.s 0000664 0000000 0000000 00000007200 14370657153 0027721 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out minrepro.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue100() uint64
TEXT ·Issue100(SB), NOSPLIT, $0-8
XORQ AX, AX
MOVQ $0x00000001, CX
ADDQ CX, AX
MOVQ $0x00000002, CX
ADDQ CX, AX
MOVQ $0x00000003, CX
ADDQ CX, AX
MOVQ $0x00000004, CX
ADDQ CX, AX
MOVQ $0x00000005, CX
ADDQ CX, AX
MOVQ $0x00000006, CX
ADDQ CX, AX
MOVQ $0x00000007, CX
ADDQ CX, AX
MOVQ $0x00000008, CX
ADDQ CX, AX
MOVQ $0x00000009, CX
ADDQ CX, AX
MOVQ $0x0000000a, CX
ADDQ CX, AX
MOVQ $0x0000000b, CX
ADDQ CX, AX
MOVQ $0x0000000c, CX
ADDQ CX, AX
MOVQ $0x0000000d, CX
ADDQ CX, AX
MOVQ $0x0000000e, CX
ADDQ CX, AX
MOVQ $0x0000000f, CX
ADDQ CX, AX
MOVQ $0x00000010, CX
ADDQ CX, AX
MOVQ $0x00000011, CX
ADDQ CX, AX
MOVQ $0x00000012, CX
ADDQ CX, AX
MOVQ $0x00000013, CX
ADDQ CX, AX
MOVQ $0x00000014, CX
ADDQ CX, AX
MOVQ $0x00000015, CX
ADDQ CX, AX
MOVQ $0x00000016, CX
ADDQ CX, AX
MOVQ $0x00000017, CX
ADDQ CX, AX
MOVQ $0x00000018, CX
ADDQ CX, AX
MOVQ $0x00000019, CX
ADDQ CX, AX
MOVQ $0x0000001a, CX
ADDQ CX, AX
MOVQ $0x0000001b, CX
ADDQ CX, AX
MOVQ $0x0000001c, CX
ADDQ CX, AX
MOVQ $0x0000001d, CX
ADDQ CX, AX
MOVQ $0x0000001e, CX
ADDQ CX, AX
MOVQ $0x0000001f, CX
ADDQ CX, AX
MOVQ $0x00000020, CX
ADDQ CX, AX
MOVQ $0x00000021, CX
ADDQ CX, AX
MOVQ $0x00000022, CX
ADDQ CX, AX
MOVQ $0x00000023, CX
ADDQ CX, AX
MOVQ $0x00000024, CX
ADDQ CX, AX
MOVQ $0x00000025, CX
ADDQ CX, AX
MOVQ $0x00000026, CX
ADDQ CX, AX
MOVQ $0x00000027, CX
ADDQ CX, AX
MOVQ $0x00000028, CX
ADDQ CX, AX
MOVQ $0x00000029, CX
ADDQ CX, AX
MOVQ $0x0000002a, CX
ADDQ CX, AX
MOVQ $0x0000002b, CX
ADDQ CX, AX
MOVQ $0x0000002c, CX
ADDQ CX, AX
MOVQ $0x0000002d, CX
ADDQ CX, AX
MOVQ $0x0000002e, CX
ADDQ CX, AX
MOVQ $0x0000002f, CX
ADDQ CX, AX
MOVQ $0x00000030, CX
ADDQ CX, AX
MOVQ $0x00000031, CX
ADDQ CX, AX
MOVQ $0x00000032, CX
ADDQ CX, AX
MOVQ $0x00000033, CX
ADDQ CX, AX
MOVQ $0x00000034, CX
ADDQ CX, AX
MOVQ $0x00000035, CX
ADDQ CX, AX
MOVQ $0x00000036, CX
ADDQ CX, AX
MOVQ $0x00000037, CX
ADDQ CX, AX
MOVQ $0x00000038, CX
ADDQ CX, AX
MOVQ $0x00000039, CX
ADDQ CX, AX
MOVQ $0x0000003a, CX
ADDQ CX, AX
MOVQ $0x0000003b, CX
ADDQ CX, AX
MOVQ $0x0000003c, CX
ADDQ CX, AX
MOVQ $0x0000003d, CX
ADDQ CX, AX
MOVQ $0x0000003e, CX
ADDQ CX, AX
MOVQ $0x0000003f, CX
ADDQ CX, AX
MOVQ $0x00000040, CX
ADDQ CX, AX
MOVQ $0x00000041, CX
ADDQ CX, AX
MOVQ $0x00000042, CX
ADDQ CX, AX
MOVQ $0x00000043, CX
ADDQ CX, AX
MOVQ $0x00000044, CX
ADDQ CX, AX
MOVQ $0x00000045, CX
ADDQ CX, AX
MOVQ $0x00000046, CX
ADDQ CX, AX
MOVQ $0x00000047, CX
ADDQ CX, AX
MOVQ $0x00000048, CX
ADDQ CX, AX
MOVQ $0x00000049, CX
ADDQ CX, AX
MOVQ $0x0000004a, CX
ADDQ CX, AX
MOVQ $0x0000004b, CX
ADDQ CX, AX
MOVQ $0x0000004c, CX
ADDQ CX, AX
MOVQ $0x0000004d, CX
ADDQ CX, AX
MOVQ $0x0000004e, CX
ADDQ CX, AX
MOVQ $0x0000004f, CX
ADDQ CX, AX
MOVQ $0x00000050, CX
ADDQ CX, AX
MOVQ $0x00000051, CX
ADDQ CX, AX
MOVQ $0x00000052, CX
ADDQ CX, AX
MOVQ $0x00000053, CX
ADDQ CX, AX
MOVQ $0x00000054, CX
ADDQ CX, AX
MOVQ $0x00000055, CX
ADDQ CX, AX
MOVQ $0x00000056, CX
ADDQ CX, AX
MOVQ $0x00000057, CX
ADDQ CX, AX
MOVQ $0x00000058, CX
ADDQ CX, AX
MOVQ $0x00000059, CX
ADDQ CX, AX
MOVQ $0x0000005a, CX
ADDQ CX, AX
MOVQ $0x0000005b, CX
ADDQ CX, AX
MOVQ $0x0000005c, CX
ADDQ CX, AX
MOVQ $0x0000005d, CX
ADDQ CX, AX
MOVQ $0x0000005e, CX
ADDQ CX, AX
MOVQ $0x0000005f, CX
ADDQ CX, AX
MOVQ $0x00000060, CX
ADDQ CX, AX
MOVQ $0x00000061, CX
ADDQ CX, AX
MOVQ $0x00000062, CX
ADDQ CX, AX
MOVQ $0x00000063, CX
ADDQ CX, AX
MOVQ $0x00000064, CX
ADDQ CX, AX
MOVQ AX, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/minrepro_test.go 0000664 0000000 0000000 00000000426 14370657153 0031126 0 ustar 00root root 0000000 0000000 package minrepro
import (
"testing"
)
//go:generate go run asm.go -out minrepro.s -stubs stub.go
func TestIssue100(t *testing.T) {
n := uint64(100)
expect := n * (n + 1) / 2
if got := Issue100(); got != expect {
t.Fatalf("Issue100() = %v; expect %v", got, expect)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue100/minrepro/stub.go 0000664 0000000 0000000 00000000203 14370657153 0027202 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out minrepro.s -stubs stub.go. DO NOT EDIT.
package minrepro
func Issue100() uint64
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/ 0000775 0000000 0000000 00000000000 14370657153 0024054 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/asm.go 0000664 0000000 0000000 00000001475 14370657153 0025172 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Triangle", NOSPLIT, "func(n uint64) uint64")
Doc("Triangle computes the nth triangle number.")
n := Load(Param("n"), GP64())
Comment("Initialize sum register to zero.")
s := GP64()
XORQ(s, s)
// Use two labels for the top of the loop.
Label("loop_even")
Label("loop_odd")
Comment("Loop until n is zero.")
CMPQ(n, Imm(0))
JE(LabelRef("done"))
Comment("Add n to sum.")
ADDQ(n, s)
Comment("Decrement n.")
DECQ(n)
Comment("Jump to one of the loop labels depending on parity.")
TESTQ(U32(1), n)
JZ(LabelRef("loop_even"))
JMP(LabelRef("loop_odd"))
Label("done")
Comment("Store sum to return value.")
Store(s, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/doc.go 0000664 0000000 0000000 00000000077 14370657153 0025154 0 ustar 00root root 0000000 0000000 // Package issue122 tests consecutive labels.
package issue122
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/issue122.s 0000664 0000000 0000000 00000001062 14370657153 0025614 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue122.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Triangle(n uint64) uint64
TEXT ·Triangle(SB), NOSPLIT, $0-16
MOVQ n+0(FP), AX
// Initialize sum register to zero.
XORQ CX, CX
loop_even:
loop_odd:
// Loop until n is zero.
CMPQ AX, $0x00
JE done
// Add n to sum.
ADDQ AX, CX
// Decrement n.
DECQ AX
// Jump to one of the loop labels depending on parity.
TESTQ $0x00000001, AX
JZ loop_even
JMP loop_odd
done:
// Store sum to return value.
MOVQ CX, ret+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/issue122_test.go 0000664 0000000 0000000 00000000532 14370657153 0027017 0 ustar 00root root 0000000 0000000 package issue122
import (
"testing"
)
//go:generate go run asm.go -out issue122.s -stubs stub.go
func TestTriangle(t *testing.T) {
expect := func(n uint64) uint64 { return n * (n + 1) / 2 }
for n := uint64(1); n < 42; n++ {
if got := Triangle(n); expect(n) != got {
t.Fatalf("Triangle(%v) = %v; expect %v", n, got, expect(n))
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue122/stub.go 0000664 0000000 0000000 00000000271 14370657153 0025360 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue122.s -stubs stub.go. DO NOT EDIT.
package issue122
// Triangle computes the nth triangle number.
func Triangle(n uint64) uint64
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/ 0000775 0000000 0000000 00000000000 14370657153 0024062 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/asm.go 0000664 0000000 0000000 00000000345 14370657153 0025173 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
)
func main() {
TEXT("Uint16", 0, "func(n uint16)")
Doc("Uint16 tests argument size without return types.")
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/doc.go 0000664 0000000 0000000 00000000270 14370657153 0025155 0 ustar 00root root 0000000 0000000 // Package issue191 tests for correct argument size for a function taking a
// single uint16 argument. Prior to the fix, this test case triggered an asmdecl
// error.
package issue191
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/issue191.s 0000664 0000000 0000000 00000000220 14370657153 0025623 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue191.s -stubs stub.go. DO NOT EDIT.
// func Uint16(n uint16)
TEXT ·Uint16(SB), $0-2
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/issue191_test.go 0000664 0000000 0000000 00000000216 14370657153 0027032 0 ustar 00root root 0000000 0000000 package issue191
import "testing"
//go:generate go run asm.go -out issue191.s -stubs stub.go
func TestUint16(t *testing.T) {
Uint16(42)
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue191/stub.go 0000664 0000000 0000000 00000000266 14370657153 0025372 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue191.s -stubs stub.go. DO NOT EDIT.
package issue191
// Uint16 tests argument size without return types.
func Uint16(n uint16)
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/ 0000775 0000000 0000000 00000000000 14370657153 0024066 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/asm.go 0000664 0000000 0000000 00000000371 14370657153 0025176 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
)
func main() {
TEXT("Issue195", NOSPLIT|NOFRAME, "func(x *uint64, y uint32)")
Doc("Issue195 tests for correct argument size.")
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/doc.go 0000664 0000000 0000000 00000000231 14370657153 0025156 0 ustar 00root root 0000000 0000000 // Package issue195 tests for correct argument size for a function without
// return types. This test is closely related to issue #191.
package issue195
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/issue195.s 0000664 0000000 0000000 00000000310 14370657153 0025633 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue195.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue195(x *uint64, y uint32)
TEXT ·Issue195(SB), NOSPLIT|NOFRAME, $0-12
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/issue195_test.go 0000664 0000000 0000000 00000000247 14370657153 0027046 0 ustar 00root root 0000000 0000000 package issue195
import "testing"
//go:generate go run asm.go -out issue195.s -stubs stub.go
func TestIssue195(t *testing.T) {
x := uint64(42)
Issue195(&x, 42)
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue195/stub.go 0000664 0000000 0000000 00000000274 14370657153 0025375 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue195.s -stubs stub.go. DO NOT EDIT.
package issue195
// Issue195 tests for correct argument size.
func Issue195(x *uint64, y uint32)
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/ 0000775 0000000 0000000 00000000000 14370657153 0024063 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/asm.go 0000664 0000000 0000000 00000001306 14370657153 0025172 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"fmt"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
variants := []struct {
Size int
Register func() GPVirtual
XOR func(Op, Op)
}{
{8, GP8L, XORB},
{16, GP16, XORW},
{32, GP32, XORL},
{64, GP64, XORQ},
}
for _, v := range variants {
name := fmt.Sprintf("Not%d", v.Size)
TEXT(name, NOSPLIT, "func(x bool) bool")
Doc(fmt.Sprintf("%s returns the boolean negation of x using a %d-bit intermediate.", name, v.Size))
x := v.Register()
Load(Param("x"), x)
v.XOR(U8(1), x)
Store(x.As8L(), ReturnIndex(0))
RET()
}
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/doc.go 0000664 0000000 0000000 00000000244 14370657153 0025157 0 ustar 00root root 0000000 0000000 // Package issue336 tests boolean arguments and return values.
//
// Issue #336 pointed out that move deduction for boolean types was not present.
package issue336
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/issue336.s 0000664 0000000 0000000 00000001145 14370657153 0025634 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue336.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Not8(x bool) bool
TEXT ·Not8(SB), NOSPLIT, $0-9
MOVB x+0(FP), AL
XORB $0x01, AL
MOVB AL, ret+8(FP)
RET
// func Not16(x bool) bool
TEXT ·Not16(SB), NOSPLIT, $0-9
MOVBWZX x+0(FP), AX
XORW $0x01, AX
MOVB AL, ret+8(FP)
RET
// func Not32(x bool) bool
TEXT ·Not32(SB), NOSPLIT, $0-9
MOVBLZX x+0(FP), AX
XORL $0x01, AX
MOVB AL, ret+8(FP)
RET
// func Not64(x bool) bool
TEXT ·Not64(SB), NOSPLIT, $0-9
MOVBQZX x+0(FP), AX
XORQ $0x01, AX
MOVB AL, ret+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/issue336_test.go 0000664 0000000 0000000 00000000451 14370657153 0027035 0 ustar 00root root 0000000 0000000 package issue336
import "testing"
//go:generate go run asm.go -out issue336.s -stubs stub.go
func TestNot(t *testing.T) {
nots := []func(bool) bool{Not8, Not16, Not32, Not64}
for _, not := range nots {
for _, x := range []bool{true, false} {
if not(x) != !x {
t.Fail()
}
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue336/stub.go 0000664 0000000 0000000 00000000754 14370657153 0025375 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue336.s -stubs stub.go. DO NOT EDIT.
package issue336
// Not8 returns the boolean negation of x using a 8-bit intermediate.
func Not8(x bool) bool
// Not16 returns the boolean negation of x using a 16-bit intermediate.
func Not16(x bool) bool
// Not32 returns the boolean negation of x using a 32-bit intermediate.
func Not32(x bool) bool
// Not64 returns the boolean negation of x using a 64-bit intermediate.
func Not64(x bool) bool
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/ 0000775 0000000 0000000 00000000000 14370657153 0023774 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/asm.go 0000664 0000000 0000000 00000000663 14370657153 0025110 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
TEXT("Issue50", NOSPLIT, "func(x uint32) uint32")
Doc(
"Issue50 reported that MOVD/MOVQ was missing the r32, xmm form.",
"This function deliberately exercises this instruction form.",
)
x := Load(Param("x"), GP32())
xmm := XMM()
MOVQ(x, xmm)
r := GP32()
MOVQ(xmm, r)
Store(r, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/doc.go 0000664 0000000 0000000 00000000121 14370657153 0025062 0 ustar 00root root 0000000 0000000 // Package issue50 tests for 32-bit MOVD/MOVQ instruction forms.
package issue50
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/issue50.s 0000664 0000000 0000000 00000000413 14370657153 0025453 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue50.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue50(x uint32) uint32
// Requires: SSE2
TEXT ·Issue50(SB), NOSPLIT, $0-12
MOVL x+0(FP), AX
MOVQ AX, X0
MOVQ X0, AX
MOVL AX, ret+8(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/issue50_test.go 0000664 0000000 0000000 00000000427 14370657153 0026662 0 ustar 00root root 0000000 0000000 package issue50
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out issue50.s -stubs stub.go
func TestIssue50(t *testing.T) {
expect := func(x uint32) uint32 { return x }
if err := quick.CheckEqual(Issue50, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue50/stub.go 0000664 0000000 0000000 00000000411 14370657153 0025274 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue50.s -stubs stub.go. DO NOT EDIT.
package issue50
// Issue50 reported that MOVD/MOVQ was missing the r32, xmm form.
// This function deliberately exercises this instruction form.
func Issue50(x uint32) uint32
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue62/ 0000775 0000000 0000000 00000000000 14370657153 0023777 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue62/asm.go 0000664 0000000 0000000 00000000327 14370657153 0025110 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import . "github.com/mmcloughlin/avo/build"
func main() {
Package("github.com/mmcloughlin/avo/tests/fixedbugs/issue62")
Implement("private")
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue62/issue62.s 0000664 0000000 0000000 00000000170 14370657153 0025461 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue62.s. DO NOT EDIT.
// func private()
TEXT ·private(SB), $0
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue62/issue62_test.go 0000664 0000000 0000000 00000000175 14370657153 0026670 0 ustar 00root root 0000000 0000000 package issue62
import "testing"
//go:generate go run asm.go -out issue62.s
func TestPrivate(t *testing.T) {
private()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue62/stub.go 0000664 0000000 0000000 00000000256 14370657153 0025306 0 ustar 00root root 0000000 0000000 // Package issue62 tests for using Implement() with an unexported function.
package issue62
// private serves as an example unexported function to implement.
func private()
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue65/ 0000775 0000000 0000000 00000000000 14370657153 0024002 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue65/asm.go 0000664 0000000 0000000 00000000436 14370657153 0025114 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
TEXT("Issue65", NOSPLIT, "func()")
VINSERTI128(Imm(1), Y0.AsX(), Y1, Y2)
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue65/doc.go 0000664 0000000 0000000 00000000553 14370657153 0025101 0 ustar 00root root 0000000 0000000 // Package issue65 is a regression test for a bug involving casting physical registers.
//
// Regression test for a bug where casting a physical register would give the
// error "non physical register found".
//
// See: https://github.com/mmcloughlin/avo/issues/65#issuecomment-576850145
package issue65
//go:generate go run asm.go -out issue65.s -stubs stub.go
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue65/issue65.s 0000664 0000000 0000000 00000000330 14370657153 0025465 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue65.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue65()
// Requires: AVX2
TEXT ·Issue65(SB), NOSPLIT, $0
VINSERTI128 $0x01, X0, Y1, Y2
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue65/stub.go 0000664 0000000 0000000 00000000171 14370657153 0025305 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue65.s -stubs stub.go. DO NOT EDIT.
package issue65
func Issue65()
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/ 0000775 0000000 0000000 00000000000 14370657153 0024005 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/asm.go 0000664 0000000 0000000 00000000477 14370657153 0025124 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Issue68", NOSPLIT, "func() uint64")
Doc("Issue68 tests custom package names.")
x := GP64()
MOVQ(U32(68), x)
Store(x, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/doc.go 0000664 0000000 0000000 00000000115 14370657153 0025076 0 ustar 00root root 0000000 0000000 // Package custom tests overriding package name with the CLI.
package custom
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/issue68_test.go 0000664 0000000 0000000 00000000301 14370657153 0026673 0 ustar 00root root 0000000 0000000 package custom
import (
"testing"
)
//go:generate go run asm.go -pkg custom -out issue69.s -stubs stub.go
func TestIssue68(t *testing.T) {
if got := Issue68(); got != 68 {
t.Fail()
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/issue69.s 0000664 0000000 0000000 00000000346 14370657153 0025503 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -pkg custom -out issue69.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue68() uint64
TEXT ·Issue68(SB), NOSPLIT, $0-8
MOVQ $0x00000044, AX
MOVQ AX, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue68/stub.go 0000664 0000000 0000000 00000000262 14370657153 0025311 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -pkg custom -out issue69.s -stubs stub.go. DO NOT EDIT.
package custom
// Issue68 tests custom package names.
func Issue68() uint64
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/ 0000775 0000000 0000000 00000000000 14370657153 0024004 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/asm.go 0000664 0000000 0000000 00000001272 14370657153 0025115 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
TEXT("Issue76", NOSPLIT, "func(x, y uint64) uint64")
x := Load(Param("x"), GP64())
y := Load(Param("y"), GP64())
s := add(x, y)
Store(s, ReturnIndex(0))
RET()
Generate()
}
// add generates code to add x and y. The intent here is to demonstrate how a
// natural subroutine in avo typically requires temporary registers, which in
// turn can be "optimized out" by the register allocator and result in redundant
// self-moves.
func add(x, y Register) Register {
s := GP64()
MOVQ(x, s) // likely to become a self move
ADDQ(y, s)
return s
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/doc.go 0000664 0000000 0000000 00000000254 14370657153 0025101 0 ustar 00root root 0000000 0000000 // Package issue76 deliberately produces redundant MOV instructions.
//
// The intent is to confirm redundant self-move instructions are correctly removed.
package issue76
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/issue76.s 0000664 0000000 0000000 00000000411 14370657153 0025471 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue76.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue76(x uint64, y uint64) uint64
TEXT ·Issue76(SB), NOSPLIT, $0-24
MOVQ x+0(FP), AX
MOVQ y+8(FP), CX
ADDQ CX, AX
MOVQ AX, ret+16(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/issue76_test.go 0000664 0000000 0000000 00000000436 14370657153 0026702 0 ustar 00root root 0000000 0000000 package issue76
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out issue76.s -stubs stub.go
func TestIssue76(t *testing.T) {
expect := func(x, y uint64) uint64 { return x + y }
if err := quick.CheckEqual(Issue76, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue76/stub.go 0000664 0000000 0000000 00000000222 14370657153 0025304 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue76.s -stubs stub.go. DO NOT EDIT.
package issue76
func Issue76(x uint64, y uint64) uint64
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/ 0000775 0000000 0000000 00000000000 14370657153 0024010 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/asm.go 0000664 0000000 0000000 00000000546 14370657153 0025124 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
)
func main() {
TEXT("Issue89", NOSPLIT, "func() uint64")
x := GP64()
MOVQ(U32(42), x)
for i := 0; i < 100; i++ {
zero := GP64()
XORQ(zero, zero)
ADDQ(zero, x)
}
Store(x, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/doc.go 0000664 0000000 0000000 00000000132 14370657153 0025100 0 ustar 00root root 0000000 0000000 // Package issue89 tests register allocation with self-cancelling inputs.
package issue89
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/issue89.s 0000664 0000000 0000000 00000005402 14370657153 0025506 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue89.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Issue89() uint64
TEXT ·Issue89(SB), NOSPLIT, $0-8
MOVQ $0x0000002a, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
XORQ CX, CX
ADDQ CX, AX
MOVQ AX, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/issue89_test.go 0000664 0000000 0000000 00000000255 14370657153 0026711 0 ustar 00root root 0000000 0000000 package issue89
import (
"testing"
)
//go:generate go run asm.go -out issue89.s -stubs stub.go
func TestIssue89(t *testing.T) {
if Issue89() != 42 {
t.FailNow()
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/fixedbugs/issue89/stub.go 0000664 0000000 0000000 00000000200 14370657153 0025304 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out issue89.s -stubs stub.go. DO NOT EDIT.
package issue89
func Issue89() uint64
golang-github-mmcloughlin-avo-0.5.0/tests/fmt/ 0000775 0000000 0000000 00000000000 14370657153 0021305 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/fmt/asm.go 0000664 0000000 0000000 00000001007 14370657153 0022412 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
TEXT("Formatting", NOSPLIT, "func()")
Doc("Formatting contains various cases to test the formatter.")
ADDQ(R8, R8)
Comment("One comment line between instructions.")
ADDQ(R8, R8)
Comment("Comment before label.")
Label("label")
Comment("Comment after label.")
ADDQ(R8, R8)
JMP(LabelRef("label"))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/fmt/fmt.s 0000664 0000000 0000000 00000000503 14370657153 0022255 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out fmt.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Formatting()
TEXT ·Formatting(SB), NOSPLIT, $0
ADDQ R8, R8
// One comment line between instructions.
ADDQ R8, R8
// Comment before label.
label:
// Comment after label.
ADDQ R8, R8
JMP label
RET
golang-github-mmcloughlin-avo-0.5.0/tests/fmt/gen.go 0000664 0000000 0000000 00000000165 14370657153 0022407 0 ustar 00root root 0000000 0000000 // Package fmt tests assembly printer formatting.
package fmt
//go:generate go run asm.go -out fmt.s -stubs stub.go
golang-github-mmcloughlin-avo-0.5.0/tests/fmt/stub.go 0000664 0000000 0000000 00000000260 14370657153 0022607 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out fmt.s -stubs stub.go. DO NOT EDIT.
package fmt
// Formatting contains various cases to test the formatter.
func Formatting()
golang-github-mmcloughlin-avo-0.5.0/tests/labels/ 0000775 0000000 0000000 00000000000 14370657153 0021761 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/labels/asm.go 0000664 0000000 0000000 00000000736 14370657153 0023076 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/operand"
. "github.com/mmcloughlin/avo/reg"
)
func main() {
TEXT("Labels", NOSPLIT, "func() uint64")
XORQ(RAX, RAX)
INCQ(RAX)
Label("never_used")
Label("consecutive_label_also_never_used")
INCQ(RAX)
INCQ(RAX)
INCQ(RAX)
INCQ(RAX)
JMP(LabelRef("next"))
Label("next")
INCQ(RAX)
INCQ(RAX)
Store(RAX, ReturnIndex(0))
RET()
Generate()
}
golang-github-mmcloughlin-avo-0.5.0/tests/labels/doc.go 0000664 0000000 0000000 00000000110 14370657153 0023045 0 ustar 00root root 0000000 0000000 // Package labels tests for cleanup of redundant labels.
package labels
golang-github-mmcloughlin-avo-0.5.0/tests/labels/labels.s 0000664 0000000 0000000 00000000415 14370657153 0023407 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out labels.s -stubs stub.go. DO NOT EDIT.
#include "textflag.h"
// func Labels() uint64
TEXT ·Labels(SB), NOSPLIT, $0-8
XORQ AX, AX
INCQ AX
INCQ AX
INCQ AX
INCQ AX
INCQ AX
INCQ AX
INCQ AX
MOVQ AX, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/labels/labels_test.go 0000664 0000000 0000000 00000000413 14370657153 0024607 0 ustar 00root root 0000000 0000000 package labels
import (
"testing"
"testing/quick"
)
//go:generate go run asm.go -out labels.s -stubs stub.go
func TestLabels(t *testing.T) {
expect := func() uint64 { return 7 }
if err := quick.CheckEqual(Labels, expect, nil); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/labels/stub.go 0000664 0000000 0000000 00000000175 14370657153 0023270 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out labels.s -stubs stub.go. DO NOT EDIT.
package labels
func Labels() uint64
golang-github-mmcloughlin-avo-0.5.0/tests/signature/ 0000775 0000000 0000000 00000000000 14370657153 0022520 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/signature/asm.go 0000664 0000000 0000000 00000002734 14370657153 0023635 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"flag"
"fmt"
"go/token"
"go/types"
"math/rand"
. "github.com/mmcloughlin/avo/build"
. "github.com/mmcloughlin/avo/gotypes"
. "github.com/mmcloughlin/avo/reg"
)
var (
seed = flag.Int64("seed", 0, "random seed")
num = flag.Int("num", 32, "number of test functions to generate")
)
func main() {
flag.Parse()
rand.Seed(*seed)
for i := 0; i < *num; i++ {
name := fmt.Sprintf("Signature%d", i)
sig := RandomSignature()
SignatureFunction(name, sig)
}
Generate()
}
func SignatureFunction(name string, sig *types.Signature) {
// Declare the function.
TEXT(name, 0, sig.String())
// Write to the results. Otherwise, asmdecl would warn us.
regsize := map[int64]Virtual{1: GP8(), 2: GP16(), 4: GP32(), 8: GP64()}
rs := sig.Results()
for i := 0; i < rs.Len(); i++ {
r := rs.At(i)
size := Sizes.Sizeof(r.Type())
Store(regsize[size], ReturnIndex(i))
}
RET()
}
func RandomSignature() *types.Signature {
p := RandomTuple()
r := RandomTuple()
return types.NewSignature(nil, p, r, false)
}
func RandomTuple() *types.Tuple {
n := rand.Intn(5)
vs := make([]*types.Var, n)
for i := 0; i < n; i++ {
t := RandomType()
vs[i] = types.NewVar(token.NoPos, nil, "", t)
}
return types.NewTuple(vs...)
}
func RandomType() types.Type {
accept := types.IsInteger | types.IsUnsigned
for {
t := types.Typ[rand.Intn(len(types.Typ))]
info := t.Info()
if info != 0 && (info&^accept) == 0 {
return t
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/signature/gen.go 0000664 0000000 0000000 00000000244 14370657153 0023620 0 ustar 00root root 0000000 0000000 // Package signature tests handling of random function signatures.
package signature
//go:generate go run asm.go -out signature.s -stubs stub.go -seed 42 -num 256
golang-github-mmcloughlin-avo-0.5.0/tests/signature/signature.s 0000664 0000000 0000000 00000100156 14370657153 0024710 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out signature.s -stubs stub.go -seed 42 -num 256. DO NOT EDIT.
// func Signature0() (uint32, int16)
TEXT ·Signature0(SB), $0-6
MOVL AX, ret+0(FP)
MOVW AX, ret1+4(FP)
RET
// func Signature1(int16, uint, uint32) (int64, int8, uint64, int64)
TEXT ·Signature1(SB), $0-56
MOVQ AX, ret+24(FP)
MOVB AL, ret1+32(FP)
MOVQ AX, ret2+40(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature2(uint, int16) (uint32, uintptr, int16, uint16)
TEXT ·Signature2(SB), $0-36
MOVL AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVW AX, ret2+32(FP)
MOVW AX, ret3+34(FP)
RET
// func Signature3(uintptr, uint32) uint32
TEXT ·Signature3(SB), $0-20
MOVL AX, ret+16(FP)
RET
// func Signature4(int64, uint32) (uint16, int64, uint32, int8)
TEXT ·Signature4(SB), $0-37
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
MOVB AL, ret3+36(FP)
RET
// func Signature5(int8)
TEXT ·Signature5(SB), $0-1
RET
// func Signature6(int64)
TEXT ·Signature6(SB), $0-8
RET
// func Signature7(uint) (int8, int, uintptr, uintptr)
TEXT ·Signature7(SB), $0-40
MOVB AL, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVQ AX, ret3+32(FP)
RET
// func Signature8(uint16) int
TEXT ·Signature8(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature9(uint32, uint16, uint16) (uintptr, uint16, int8, uint8)
TEXT ·Signature9(SB), $0-20
MOVQ AX, ret+8(FP)
MOVW AX, ret1+16(FP)
MOVB AL, ret2+18(FP)
MOVB AL, ret3+19(FP)
RET
// func Signature10(uint, uint, int64) (int8, uintptr, uint, int32)
TEXT ·Signature10(SB), $0-52
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
MOVL AX, ret3+48(FP)
RET
// func Signature11() (uint64, int16, uint64, uint)
TEXT ·Signature11(SB), $0-32
MOVQ AX, ret+0(FP)
MOVW AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature12(uintptr) (uint8, uint8)
TEXT ·Signature12(SB), $0-10
MOVB AL, ret+8(FP)
MOVB AL, ret1+9(FP)
RET
// func Signature13() uint8
TEXT ·Signature13(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature14(int8, uint64, uintptr) int32
TEXT ·Signature14(SB), $0-28
MOVL AX, ret+24(FP)
RET
// func Signature15(uint32, uint32, int16) (uint64, int)
TEXT ·Signature15(SB), $0-32
MOVQ AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature16(uint32) uint16
TEXT ·Signature16(SB), $0-10
MOVW AX, ret+8(FP)
RET
// func Signature17(int16) (int32, uint, int8, uint8)
TEXT ·Signature17(SB), $0-26
MOVL AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVB AL, ret2+24(FP)
MOVB AL, ret3+25(FP)
RET
// func Signature18(uintptr, uintptr) (uint8, uint32)
TEXT ·Signature18(SB), $0-24
MOVB AL, ret+16(FP)
MOVL AX, ret1+20(FP)
RET
// func Signature19(int, uint64, int) (int32, uintptr)
TEXT ·Signature19(SB), $0-40
MOVL AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
RET
// func Signature20(uint32)
TEXT ·Signature20(SB), $0-4
RET
// func Signature21(uint8, int8, uint64) (uint16, uint32)
TEXT ·Signature21(SB), $0-24
MOVW AX, ret+16(FP)
MOVL AX, ret1+20(FP)
RET
// func Signature22(int, uint16, uint8, int8) (int8, uint32)
TEXT ·Signature22(SB), $0-24
MOVB AL, ret+16(FP)
MOVL AX, ret1+20(FP)
RET
// func Signature23(int32, uint32) (uint8, int16)
TEXT ·Signature23(SB), $0-12
MOVB AL, ret+8(FP)
MOVW AX, ret1+10(FP)
RET
// func Signature24(int16, uintptr)
TEXT ·Signature24(SB), $0-16
RET
// func Signature25(int8, int32, uint16, uint)
TEXT ·Signature25(SB), $0-24
RET
// func Signature26() (uint16, uint64, int)
TEXT ·Signature26(SB), $0-24
MOVW AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
RET
// func Signature27(uint32) (uint64, uint8)
TEXT ·Signature27(SB), $0-17
MOVQ AX, ret+8(FP)
MOVB AL, ret1+16(FP)
RET
// func Signature28(uint64, int16, uint8, uintptr) (uint16, uintptr)
TEXT ·Signature28(SB), $0-40
MOVW AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
RET
// func Signature29(int8, int32, uint64, int64) uint16
TEXT ·Signature29(SB), $0-26
MOVW AX, ret+24(FP)
RET
// func Signature30(int8, uint16, int32, uint64) uint8
TEXT ·Signature30(SB), $0-17
MOVB AL, ret+16(FP)
RET
// func Signature31(uint64, uint8, uint32) (int16, uintptr)
TEXT ·Signature31(SB), $0-32
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature32(int16, int) (int64, uint64, uintptr, uint16)
TEXT ·Signature32(SB), $0-42
MOVQ AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
MOVW AX, ret3+40(FP)
RET
// func Signature33(int16, int8, int8)
TEXT ·Signature33(SB), $0-4
RET
// func Signature34(uint16, int64)
TEXT ·Signature34(SB), $0-16
RET
// func Signature35(int8, uint, uint, int8) uint64
TEXT ·Signature35(SB), $0-40
MOVQ AX, ret+32(FP)
RET
// func Signature36() (uint8, int, uintptr, uintptr)
TEXT ·Signature36(SB), $0-32
MOVB AL, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature37() (uint16, uint16, uint32, uint16)
TEXT ·Signature37(SB), $0-10
MOVW AX, ret+0(FP)
MOVW AX, ret1+2(FP)
MOVL AX, ret2+4(FP)
MOVW AX, ret3+8(FP)
RET
// func Signature38(uint8, uint, uint32)
TEXT ·Signature38(SB), $0-20
RET
// func Signature39(uint8, int32, int) int16
TEXT ·Signature39(SB), $0-18
MOVW AX, ret+16(FP)
RET
// func Signature40(int16, int, int16) (int8, uint64)
TEXT ·Signature40(SB), $0-40
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
RET
// func Signature41() (uint, uintptr, uint32)
TEXT ·Signature41(SB), $0-20
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVL AX, ret2+16(FP)
RET
// func Signature42(uint8, uint8)
TEXT ·Signature42(SB), $0-2
RET
// func Signature43() uint8
TEXT ·Signature43(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature44(int32, int16) uint32
TEXT ·Signature44(SB), $0-12
MOVL AX, ret+8(FP)
RET
// func Signature45() (uintptr, uintptr, uint8)
TEXT ·Signature45(SB), $0-17
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVB AL, ret2+16(FP)
RET
// func Signature46(int8) (uint8, uint8, uint, int32)
TEXT ·Signature46(SB), $0-28
MOVB AL, ret+8(FP)
MOVB AL, ret1+9(FP)
MOVQ AX, ret2+16(FP)
MOVL AX, ret3+24(FP)
RET
// func Signature47(uint8) uint
TEXT ·Signature47(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature48(int32, uint, uintptr, int32) uint8
TEXT ·Signature48(SB), $0-33
MOVB AL, ret+32(FP)
RET
// func Signature49(uint16, int16)
TEXT ·Signature49(SB), $0-4
RET
// func Signature50(int64, int16, uint64, uintptr) (int8, uint, int32)
TEXT ·Signature50(SB), $0-52
MOVB AL, ret+32(FP)
MOVQ AX, ret1+40(FP)
MOVL AX, ret2+48(FP)
RET
// func Signature51(int64, uint32, int8)
TEXT ·Signature51(SB), $0-13
RET
// func Signature52() (uint8, int32, int64)
TEXT ·Signature52(SB), $0-16
MOVB AL, ret+0(FP)
MOVL AX, ret1+4(FP)
MOVQ AX, ret2+8(FP)
RET
// func Signature53() (uint8, uint16)
TEXT ·Signature53(SB), $0-4
MOVB AL, ret+0(FP)
MOVW AX, ret1+2(FP)
RET
// func Signature54(uint64, int16, uint64) (int16, int16)
TEXT ·Signature54(SB), $0-28
MOVW AX, ret+24(FP)
MOVW AX, ret1+26(FP)
RET
// func Signature55(uint64) (uint, int, uint32, uintptr)
TEXT ·Signature55(SB), $0-40
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVL AX, ret2+24(FP)
MOVQ AX, ret3+32(FP)
RET
// func Signature56() (int16, uintptr)
TEXT ·Signature56(SB), $0-16
MOVW AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature57(uint32, uint8, uint)
TEXT ·Signature57(SB), $0-16
RET
// func Signature58(int, int64)
TEXT ·Signature58(SB), $0-16
RET
// func Signature59() uint8
TEXT ·Signature59(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature60(uintptr, int8, uint8, uint)
TEXT ·Signature60(SB), $0-24
RET
// func Signature61(int8, uint16, int8)
TEXT ·Signature61(SB), $0-5
RET
// func Signature62() uint8
TEXT ·Signature62(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature63(int32, int, int64) (int64, uintptr, int32, uint64)
TEXT ·Signature63(SB), $0-56
MOVQ AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVL AX, ret2+40(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature64(uint32, uint16, uint8) (int16, int32)
TEXT ·Signature64(SB), $0-16
MOVW AX, ret+8(FP)
MOVL AX, ret1+12(FP)
RET
// func Signature65(int32, uint8)
TEXT ·Signature65(SB), $0-5
RET
// func Signature66() (int16, uintptr, uint32, uint)
TEXT ·Signature66(SB), $0-32
MOVW AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVL AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature67(uint32, uint)
TEXT ·Signature67(SB), $0-16
RET
// func Signature68(int32, uint64, uint16) int32
TEXT ·Signature68(SB), $0-28
MOVL AX, ret+24(FP)
RET
// func Signature69(int) uint
TEXT ·Signature69(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature70() int64
TEXT ·Signature70(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature71(int, int8, uint16, uint16) (uint16, uint64)
TEXT ·Signature71(SB), $0-32
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature72(uint32, uintptr, uint8) (uint16, int8, int16, uint16)
TEXT ·Signature72(SB), $0-32
MOVW AX, ret+24(FP)
MOVB AL, ret1+26(FP)
MOVW AX, ret2+28(FP)
MOVW AX, ret3+30(FP)
RET
// func Signature73(int8, uint32, int8, uint) (uint64, int64)
TEXT ·Signature73(SB), $0-40
MOVQ AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
RET
// func Signature74() (int64, uint64, uint16, int64)
TEXT ·Signature74(SB), $0-32
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVW AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature75(uint16, int) (uintptr, uint, uint32)
TEXT ·Signature75(SB), $0-36
MOVQ AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
RET
// func Signature76() int8
TEXT ·Signature76(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature77(uint32, uint32)
TEXT ·Signature77(SB), $0-8
RET
// func Signature78(int) (uint, int32)
TEXT ·Signature78(SB), $0-20
MOVQ AX, ret+8(FP)
MOVL AX, ret1+16(FP)
RET
// func Signature79(int16, int64, int32) (int64, uint8)
TEXT ·Signature79(SB), $0-33
MOVQ AX, ret+24(FP)
MOVB AL, ret1+32(FP)
RET
// func Signature80() (int64, int8, int8)
TEXT ·Signature80(SB), $0-10
MOVQ AX, ret+0(FP)
MOVB AL, ret1+8(FP)
MOVB AL, ret2+9(FP)
RET
// func Signature81(uint8, uintptr)
TEXT ·Signature81(SB), $0-16
RET
// func Signature82(uint, int32, int64) (uint8, uintptr, uint, uint32)
TEXT ·Signature82(SB), $0-52
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
MOVL AX, ret3+48(FP)
RET
// func Signature83(uint64, uint) (int8, int, uintptr)
TEXT ·Signature83(SB), $0-40
MOVB AL, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature84() (uint64, int16)
TEXT ·Signature84(SB), $0-10
MOVQ AX, ret+0(FP)
MOVW AX, ret1+8(FP)
RET
// func Signature85(uint32, uint64, uint64) (int16, int8, uint64)
TEXT ·Signature85(SB), $0-40
MOVW AX, ret+24(FP)
MOVB AL, ret1+26(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature86(int16, uint64, int64, uint64) (uint64, uint32, uintptr)
TEXT ·Signature86(SB), $0-56
MOVQ AX, ret+32(FP)
MOVL AX, ret1+40(FP)
MOVQ AX, ret2+48(FP)
RET
// func Signature87(int32, uint8, int32, int8) uintptr
TEXT ·Signature87(SB), $0-24
MOVQ AX, ret+16(FP)
RET
// func Signature88(int, int8, uintptr, int64) (uint8, uint8, int64, int8)
TEXT ·Signature88(SB), $0-49
MOVB AL, ret+32(FP)
MOVB AL, ret1+33(FP)
MOVQ AX, ret2+40(FP)
MOVB AL, ret3+48(FP)
RET
// func Signature89(int64, uint16) (uint8, int, int32)
TEXT ·Signature89(SB), $0-36
MOVB AL, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
RET
// func Signature90(uint64) (uint64, uint64, int64)
TEXT ·Signature90(SB), $0-32
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
RET
// func Signature91(uint16, uintptr, int, int64) (int8, uint8, int, int)
TEXT ·Signature91(SB), $0-56
MOVB AL, ret+32(FP)
MOVB AL, ret1+33(FP)
MOVQ AX, ret2+40(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature92(uint32, uint64, uint32, uint) (int8, uint8, uint)
TEXT ·Signature92(SB), $0-48
MOVB AL, ret+32(FP)
MOVB AL, ret1+33(FP)
MOVQ AX, ret2+40(FP)
RET
// func Signature93(uint32, uint, int64, int)
TEXT ·Signature93(SB), $0-32
RET
// func Signature94(uint64)
TEXT ·Signature94(SB), $0-8
RET
// func Signature95() (uint, uintptr, int, uintptr)
TEXT ·Signature95(SB), $0-32
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature96(uint8, int16, int32) uint64
TEXT ·Signature96(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature97(uint, uint, uint) (int8, int, int64)
TEXT ·Signature97(SB), $0-48
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
RET
// func Signature98(int8, int) (int16, int16)
TEXT ·Signature98(SB), $0-20
MOVW AX, ret+16(FP)
MOVW AX, ret1+18(FP)
RET
// func Signature99(uint64) (uintptr, int16, uintptr)
TEXT ·Signature99(SB), $0-32
MOVQ AX, ret+8(FP)
MOVW AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
RET
// func Signature100(int32) (int, int16, int64, uint32)
TEXT ·Signature100(SB), $0-36
MOVQ AX, ret+8(FP)
MOVW AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVL AX, ret3+32(FP)
RET
// func Signature101() (uint64, uint64, int64, uint8)
TEXT ·Signature101(SB), $0-25
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
MOVB AL, ret3+24(FP)
RET
// func Signature102(uint32, uint)
TEXT ·Signature102(SB), $0-16
RET
// func Signature103() uint16
TEXT ·Signature103(SB), $0-2
MOVW AX, ret+0(FP)
RET
// func Signature104() (int, uint)
TEXT ·Signature104(SB), $0-16
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature105(uint16, int64, int8) uint64
TEXT ·Signature105(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature106(uint32, int64, uint32, uint8)
TEXT ·Signature106(SB), $0-21
RET
// func Signature107(uint64, uintptr) int32
TEXT ·Signature107(SB), $0-20
MOVL AX, ret+16(FP)
RET
// func Signature108(uint8, int64, uint8, uint32) int64
TEXT ·Signature108(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature109(uint, uint, uint8, uint32) int
TEXT ·Signature109(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature110() uint8
TEXT ·Signature110(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature111(uint32, uint) (int16, uint64, uint32, uint32)
TEXT ·Signature111(SB), $0-40
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
MOVL AX, ret3+36(FP)
RET
// func Signature112(uint, uintptr, uint16, uint16) (uint32, int16, int64, uint)
TEXT ·Signature112(SB), $0-48
MOVL AX, ret+24(FP)
MOVW AX, ret1+28(FP)
MOVQ AX, ret2+32(FP)
MOVQ AX, ret3+40(FP)
RET
// func Signature113(uintptr, int64, uintptr, int32) (int16, int64)
TEXT ·Signature113(SB), $0-48
MOVW AX, ret+32(FP)
MOVQ AX, ret1+40(FP)
RET
// func Signature114(int32, int64, uint, uint32)
TEXT ·Signature114(SB), $0-28
RET
// func Signature115() uint64
TEXT ·Signature115(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature116() (int64, uint16)
TEXT ·Signature116(SB), $0-10
MOVQ AX, ret+0(FP)
MOVW AX, ret1+8(FP)
RET
// func Signature117(uintptr, int64, int32, uintptr)
TEXT ·Signature117(SB), $0-32
RET
// func Signature118(int32, uint)
TEXT ·Signature118(SB), $0-16
RET
// func Signature119(int32, int16) (int16, int64)
TEXT ·Signature119(SB), $0-24
MOVW AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
RET
// func Signature120(int, uintptr) (uint8, uint16, int)
TEXT ·Signature120(SB), $0-32
MOVB AL, ret+16(FP)
MOVW AX, ret1+18(FP)
MOVQ AX, ret2+24(FP)
RET
// func Signature121(uint32, int32)
TEXT ·Signature121(SB), $0-8
RET
// func Signature122() int32
TEXT ·Signature122(SB), $0-4
MOVL AX, ret+0(FP)
RET
// func Signature123() (uint, uint, int32)
TEXT ·Signature123(SB), $0-20
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVL AX, ret2+16(FP)
RET
// func Signature124(uint64, int32, uint32) (uint32, uint32, uint8)
TEXT ·Signature124(SB), $0-25
MOVL AX, ret+16(FP)
MOVL AX, ret1+20(FP)
MOVB AL, ret2+24(FP)
RET
// func Signature125(uint32, uint64)
TEXT ·Signature125(SB), $0-16
RET
// func Signature126(uint, uint8, uint64) int8
TEXT ·Signature126(SB), $0-25
MOVB AL, ret+24(FP)
RET
// func Signature127(uint64, uint8) (uintptr, uint32)
TEXT ·Signature127(SB), $0-28
MOVQ AX, ret+16(FP)
MOVL AX, ret1+24(FP)
RET
// func Signature128(uint64)
TEXT ·Signature128(SB), $0-8
RET
// func Signature129() (uint64, uint8, int8)
TEXT ·Signature129(SB), $0-10
MOVQ AX, ret+0(FP)
MOVB AL, ret1+8(FP)
MOVB AL, ret2+9(FP)
RET
// func Signature130(uint, uint8, uint, int64) (uint64, uint8)
TEXT ·Signature130(SB), $0-41
MOVQ AX, ret+32(FP)
MOVB AL, ret1+40(FP)
RET
// func Signature131() (uint8, uint32, uint16)
TEXT ·Signature131(SB), $0-10
MOVB AL, ret+0(FP)
MOVL AX, ret1+4(FP)
MOVW AX, ret2+8(FP)
RET
// func Signature132() (int64, int64, int, uint64)
TEXT ·Signature132(SB), $0-32
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature133(uint64, uint8, int64, uint32) (uint32, uint8, int32)
TEXT ·Signature133(SB), $0-44
MOVL AX, ret+32(FP)
MOVB AL, ret1+36(FP)
MOVL AX, ret2+40(FP)
RET
// func Signature134(int32) uintptr
TEXT ·Signature134(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature135(uint16) (uintptr, int32, int, uint8)
TEXT ·Signature135(SB), $0-33
MOVQ AX, ret+8(FP)
MOVL AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVB AL, ret3+32(FP)
RET
// func Signature136(int64)
TEXT ·Signature136(SB), $0-8
RET
// func Signature137(uint8, uint16, int, int8) int64
TEXT ·Signature137(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature138()
TEXT ·Signature138(SB), $0
RET
// func Signature139() (int, uint8, uint32)
TEXT ·Signature139(SB), $0-16
MOVQ AX, ret+0(FP)
MOVB AL, ret1+8(FP)
MOVL AX, ret2+12(FP)
RET
// func Signature140(uint32, int16) int8
TEXT ·Signature140(SB), $0-9
MOVB AL, ret+8(FP)
RET
// func Signature141(uint16) (uintptr, uint32, uint64)
TEXT ·Signature141(SB), $0-32
MOVQ AX, ret+8(FP)
MOVL AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
RET
// func Signature142(int, int64) (uint64, int8)
TEXT ·Signature142(SB), $0-25
MOVQ AX, ret+16(FP)
MOVB AL, ret1+24(FP)
RET
// func Signature143(int) (int64, int, int, int32)
TEXT ·Signature143(SB), $0-36
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVL AX, ret3+32(FP)
RET
// func Signature144(uint64, int16, int8, int16) (int16, uint64, int32)
TEXT ·Signature144(SB), $0-36
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
RET
// func Signature145() (int, int64)
TEXT ·Signature145(SB), $0-16
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature146() (uint, int64, int8, uint32)
TEXT ·Signature146(SB), $0-24
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVB AL, ret2+16(FP)
MOVL AX, ret3+20(FP)
RET
// func Signature147(int16)
TEXT ·Signature147(SB), $0-2
RET
// func Signature148(uint, uint32) (uint8, int32, uint16, uint)
TEXT ·Signature148(SB), $0-40
MOVB AL, ret+16(FP)
MOVL AX, ret1+20(FP)
MOVW AX, ret2+24(FP)
MOVQ AX, ret3+32(FP)
RET
// func Signature149(uint64, uint64, int, int8) (uintptr, int, uint64)
TEXT ·Signature149(SB), $0-56
MOVQ AX, ret+32(FP)
MOVQ AX, ret1+40(FP)
MOVQ AX, ret2+48(FP)
RET
// func Signature150(uint32, int32) (int16, uintptr, uint16)
TEXT ·Signature150(SB), $0-26
MOVW AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVW AX, ret2+24(FP)
RET
// func Signature151(uint32, int16) (int, uint, uint)
TEXT ·Signature151(SB), $0-32
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
RET
// func Signature152() (uint, int32, int64)
TEXT ·Signature152(SB), $0-24
MOVQ AX, ret+0(FP)
MOVL AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
RET
// func Signature153(uint8, uint16, uint64, uint) int
TEXT ·Signature153(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature154(uint, int, int32, int64) (uint, int8, int16, uintptr)
TEXT ·Signature154(SB), $0-56
MOVQ AX, ret+32(FP)
MOVB AL, ret1+40(FP)
MOVW AX, ret2+42(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature155(int16, uint16) (uint, int16, uint, int16)
TEXT ·Signature155(SB), $0-34
MOVQ AX, ret+8(FP)
MOVW AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVW AX, ret3+32(FP)
RET
// func Signature156(int64)
TEXT ·Signature156(SB), $0-8
RET
// func Signature157(int64, uint16, uint16) (uint, int64)
TEXT ·Signature157(SB), $0-32
MOVQ AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature158() (int32, uint64, int64)
TEXT ·Signature158(SB), $0-24
MOVL AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
RET
// func Signature159(int, uint)
TEXT ·Signature159(SB), $0-16
RET
// func Signature160() int
TEXT ·Signature160(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature161(uint, int32, uint64, int16) (uint32, int32, uint, uintptr)
TEXT ·Signature161(SB), $0-56
MOVL AX, ret+32(FP)
MOVL AX, ret1+36(FP)
MOVQ AX, ret2+40(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature162(uintptr, int, int) (int16, int8)
TEXT ·Signature162(SB), $0-27
MOVW AX, ret+24(FP)
MOVB AL, ret1+26(FP)
RET
// func Signature163(int32) uintptr
TEXT ·Signature163(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature164(uintptr) (int64, uint, uint8, uint64)
TEXT ·Signature164(SB), $0-40
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVB AL, ret2+24(FP)
MOVQ AX, ret3+32(FP)
RET
// func Signature165(int16, uintptr) (int8, int, int16)
TEXT ·Signature165(SB), $0-34
MOVB AL, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVW AX, ret2+32(FP)
RET
// func Signature166(int16) uint16
TEXT ·Signature166(SB), $0-10
MOVW AX, ret+8(FP)
RET
// func Signature167(uint32, int, int64) (int, uint16, int8, uintptr)
TEXT ·Signature167(SB), $0-48
MOVQ AX, ret+24(FP)
MOVW AX, ret1+32(FP)
MOVB AL, ret2+34(FP)
MOVQ AX, ret3+40(FP)
RET
// func Signature168(int32, uint16) (uint16, uint16, uint16)
TEXT ·Signature168(SB), $0-14
MOVW AX, ret+8(FP)
MOVW AX, ret1+10(FP)
MOVW AX, ret2+12(FP)
RET
// func Signature169(uint32, uint8, int64)
TEXT ·Signature169(SB), $0-16
RET
// func Signature170(uint16, uintptr, uintptr, uintptr) (int, uint8, uint64)
TEXT ·Signature170(SB), $0-56
MOVQ AX, ret+32(FP)
MOVB AL, ret1+40(FP)
MOVQ AX, ret2+48(FP)
RET
// func Signature171()
TEXT ·Signature171(SB), $0
RET
// func Signature172(int32, uint32) (int8, int64)
TEXT ·Signature172(SB), $0-24
MOVB AL, ret+8(FP)
MOVQ AX, ret1+16(FP)
RET
// func Signature173(uint8, uint64)
TEXT ·Signature173(SB), $0-16
RET
// func Signature174() uint8
TEXT ·Signature174(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature175(uint) (uint32, uint32, uint8, int8)
TEXT ·Signature175(SB), $0-18
MOVL AX, ret+8(FP)
MOVL AX, ret1+12(FP)
MOVB AL, ret2+16(FP)
MOVB AL, ret3+17(FP)
RET
// func Signature176(uintptr, uintptr, int, uint8)
TEXT ·Signature176(SB), $0-25
RET
// func Signature177(uint, uint) (int16, uintptr)
TEXT ·Signature177(SB), $0-32
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature178() int8
TEXT ·Signature178(SB), $0-1
MOVB AL, ret+0(FP)
RET
// func Signature179(int32, int32, int8) (int8, uintptr)
TEXT ·Signature179(SB), $0-32
MOVB AL, ret+16(FP)
MOVQ AX, ret1+24(FP)
RET
// func Signature180(uintptr, uint16) (int64, uint8, uintptr, int64)
TEXT ·Signature180(SB), $0-48
MOVQ AX, ret+16(FP)
MOVB AL, ret1+24(FP)
MOVQ AX, ret2+32(FP)
MOVQ AX, ret3+40(FP)
RET
// func Signature181() (int8, uintptr)
TEXT ·Signature181(SB), $0-16
MOVB AL, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature182(int32, uint32) (uintptr, int, uint, uint)
TEXT ·Signature182(SB), $0-40
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVQ AX, ret2+24(FP)
MOVQ AX, ret3+32(FP)
RET
// func Signature183() int
TEXT ·Signature183(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature184(int)
TEXT ·Signature184(SB), $0-8
RET
// func Signature185(int16, uint8, int16) uint64
TEXT ·Signature185(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature186(int, int32) (int64, int16, uint8)
TEXT ·Signature186(SB), $0-27
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
MOVB AL, ret2+26(FP)
RET
// func Signature187(uint64) (uint32, int)
TEXT ·Signature187(SB), $0-24
MOVL AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
RET
// func Signature188() (int8, uint)
TEXT ·Signature188(SB), $0-16
MOVB AL, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature189(int8, uint)
TEXT ·Signature189(SB), $0-16
RET
// func Signature190() int64
TEXT ·Signature190(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature191(uint16, uint) uint16
TEXT ·Signature191(SB), $0-18
MOVW AX, ret+16(FP)
RET
// func Signature192() (uint16, int32, int)
TEXT ·Signature192(SB), $0-16
MOVW AX, ret+0(FP)
MOVL AX, ret1+4(FP)
MOVQ AX, ret2+8(FP)
RET
// func Signature193(uint8, int, int32) (int8, uintptr, uint64, int)
TEXT ·Signature193(SB), $0-56
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
MOVQ AX, ret3+48(FP)
RET
// func Signature194(uint16, uint64, uint8) (int, int8, uint)
TEXT ·Signature194(SB), $0-48
MOVQ AX, ret+24(FP)
MOVB AL, ret1+32(FP)
MOVQ AX, ret2+40(FP)
RET
// func Signature195(int, uint) (int32, int, int8)
TEXT ·Signature195(SB), $0-33
MOVL AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVB AL, ret2+32(FP)
RET
// func Signature196(uint16) (uintptr, uint32)
TEXT ·Signature196(SB), $0-20
MOVQ AX, ret+8(FP)
MOVL AX, ret1+16(FP)
RET
// func Signature197(uintptr, int32) (int64, int16)
TEXT ·Signature197(SB), $0-26
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
RET
// func Signature198(uint8) (uint8, int16, uint32)
TEXT ·Signature198(SB), $0-16
MOVB AL, ret+8(FP)
MOVW AX, ret1+10(FP)
MOVL AX, ret2+12(FP)
RET
// func Signature199(uint)
TEXT ·Signature199(SB), $0-8
RET
// func Signature200(uintptr) uintptr
TEXT ·Signature200(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature201(uint64, int8) (uint8, int8, int16, uintptr)
TEXT ·Signature201(SB), $0-32
MOVB AL, ret+16(FP)
MOVB AL, ret1+17(FP)
MOVW AX, ret2+18(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature202(uint16, uint64, int8, uint) (uint, uint64, uintptr, int16)
TEXT ·Signature202(SB), $0-58
MOVQ AX, ret+32(FP)
MOVQ AX, ret1+40(FP)
MOVQ AX, ret2+48(FP)
MOVW AX, ret3+56(FP)
RET
// func Signature203(int16, int8, uint, int8)
TEXT ·Signature203(SB), $0-17
RET
// func Signature204(int16, int32, uint) (uint8, int64, uintptr)
TEXT ·Signature204(SB), $0-40
MOVB AL, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature205(int, int8, int16, int16) (uintptr, uint64, uint64, uintptr)
TEXT ·Signature205(SB), $0-48
MOVQ AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
MOVQ AX, ret3+40(FP)
RET
// func Signature206() (int8, int, uint32)
TEXT ·Signature206(SB), $0-20
MOVB AL, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVL AX, ret2+16(FP)
RET
// func Signature207(uint16) (int32, uint16)
TEXT ·Signature207(SB), $0-14
MOVL AX, ret+8(FP)
MOVW AX, ret1+12(FP)
RET
// func Signature208(int32, uintptr, int8, int32) (uint8, uint, int16)
TEXT ·Signature208(SB), $0-42
MOVB AL, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVW AX, ret2+40(FP)
RET
// func Signature209(int8, int16)
TEXT ·Signature209(SB), $0-4
RET
// func Signature210(int) (uint64, uint64, int8)
TEXT ·Signature210(SB), $0-25
MOVQ AX, ret+8(FP)
MOVQ AX, ret1+16(FP)
MOVB AL, ret2+24(FP)
RET
// func Signature211(uint32, uint, uintptr) (uint32, uint64, uint8)
TEXT ·Signature211(SB), $0-41
MOVL AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVB AL, ret2+40(FP)
RET
// func Signature212(uint8, int8, int) uint8
TEXT ·Signature212(SB), $0-17
MOVB AL, ret+16(FP)
RET
// func Signature213(uint16, uintptr) (uint64, uint16, int)
TEXT ·Signature213(SB), $0-40
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature214(uint16, uintptr, int8) (int16, int64, int)
TEXT ·Signature214(SB), $0-48
MOVW AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
RET
// func Signature215(int16, int8) uintptr
TEXT ·Signature215(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature216() (int16, uint16)
TEXT ·Signature216(SB), $0-4
MOVW AX, ret+0(FP)
MOVW AX, ret1+2(FP)
RET
// func Signature217(int32, uint, int) (uint32, int64, uint)
TEXT ·Signature217(SB), $0-48
MOVL AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVQ AX, ret2+40(FP)
RET
// func Signature218() (int16, uint16, int16, uint32)
TEXT ·Signature218(SB), $0-12
MOVW AX, ret+0(FP)
MOVW AX, ret1+2(FP)
MOVW AX, ret2+4(FP)
MOVL AX, ret3+8(FP)
RET
// func Signature219(int32, int32) (uint16, uint8)
TEXT ·Signature219(SB), $0-11
MOVW AX, ret+8(FP)
MOVB AL, ret1+10(FP)
RET
// func Signature220(uint8, int64) (uint64, int32)
TEXT ·Signature220(SB), $0-28
MOVQ AX, ret+16(FP)
MOVL AX, ret1+24(FP)
RET
// func Signature221(uintptr, int, int8) uint64
TEXT ·Signature221(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature222() uintptr
TEXT ·Signature222(SB), $0-8
MOVQ AX, ret+0(FP)
RET
// func Signature223(uint16, uint8, uint16, uint8) (uint32, int32)
TEXT ·Signature223(SB), $0-16
MOVL AX, ret+8(FP)
MOVL AX, ret1+12(FP)
RET
// func Signature224(int16, int8, int8, uint32)
TEXT ·Signature224(SB), $0-8
RET
// func Signature225(uintptr, int64) (int32, int, uintptr)
TEXT ·Signature225(SB), $0-40
MOVL AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature226(uint64) int64
TEXT ·Signature226(SB), $0-16
MOVQ AX, ret+8(FP)
RET
// func Signature227() (int64, int32, uintptr)
TEXT ·Signature227(SB), $0-24
MOVQ AX, ret+0(FP)
MOVL AX, ret1+8(FP)
MOVQ AX, ret2+16(FP)
RET
// func Signature228(int16, int64, int16, int64)
TEXT ·Signature228(SB), $0-32
RET
// func Signature229(int32, int, uint64, int64) (int, uint, uintptr, uint16)
TEXT ·Signature229(SB), $0-58
MOVQ AX, ret+32(FP)
MOVQ AX, ret1+40(FP)
MOVQ AX, ret2+48(FP)
MOVW AX, ret3+56(FP)
RET
// func Signature230() (uintptr, uint64)
TEXT ·Signature230(SB), $0-16
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
RET
// func Signature231() (int8, uint32, int, int16)
TEXT ·Signature231(SB), $0-18
MOVB AL, ret+0(FP)
MOVL AX, ret1+4(FP)
MOVQ AX, ret2+8(FP)
MOVW AX, ret3+16(FP)
RET
// func Signature232()
TEXT ·Signature232(SB), $0
RET
// func Signature233(uint16, uint8, int16) (uint8, int16, uint64, int64)
TEXT ·Signature233(SB), $0-32
MOVB AL, ret+8(FP)
MOVW AX, ret1+10(FP)
MOVQ AX, ret2+16(FP)
MOVQ AX, ret3+24(FP)
RET
// func Signature234(int8, uint8, int8) (uint8, uint8, uintptr)
TEXT ·Signature234(SB), $0-24
MOVB AL, ret+8(FP)
MOVB AL, ret1+9(FP)
MOVQ AX, ret2+16(FP)
RET
// func Signature235(int16, uint) (int64, uint16, uint32)
TEXT ·Signature235(SB), $0-32
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
MOVL AX, ret2+28(FP)
RET
// func Signature236(uint64, uint, int32, int8)
TEXT ·Signature236(SB), $0-21
RET
// func Signature237(uint32, int32, int, uintptr) (int16, int64, int32)
TEXT ·Signature237(SB), $0-44
MOVW AX, ret+24(FP)
MOVQ AX, ret1+32(FP)
MOVL AX, ret2+40(FP)
RET
// func Signature238(int8, uint16)
TEXT ·Signature238(SB), $0-4
RET
// func Signature239() (uint64, int8)
TEXT ·Signature239(SB), $0-9
MOVQ AX, ret+0(FP)
MOVB AL, ret1+8(FP)
RET
// func Signature240(uint, int32, uint64) uint64
TEXT ·Signature240(SB), $0-32
MOVQ AX, ret+24(FP)
RET
// func Signature241(int64, uint, uint8)
TEXT ·Signature241(SB), $0-17
RET
// func Signature242(int64, int8, uint32) (int32, uint, uint32, uint64)
TEXT ·Signature242(SB), $0-48
MOVL AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVL AX, ret2+32(FP)
MOVQ AX, ret3+40(FP)
RET
// func Signature243(uint, uint16) uint16
TEXT ·Signature243(SB), $0-18
MOVW AX, ret+16(FP)
RET
// func Signature244() (uintptr, int, uint8)
TEXT ·Signature244(SB), $0-17
MOVQ AX, ret+0(FP)
MOVQ AX, ret1+8(FP)
MOVB AL, ret2+16(FP)
RET
// func Signature245(int64, int16)
TEXT ·Signature245(SB), $0-10
RET
// func Signature246(int64, uint16, uint8) (uint16, uint, uint)
TEXT ·Signature246(SB), $0-40
MOVW AX, ret+16(FP)
MOVQ AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature247(uint32, uintptr) (int32, int32)
TEXT ·Signature247(SB), $0-24
MOVL AX, ret+16(FP)
MOVL AX, ret1+20(FP)
RET
// func Signature248(int16, int16) (uint, int32)
TEXT ·Signature248(SB), $0-20
MOVQ AX, ret+8(FP)
MOVL AX, ret1+16(FP)
RET
// func Signature249() (uint32, uint16, uint)
TEXT ·Signature249(SB), $0-16
MOVL AX, ret+0(FP)
MOVW AX, ret1+4(FP)
MOVQ AX, ret2+8(FP)
RET
// func Signature250(int64, uintptr) (uint64, uint16)
TEXT ·Signature250(SB), $0-26
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
RET
// func Signature251(int64, int32, int, int64) uintptr
TEXT ·Signature251(SB), $0-40
MOVQ AX, ret+32(FP)
RET
// func Signature252(int) uint16
TEXT ·Signature252(SB), $0-10
MOVW AX, ret+8(FP)
RET
// func Signature253(int8, uint) (int, uint16, int64)
TEXT ·Signature253(SB), $0-40
MOVQ AX, ret+16(FP)
MOVW AX, ret1+24(FP)
MOVQ AX, ret2+32(FP)
RET
// func Signature254(uint32) (int8, int32)
TEXT ·Signature254(SB), $0-16
MOVB AL, ret+8(FP)
MOVL AX, ret1+12(FP)
RET
// func Signature255(uint8, uint64, int8, int8) (int16, uint16, uint32, int16)
TEXT ·Signature255(SB), $0-34
MOVW AX, ret+24(FP)
MOVW AX, ret1+26(FP)
MOVL AX, ret2+28(FP)
MOVW AX, ret3+32(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/signature/stub.go 0000664 0000000 0000000 00000027720 14370657153 0024034 0 ustar 00root root 0000000 0000000 // Code generated by command: go run asm.go -out signature.s -stubs stub.go -seed 42 -num 256. DO NOT EDIT.
package signature
func Signature0() (uint32, int16)
func Signature1(int16, uint, uint32) (int64, int8, uint64, int64)
func Signature2(uint, int16) (uint32, uintptr, int16, uint16)
func Signature3(uintptr, uint32) uint32
func Signature4(int64, uint32) (uint16, int64, uint32, int8)
func Signature5(int8)
func Signature6(int64)
func Signature7(uint) (int8, int, uintptr, uintptr)
func Signature8(uint16) int
func Signature9(uint32, uint16, uint16) (uintptr, uint16, int8, uint8)
func Signature10(uint, uint, int64) (int8, uintptr, uint, int32)
func Signature11() (uint64, int16, uint64, uint)
func Signature12(uintptr) (uint8, uint8)
func Signature13() uint8
func Signature14(int8, uint64, uintptr) int32
func Signature15(uint32, uint32, int16) (uint64, int)
func Signature16(uint32) uint16
func Signature17(int16) (int32, uint, int8, uint8)
func Signature18(uintptr, uintptr) (uint8, uint32)
func Signature19(int, uint64, int) (int32, uintptr)
func Signature20(uint32)
func Signature21(uint8, int8, uint64) (uint16, uint32)
func Signature22(int, uint16, uint8, int8) (int8, uint32)
func Signature23(int32, uint32) (uint8, int16)
func Signature24(int16, uintptr)
func Signature25(int8, int32, uint16, uint)
func Signature26() (uint16, uint64, int)
func Signature27(uint32) (uint64, uint8)
func Signature28(uint64, int16, uint8, uintptr) (uint16, uintptr)
func Signature29(int8, int32, uint64, int64) uint16
func Signature30(int8, uint16, int32, uint64) uint8
func Signature31(uint64, uint8, uint32) (int16, uintptr)
func Signature32(int16, int) (int64, uint64, uintptr, uint16)
func Signature33(int16, int8, int8)
func Signature34(uint16, int64)
func Signature35(int8, uint, uint, int8) uint64
func Signature36() (uint8, int, uintptr, uintptr)
func Signature37() (uint16, uint16, uint32, uint16)
func Signature38(uint8, uint, uint32)
func Signature39(uint8, int32, int) int16
func Signature40(int16, int, int16) (int8, uint64)
func Signature41() (uint, uintptr, uint32)
func Signature42(uint8, uint8)
func Signature43() uint8
func Signature44(int32, int16) uint32
func Signature45() (uintptr, uintptr, uint8)
func Signature46(int8) (uint8, uint8, uint, int32)
func Signature47(uint8) uint
func Signature48(int32, uint, uintptr, int32) uint8
func Signature49(uint16, int16)
func Signature50(int64, int16, uint64, uintptr) (int8, uint, int32)
func Signature51(int64, uint32, int8)
func Signature52() (uint8, int32, int64)
func Signature53() (uint8, uint16)
func Signature54(uint64, int16, uint64) (int16, int16)
func Signature55(uint64) (uint, int, uint32, uintptr)
func Signature56() (int16, uintptr)
func Signature57(uint32, uint8, uint)
func Signature58(int, int64)
func Signature59() uint8
func Signature60(uintptr, int8, uint8, uint)
func Signature61(int8, uint16, int8)
func Signature62() uint8
func Signature63(int32, int, int64) (int64, uintptr, int32, uint64)
func Signature64(uint32, uint16, uint8) (int16, int32)
func Signature65(int32, uint8)
func Signature66() (int16, uintptr, uint32, uint)
func Signature67(uint32, uint)
func Signature68(int32, uint64, uint16) int32
func Signature69(int) uint
func Signature70() int64
func Signature71(int, int8, uint16, uint16) (uint16, uint64)
func Signature72(uint32, uintptr, uint8) (uint16, int8, int16, uint16)
func Signature73(int8, uint32, int8, uint) (uint64, int64)
func Signature74() (int64, uint64, uint16, int64)
func Signature75(uint16, int) (uintptr, uint, uint32)
func Signature76() int8
func Signature77(uint32, uint32)
func Signature78(int) (uint, int32)
func Signature79(int16, int64, int32) (int64, uint8)
func Signature80() (int64, int8, int8)
func Signature81(uint8, uintptr)
func Signature82(uint, int32, int64) (uint8, uintptr, uint, uint32)
func Signature83(uint64, uint) (int8, int, uintptr)
func Signature84() (uint64, int16)
func Signature85(uint32, uint64, uint64) (int16, int8, uint64)
func Signature86(int16, uint64, int64, uint64) (uint64, uint32, uintptr)
func Signature87(int32, uint8, int32, int8) uintptr
func Signature88(int, int8, uintptr, int64) (uint8, uint8, int64, int8)
func Signature89(int64, uint16) (uint8, int, int32)
func Signature90(uint64) (uint64, uint64, int64)
func Signature91(uint16, uintptr, int, int64) (int8, uint8, int, int)
func Signature92(uint32, uint64, uint32, uint) (int8, uint8, uint)
func Signature93(uint32, uint, int64, int)
func Signature94(uint64)
func Signature95() (uint, uintptr, int, uintptr)
func Signature96(uint8, int16, int32) uint64
func Signature97(uint, uint, uint) (int8, int, int64)
func Signature98(int8, int) (int16, int16)
func Signature99(uint64) (uintptr, int16, uintptr)
func Signature100(int32) (int, int16, int64, uint32)
func Signature101() (uint64, uint64, int64, uint8)
func Signature102(uint32, uint)
func Signature103() uint16
func Signature104() (int, uint)
func Signature105(uint16, int64, int8) uint64
func Signature106(uint32, int64, uint32, uint8)
func Signature107(uint64, uintptr) int32
func Signature108(uint8, int64, uint8, uint32) int64
func Signature109(uint, uint, uint8, uint32) int
func Signature110() uint8
func Signature111(uint32, uint) (int16, uint64, uint32, uint32)
func Signature112(uint, uintptr, uint16, uint16) (uint32, int16, int64, uint)
func Signature113(uintptr, int64, uintptr, int32) (int16, int64)
func Signature114(int32, int64, uint, uint32)
func Signature115() uint64
func Signature116() (int64, uint16)
func Signature117(uintptr, int64, int32, uintptr)
func Signature118(int32, uint)
func Signature119(int32, int16) (int16, int64)
func Signature120(int, uintptr) (uint8, uint16, int)
func Signature121(uint32, int32)
func Signature122() int32
func Signature123() (uint, uint, int32)
func Signature124(uint64, int32, uint32) (uint32, uint32, uint8)
func Signature125(uint32, uint64)
func Signature126(uint, uint8, uint64) int8
func Signature127(uint64, uint8) (uintptr, uint32)
func Signature128(uint64)
func Signature129() (uint64, uint8, int8)
func Signature130(uint, uint8, uint, int64) (uint64, uint8)
func Signature131() (uint8, uint32, uint16)
func Signature132() (int64, int64, int, uint64)
func Signature133(uint64, uint8, int64, uint32) (uint32, uint8, int32)
func Signature134(int32) uintptr
func Signature135(uint16) (uintptr, int32, int, uint8)
func Signature136(int64)
func Signature137(uint8, uint16, int, int8) int64
func Signature138()
func Signature139() (int, uint8, uint32)
func Signature140(uint32, int16) int8
func Signature141(uint16) (uintptr, uint32, uint64)
func Signature142(int, int64) (uint64, int8)
func Signature143(int) (int64, int, int, int32)
func Signature144(uint64, int16, int8, int16) (int16, uint64, int32)
func Signature145() (int, int64)
func Signature146() (uint, int64, int8, uint32)
func Signature147(int16)
func Signature148(uint, uint32) (uint8, int32, uint16, uint)
func Signature149(uint64, uint64, int, int8) (uintptr, int, uint64)
func Signature150(uint32, int32) (int16, uintptr, uint16)
func Signature151(uint32, int16) (int, uint, uint)
func Signature152() (uint, int32, int64)
func Signature153(uint8, uint16, uint64, uint) int
func Signature154(uint, int, int32, int64) (uint, int8, int16, uintptr)
func Signature155(int16, uint16) (uint, int16, uint, int16)
func Signature156(int64)
func Signature157(int64, uint16, uint16) (uint, int64)
func Signature158() (int32, uint64, int64)
func Signature159(int, uint)
func Signature160() int
func Signature161(uint, int32, uint64, int16) (uint32, int32, uint, uintptr)
func Signature162(uintptr, int, int) (int16, int8)
func Signature163(int32) uintptr
func Signature164(uintptr) (int64, uint, uint8, uint64)
func Signature165(int16, uintptr) (int8, int, int16)
func Signature166(int16) uint16
func Signature167(uint32, int, int64) (int, uint16, int8, uintptr)
func Signature168(int32, uint16) (uint16, uint16, uint16)
func Signature169(uint32, uint8, int64)
func Signature170(uint16, uintptr, uintptr, uintptr) (int, uint8, uint64)
func Signature171()
func Signature172(int32, uint32) (int8, int64)
func Signature173(uint8, uint64)
func Signature174() uint8
func Signature175(uint) (uint32, uint32, uint8, int8)
func Signature176(uintptr, uintptr, int, uint8)
func Signature177(uint, uint) (int16, uintptr)
func Signature178() int8
func Signature179(int32, int32, int8) (int8, uintptr)
func Signature180(uintptr, uint16) (int64, uint8, uintptr, int64)
func Signature181() (int8, uintptr)
func Signature182(int32, uint32) (uintptr, int, uint, uint)
func Signature183() int
func Signature184(int)
func Signature185(int16, uint8, int16) uint64
func Signature186(int, int32) (int64, int16, uint8)
func Signature187(uint64) (uint32, int)
func Signature188() (int8, uint)
func Signature189(int8, uint)
func Signature190() int64
func Signature191(uint16, uint) uint16
func Signature192() (uint16, int32, int)
func Signature193(uint8, int, int32) (int8, uintptr, uint64, int)
func Signature194(uint16, uint64, uint8) (int, int8, uint)
func Signature195(int, uint) (int32, int, int8)
func Signature196(uint16) (uintptr, uint32)
func Signature197(uintptr, int32) (int64, int16)
func Signature198(uint8) (uint8, int16, uint32)
func Signature199(uint)
func Signature200(uintptr) uintptr
func Signature201(uint64, int8) (uint8, int8, int16, uintptr)
func Signature202(uint16, uint64, int8, uint) (uint, uint64, uintptr, int16)
func Signature203(int16, int8, uint, int8)
func Signature204(int16, int32, uint) (uint8, int64, uintptr)
func Signature205(int, int8, int16, int16) (uintptr, uint64, uint64, uintptr)
func Signature206() (int8, int, uint32)
func Signature207(uint16) (int32, uint16)
func Signature208(int32, uintptr, int8, int32) (uint8, uint, int16)
func Signature209(int8, int16)
func Signature210(int) (uint64, uint64, int8)
func Signature211(uint32, uint, uintptr) (uint32, uint64, uint8)
func Signature212(uint8, int8, int) uint8
func Signature213(uint16, uintptr) (uint64, uint16, int)
func Signature214(uint16, uintptr, int8) (int16, int64, int)
func Signature215(int16, int8) uintptr
func Signature216() (int16, uint16)
func Signature217(int32, uint, int) (uint32, int64, uint)
func Signature218() (int16, uint16, int16, uint32)
func Signature219(int32, int32) (uint16, uint8)
func Signature220(uint8, int64) (uint64, int32)
func Signature221(uintptr, int, int8) uint64
func Signature222() uintptr
func Signature223(uint16, uint8, uint16, uint8) (uint32, int32)
func Signature224(int16, int8, int8, uint32)
func Signature225(uintptr, int64) (int32, int, uintptr)
func Signature226(uint64) int64
func Signature227() (int64, int32, uintptr)
func Signature228(int16, int64, int16, int64)
func Signature229(int32, int, uint64, int64) (int, uint, uintptr, uint16)
func Signature230() (uintptr, uint64)
func Signature231() (int8, uint32, int, int16)
func Signature232()
func Signature233(uint16, uint8, int16) (uint8, int16, uint64, int64)
func Signature234(int8, uint8, int8) (uint8, uint8, uintptr)
func Signature235(int16, uint) (int64, uint16, uint32)
func Signature236(uint64, uint, int32, int8)
func Signature237(uint32, int32, int, uintptr) (int16, int64, int32)
func Signature238(int8, uint16)
func Signature239() (uint64, int8)
func Signature240(uint, int32, uint64) uint64
func Signature241(int64, uint, uint8)
func Signature242(int64, int8, uint32) (int32, uint, uint32, uint64)
func Signature243(uint, uint16) uint16
func Signature244() (uintptr, int, uint8)
func Signature245(int64, int16)
func Signature246(int64, uint16, uint8) (uint16, uint, uint)
func Signature247(uint32, uintptr) (int32, int32)
func Signature248(int16, int16) (uint, int32)
func Signature249() (uint32, uint16, uint)
func Signature250(int64, uintptr) (uint64, uint16)
func Signature251(int64, int32, int, int64) uintptr
func Signature252(int) uint16
func Signature253(int8, uint) (int, uint16, int64)
func Signature254(uint32) (int8, int32)
func Signature255(uint8, uint64, int8, int8) (int16, uint16, uint32, int16)
golang-github-mmcloughlin-avo-0.5.0/tests/textflag/ 0000775 0000000 0000000 00000000000 14370657153 0022335 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/textflag/attrtest.go 0000664 0000000 0000000 00000000302 14370657153 0024531 0 ustar 00root root 0000000 0000000 // Package textflag tests that avo attribute constants agree with textflag.h.
package textflag
//go:generate go run make_attrtest.go -output zattrtest.s -seed 42 -num 256
func attrtest() bool
golang-github-mmcloughlin-avo-0.5.0/tests/textflag/attrtest_test.go 0000664 0000000 0000000 00000000152 14370657153 0025573 0 ustar 00root root 0000000 0000000 package textflag
import "testing"
func TestAttributes(t *testing.T) {
if !attrtest() {
t.Fail()
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/textflag/make_attrtest.go 0000664 0000000 0000000 00000003330 14370657153 0025532 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"bytes"
"flag"
"fmt"
"io"
"log"
"math/rand"
"os"
"path/filepath"
"runtime"
"github.com/mmcloughlin/avo/attr"
)
var (
output = flag.String("output", "", "path to output file (default stdout)")
seed = flag.Int64("seed", 0, "random seed")
num = flag.Int("num", 32, "number of attributes to generate")
)
func GenerateAttributes(n int) []attr.Attribute {
as := make([]attr.Attribute, 0, n)
// Include each bitlevel.
for i := 0; i < 16 && i < n; i++ {
a := attr.Attribute(1 << uint(i))
as = append(as, a)
}
// Add randomly generated attributes.
for len(as) < n {
a := attr.Attribute(rand.Uint32())
as = append(as, a)
}
return as
}
func PrintAttributesTest(w io.Writer, as []attr.Attribute) {
_, self, _, _ := runtime.Caller(0)
fmt.Fprintf(w, "// Code generated by %s. DO NOT EDIT.\n\n", filepath.Base(self))
fmt.Fprintf(w, "#include \"textflag.h\"\n\n")
fmt.Fprintf(w, "TEXT ·attrtest(SB), $0-1\n")
fmt.Fprintf(w, "\tMOVB $0, ret+0(FP)\n")
for i, a := range as {
fmt.Fprintf(w, "\tMOVW $(%d), R8\n", a)
fmt.Fprintf(w, "\tMOVW $(%s), R9\n", a.Asm())
fmt.Fprintf(w, "\tCMPW R8, R9\n")
cont := fmt.Sprintf("cont%d", i)
fmt.Fprintf(w, "\tJE %s\n", cont)
fmt.Fprintf(w, "\tRET\n")
fmt.Fprintf(w, "\n%s:\n", cont)
}
fmt.Fprintf(w, "\tMOVB $1, ret+0(FP)\n")
fmt.Fprintf(w, "\tRET\n")
}
func main() {
flag.Parse()
w := os.Stdout
if *output != "" {
f, err := os.Create(*output)
if err != nil {
log.Fatal(err)
}
defer f.Close()
w = f
}
rand.Seed(*seed)
as := GenerateAttributes(*num)
buf := bytes.NewBuffer(nil)
PrintAttributesTest(buf, as)
if _, err := w.Write(buf.Bytes()); err != nil {
log.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/textflag/zattrtest.s 0000664 0000000 0000000 00000074770 14370657153 0024604 0 ustar 00root root 0000000 0000000 // Code generated by make_attrtest.go. DO NOT EDIT.
#include "textflag.h"
TEXT ·attrtest(SB), $0-1
MOVB $0, ret+0(FP)
MOVW $(1), R8
MOVW $(NOPROF), R9
CMPW R8, R9
JE cont0
RET
cont0:
MOVW $(2), R8
MOVW $(DUPOK), R9
CMPW R8, R9
JE cont1
RET
cont1:
MOVW $(4), R8
MOVW $(NOSPLIT), R9
CMPW R8, R9
JE cont2
RET
cont2:
MOVW $(8), R8
MOVW $(RODATA), R9
CMPW R8, R9
JE cont3
RET
cont3:
MOVW $(16), R8
MOVW $(NOPTR), R9
CMPW R8, R9
JE cont4
RET
cont4:
MOVW $(32), R8
MOVW $(WRAPPER), R9
CMPW R8, R9
JE cont5
RET
cont5:
MOVW $(64), R8
MOVW $(NEEDCTXT), R9
CMPW R8, R9
JE cont6
RET
cont6:
MOVW $(128), R8
MOVW $(128), R9
CMPW R8, R9
JE cont7
RET
cont7:
MOVW $(256), R8
MOVW $(TLSBSS), R9
CMPW R8, R9
JE cont8
RET
cont8:
MOVW $(512), R8
MOVW $(NOFRAME), R9
CMPW R8, R9
JE cont9
RET
cont9:
MOVW $(1024), R8
MOVW $(REFLECTMETHOD), R9
CMPW R8, R9
JE cont10
RET
cont10:
MOVW $(2048), R8
MOVW $(TOPFRAME), R9
CMPW R8, R9
JE cont11
RET
cont11:
MOVW $(4096), R8
MOVW $(4096), R9
CMPW R8, R9
JE cont12
RET
cont12:
MOVW $(8192), R8
MOVW $(8192), R9
CMPW R8, R9
JE cont13
RET
cont13:
MOVW $(16384), R8
MOVW $(16384), R9
CMPW R8, R9
JE cont14
RET
cont14:
MOVW $(32768), R8
MOVW $(32768), R9
CMPW R8, R9
JE cont15
RET
cont15:
MOVW $(51555), R8
MOVW $(NOPROF|DUPOK|WRAPPER|NEEDCTXT|TLSBSS|TOPFRAME|49152), R9
CMPW R8, R9
JE cont16
RET
cont16:
MOVW $(26775), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|NOPTR|TOPFRAME|24704), R9
CMPW R8, R9
JE cont17
RET
cont17:
MOVW $(58632), R8
MOVW $(RODATA|TLSBSS|REFLECTMETHOD|57344), R9
CMPW R8, R9
JE cont18
RET
cont18:
MOVW $(9340), R8
MOVW $(NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|REFLECTMETHOD|8192), R9
CMPW R8, R9
JE cont19
RET
cont19:
MOVW $(44990), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|41088), R9
CMPW R8, R9
JE cont20
RET
cont20:
MOVW $(62659), R8
MOVW $(NOPROF|DUPOK|NEEDCTXT|REFLECTMETHOD|61568), R9
CMPW R8, R9
JE cont21
RET
cont21:
MOVW $(46922), R8
MOVW $(DUPOK|RODATA|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|45056), R9
CMPW R8, R9
JE cont22
RET
cont22:
MOVW $(2832), R8
MOVW $(NOPTR|TLSBSS|NOFRAME|TOPFRAME), R9
CMPW R8, R9
JE cont23
RET
cont23:
MOVW $(14049), R8
MOVW $(NOPROF|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|12416), R9
CMPW R8, R9
JE cont24
RET
cont24:
MOVW $(60326), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|TLSBSS|NOFRAME|TOPFRAME|57472), R9
CMPW R8, R9
JE cont25
RET
cont25:
MOVW $(13299), R8
MOVW $(NOPROF|DUPOK|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|12416), R9
CMPW R8, R9
JE cont26
RET
cont26:
MOVW $(1247), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|NEEDCTXT|REFLECTMETHOD|128), R9
CMPW R8, R9
JE cont27
RET
cont27:
MOVW $(15823), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|12416), R9
CMPW R8, R9
JE cont28
RET
cont28:
MOVW $(30136), R8
MOVW $(RODATA|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|28800), R9
CMPW R8, R9
JE cont29
RET
cont29:
MOVW $(40728), R8
MOVW $(RODATA|NOPTR|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|36864), R9
CMPW R8, R9
JE cont30
RET
cont30:
MOVW $(7898), R8
MOVW $(DUPOK|RODATA|NOPTR|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|4224), R9
CMPW R8, R9
JE cont31
RET
cont31:
MOVW $(39945), R8
MOVW $(NOPROF|RODATA|REFLECTMETHOD|TOPFRAME|36864), R9
CMPW R8, R9
JE cont32
RET
cont32:
MOVW $(40690), R8
MOVW $(DUPOK|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|36992), R9
CMPW R8, R9
JE cont33
RET
cont33:
MOVW $(23902), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|20480), R9
CMPW R8, R9
JE cont34
RET
cont34:
MOVW $(5152), R8
MOVW $(WRAPPER|REFLECTMETHOD|4096), R9
CMPW R8, R9
JE cont35
RET
cont35:
MOVW $(34644), R8
MOVW $(NOSPLIT|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|32768), R9
CMPW R8, R9
JE cont36
RET
cont36:
MOVW $(11820), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|8192), R9
CMPW R8, R9
JE cont37
RET
cont37:
MOVW $(59273), R8
MOVW $(NOPROF|RODATA|TLSBSS|NOFRAME|REFLECTMETHOD|57472), R9
CMPW R8, R9
JE cont38
RET
cont38:
MOVW $(44726), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|41088), R9
CMPW R8, R9
JE cont39
RET
cont39:
MOVW $(20512), R8
MOVW $(WRAPPER|20480), R9
CMPW R8, R9
JE cont40
RET
cont40:
MOVW $(4187), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|NEEDCTXT|4096), R9
CMPW R8, R9
JE cont41
RET
cont41:
MOVW $(436), R8
MOVW $(NOSPLIT|NOPTR|WRAPPER|TLSBSS|128), R9
CMPW R8, R9
JE cont42
RET
cont42:
MOVW $(11726), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|8320), R9
CMPW R8, R9
JE cont43
RET
cont43:
MOVW $(59574), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|WRAPPER|TOPFRAME|57472), R9
CMPW R8, R9
JE cont44
RET
cont44:
MOVW $(32334), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|28672), R9
CMPW R8, R9
JE cont45
RET
cont45:
MOVW $(22301), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|TLSBSS|NOFRAME|REFLECTMETHOD|20480), R9
CMPW R8, R9
JE cont46
RET
cont46:
MOVW $(8476), R8
MOVW $(NOSPLIT|RODATA|NOPTR|TLSBSS|8192), R9
CMPW R8, R9
JE cont47
RET
cont47:
MOVW $(35303), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|WRAPPER|NEEDCTXT|TLSBSS|TOPFRAME|32896), R9
CMPW R8, R9
JE cont48
RET
cont48:
MOVW $(32260), R8
MOVW $(NOSPLIT|NOFRAME|REFLECTMETHOD|TOPFRAME|28672), R9
CMPW R8, R9
JE cont49
RET
cont49:
MOVW $(20442), R8
MOVW $(DUPOK|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|16512), R9
CMPW R8, R9
JE cont50
RET
cont50:
MOVW $(64405), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|TLSBSS|NOFRAME|TOPFRAME|61568), R9
CMPW R8, R9
JE cont51
RET
cont51:
MOVW $(12909), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|NOFRAME|12288), R9
CMPW R8, R9
JE cont52
RET
cont52:
MOVW $(15759), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|TLSBSS|REFLECTMETHOD|TOPFRAME|12416), R9
CMPW R8, R9
JE cont53
RET
cont53:
MOVW $(64056), R8
MOVW $(RODATA|NOPTR|WRAPPER|NOFRAME|TOPFRAME|61440), R9
CMPW R8, R9
JE cont54
RET
cont54:
MOVW $(4662), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|WRAPPER|NOFRAME|4096), R9
CMPW R8, R9
JE cont55
RET
cont55:
MOVW $(60054), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|NOFRAME|TOPFRAME|57472), R9
CMPW R8, R9
JE cont56
RET
cont56:
MOVW $(34262), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|NEEDCTXT|TLSBSS|REFLECTMETHOD|32896), R9
CMPW R8, R9
JE cont57
RET
cont57:
MOVW $(58049), R8
MOVW $(NOPROF|NEEDCTXT|NOFRAME|57472), R9
CMPW R8, R9
JE cont58
RET
cont58:
MOVW $(32721), R8
MOVW $(NOPROF|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|28800), R9
CMPW R8, R9
JE cont59
RET
cont59:
MOVW $(33024), R8
MOVW $(TLSBSS|32768), R9
CMPW R8, R9
JE cont60
RET
cont60:
MOVW $(47888), R8
MOVW $(NOPTR|TLSBSS|NOFRAME|TOPFRAME|45056), R9
CMPW R8, R9
JE cont61
RET
cont61:
MOVW $(1797), R8
MOVW $(NOPROF|NOSPLIT|TLSBSS|NOFRAME|REFLECTMETHOD), R9
CMPW R8, R9
JE cont62
RET
cont62:
MOVW $(16601), R8
MOVW $(NOPROF|RODATA|NOPTR|NEEDCTXT|16512), R9
CMPW R8, R9
JE cont63
RET
cont63:
MOVW $(19611), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|REFLECTMETHOD|TOPFRAME|16512), R9
CMPW R8, R9
JE cont64
RET
cont64:
MOVW $(26958), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|TOPFRAME|24576), R9
CMPW R8, R9
JE cont65
RET
cont65:
MOVW $(59957), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|NOFRAME|TOPFRAME|57344), R9
CMPW R8, R9
JE cont66
RET
cont66:
MOVW $(34657), R8
MOVW $(NOPROF|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|32768), R9
CMPW R8, R9
JE cont67
RET
cont67:
MOVW $(9579), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|8192), R9
CMPW R8, R9
JE cont68
RET
cont68:
MOVW $(35198), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|TOPFRAME|32768), R9
CMPW R8, R9
JE cont69
RET
cont69:
MOVW $(60096), R8
MOVW $(NEEDCTXT|NOFRAME|TOPFRAME|57472), R9
CMPW R8, R9
JE cont70
RET
cont70:
MOVW $(14745), R8
MOVW $(NOPROF|RODATA|NOPTR|TLSBSS|TOPFRAME|12416), R9
CMPW R8, R9
JE cont71
RET
cont71:
MOVW $(15140), R8
MOVW $(NOSPLIT|WRAPPER|TLSBSS|NOFRAME|TOPFRAME|12288), R9
CMPW R8, R9
JE cont72
RET
cont72:
MOVW $(29395), R8
MOVW $(NOPROF|DUPOK|NOPTR|NEEDCTXT|NOFRAME|28800), R9
CMPW R8, R9
JE cont73
RET
cont73:
MOVW $(56341), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|REFLECTMETHOD|TOPFRAME|53248), R9
CMPW R8, R9
JE cont74
RET
cont74:
MOVW $(51391), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TOPFRAME|49280), R9
CMPW R8, R9
JE cont75
RET
cont75:
MOVW $(8720), R8
MOVW $(NOPTR|NOFRAME|8192), R9
CMPW R8, R9
JE cont76
RET
cont76:
MOVW $(28996), R8
MOVW $(NOSPLIT|NEEDCTXT|TLSBSS|28672), R9
CMPW R8, R9
JE cont77
RET
cont77:
MOVW $(26471), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|24576), R9
CMPW R8, R9
JE cont78
RET
cont78:
MOVW $(12608), R8
MOVW $(NEEDCTXT|TLSBSS|12288), R9
CMPW R8, R9
JE cont79
RET
cont79:
MOVW $(25967), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|24576), R9
CMPW R8, R9
JE cont80
RET
cont80:
MOVW $(40207), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|TLSBSS|REFLECTMETHOD|TOPFRAME|36864), R9
CMPW R8, R9
JE cont81
RET
cont81:
MOVW $(49489), R8
MOVW $(NOPROF|NOPTR|NEEDCTXT|TLSBSS|49152), R9
CMPW R8, R9
JE cont82
RET
cont82:
MOVW $(32352), R8
MOVW $(WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|28672), R9
CMPW R8, R9
JE cont83
RET
cont83:
MOVW $(36921), R8
MOVW $(NOPROF|RODATA|NOPTR|WRAPPER|36864), R9
CMPW R8, R9
JE cont84
RET
cont84:
MOVW $(60606), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|REFLECTMETHOD|TOPFRAME|57472), R9
CMPW R8, R9
JE cont85
RET
cont85:
MOVW $(7612), R8
MOVW $(NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|TOPFRAME|4224), R9
CMPW R8, R9
JE cont86
RET
cont86:
MOVW $(34214), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|TLSBSS|REFLECTMETHOD|32896), R9
CMPW R8, R9
JE cont87
RET
cont87:
MOVW $(46316), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|NEEDCTXT|REFLECTMETHOD|45184), R9
CMPW R8, R9
JE cont88
RET
cont88:
MOVW $(49646), R8
MOVW $(DUPOK|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|49280), R9
CMPW R8, R9
JE cont89
RET
cont89:
MOVW $(47424), R8
MOVW $(NEEDCTXT|TLSBSS|TOPFRAME|45056), R9
CMPW R8, R9
JE cont90
RET
cont90:
MOVW $(9953), R8
MOVW $(NOPROF|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|8320), R9
CMPW R8, R9
JE cont91
RET
cont91:
MOVW $(38379), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|36992), R9
CMPW R8, R9
JE cont92
RET
cont92:
MOVW $(34224), R8
MOVW $(NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|32896), R9
CMPW R8, R9
JE cont93
RET
cont93:
MOVW $(21823), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|20480), R9
CMPW R8, R9
JE cont94
RET
cont94:
MOVW $(16077), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|12416), R9
CMPW R8, R9
JE cont95
RET
cont95:
MOVW $(36222), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont96
RET
cont96:
MOVW $(9382), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|REFLECTMETHOD|8320), R9
CMPW R8, R9
JE cont97
RET
cont97:
MOVW $(56059), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|TOPFRAME|53376), R9
CMPW R8, R9
JE cont98
RET
cont98:
MOVW $(13007), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NEEDCTXT|NOFRAME|12416), R9
CMPW R8, R9
JE cont99
RET
cont99:
MOVW $(16884), R8
MOVW $(NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|16512), R9
CMPW R8, R9
JE cont100
RET
cont100:
MOVW $(34365), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|WRAPPER|NOFRAME|REFLECTMETHOD|32768), R9
CMPW R8, R9
JE cont101
RET
cont101:
MOVW $(1967), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|128), R9
CMPW R8, R9
JE cont102
RET
cont102:
MOVW $(35380), R8
MOVW $(NOSPLIT|NOPTR|WRAPPER|NOFRAME|TOPFRAME|32768), R9
CMPW R8, R9
JE cont103
RET
cont103:
MOVW $(54358), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|NEEDCTXT|REFLECTMETHOD|53248), R9
CMPW R8, R9
JE cont104
RET
cont104:
MOVW $(38980), R8
MOVW $(NOSPLIT|NEEDCTXT|TOPFRAME|36864), R9
CMPW R8, R9
JE cont105
RET
cont105:
MOVW $(50589), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|TLSBSS|REFLECTMETHOD|49280), R9
CMPW R8, R9
JE cont106
RET
cont106:
MOVW $(50221), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|REFLECTMETHOD|49152), R9
CMPW R8, R9
JE cont107
RET
cont107:
MOVW $(43726), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|NOFRAME|TOPFRAME|41088), R9
CMPW R8, R9
JE cont108
RET
cont108:
MOVW $(21094), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|NEEDCTXT|NOFRAME|20480), R9
CMPW R8, R9
JE cont109
RET
cont109:
MOVW $(4974), R8
MOVW $(DUPOK|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|4096), R9
CMPW R8, R9
JE cont110
RET
cont110:
MOVW $(5039), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|WRAPPER|TLSBSS|NOFRAME|4224), R9
CMPW R8, R9
JE cont111
RET
cont111:
MOVW $(53881), R8
MOVW $(NOPROF|RODATA|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|53248), R9
CMPW R8, R9
JE cont112
RET
cont112:
MOVW $(51103), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|TLSBSS|NOFRAME|REFLECTMETHOD|49280), R9
CMPW R8, R9
JE cont113
RET
cont113:
MOVW $(44577), R8
MOVW $(NOPROF|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|40960), R9
CMPW R8, R9
JE cont114
RET
cont114:
MOVW $(59716), R8
MOVW $(NOSPLIT|NEEDCTXT|TLSBSS|TOPFRAME|57344), R9
CMPW R8, R9
JE cont115
RET
cont115:
MOVW $(25116), R8
MOVW $(NOSPLIT|RODATA|NOPTR|NOFRAME|24576), R9
CMPW R8, R9
JE cont116
RET
cont116:
MOVW $(49120), R8
MOVW $(WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|45184), R9
CMPW R8, R9
JE cont117
RET
cont117:
MOVW $(31200), R8
MOVW $(WRAPPER|NEEDCTXT|TLSBSS|TOPFRAME|28800), R9
CMPW R8, R9
JE cont118
RET
cont118:
MOVW $(8862), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|NOFRAME|8320), R9
CMPW R8, R9
JE cont119
RET
cont119:
MOVW $(10797), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|NOFRAME|TOPFRAME|8192), R9
CMPW R8, R9
JE cont120
RET
cont120:
MOVW $(14452), R8
MOVW $(NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|TOPFRAME|12288), R9
CMPW R8, R9
JE cont121
RET
cont121:
MOVW $(45917), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|45056), R9
CMPW R8, R9
JE cont122
RET
cont122:
MOVW $(15910), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|12288), R9
CMPW R8, R9
JE cont123
RET
cont123:
MOVW $(46865), R8
MOVW $(NOPROF|NOPTR|TLSBSS|NOFRAME|REFLECTMETHOD|45056), R9
CMPW R8, R9
JE cont124
RET
cont124:
MOVW $(30847), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|TOPFRAME|28672), R9
CMPW R8, R9
JE cont125
RET
cont125:
MOVW $(36849), R8
MOVW $(NOPROF|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|32896), R9
CMPW R8, R9
JE cont126
RET
cont126:
MOVW $(6223), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NEEDCTXT|TOPFRAME|4096), R9
CMPW R8, R9
JE cont127
RET
cont127:
MOVW $(14879), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|NOFRAME|TOPFRAME|12288), R9
CMPW R8, R9
JE cont128
RET
cont128:
MOVW $(46887), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|45056), R9
CMPW R8, R9
JE cont129
RET
cont129:
MOVW $(6166), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|TOPFRAME|4096), R9
CMPW R8, R9
JE cont130
RET
cont130:
MOVW $(34541), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|32896), R9
CMPW R8, R9
JE cont131
RET
cont131:
MOVW $(20163), R8
MOVW $(NOPROF|DUPOK|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|16512), R9
CMPW R8, R9
JE cont132
RET
cont132:
MOVW $(30775), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|NOPTR|WRAPPER|TOPFRAME|28672), R9
CMPW R8, R9
JE cont133
RET
cont133:
MOVW $(20691), R8
MOVW $(NOPROF|DUPOK|NOPTR|NEEDCTXT|20608), R9
CMPW R8, R9
JE cont134
RET
cont134:
MOVW $(49237), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|NEEDCTXT|49152), R9
CMPW R8, R9
JE cont135
RET
cont135:
MOVW $(10594), R8
MOVW $(DUPOK|WRAPPER|NEEDCTXT|TLSBSS|TOPFRAME|8192), R9
CMPW R8, R9
JE cont136
RET
cont136:
MOVW $(3492), R8
MOVW $(NOSPLIT|WRAPPER|TLSBSS|REFLECTMETHOD|TOPFRAME|128), R9
CMPW R8, R9
JE cont137
RET
cont137:
MOVW $(13164), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|12288), R9
CMPW R8, R9
JE cont138
RET
cont138:
MOVW $(64049), R8
MOVW $(NOPROF|NOPTR|WRAPPER|NOFRAME|TOPFRAME|61440), R9
CMPW R8, R9
JE cont139
RET
cont139:
MOVW $(31455), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|NEEDCTXT|NOFRAME|TOPFRAME|28800), R9
CMPW R8, R9
JE cont140
RET
cont140:
MOVW $(58686), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|57344), R9
CMPW R8, R9
JE cont141
RET
cont141:
MOVW $(39931), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|36992), R9
CMPW R8, R9
JE cont142
RET
cont142:
MOVW $(36917), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|36864), R9
CMPW R8, R9
JE cont143
RET
cont143:
MOVW $(3463), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|TLSBSS|REFLECTMETHOD|TOPFRAME|128), R9
CMPW R8, R9
JE cont144
RET
cont144:
MOVW $(58365), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|57472), R9
CMPW R8, R9
JE cont145
RET
cont145:
MOVW $(37621), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|36992), R9
CMPW R8, R9
JE cont146
RET
cont146:
MOVW $(35362), R8
MOVW $(DUPOK|WRAPPER|NOFRAME|TOPFRAME|32768), R9
CMPW R8, R9
JE cont147
RET
cont147:
MOVW $(48077), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|45184), R9
CMPW R8, R9
JE cont148
RET
cont148:
MOVW $(24171), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|20480), R9
CMPW R8, R9
JE cont149
RET
cont149:
MOVW $(7148), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|4224), R9
CMPW R8, R9
JE cont150
RET
cont150:
MOVW $(52110), R8
MOVW $(DUPOK|NOSPLIT|RODATA|TLSBSS|NOFRAME|TOPFRAME|49280), R9
CMPW R8, R9
JE cont151
RET
cont151:
MOVW $(46246), R8
MOVW $(DUPOK|NOSPLIT|WRAPPER|REFLECTMETHOD|45184), R9
CMPW R8, R9
JE cont152
RET
cont152:
MOVW $(41597), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|40960), R9
CMPW R8, R9
JE cont153
RET
cont153:
MOVW $(17959), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|WRAPPER|NOFRAME|REFLECTMETHOD|16384), R9
CMPW R8, R9
JE cont154
RET
cont154:
MOVW $(14174), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|12288), R9
CMPW R8, R9
JE cont155
RET
cont155:
MOVW $(61554), R8
MOVW $(DUPOK|NOPTR|WRAPPER|NEEDCTXT|61440), R9
CMPW R8, R9
JE cont156
RET
cont156:
MOVW $(19943), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|16512), R9
CMPW R8, R9
JE cont157
RET
cont157:
MOVW $(38270), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|36864), R9
CMPW R8, R9
JE cont158
RET
cont158:
MOVW $(22574), R8
MOVW $(DUPOK|NOSPLIT|RODATA|WRAPPER|TOPFRAME|20480), R9
CMPW R8, R9
JE cont159
RET
cont159:
MOVW $(55814), R8
MOVW $(DUPOK|NOSPLIT|NOFRAME|TOPFRAME|53248), R9
CMPW R8, R9
JE cont160
RET
cont160:
MOVW $(36188), R8
MOVW $(NOSPLIT|RODATA|NOPTR|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont161
RET
cont161:
MOVW $(46069), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|45184), R9
CMPW R8, R9
JE cont162
RET
cont162:
MOVW $(8202), R8
MOVW $(DUPOK|RODATA|8192), R9
CMPW R8, R9
JE cont163
RET
cont163:
MOVW $(32821), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|32768), R9
CMPW R8, R9
JE cont164
RET
cont164:
MOVW $(33175), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|NOPTR|TLSBSS|32896), R9
CMPW R8, R9
JE cont165
RET
cont165:
MOVW $(36683), R8
MOVW $(NOPROF|DUPOK|RODATA|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont166
RET
cont166:
MOVW $(50128), R8
MOVW $(NOPTR|NEEDCTXT|TLSBSS|NOFRAME|49280), R9
CMPW R8, R9
JE cont167
RET
cont167:
MOVW $(15990), R8
MOVW $(DUPOK|NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|12288), R9
CMPW R8, R9
JE cont168
RET
cont168:
MOVW $(41422), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|41088), R9
CMPW R8, R9
JE cont169
RET
cont169:
MOVW $(43615), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|NEEDCTXT|NOFRAME|TOPFRAME|40960), R9
CMPW R8, R9
JE cont170
RET
cont170:
MOVW $(2372), R8
MOVW $(NOSPLIT|NEEDCTXT|TLSBSS|TOPFRAME), R9
CMPW R8, R9
JE cont171
RET
cont171:
MOVW $(55701), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|TLSBSS|TOPFRAME|53376), R9
CMPW R8, R9
JE cont172
RET
cont172:
MOVW $(35514), R8
MOVW $(DUPOK|RODATA|NOPTR|WRAPPER|NOFRAME|TOPFRAME|32896), R9
CMPW R8, R9
JE cont173
RET
cont173:
MOVW $(50126), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|NOFRAME|49280), R9
CMPW R8, R9
JE cont174
RET
cont174:
MOVW $(27923), R8
MOVW $(NOPROF|DUPOK|NOPTR|TLSBSS|REFLECTMETHOD|TOPFRAME|24576), R9
CMPW R8, R9
JE cont175
RET
cont175:
MOVW $(40017), R8
MOVW $(NOPROF|NOPTR|NEEDCTXT|REFLECTMETHOD|TOPFRAME|36864), R9
CMPW R8, R9
JE cont176
RET
cont176:
MOVW $(63111), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|NOFRAME|REFLECTMETHOD|61568), R9
CMPW R8, R9
JE cont177
RET
cont177:
MOVW $(55408), R8
MOVW $(NOPTR|WRAPPER|NEEDCTXT|TOPFRAME|53248), R9
CMPW R8, R9
JE cont178
RET
cont178:
MOVW $(12968), R8
MOVW $(RODATA|WRAPPER|NOFRAME|12416), R9
CMPW R8, R9
JE cont179
RET
cont179:
MOVW $(49747), R8
MOVW $(NOPROF|DUPOK|NOPTR|NEEDCTXT|NOFRAME|49152), R9
CMPW R8, R9
JE cont180
RET
cont180:
MOVW $(35425), R8
MOVW $(NOPROF|WRAPPER|NEEDCTXT|NOFRAME|TOPFRAME|32768), R9
CMPW R8, R9
JE cont181
RET
cont181:
MOVW $(43794), R8
MOVW $(DUPOK|NOPTR|TLSBSS|NOFRAME|TOPFRAME|40960), R9
CMPW R8, R9
JE cont182
RET
cont182:
MOVW $(60715), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|TLSBSS|REFLECTMETHOD|TOPFRAME|57344), R9
CMPW R8, R9
JE cont183
RET
cont183:
MOVW $(37662), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|TLSBSS|NOFRAME|36864), R9
CMPW R8, R9
JE cont184
RET
cont184:
MOVW $(53835), R8
MOVW $(NOPROF|DUPOK|RODATA|NEEDCTXT|NOFRAME|53248), R9
CMPW R8, R9
JE cont185
RET
cont185:
MOVW $(21932), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|TLSBSS|REFLECTMETHOD|20608), R9
CMPW R8, R9
JE cont186
RET
cont186:
MOVW $(36643), R8
MOVW $(NOPROF|DUPOK|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont187
RET
cont187:
MOVW $(8875), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|NOFRAME|8320), R9
CMPW R8, R9
JE cont188
RET
cont188:
MOVW $(2906), R8
MOVW $(DUPOK|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME), R9
CMPW R8, R9
JE cont189
RET
cont189:
MOVW $(47266), R8
MOVW $(DUPOK|WRAPPER|TOPFRAME|45184), R9
CMPW R8, R9
JE cont190
RET
cont190:
MOVW $(44660), R8
MOVW $(NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|40960), R9
CMPW R8, R9
JE cont191
RET
cont191:
MOVW $(16646), R8
MOVW $(DUPOK|NOSPLIT|TLSBSS|16384), R9
CMPW R8, R9
JE cont192
RET
cont192:
MOVW $(16896), R8
MOVW $(NOFRAME|16384), R9
CMPW R8, R9
JE cont193
RET
cont193:
MOVW $(65193), R8
MOVW $(NOPROF|RODATA|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|61568), R9
CMPW R8, R9
JE cont194
RET
cont194:
MOVW $(49730), R8
MOVW $(DUPOK|NEEDCTXT|NOFRAME|49152), R9
CMPW R8, R9
JE cont195
RET
cont195:
MOVW $(55434), R8
MOVW $(DUPOK|RODATA|TOPFRAME|53376), R9
CMPW R8, R9
JE cont196
RET
cont196:
MOVW $(46426), R8
MOVW $(DUPOK|RODATA|NOPTR|NEEDCTXT|TLSBSS|REFLECTMETHOD|45056), R9
CMPW R8, R9
JE cont197
RET
cont197:
MOVW $(48805), R8
MOVW $(NOPROF|NOSPLIT|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|45184), R9
CMPW R8, R9
JE cont198
RET
cont198:
MOVW $(20145), R8
MOVW $(NOPROF|NOPTR|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|16512), R9
CMPW R8, R9
JE cont199
RET
cont199:
MOVW $(43621), R8
MOVW $(NOPROF|NOSPLIT|WRAPPER|NEEDCTXT|NOFRAME|TOPFRAME|40960), R9
CMPW R8, R9
JE cont200
RET
cont200:
MOVW $(30384), R8
MOVW $(NOPTR|WRAPPER|NOFRAME|REFLECTMETHOD|28800), R9
CMPW R8, R9
JE cont201
RET
cont201:
MOVW $(51995), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|TLSBSS|NOFRAME|TOPFRAME|49152), R9
CMPW R8, R9
JE cont202
RET
cont202:
MOVW $(36354), R8
MOVW $(DUPOK|NOFRAME|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont203
RET
cont203:
MOVW $(51189), R8
MOVW $(NOPROF|NOSPLIT|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|49280), R9
CMPW R8, R9
JE cont204
RET
cont204:
MOVW $(60392), R8
MOVW $(RODATA|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|57472), R9
CMPW R8, R9
JE cont205
RET
cont205:
MOVW $(59915), R8
MOVW $(NOPROF|DUPOK|RODATA|NOFRAME|TOPFRAME|57344), R9
CMPW R8, R9
JE cont206
RET
cont206:
MOVW $(48045), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|TLSBSS|NOFRAME|TOPFRAME|45184), R9
CMPW R8, R9
JE cont207
RET
cont207:
MOVW $(45857), R8
MOVW $(NOPROF|WRAPPER|TLSBSS|NOFRAME|45056), R9
CMPW R8, R9
JE cont208
RET
cont208:
MOVW $(13353), R8
MOVW $(NOPROF|RODATA|WRAPPER|REFLECTMETHOD|12288), R9
CMPW R8, R9
JE cont209
RET
cont209:
MOVW $(59426), R8
MOVW $(DUPOK|WRAPPER|TOPFRAME|57344), R9
CMPW R8, R9
JE cont210
RET
cont210:
MOVW $(45446), R8
MOVW $(DUPOK|NOSPLIT|TLSBSS|45184), R9
CMPW R8, R9
JE cont211
RET
cont211:
MOVW $(18511), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NEEDCTXT|TOPFRAME|16384), R9
CMPW R8, R9
JE cont212
RET
cont212:
MOVW $(56907), R8
MOVW $(NOPROF|DUPOK|RODATA|NEEDCTXT|NOFRAME|REFLECTMETHOD|TOPFRAME|53248), R9
CMPW R8, R9
JE cont213
RET
cont213:
MOVW $(44976), R8
MOVW $(NOPTR|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|41088), R9
CMPW R8, R9
JE cont214
RET
cont214:
MOVW $(59819), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|TLSBSS|TOPFRAME|57472), R9
CMPW R8, R9
JE cont215
RET
cont215:
MOVW $(6830), R8
MOVW $(DUPOK|NOSPLIT|RODATA|WRAPPER|NOFRAME|TOPFRAME|4224), R9
CMPW R8, R9
JE cont216
RET
cont216:
MOVW $(26565), R8
MOVW $(NOPROF|NOSPLIT|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|24704), R9
CMPW R8, R9
JE cont217
RET
cont217:
MOVW $(49773), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|NOFRAME|49152), R9
CMPW R8, R9
JE cont218
RET
cont218:
MOVW $(65056), R8
MOVW $(WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|61440), R9
CMPW R8, R9
JE cont219
RET
cont219:
MOVW $(32556), R8
MOVW $(NOSPLIT|RODATA|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|28672), R9
CMPW R8, R9
JE cont220
RET
cont220:
MOVW $(39583), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|NOFRAME|TOPFRAME|36992), R9
CMPW R8, R9
JE cont221
RET
cont221:
MOVW $(10339), R8
MOVW $(NOPROF|DUPOK|WRAPPER|NEEDCTXT|TOPFRAME|8192), R9
CMPW R8, R9
JE cont222
RET
cont222:
MOVW $(23729), R8
MOVW $(NOPROF|NOPTR|WRAPPER|REFLECTMETHOD|TOPFRAME|20608), R9
CMPW R8, R9
JE cont223
RET
cont223:
MOVW $(23403), R8
MOVW $(NOPROF|DUPOK|RODATA|WRAPPER|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|20480), R9
CMPW R8, R9
JE cont224
RET
cont224:
MOVW $(53069), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|49152), R9
CMPW R8, R9
JE cont225
RET
cont225:
MOVW $(38066), R8
MOVW $(DUPOK|NOPTR|WRAPPER|REFLECTMETHOD|36992), R9
CMPW R8, R9
JE cont226
RET
cont226:
MOVW $(44495), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|41088), R9
CMPW R8, R9
JE cont227
RET
cont227:
MOVW $(6803), R8
MOVW $(NOPROF|DUPOK|NOPTR|NOFRAME|TOPFRAME|4224), R9
CMPW R8, R9
JE cont228
RET
cont228:
MOVW $(55762), R8
MOVW $(DUPOK|NOPTR|NEEDCTXT|TLSBSS|TOPFRAME|53376), R9
CMPW R8, R9
JE cont229
RET
cont229:
MOVW $(15107), R8
MOVW $(NOPROF|DUPOK|TLSBSS|NOFRAME|TOPFRAME|12288), R9
CMPW R8, R9
JE cont230
RET
cont230:
MOVW $(5627), R8
MOVW $(NOPROF|DUPOK|RODATA|NOPTR|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|4224), R9
CMPW R8, R9
JE cont231
RET
cont231:
MOVW $(54765), R8
MOVW $(NOPROF|NOSPLIT|RODATA|WRAPPER|NEEDCTXT|TLSBSS|REFLECTMETHOD|53376), R9
CMPW R8, R9
JE cont232
RET
cont232:
MOVW $(47039), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|NOFRAME|REFLECTMETHOD|45184), R9
CMPW R8, R9
JE cont233
RET
cont233:
MOVW $(5744), R8
MOVW $(NOPTR|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|4096), R9
CMPW R8, R9
JE cont234
RET
cont234:
MOVW $(63077), R8
MOVW $(NOPROF|NOSPLIT|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|61440), R9
CMPW R8, R9
JE cont235
RET
cont235:
MOVW $(44830), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|40960), R9
CMPW R8, R9
JE cont236
RET
cont236:
MOVW $(50793), R8
MOVW $(NOPROF|RODATA|WRAPPER|NEEDCTXT|NOFRAME|REFLECTMETHOD|49152), R9
CMPW R8, R9
JE cont237
RET
cont237:
MOVW $(62429), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|61568), R9
CMPW R8, R9
JE cont238
RET
cont238:
MOVW $(10269), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|TOPFRAME|8192), R9
CMPW R8, R9
JE cont239
RET
cont239:
MOVW $(15747), R8
MOVW $(NOPROF|DUPOK|TLSBSS|REFLECTMETHOD|TOPFRAME|12416), R9
CMPW R8, R9
JE cont240
RET
cont240:
MOVW $(28207), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|RODATA|WRAPPER|NOFRAME|REFLECTMETHOD|TOPFRAME|24576), R9
CMPW R8, R9
JE cont241
RET
cont241:
MOVW $(43069), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NOPTR|WRAPPER|TOPFRAME|40960), R9
CMPW R8, R9
JE cont242
RET
cont242:
MOVW $(44339), R8
MOVW $(NOPROF|DUPOK|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|TOPFRAME|40960), R9
CMPW R8, R9
JE cont243
RET
cont243:
MOVW $(54030), R8
MOVW $(DUPOK|NOSPLIT|RODATA|TLSBSS|NOFRAME|53248), R9
CMPW R8, R9
JE cont244
RET
cont244:
MOVW $(29157), R8
MOVW $(NOPROF|NOSPLIT|WRAPPER|NEEDCTXT|TLSBSS|28800), R9
CMPW R8, R9
JE cont245
RET
cont245:
MOVW $(51587), R8
MOVW $(NOPROF|DUPOK|TLSBSS|TOPFRAME|49280), R9
CMPW R8, R9
JE cont246
RET
cont246:
MOVW $(50000), R8
MOVW $(NOPTR|NEEDCTXT|TLSBSS|NOFRAME|49152), R9
CMPW R8, R9
JE cont247
RET
cont247:
MOVW $(36173), R8
MOVW $(NOPROF|NOSPLIT|RODATA|NEEDCTXT|TLSBSS|REFLECTMETHOD|TOPFRAME|32768), R9
CMPW R8, R9
JE cont248
RET
cont248:
MOVW $(7129), R8
MOVW $(NOPROF|RODATA|NOPTR|NEEDCTXT|TLSBSS|NOFRAME|TOPFRAME|4224), R9
CMPW R8, R9
JE cont249
RET
cont249:
MOVW $(56766), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NOPTR|WRAPPER|TLSBSS|REFLECTMETHOD|TOPFRAME|53376), R9
CMPW R8, R9
JE cont250
RET
cont250:
MOVW $(52992), R8
MOVW $(TLSBSS|NOFRAME|REFLECTMETHOD|TOPFRAME|49152), R9
CMPW R8, R9
JE cont251
RET
cont251:
MOVW $(17479), R8
MOVW $(NOPROF|DUPOK|NOSPLIT|NEEDCTXT|REFLECTMETHOD|16384), R9
CMPW R8, R9
JE cont252
RET
cont252:
MOVW $(46670), R8
MOVW $(DUPOK|NOSPLIT|RODATA|NEEDCTXT|NOFRAME|REFLECTMETHOD|45056), R9
CMPW R8, R9
JE cont253
RET
cont253:
MOVW $(62257), R8
MOVW $(NOPROF|NOPTR|WRAPPER|TLSBSS|NOFRAME|61440), R9
CMPW R8, R9
JE cont254
RET
cont254:
MOVW $(18521), R8
MOVW $(NOPROF|RODATA|NOPTR|NEEDCTXT|TOPFRAME|16384), R9
CMPW R8, R9
JE cont255
RET
cont255:
MOVB $1, ret+0(FP)
RET
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/ 0000775 0000000 0000000 00000000000 14370657153 0022711 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/config.go 0000664 0000000 0000000 00000023765 14370657153 0024522 0 ustar 00root root 0000000 0000000 // Package thirdparty executes integration tests based on third-party projects that use avo.
package thirdparty
import (
"encoding/json"
"errors"
"fmt"
"io"
"os"
"path"
"path/filepath"
"sort"
"strings"
"time"
)
// GithubRepository specifies a repository on github.
type GithubRepository struct {
Owner string `json:"owner"`
Name string `json:"name"`
}
func (r GithubRepository) String() string {
return path.Join(r.Owner, r.Name)
}
// URL returns the Github repository URL.
func (r GithubRepository) URL() string {
return fmt.Sprintf("https://github.com/%s", r)
}
// CloneURL returns the git clone URL.
func (r GithubRepository) CloneURL() string {
return fmt.Sprintf("https://github.com/%s.git", r)
}
// Metadata about the repository.
type Metadata struct {
// Repository description.
Description string `json:"description,omitempty"`
// Homepage URL. Not the same as the Github page.
Homepage string `json:"homepage,omitempty"`
// Number of Github stars.
Stars int `json:"stars,omitempty"`
}
// Project defines an integration test based on a third-party project using avo.
type Project struct {
// Repository for the project. At the moment, all projects are available on
// github.
Repository GithubRepository `json:"repository"`
// Repository metadata.
Metadata Metadata `json:"metadata"`
// Default git branch. This is used when testing against the latest version.
DefaultBranch string `json:"default_branch,omitempty"`
// Version as a git sha, tag or branch.
Version string `json:"version"`
// If the project test has a known problem, record it by setting this to a
// non-zero avo issue number. If set, the project will be skipped in
// testing.
KnownIssue int `json:"known_issue,omitempty"`
// Packages within the project to test.
Packages []*Package `json:"packages"`
}
func (p *Project) defaults(set bool) {
for _, pkg := range p.Packages {
pkg.defaults(set)
}
}
// Validate project definition.
func (p *Project) Validate() error {
if p.DefaultBranch == "" {
return errors.New("missing default branch")
}
if p.Version == "" {
return errors.New("missing version")
}
if len(p.Packages) == 0 {
return errors.New("missing packages")
}
for _, pkg := range p.Packages {
if err := pkg.Validate(); err != nil {
return fmt.Errorf("package %s: %w", pkg.Name(), err)
}
}
return nil
}
// ID returns an identifier for the project.
func (p *Project) ID() string {
return strings.ReplaceAll(p.Repository.String(), "/", "-")
}
// Skip reports whether the project test should be skipped. If skipped, a known
// issue will be set.
func (p *Project) Skip() bool {
return p.KnownIssue != 0
}
// Reason returns the reason why the test is skipped.
func (p *Project) Reason() string {
return fmt.Sprintf("https://github.com/mmcloughlin/avo/issues/%d", p.KnownIssue)
}
// Step represents a set of commands to run as part of the testing plan for a
// third-party package.
type Step struct {
Name string `json:"name,omitempty"`
WorkingDirectory string `json:"dir,omitempty"`
Commands []string `json:"commands"`
}
// Validate step parameters.
func (s *Step) Validate() error {
if s.Name == "" {
return errors.New("missing name")
}
if len(s.Commands) == 0 {
return errors.New("missing commands")
}
return nil
}
// Package defines an integration test for a package within a project.
type Package struct {
// Sub-package within the project under test. All file path references will
// be relative to this directory. If empty the root of the repository is
// used.
SubPackage string `json:"pkg,omitempty"`
// Path to the module file for the avo generator package. This is necessary
// so the integration test can insert replace directives to point at the avo
// version under test.
Module string `json:"module"`
// Setup steps. These run prior to the insertion of avo replace directives,
// therefore should be used if it's necessary to initialize new go modules
// within the repository.
Setup []*Step `json:"setup,omitempty"`
// Steps to run the avo code generator.
Generate []*Step `json:"generate"`
// Test steps. If empty, defaults to "go test ./...".
Test []*Step `json:"test,omitempty"`
}
// defaults sets or removes default field values.
func (p *Package) defaults(set bool) {
for _, stage := range []struct {
Steps []*Step
DefaultName string
}{
{p.Setup, "Setup"},
{p.Generate, "Generate"},
{p.Test, "Test"},
} {
if len(stage.Steps) == 1 {
stage.Steps[0].Name = applydefault(set, stage.Steps[0].Name, stage.DefaultName)
}
}
}
func applydefault(set bool, s, def string) string {
switch {
case set && s == "":
return def
case !set && s == def:
return ""
default:
return s
}
}
// Validate package definition.
func (p *Package) Validate() error {
if p.Module == "" {
return errors.New("missing module")
}
if len(p.Generate) == 0 {
return errors.New("no generate commands")
}
stages := map[string][]*Step{
"setup": p.Setup,
"generate": p.Generate,
"test": p.Test,
}
for name, steps := range stages {
for _, s := range steps {
if err := s.Validate(); err != nil {
return fmt.Errorf("%s step: %w", name, err)
}
}
}
return nil
}
// Name of the package.
func (p *Package) Name() string {
if p.IsRoot() {
return "root"
}
return p.SubPackage
}
// IsRoot reports whether the package is the root of the containing project.
func (p *Package) IsRoot() bool {
return p.SubPackage == ""
}
// Context specifies execution environment parameters for a third-party test.
type Context struct {
// Path to the avo version under test.
AvoDirectory string
// Path to the checked out third-party repository.
RepositoryDirectory string
}
// Steps generates the list of steps required to execute the integration test
// for this package. Context specifies execution environment parameters.
func (p *Package) Steps(c *Context) []*Step {
var steps []*Step
// Optional setup.
steps = append(steps, p.Setup...)
// Replace avo dependency.
const invalid = "v0.0.0-00010101000000-000000000000"
moddir := filepath.Dir(p.Module)
modfile := filepath.Base(p.Module)
steps = append(steps, &Step{
Name: "Avo Module Replacement",
WorkingDirectory: moddir,
Commands: []string{
"go mod edit -modfile=" + modfile + " -require=github.com/mmcloughlin/avo@" + invalid,
"go mod edit -modfile=" + modfile + " -replace=github.com/mmcloughlin/avo=" + c.AvoDirectory,
"go mod tidy -modfile=" + modfile,
},
})
// Run generation.
steps = append(steps, p.Generate...)
// Display changes.
steps = append(steps, &Step{
Name: "Diff",
Commands: []string{"git diff"},
})
// Tests.
if len(p.Test) > 0 {
steps = append(steps, p.Test...)
} else {
steps = append(steps, &Step{
Name: "Test",
Commands: []string{
"go test ./...",
},
})
}
// Prepend sub-directory to every step.
if p.SubPackage != "" {
for _, s := range steps {
s.WorkingDirectory = filepath.Join(p.SubPackage, s.WorkingDirectory)
}
}
return steps
}
// Test case for a given package within a project.
type Test struct {
Project *Project
Package *Package
}
// ID returns an identifier for the test case.
func (t *Test) ID() string {
pkgpath := path.Join(t.Project.Repository.String(), t.Package.SubPackage)
return strings.ReplaceAll(pkgpath, "/", "-")
}
// Projects is a collection of third-party integration tests.
type Projects []*Project
func (p Projects) defaults(set bool) {
for _, prj := range p {
prj.defaults(set)
}
}
// Validate the project collection.
func (p Projects) Validate() error {
seen := map[string]bool{}
for _, prj := range p {
// Project is valid.
if err := prj.Validate(); err != nil {
return fmt.Errorf("project %s: %w", prj.ID(), err)
}
// No duplicate entries.
id := prj.ID()
if seen[id] {
return fmt.Errorf("duplicate project %q", id)
}
seen[id] = true
}
return nil
}
// Tests returns all test cases for the projects collection.
func (p Projects) Tests() []*Test {
var ts []*Test
for _, prj := range p {
for _, pkg := range prj.Packages {
ts = append(ts, &Test{
Project: prj,
Package: pkg,
})
}
}
return ts
}
// Ranked returns a copy of the projects list ranked in desending order of
// popularity.
func (p Projects) Ranked() Projects {
ranked := append(Projects(nil), p...)
sort.SliceStable(ranked, func(i, j int) bool {
return ranked[i].Metadata.Stars > ranked[j].Metadata.Stars
})
return ranked
}
// Top returns the top n most popular projects.
func (p Projects) Top(n int) Projects {
top := p.Ranked()
if len(top) > n {
top = top[:n]
}
return top
}
// Suite defines a third-party test suite.
type Suite struct {
// Projects to test.
Projects Projects `json:"projects"`
// Time of the last update to project metadata.
MetadataLastUpdate time.Time `json:"metadata_last_update"`
}
func (s *Suite) defaults(set bool) {
s.Projects.defaults(set)
}
// Validate the test suite.
func (s *Suite) Validate() error {
if s.MetadataLastUpdate.IsZero() {
return errors.New("empty metadata update time")
}
if s.MetadataLastUpdate.Location() != time.UTC {
return errors.New("metadata update time not in UTC")
}
if err := s.Projects.Validate(); err != nil {
return err
}
return nil
}
// LoadSuite loads a test suite from JSON format.
func LoadSuite(r io.Reader) (*Suite, error) {
var s *Suite
d := json.NewDecoder(r)
d.DisallowUnknownFields()
if err := d.Decode(&s); err != nil {
return nil, err
}
s.defaults(true)
return s, nil
}
// LoadSuiteFile loads a test suite from a JSON file.
func LoadSuiteFile(filename string) (*Suite, error) {
f, err := os.Open(filename)
if err != nil {
return nil, err
}
defer f.Close()
return LoadSuite(f)
}
// StoreSuite writes a test suite in JSON format.
func StoreSuite(w io.Writer, s *Suite) error {
e := json.NewEncoder(w)
e.SetIndent("", " ")
s.defaults(false)
err := e.Encode(s)
s.defaults(true)
return err
}
// StoreSuiteFile writes a test suite to a JSON file.
func StoreSuiteFile(filename string, s *Suite) error {
f, err := os.Create(filename)
if err != nil {
return err
}
defer f.Close()
return StoreSuite(f, s)
}
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/config_test.go 0000664 0000000 0000000 00000007551 14370657153 0025554 0 ustar 00root root 0000000 0000000 package thirdparty
import (
"bytes"
"reflect"
"strings"
"testing"
)
func TestValidateErrors(t *testing.T) {
cases := []struct {
Name string
Item interface{ Validate() error }
ErrorSubstring string
}{
{
Name: "step_missing_name",
Item: &Step{},
ErrorSubstring: "missing name",
},
{
Name: "step_missing_commands",
Item: &Step{
Name: "Setup",
},
ErrorSubstring: "missing commands",
},
{
Name: "project_missing_default_branch",
Item: &Project{
Repository: GithubRepository{Owner: "octocat", Name: "hello-world"},
},
ErrorSubstring: "missing default branch",
},
{
Name: "project_missing_version",
Item: &Project{
Repository: GithubRepository{Owner: "octocat", Name: "hello-world"},
DefaultBranch: "main",
},
ErrorSubstring: "missing version",
},
{
Name: "project_missing_packages",
Item: &Project{
Repository: GithubRepository{Owner: "octocat", Name: "hello-world"},
DefaultBranch: "main",
Version: "v0.1.1",
},
ErrorSubstring: "missing packages",
},
{
Name: "project_package_error",
Item: &Project{
Repository: GithubRepository{Owner: "octocat", Name: "hello-world"},
DefaultBranch: "main",
Version: "v0.1.1",
Packages: []*Package{
{},
},
},
ErrorSubstring: "package root: missing module",
},
{
Name: "package_missing_module",
Item: &Package{},
ErrorSubstring: "missing module",
},
{
Name: "package_no_generate_commands",
Item: &Package{
Module: "avo/go.mod",
},
ErrorSubstring: "no generate commands",
},
{
Name: "package_invalid_generate_commands",
Item: &Package{
Module: "avo/go.mod",
Generate: []*Step{
{},
},
},
ErrorSubstring: "generate step: missing name",
},
{
Name: "projects_invalid_package",
Item: Projects{
{
Repository: GithubRepository{Owner: "octocat", Name: "hello-world"},
},
},
ErrorSubstring: "missing default branch",
},
}
for _, c := range cases {
c := c // scopelint
t.Run(c.Name, func(t *testing.T) {
err := c.Item.Validate()
if err == nil {
t.Fatal("expected error; got nil")
}
if !strings.Contains(err.Error(), c.ErrorSubstring) {
t.Fatalf("expected error message to contain %q; got %q", c.ErrorSubstring, err)
}
})
}
}
func TestLoadSuiteBad(t *testing.T) {
r := strings.NewReader(`[{"unknown_field": "value"}]`)
_, err := LoadSuite(r)
if err == nil {
t.Fatal("expected non-nil error")
}
}
func TestLoadSuiteFileNotExist(t *testing.T) {
s, err := LoadSuiteFile("does_not_exist")
if s != nil {
t.Fatal("expected nil return")
}
if err == nil {
t.Fatal("expected non-nil error")
}
}
func TestSuiteFileValid(t *testing.T) {
s, err := LoadSuiteFile("suite.json")
if err != nil {
t.Fatal(err)
}
for _, prj := range s.Projects {
t.Logf("read: %s", prj.ID())
}
if len(s.Projects) == 0 {
t.Fatal("no packages loaded")
}
if err := s.Validate(); err != nil {
t.Fatal(err)
}
}
func TestSuiteFileStepsValid(t *testing.T) {
suite, err := LoadSuiteFile("suite.json")
if err != nil {
t.Fatal(err)
}
c := &Context{
AvoDirectory: "avo",
RepositoryDirectory: "repo",
}
for _, prj := range suite.Projects {
for _, pkg := range prj.Packages {
for _, s := range pkg.Steps(c) {
if err := s.Validate(); err != nil {
t.Errorf("project %s: package %s: %s", prj.ID(), pkg.Name(), err)
}
}
}
}
}
func TestSuiteFileRoundtrip(t *testing.T) {
s, err := LoadSuiteFile("suite.json")
if err != nil {
t.Fatal(err)
}
// Write and read back.
buf := bytes.NewBuffer(nil)
if err := StoreSuite(buf, s); err != nil {
t.Fatal(err)
}
roundtrip, err := LoadSuite(buf)
if err != nil {
t.Fatal(err)
}
// Should be identical.
if !reflect.DeepEqual(s, roundtrip) {
t.Fatal("roundtrip mismatch")
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/make_workflow.go 0000664 0000000 0000000 00000006277 14370657153 0026123 0 ustar 00root root 0000000 0000000 //go:build ignore
// +build ignore
package main
import (
"flag"
"log"
"os"
"path"
"path/filepath"
"runtime"
"github.com/mmcloughlin/avo/internal/prnt"
"github.com/mmcloughlin/avo/tests/thirdparty"
)
var (
suitefilename = flag.String("suite", "", "third-party test suite configuration")
output = flag.String("output", "", "path to output file (default stdout)")
)
func main() {
if err := mainerr(); err != nil {
log.Fatal(err)
}
}
func mainerr() error {
flag.Parse()
// Read third-party test suite.
suite, err := thirdparty.LoadSuiteFile(*suitefilename)
if err != nil {
return err
}
if err := suite.Validate(); err != nil {
return err
}
// Determine output.
w := os.Stdout
if *output != "" {
f, err := os.Create(*output)
if err != nil {
return err
}
defer f.Close()
w = f
}
// Generate workflow file.
b, err := GenerateWorkflow(suite)
if err != nil {
return err
}
// Write output.
if _, err := w.Write(b); err != nil {
return err
}
return nil
}
func GenerateWorkflow(s *thirdparty.Suite) ([]byte, error) {
g := &prnt.Generator{}
g.SetIndentString(" ")
_, self, _, _ := runtime.Caller(0)
g.Linef("# Code generated by %s. DO NOT EDIT.", filepath.Base(self))
g.NL()
// Header.
g.Linef("name: packages")
g.Linef("permissions:")
g.Linef(" contents: read")
g.Linef("on:")
g.Linef(" push:")
g.Linef(" branches:")
g.Linef(" - master")
g.Linef(" pull_request:")
// One job per test case.
g.Linef("jobs:")
g.Indent()
for _, t := range s.Projects.Tests() {
g.Linef("%s:", t.ID())
g.Indent()
g.Linef("runs-on: ubuntu-latest")
if t.Project.Skip() {
g.Linef("if: false # skip: %s", t.Project.Reason())
}
g.Linef("steps:")
g.Indent()
// Install Go.
g.Linef("- name: Install Go")
g.Linef(" uses: actions/setup-go@c4a742cab115ed795e34d4513e2cf7d472deb55f # v3.3.1")
g.Linef(" with:")
g.Linef(" go-version: 1.19.x")
g.Linef(" check-latest: true")
// Checkout avo.
avodir := "avo"
g.Linef("- name: Checkout avo")
g.Linef(" uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0")
g.Linef(" with:")
g.Linef(" path: %s", avodir)
g.Linef(" persist-credentials: false")
// Checkout the third-party package.
pkgdir := t.Project.Repository.Name
g.Linef("- name: Checkout %s", t.Project.Repository)
g.Linef(" uses: actions/checkout@93ea575cb5d8a053eaa0ac8fa3b40d7e05a33cc8 # v3.1.0")
g.Linef(" with:")
g.Linef(" repository: %s", t.Project.Repository)
g.Linef(" ref: %s", t.Project.Version)
g.Linef(" path: %s", pkgdir)
g.Linef(" persist-credentials: false")
// Build steps.
c := &thirdparty.Context{
AvoDirectory: path.Join("${{ github.workspace }}", avodir),
RepositoryDirectory: path.Join("${{ github.workspace }}", pkgdir),
}
for _, step := range t.Package.Steps(c) {
g.Linef("- name: %s", step.Name)
g.Linef(" working-directory: %s", path.Join(pkgdir, step.WorkingDirectory))
if len(step.Commands) == 1 {
g.Linef(" run: %s", step.Commands[0])
} else {
g.Linef(" run: |")
for _, cmd := range step.Commands {
g.Linef(" %s", cmd)
}
}
}
g.Dedent()
g.Dedent()
}
g.Dedent()
return g.Result()
}
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/metadata_test.go 0000664 0000000 0000000 00000004235 14370657153 0026063 0 ustar 00root root 0000000 0000000 package thirdparty
import (
"context"
"flag"
"testing"
"time"
"github.com/mmcloughlin/avo/internal/github"
"github.com/mmcloughlin/avo/internal/test"
)
var update = flag.Bool("update", false, "update project metadata")
func TestSuiteFileMetadata(t *testing.T) {
test.RequiresNetwork(t)
ctx := context.Background()
s, err := LoadSuiteFile("suite.json")
if err != nil {
t.Fatal(err)
}
g := github.NewClient(github.WithTokenFromEnvironment())
for _, prj := range s.Projects {
// Fetch metadata.
r, err := g.Repository(ctx, prj.Repository.Owner, prj.Repository.Name)
if err != nil {
t.Fatal(err)
}
// Update, if requested.
if *update {
prj.DefaultBranch = r.DefaultBranch
prj.Metadata.Description = r.Description
prj.Metadata.Homepage = r.Homepage
prj.Metadata.Stars = r.StargazersCount
t.Logf("%s: metadata updated", prj.ID())
}
// Check up to date. Potentially fast-changing properties not included.
uptodate := true
uptodate = prj.DefaultBranch == r.DefaultBranch && uptodate
uptodate = prj.Metadata.Description == r.Description && uptodate
uptodate = prj.Metadata.Homepage == r.Homepage && uptodate
if !uptodate {
t.Errorf("%s: metadata out of date (use -update flag to fix)", prj.ID())
}
}
if *update {
s.MetadataLastUpdate = time.Now().UTC()
}
if err := StoreSuiteFile("suite.json", s); err != nil {
t.Fatal(err)
}
}
func TestSuiteFileKnownIssues(t *testing.T) {
test.RequiresNetwork(t)
ctx := context.Background()
s, err := LoadSuiteFile("suite.json")
if err != nil {
t.Fatal(err)
}
g := github.NewClient(github.WithTokenFromEnvironment())
for _, prj := range s.Projects {
// Skipped packages must refer to an open issue.
if !prj.Skip() {
continue
}
if prj.KnownIssue == 0 {
t.Errorf("%s: skipped package must refer to known issue", prj.ID())
}
issue, err := g.Issue(ctx, "mmcloughlin", "avo", prj.KnownIssue)
if err != nil {
t.Fatal(err)
}
if issue.State != "open" {
t.Errorf("%s: known issue in %s state", prj.ID(), issue.State)
}
if prj.Reason() != issue.HTMLURL {
t.Errorf("%s: expected skip reason to be the issue url %s", prj.ID(), issue.HTMLURL)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/packages_test.go 0000664 0000000 0000000 00000005273 14370657153 0026064 0 ustar 00root root 0000000 0000000 package thirdparty
import (
"flag"
"os/exec"
"path/filepath"
"runtime"
"testing"
"github.com/mmcloughlin/avo/internal/test"
)
//go:generate go run make_workflow.go -suite suite.json -output ../../.github/workflows/packages.yml
// Custom flags.
var (
suitefilename = flag.String("suite", "", "projects configuration")
preserve = flag.Bool("preserve", false, "preserve working directories")
latest = flag.Bool("latest", false, "use latest versions of each project")
)
// TestPackages runs integration tests on all packages specified by projects
// file given on the command line.
func TestPackages(t *testing.T) {
// Load suite.
if *suitefilename == "" {
t.Skip("no suite specified")
}
s, err := LoadSuiteFile(*suitefilename)
if err != nil {
t.Fatal(err)
}
for _, tst := range s.Projects.Tests() {
tst := tst // scopelint
t.Run(tst.ID(), func(t *testing.T) {
if tst.Project.Skip() {
t.Skipf("skip: %s", tst.Project.Reason())
}
dir, clean := test.TempDir(t)
if !*preserve {
defer clean()
} else {
t.Logf("working directory: %s", dir)
}
pt := PackageTest{
T: t,
Test: tst,
WorkDir: dir,
Latest: *latest,
}
pt.Run()
})
}
}
// PackageTest executes an integration test based on a given third-party package.
type PackageTest struct {
*testing.T
*Test
WorkDir string // working directory for the test
Latest bool // use latest version of the project
repopath string // path the repo is cloned to
}
// Run the test.
func (t *PackageTest) Run() {
t.checkout()
t.steps()
}
// checkout the code at the specified version.
func (t *PackageTest) checkout() {
// Determine the version we want to checkout.
version := t.Project.Version
if t.Latest {
version = t.Project.DefaultBranch
}
// Clone. Use a shallow clone to speed up large repositories.
t.repopath = filepath.Join(t.WorkDir, t.Name())
test.Exec(t.T, "git", "init", t.repopath)
test.Exec(t.T, "git", "-C", t.repopath, "remote", "add", "origin", t.Project.Repository.CloneURL())
test.Exec(t.T, "git", "-C", t.repopath, "fetch", "--depth=1", "origin", version)
test.Exec(t.T, "git", "-C", t.repopath, "checkout", "FETCH_HEAD")
}
func (t *PackageTest) steps() {
// Determine the path to avo.
_, self, _, ok := runtime.Caller(1)
if !ok {
t.Fatal("failed to determine path to avo")
}
avodir := filepath.Join(filepath.Dir(self), "..", "..")
// Run steps.
c := &Context{
AvoDirectory: avodir,
RepositoryDirectory: t.repopath,
}
for _, s := range t.Package.Steps(c) {
for _, command := range s.Commands {
cmd := exec.Command("sh", "-c", command)
cmd.Dir = filepath.Join(t.repopath, s.WorkingDirectory)
test.ExecCommand(t.T, cmd)
}
}
}
golang-github-mmcloughlin-avo-0.5.0/tests/thirdparty/suite.json 0000664 0000000 0000000 00000073053 14370657153 0024745 0 ustar 00root root 0000000 0000000 {
"projects": [
{
"repository": {
"owner": "zeebo",
"name": "xxh3"
},
"metadata": {
"description": "XXH3 algorithm in Go",
"stars": 290
},
"default_branch": "master",
"version": "v1.0.0-rc1",
"packages": [
{
"module": "avo/go.mod",
"generate": [
{
"dir": "avo",
"commands": [
"go run . -avx -out ../accum_vector_avx_amd64.s",
"go run . -sse -out ../accum_vector_sse_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "dgryski",
"name": "go-sip13"
},
"metadata": {
"description": "siphash 1-3",
"stars": 33
},
"default_branch": "master",
"version": "62edffca92457b3a66125c686137cc5f0fe81672",
"packages": [
{
"module": "_avo/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod init github.com/dgryski/go-sip13"
]
},
{
"name": "Setup Generator Module",
"dir": "_avo",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/dgryski/go-sip13/_avo"
]
}
],
"generate": [
{
"dir": "_avo",
"commands": [
"go mod edit -modfile=go.mod -require=github.com/dgryski/go-sip13@v0.0.0-00010101000000-000000000000",
"go mod edit -modfile=go.mod -replace=github.com/dgryski/go-sip13=../",
"go run . -out ../sip13_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "phoreproject",
"name": "bls"
},
"metadata": {
"description": "Go implementation of the BLS12-381 pairing",
"stars": 86
},
"default_branch": "master",
"version": "a88a5ae26844d7293359422888d7c7f69f43c845",
"packages": [
{
"module": "asm/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod tidy"
]
},
{
"name": "Setup Generator Module",
"dir": "asm",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/phoreproject/bls/asm"
]
}
],
"generate": [
{
"dir": "asm",
"commands": [
"go mod edit -modfile=go.mod -require=github.com/phoreproject/bls@v0.0.0-00010101000000-000000000000",
"go mod edit -modfile=go.mod -replace=github.com/phoreproject/bls=../",
"go mod download",
"go run . -out ../primitivefuncs_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "minio",
"name": "md5-simd"
},
"metadata": {
"description": "Accelerate aggregated MD5 hashing performance up to 8x for AVX512 and 4x for AVX2. Useful for server applications that need to compute many MD5 sums in parallel.",
"stars": 125
},
"default_branch": "master",
"version": "30ad8af83f6868c2a30c615f3edf1a9366bf3f89",
"packages": [
{
"module": "_gen/go.mod",
"generate": [
{
"dir": "_gen",
"commands": [
"go run gen.go -out ../md5block_amd64.s -stubs ../md5block_amd64.go -pkg md5simd"
]
}
]
}
]
},
{
"repository": {
"owner": "zeebo",
"name": "blake3"
},
"metadata": {
"description": "Pure Go implementation of BLAKE3 with AVX2 and SSE4.1 acceleration",
"stars": 322
},
"default_branch": "master",
"version": "25dba572f0e78ec108f0dd79c9c15288f542d7d9",
"packages": [
{
"module": "avo/go.mod",
"generate": [
{
"dir": "avo",
"commands": [
"go run ./avx2 -out ../avx2/impl.s",
"go run ./sse41 -out ../sse41/impl.s"
]
}
]
}
]
},
{
"repository": {
"owner": "klauspost",
"name": "reedsolomon"
},
"metadata": {
"description": "Reed-Solomon Erasure Coding in Go",
"stars": 1571
},
"default_branch": "master",
"version": "922778284547557265cff0f903ab5f4c27e40ae9",
"packages": [
{
"module": "_gen/go.mod",
"generate": [
{
"dir": "_gen",
"commands": [
"go run gen.go -out ../galois_gen_amd64.s -stubs ../galois_gen_amd64.go -pkg reedsolomon"
]
}
]
}
]
},
{
"repository": {
"owner": "orisano",
"name": "wyhash"
},
"metadata": {
"description": "A pure-Go wyhash implementation.",
"stars": 25
},
"default_branch": "master",
"version": "32a3f7f6ba4797e2d87dab2969cc9dd63d39cce9",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"go mod init github.com/orisano/wyhash/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go run gen.go -out ../blocks_amd64.s -stubs ../blocks_amd64.go -pkg wyhash"
]
}
]
}
]
},
{
"repository": {
"owner": "klauspost",
"name": "compress"
},
"metadata": {
"description": "Optimized Go Compression Packages",
"stars": 3353
},
"default_branch": "master",
"version": "2f236383d7c2faa8ef7e354ccecb926a5b47a24d",
"packages": [
{
"pkg": "s2",
"module": "_generate/go.mod",
"generate": [
{
"dir": "_generate",
"commands": [
"go generate -v -x"
]
}
]
},
{
"pkg": "zstd",
"module": "_generate/go.mod",
"generate": [
{
"dir": "_generate",
"commands": [
"go generate -v -x"
]
}
],
"test": [
{
"commands": [
"go test -short"
]
}
]
}
]
},
{
"repository": {
"owner": "dgryski",
"name": "go-bloomindex"
},
"metadata": {
"description": "Bloom-filter based search index",
"stars": 114
},
"default_branch": "master",
"version": "0902316dce158c154b958ee5cfc706c62af29a42",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod init github.com/dgryski/go-bloomindex",
"go get github.com/dgryski/go-bits@v0.0.0-20180113010104-bd8a69a71dc2"
]
},
{
"name": "Create Generator Module",
"commands": [
"mkdir avo",
"git mv asm.go avo"
]
},
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/dgryski/go-bloomindex/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go run asm.go -out ../query_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "dgryski",
"name": "go-marvin32"
},
"metadata": {
"description": "Assembly-optimized Marvin32 hash function",
"stars": 14
},
"default_branch": "master",
"version": "7d18f4c6ea7c24b29d1c7a670f8ae40b0812f2e3",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod init github.com/dgryski/go-marvin32"
]
},
{
"name": "Create Generator Module",
"commands": [
"mkdir avo",
"git mv asm.go avo"
]
},
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/dgryski/go-marvin32/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go mod edit -modfile=go.mod -require=github.com/dgryski/go-marvin32@v0.0.0-00010101000000-000000000000",
"go mod edit -modfile=go.mod -replace=github.com/dgryski/go-marvin32=../",
"go run asm.go -out ../marvin_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "dgryski",
"name": "go-speck"
},
"metadata": {
"description": "SPECK cipher",
"stars": 10
},
"default_branch": "master",
"version": "5b36d4c08d8840c352a153bf37281434ad550ec0",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod init github.com/dgryski/go-speck",
"go get github.com/dgryski/go-skipjack@v0.0.0-20150401095227-f3a984a142ab"
]
},
{
"name": "Create Generator Module",
"commands": [
"mkdir avo",
"git mv asm.go avo"
]
},
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/dgryski/go-speck/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go mod edit -modfile=go.mod -require=github.com/dgryski/go-speck@v0.0.0-00010101000000-000000000000",
"go mod edit -modfile=go.mod -replace=github.com/dgryski/go-speck=../",
"go run asm.go -out ../speck_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "dgryski",
"name": "go-chaskey"
},
"metadata": {
"description": "go-chaskey: an implementation of chaskey, an efficient MAC for microcontrollers",
"stars": 8
},
"default_branch": "master",
"version": "ba454392bc5ab6daae103e15147185f8f4a27dcc",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Root Module",
"commands": [
"go mod init github.com/dgryski/go-chaskey",
"go get github.com/dchest/siphash@v1.2.2"
]
},
{
"name": "Create Generator Module",
"commands": [
"mkdir avo",
"git mv asm.go avo"
]
},
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/+build ignore/d' asm.go",
"go mod init github.com/dgryski/go-chaskey/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go mod edit -modfile=go.mod -require=github.com/dgryski/go-chaskey@v0.0.0-00010101000000-000000000000",
"go mod edit -modfile=go.mod -replace=github.com/dgryski/go-chaskey=../",
"go run asm.go -out ../core_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "lukechampine",
"name": "us"
},
"metadata": {
"description": "An alternative interface to Sia",
"stars": 53
},
"default_branch": "master",
"version": "dff56a80f83653cb14eeeb57ba6ba3c3e942c412",
"packages": [
{
"pkg": "merkle/blake2b",
"module": "avo/go.mod",
"setup": [
{
"name": "Create Generator Module",
"commands": [
"mkdir avo",
"git mv gen.go avo"
]
},
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/+build ignore/d' gen.go",
"go mod init github.com/lukechampine/us/merkle/blake2b/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go run gen.go -out ../blake2b_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "segmentio",
"name": "asm"
},
"metadata": {
"description": "Go library providing algorithms optimized to leverage the characteristics of modern CPUs",
"stars": 776
},
"default_branch": "main",
"version": "2bf3fdd47b1cdbe8fe020f032caf14891e10a85f",
"packages": [
{
"module": "build/go.mod",
"generate": [
{
"commands": [
"make --always-make build"
]
}
]
}
]
},
{
"repository": {
"owner": "ericlagergren",
"name": "lwcrypto"
},
"metadata": {
"description": "NIST Lightweight Cryptography finalists",
"stars": 5
},
"default_branch": "main",
"version": "0c42b05eddc34c58bf8e0cd4250c5cd2c256ea57",
"packages": [
{
"pkg": "ascon",
"module": "asm/go.mod",
"generate": [
{
"dir": "asm",
"commands": [
"go mod edit -require=github.com/ericlagergren/lwcrypto@v0.0.0-00010101000000-000000000000",
"go generate -v -x"
]
}
]
},
{
"pkg": "grain",
"module": "asm/go.mod",
"generate": [
{
"dir": "asm",
"commands": [
"go mod edit -require=github.com/ericlagergren/lwcrypto@v0.0.0-00010101000000-000000000000",
"go generate -v -x"
]
}
]
}
]
},
{
"repository": {
"owner": "oasisprotocol",
"name": "curve25519-voi"
},
"metadata": {
"description": "High-performance Curve25519/ristretto255 for Go",
"stars": 53
},
"default_branch": "master",
"version": "d5a936accd94ef9da4c0fe9db0a6342dcdcfeadf",
"packages": [
{
"module": "internal/asm/amd64/go.mod",
"generate": [
{
"dir": "internal/asm/amd64",
"commands": [
"bash -ex gen.sh"
]
}
]
}
]
},
{
"repository": {
"owner": "oasisprotocol",
"name": "deoxysii"
},
"metadata": {
"description": "Go Deoxys-II-256-128",
"stars": 18
},
"default_branch": "master",
"version": "2091330c22b71dd4e04e15306498e68f3a1b3afc",
"packages": [
{
"module": "internal/hardware/asm/go.mod",
"generate": [
{
"dir": "internal/hardware/asm",
"commands": [
"bash -ex gen.sh"
]
}
]
}
]
},
{
"repository": {
"owner": "golang",
"name": "crypto"
},
"metadata": {
"description": "[mirror] Go supplementary cryptography libraries",
"homepage": "https://golang.org/x/crypto",
"stars": 2549
},
"default_branch": "master",
"version": "089bfa5675191fd96a44247682f76ebca03d7916",
"packages": [
{
"pkg": "curve25519",
"module": "internal/field/_asm/go.mod",
"generate": [
{
"dir": "internal/field/_asm",
"commands": [
"go generate -v -x"
]
}
]
}
]
},
{
"repository": {
"owner": "FiloSottile",
"name": "edwards25519"
},
"metadata": {
"description": "filippo.io/edwards25519 — A safer, faster, and more powerful low-level edwards25519 Go implementation.",
"homepage": "https://filippo.io/edwards25519",
"stars": 95
},
"default_branch": "main",
"version": "v1.0.0-rc.1",
"packages": [
{
"module": "field/_asm/go.mod",
"generate": [
{
"dir": "field/_asm",
"commands": [
"go generate -v -x"
]
}
]
}
]
},
{
"repository": {
"owner": "lukechampine",
"name": "blake3"
},
"metadata": {
"description": "A pure-Go implementation of the BLAKE3 cryptographic hash function",
"stars": 288
},
"default_branch": "master",
"version": "v1.1.7",
"packages": [
{
"module": "avo/go.mod",
"setup": [
{
"name": "Setup Generator Module",
"dir": "avo",
"commands": [
"sed -i.bak '/build ignore/d' gen.go",
"go mod init github.com/lukechampine/blake3/avo"
]
}
],
"generate": [
{
"dir": "avo",
"commands": [
"go run gen.go -out ../blake3_amd64.s"
]
}
]
}
]
},
{
"repository": {
"owner": "mmcloughlin",
"name": "md4"
},
"metadata": {
"description": "Assembly-optimized MD4 hash algorithm in Go",
"stars": 15
},
"default_branch": "main",
"version": "v0.1.2",
"packages": [
{
"module": "asm/go.mod",
"generate": [
{
"commands": [
"go generate -v -x"
]
}
]
}
]
},
{
"repository": {
"owner": "golang",
"name": "go"
},
"metadata": {
"description": "The Go programming language",
"homepage": "https://go.dev",
"stars": 106106
},
"default_branch": "master",
"version": "go1.19",
"packages": [
{
"module": "src/crypto/internal/edwards25519/field/_asm/go.mod",
"setup": [
{
"name": "Compile Go Toolchain",
"dir": "src",
"commands": [
"./make.bash"
]
}
],
"generate": [
{
"dir": "src/crypto/internal/edwards25519/field/_asm",
"commands": [
"go generate -v -x"
]
}
],
"test": [
{
"commands": [
"env --unset=GOROOT ./bin/go test crypto/ed25519/..."
]
}
]
}
]
},
{
"repository": {
"owner": "cloudflare",
"name": "circl"
},
"metadata": {
"description": "CIRCL: Cloudflare Interoperable Reusable Cryptographic Library",
"homepage": "http://blog.cloudflare.com/introducing-circl",
"stars": 764
},
"default_branch": "main",
"version": "v1.1.0",
"packages": [
{
"pkg": "sign/dilithium",
"module": "internal/common/asm/go.mod",
"generate": [
{
"dir": "internal/common/asm",
"commands": [
"go generate -v -x"
]
}
]
},
{
"pkg": "pke/kyber",
"module": "internal/common/asm/go.mod",
"generate": [
{
"dir": "internal/common/asm",
"commands": [
"go generate -v -x"
]
}
]
},
{
"pkg": "simd/keccakf1600",
"module": "internal/asm/go.mod",
"generate": [
{
"dir": "internal/asm",
"commands": [
"go generate -v -x"
]
}
]
}
]
}
],
"metadata_last_update": "2022-11-26T22:15:09.329488149Z"
}
golang-github-mmcloughlin-avo-0.5.0/x86/ 0000775 0000000 0000000 00000000000 14370657153 0020002 5 ustar 00root root 0000000 0000000 golang-github-mmcloughlin-avo-0.5.0/x86/doc.go 0000664 0000000 0000000 00000000116 14370657153 0021074 0 ustar 00root root 0000000 0000000 // Package x86 provides constructors for all x86-64 instructions.
package x86
golang-github-mmcloughlin-avo-0.5.0/x86/gen.go 0000664 0000000 0000000 00000000235 14370657153 0021102 0 ustar 00root root 0000000 0000000 package x86
//go:generate avogen -output zoptab.go optab
//go:generate avogen -output zctors.go ctors
//go:generate avogen -output zctors_test.go ctorstest
golang-github-mmcloughlin-avo-0.5.0/x86/inst_test.go 0000664 0000000 0000000 00000006040 14370657153 0022345 0 ustar 00root root 0000000 0000000 package x86
import (
"reflect"
"testing"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
func TestCases(t *testing.T) {
must := MustInstruction(t)
m128 := operand.Mem{Base: reg.RAX}
cases := []struct {
Name string
Instruction *ir.Instruction
Expect *ir.Instruction
}{
// In the merge-masking case, the output register should also be an
// input. This test confirms that Z3 appears in the input operands list.
{
Name: "avx512_masking_merging_input_registers",
Instruction: must(VPADDD(reg.Z1, reg.Z2, reg.K1, reg.Z3)),
Expect: &ir.Instruction{
Opcode: "VPADDD",
Operands: []operand.Op{reg.Z1, reg.Z2, reg.K1, reg.Z3},
Inputs: []operand.Op{reg.Z1, reg.Z2, reg.K1, reg.Z3},
Outputs: []operand.Op{reg.Z3},
ISA: []string{"AVX512F"},
},
},
// In the zeroing-masking case, the output register is not an input.
// This test case is the same as above, but with the zeroing suffix. In
// this case Z3 should not be an input.
{
Name: "avx512_masking_zeroing_input_registers",
Instruction: must(VPADDD_Z(reg.Z1, reg.Z2, reg.K1, reg.Z3)),
Expect: &ir.Instruction{
Opcode: "VPADDD",
Suffixes: []string{"Z"},
Operands: []operand.Op{reg.Z1, reg.Z2, reg.K1, reg.Z3},
Inputs: []operand.Op{reg.Z1, reg.Z2, reg.K1}, // not Z3
Outputs: []operand.Op{reg.Z3},
ISA: []string{"AVX512F"},
},
},
// Many existing AVX instructions gained EVEX-encoded forms when AVX-512
// was added. In a previous broken implementation, this led to multiple
// forms of the same instruction in the database, both the VEX and EVEX
// encoded versions. This causes the computed ISA list to be wrong,
// since it can think AVX-512 is required when in fact the instruction
// existed before. These test cases confirm the correct ISA is selected.
{
Name: "vex_evex_xmm_xmm_xmm",
Instruction: must(VFMADD132PS(reg.X1, reg.X2, reg.X3)),
Expect: &ir.Instruction{
Opcode: "VFMADD132PS",
Operands: []operand.Op{reg.X1, reg.X2, reg.X3},
Inputs: []operand.Op{reg.X1, reg.X2, reg.X3},
Outputs: []operand.Op{reg.X3},
ISA: []string{"FMA3"}, // not AVX512F
},
},
{
Name: "vex_evex_m128_xmm_xmm",
Instruction: must(VFMADD132PS(m128, reg.X2, reg.X3)),
Expect: &ir.Instruction{
Opcode: "VFMADD132PS",
Operands: []operand.Op{m128, reg.X2, reg.X3},
Inputs: []operand.Op{m128, reg.X2, reg.X3},
Outputs: []operand.Op{reg.X3},
ISA: []string{"FMA3"}, // not AVX512F
},
},
}
for _, c := range cases {
c := c // scopelint
t.Run(c.Name, func(t *testing.T) {
if !reflect.DeepEqual(c.Instruction, c.Expect) {
t.Logf(" got = %#v", c.Instruction)
t.Logf("expect = %#v", c.Expect)
t.FailNow()
}
})
}
}
func MustInstruction(t *testing.T) func(*ir.Instruction, error) *ir.Instruction {
t.Helper()
return func(i *ir.Instruction, err error) *ir.Instruction {
t.Helper()
if err != nil {
t.Fatal(err)
}
return i
}
}
golang-github-mmcloughlin-avo-0.5.0/x86/optab.go 0000664 0000000 0000000 00000005707 14370657153 0021447 0 ustar 00root root 0000000 0000000 package x86
import (
"errors"
"github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
// build constructs an instruction object from a list of acceptable forms, and
// given input operands and suffixes.
func build(forms []form, suffixes sffxs, ops []operand.Op) (*ir.Instruction, error) {
for i := range forms {
f := &forms[i]
if f.match(suffixes, ops) {
return f.build(suffixes, ops), nil
}
}
return nil, errors.New("bad operands")
}
// form represents an instruction form.
type form struct {
Opcode opc
SuffixesClass sffxscls
Features feature
ISAs isas
Arity uint8
Operands oprnds
}
// feature is a flags enumeration type representing instruction properties.
type feature uint8
const (
featureTerminal feature = 1 << iota
featureBranch
featureConditionalBranch
featureCancellingInputs
)
// oprnds is a list of explicit and implicit operands of an instruction form.
// The size of the array is output by optab generator.
type oprnds [maxoperands]oprnd
// oprnd represents an explicit or implicit operand to an instruction form.
type oprnd struct {
Type uint8
Implicit bool
Action action
}
// action an instruction form applies to an operand.
type action uint8
const (
actionN action = iota
actionR
actionW
actionRW action = actionR | actionW
)
// Read reports if the action includes read.
func (a action) Read() bool { return (a & actionR) != 0 }
// Read reports if the action includes write.
func (a action) Write() bool { return (a & actionW) != 0 }
// match reports whether this form matches the given suffixes and operand
// list.
func (f *form) match(suffixes sffxs, ops []operand.Op) bool {
// Match suffix.
accept := f.SuffixesClass.SuffixesSet()
if !accept[suffixes] {
return false
}
// Match operands.
if len(ops) != int(f.Arity) {
return false
}
for i, op := range ops {
t := oprndtype(f.Operands[i].Type)
if !t.Match(op) {
return false
}
}
return true
}
// build the full instruction object for this form and the given suffixes and
// operands. Assumes the form already matches the inputs.
func (f *form) build(suffixes sffxs, ops []operand.Op) *ir.Instruction {
// Base instruction properties.
i := &ir.Instruction{
Opcode: f.Opcode.String(),
Suffixes: suffixes.Strings(),
Operands: ops,
IsTerminal: (f.Features & featureTerminal) != 0,
IsBranch: (f.Features & featureBranch) != 0,
IsConditional: (f.Features & featureConditionalBranch) != 0,
CancellingInputs: (f.Features & featureCancellingInputs) != 0,
ISA: f.ISAs.List(),
}
// Input/output operands.
for _, spec := range f.Operands {
if spec.Type == 0 {
break
}
var op operand.Op
if spec.Implicit {
op = implreg(spec.Type).Register()
} else {
op, ops = ops[0], ops[1:]
}
if spec.Action.Read() {
i.Inputs = append(i.Inputs, op)
}
if spec.Action.Write() {
i.Outputs = append(i.Outputs, op)
}
}
return i
}
golang-github-mmcloughlin-avo-0.5.0/x86/stress_test.go 0000664 0000000 0000000 00000000425 14370657153 0022714 0 ustar 00root root 0000000 0000000 // Constructors test that rely on huge generated files that bloat compile time
// are limited to stress-test mode.
//go:build stress
// +build stress
package x86
//go:generate avogen -output zstress_test.go ctorsstress
//go:generate avogen -output zbench_test.go ctorsbench
golang-github-mmcloughlin-avo-0.5.0/x86/zctors.go 0000664 0000000 0000000 00004235675 14370657153 0021703 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zctors.go ctors. DO NOT EDIT.
package x86
import (
intrep "github.com/mmcloughlin/avo/ir"
"github.com/mmcloughlin/avo/operand"
)
// ADCB: Add with Carry.
//
// Forms:
//
// ADCB imm8 al
// ADCB imm8 m8
// ADCB imm8 r8
// ADCB m8 r8
// ADCB r8 m8
// ADCB r8 r8
func ADCB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcADCB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ADCL: Add with Carry.
//
// Forms:
//
// ADCL imm32 eax
// ADCL imm32 m32
// ADCL imm32 r32
// ADCL imm8 m32
// ADCL imm8 r32
// ADCL m32 r32
// ADCL r32 m32
// ADCL r32 r32
func ADCL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcADCL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// ADCQ: Add with Carry.
//
// Forms:
//
// ADCQ imm32 m64
// ADCQ imm32 r64
// ADCQ imm32 rax
// ADCQ imm8 m64
// ADCQ imm8 r64
// ADCQ m64 r64
// ADCQ r64 m64
// ADCQ r64 r64
func ADCQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcADCQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// ADCW: Add with Carry.
//
// Forms:
//
// ADCW imm16 ax
// ADCW imm16 m16
// ADCW imm16 r16
// ADCW imm8 m16
// ADCW imm8 r16
// ADCW m16 r16
// ADCW r16 m16
// ADCW r16 r16
func ADCW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcADCW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ADCXL: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXL m32 r32
// ADCXL r32 r32
func ADCXL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcADCXL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// ADCXQ: Unsigned Integer Addition of Two Operands with Carry Flag.
//
// Forms:
//
// ADCXQ m64 r64
// ADCXQ r64 r64
func ADCXQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcADCXQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// ADDB: Add.
//
// Forms:
//
// ADDB imm8 al
// ADDB imm8 m8
// ADDB imm8 r8
// ADDB m8 r8
// ADDB r8 m8
// ADDB r8 r8
func ADDB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcADDB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ADDL: Add.
//
// Forms:
//
// ADDL imm32 eax
// ADDL imm32 m32
// ADDL imm32 r32
// ADDL imm8 m32
// ADDL imm8 r32
// ADDL m32 r32
// ADDL r32 m32
// ADDL r32 r32
func ADDL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcADDL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// ADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDPD m128 xmm
// ADDPD xmm xmm
func ADDPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDPS m128 xmm
// ADDPS xmm xmm
func ADDPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDQ: Add.
//
// Forms:
//
// ADDQ imm32 m64
// ADDQ imm32 r64
// ADDQ imm32 rax
// ADDQ imm8 m64
// ADDQ imm8 r64
// ADDQ m64 r64
// ADDQ r64 m64
// ADDQ r64 r64
func ADDQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcADDQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// ADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// ADDSD m64 xmm
// ADDSD xmm xmm
func ADDSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// ADDSS m32 xmm
// ADDSS xmm xmm
func ADDSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPD m128 xmm
// ADDSUBPD xmm xmm
func ADDSUBPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDSUBPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// ADDSUBPS m128 xmm
// ADDSUBPS xmm xmm
func ADDSUBPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcADDSUBPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ADDW: Add.
//
// Forms:
//
// ADDW imm16 ax
// ADDW imm16 m16
// ADDW imm16 r16
// ADDW imm8 m16
// ADDW imm8 r16
// ADDW m16 r16
// ADDW r16 m16
// ADDW r16 r16
func ADDW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcADDW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ADOXL: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXL m32 r32
// ADOXL r32 r32
func ADOXL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcADOXL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// ADOXQ: Unsigned Integer Addition of Two Operands with Overflow Flag.
//
// Forms:
//
// ADOXQ m64 r64
// ADOXQ r64 r64
func ADOXQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcADOXQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// AESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// AESDEC m128 xmm
// AESDEC xmm xmm
func AESDEC(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESDEC.Forms(), sffxs{}, []operand.Op{mx, x})
}
// AESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// AESDECLAST m128 xmm
// AESDECLAST xmm xmm
func AESDECLAST(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESDECLAST.Forms(), sffxs{}, []operand.Op{mx, x})
}
// AESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// AESENC m128 xmm
// AESENC xmm xmm
func AESENC(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESENC.Forms(), sffxs{}, []operand.Op{mx, x})
}
// AESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// AESENCLAST m128 xmm
// AESENCLAST xmm xmm
func AESENCLAST(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESENCLAST.Forms(), sffxs{}, []operand.Op{mx, x})
}
// AESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// AESIMC m128 xmm
// AESIMC xmm xmm
func AESIMC(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESIMC.Forms(), sffxs{}, []operand.Op{mx, x})
}
// AESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// AESKEYGENASSIST imm8 m128 xmm
// AESKEYGENASSIST imm8 xmm xmm
func AESKEYGENASSIST(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcAESKEYGENASSIST.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// ANDB: Logical AND.
//
// Forms:
//
// ANDB imm8 al
// ANDB imm8 m8
// ANDB imm8 r8
// ANDB m8 r8
// ANDB r8 m8
// ANDB r8 r8
func ANDB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcANDB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ANDL: Logical AND.
//
// Forms:
//
// ANDL imm32 eax
// ANDL imm32 m32
// ANDL imm32 r32
// ANDL imm8 m32
// ANDL imm8 r32
// ANDL m32 r32
// ANDL r32 m32
// ANDL r32 r32
func ANDL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcANDL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// ANDNL: Logical AND NOT.
//
// Forms:
//
// ANDNL m32 r32 r32
// ANDNL r32 r32 r32
func ANDNL(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcANDNL.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// ANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPD m128 xmm
// ANDNPD xmm xmm
func ANDNPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcANDNPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDNPS m128 xmm
// ANDNPS xmm xmm
func ANDNPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcANDNPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ANDNQ: Logical AND NOT.
//
// Forms:
//
// ANDNQ m64 r64 r64
// ANDNQ r64 r64 r64
func ANDNQ(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcANDNQ.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// ANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// ANDPD m128 xmm
// ANDPD xmm xmm
func ANDPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcANDPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// ANDPS m128 xmm
// ANDPS xmm xmm
func ANDPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcANDPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ANDQ: Logical AND.
//
// Forms:
//
// ANDQ imm32 m64
// ANDQ imm32 r64
// ANDQ imm32 rax
// ANDQ imm8 m64
// ANDQ imm8 r64
// ANDQ m64 r64
// ANDQ r64 m64
// ANDQ r64 r64
func ANDQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcANDQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// ANDW: Logical AND.
//
// Forms:
//
// ANDW imm16 ax
// ANDW imm16 m16
// ANDW imm16 r16
// ANDW imm8 m16
// ANDW imm8 r16
// ANDW m16 r16
// ANDW r16 m16
// ANDW r16 r16
func ANDW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcANDW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// BEXTRL: Bit Field Extract.
//
// Forms:
//
// BEXTRL r32 m32 r32
// BEXTRL r32 r32 r32
func BEXTRL(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcBEXTRL.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// BEXTRQ: Bit Field Extract.
//
// Forms:
//
// BEXTRQ r64 m64 r64
// BEXTRQ r64 r64 r64
func BEXTRQ(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcBEXTRQ.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// BLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDPD imm8 m128 xmm
// BLENDPD imm8 xmm xmm
func BLENDPD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcBLENDPD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// BLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDPS imm8 m128 xmm
// BLENDPS imm8 xmm xmm
func BLENDPS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcBLENDPS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// BLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPD xmm0 m128 xmm
// BLENDVPD xmm0 xmm xmm
func BLENDVPD(x, mx, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcBLENDVPD.Forms(), sffxs{}, []operand.Op{x, mx, x1})
}
// BLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// BLENDVPS xmm0 m128 xmm
// BLENDVPS xmm0 xmm xmm
func BLENDVPS(x, mx, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcBLENDVPS.Forms(), sffxs{}, []operand.Op{x, mx, x1})
}
// BLSIL: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIL m32 r32
// BLSIL r32 r32
func BLSIL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSIL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BLSIQ: Isolate Lowest Set Bit.
//
// Forms:
//
// BLSIQ m64 r64
// BLSIQ r64 r64
func BLSIQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSIQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BLSMSKL: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKL m32 r32
// BLSMSKL r32 r32
func BLSMSKL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSMSKL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BLSMSKQ: Mask From Lowest Set Bit.
//
// Forms:
//
// BLSMSKQ m64 r64
// BLSMSKQ r64 r64
func BLSMSKQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSMSKQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BLSRL: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRL m32 r32
// BLSRL r32 r32
func BLSRL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSRL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BLSRQ: Reset Lowest Set Bit.
//
// Forms:
//
// BLSRQ m64 r64
// BLSRQ r64 r64
func BLSRQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBLSRQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSFL: Bit Scan Forward.
//
// Forms:
//
// BSFL m32 r32
// BSFL r32 r32
func BSFL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSFL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSFQ: Bit Scan Forward.
//
// Forms:
//
// BSFQ m64 r64
// BSFQ r64 r64
func BSFQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSFQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSFW: Bit Scan Forward.
//
// Forms:
//
// BSFW m16 r16
// BSFW r16 r16
func BSFW(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSFW.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSRL: Bit Scan Reverse.
//
// Forms:
//
// BSRL m32 r32
// BSRL r32 r32
func BSRL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSRL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSRQ: Bit Scan Reverse.
//
// Forms:
//
// BSRQ m64 r64
// BSRQ r64 r64
func BSRQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSRQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSRW: Bit Scan Reverse.
//
// Forms:
//
// BSRW m16 r16
// BSRW r16 r16
func BSRW(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcBSRW.Forms(), sffxs{}, []operand.Op{mr, r})
}
// BSWAPL: Byte Swap.
//
// Forms:
//
// BSWAPL r32
func BSWAPL(r operand.Op) (*intrep.Instruction, error) {
return build(opcBSWAPL.Forms(), sffxs{}, []operand.Op{r})
}
// BSWAPQ: Byte Swap.
//
// Forms:
//
// BSWAPQ r64
func BSWAPQ(r operand.Op) (*intrep.Instruction, error) {
return build(opcBSWAPQ.Forms(), sffxs{}, []operand.Op{r})
}
// BTCL: Bit Test and Complement.
//
// Forms:
//
// BTCL imm8 m32
// BTCL imm8 r32
// BTCL r32 m32
// BTCL r32 r32
func BTCL(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTCL.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTCQ: Bit Test and Complement.
//
// Forms:
//
// BTCQ imm8 m64
// BTCQ imm8 r64
// BTCQ r64 m64
// BTCQ r64 r64
func BTCQ(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTCQ.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTCW: Bit Test and Complement.
//
// Forms:
//
// BTCW imm8 m16
// BTCW imm8 r16
// BTCW r16 m16
// BTCW r16 r16
func BTCW(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTCW.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTL: Bit Test.
//
// Forms:
//
// BTL imm8 m32
// BTL imm8 r32
// BTL r32 m32
// BTL r32 r32
func BTL(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTL.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTQ: Bit Test.
//
// Forms:
//
// BTQ imm8 m64
// BTQ imm8 r64
// BTQ r64 m64
// BTQ r64 r64
func BTQ(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTQ.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTRL: Bit Test and Reset.
//
// Forms:
//
// BTRL imm8 m32
// BTRL imm8 r32
// BTRL r32 m32
// BTRL r32 r32
func BTRL(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTRL.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTRQ: Bit Test and Reset.
//
// Forms:
//
// BTRQ imm8 m64
// BTRQ imm8 r64
// BTRQ r64 m64
// BTRQ r64 r64
func BTRQ(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTRQ.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTRW: Bit Test and Reset.
//
// Forms:
//
// BTRW imm8 m16
// BTRW imm8 r16
// BTRW r16 m16
// BTRW r16 r16
func BTRW(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTRW.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTSL: Bit Test and Set.
//
// Forms:
//
// BTSL imm8 m32
// BTSL imm8 r32
// BTSL r32 m32
// BTSL r32 r32
func BTSL(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTSL.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTSQ: Bit Test and Set.
//
// Forms:
//
// BTSQ imm8 m64
// BTSQ imm8 r64
// BTSQ r64 m64
// BTSQ r64 r64
func BTSQ(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTSQ.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTSW: Bit Test and Set.
//
// Forms:
//
// BTSW imm8 m16
// BTSW imm8 r16
// BTSW r16 m16
// BTSW r16 r16
func BTSW(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTSW.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BTW: Bit Test.
//
// Forms:
//
// BTW imm8 m16
// BTW imm8 r16
// BTW r16 m16
// BTW r16 r16
func BTW(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcBTW.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// BZHIL: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIL r32 m32 r32
// BZHIL r32 r32 r32
func BZHIL(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcBZHIL.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// BZHIQ: Zero High Bits Starting with Specified Bit Position.
//
// Forms:
//
// BZHIQ r64 m64 r64
// BZHIQ r64 r64 r64
func BZHIQ(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcBZHIQ.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// CALL: Call Procedure.
//
// Forms:
//
// CALL rel32
func CALL(r operand.Op) (*intrep.Instruction, error) {
return build(opcCALL.Forms(), sffxs{}, []operand.Op{r})
}
// CBW: Convert Byte to Word.
//
// Forms:
//
// CBW
func CBW() (*intrep.Instruction, error) {
return build(opcCBW.Forms(), sffxs{}, []operand.Op{})
}
// CDQ: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQ
func CDQ() (*intrep.Instruction, error) {
return build(opcCDQ.Forms(), sffxs{}, []operand.Op{})
}
// CDQE: Convert Doubleword to Quadword.
//
// Forms:
//
// CDQE
func CDQE() (*intrep.Instruction, error) {
return build(opcCDQE.Forms(), sffxs{}, []operand.Op{})
}
// CLC: Clear Carry Flag.
//
// Forms:
//
// CLC
func CLC() (*intrep.Instruction, error) {
return build(opcCLC.Forms(), sffxs{}, []operand.Op{})
}
// CLD: Clear Direction Flag.
//
// Forms:
//
// CLD
func CLD() (*intrep.Instruction, error) {
return build(opcCLD.Forms(), sffxs{}, []operand.Op{})
}
// CLFLUSH: Flush Cache Line.
//
// Forms:
//
// CLFLUSH m8
func CLFLUSH(m operand.Op) (*intrep.Instruction, error) {
return build(opcCLFLUSH.Forms(), sffxs{}, []operand.Op{m})
}
// CLFLUSHOPT: Flush Cache Line Optimized.
//
// Forms:
//
// CLFLUSHOPT m8
func CLFLUSHOPT(m operand.Op) (*intrep.Instruction, error) {
return build(opcCLFLUSHOPT.Forms(), sffxs{}, []operand.Op{m})
}
// CMC: Complement Carry Flag.
//
// Forms:
//
// CMC
func CMC() (*intrep.Instruction, error) {
return build(opcCMC.Forms(), sffxs{}, []operand.Op{})
}
// CMOVLCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVLCC m32 r32
// CMOVLCC r32 r32
func CMOVLCC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLCC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVLCS m32 r32
// CMOVLCS r32 r32
func CMOVLCS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLCS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVLEQ m32 r32
// CMOVLEQ r32 r32
func CMOVLEQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLEQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVLGE m32 r32
// CMOVLGE r32 r32
func CMOVLGE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLGE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVLGT m32 r32
// CMOVLGT r32 r32
func CMOVLGT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLGT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVLHI m32 r32
// CMOVLHI r32 r32
func CMOVLHI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLHI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVLLE m32 r32
// CMOVLLE r32 r32
func CMOVLLE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLLE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVLLS m32 r32
// CMOVLLS r32 r32
func CMOVLLS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLLS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVLLT m32 r32
// CMOVLLT r32 r32
func CMOVLLT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLLT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVLMI m32 r32
// CMOVLMI r32 r32
func CMOVLMI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLMI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVLNE m32 r32
// CMOVLNE r32 r32
func CMOVLNE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLNE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVLOC m32 r32
// CMOVLOC r32 r32
func CMOVLOC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLOC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVLOS m32 r32
// CMOVLOS r32 r32
func CMOVLOS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLOS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVLPC m32 r32
// CMOVLPC r32 r32
func CMOVLPC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLPC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVLPL m32 r32
// CMOVLPL r32 r32
func CMOVLPL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLPL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVLPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVLPS m32 r32
// CMOVLPS r32 r32
func CMOVLPS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVLPS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVQCC m64 r64
// CMOVQCC r64 r64
func CMOVQCC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQCC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVQCS m64 r64
// CMOVQCS r64 r64
func CMOVQCS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQCS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVQEQ m64 r64
// CMOVQEQ r64 r64
func CMOVQEQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQEQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVQGE m64 r64
// CMOVQGE r64 r64
func CMOVQGE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQGE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVQGT m64 r64
// CMOVQGT r64 r64
func CMOVQGT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQGT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVQHI m64 r64
// CMOVQHI r64 r64
func CMOVQHI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQHI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVQLE m64 r64
// CMOVQLE r64 r64
func CMOVQLE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQLE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVQLS m64 r64
// CMOVQLS r64 r64
func CMOVQLS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQLS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVQLT m64 r64
// CMOVQLT r64 r64
func CMOVQLT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQLT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVQMI m64 r64
// CMOVQMI r64 r64
func CMOVQMI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQMI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVQNE m64 r64
// CMOVQNE r64 r64
func CMOVQNE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQNE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVQOC m64 r64
// CMOVQOC r64 r64
func CMOVQOC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQOC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVQOS m64 r64
// CMOVQOS r64 r64
func CMOVQOS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQOS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVQPC m64 r64
// CMOVQPC r64 r64
func CMOVQPC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQPC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVQPL m64 r64
// CMOVQPL r64 r64
func CMOVQPL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQPL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVQPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVQPS m64 r64
// CMOVQPS r64 r64
func CMOVQPS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVQPS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWCC: Move if above or equal (CF == 0).
//
// Forms:
//
// CMOVWCC m16 r16
// CMOVWCC r16 r16
func CMOVWCC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWCC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWCS: Move if below (CF == 1).
//
// Forms:
//
// CMOVWCS m16 r16
// CMOVWCS r16 r16
func CMOVWCS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWCS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWEQ: Move if equal (ZF == 1).
//
// Forms:
//
// CMOVWEQ m16 r16
// CMOVWEQ r16 r16
func CMOVWEQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWEQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWGE: Move if greater or equal (SF == OF).
//
// Forms:
//
// CMOVWGE m16 r16
// CMOVWGE r16 r16
func CMOVWGE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWGE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWGT: Move if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// CMOVWGT m16 r16
// CMOVWGT r16 r16
func CMOVWGT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWGT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWHI: Move if above (CF == 0 and ZF == 0).
//
// Forms:
//
// CMOVWHI m16 r16
// CMOVWHI r16 r16
func CMOVWHI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWHI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWLE: Move if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// CMOVWLE m16 r16
// CMOVWLE r16 r16
func CMOVWLE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWLE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWLS: Move if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// CMOVWLS m16 r16
// CMOVWLS r16 r16
func CMOVWLS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWLS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWLT: Move if less (SF != OF).
//
// Forms:
//
// CMOVWLT m16 r16
// CMOVWLT r16 r16
func CMOVWLT(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWLT.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWMI: Move if sign (SF == 1).
//
// Forms:
//
// CMOVWMI m16 r16
// CMOVWMI r16 r16
func CMOVWMI(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWMI.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWNE: Move if not equal (ZF == 0).
//
// Forms:
//
// CMOVWNE m16 r16
// CMOVWNE r16 r16
func CMOVWNE(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWNE.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWOC: Move if not overflow (OF == 0).
//
// Forms:
//
// CMOVWOC m16 r16
// CMOVWOC r16 r16
func CMOVWOC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWOC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWOS: Move if overflow (OF == 1).
//
// Forms:
//
// CMOVWOS m16 r16
// CMOVWOS r16 r16
func CMOVWOS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWOS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWPC: Move if not parity (PF == 0).
//
// Forms:
//
// CMOVWPC m16 r16
// CMOVWPC r16 r16
func CMOVWPC(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWPC.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWPL: Move if not sign (SF == 0).
//
// Forms:
//
// CMOVWPL m16 r16
// CMOVWPL r16 r16
func CMOVWPL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWPL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMOVWPS: Move if parity (PF == 1).
//
// Forms:
//
// CMOVWPS m16 r16
// CMOVWPS r16 r16
func CMOVWPS(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCMOVWPS.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CMPB: Compare Two Operands.
//
// Forms:
//
// CMPB al imm8
// CMPB m8 imm8
// CMPB m8 r8
// CMPB r8 imm8
// CMPB r8 m8
// CMPB r8 r8
func CMPB(amr, imr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPB.Forms(), sffxs{}, []operand.Op{amr, imr})
}
// CMPL: Compare Two Operands.
//
// Forms:
//
// CMPL eax imm32
// CMPL m32 imm32
// CMPL m32 imm8
// CMPL m32 r32
// CMPL r32 imm32
// CMPL r32 imm8
// CMPL r32 m32
// CMPL r32 r32
func CMPL(emr, imr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPL.Forms(), sffxs{}, []operand.Op{emr, imr})
}
// CMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPPD m128 xmm imm8
// CMPPD xmm xmm imm8
func CMPPD(mx, x, i operand.Op) (*intrep.Instruction, error) {
return build(opcCMPPD.Forms(), sffxs{}, []operand.Op{mx, x, i})
}
// CMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPPS m128 xmm imm8
// CMPPS xmm xmm imm8
func CMPPS(mx, x, i operand.Op) (*intrep.Instruction, error) {
return build(opcCMPPS.Forms(), sffxs{}, []operand.Op{mx, x, i})
}
// CMPQ: Compare Two Operands.
//
// Forms:
//
// CMPQ m64 imm32
// CMPQ m64 imm8
// CMPQ m64 r64
// CMPQ r64 imm32
// CMPQ r64 imm8
// CMPQ r64 m64
// CMPQ r64 r64
// CMPQ rax imm32
func CMPQ(mr, imr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPQ.Forms(), sffxs{}, []operand.Op{mr, imr})
}
// CMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// CMPSD m64 xmm imm8
// CMPSD xmm xmm imm8
func CMPSD(mx, x, i operand.Op) (*intrep.Instruction, error) {
return build(opcCMPSD.Forms(), sffxs{}, []operand.Op{mx, x, i})
}
// CMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// CMPSS m32 xmm imm8
// CMPSS xmm xmm imm8
func CMPSS(mx, x, i operand.Op) (*intrep.Instruction, error) {
return build(opcCMPSS.Forms(), sffxs{}, []operand.Op{mx, x, i})
}
// CMPW: Compare Two Operands.
//
// Forms:
//
// CMPW ax imm16
// CMPW m16 imm16
// CMPW m16 imm8
// CMPW m16 r16
// CMPW r16 imm16
// CMPW r16 imm8
// CMPW r16 m16
// CMPW r16 r16
func CMPW(amr, imr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPW.Forms(), sffxs{}, []operand.Op{amr, imr})
}
// CMPXCHG16B: Compare and Exchange 16 Bytes.
//
// Forms:
//
// CMPXCHG16B m128
func CMPXCHG16B(m operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHG16B.Forms(), sffxs{}, []operand.Op{m})
}
// CMPXCHG8B: Compare and Exchange 8 Bytes.
//
// Forms:
//
// CMPXCHG8B m64
func CMPXCHG8B(m operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHG8B.Forms(), sffxs{}, []operand.Op{m})
}
// CMPXCHGB: Compare and Exchange.
//
// Forms:
//
// CMPXCHGB r8 m8
// CMPXCHGB r8 r8
func CMPXCHGB(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHGB.Forms(), sffxs{}, []operand.Op{r, mr})
}
// CMPXCHGL: Compare and Exchange.
//
// Forms:
//
// CMPXCHGL r32 m32
// CMPXCHGL r32 r32
func CMPXCHGL(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHGL.Forms(), sffxs{}, []operand.Op{r, mr})
}
// CMPXCHGQ: Compare and Exchange.
//
// Forms:
//
// CMPXCHGQ r64 m64
// CMPXCHGQ r64 r64
func CMPXCHGQ(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHGQ.Forms(), sffxs{}, []operand.Op{r, mr})
}
// CMPXCHGW: Compare and Exchange.
//
// Forms:
//
// CMPXCHGW r16 m16
// CMPXCHGW r16 r16
func CMPXCHGW(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcCMPXCHGW.Forms(), sffxs{}, []operand.Op{r, mr})
}
// COMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISD m64 xmm
// COMISD xmm xmm
func COMISD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCOMISD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// COMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// COMISS m32 xmm
// COMISS xmm xmm
func COMISS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCOMISS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CPUID: CPU Identification.
//
// Forms:
//
// CPUID
func CPUID() (*intrep.Instruction, error) {
return build(opcCPUID.Forms(), sffxs{}, []operand.Op{})
}
// CQO: Convert Quadword to Octaword.
//
// Forms:
//
// CQO
func CQO() (*intrep.Instruction, error) {
return build(opcCQO.Forms(), sffxs{}, []operand.Op{})
}
// CRC32B: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32B m8 r32
// CRC32B m8 r64
// CRC32B r8 r32
// CRC32B r8 r64
func CRC32B(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCRC32B.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CRC32L: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32L m32 r32
// CRC32L r32 r32
func CRC32L(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCRC32L.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CRC32Q: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32Q m64 r64
// CRC32Q r64 r64
func CRC32Q(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCRC32Q.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CRC32W: Accumulate CRC32 Value.
//
// Forms:
//
// CRC32W m16 r32
// CRC32W r16 r32
func CRC32W(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcCRC32W.Forms(), sffxs{}, []operand.Op{mr, r})
}
// CVTPD2PL: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPD2PL m128 xmm
// CVTPD2PL xmm xmm
func CVTPD2PL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPD2PL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPD2PS m128 xmm
// CVTPD2PS xmm xmm
func CVTPD2PS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPD2PS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTPL2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPL2PD m64 xmm
// CVTPL2PD xmm xmm
func CVTPL2PD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPL2PD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTPL2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// CVTPL2PS m128 xmm
// CVTPL2PS xmm xmm
func CVTPL2PS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPL2PS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// CVTPS2PD m64 xmm
// CVTPS2PD xmm xmm
func CVTPS2PD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPS2PD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTPS2PL: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTPS2PL m128 xmm
// CVTPS2PL xmm xmm
func CVTPS2PL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTPS2PL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTSD2SL: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// CVTSD2SL m64 r32
// CVTSD2SL m64 r64
// CVTSD2SL xmm r32
// CVTSD2SL xmm r64
func CVTSD2SL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSD2SL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// CVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSD2SS m64 xmm
// CVTSD2SS xmm xmm
func CVTSD2SS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSD2SS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTSL2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSL2SD m32 xmm
// CVTSL2SD r32 xmm
func CVTSL2SD(mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSL2SD.Forms(), sffxs{}, []operand.Op{mr, x})
}
// CVTSL2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSL2SS m32 xmm
// CVTSL2SS r32 xmm
func CVTSL2SS(mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSL2SS.Forms(), sffxs{}, []operand.Op{mr, x})
}
// CVTSQ2SD: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSQ2SD m64 xmm
// CVTSQ2SD r64 xmm
func CVTSQ2SD(mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSQ2SD.Forms(), sffxs{}, []operand.Op{mr, x})
}
// CVTSQ2SS: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// CVTSQ2SS m64 xmm
// CVTSQ2SS r64 xmm
func CVTSQ2SS(mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSQ2SS.Forms(), sffxs{}, []operand.Op{mr, x})
}
// CVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// CVTSS2SD m32 xmm
// CVTSS2SD xmm xmm
func CVTSS2SD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSS2SD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTSS2SL: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTSS2SL m32 r32
// CVTSS2SL m32 r64
// CVTSS2SL xmm r32
// CVTSS2SL xmm r64
func CVTSS2SL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcCVTSS2SL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// CVTTPD2PL: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPD2PL m128 xmm
// CVTTPD2PL xmm xmm
func CVTTPD2PL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTTPD2PL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTTPS2PL: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// CVTTPS2PL m128 xmm
// CVTTPS2PL xmm xmm
func CVTTPS2PL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcCVTTPS2PL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// CVTTSD2SL: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SL m64 r32
// CVTTSD2SL xmm r32
func CVTTSD2SL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcCVTTSD2SL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// CVTTSD2SQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// CVTTSD2SQ m64 r64
// CVTTSD2SQ xmm r64
func CVTTSD2SQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcCVTTSD2SQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// CVTTSS2SL: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// CVTTSS2SL m32 r32
// CVTTSS2SL m32 r64
// CVTTSS2SL xmm r32
// CVTTSS2SL xmm r64
func CVTTSS2SL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcCVTTSS2SL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// CWD: Convert Word to Doubleword.
//
// Forms:
//
// CWD
func CWD() (*intrep.Instruction, error) {
return build(opcCWD.Forms(), sffxs{}, []operand.Op{})
}
// CWDE: Convert Word to Doubleword.
//
// Forms:
//
// CWDE
func CWDE() (*intrep.Instruction, error) {
return build(opcCWDE.Forms(), sffxs{}, []operand.Op{})
}
// DECB: Decrement by 1.
//
// Forms:
//
// DECB m8
// DECB r8
func DECB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDECB.Forms(), sffxs{}, []operand.Op{mr})
}
// DECL: Decrement by 1.
//
// Forms:
//
// DECL m32
// DECL r32
func DECL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDECL.Forms(), sffxs{}, []operand.Op{mr})
}
// DECQ: Decrement by 1.
//
// Forms:
//
// DECQ m64
// DECQ r64
func DECQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDECQ.Forms(), sffxs{}, []operand.Op{mr})
}
// DECW: Decrement by 1.
//
// Forms:
//
// DECW m16
// DECW r16
func DECW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDECW.Forms(), sffxs{}, []operand.Op{mr})
}
// DIVB: Unsigned Divide.
//
// Forms:
//
// DIVB m8
// DIVB r8
func DIVB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDIVB.Forms(), sffxs{}, []operand.Op{mr})
}
// DIVL: Unsigned Divide.
//
// Forms:
//
// DIVL m32
// DIVL r32
func DIVL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDIVL.Forms(), sffxs{}, []operand.Op{mr})
}
// DIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVPD m128 xmm
// DIVPD xmm xmm
func DIVPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDIVPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// DIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVPS m128 xmm
// DIVPS xmm xmm
func DIVPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDIVPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// DIVQ: Unsigned Divide.
//
// Forms:
//
// DIVQ m64
// DIVQ r64
func DIVQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDIVQ.Forms(), sffxs{}, []operand.Op{mr})
}
// DIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// DIVSD m64 xmm
// DIVSD xmm xmm
func DIVSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDIVSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// DIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// DIVSS m32 xmm
// DIVSS xmm xmm
func DIVSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDIVSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// DIVW: Unsigned Divide.
//
// Forms:
//
// DIVW m16
// DIVW r16
func DIVW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcDIVW.Forms(), sffxs{}, []operand.Op{mr})
}
// DPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// DPPD imm8 m128 xmm
// DPPD imm8 xmm xmm
func DPPD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDPPD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// DPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// DPPS imm8 m128 xmm
// DPPS imm8 xmm xmm
func DPPS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcDPPS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// EXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// EXTRACTPS imm2u xmm m32
// EXTRACTPS imm2u xmm r32
func EXTRACTPS(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcEXTRACTPS.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// HADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// HADDPD m128 xmm
// HADDPD xmm xmm
func HADDPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcHADDPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// HADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// HADDPS m128 xmm
// HADDPS xmm xmm
func HADDPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcHADDPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// HSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPD m128 xmm
// HSUBPD xmm xmm
func HSUBPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcHSUBPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// HSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// HSUBPS m128 xmm
// HSUBPS xmm xmm
func HSUBPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcHSUBPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// IDIVB: Signed Divide.
//
// Forms:
//
// IDIVB m8
// IDIVB r8
func IDIVB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcIDIVB.Forms(), sffxs{}, []operand.Op{mr})
}
// IDIVL: Signed Divide.
//
// Forms:
//
// IDIVL m32
// IDIVL r32
func IDIVL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcIDIVL.Forms(), sffxs{}, []operand.Op{mr})
}
// IDIVQ: Signed Divide.
//
// Forms:
//
// IDIVQ m64
// IDIVQ r64
func IDIVQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcIDIVQ.Forms(), sffxs{}, []operand.Op{mr})
}
// IDIVW: Signed Divide.
//
// Forms:
//
// IDIVW m16
// IDIVW r16
func IDIVW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcIDIVW.Forms(), sffxs{}, []operand.Op{mr})
}
// IMUL3L: Signed Multiply.
//
// Forms:
//
// IMUL3L imm32 m32 r32
// IMUL3L imm32 r32 r32
// IMUL3L imm8 m32 r32
// IMUL3L imm8 r32 r32
func IMUL3L(i, mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcIMUL3L.Forms(), sffxs{}, []operand.Op{i, mr, r})
}
// IMUL3Q: Signed Multiply.
//
// Forms:
//
// IMUL3Q imm32 m64 r64
// IMUL3Q imm32 r64 r64
// IMUL3Q imm8 m64 r64
// IMUL3Q imm8 r64 r64
func IMUL3Q(i, mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcIMUL3Q.Forms(), sffxs{}, []operand.Op{i, mr, r})
}
// IMUL3W: Signed Multiply.
//
// Forms:
//
// IMUL3W imm16 m16 r16
// IMUL3W imm16 r16 r16
// IMUL3W imm8 m16 r16
// IMUL3W imm8 r16 r16
func IMUL3W(i, mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcIMUL3W.Forms(), sffxs{}, []operand.Op{i, mr, r})
}
// IMULB: Signed Multiply.
//
// Forms:
//
// IMULB m8
// IMULB r8
func IMULB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcIMULB.Forms(), sffxs{}, []operand.Op{mr})
}
// IMULL: Signed Multiply.
//
// Forms:
//
// IMULL m32 r32
// IMULL m32
// IMULL r32 r32
// IMULL r32
func IMULL(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcIMULL.Forms(), sffxs{}, ops)
}
// IMULQ: Signed Multiply.
//
// Forms:
//
// IMULQ m64 r64
// IMULQ m64
// IMULQ r64 r64
// IMULQ r64
func IMULQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcIMULQ.Forms(), sffxs{}, ops)
}
// IMULW: Signed Multiply.
//
// Forms:
//
// IMULW m16 r16
// IMULW m16
// IMULW r16 r16
// IMULW r16
func IMULW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcIMULW.Forms(), sffxs{}, ops)
}
// INCB: Increment by 1.
//
// Forms:
//
// INCB m8
// INCB r8
func INCB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcINCB.Forms(), sffxs{}, []operand.Op{mr})
}
// INCL: Increment by 1.
//
// Forms:
//
// INCL m32
// INCL r32
func INCL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcINCL.Forms(), sffxs{}, []operand.Op{mr})
}
// INCQ: Increment by 1.
//
// Forms:
//
// INCQ m64
// INCQ r64
func INCQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcINCQ.Forms(), sffxs{}, []operand.Op{mr})
}
// INCW: Increment by 1.
//
// Forms:
//
// INCW m16
// INCW r16
func INCW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcINCW.Forms(), sffxs{}, []operand.Op{mr})
}
// INSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// INSERTPS imm8 m32 xmm
// INSERTPS imm8 xmm xmm
func INSERTPS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcINSERTPS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// INT: Call to Interrupt Procedure.
//
// Forms:
//
// INT 3
// INT imm8
func INT(i operand.Op) (*intrep.Instruction, error) {
return build(opcINT.Forms(), sffxs{}, []operand.Op{i})
}
// JA: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JA rel32
// JA rel8
func JA(r operand.Op) (*intrep.Instruction, error) {
return build(opcJA.Forms(), sffxs{}, []operand.Op{r})
}
// JAE: Jump if above or equal (CF == 0).
//
// Forms:
//
// JAE rel32
// JAE rel8
func JAE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJAE.Forms(), sffxs{}, []operand.Op{r})
}
// JB: Jump if below (CF == 1).
//
// Forms:
//
// JB rel32
// JB rel8
func JB(r operand.Op) (*intrep.Instruction, error) {
return build(opcJB.Forms(), sffxs{}, []operand.Op{r})
}
// JBE: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JBE rel32
// JBE rel8
func JBE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJBE.Forms(), sffxs{}, []operand.Op{r})
}
// JC: Jump if below (CF == 1).
//
// Forms:
//
// JC rel32
// JC rel8
func JC(r operand.Op) (*intrep.Instruction, error) {
return build(opcJC.Forms(), sffxs{}, []operand.Op{r})
}
// JCC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JCC rel32
// JCC rel8
func JCC(r operand.Op) (*intrep.Instruction, error) {
return build(opcJCC.Forms(), sffxs{}, []operand.Op{r})
}
// JCS: Jump if below (CF == 1).
//
// Forms:
//
// JCS rel32
// JCS rel8
func JCS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJCS.Forms(), sffxs{}, []operand.Op{r})
}
// JCXZL: Jump if ECX register is 0.
//
// Forms:
//
// JCXZL rel8
func JCXZL(r operand.Op) (*intrep.Instruction, error) {
return build(opcJCXZL.Forms(), sffxs{}, []operand.Op{r})
}
// JCXZQ: Jump if RCX register is 0.
//
// Forms:
//
// JCXZQ rel8
func JCXZQ(r operand.Op) (*intrep.Instruction, error) {
return build(opcJCXZQ.Forms(), sffxs{}, []operand.Op{r})
}
// JE: Jump if equal (ZF == 1).
//
// Forms:
//
// JE rel32
// JE rel8
func JE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJE.Forms(), sffxs{}, []operand.Op{r})
}
// JEQ: Jump if equal (ZF == 1).
//
// Forms:
//
// JEQ rel32
// JEQ rel8
func JEQ(r operand.Op) (*intrep.Instruction, error) {
return build(opcJEQ.Forms(), sffxs{}, []operand.Op{r})
}
// JG: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JG rel32
// JG rel8
func JG(r operand.Op) (*intrep.Instruction, error) {
return build(opcJG.Forms(), sffxs{}, []operand.Op{r})
}
// JGE: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JGE rel32
// JGE rel8
func JGE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJGE.Forms(), sffxs{}, []operand.Op{r})
}
// JGT: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JGT rel32
// JGT rel8
func JGT(r operand.Op) (*intrep.Instruction, error) {
return build(opcJGT.Forms(), sffxs{}, []operand.Op{r})
}
// JHI: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JHI rel32
// JHI rel8
func JHI(r operand.Op) (*intrep.Instruction, error) {
return build(opcJHI.Forms(), sffxs{}, []operand.Op{r})
}
// JHS: Jump if above or equal (CF == 0).
//
// Forms:
//
// JHS rel32
// JHS rel8
func JHS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJHS.Forms(), sffxs{}, []operand.Op{r})
}
// JL: Jump if less (SF != OF).
//
// Forms:
//
// JL rel32
// JL rel8
func JL(r operand.Op) (*intrep.Instruction, error) {
return build(opcJL.Forms(), sffxs{}, []operand.Op{r})
}
// JLE: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JLE rel32
// JLE rel8
func JLE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJLE.Forms(), sffxs{}, []operand.Op{r})
}
// JLO: Jump if below (CF == 1).
//
// Forms:
//
// JLO rel32
// JLO rel8
func JLO(r operand.Op) (*intrep.Instruction, error) {
return build(opcJLO.Forms(), sffxs{}, []operand.Op{r})
}
// JLS: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JLS rel32
// JLS rel8
func JLS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJLS.Forms(), sffxs{}, []operand.Op{r})
}
// JLT: Jump if less (SF != OF).
//
// Forms:
//
// JLT rel32
// JLT rel8
func JLT(r operand.Op) (*intrep.Instruction, error) {
return build(opcJLT.Forms(), sffxs{}, []operand.Op{r})
}
// JMI: Jump if sign (SF == 1).
//
// Forms:
//
// JMI rel32
// JMI rel8
func JMI(r operand.Op) (*intrep.Instruction, error) {
return build(opcJMI.Forms(), sffxs{}, []operand.Op{r})
}
// JMP: Jump Unconditionally.
//
// Forms:
//
// JMP rel32
// JMP rel8
// JMP m64
// JMP r64
func JMP(mr operand.Op) (*intrep.Instruction, error) {
return build(opcJMP.Forms(), sffxs{}, []operand.Op{mr})
}
// JNA: Jump if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// JNA rel32
// JNA rel8
func JNA(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNA.Forms(), sffxs{}, []operand.Op{r})
}
// JNAE: Jump if below (CF == 1).
//
// Forms:
//
// JNAE rel32
// JNAE rel8
func JNAE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNAE.Forms(), sffxs{}, []operand.Op{r})
}
// JNB: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNB rel32
// JNB rel8
func JNB(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNB.Forms(), sffxs{}, []operand.Op{r})
}
// JNBE: Jump if above (CF == 0 and ZF == 0).
//
// Forms:
//
// JNBE rel32
// JNBE rel8
func JNBE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNBE.Forms(), sffxs{}, []operand.Op{r})
}
// JNC: Jump if above or equal (CF == 0).
//
// Forms:
//
// JNC rel32
// JNC rel8
func JNC(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNC.Forms(), sffxs{}, []operand.Op{r})
}
// JNE: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNE rel32
// JNE rel8
func JNE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNE.Forms(), sffxs{}, []operand.Op{r})
}
// JNG: Jump if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// JNG rel32
// JNG rel8
func JNG(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNG.Forms(), sffxs{}, []operand.Op{r})
}
// JNGE: Jump if less (SF != OF).
//
// Forms:
//
// JNGE rel32
// JNGE rel8
func JNGE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNGE.Forms(), sffxs{}, []operand.Op{r})
}
// JNL: Jump if greater or equal (SF == OF).
//
// Forms:
//
// JNL rel32
// JNL rel8
func JNL(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNL.Forms(), sffxs{}, []operand.Op{r})
}
// JNLE: Jump if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// JNLE rel32
// JNLE rel8
func JNLE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNLE.Forms(), sffxs{}, []operand.Op{r})
}
// JNO: Jump if not overflow (OF == 0).
//
// Forms:
//
// JNO rel32
// JNO rel8
func JNO(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNO.Forms(), sffxs{}, []operand.Op{r})
}
// JNP: Jump if not parity (PF == 0).
//
// Forms:
//
// JNP rel32
// JNP rel8
func JNP(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNP.Forms(), sffxs{}, []operand.Op{r})
}
// JNS: Jump if not sign (SF == 0).
//
// Forms:
//
// JNS rel32
// JNS rel8
func JNS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNS.Forms(), sffxs{}, []operand.Op{r})
}
// JNZ: Jump if not equal (ZF == 0).
//
// Forms:
//
// JNZ rel32
// JNZ rel8
func JNZ(r operand.Op) (*intrep.Instruction, error) {
return build(opcJNZ.Forms(), sffxs{}, []operand.Op{r})
}
// JO: Jump if overflow (OF == 1).
//
// Forms:
//
// JO rel32
// JO rel8
func JO(r operand.Op) (*intrep.Instruction, error) {
return build(opcJO.Forms(), sffxs{}, []operand.Op{r})
}
// JOC: Jump if not overflow (OF == 0).
//
// Forms:
//
// JOC rel32
// JOC rel8
func JOC(r operand.Op) (*intrep.Instruction, error) {
return build(opcJOC.Forms(), sffxs{}, []operand.Op{r})
}
// JOS: Jump if overflow (OF == 1).
//
// Forms:
//
// JOS rel32
// JOS rel8
func JOS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJOS.Forms(), sffxs{}, []operand.Op{r})
}
// JP: Jump if parity (PF == 1).
//
// Forms:
//
// JP rel32
// JP rel8
func JP(r operand.Op) (*intrep.Instruction, error) {
return build(opcJP.Forms(), sffxs{}, []operand.Op{r})
}
// JPC: Jump if not parity (PF == 0).
//
// Forms:
//
// JPC rel32
// JPC rel8
func JPC(r operand.Op) (*intrep.Instruction, error) {
return build(opcJPC.Forms(), sffxs{}, []operand.Op{r})
}
// JPE: Jump if parity (PF == 1).
//
// Forms:
//
// JPE rel32
// JPE rel8
func JPE(r operand.Op) (*intrep.Instruction, error) {
return build(opcJPE.Forms(), sffxs{}, []operand.Op{r})
}
// JPL: Jump if not sign (SF == 0).
//
// Forms:
//
// JPL rel32
// JPL rel8
func JPL(r operand.Op) (*intrep.Instruction, error) {
return build(opcJPL.Forms(), sffxs{}, []operand.Op{r})
}
// JPO: Jump if not parity (PF == 0).
//
// Forms:
//
// JPO rel32
// JPO rel8
func JPO(r operand.Op) (*intrep.Instruction, error) {
return build(opcJPO.Forms(), sffxs{}, []operand.Op{r})
}
// JPS: Jump if parity (PF == 1).
//
// Forms:
//
// JPS rel32
// JPS rel8
func JPS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJPS.Forms(), sffxs{}, []operand.Op{r})
}
// JS: Jump if sign (SF == 1).
//
// Forms:
//
// JS rel32
// JS rel8
func JS(r operand.Op) (*intrep.Instruction, error) {
return build(opcJS.Forms(), sffxs{}, []operand.Op{r})
}
// JZ: Jump if equal (ZF == 1).
//
// Forms:
//
// JZ rel32
// JZ rel8
func JZ(r operand.Op) (*intrep.Instruction, error) {
return build(opcJZ.Forms(), sffxs{}, []operand.Op{r})
}
// KADDB: ADD Two 8-bit Masks.
//
// Forms:
//
// KADDB k k k
func KADDB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKADDB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KADDD: ADD Two 32-bit Masks.
//
// Forms:
//
// KADDD k k k
func KADDD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKADDD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KADDQ: ADD Two 64-bit Masks.
//
// Forms:
//
// KADDQ k k k
func KADDQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKADDQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KADDW: ADD Two 16-bit Masks.
//
// Forms:
//
// KADDW k k k
func KADDW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKADDW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDB: Bitwise Logical AND 8-bit Masks.
//
// Forms:
//
// KANDB k k k
func KANDB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDD: Bitwise Logical AND 32-bit Masks.
//
// Forms:
//
// KANDD k k k
func KANDD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDNB: Bitwise Logical AND NOT 8-bit Masks.
//
// Forms:
//
// KANDNB k k k
func KANDNB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDNB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDND: Bitwise Logical AND NOT 32-bit Masks.
//
// Forms:
//
// KANDND k k k
func KANDND(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDND.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDNQ: Bitwise Logical AND NOT 64-bit Masks.
//
// Forms:
//
// KANDNQ k k k
func KANDNQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDNQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDNW: Bitwise Logical AND NOT 16-bit Masks.
//
// Forms:
//
// KANDNW k k k
func KANDNW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDNW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDQ: Bitwise Logical AND 64-bit Masks.
//
// Forms:
//
// KANDQ k k k
func KANDQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KANDW: Bitwise Logical AND 16-bit Masks.
//
// Forms:
//
// KANDW k k k
func KANDW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKANDW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KMOVB: Move 8-bit Mask.
//
// Forms:
//
// KMOVB k k
// KMOVB k m8
// KMOVB k r32
// KMOVB m8 k
// KMOVB r32 k
func KMOVB(kmr, kmr1 operand.Op) (*intrep.Instruction, error) {
return build(opcKMOVB.Forms(), sffxs{}, []operand.Op{kmr, kmr1})
}
// KMOVD: Move 32-bit Mask.
//
// Forms:
//
// KMOVD k k
// KMOVD k m32
// KMOVD k r32
// KMOVD m32 k
// KMOVD r32 k
func KMOVD(kmr, kmr1 operand.Op) (*intrep.Instruction, error) {
return build(opcKMOVD.Forms(), sffxs{}, []operand.Op{kmr, kmr1})
}
// KMOVQ: Move 64-bit Mask.
//
// Forms:
//
// KMOVQ k k
// KMOVQ k m64
// KMOVQ k r64
// KMOVQ m64 k
// KMOVQ r64 k
func KMOVQ(kmr, kmr1 operand.Op) (*intrep.Instruction, error) {
return build(opcKMOVQ.Forms(), sffxs{}, []operand.Op{kmr, kmr1})
}
// KMOVW: Move 16-bit Mask.
//
// Forms:
//
// KMOVW k k
// KMOVW k m16
// KMOVW k r32
// KMOVW m16 k
// KMOVW r32 k
func KMOVW(kmr, kmr1 operand.Op) (*intrep.Instruction, error) {
return build(opcKMOVW.Forms(), sffxs{}, []operand.Op{kmr, kmr1})
}
// KNOTB: NOT 8-bit Mask Register.
//
// Forms:
//
// KNOTB k k
func KNOTB(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKNOTB.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KNOTD: NOT 32-bit Mask Register.
//
// Forms:
//
// KNOTD k k
func KNOTD(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKNOTD.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KNOTQ: NOT 64-bit Mask Register.
//
// Forms:
//
// KNOTQ k k
func KNOTQ(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKNOTQ.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KNOTW: NOT 16-bit Mask Register.
//
// Forms:
//
// KNOTW k k
func KNOTW(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKNOTW.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KORB: Bitwise Logical OR 8-bit Masks.
//
// Forms:
//
// KORB k k k
func KORB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKORB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KORD: Bitwise Logical OR 32-bit Masks.
//
// Forms:
//
// KORD k k k
func KORD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKORD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KORQ: Bitwise Logical OR 64-bit Masks.
//
// Forms:
//
// KORQ k k k
func KORQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKORQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KORTESTB: OR 8-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTB k k
func KORTESTB(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKORTESTB.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KORTESTD: OR 32-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTD k k
func KORTESTD(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKORTESTD.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KORTESTQ: OR 64-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTQ k k
func KORTESTQ(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKORTESTQ.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KORTESTW: OR 16-bit Masks and Set Flags.
//
// Forms:
//
// KORTESTW k k
func KORTESTW(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKORTESTW.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KORW: Bitwise Logical OR 16-bit Masks.
//
// Forms:
//
// KORW k k k
func KORW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKORW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KSHIFTLB: Shift Left 8-bit Masks.
//
// Forms:
//
// KSHIFTLB imm8 k k
func KSHIFTLB(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTLB.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTLD: Shift Left 32-bit Masks.
//
// Forms:
//
// KSHIFTLD imm8 k k
func KSHIFTLD(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTLD.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTLQ: Shift Left 64-bit Masks.
//
// Forms:
//
// KSHIFTLQ imm8 k k
func KSHIFTLQ(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTLQ.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTLW: Shift Left 16-bit Masks.
//
// Forms:
//
// KSHIFTLW imm8 k k
func KSHIFTLW(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTLW.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTRB: Shift Right 8-bit Masks.
//
// Forms:
//
// KSHIFTRB imm8 k k
func KSHIFTRB(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTRB.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTRD: Shift Right 32-bit Masks.
//
// Forms:
//
// KSHIFTRD imm8 k k
func KSHIFTRD(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTRD.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTRQ: Shift Right 64-bit Masks.
//
// Forms:
//
// KSHIFTRQ imm8 k k
func KSHIFTRQ(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTRQ.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KSHIFTRW: Shift Right 16-bit Masks.
//
// Forms:
//
// KSHIFTRW imm8 k k
func KSHIFTRW(i, k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKSHIFTRW.Forms(), sffxs{}, []operand.Op{i, k, k1})
}
// KTESTB: Bit Test 8-bit Masks and Set Flags.
//
// Forms:
//
// KTESTB k k
func KTESTB(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKTESTB.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KTESTD: Bit Test 32-bit Masks and Set Flags.
//
// Forms:
//
// KTESTD k k
func KTESTD(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKTESTD.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KTESTQ: Bit Test 64-bit Masks and Set Flags.
//
// Forms:
//
// KTESTQ k k
func KTESTQ(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKTESTQ.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KTESTW: Bit Test 16-bit Masks and Set Flags.
//
// Forms:
//
// KTESTW k k
func KTESTW(k, k1 operand.Op) (*intrep.Instruction, error) {
return build(opcKTESTW.Forms(), sffxs{}, []operand.Op{k, k1})
}
// KUNPCKBW: Unpack and Interleave 8-bit Masks.
//
// Forms:
//
// KUNPCKBW k k k
func KUNPCKBW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKUNPCKBW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KUNPCKDQ: Unpack and Interleave 32-bit Masks.
//
// Forms:
//
// KUNPCKDQ k k k
func KUNPCKDQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKUNPCKDQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KUNPCKWD: Unpack and Interleave 16-bit Masks.
//
// Forms:
//
// KUNPCKWD k k k
func KUNPCKWD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKUNPCKWD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXNORB: Bitwise Logical XNOR 8-bit Masks.
//
// Forms:
//
// KXNORB k k k
func KXNORB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXNORB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXNORD: Bitwise Logical XNOR 32-bit Masks.
//
// Forms:
//
// KXNORD k k k
func KXNORD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXNORD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXNORQ: Bitwise Logical XNOR 64-bit Masks.
//
// Forms:
//
// KXNORQ k k k
func KXNORQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXNORQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXNORW: Bitwise Logical XNOR 16-bit Masks.
//
// Forms:
//
// KXNORW k k k
func KXNORW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXNORW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXORB: Bitwise Logical XOR 8-bit Masks.
//
// Forms:
//
// KXORB k k k
func KXORB(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXORB.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXORD: Bitwise Logical XOR 32-bit Masks.
//
// Forms:
//
// KXORD k k k
func KXORD(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXORD.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXORQ: Bitwise Logical XOR 64-bit Masks.
//
// Forms:
//
// KXORQ k k k
func KXORQ(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXORQ.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// KXORW: Bitwise Logical XOR 16-bit Masks.
//
// Forms:
//
// KXORW k k k
func KXORW(k, k1, k2 operand.Op) (*intrep.Instruction, error) {
return build(opcKXORW.Forms(), sffxs{}, []operand.Op{k, k1, k2})
}
// LDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// LDDQU m128 xmm
func LDDQU(m, x operand.Op) (*intrep.Instruction, error) {
return build(opcLDDQU.Forms(), sffxs{}, []operand.Op{m, x})
}
// LDMXCSR: Load MXCSR Register.
//
// Forms:
//
// LDMXCSR m32
func LDMXCSR(m operand.Op) (*intrep.Instruction, error) {
return build(opcLDMXCSR.Forms(), sffxs{}, []operand.Op{m})
}
// LEAL: Load Effective Address.
//
// Forms:
//
// LEAL m r32
func LEAL(m, r operand.Op) (*intrep.Instruction, error) {
return build(opcLEAL.Forms(), sffxs{}, []operand.Op{m, r})
}
// LEAQ: Load Effective Address.
//
// Forms:
//
// LEAQ m r64
func LEAQ(m, r operand.Op) (*intrep.Instruction, error) {
return build(opcLEAQ.Forms(), sffxs{}, []operand.Op{m, r})
}
// LEAW: Load Effective Address.
//
// Forms:
//
// LEAW m r16
func LEAW(m, r operand.Op) (*intrep.Instruction, error) {
return build(opcLEAW.Forms(), sffxs{}, []operand.Op{m, r})
}
// LFENCE: Load Fence.
//
// Forms:
//
// LFENCE
func LFENCE() (*intrep.Instruction, error) {
return build(opcLFENCE.Forms(), sffxs{}, []operand.Op{})
}
// LZCNTL: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTL m32 r32
// LZCNTL r32 r32
func LZCNTL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcLZCNTL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// LZCNTQ: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTQ m64 r64
// LZCNTQ r64 r64
func LZCNTQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcLZCNTQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// LZCNTW: Count the Number of Leading Zero Bits.
//
// Forms:
//
// LZCNTW m16 r16
// LZCNTW r16 r16
func LZCNTW(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcLZCNTW.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVDQU xmm xmm
func MASKMOVDQU(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcMASKMOVDQU.Forms(), sffxs{}, []operand.Op{x, x1})
}
// MASKMOVOU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// MASKMOVOU xmm xmm
func MASKMOVOU(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcMASKMOVOU.Forms(), sffxs{}, []operand.Op{x, x1})
}
// MAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MAXPD m128 xmm
// MAXPD xmm xmm
func MAXPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMAXPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MAXPS m128 xmm
// MAXPS xmm xmm
func MAXPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMAXPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MAXSD m64 xmm
// MAXSD xmm xmm
func MAXSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMAXSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MAXSS m32 xmm
// MAXSS xmm xmm
func MAXSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMAXSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MFENCE: Memory Fence.
//
// Forms:
//
// MFENCE
func MFENCE() (*intrep.Instruction, error) {
return build(opcMFENCE.Forms(), sffxs{}, []operand.Op{})
}
// MINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MINPD m128 xmm
// MINPD xmm xmm
func MINPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMINPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MINPS m128 xmm
// MINPS xmm xmm
func MINPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMINPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MINSD m64 xmm
// MINSD xmm xmm
func MINSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMINSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// MINSS m32 xmm
// MINSS xmm xmm
func MINSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMINSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MONITOR: Monitor a Linear Address Range.
//
// Forms:
//
// MONITOR
func MONITOR() (*intrep.Instruction, error) {
return build(opcMONITOR.Forms(), sffxs{}, []operand.Op{})
}
// MOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPD m128 xmm
// MOVAPD xmm m128
// MOVAPD xmm xmm
func MOVAPD(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVAPD.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVAPS m128 xmm
// MOVAPS xmm m128
// MOVAPS xmm xmm
func MOVAPS(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVAPS.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVB: Move.
//
// Forms:
//
// MOVB imm8 m8
// MOVB imm8 r8
// MOVB m8 r8
// MOVB r8 m8
// MOVB r8 r8
func MOVB(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcMOVB.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// MOVBELL: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBELL m32 r32
// MOVBELL r32 m32
func MOVBELL(mr, mr1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBELL.Forms(), sffxs{}, []operand.Op{mr, mr1})
}
// MOVBEQQ: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEQQ m64 r64
// MOVBEQQ r64 m64
func MOVBEQQ(mr, mr1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBEQQ.Forms(), sffxs{}, []operand.Op{mr, mr1})
}
// MOVBEWW: Move Data After Swapping Bytes.
//
// Forms:
//
// MOVBEWW m16 r16
// MOVBEWW r16 m16
func MOVBEWW(mr, mr1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBEWW.Forms(), sffxs{}, []operand.Op{mr, mr1})
}
// MOVBLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBLSX m8 r32
// MOVBLSX r8 r32
func MOVBLSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBLSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVBLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBLZX m8 r32
// MOVBLZX r8 r32
func MOVBLZX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBLZX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVBQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBQSX m8 r64
// MOVBQSX r8 r64
func MOVBQSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBQSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVBQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBQZX m8 r64
// MOVBQZX r8 r64
func MOVBQZX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBQZX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVBWSX: Move with Sign-Extension.
//
// Forms:
//
// MOVBWSX m8 r16
// MOVBWSX r8 r16
func MOVBWSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBWSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVBWZX: Move with Zero-Extend.
//
// Forms:
//
// MOVBWZX m8 r16
// MOVBWZX r8 r16
func MOVBWZX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVBWZX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVD: Move.
//
// Forms:
//
// MOVD m32 xmm
// MOVD m64 xmm
// MOVD r32 xmm
// MOVD r64 xmm
// MOVD xmm m32
// MOVD xmm m64
// MOVD xmm r32
// MOVD xmm r64
// MOVD xmm xmm
// MOVD imm32 m64
// MOVD imm32 r64
// MOVD imm64 r64
// MOVD m64 r64
// MOVD r64 m64
// MOVD r64 r64
func MOVD(imrx, mrx operand.Op) (*intrep.Instruction, error) {
return build(opcMOVD.Forms(), sffxs{}, []operand.Op{imrx, mrx})
}
// MOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// MOVDDUP m64 xmm
// MOVDDUP xmm xmm
func MOVDDUP(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMOVDDUP.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MOVDQ2Q: Move.
//
// Forms:
//
// MOVDQ2Q m32 xmm
// MOVDQ2Q m64 xmm
// MOVDQ2Q r32 xmm
// MOVDQ2Q r64 xmm
// MOVDQ2Q xmm m32
// MOVDQ2Q xmm m64
// MOVDQ2Q xmm r32
// MOVDQ2Q xmm r64
// MOVDQ2Q xmm xmm
// MOVDQ2Q imm32 m64
// MOVDQ2Q imm32 r64
// MOVDQ2Q imm64 r64
// MOVDQ2Q m64 r64
// MOVDQ2Q r64 m64
// MOVDQ2Q r64 r64
func MOVDQ2Q(imrx, mrx operand.Op) (*intrep.Instruction, error) {
return build(opcMOVDQ2Q.Forms(), sffxs{}, []operand.Op{imrx, mrx})
}
// MOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// MOVHLPS xmm xmm
func MOVHLPS(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVHLPS.Forms(), sffxs{}, []operand.Op{x, x1})
}
// MOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVHPD m64 xmm
// MOVHPD xmm m64
func MOVHPD(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVHPD.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVHPS m64 xmm
// MOVHPS xmm m64
func MOVHPS(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVHPS.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVL: Move.
//
// Forms:
//
// MOVL imm32 m32
// MOVL imm32 r32
// MOVL m32 r32
// MOVL r32 m32
// MOVL r32 r32
func MOVL(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcMOVL.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// MOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// MOVLHPS xmm xmm
func MOVLHPS(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVLHPS.Forms(), sffxs{}, []operand.Op{x, x1})
}
// MOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVLPD m64 xmm
// MOVLPD xmm m64
func MOVLPD(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVLPD.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVLPS m64 xmm
// MOVLPS xmm m64
func MOVLPS(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVLPS.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVLQSX: Move Doubleword to Quadword with Sign-Extension.
//
// Forms:
//
// MOVLQSX m32 r64
// MOVLQSX r32 r64
func MOVLQSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVLQSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVLQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVLQZX m32 r64
func MOVLQZX(m, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVLQZX.Forms(), sffxs{}, []operand.Op{m, r})
}
// MOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPD xmm r32
func MOVMSKPD(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVMSKPD.Forms(), sffxs{}, []operand.Op{x, r})
}
// MOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// MOVMSKPS xmm r32
func MOVMSKPS(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVMSKPS.Forms(), sffxs{}, []operand.Op{x, r})
}
// MOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTDQ xmm m128
func MOVNTDQ(x, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTDQ.Forms(), sffxs{}, []operand.Op{x, m})
}
// MOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// MOVNTDQA m128 xmm
func MOVNTDQA(m, x operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTDQA.Forms(), sffxs{}, []operand.Op{m, x})
}
// MOVNTIL: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIL r32 m32
func MOVNTIL(r, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTIL.Forms(), sffxs{}, []operand.Op{r, m})
}
// MOVNTIQ: Store Doubleword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTIQ r64 m64
func MOVNTIQ(r, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTIQ.Forms(), sffxs{}, []operand.Op{r, m})
}
// MOVNTO: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTO xmm m128
func MOVNTO(x, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTO.Forms(), sffxs{}, []operand.Op{x, m})
}
// MOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPD xmm m128
func MOVNTPD(x, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTPD.Forms(), sffxs{}, []operand.Op{x, m})
}
// MOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// MOVNTPS xmm m128
func MOVNTPS(x, m operand.Op) (*intrep.Instruction, error) {
return build(opcMOVNTPS.Forms(), sffxs{}, []operand.Op{x, m})
}
// MOVO: Move Aligned Double Quadword.
//
// Forms:
//
// MOVO m128 xmm
// MOVO xmm m128
// MOVO xmm xmm
func MOVO(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVO.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVOA: Move Aligned Double Quadword.
//
// Forms:
//
// MOVOA m128 xmm
// MOVOA xmm m128
// MOVOA xmm xmm
func MOVOA(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVOA.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVOU: Move Unaligned Double Quadword.
//
// Forms:
//
// MOVOU m128 xmm
// MOVOU xmm m128
// MOVOU xmm xmm
func MOVOU(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVOU.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVQ: Move.
//
// Forms:
//
// MOVQ m32 xmm
// MOVQ m64 xmm
// MOVQ r32 xmm
// MOVQ r64 xmm
// MOVQ xmm m32
// MOVQ xmm m64
// MOVQ xmm r32
// MOVQ xmm r64
// MOVQ xmm xmm
// MOVQ imm32 m64
// MOVQ imm32 r64
// MOVQ imm64 r64
// MOVQ m64 r64
// MOVQ r64 m64
// MOVQ r64 r64
func MOVQ(imrx, mrx operand.Op) (*intrep.Instruction, error) {
return build(opcMOVQ.Forms(), sffxs{}, []operand.Op{imrx, mrx})
}
// MOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// MOVSD m64 xmm
// MOVSD xmm m64
// MOVSD xmm xmm
func MOVSD(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVSD.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// MOVSHDUP m128 xmm
// MOVSHDUP xmm xmm
func MOVSHDUP(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMOVSHDUP.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// MOVSLDUP m128 xmm
// MOVSLDUP xmm xmm
func MOVSLDUP(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMOVSLDUP.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVSS m32 xmm
// MOVSS xmm m32
// MOVSS xmm xmm
func MOVSS(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVSS.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPD m128 xmm
// MOVUPD xmm m128
// MOVUPD xmm xmm
func MOVUPD(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVUPD.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MOVUPS m128 xmm
// MOVUPS xmm m128
// MOVUPS xmm xmm
func MOVUPS(mx, mx1 operand.Op) (*intrep.Instruction, error) {
return build(opcMOVUPS.Forms(), sffxs{}, []operand.Op{mx, mx1})
}
// MOVW: Move.
//
// Forms:
//
// MOVW imm16 m16
// MOVW imm16 r16
// MOVW m16 r16
// MOVW r16 m16
// MOVW r16 r16
func MOVW(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcMOVW.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// MOVWLSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWLSX m16 r32
// MOVWLSX r16 r32
func MOVWLSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVWLSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVWLZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWLZX m16 r32
// MOVWLZX r16 r32
func MOVWLZX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVWLZX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVWQSX: Move with Sign-Extension.
//
// Forms:
//
// MOVWQSX m16 r64
// MOVWQSX r16 r64
func MOVWQSX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVWQSX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MOVWQZX: Move with Zero-Extend.
//
// Forms:
//
// MOVWQZX m16 r64
// MOVWQZX r16 r64
func MOVWQZX(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcMOVWQZX.Forms(), sffxs{}, []operand.Op{mr, r})
}
// MPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// MPSADBW imm8 m128 xmm
// MPSADBW imm8 xmm xmm
func MPSADBW(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMPSADBW.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// MULB: Unsigned Multiply.
//
// Forms:
//
// MULB m8
// MULB r8
func MULB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcMULB.Forms(), sffxs{}, []operand.Op{mr})
}
// MULL: Unsigned Multiply.
//
// Forms:
//
// MULL m32
// MULL r32
func MULL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcMULL.Forms(), sffxs{}, []operand.Op{mr})
}
// MULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// MULPD m128 xmm
// MULPD xmm xmm
func MULPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMULPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// MULPS m128 xmm
// MULPS xmm xmm
func MULPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMULPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MULQ: Unsigned Multiply.
//
// Forms:
//
// MULQ m64
// MULQ r64
func MULQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcMULQ.Forms(), sffxs{}, []operand.Op{mr})
}
// MULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// MULSD m64 xmm
// MULSD xmm xmm
func MULSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMULSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// MULSS m32 xmm
// MULSS xmm xmm
func MULSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcMULSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// MULW: Unsigned Multiply.
//
// Forms:
//
// MULW m16
// MULW r16
func MULW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcMULW.Forms(), sffxs{}, []operand.Op{mr})
}
// MULXL: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXL m32 r32 r32
// MULXL r32 r32 r32
func MULXL(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcMULXL.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// MULXQ: Unsigned Multiply Without Affecting Flags.
//
// Forms:
//
// MULXQ m64 r64 r64
// MULXQ r64 r64 r64
func MULXQ(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcMULXQ.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// MWAIT: Monitor Wait.
//
// Forms:
//
// MWAIT
func MWAIT() (*intrep.Instruction, error) {
return build(opcMWAIT.Forms(), sffxs{}, []operand.Op{})
}
// NEGB: Two's Complement Negation.
//
// Forms:
//
// NEGB m8
// NEGB r8
func NEGB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNEGB.Forms(), sffxs{}, []operand.Op{mr})
}
// NEGL: Two's Complement Negation.
//
// Forms:
//
// NEGL m32
// NEGL r32
func NEGL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNEGL.Forms(), sffxs{}, []operand.Op{mr})
}
// NEGQ: Two's Complement Negation.
//
// Forms:
//
// NEGQ m64
// NEGQ r64
func NEGQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNEGQ.Forms(), sffxs{}, []operand.Op{mr})
}
// NEGW: Two's Complement Negation.
//
// Forms:
//
// NEGW m16
// NEGW r16
func NEGW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNEGW.Forms(), sffxs{}, []operand.Op{mr})
}
// NOP: No Operation.
//
// Forms:
//
// NOP
func NOP() (*intrep.Instruction, error) {
return build(opcNOP.Forms(), sffxs{}, []operand.Op{})
}
// NOTB: One's Complement Negation.
//
// Forms:
//
// NOTB m8
// NOTB r8
func NOTB(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNOTB.Forms(), sffxs{}, []operand.Op{mr})
}
// NOTL: One's Complement Negation.
//
// Forms:
//
// NOTL m32
// NOTL r32
func NOTL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNOTL.Forms(), sffxs{}, []operand.Op{mr})
}
// NOTQ: One's Complement Negation.
//
// Forms:
//
// NOTQ m64
// NOTQ r64
func NOTQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNOTQ.Forms(), sffxs{}, []operand.Op{mr})
}
// NOTW: One's Complement Negation.
//
// Forms:
//
// NOTW m16
// NOTW r16
func NOTW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcNOTW.Forms(), sffxs{}, []operand.Op{mr})
}
// ORB: Logical Inclusive OR.
//
// Forms:
//
// ORB imm8 al
// ORB imm8 m8
// ORB imm8 r8
// ORB m8 r8
// ORB r8 m8
// ORB r8 r8
func ORB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcORB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// ORL: Logical Inclusive OR.
//
// Forms:
//
// ORL imm32 eax
// ORL imm32 m32
// ORL imm32 r32
// ORL imm8 m32
// ORL imm8 r32
// ORL m32 r32
// ORL r32 m32
// ORL r32 r32
func ORL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcORL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// ORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// ORPD m128 xmm
// ORPD xmm xmm
func ORPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcORPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// ORPS m128 xmm
// ORPS xmm xmm
func ORPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcORPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// ORQ: Logical Inclusive OR.
//
// Forms:
//
// ORQ imm32 m64
// ORQ imm32 r64
// ORQ imm32 rax
// ORQ imm8 m64
// ORQ imm8 r64
// ORQ m64 r64
// ORQ r64 m64
// ORQ r64 r64
func ORQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcORQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// ORW: Logical Inclusive OR.
//
// Forms:
//
// ORW imm16 ax
// ORW imm16 m16
// ORW imm16 r16
// ORW imm8 m16
// ORW imm8 r16
// ORW m16 r16
// ORW r16 m16
// ORW r16 r16
func ORW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcORW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// PABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// PABSB m128 xmm
// PABSB xmm xmm
func PABSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPABSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// PABSD m128 xmm
// PABSD xmm xmm
func PABSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPABSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// PABSW m128 xmm
// PABSW xmm xmm
func PABSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPABSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PACKSSLW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// PACKSSLW m128 xmm
// PACKSSLW xmm xmm
func PACKSSLW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPACKSSLW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// PACKSSWB m128 xmm
// PACKSSWB xmm xmm
func PACKSSWB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPACKSSWB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// PACKUSDW m128 xmm
// PACKUSDW xmm xmm
func PACKUSDW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPACKUSDW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// PACKUSWB m128 xmm
// PACKUSWB xmm xmm
func PACKUSWB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPACKUSWB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDB: Add Packed Byte Integers.
//
// Forms:
//
// PADDB m128 xmm
// PADDB xmm xmm
func PADDB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDD m128 xmm
// PADDD xmm xmm
func PADDD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDL: Add Packed Doubleword Integers.
//
// Forms:
//
// PADDL m128 xmm
// PADDL xmm xmm
func PADDL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// PADDQ m128 xmm
// PADDQ xmm xmm
func PADDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PADDSB m128 xmm
// PADDSB xmm xmm
func PADDSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PADDSW m128 xmm
// PADDSW xmm xmm
func PADDSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSB m128 xmm
// PADDUSB xmm xmm
func PADDUSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDUSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PADDUSW m128 xmm
// PADDUSW xmm xmm
func PADDUSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDUSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PADDW: Add Packed Word Integers.
//
// Forms:
//
// PADDW m128 xmm
// PADDW xmm xmm
func PADDW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPADDW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PALIGNR: Packed Align Right.
//
// Forms:
//
// PALIGNR imm8 m128 xmm
// PALIGNR imm8 xmm xmm
func PALIGNR(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPALIGNR.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PAND: Packed Bitwise Logical AND.
//
// Forms:
//
// PAND m128 xmm
// PAND xmm xmm
func PAND(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPAND.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// PANDN m128 xmm
// PANDN xmm xmm
func PANDN(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPANDN.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PAUSE: Spin Loop Hint.
//
// Forms:
//
// PAUSE
func PAUSE() (*intrep.Instruction, error) {
return build(opcPAUSE.Forms(), sffxs{}, []operand.Op{})
}
// PAVGB: Average Packed Byte Integers.
//
// Forms:
//
// PAVGB m128 xmm
// PAVGB xmm xmm
func PAVGB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPAVGB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PAVGW: Average Packed Word Integers.
//
// Forms:
//
// PAVGW m128 xmm
// PAVGW xmm xmm
func PAVGW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPAVGW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// PBLENDVB xmm0 m128 xmm
// PBLENDVB xmm0 xmm xmm
func PBLENDVB(x, mx, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcPBLENDVB.Forms(), sffxs{}, []operand.Op{x, mx, x1})
}
// PBLENDW: Blend Packed Words.
//
// Forms:
//
// PBLENDW imm8 m128 xmm
// PBLENDW imm8 xmm xmm
func PBLENDW(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPBLENDW.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// PCLMULQDQ imm8 m128 xmm
// PCLMULQDQ imm8 xmm xmm
func PCLMULQDQ(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCLMULQDQ.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// PCMPEQB m128 xmm
// PCMPEQB xmm xmm
func PCMPEQB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPEQB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPEQL: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// PCMPEQL m128 xmm
// PCMPEQL xmm xmm
func PCMPEQL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPEQL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// PCMPEQQ m128 xmm
// PCMPEQQ xmm xmm
func PCMPEQQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPEQQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// PCMPEQW m128 xmm
// PCMPEQW xmm xmm
func PCMPEQW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPEQW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// PCMPESTRI imm8 m128 xmm
// PCMPESTRI imm8 xmm xmm
func PCMPESTRI(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPESTRI.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPESTRM imm8 m128 xmm
// PCMPESTRM imm8 xmm xmm
func PCMPESTRM(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPESTRM.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// PCMPGTB m128 xmm
// PCMPGTB xmm xmm
func PCMPGTB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPGTB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPGTL: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// PCMPGTL m128 xmm
// PCMPGTL xmm xmm
func PCMPGTL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPGTL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// PCMPGTQ m128 xmm
// PCMPGTQ xmm xmm
func PCMPGTQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPGTQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// PCMPGTW m128 xmm
// PCMPGTW xmm xmm
func PCMPGTW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPGTW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// PCMPISTRI imm8 m128 xmm
// PCMPISTRI imm8 xmm xmm
func PCMPISTRI(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPISTRI.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// PCMPISTRM imm8 m128 xmm
// PCMPISTRM imm8 xmm xmm
func PCMPISTRM(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPCMPISTRM.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PDEPL: Parallel Bits Deposit.
//
// Forms:
//
// PDEPL m32 r32 r32
// PDEPL r32 r32 r32
func PDEPL(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcPDEPL.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// PDEPQ: Parallel Bits Deposit.
//
// Forms:
//
// PDEPQ m64 r64 r64
// PDEPQ r64 r64 r64
func PDEPQ(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcPDEPQ.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// PEXTL: Parallel Bits Extract.
//
// Forms:
//
// PEXTL m32 r32 r32
// PEXTL r32 r32 r32
func PEXTL(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTL.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// PEXTQ: Parallel Bits Extract.
//
// Forms:
//
// PEXTQ m64 r64 r64
// PEXTQ r64 r64 r64
func PEXTQ(mr, r, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTQ.Forms(), sffxs{}, []operand.Op{mr, r, r1})
}
// PEXTRB: Extract Byte.
//
// Forms:
//
// PEXTRB imm8 xmm m8
// PEXTRB imm8 xmm r32
func PEXTRB(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTRB.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// PEXTRD: Extract Doubleword.
//
// Forms:
//
// PEXTRD imm8 xmm m32
// PEXTRD imm8 xmm r32
func PEXTRD(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTRD.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// PEXTRQ: Extract Quadword.
//
// Forms:
//
// PEXTRQ imm8 xmm m64
// PEXTRQ imm8 xmm r64
func PEXTRQ(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTRQ.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// PEXTRW: Extract Word.
//
// Forms:
//
// PEXTRW imm8 xmm m16
// PEXTRW imm8 xmm r32
func PEXTRW(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcPEXTRW.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// PHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// PHADDD m128 xmm
// PHADDD xmm xmm
func PHADDD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHADDD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHADDSW m128 xmm
// PHADDSW xmm xmm
func PHADDSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHADDSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// PHADDW m128 xmm
// PHADDW xmm xmm
func PHADDW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHADDW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// PHMINPOSUW m128 xmm
// PHMINPOSUW xmm xmm
func PHMINPOSUW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHMINPOSUW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// PHSUBD m128 xmm
// PHSUBD xmm xmm
func PHSUBD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHSUBD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PHSUBSW m128 xmm
// PHSUBSW xmm xmm
func PHSUBSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHSUBSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// PHSUBW m128 xmm
// PHSUBW xmm xmm
func PHSUBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPHSUBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PINSRB: Insert Byte.
//
// Forms:
//
// PINSRB imm8 m8 xmm
// PINSRB imm8 r32 xmm
func PINSRB(i, mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcPINSRB.Forms(), sffxs{}, []operand.Op{i, mr, x})
}
// PINSRD: Insert Doubleword.
//
// Forms:
//
// PINSRD imm8 m32 xmm
// PINSRD imm8 r32 xmm
func PINSRD(i, mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcPINSRD.Forms(), sffxs{}, []operand.Op{i, mr, x})
}
// PINSRQ: Insert Quadword.
//
// Forms:
//
// PINSRQ imm8 m64 xmm
// PINSRQ imm8 r64 xmm
func PINSRQ(i, mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcPINSRQ.Forms(), sffxs{}, []operand.Op{i, mr, x})
}
// PINSRW: Insert Word.
//
// Forms:
//
// PINSRW imm8 m16 xmm
// PINSRW imm8 r32 xmm
func PINSRW(i, mr, x operand.Op) (*intrep.Instruction, error) {
return build(opcPINSRW.Forms(), sffxs{}, []operand.Op{i, mr, x})
}
// PMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// PMADDUBSW m128 xmm
// PMADDUBSW xmm xmm
func PMADDUBSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMADDUBSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMADDWL: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// PMADDWL m128 xmm
// PMADDWL xmm xmm
func PMADDWL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMADDWL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// PMAXSB m128 xmm
// PMAXSB xmm xmm
func PMAXSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMAXSD m128 xmm
// PMAXSD xmm xmm
func PMAXSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// PMAXSW m128 xmm
// PMAXSW xmm xmm
func PMAXSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMAXUB m128 xmm
// PMAXUB xmm xmm
func PMAXUB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXUB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMAXUD m128 xmm
// PMAXUD xmm xmm
func PMAXUD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXUD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMAXUW m128 xmm
// PMAXUW xmm xmm
func PMAXUW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMAXUW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// PMINSB m128 xmm
// PMINSB xmm xmm
func PMINSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// PMINSD m128 xmm
// PMINSD xmm xmm
func PMINSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// PMINSW m128 xmm
// PMINSW xmm xmm
func PMINSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// PMINUB m128 xmm
// PMINUB xmm xmm
func PMINUB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINUB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMINUD m128 xmm
// PMINUD xmm xmm
func PMINUD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINUD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// PMINUW m128 xmm
// PMINUW xmm xmm
func PMINUW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMINUW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVMSKB: Move Byte Mask.
//
// Forms:
//
// PMOVMSKB xmm r32
func PMOVMSKB(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVMSKB.Forms(), sffxs{}, []operand.Op{x, r})
}
// PMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBD m32 xmm
// PMOVSXBD xmm xmm
func PMOVSXBD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXBD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBQ m16 xmm
// PMOVSXBQ xmm xmm
func PMOVSXBQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXBQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// PMOVSXBW m64 xmm
// PMOVSXBW xmm xmm
func PMOVSXBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXDQ m64 xmm
// PMOVSXDQ xmm xmm
func PMOVSXDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWD m64 xmm
// PMOVSXWD xmm xmm
func PMOVSXWD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXWD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// PMOVSXWQ m32 xmm
// PMOVSXWQ xmm xmm
func PMOVSXWQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVSXWQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBD m32 xmm
// PMOVZXBD xmm xmm
func PMOVZXBD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXBD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBQ m16 xmm
// PMOVZXBQ xmm xmm
func PMOVZXBQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXBQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// PMOVZXBW m64 xmm
// PMOVZXBW xmm xmm
func PMOVZXBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXDQ m64 xmm
// PMOVZXDQ xmm xmm
func PMOVZXDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWD m64 xmm
// PMOVZXWD xmm xmm
func PMOVZXWD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXWD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// PMOVZXWQ m32 xmm
// PMOVZXWQ xmm xmm
func PMOVZXWQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMOVZXWQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// PMULDQ m128 xmm
// PMULDQ xmm xmm
func PMULDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// PMULHRSW m128 xmm
// PMULHRSW xmm xmm
func PMULHRSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULHRSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// PMULHUW m128 xmm
// PMULHUW xmm xmm
func PMULHUW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULHUW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// PMULHW m128 xmm
// PMULHW xmm xmm
func PMULHW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULHW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// PMULLD m128 xmm
// PMULLD xmm xmm
func PMULLD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULLD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// PMULLW m128 xmm
// PMULLW xmm xmm
func PMULLW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULLW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PMULULQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// PMULULQ m128 xmm
// PMULULQ xmm xmm
func PMULULQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPMULULQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// POPCNTL: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTL m32 r32
// POPCNTL r32 r32
func POPCNTL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcPOPCNTL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// POPCNTQ: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTQ m64 r64
// POPCNTQ r64 r64
func POPCNTQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcPOPCNTQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// POPCNTW: Count of Number of Bits Set to 1.
//
// Forms:
//
// POPCNTW m16 r16
// POPCNTW r16 r16
func POPCNTW(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcPOPCNTW.Forms(), sffxs{}, []operand.Op{mr, r})
}
// POPQ: Pop a Value from the Stack.
//
// Forms:
//
// POPQ m64
// POPQ r64
func POPQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcPOPQ.Forms(), sffxs{}, []operand.Op{mr})
}
// POPW: Pop a Value from the Stack.
//
// Forms:
//
// POPW m16
// POPW r16
func POPW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcPOPW.Forms(), sffxs{}, []operand.Op{mr})
}
// POR: Packed Bitwise Logical OR.
//
// Forms:
//
// POR m128 xmm
// POR xmm xmm
func POR(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPOR.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PREFETCHNTA: Prefetch Data Into Caches using NTA Hint.
//
// Forms:
//
// PREFETCHNTA m8
func PREFETCHNTA(m operand.Op) (*intrep.Instruction, error) {
return build(opcPREFETCHNTA.Forms(), sffxs{}, []operand.Op{m})
}
// PREFETCHT0: Prefetch Data Into Caches using T0 Hint.
//
// Forms:
//
// PREFETCHT0 m8
func PREFETCHT0(m operand.Op) (*intrep.Instruction, error) {
return build(opcPREFETCHT0.Forms(), sffxs{}, []operand.Op{m})
}
// PREFETCHT1: Prefetch Data Into Caches using T1 Hint.
//
// Forms:
//
// PREFETCHT1 m8
func PREFETCHT1(m operand.Op) (*intrep.Instruction, error) {
return build(opcPREFETCHT1.Forms(), sffxs{}, []operand.Op{m})
}
// PREFETCHT2: Prefetch Data Into Caches using T2 Hint.
//
// Forms:
//
// PREFETCHT2 m8
func PREFETCHT2(m operand.Op) (*intrep.Instruction, error) {
return build(opcPREFETCHT2.Forms(), sffxs{}, []operand.Op{m})
}
// PSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// PSADBW m128 xmm
// PSADBW xmm xmm
func PSADBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSADBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// PSHUFB m128 xmm
// PSHUFB xmm xmm
func PSHUFB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSHUFB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFD imm8 m128 xmm
// PSHUFD imm8 xmm xmm
func PSHUFD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSHUFD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// PSHUFHW imm8 m128 xmm
// PSHUFHW imm8 xmm xmm
func PSHUFHW(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSHUFHW.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PSHUFL: Shuffle Packed Doublewords.
//
// Forms:
//
// PSHUFL imm8 m128 xmm
// PSHUFL imm8 xmm xmm
func PSHUFL(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSHUFL.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// PSHUFLW imm8 m128 xmm
// PSHUFLW imm8 xmm xmm
func PSHUFLW(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSHUFLW.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// PSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// PSIGNB m128 xmm
// PSIGNB xmm xmm
func PSIGNB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSIGNB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// PSIGND m128 xmm
// PSIGND xmm xmm
func PSIGND(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSIGND.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// PSIGNW m128 xmm
// PSIGNW xmm xmm
func PSIGNW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSIGNW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLDQ imm8 xmm
func PSLLDQ(i, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSLLDQ.Forms(), sffxs{}, []operand.Op{i, x})
}
// PSLLL: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// PSLLL imm8 xmm
// PSLLL m128 xmm
// PSLLL xmm xmm
func PSLLL(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSLLL.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSLLO: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// PSLLO imm8 xmm
func PSLLO(i, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSLLO.Forms(), sffxs{}, []operand.Op{i, x})
}
// PSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// PSLLQ imm8 xmm
// PSLLQ m128 xmm
// PSLLQ xmm xmm
func PSLLQ(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSLLQ.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// PSLLW imm8 xmm
// PSLLW m128 xmm
// PSLLW xmm xmm
func PSLLW(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSLLW.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSRAL: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// PSRAL imm8 xmm
// PSRAL m128 xmm
// PSRAL xmm xmm
func PSRAL(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRAL.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// PSRAW imm8 xmm
// PSRAW m128 xmm
// PSRAW xmm xmm
func PSRAW(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRAW.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLDQ imm8 xmm
func PSRLDQ(i, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRLDQ.Forms(), sffxs{}, []operand.Op{i, x})
}
// PSRLL: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// PSRLL imm8 xmm
// PSRLL m128 xmm
// PSRLL xmm xmm
func PSRLL(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRLL.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSRLO: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// PSRLO imm8 xmm
func PSRLO(i, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRLO.Forms(), sffxs{}, []operand.Op{i, x})
}
// PSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// PSRLQ imm8 xmm
// PSRLQ m128 xmm
// PSRLQ xmm xmm
func PSRLQ(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRLQ.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// PSRLW imm8 xmm
// PSRLW m128 xmm
// PSRLW xmm xmm
func PSRLW(imx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSRLW.Forms(), sffxs{}, []operand.Op{imx, x})
}
// PSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// PSUBB m128 xmm
// PSUBB xmm xmm
func PSUBB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBL: Subtract Packed Doubleword Integers.
//
// Forms:
//
// PSUBL m128 xmm
// PSUBL xmm xmm
func PSUBL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// PSUBQ m128 xmm
// PSUBQ xmm xmm
func PSUBQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// PSUBSB m128 xmm
// PSUBSB xmm xmm
func PSUBSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// PSUBSW m128 xmm
// PSUBSW xmm xmm
func PSUBSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSB m128 xmm
// PSUBUSB xmm xmm
func PSUBUSB(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBUSB.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// PSUBUSW m128 xmm
// PSUBUSW xmm xmm
func PSUBUSW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBUSW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// PSUBW m128 xmm
// PSUBW xmm xmm
func PSUBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPSUBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PTEST: Packed Logical Compare.
//
// Forms:
//
// PTEST m128 xmm
// PTEST xmm xmm
func PTEST(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPTEST.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// PUNPCKHBW m128 xmm
// PUNPCKHBW xmm xmm
func PUNPCKHBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKHBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKHLQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKHLQ m128 xmm
// PUNPCKHLQ xmm xmm
func PUNPCKHLQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKHLQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKHQDQ m128 xmm
// PUNPCKHQDQ xmm xmm
func PUNPCKHQDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKHQDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKHWL: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKHWL m128 xmm
// PUNPCKHWL xmm xmm
func PUNPCKHWL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKHWL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// PUNPCKLBW m128 xmm
// PUNPCKLBW xmm xmm
func PUNPCKLBW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKLBW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKLLQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// PUNPCKLLQ m128 xmm
// PUNPCKLLQ xmm xmm
func PUNPCKLLQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKLLQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// PUNPCKLQDQ m128 xmm
// PUNPCKLQDQ xmm xmm
func PUNPCKLQDQ(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKLQDQ.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUNPCKLWL: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// PUNPCKLWL m128 xmm
// PUNPCKLWL xmm xmm
func PUNPCKLWL(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPUNPCKLWL.Forms(), sffxs{}, []operand.Op{mx, x})
}
// PUSHQ: Push Value Onto the Stack.
//
// Forms:
//
// PUSHQ imm32
// PUSHQ imm8
// PUSHQ m64
// PUSHQ r64
func PUSHQ(imr operand.Op) (*intrep.Instruction, error) {
return build(opcPUSHQ.Forms(), sffxs{}, []operand.Op{imr})
}
// PUSHW: Push Value Onto the Stack.
//
// Forms:
//
// PUSHW m16
// PUSHW r16
func PUSHW(mr operand.Op) (*intrep.Instruction, error) {
return build(opcPUSHW.Forms(), sffxs{}, []operand.Op{mr})
}
// PXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// PXOR m128 xmm
// PXOR xmm xmm
func PXOR(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcPXOR.Forms(), sffxs{}, []operand.Op{mx, x})
}
// RCLB: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLB 1 m8
// RCLB 1 r8
// RCLB cl m8
// RCLB cl r8
// RCLB imm8 m8
// RCLB imm8 r8
func RCLB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCLB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCLL: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLL 1 m32
// RCLL 1 r32
// RCLL cl m32
// RCLL cl r32
// RCLL imm8 m32
// RCLL imm8 r32
func RCLL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCLL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCLQ: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLQ 1 m64
// RCLQ 1 r64
// RCLQ cl m64
// RCLQ cl r64
// RCLQ imm8 m64
// RCLQ imm8 r64
func RCLQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCLQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCLW: Rotate Left through Carry Flag.
//
// Forms:
//
// RCLW 1 m16
// RCLW 1 r16
// RCLW cl m16
// RCLW cl r16
// RCLW imm8 m16
// RCLW imm8 r16
func RCLW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCLW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPPS m128 xmm
// RCPPS xmm xmm
func RCPPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcRCPPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// RCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// RCPSS m32 xmm
// RCPSS xmm xmm
func RCPSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcRCPSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// RCRB: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRB 1 m8
// RCRB 1 r8
// RCRB cl m8
// RCRB cl r8
// RCRB imm8 m8
// RCRB imm8 r8
func RCRB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCRB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCRL: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRL 1 m32
// RCRL 1 r32
// RCRL cl m32
// RCRL cl r32
// RCRL imm8 m32
// RCRL imm8 r32
func RCRL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCRL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCRQ: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRQ 1 m64
// RCRQ 1 r64
// RCRQ cl m64
// RCRQ cl r64
// RCRQ imm8 m64
// RCRQ imm8 r64
func RCRQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCRQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RCRW: Rotate Right through Carry Flag.
//
// Forms:
//
// RCRW 1 m16
// RCRW 1 r16
// RCRW cl m16
// RCRW cl r16
// RCRW imm8 m16
// RCRW imm8 r16
func RCRW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRCRW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RDRANDL: Read Random Number.
//
// Forms:
//
// RDRANDL r16
// RDRANDL r32
// RDRANDL r64
func RDRANDL(r operand.Op) (*intrep.Instruction, error) {
return build(opcRDRANDL.Forms(), sffxs{}, []operand.Op{r})
}
// RDSEEDL: Read Random SEED.
//
// Forms:
//
// RDSEEDL r16
// RDSEEDL r32
// RDSEEDL r64
func RDSEEDL(r operand.Op) (*intrep.Instruction, error) {
return build(opcRDSEEDL.Forms(), sffxs{}, []operand.Op{r})
}
// RDTSC: Read Time-Stamp Counter.
//
// Forms:
//
// RDTSC
func RDTSC() (*intrep.Instruction, error) {
return build(opcRDTSC.Forms(), sffxs{}, []operand.Op{})
}
// RDTSCP: Read Time-Stamp Counter and Processor ID.
//
// Forms:
//
// RDTSCP
func RDTSCP() (*intrep.Instruction, error) {
return build(opcRDTSCP.Forms(), sffxs{}, []operand.Op{})
}
// RET: Return from Procedure.
//
// Forms:
//
// RET
func RET() (*intrep.Instruction, error) {
return build(opcRET.Forms(), sffxs{}, []operand.Op{})
}
// RETFL: Return from Procedure.
//
// Forms:
//
// RETFL imm16
func RETFL(i operand.Op) (*intrep.Instruction, error) {
return build(opcRETFL.Forms(), sffxs{}, []operand.Op{i})
}
// RETFQ: Return from Procedure.
//
// Forms:
//
// RETFQ imm16
func RETFQ(i operand.Op) (*intrep.Instruction, error) {
return build(opcRETFQ.Forms(), sffxs{}, []operand.Op{i})
}
// RETFW: Return from Procedure.
//
// Forms:
//
// RETFW imm16
func RETFW(i operand.Op) (*intrep.Instruction, error) {
return build(opcRETFW.Forms(), sffxs{}, []operand.Op{i})
}
// ROLB: Rotate Left.
//
// Forms:
//
// ROLB 1 m8
// ROLB 1 r8
// ROLB cl m8
// ROLB cl r8
// ROLB imm8 m8
// ROLB imm8 r8
func ROLB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcROLB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// ROLL: Rotate Left.
//
// Forms:
//
// ROLL 1 m32
// ROLL 1 r32
// ROLL cl m32
// ROLL cl r32
// ROLL imm8 m32
// ROLL imm8 r32
func ROLL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcROLL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// ROLQ: Rotate Left.
//
// Forms:
//
// ROLQ 1 m64
// ROLQ 1 r64
// ROLQ cl m64
// ROLQ cl r64
// ROLQ imm8 m64
// ROLQ imm8 r64
func ROLQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcROLQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// ROLW: Rotate Left.
//
// Forms:
//
// ROLW 1 m16
// ROLW 1 r16
// ROLW cl m16
// ROLW cl r16
// ROLW imm8 m16
// ROLW imm8 r16
func ROLW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcROLW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RORB: Rotate Right.
//
// Forms:
//
// RORB 1 m8
// RORB 1 r8
// RORB cl m8
// RORB cl r8
// RORB imm8 m8
// RORB imm8 r8
func RORB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRORB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RORL: Rotate Right.
//
// Forms:
//
// RORL 1 m32
// RORL 1 r32
// RORL cl m32
// RORL cl r32
// RORL imm8 m32
// RORL imm8 r32
func RORL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRORL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RORQ: Rotate Right.
//
// Forms:
//
// RORQ 1 m64
// RORQ 1 r64
// RORQ cl m64
// RORQ cl r64
// RORQ imm8 m64
// RORQ imm8 r64
func RORQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRORQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RORW: Rotate Right.
//
// Forms:
//
// RORW 1 m16
// RORW 1 r16
// RORW cl m16
// RORW cl r16
// RORW imm8 m16
// RORW imm8 r16
func RORW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcRORW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// RORXL: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXL imm8 m32 r32
// RORXL imm8 r32 r32
func RORXL(i, mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcRORXL.Forms(), sffxs{}, []operand.Op{i, mr, r})
}
// RORXQ: Rotate Right Logical Without Affecting Flags.
//
// Forms:
//
// RORXQ imm8 m64 r64
// RORXQ imm8 r64 r64
func RORXQ(i, mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcRORXQ.Forms(), sffxs{}, []operand.Op{i, mr, r})
}
// ROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPD imm8 m128 xmm
// ROUNDPD imm8 xmm xmm
func ROUNDPD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcROUNDPD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// ROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDPS imm8 m128 xmm
// ROUNDPS imm8 xmm xmm
func ROUNDPS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcROUNDPS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// ROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSD imm8 m64 xmm
// ROUNDSD imm8 xmm xmm
func ROUNDSD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcROUNDSD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// ROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// ROUNDSS imm8 m32 xmm
// ROUNDSS imm8 xmm xmm
func ROUNDSS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcROUNDSS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// RSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// RSQRTPS m128 xmm
// RSQRTPS xmm xmm
func RSQRTPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcRSQRTPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// RSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// RSQRTSS m32 xmm
// RSQRTSS xmm xmm
func RSQRTSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcRSQRTSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SALB: Arithmetic Shift Left.
//
// Forms:
//
// SALB 1 m8
// SALB 1 r8
// SALB cl m8
// SALB cl r8
// SALB imm8 m8
// SALB imm8 r8
func SALB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSALB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SALL: Arithmetic Shift Left.
//
// Forms:
//
// SALL 1 m32
// SALL 1 r32
// SALL cl m32
// SALL cl r32
// SALL imm8 m32
// SALL imm8 r32
func SALL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSALL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SALQ: Arithmetic Shift Left.
//
// Forms:
//
// SALQ 1 m64
// SALQ 1 r64
// SALQ cl m64
// SALQ cl r64
// SALQ imm8 m64
// SALQ imm8 r64
func SALQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSALQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SALW: Arithmetic Shift Left.
//
// Forms:
//
// SALW 1 m16
// SALW 1 r16
// SALW cl m16
// SALW cl r16
// SALW imm8 m16
// SALW imm8 r16
func SALW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSALW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SARB: Arithmetic Shift Right.
//
// Forms:
//
// SARB 1 m8
// SARB 1 r8
// SARB cl m8
// SARB cl r8
// SARB imm8 m8
// SARB imm8 r8
func SARB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSARB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SARL: Arithmetic Shift Right.
//
// Forms:
//
// SARL 1 m32
// SARL 1 r32
// SARL cl m32
// SARL cl r32
// SARL imm8 m32
// SARL imm8 r32
func SARL(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSARL.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SARQ: Arithmetic Shift Right.
//
// Forms:
//
// SARQ 1 m64
// SARQ 1 r64
// SARQ cl m64
// SARQ cl r64
// SARQ imm8 m64
// SARQ imm8 r64
func SARQ(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSARQ.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SARW: Arithmetic Shift Right.
//
// Forms:
//
// SARW 1 m16
// SARW 1 r16
// SARW cl m16
// SARW cl r16
// SARW imm8 m16
// SARW imm8 r16
func SARW(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSARW.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SARXL: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXL r32 m32 r32
// SARXL r32 r32 r32
func SARXL(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSARXL.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SARXQ: Arithmetic Shift Right Without Affecting Flags.
//
// Forms:
//
// SARXQ r64 m64 r64
// SARXQ r64 r64 r64
func SARXQ(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSARXQ.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SBBB: Subtract with Borrow.
//
// Forms:
//
// SBBB imm8 al
// SBBB imm8 m8
// SBBB imm8 r8
// SBBB m8 r8
// SBBB r8 m8
// SBBB r8 r8
func SBBB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcSBBB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// SBBL: Subtract with Borrow.
//
// Forms:
//
// SBBL imm32 eax
// SBBL imm32 m32
// SBBL imm32 r32
// SBBL imm8 m32
// SBBL imm8 r32
// SBBL m32 r32
// SBBL r32 m32
// SBBL r32 r32
func SBBL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcSBBL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// SBBQ: Subtract with Borrow.
//
// Forms:
//
// SBBQ imm32 m64
// SBBQ imm32 r64
// SBBQ imm32 rax
// SBBQ imm8 m64
// SBBQ imm8 r64
// SBBQ m64 r64
// SBBQ r64 m64
// SBBQ r64 r64
func SBBQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSBBQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// SBBW: Subtract with Borrow.
//
// Forms:
//
// SBBW imm16 ax
// SBBW imm16 m16
// SBBW imm16 r16
// SBBW imm8 m16
// SBBW imm8 r16
// SBBW m16 r16
// SBBW r16 m16
// SBBW r16 r16
func SBBW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcSBBW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// SETCC: Set byte if above or equal (CF == 0).
//
// Forms:
//
// SETCC m8
// SETCC r8
func SETCC(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETCC.Forms(), sffxs{}, []operand.Op{mr})
}
// SETCS: Set byte if below (CF == 1).
//
// Forms:
//
// SETCS m8
// SETCS r8
func SETCS(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETCS.Forms(), sffxs{}, []operand.Op{mr})
}
// SETEQ: Set byte if equal (ZF == 1).
//
// Forms:
//
// SETEQ m8
// SETEQ r8
func SETEQ(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETEQ.Forms(), sffxs{}, []operand.Op{mr})
}
// SETGE: Set byte if greater or equal (SF == OF).
//
// Forms:
//
// SETGE m8
// SETGE r8
func SETGE(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETGE.Forms(), sffxs{}, []operand.Op{mr})
}
// SETGT: Set byte if greater (ZF == 0 and SF == OF).
//
// Forms:
//
// SETGT m8
// SETGT r8
func SETGT(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETGT.Forms(), sffxs{}, []operand.Op{mr})
}
// SETHI: Set byte if above (CF == 0 and ZF == 0).
//
// Forms:
//
// SETHI m8
// SETHI r8
func SETHI(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETHI.Forms(), sffxs{}, []operand.Op{mr})
}
// SETLE: Set byte if less or equal (ZF == 1 or SF != OF).
//
// Forms:
//
// SETLE m8
// SETLE r8
func SETLE(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETLE.Forms(), sffxs{}, []operand.Op{mr})
}
// SETLS: Set byte if below or equal (CF == 1 or ZF == 1).
//
// Forms:
//
// SETLS m8
// SETLS r8
func SETLS(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETLS.Forms(), sffxs{}, []operand.Op{mr})
}
// SETLT: Set byte if less (SF != OF).
//
// Forms:
//
// SETLT m8
// SETLT r8
func SETLT(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETLT.Forms(), sffxs{}, []operand.Op{mr})
}
// SETMI: Set byte if sign (SF == 1).
//
// Forms:
//
// SETMI m8
// SETMI r8
func SETMI(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETMI.Forms(), sffxs{}, []operand.Op{mr})
}
// SETNE: Set byte if not equal (ZF == 0).
//
// Forms:
//
// SETNE m8
// SETNE r8
func SETNE(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETNE.Forms(), sffxs{}, []operand.Op{mr})
}
// SETOC: Set byte if not overflow (OF == 0).
//
// Forms:
//
// SETOC m8
// SETOC r8
func SETOC(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETOC.Forms(), sffxs{}, []operand.Op{mr})
}
// SETOS: Set byte if overflow (OF == 1).
//
// Forms:
//
// SETOS m8
// SETOS r8
func SETOS(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETOS.Forms(), sffxs{}, []operand.Op{mr})
}
// SETPC: Set byte if not parity (PF == 0).
//
// Forms:
//
// SETPC m8
// SETPC r8
func SETPC(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETPC.Forms(), sffxs{}, []operand.Op{mr})
}
// SETPL: Set byte if not sign (SF == 0).
//
// Forms:
//
// SETPL m8
// SETPL r8
func SETPL(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETPL.Forms(), sffxs{}, []operand.Op{mr})
}
// SETPS: Set byte if parity (PF == 1).
//
// Forms:
//
// SETPS m8
// SETPS r8
func SETPS(mr operand.Op) (*intrep.Instruction, error) {
return build(opcSETPS.Forms(), sffxs{}, []operand.Op{mr})
}
// SFENCE: Store Fence.
//
// Forms:
//
// SFENCE
func SFENCE() (*intrep.Instruction, error) {
return build(opcSFENCE.Forms(), sffxs{}, []operand.Op{})
}
// SHA1MSG1: Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG1 m128 xmm
// SHA1MSG1 xmm xmm
func SHA1MSG1(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA1MSG1.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SHA1MSG2: Perform a Final Calculation for the Next Four SHA1 Message Doublewords.
//
// Forms:
//
// SHA1MSG2 m128 xmm
// SHA1MSG2 xmm xmm
func SHA1MSG2(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA1MSG2.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SHA1NEXTE: Calculate SHA1 State Variable E after Four Rounds.
//
// Forms:
//
// SHA1NEXTE m128 xmm
// SHA1NEXTE xmm xmm
func SHA1NEXTE(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA1NEXTE.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SHA1RNDS4: Perform Four Rounds of SHA1 Operation.
//
// Forms:
//
// SHA1RNDS4 imm2u m128 xmm
// SHA1RNDS4 imm2u xmm xmm
func SHA1RNDS4(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA1RNDS4.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// SHA256MSG1: Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG1 m128 xmm
// SHA256MSG1 xmm xmm
func SHA256MSG1(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA256MSG1.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SHA256MSG2: Perform a Final Calculation for the Next Four SHA256 Message Doublewords.
//
// Forms:
//
// SHA256MSG2 m128 xmm
// SHA256MSG2 xmm xmm
func SHA256MSG2(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHA256MSG2.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SHA256RNDS2: Perform Two Rounds of SHA256 Operation.
//
// Forms:
//
// SHA256RNDS2 xmm0 m128 xmm
// SHA256RNDS2 xmm0 xmm xmm
func SHA256RNDS2(x, mx, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcSHA256RNDS2.Forms(), sffxs{}, []operand.Op{x, mx, x1})
}
// SHLB: Logical Shift Left.
//
// Forms:
//
// SHLB 1 m8
// SHLB 1 r8
// SHLB cl m8
// SHLB cl r8
// SHLB imm8 m8
// SHLB imm8 r8
func SHLB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSHLB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SHLL: Logical Shift Left.
//
// Forms:
//
// SHLL 1 m32
// SHLL 1 r32
// SHLL cl m32
// SHLL cl r32
// SHLL cl r32 m32
// SHLL cl r32 r32
// SHLL imm8 m32
// SHLL imm8 r32
// SHLL imm8 r32 m32
// SHLL imm8 r32 r32
func SHLL(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHLL.Forms(), sffxs{}, ops)
}
// SHLQ: Logical Shift Left.
//
// Forms:
//
// SHLQ 1 m64
// SHLQ 1 r64
// SHLQ cl m64
// SHLQ cl r64
// SHLQ cl r64 m64
// SHLQ cl r64 r64
// SHLQ imm8 m64
// SHLQ imm8 r64
// SHLQ imm8 r64 m64
// SHLQ imm8 r64 r64
func SHLQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHLQ.Forms(), sffxs{}, ops)
}
// SHLW: Logical Shift Left.
//
// Forms:
//
// SHLW 1 m16
// SHLW 1 r16
// SHLW cl m16
// SHLW cl r16
// SHLW cl r16 m16
// SHLW cl r16 r16
// SHLW imm8 m16
// SHLW imm8 r16
// SHLW imm8 r16 m16
// SHLW imm8 r16 r16
func SHLW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHLW.Forms(), sffxs{}, ops)
}
// SHLXL: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXL r32 m32 r32
// SHLXL r32 r32 r32
func SHLXL(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSHLXL.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SHLXQ: Logical Shift Left Without Affecting Flags.
//
// Forms:
//
// SHLXQ r64 m64 r64
// SHLXQ r64 r64 r64
func SHLXQ(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSHLXQ.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SHRB: Logical Shift Right.
//
// Forms:
//
// SHRB 1 m8
// SHRB 1 r8
// SHRB cl m8
// SHRB cl r8
// SHRB imm8 m8
// SHRB imm8 r8
func SHRB(ci, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSHRB.Forms(), sffxs{}, []operand.Op{ci, mr})
}
// SHRL: Logical Shift Right.
//
// Forms:
//
// SHRL 1 m32
// SHRL 1 r32
// SHRL cl m32
// SHRL cl r32
// SHRL cl r32 m32
// SHRL cl r32 r32
// SHRL imm8 m32
// SHRL imm8 r32
// SHRL imm8 r32 m32
// SHRL imm8 r32 r32
func SHRL(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHRL.Forms(), sffxs{}, ops)
}
// SHRQ: Logical Shift Right.
//
// Forms:
//
// SHRQ 1 m64
// SHRQ 1 r64
// SHRQ cl m64
// SHRQ cl r64
// SHRQ cl r64 m64
// SHRQ cl r64 r64
// SHRQ imm8 m64
// SHRQ imm8 r64
// SHRQ imm8 r64 m64
// SHRQ imm8 r64 r64
func SHRQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHRQ.Forms(), sffxs{}, ops)
}
// SHRW: Logical Shift Right.
//
// Forms:
//
// SHRW 1 m16
// SHRW 1 r16
// SHRW cl m16
// SHRW cl r16
// SHRW cl r16 m16
// SHRW cl r16 r16
// SHRW imm8 m16
// SHRW imm8 r16
// SHRW imm8 r16 m16
// SHRW imm8 r16 r16
func SHRW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcSHRW.Forms(), sffxs{}, ops)
}
// SHRXL: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXL r32 m32 r32
// SHRXL r32 r32 r32
func SHRXL(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSHRXL.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SHRXQ: Logical Shift Right Without Affecting Flags.
//
// Forms:
//
// SHRXQ r64 m64 r64
// SHRXQ r64 r64 r64
func SHRXQ(r, mr, r1 operand.Op) (*intrep.Instruction, error) {
return build(opcSHRXQ.Forms(), sffxs{}, []operand.Op{r, mr, r1})
}
// SHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPD imm8 m128 xmm
// SHUFPD imm8 xmm xmm
func SHUFPD(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHUFPD.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// SHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SHUFPS imm8 m128 xmm
// SHUFPS imm8 xmm xmm
func SHUFPS(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSHUFPS.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// SQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPD m128 xmm
// SQRTPD xmm xmm
func SQRTPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSQRTPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SQRTPS m128 xmm
// SQRTPS xmm xmm
func SQRTPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSQRTPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSD m64 xmm
// SQRTSD xmm xmm
func SQRTSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSQRTSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// SQRTSS m32 xmm
// SQRTSS xmm xmm
func SQRTSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSQRTSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// STC: Set Carry Flag.
//
// Forms:
//
// STC
func STC() (*intrep.Instruction, error) {
return build(opcSTC.Forms(), sffxs{}, []operand.Op{})
}
// STD: Set Direction Flag.
//
// Forms:
//
// STD
func STD() (*intrep.Instruction, error) {
return build(opcSTD.Forms(), sffxs{}, []operand.Op{})
}
// STMXCSR: Store MXCSR Register State.
//
// Forms:
//
// STMXCSR m32
func STMXCSR(m operand.Op) (*intrep.Instruction, error) {
return build(opcSTMXCSR.Forms(), sffxs{}, []operand.Op{m})
}
// SUBB: Subtract.
//
// Forms:
//
// SUBB imm8 al
// SUBB imm8 m8
// SUBB imm8 r8
// SUBB m8 r8
// SUBB r8 m8
// SUBB r8 r8
func SUBB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcSUBB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// SUBL: Subtract.
//
// Forms:
//
// SUBL imm32 eax
// SUBL imm32 m32
// SUBL imm32 r32
// SUBL imm8 m32
// SUBL imm8 r32
// SUBL m32 r32
// SUBL r32 m32
// SUBL r32 r32
func SUBL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcSUBL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// SUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBPD m128 xmm
// SUBPD xmm xmm
func SUBPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSUBPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBPS m128 xmm
// SUBPS xmm xmm
func SUBPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSUBPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SUBQ: Subtract.
//
// Forms:
//
// SUBQ imm32 m64
// SUBQ imm32 r64
// SUBQ imm32 rax
// SUBQ imm8 m64
// SUBQ imm8 r64
// SUBQ m64 r64
// SUBQ r64 m64
// SUBQ r64 r64
func SUBQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcSUBQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// SUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// SUBSD m64 xmm
// SUBSD xmm xmm
func SUBSD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSUBSD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// SUBSS m32 xmm
// SUBSS xmm xmm
func SUBSS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcSUBSS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// SUBW: Subtract.
//
// Forms:
//
// SUBW imm16 ax
// SUBW imm16 m16
// SUBW imm16 r16
// SUBW imm8 m16
// SUBW imm8 r16
// SUBW m16 r16
// SUBW r16 m16
// SUBW r16 r16
func SUBW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcSUBW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// SYSCALL: Fast System Call.
//
// Forms:
//
// SYSCALL
func SYSCALL() (*intrep.Instruction, error) {
return build(opcSYSCALL.Forms(), sffxs{}, []operand.Op{})
}
// TESTB: Logical Compare.
//
// Forms:
//
// TESTB imm8 al
// TESTB imm8 m8
// TESTB imm8 r8
// TESTB r8 m8
// TESTB r8 r8
func TESTB(ir, amr operand.Op) (*intrep.Instruction, error) {
return build(opcTESTB.Forms(), sffxs{}, []operand.Op{ir, amr})
}
// TESTL: Logical Compare.
//
// Forms:
//
// TESTL imm32 eax
// TESTL imm32 m32
// TESTL imm32 r32
// TESTL r32 m32
// TESTL r32 r32
func TESTL(ir, emr operand.Op) (*intrep.Instruction, error) {
return build(opcTESTL.Forms(), sffxs{}, []operand.Op{ir, emr})
}
// TESTQ: Logical Compare.
//
// Forms:
//
// TESTQ imm32 m64
// TESTQ imm32 r64
// TESTQ imm32 rax
// TESTQ r64 m64
// TESTQ r64 r64
func TESTQ(ir, mr operand.Op) (*intrep.Instruction, error) {
return build(opcTESTQ.Forms(), sffxs{}, []operand.Op{ir, mr})
}
// TESTW: Logical Compare.
//
// Forms:
//
// TESTW imm16 ax
// TESTW imm16 m16
// TESTW imm16 r16
// TESTW r16 m16
// TESTW r16 r16
func TESTW(ir, amr operand.Op) (*intrep.Instruction, error) {
return build(opcTESTW.Forms(), sffxs{}, []operand.Op{ir, amr})
}
// TZCNTL: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTL m32 r32
// TZCNTL r32 r32
func TZCNTL(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcTZCNTL.Forms(), sffxs{}, []operand.Op{mr, r})
}
// TZCNTQ: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTQ m64 r64
// TZCNTQ r64 r64
func TZCNTQ(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcTZCNTQ.Forms(), sffxs{}, []operand.Op{mr, r})
}
// TZCNTW: Count the Number of Trailing Zero Bits.
//
// Forms:
//
// TZCNTW m16 r16
// TZCNTW r16 r16
func TZCNTW(mr, r operand.Op) (*intrep.Instruction, error) {
return build(opcTZCNTW.Forms(), sffxs{}, []operand.Op{mr, r})
}
// UCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISD m64 xmm
// UCOMISD xmm xmm
func UCOMISD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUCOMISD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// UCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// UCOMISS m32 xmm
// UCOMISS xmm xmm
func UCOMISS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUCOMISS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// UD2: Undefined Instruction.
//
// Forms:
//
// UD2
func UD2() (*intrep.Instruction, error) {
return build(opcUD2.Forms(), sffxs{}, []operand.Op{})
}
// UNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPD m128 xmm
// UNPCKHPD xmm xmm
func UNPCKHPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUNPCKHPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// UNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKHPS m128 xmm
// UNPCKHPS xmm xmm
func UNPCKHPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUNPCKHPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// UNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPD m128 xmm
// UNPCKLPD xmm xmm
func UNPCKLPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUNPCKLPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// UNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// UNPCKLPS m128 xmm
// UNPCKLPS xmm xmm
func UNPCKLPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcUNPCKLPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VADDPD: Add Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDPD m128 xmm xmm
// VADDPD m256 ymm ymm
// VADDPD xmm xmm xmm
// VADDPD ymm ymm ymm
// VADDPD m128 xmm k xmm
// VADDPD m256 ymm k ymm
// VADDPD xmm xmm k xmm
// VADDPD ymm ymm k ymm
// VADDPD m512 zmm k zmm
// VADDPD m512 zmm zmm
// VADDPD zmm zmm k zmm
// VADDPD zmm zmm zmm
func VADDPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{}, ops)
}
// VADDPD_BCST: Add Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPD.BCST m64 xmm k xmm
// VADDPD.BCST m64 xmm xmm
// VADDPD.BCST m64 ymm k ymm
// VADDPD.BCST m64 ymm ymm
// VADDPD.BCST m64 zmm k zmm
// VADDPD.BCST m64 zmm zmm
func VADDPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxBCST}, ops)
}
// VADDPD_BCST_Z: Add Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPD.BCST.Z m64 xmm k xmm
// VADDPD.BCST.Z m64 ymm k ymm
// VADDPD.BCST.Z m64 zmm k zmm
func VADDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VADDPD_RD_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPD.RD_SAE zmm zmm k zmm
// VADDPD.RD_SAE zmm zmm zmm
func VADDPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VADDPD_RD_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RD_SAE.Z zmm zmm k zmm
func VADDPD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPD_RN_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPD.RN_SAE zmm zmm k zmm
// VADDPD.RN_SAE zmm zmm zmm
func VADDPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VADDPD_RN_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPD.RN_SAE.Z zmm zmm k zmm
func VADDPD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPD_RU_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPD.RU_SAE zmm zmm k zmm
// VADDPD.RU_SAE zmm zmm zmm
func VADDPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VADDPD_RU_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPD.RU_SAE.Z zmm zmm k zmm
func VADDPD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPD_RZ_SAE: Add Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPD.RZ_SAE zmm zmm k zmm
// VADDPD.RZ_SAE zmm zmm zmm
func VADDPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VADDPD_RZ_SAE_Z: Add Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPD.RZ_SAE.Z zmm zmm k zmm
func VADDPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPD_Z: Add Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPD.Z m128 xmm k xmm
// VADDPD.Z m256 ymm k ymm
// VADDPD.Z xmm xmm k xmm
// VADDPD.Z ymm ymm k ymm
// VADDPD.Z m512 zmm k zmm
// VADDPD.Z zmm zmm k zmm
func VADDPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VADDPS: Add Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDPS m128 xmm xmm
// VADDPS m256 ymm ymm
// VADDPS xmm xmm xmm
// VADDPS ymm ymm ymm
// VADDPS m128 xmm k xmm
// VADDPS m256 ymm k ymm
// VADDPS xmm xmm k xmm
// VADDPS ymm ymm k ymm
// VADDPS m512 zmm k zmm
// VADDPS m512 zmm zmm
// VADDPS zmm zmm k zmm
// VADDPS zmm zmm zmm
func VADDPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{}, ops)
}
// VADDPS_BCST: Add Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VADDPS.BCST m32 xmm k xmm
// VADDPS.BCST m32 xmm xmm
// VADDPS.BCST m32 ymm k ymm
// VADDPS.BCST m32 ymm ymm
// VADDPS.BCST m32 zmm k zmm
// VADDPS.BCST m32 zmm zmm
func VADDPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxBCST}, ops)
}
// VADDPS_BCST_Z: Add Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VADDPS.BCST.Z m32 xmm k xmm
// VADDPS.BCST.Z m32 ymm k ymm
// VADDPS.BCST.Z m32 zmm k zmm
func VADDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VADDPS_RD_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDPS.RD_SAE zmm zmm k zmm
// VADDPS.RD_SAE zmm zmm zmm
func VADDPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VADDPS_RD_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RD_SAE.Z zmm zmm k zmm
func VADDPS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPS_RN_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDPS.RN_SAE zmm zmm k zmm
// VADDPS.RN_SAE zmm zmm zmm
func VADDPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VADDPS_RN_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDPS.RN_SAE.Z zmm zmm k zmm
func VADDPS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPS_RU_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDPS.RU_SAE zmm zmm k zmm
// VADDPS.RU_SAE zmm zmm zmm
func VADDPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VADDPS_RU_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDPS.RU_SAE.Z zmm zmm k zmm
func VADDPS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPS_RZ_SAE: Add Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDPS.RZ_SAE zmm zmm k zmm
// VADDPS.RZ_SAE zmm zmm zmm
func VADDPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VADDPS_RZ_SAE_Z: Add Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDPS.RZ_SAE.Z zmm zmm k zmm
func VADDPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VADDPS_Z: Add Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDPS.Z m128 xmm k xmm
// VADDPS.Z m256 ymm k ymm
// VADDPS.Z xmm xmm k xmm
// VADDPS.Z ymm ymm k ymm
// VADDPS.Z m512 zmm k zmm
// VADDPS.Z zmm zmm k zmm
func VADDPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VADDSD: Add Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VADDSD m64 xmm xmm
// VADDSD xmm xmm xmm
// VADDSD m64 xmm k xmm
// VADDSD xmm xmm k xmm
func VADDSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{}, ops)
}
// VADDSD_RD_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSD.RD_SAE xmm xmm k xmm
// VADDSD.RD_SAE xmm xmm xmm
func VADDSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VADDSD_RD_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RD_SAE.Z xmm xmm k xmm
func VADDSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSD_RN_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSD.RN_SAE xmm xmm k xmm
// VADDSD.RN_SAE xmm xmm xmm
func VADDSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VADDSD_RN_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSD.RN_SAE.Z xmm xmm k xmm
func VADDSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSD_RU_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSD.RU_SAE xmm xmm k xmm
// VADDSD.RU_SAE xmm xmm xmm
func VADDSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VADDSD_RU_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSD.RU_SAE.Z xmm xmm k xmm
func VADDSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSD_RZ_SAE: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSD.RZ_SAE xmm xmm k xmm
// VADDSD.RZ_SAE xmm xmm xmm
func VADDSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VADDSD_RZ_SAE_Z: Add Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSD.RZ_SAE.Z xmm xmm k xmm
func VADDSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSD_Z: Add Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSD.Z m64 xmm k xmm
// VADDSD.Z xmm xmm k xmm
func VADDSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VADDSS: Add Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VADDSS m32 xmm xmm
// VADDSS xmm xmm xmm
// VADDSS m32 xmm k xmm
// VADDSS xmm xmm k xmm
func VADDSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{}, ops)
}
// VADDSS_RD_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VADDSS.RD_SAE xmm xmm k xmm
// VADDSS.RD_SAE xmm xmm xmm
func VADDSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VADDSS_RD_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RD_SAE.Z xmm xmm k xmm
func VADDSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSS_RN_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VADDSS.RN_SAE xmm xmm k xmm
// VADDSS.RN_SAE xmm xmm xmm
func VADDSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VADDSS_RN_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VADDSS.RN_SAE.Z xmm xmm k xmm
func VADDSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSS_RU_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VADDSS.RU_SAE xmm xmm k xmm
// VADDSS.RU_SAE xmm xmm xmm
func VADDSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VADDSS_RU_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VADDSS.RU_SAE.Z xmm xmm k xmm
func VADDSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSS_RZ_SAE: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VADDSS.RZ_SAE xmm xmm k xmm
// VADDSS.RZ_SAE xmm xmm xmm
func VADDSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VADDSS_RZ_SAE_Z: Add Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VADDSS.RZ_SAE.Z xmm xmm k xmm
func VADDSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VADDSS_Z: Add Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VADDSS.Z m32 xmm k xmm
// VADDSS.Z xmm xmm k xmm
func VADDSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VADDSUBPD: Packed Double-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPD m128 xmm xmm
// VADDSUBPD m256 ymm ymm
// VADDSUBPD xmm xmm xmm
// VADDSUBPD ymm ymm ymm
func VADDSUBPD(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSUBPD.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VADDSUBPS: Packed Single-FP Add/Subtract.
//
// Forms:
//
// VADDSUBPS m128 xmm xmm
// VADDSUBPS m256 ymm ymm
// VADDSUBPS xmm xmm xmm
// VADDSUBPS ymm ymm ymm
func VADDSUBPS(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVADDSUBPS.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VAESDEC: Perform One Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDEC m128 xmm xmm
// VAESDEC xmm xmm xmm
func VAESDEC(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVAESDEC.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VAESDECLAST: Perform Last Round of an AES Decryption Flow.
//
// Forms:
//
// VAESDECLAST m128 xmm xmm
// VAESDECLAST xmm xmm xmm
func VAESDECLAST(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVAESDECLAST.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VAESENC: Perform One Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENC m128 xmm xmm
// VAESENC xmm xmm xmm
func VAESENC(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVAESENC.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VAESENCLAST: Perform Last Round of an AES Encryption Flow.
//
// Forms:
//
// VAESENCLAST m128 xmm xmm
// VAESENCLAST xmm xmm xmm
func VAESENCLAST(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVAESENCLAST.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VAESIMC: Perform the AES InvMixColumn Transformation.
//
// Forms:
//
// VAESIMC m128 xmm
// VAESIMC xmm xmm
func VAESIMC(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVAESIMC.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VAESKEYGENASSIST: AES Round Key Generation Assist.
//
// Forms:
//
// VAESKEYGENASSIST imm8 m128 xmm
// VAESKEYGENASSIST imm8 xmm xmm
func VAESKEYGENASSIST(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVAESKEYGENASSIST.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// VALIGND: Align Doubleword Vectors.
//
// Forms:
//
// VALIGND imm8 m128 xmm k xmm
// VALIGND imm8 m128 xmm xmm
// VALIGND imm8 m256 ymm k ymm
// VALIGND imm8 m256 ymm ymm
// VALIGND imm8 xmm xmm k xmm
// VALIGND imm8 xmm xmm xmm
// VALIGND imm8 ymm ymm k ymm
// VALIGND imm8 ymm ymm ymm
// VALIGND imm8 m512 zmm k zmm
// VALIGND imm8 m512 zmm zmm
// VALIGND imm8 zmm zmm k zmm
// VALIGND imm8 zmm zmm zmm
func VALIGND(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGND.Forms(), sffxs{}, ops)
}
// VALIGND_BCST: Align Doubleword Vectors (Broadcast).
//
// Forms:
//
// VALIGND.BCST imm8 m32 xmm k xmm
// VALIGND.BCST imm8 m32 xmm xmm
// VALIGND.BCST imm8 m32 ymm k ymm
// VALIGND.BCST imm8 m32 ymm ymm
// VALIGND.BCST imm8 m32 zmm k zmm
// VALIGND.BCST imm8 m32 zmm zmm
func VALIGND_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGND.Forms(), sffxs{sffxBCST}, ops)
}
// VALIGND_BCST_Z: Align Doubleword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGND.BCST.Z imm8 m32 xmm k xmm
// VALIGND.BCST.Z imm8 m32 ymm k ymm
// VALIGND.BCST.Z imm8 m32 zmm k zmm
func VALIGND_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGND.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VALIGND_Z: Align Doubleword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGND.Z imm8 m128 xmm k xmm
// VALIGND.Z imm8 m256 ymm k ymm
// VALIGND.Z imm8 xmm xmm k xmm
// VALIGND.Z imm8 ymm ymm k ymm
// VALIGND.Z imm8 m512 zmm k zmm
// VALIGND.Z imm8 zmm zmm k zmm
func VALIGND_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGND.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VALIGNQ: Align Quadword Vectors.
//
// Forms:
//
// VALIGNQ imm8 m128 xmm k xmm
// VALIGNQ imm8 m128 xmm xmm
// VALIGNQ imm8 m256 ymm k ymm
// VALIGNQ imm8 m256 ymm ymm
// VALIGNQ imm8 xmm xmm k xmm
// VALIGNQ imm8 xmm xmm xmm
// VALIGNQ imm8 ymm ymm k ymm
// VALIGNQ imm8 ymm ymm ymm
// VALIGNQ imm8 m512 zmm k zmm
// VALIGNQ imm8 m512 zmm zmm
// VALIGNQ imm8 zmm zmm k zmm
// VALIGNQ imm8 zmm zmm zmm
func VALIGNQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGNQ.Forms(), sffxs{}, ops)
}
// VALIGNQ_BCST: Align Quadword Vectors (Broadcast).
//
// Forms:
//
// VALIGNQ.BCST imm8 m64 xmm k xmm
// VALIGNQ.BCST imm8 m64 xmm xmm
// VALIGNQ.BCST imm8 m64 ymm k ymm
// VALIGNQ.BCST imm8 m64 ymm ymm
// VALIGNQ.BCST imm8 m64 zmm k zmm
// VALIGNQ.BCST imm8 m64 zmm zmm
func VALIGNQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGNQ.Forms(), sffxs{sffxBCST}, ops)
}
// VALIGNQ_BCST_Z: Align Quadword Vectors (Broadcast, Zeroing Masking).
//
// Forms:
//
// VALIGNQ.BCST.Z imm8 m64 xmm k xmm
// VALIGNQ.BCST.Z imm8 m64 ymm k ymm
// VALIGNQ.BCST.Z imm8 m64 zmm k zmm
func VALIGNQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGNQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VALIGNQ_Z: Align Quadword Vectors (Zeroing Masking).
//
// Forms:
//
// VALIGNQ.Z imm8 m128 xmm k xmm
// VALIGNQ.Z imm8 m256 ymm k ymm
// VALIGNQ.Z imm8 xmm xmm k xmm
// VALIGNQ.Z imm8 ymm ymm k ymm
// VALIGNQ.Z imm8 m512 zmm k zmm
// VALIGNQ.Z imm8 zmm zmm k zmm
func VALIGNQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVALIGNQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VANDNPD: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPD m128 xmm xmm
// VANDNPD m256 ymm ymm
// VANDNPD xmm xmm xmm
// VANDNPD ymm ymm ymm
// VANDNPD m128 xmm k xmm
// VANDNPD m256 ymm k ymm
// VANDNPD xmm xmm k xmm
// VANDNPD ymm ymm k ymm
// VANDNPD m512 zmm k zmm
// VANDNPD m512 zmm zmm
// VANDNPD zmm zmm k zmm
// VANDNPD zmm zmm zmm
func VANDNPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPD.Forms(), sffxs{}, ops)
}
// VANDNPD_BCST: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPD.BCST m64 xmm k xmm
// VANDNPD.BCST m64 xmm xmm
// VANDNPD.BCST m64 ymm k ymm
// VANDNPD.BCST m64 ymm ymm
// VANDNPD.BCST m64 zmm k zmm
// VANDNPD.BCST m64 zmm zmm
func VANDNPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPD.Forms(), sffxs{sffxBCST}, ops)
}
// VANDNPD_BCST_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPD.BCST.Z m64 xmm k xmm
// VANDNPD.BCST.Z m64 ymm k ymm
// VANDNPD.BCST.Z m64 zmm k zmm
func VANDNPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VANDNPD_Z: Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPD.Z m128 xmm k xmm
// VANDNPD.Z m256 ymm k ymm
// VANDNPD.Z xmm xmm k xmm
// VANDNPD.Z ymm ymm k ymm
// VANDNPD.Z m512 zmm k zmm
// VANDNPD.Z zmm zmm k zmm
func VANDNPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VANDNPS: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDNPS m128 xmm xmm
// VANDNPS m256 ymm ymm
// VANDNPS xmm xmm xmm
// VANDNPS ymm ymm ymm
// VANDNPS m128 xmm k xmm
// VANDNPS m256 ymm k ymm
// VANDNPS xmm xmm k xmm
// VANDNPS ymm ymm k ymm
// VANDNPS m512 zmm k zmm
// VANDNPS m512 zmm zmm
// VANDNPS zmm zmm k zmm
// VANDNPS zmm zmm zmm
func VANDNPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPS.Forms(), sffxs{}, ops)
}
// VANDNPS_BCST: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDNPS.BCST m32 xmm k xmm
// VANDNPS.BCST m32 xmm xmm
// VANDNPS.BCST m32 ymm k ymm
// VANDNPS.BCST m32 ymm ymm
// VANDNPS.BCST m32 zmm k zmm
// VANDNPS.BCST m32 zmm zmm
func VANDNPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPS.Forms(), sffxs{sffxBCST}, ops)
}
// VANDNPS_BCST_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDNPS.BCST.Z m32 xmm k xmm
// VANDNPS.BCST.Z m32 ymm k ymm
// VANDNPS.BCST.Z m32 zmm k zmm
func VANDNPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VANDNPS_Z: Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDNPS.Z m128 xmm k xmm
// VANDNPS.Z m256 ymm k ymm
// VANDNPS.Z xmm xmm k xmm
// VANDNPS.Z ymm ymm k ymm
// VANDNPS.Z m512 zmm k zmm
// VANDNPS.Z zmm zmm k zmm
func VANDNPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDNPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VANDPD: Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VANDPD m128 xmm xmm
// VANDPD m256 ymm ymm
// VANDPD xmm xmm xmm
// VANDPD ymm ymm ymm
// VANDPD m128 xmm k xmm
// VANDPD m256 ymm k ymm
// VANDPD xmm xmm k xmm
// VANDPD ymm ymm k ymm
// VANDPD m512 zmm k zmm
// VANDPD m512 zmm zmm
// VANDPD zmm zmm k zmm
// VANDPD zmm zmm zmm
func VANDPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPD.Forms(), sffxs{}, ops)
}
// VANDPD_BCST: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPD.BCST m64 xmm k xmm
// VANDPD.BCST m64 xmm xmm
// VANDPD.BCST m64 ymm k ymm
// VANDPD.BCST m64 ymm ymm
// VANDPD.BCST m64 zmm k zmm
// VANDPD.BCST m64 zmm zmm
func VANDPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPD.Forms(), sffxs{sffxBCST}, ops)
}
// VANDPD_BCST_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPD.BCST.Z m64 xmm k xmm
// VANDPD.BCST.Z m64 ymm k ymm
// VANDPD.BCST.Z m64 zmm k zmm
func VANDPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VANDPD_Z: Bitwise Logical AND of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPD.Z m128 xmm k xmm
// VANDPD.Z m256 ymm k ymm
// VANDPD.Z xmm xmm k xmm
// VANDPD.Z ymm ymm k ymm
// VANDPD.Z m512 zmm k zmm
// VANDPD.Z zmm zmm k zmm
func VANDPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VANDPS: Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VANDPS m128 xmm xmm
// VANDPS m256 ymm ymm
// VANDPS xmm xmm xmm
// VANDPS ymm ymm ymm
// VANDPS m128 xmm k xmm
// VANDPS m256 ymm k ymm
// VANDPS xmm xmm k xmm
// VANDPS ymm ymm k ymm
// VANDPS m512 zmm k zmm
// VANDPS m512 zmm zmm
// VANDPS zmm zmm k zmm
// VANDPS zmm zmm zmm
func VANDPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPS.Forms(), sffxs{}, ops)
}
// VANDPS_BCST: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VANDPS.BCST m32 xmm k xmm
// VANDPS.BCST m32 xmm xmm
// VANDPS.BCST m32 ymm k ymm
// VANDPS.BCST m32 ymm ymm
// VANDPS.BCST m32 zmm k zmm
// VANDPS.BCST m32 zmm zmm
func VANDPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPS.Forms(), sffxs{sffxBCST}, ops)
}
// VANDPS_BCST_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VANDPS.BCST.Z m32 xmm k xmm
// VANDPS.BCST.Z m32 ymm k ymm
// VANDPS.BCST.Z m32 zmm k zmm
func VANDPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VANDPS_Z: Bitwise Logical AND of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VANDPS.Z m128 xmm k xmm
// VANDPS.Z m256 ymm k ymm
// VANDPS.Z xmm xmm k xmm
// VANDPS.Z ymm ymm k ymm
// VANDPS.Z m512 zmm k zmm
// VANDPS.Z zmm zmm k zmm
func VANDPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVANDPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VBLENDMPD: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPD m128 xmm k xmm
// VBLENDMPD m128 xmm xmm
// VBLENDMPD m256 ymm k ymm
// VBLENDMPD m256 ymm ymm
// VBLENDMPD xmm xmm k xmm
// VBLENDMPD xmm xmm xmm
// VBLENDMPD ymm ymm k ymm
// VBLENDMPD ymm ymm ymm
// VBLENDMPD m512 zmm k zmm
// VBLENDMPD m512 zmm zmm
// VBLENDMPD zmm zmm k zmm
// VBLENDMPD zmm zmm zmm
func VBLENDMPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPD.Forms(), sffxs{}, ops)
}
// VBLENDMPD_BCST: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPD.BCST m64 xmm k xmm
// VBLENDMPD.BCST m64 xmm xmm
// VBLENDMPD.BCST m64 ymm k ymm
// VBLENDMPD.BCST m64 ymm ymm
// VBLENDMPD.BCST m64 zmm k zmm
// VBLENDMPD.BCST m64 zmm zmm
func VBLENDMPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPD.Forms(), sffxs{sffxBCST}, ops)
}
// VBLENDMPD_BCST_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.BCST.Z m64 xmm k xmm
// VBLENDMPD.BCST.Z m64 ymm k ymm
// VBLENDMPD.BCST.Z m64 zmm k zmm
func VBLENDMPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VBLENDMPD_Z: Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPD.Z m128 xmm k xmm
// VBLENDMPD.Z m256 ymm k ymm
// VBLENDMPD.Z xmm xmm k xmm
// VBLENDMPD.Z ymm ymm k ymm
// VBLENDMPD.Z m512 zmm k zmm
// VBLENDMPD.Z zmm zmm k zmm
func VBLENDMPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VBLENDMPS: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control.
//
// Forms:
//
// VBLENDMPS m128 xmm k xmm
// VBLENDMPS m128 xmm xmm
// VBLENDMPS m256 ymm k ymm
// VBLENDMPS m256 ymm ymm
// VBLENDMPS xmm xmm k xmm
// VBLENDMPS xmm xmm xmm
// VBLENDMPS ymm ymm k ymm
// VBLENDMPS ymm ymm ymm
// VBLENDMPS m512 zmm k zmm
// VBLENDMPS m512 zmm zmm
// VBLENDMPS zmm zmm k zmm
// VBLENDMPS zmm zmm zmm
func VBLENDMPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPS.Forms(), sffxs{}, ops)
}
// VBLENDMPS_BCST: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VBLENDMPS.BCST m32 xmm k xmm
// VBLENDMPS.BCST m32 xmm xmm
// VBLENDMPS.BCST m32 ymm k ymm
// VBLENDMPS.BCST m32 ymm ymm
// VBLENDMPS.BCST m32 zmm k zmm
// VBLENDMPS.BCST m32 zmm zmm
func VBLENDMPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPS.Forms(), sffxs{sffxBCST}, ops)
}
// VBLENDMPS_BCST_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.BCST.Z m32 xmm k xmm
// VBLENDMPS.BCST.Z m32 ymm k ymm
// VBLENDMPS.BCST.Z m32 zmm k zmm
func VBLENDMPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VBLENDMPS_Z: Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VBLENDMPS.Z m128 xmm k xmm
// VBLENDMPS.Z m256 ymm k ymm
// VBLENDMPS.Z xmm xmm k xmm
// VBLENDMPS.Z ymm ymm k ymm
// VBLENDMPS.Z m512 zmm k zmm
// VBLENDMPS.Z zmm zmm k zmm
func VBLENDMPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDMPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VBLENDPD: Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPD imm8 m128 xmm xmm
// VBLENDPD imm8 m256 ymm ymm
// VBLENDPD imm8 xmm xmm xmm
// VBLENDPD imm8 ymm ymm ymm
func VBLENDPD(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDPD.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VBLENDPS: Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDPS imm8 m128 xmm xmm
// VBLENDPS imm8 m256 ymm ymm
// VBLENDPS imm8 xmm xmm xmm
// VBLENDPS imm8 ymm ymm ymm
func VBLENDPS(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDPS.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VBLENDVPD: Variable Blend Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPD xmm m128 xmm xmm
// VBLENDVPD xmm xmm xmm xmm
// VBLENDVPD ymm m256 ymm ymm
// VBLENDVPD ymm ymm ymm ymm
func VBLENDVPD(xy, mxy, xy1, xy2 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDVPD.Forms(), sffxs{}, []operand.Op{xy, mxy, xy1, xy2})
}
// VBLENDVPS: Variable Blend Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VBLENDVPS xmm m128 xmm xmm
// VBLENDVPS xmm xmm xmm xmm
// VBLENDVPS ymm m256 ymm ymm
// VBLENDVPS ymm ymm ymm ymm
func VBLENDVPS(xy, mxy, xy1, xy2 operand.Op) (*intrep.Instruction, error) {
return build(opcVBLENDVPS.Forms(), sffxs{}, []operand.Op{xy, mxy, xy1, xy2})
}
// VBROADCASTF128: Broadcast 128 Bit of Floating-Point Data.
//
// Forms:
//
// VBROADCASTF128 m128 ymm
func VBROADCASTF128(m, y operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF128.Forms(), sffxs{}, []operand.Op{m, y})
}
// VBROADCASTF32X2: Broadcast Two Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X2 m64 k ymm
// VBROADCASTF32X2 m64 ymm
// VBROADCASTF32X2 xmm k ymm
// VBROADCASTF32X2 xmm ymm
// VBROADCASTF32X2 m64 k zmm
// VBROADCASTF32X2 m64 zmm
// VBROADCASTF32X2 xmm k zmm
// VBROADCASTF32X2 xmm zmm
func VBROADCASTF32X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X2.Forms(), sffxs{}, ops)
}
// VBROADCASTF32X2_Z: Broadcast Two Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X2.Z m64 k ymm
// VBROADCASTF32X2.Z xmm k ymm
// VBROADCASTF32X2.Z m64 k zmm
// VBROADCASTF32X2.Z xmm k zmm
func VBROADCASTF32X2_Z(mx, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X2.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, yz})
}
// VBROADCASTF32X4: Broadcast Four Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X4 m128 k ymm
// VBROADCASTF32X4 m128 ymm
// VBROADCASTF32X4 m128 k zmm
// VBROADCASTF32X4 m128 zmm
func VBROADCASTF32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X4.Forms(), sffxs{}, ops)
}
// VBROADCASTF32X4_Z: Broadcast Four Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X4.Z m128 k ymm
// VBROADCASTF32X4.Z m128 k zmm
func VBROADCASTF32X4_Z(m, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X4.Forms(), sffxs{sffxZ}, []operand.Op{m, k, yz})
}
// VBROADCASTF32X8: Broadcast Eight Single-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF32X8 m256 k zmm
// VBROADCASTF32X8 m256 zmm
func VBROADCASTF32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X8.Forms(), sffxs{}, ops)
}
// VBROADCASTF32X8_Z: Broadcast Eight Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF32X8.Z m256 k zmm
func VBROADCASTF32X8_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF32X8.Forms(), sffxs{sffxZ}, []operand.Op{m, k, z})
}
// VBROADCASTF64X2: Broadcast Two Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X2 m128 k ymm
// VBROADCASTF64X2 m128 ymm
// VBROADCASTF64X2 m128 k zmm
// VBROADCASTF64X2 m128 zmm
func VBROADCASTF64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF64X2.Forms(), sffxs{}, ops)
}
// VBROADCASTF64X2_Z: Broadcast Two Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X2.Z m128 k ymm
// VBROADCASTF64X2.Z m128 k zmm
func VBROADCASTF64X2_Z(m, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF64X2.Forms(), sffxs{sffxZ}, []operand.Op{m, k, yz})
}
// VBROADCASTF64X4: Broadcast Four Double-Precision Floating-Point Elements.
//
// Forms:
//
// VBROADCASTF64X4 m256 k zmm
// VBROADCASTF64X4 m256 zmm
func VBROADCASTF64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF64X4.Forms(), sffxs{}, ops)
}
// VBROADCASTF64X4_Z: Broadcast Four Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTF64X4.Z m256 k zmm
func VBROADCASTF64X4_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTF64X4.Forms(), sffxs{sffxZ}, []operand.Op{m, k, z})
}
// VBROADCASTI128: Broadcast 128 Bits of Integer Data.
//
// Forms:
//
// VBROADCASTI128 m128 ymm
func VBROADCASTI128(m, y operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI128.Forms(), sffxs{}, []operand.Op{m, y})
}
// VBROADCASTI32X2: Broadcast Two Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X2 m64 k xmm
// VBROADCASTI32X2 m64 k ymm
// VBROADCASTI32X2 m64 xmm
// VBROADCASTI32X2 m64 ymm
// VBROADCASTI32X2 xmm k xmm
// VBROADCASTI32X2 xmm k ymm
// VBROADCASTI32X2 xmm xmm
// VBROADCASTI32X2 xmm ymm
// VBROADCASTI32X2 m64 k zmm
// VBROADCASTI32X2 m64 zmm
// VBROADCASTI32X2 xmm k zmm
// VBROADCASTI32X2 xmm zmm
func VBROADCASTI32X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X2.Forms(), sffxs{}, ops)
}
// VBROADCASTI32X2_Z: Broadcast Two Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X2.Z m64 k xmm
// VBROADCASTI32X2.Z m64 k ymm
// VBROADCASTI32X2.Z xmm k xmm
// VBROADCASTI32X2.Z xmm k ymm
// VBROADCASTI32X2.Z m64 k zmm
// VBROADCASTI32X2.Z xmm k zmm
func VBROADCASTI32X2_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X2.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VBROADCASTI32X4: Broadcast Four Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X4 m128 k ymm
// VBROADCASTI32X4 m128 ymm
// VBROADCASTI32X4 m128 k zmm
// VBROADCASTI32X4 m128 zmm
func VBROADCASTI32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X4.Forms(), sffxs{}, ops)
}
// VBROADCASTI32X4_Z: Broadcast Four Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X4.Z m128 k ymm
// VBROADCASTI32X4.Z m128 k zmm
func VBROADCASTI32X4_Z(m, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X4.Forms(), sffxs{sffxZ}, []operand.Op{m, k, yz})
}
// VBROADCASTI32X8: Broadcast Eight Doubleword Elements.
//
// Forms:
//
// VBROADCASTI32X8 m256 k zmm
// VBROADCASTI32X8 m256 zmm
func VBROADCASTI32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X8.Forms(), sffxs{}, ops)
}
// VBROADCASTI32X8_Z: Broadcast Eight Doubleword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI32X8.Z m256 k zmm
func VBROADCASTI32X8_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI32X8.Forms(), sffxs{sffxZ}, []operand.Op{m, k, z})
}
// VBROADCASTI64X2: Broadcast Two Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X2 m128 k ymm
// VBROADCASTI64X2 m128 ymm
// VBROADCASTI64X2 m128 k zmm
// VBROADCASTI64X2 m128 zmm
func VBROADCASTI64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI64X2.Forms(), sffxs{}, ops)
}
// VBROADCASTI64X2_Z: Broadcast Two Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X2.Z m128 k ymm
// VBROADCASTI64X2.Z m128 k zmm
func VBROADCASTI64X2_Z(m, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI64X2.Forms(), sffxs{sffxZ}, []operand.Op{m, k, yz})
}
// VBROADCASTI64X4: Broadcast Four Quadword Elements.
//
// Forms:
//
// VBROADCASTI64X4 m256 k zmm
// VBROADCASTI64X4 m256 zmm
func VBROADCASTI64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI64X4.Forms(), sffxs{}, ops)
}
// VBROADCASTI64X4_Z: Broadcast Four Quadword Elements (Zeroing Masking).
//
// Forms:
//
// VBROADCASTI64X4.Z m256 k zmm
func VBROADCASTI64X4_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTI64X4.Forms(), sffxs{sffxZ}, []operand.Op{m, k, z})
}
// VBROADCASTSD: Broadcast Double-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSD xmm ymm
// VBROADCASTSD m64 ymm
// VBROADCASTSD m64 k ymm
// VBROADCASTSD xmm k ymm
// VBROADCASTSD m64 k zmm
// VBROADCASTSD m64 zmm
// VBROADCASTSD xmm k zmm
// VBROADCASTSD xmm zmm
func VBROADCASTSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTSD.Forms(), sffxs{}, ops)
}
// VBROADCASTSD_Z: Broadcast Double-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSD.Z m64 k ymm
// VBROADCASTSD.Z xmm k ymm
// VBROADCASTSD.Z m64 k zmm
// VBROADCASTSD.Z xmm k zmm
func VBROADCASTSD_Z(mx, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, yz})
}
// VBROADCASTSS: Broadcast Single-Precision Floating-Point Element.
//
// Forms:
//
// VBROADCASTSS xmm xmm
// VBROADCASTSS xmm ymm
// VBROADCASTSS m32 xmm
// VBROADCASTSS m32 ymm
// VBROADCASTSS m32 k ymm
// VBROADCASTSS xmm k ymm
// VBROADCASTSS m32 k zmm
// VBROADCASTSS m32 zmm
// VBROADCASTSS xmm k zmm
// VBROADCASTSS xmm zmm
func VBROADCASTSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTSS.Forms(), sffxs{}, ops)
}
// VBROADCASTSS_Z: Broadcast Single-Precision Floating-Point Element (Zeroing Masking).
//
// Forms:
//
// VBROADCASTSS.Z m32 k ymm
// VBROADCASTSS.Z xmm k ymm
// VBROADCASTSS.Z m32 k zmm
// VBROADCASTSS.Z xmm k zmm
func VBROADCASTSS_Z(mx, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVBROADCASTSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, yz})
}
// VCMPPD: Compare Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPD imm8 m128 xmm xmm
// VCMPPD imm8 m256 ymm ymm
// VCMPPD imm8 xmm xmm xmm
// VCMPPD imm8 ymm ymm ymm
// VCMPPD imm8 m128 xmm k k
// VCMPPD imm8 m128 xmm k
// VCMPPD imm8 m256 ymm k k
// VCMPPD imm8 m256 ymm k
// VCMPPD imm8 xmm xmm k k
// VCMPPD imm8 xmm xmm k
// VCMPPD imm8 ymm ymm k k
// VCMPPD imm8 ymm ymm k
// VCMPPD imm8 m512 zmm k k
// VCMPPD imm8 m512 zmm k
// VCMPPD imm8 zmm zmm k k
// VCMPPD imm8 zmm zmm k
func VCMPPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPD.Forms(), sffxs{}, ops)
}
// VCMPPD_BCST: Compare Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPD.BCST imm8 m64 xmm k k
// VCMPPD.BCST imm8 m64 xmm k
// VCMPPD.BCST imm8 m64 ymm k k
// VCMPPD.BCST imm8 m64 ymm k
// VCMPPD.BCST imm8 m64 zmm k k
// VCMPPD.BCST imm8 m64 zmm k
func VCMPPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPD.Forms(), sffxs{sffxBCST}, ops)
}
// VCMPPD_SAE: Compare Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPD.SAE imm8 zmm zmm k k
// VCMPPD.SAE imm8 zmm zmm k
func VCMPPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPD.Forms(), sffxs{sffxSAE}, ops)
}
// VCMPPS: Compare Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPPS imm8 m128 xmm xmm
// VCMPPS imm8 m256 ymm ymm
// VCMPPS imm8 xmm xmm xmm
// VCMPPS imm8 ymm ymm ymm
// VCMPPS imm8 m128 xmm k k
// VCMPPS imm8 m128 xmm k
// VCMPPS imm8 m256 ymm k k
// VCMPPS imm8 m256 ymm k
// VCMPPS imm8 xmm xmm k k
// VCMPPS imm8 xmm xmm k
// VCMPPS imm8 ymm ymm k k
// VCMPPS imm8 ymm ymm k
// VCMPPS imm8 m512 zmm k k
// VCMPPS imm8 m512 zmm k
// VCMPPS imm8 zmm zmm k k
// VCMPPS imm8 zmm zmm k
func VCMPPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPS.Forms(), sffxs{}, ops)
}
// VCMPPS_BCST: Compare Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCMPPS.BCST imm8 m32 xmm k k
// VCMPPS.BCST imm8 m32 xmm k
// VCMPPS.BCST imm8 m32 ymm k k
// VCMPPS.BCST imm8 m32 ymm k
// VCMPPS.BCST imm8 m32 zmm k k
// VCMPPS.BCST imm8 m32 zmm k
func VCMPPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPS.Forms(), sffxs{sffxBCST}, ops)
}
// VCMPPS_SAE: Compare Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPPS.SAE imm8 zmm zmm k k
// VCMPPS.SAE imm8 zmm zmm k
func VCMPPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPPS.Forms(), sffxs{sffxSAE}, ops)
}
// VCMPSD: Compare Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSD imm8 m64 xmm xmm
// VCMPSD imm8 xmm xmm xmm
// VCMPSD imm8 m64 xmm k k
// VCMPSD imm8 m64 xmm k
// VCMPSD imm8 xmm xmm k k
// VCMPSD imm8 xmm xmm k
func VCMPSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPSD.Forms(), sffxs{}, ops)
}
// VCMPSD_SAE: Compare Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSD.SAE imm8 xmm xmm k k
// VCMPSD.SAE imm8 xmm xmm k
func VCMPSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPSD.Forms(), sffxs{sffxSAE}, ops)
}
// VCMPSS: Compare Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VCMPSS imm8 m32 xmm xmm
// VCMPSS imm8 xmm xmm xmm
// VCMPSS imm8 m32 xmm k k
// VCMPSS imm8 m32 xmm k
// VCMPSS imm8 xmm xmm k k
// VCMPSS imm8 xmm xmm k
func VCMPSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPSS.Forms(), sffxs{}, ops)
}
// VCMPSS_SAE: Compare Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VCMPSS.SAE imm8 xmm xmm k k
// VCMPSS.SAE imm8 xmm xmm k
func VCMPSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCMPSS.Forms(), sffxs{sffxSAE}, ops)
}
// VCOMISD: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISD m64 xmm
// VCOMISD xmm xmm
func VCOMISD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMISD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VCOMISD_SAE: Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISD.SAE xmm xmm
func VCOMISD_SAE(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMISD.Forms(), sffxs{sffxSAE}, []operand.Op{x, x1})
}
// VCOMISS: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VCOMISS m32 xmm
// VCOMISS xmm xmm
func VCOMISS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMISS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VCOMISS_SAE: Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VCOMISS.SAE xmm xmm
func VCOMISS_SAE(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMISS.Forms(), sffxs{sffxSAE}, []operand.Op{x, x1})
}
// VCOMPRESSPD: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPD xmm k m128
// VCOMPRESSPD xmm k xmm
// VCOMPRESSPD xmm m128
// VCOMPRESSPD xmm xmm
// VCOMPRESSPD ymm k m256
// VCOMPRESSPD ymm k ymm
// VCOMPRESSPD ymm m256
// VCOMPRESSPD ymm ymm
// VCOMPRESSPD zmm k m512
// VCOMPRESSPD zmm k zmm
// VCOMPRESSPD zmm m512
// VCOMPRESSPD zmm zmm
func VCOMPRESSPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMPRESSPD.Forms(), sffxs{}, ops)
}
// VCOMPRESSPD_Z: Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPD.Z xmm k m128
// VCOMPRESSPD.Z xmm k xmm
// VCOMPRESSPD.Z ymm k m256
// VCOMPRESSPD.Z ymm k ymm
// VCOMPRESSPD.Z zmm k m512
// VCOMPRESSPD.Z zmm k zmm
func VCOMPRESSPD_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMPRESSPD.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
}
// VCOMPRESSPS: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register.
//
// Forms:
//
// VCOMPRESSPS xmm k m128
// VCOMPRESSPS xmm k xmm
// VCOMPRESSPS xmm m128
// VCOMPRESSPS xmm xmm
// VCOMPRESSPS ymm k m256
// VCOMPRESSPS ymm k ymm
// VCOMPRESSPS ymm m256
// VCOMPRESSPS ymm ymm
// VCOMPRESSPS zmm k m512
// VCOMPRESSPS zmm k zmm
// VCOMPRESSPS zmm m512
// VCOMPRESSPS zmm zmm
func VCOMPRESSPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMPRESSPS.Forms(), sffxs{}, ops)
}
// VCOMPRESSPS_Z: Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VCOMPRESSPS.Z xmm k m128
// VCOMPRESSPS.Z xmm k xmm
// VCOMPRESSPS.Z ymm k m256
// VCOMPRESSPS.Z ymm k ymm
// VCOMPRESSPS.Z zmm k m512
// VCOMPRESSPS.Z zmm k zmm
func VCOMPRESSPS_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCOMPRESSPS.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
}
// VCVTDQ2PD: Convert Packed Dword Integers to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PD m128 ymm
// VCVTDQ2PD m64 xmm
// VCVTDQ2PD xmm xmm
// VCVTDQ2PD xmm ymm
// VCVTDQ2PD m128 k ymm
// VCVTDQ2PD m64 k xmm
// VCVTDQ2PD xmm k xmm
// VCVTDQ2PD xmm k ymm
// VCVTDQ2PD m256 k zmm
// VCVTDQ2PD m256 zmm
// VCVTDQ2PD ymm k zmm
// VCVTDQ2PD ymm zmm
func VCVTDQ2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PD.Forms(), sffxs{}, ops)
}
// VCVTDQ2PD_BCST: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PD.BCST m32 k xmm
// VCVTDQ2PD.BCST m32 k ymm
// VCVTDQ2PD.BCST m32 xmm
// VCVTDQ2PD.BCST m32 ymm
// VCVTDQ2PD.BCST m32 k zmm
// VCVTDQ2PD.BCST m32 zmm
func VCVTDQ2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTDQ2PD_BCST_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.BCST.Z m32 k xmm
// VCVTDQ2PD.BCST.Z m32 k ymm
// VCVTDQ2PD.BCST.Z m32 k zmm
func VCVTDQ2PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTDQ2PD_Z: Convert Packed Dword Integers to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PD.Z m128 k ymm
// VCVTDQ2PD.Z m64 k xmm
// VCVTDQ2PD.Z xmm k xmm
// VCVTDQ2PD.Z xmm k ymm
// VCVTDQ2PD.Z m256 k zmm
// VCVTDQ2PD.Z ymm k zmm
func VCVTDQ2PD_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTDQ2PS: Convert Packed Dword Integers to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTDQ2PS m128 xmm
// VCVTDQ2PS m256 ymm
// VCVTDQ2PS xmm xmm
// VCVTDQ2PS ymm ymm
// VCVTDQ2PS m128 k xmm
// VCVTDQ2PS m256 k ymm
// VCVTDQ2PS xmm k xmm
// VCVTDQ2PS ymm k ymm
// VCVTDQ2PS m512 k zmm
// VCVTDQ2PS m512 zmm
// VCVTDQ2PS zmm k zmm
// VCVTDQ2PS zmm zmm
func VCVTDQ2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{}, ops)
}
// VCVTDQ2PS_BCST: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTDQ2PS.BCST m32 k xmm
// VCVTDQ2PS.BCST m32 k ymm
// VCVTDQ2PS.BCST m32 xmm
// VCVTDQ2PS.BCST m32 ymm
// VCVTDQ2PS.BCST m32 k zmm
// VCVTDQ2PS.BCST m32 zmm
func VCVTDQ2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTDQ2PS_BCST_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.BCST.Z m32 k xmm
// VCVTDQ2PS.BCST.Z m32 k ymm
// VCVTDQ2PS.BCST.Z m32 k zmm
func VCVTDQ2PS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTDQ2PS_RD_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE zmm k zmm
// VCVTDQ2PS.RD_SAE zmm zmm
func VCVTDQ2PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTDQ2PS_RD_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RD_SAE.Z zmm k zmm
func VCVTDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTDQ2PS_RN_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE zmm k zmm
// VCVTDQ2PS.RN_SAE zmm zmm
func VCVTDQ2PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTDQ2PS_RN_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RN_SAE.Z zmm k zmm
func VCVTDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTDQ2PS_RU_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE zmm k zmm
// VCVTDQ2PS.RU_SAE zmm zmm
func VCVTDQ2PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTDQ2PS_RU_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RU_SAE.Z zmm k zmm
func VCVTDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTDQ2PS_RZ_SAE: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE zmm k zmm
// VCVTDQ2PS.RZ_SAE zmm zmm
func VCVTDQ2PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTDQ2PS_RZ_SAE_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.RZ_SAE.Z zmm k zmm
func VCVTDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTDQ2PS_Z: Convert Packed Dword Integers to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTDQ2PS.Z m128 k xmm
// VCVTDQ2PS.Z m256 k ymm
// VCVTDQ2PS.Z xmm k xmm
// VCVTDQ2PS.Z ymm k ymm
// VCVTDQ2PS.Z m512 k zmm
// VCVTDQ2PS.Z zmm k zmm
func VCVTDQ2PS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTDQ2PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTPD2DQ: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQ m512 k ymm
// VCVTPD2DQ m512 ymm
// VCVTPD2DQ zmm k ymm
// VCVTPD2DQ zmm ymm
func VCVTPD2DQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{}, ops)
}
// VCVTPD2DQX: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQX m128 xmm
// VCVTPD2DQX xmm xmm
// VCVTPD2DQX m128 k xmm
// VCVTPD2DQX xmm k xmm
func VCVTPD2DQX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQX.Forms(), sffxs{}, ops)
}
// VCVTPD2DQX_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQX.BCST m64 k xmm
// VCVTPD2DQX.BCST m64 xmm
func VCVTPD2DQX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2DQX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.BCST.Z m64 k xmm
func VCVTPD2DQX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2DQX_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQX.Z m128 k xmm
// VCVTPD2DQX.Z xmm k xmm
func VCVTPD2DQX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTPD2DQY: Convert Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPD2DQY m256 xmm
// VCVTPD2DQY ymm xmm
// VCVTPD2DQY m256 k xmm
// VCVTPD2DQY ymm k xmm
func VCVTPD2DQY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQY.Forms(), sffxs{}, ops)
}
// VCVTPD2DQY_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQY.BCST m64 k xmm
// VCVTPD2DQY.BCST m64 xmm
func VCVTPD2DQY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2DQY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.BCST.Z m64 k xmm
func VCVTPD2DQY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2DQY_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQY.Z m256 k xmm
// VCVTPD2DQY.Z ymm k xmm
func VCVTPD2DQY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTPD2DQ_BCST: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2DQ.BCST m64 k ymm
// VCVTPD2DQ.BCST m64 ymm
func VCVTPD2DQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2DQ_BCST_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.BCST.Z m64 k ymm
func VCVTPD2DQ_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTPD2DQ_RD_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE zmm k ymm
// VCVTPD2DQ.RD_SAE zmm ymm
func VCVTPD2DQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPD2DQ_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RD_SAE.Z zmm k ymm
func VCVTPD2DQ_RD_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2DQ_RN_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE zmm k ymm
// VCVTPD2DQ.RN_SAE zmm ymm
func VCVTPD2DQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPD2DQ_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RN_SAE.Z zmm k ymm
func VCVTPD2DQ_RN_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2DQ_RU_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE zmm k ymm
// VCVTPD2DQ.RU_SAE zmm ymm
func VCVTPD2DQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPD2DQ_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RU_SAE.Z zmm k ymm
func VCVTPD2DQ_RU_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2DQ_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE zmm k ymm
// VCVTPD2DQ.RZ_SAE zmm ymm
func VCVTPD2DQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPD2DQ_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.RZ_SAE.Z zmm k ymm
func VCVTPD2DQ_RZ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2DQ_Z: Convert Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2DQ.Z m512 k ymm
// VCVTPD2DQ.Z zmm k ymm
func VCVTPD2DQ_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2DQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTPD2PS: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PS m512 k ymm
// VCVTPD2PS m512 ymm
// VCVTPD2PS zmm k ymm
// VCVTPD2PS zmm ymm
func VCVTPD2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{}, ops)
}
// VCVTPD2PSX: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSX m128 xmm
// VCVTPD2PSX xmm xmm
// VCVTPD2PSX m128 k xmm
// VCVTPD2PSX xmm k xmm
func VCVTPD2PSX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSX.Forms(), sffxs{}, ops)
}
// VCVTPD2PSX_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSX.BCST m64 k xmm
// VCVTPD2PSX.BCST m64 xmm
func VCVTPD2PSX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2PSX_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.BCST.Z m64 k xmm
func VCVTPD2PSX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2PSX_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSX.Z m128 k xmm
// VCVTPD2PSX.Z xmm k xmm
func VCVTPD2PSX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTPD2PSY: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values.
//
// Forms:
//
// VCVTPD2PSY m256 xmm
// VCVTPD2PSY ymm xmm
// VCVTPD2PSY m256 k xmm
// VCVTPD2PSY ymm k xmm
func VCVTPD2PSY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSY.Forms(), sffxs{}, ops)
}
// VCVTPD2PSY_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PSY.BCST m64 k xmm
// VCVTPD2PSY.BCST m64 xmm
func VCVTPD2PSY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2PSY_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.BCST.Z m64 k xmm
func VCVTPD2PSY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2PSY_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PSY.Z m256 k xmm
// VCVTPD2PSY.Z ymm k xmm
func VCVTPD2PSY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PSY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTPD2PS_BCST: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPD2PS.BCST m64 k ymm
// VCVTPD2PS.BCST m64 ymm
func VCVTPD2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2PS_BCST_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.BCST.Z m64 k ymm
func VCVTPD2PS_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTPD2PS_RD_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2PS.RD_SAE zmm k ymm
// VCVTPD2PS.RD_SAE zmm ymm
func VCVTPD2PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPD2PS_RD_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RD_SAE.Z zmm k ymm
func VCVTPD2PS_RD_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2PS_RN_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2PS.RN_SAE zmm k ymm
// VCVTPD2PS.RN_SAE zmm ymm
func VCVTPD2PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPD2PS_RN_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RN_SAE.Z zmm k ymm
func VCVTPD2PS_RN_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2PS_RU_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2PS.RU_SAE zmm k ymm
// VCVTPD2PS.RU_SAE zmm ymm
func VCVTPD2PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPD2PS_RU_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RU_SAE.Z zmm k ymm
func VCVTPD2PS_RU_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2PS_RZ_SAE: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE zmm k ymm
// VCVTPD2PS.RZ_SAE zmm ymm
func VCVTPD2PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPD2PS_RZ_SAE_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.RZ_SAE.Z zmm k ymm
func VCVTPD2PS_RZ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2PS_Z: Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPD2PS.Z m512 k ymm
// VCVTPD2PS.Z zmm k ymm
func VCVTPD2PS_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTPD2QQ: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTPD2QQ m128 k xmm
// VCVTPD2QQ m128 xmm
// VCVTPD2QQ m256 k ymm
// VCVTPD2QQ m256 ymm
// VCVTPD2QQ xmm k xmm
// VCVTPD2QQ xmm xmm
// VCVTPD2QQ ymm k ymm
// VCVTPD2QQ ymm ymm
// VCVTPD2QQ m512 k zmm
// VCVTPD2QQ m512 zmm
// VCVTPD2QQ zmm k zmm
// VCVTPD2QQ zmm zmm
func VCVTPD2QQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{}, ops)
}
// VCVTPD2QQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2QQ.BCST m64 k xmm
// VCVTPD2QQ.BCST m64 k ymm
// VCVTPD2QQ.BCST m64 xmm
// VCVTPD2QQ.BCST m64 ymm
// VCVTPD2QQ.BCST m64 k zmm
// VCVTPD2QQ.BCST m64 zmm
func VCVTPD2QQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2QQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.BCST.Z m64 k xmm
// VCVTPD2QQ.BCST.Z m64 k ymm
// VCVTPD2QQ.BCST.Z m64 k zmm
func VCVTPD2QQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPD2QQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE zmm k zmm
// VCVTPD2QQ.RD_SAE zmm zmm
func VCVTPD2QQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPD2QQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RD_SAE.Z zmm k zmm
func VCVTPD2QQ_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2QQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE zmm k zmm
// VCVTPD2QQ.RN_SAE zmm zmm
func VCVTPD2QQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPD2QQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RN_SAE.Z zmm k zmm
func VCVTPD2QQ_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2QQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE zmm k zmm
// VCVTPD2QQ.RU_SAE zmm zmm
func VCVTPD2QQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPD2QQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RU_SAE.Z zmm k zmm
func VCVTPD2QQ_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2QQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE zmm k zmm
// VCVTPD2QQ.RZ_SAE zmm zmm
func VCVTPD2QQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPD2QQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.RZ_SAE.Z zmm k zmm
func VCVTPD2QQ_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2QQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2QQ.Z m128 k xmm
// VCVTPD2QQ.Z m256 k ymm
// VCVTPD2QQ.Z xmm k xmm
// VCVTPD2QQ.Z ymm k ymm
// VCVTPD2QQ.Z m512 k zmm
// VCVTPD2QQ.Z zmm k zmm
func VCVTPD2QQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2QQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTPD2UDQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQ m512 k ymm
// VCVTPD2UDQ m512 ymm
// VCVTPD2UDQ zmm k ymm
// VCVTPD2UDQ zmm ymm
func VCVTPD2UDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{}, ops)
}
// VCVTPD2UDQX: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQX m128 k xmm
// VCVTPD2UDQX m128 xmm
// VCVTPD2UDQX xmm k xmm
// VCVTPD2UDQX xmm xmm
func VCVTPD2UDQX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQX.Forms(), sffxs{}, ops)
}
// VCVTPD2UDQX_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQX.BCST m64 k xmm
// VCVTPD2UDQX.BCST m64 xmm
func VCVTPD2UDQX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2UDQX_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.BCST.Z m64 k xmm
func VCVTPD2UDQX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2UDQX_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQX.Z m128 k xmm
// VCVTPD2UDQX.Z xmm k xmm
func VCVTPD2UDQX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTPD2UDQY: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTPD2UDQY m256 k xmm
// VCVTPD2UDQY m256 xmm
// VCVTPD2UDQY ymm k xmm
// VCVTPD2UDQY ymm xmm
func VCVTPD2UDQY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQY.Forms(), sffxs{}, ops)
}
// VCVTPD2UDQY_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQY.BCST m64 k xmm
// VCVTPD2UDQY.BCST m64 xmm
func VCVTPD2UDQY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2UDQY_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.BCST.Z m64 k xmm
func VCVTPD2UDQY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTPD2UDQY_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQY.Z m256 k xmm
// VCVTPD2UDQY.Z ymm k xmm
func VCVTPD2UDQY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTPD2UDQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UDQ.BCST m64 k ymm
// VCVTPD2UDQ.BCST m64 ymm
func VCVTPD2UDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2UDQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.BCST.Z m64 k ymm
func VCVTPD2UDQ_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTPD2UDQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE zmm k ymm
// VCVTPD2UDQ.RD_SAE zmm ymm
func VCVTPD2UDQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPD2UDQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RD_SAE.Z zmm k ymm
func VCVTPD2UDQ_RD_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2UDQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE zmm k ymm
// VCVTPD2UDQ.RN_SAE zmm ymm
func VCVTPD2UDQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPD2UDQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RN_SAE.Z zmm k ymm
func VCVTPD2UDQ_RN_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2UDQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE zmm k ymm
// VCVTPD2UDQ.RU_SAE zmm ymm
func VCVTPD2UDQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPD2UDQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RU_SAE.Z zmm k ymm
func VCVTPD2UDQ_RU_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2UDQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE zmm k ymm
// VCVTPD2UDQ.RZ_SAE zmm ymm
func VCVTPD2UDQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPD2UDQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.RZ_SAE.Z zmm k ymm
func VCVTPD2UDQ_RZ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTPD2UDQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UDQ.Z m512 k ymm
// VCVTPD2UDQ.Z zmm k ymm
func VCVTPD2UDQ_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UDQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTPD2UQQ: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTPD2UQQ m128 k xmm
// VCVTPD2UQQ m128 xmm
// VCVTPD2UQQ m256 k ymm
// VCVTPD2UQQ m256 ymm
// VCVTPD2UQQ xmm k xmm
// VCVTPD2UQQ xmm xmm
// VCVTPD2UQQ ymm k ymm
// VCVTPD2UQQ ymm ymm
// VCVTPD2UQQ m512 k zmm
// VCVTPD2UQQ m512 zmm
// VCVTPD2UQQ zmm k zmm
// VCVTPD2UQQ zmm zmm
func VCVTPD2UQQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{}, ops)
}
// VCVTPD2UQQ_BCST: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTPD2UQQ.BCST m64 k xmm
// VCVTPD2UQQ.BCST m64 k ymm
// VCVTPD2UQQ.BCST m64 xmm
// VCVTPD2UQQ.BCST m64 ymm
// VCVTPD2UQQ.BCST m64 k zmm
// VCVTPD2UQQ.BCST m64 zmm
func VCVTPD2UQQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPD2UQQ_BCST_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.BCST.Z m64 k xmm
// VCVTPD2UQQ.BCST.Z m64 k ymm
// VCVTPD2UQQ.BCST.Z m64 k zmm
func VCVTPD2UQQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPD2UQQ_RD_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE zmm k zmm
// VCVTPD2UQQ.RD_SAE zmm zmm
func VCVTPD2UQQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPD2UQQ_RD_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RD_SAE.Z zmm k zmm
func VCVTPD2UQQ_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2UQQ_RN_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE zmm k zmm
// VCVTPD2UQQ.RN_SAE zmm zmm
func VCVTPD2UQQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPD2UQQ_RN_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RN_SAE.Z zmm k zmm
func VCVTPD2UQQ_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2UQQ_RU_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE zmm k zmm
// VCVTPD2UQQ.RU_SAE zmm zmm
func VCVTPD2UQQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPD2UQQ_RU_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RU_SAE.Z zmm k zmm
func VCVTPD2UQQ_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2UQQ_RZ_SAE: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE zmm k zmm
// VCVTPD2UQQ.RZ_SAE zmm zmm
func VCVTPD2UQQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPD2UQQ_RZ_SAE_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.RZ_SAE.Z zmm k zmm
func VCVTPD2UQQ_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPD2UQQ_Z: Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPD2UQQ.Z m128 k xmm
// VCVTPD2UQQ.Z m256 k ymm
// VCVTPD2UQQ.Z xmm k xmm
// VCVTPD2UQQ.Z ymm k ymm
// VCVTPD2UQQ.Z m512 k zmm
// VCVTPD2UQQ.Z zmm k zmm
func VCVTPD2UQQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPD2UQQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTPH2PS: Convert Half-Precision FP Values to Single-Precision FP Values.
//
// Forms:
//
// VCVTPH2PS m128 ymm
// VCVTPH2PS m64 xmm
// VCVTPH2PS xmm xmm
// VCVTPH2PS xmm ymm
// VCVTPH2PS m128 k ymm
// VCVTPH2PS m64 k xmm
// VCVTPH2PS xmm k xmm
// VCVTPH2PS xmm k ymm
// VCVTPH2PS m256 k zmm
// VCVTPH2PS m256 zmm
// VCVTPH2PS ymm k zmm
// VCVTPH2PS ymm zmm
func VCVTPH2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPH2PS.Forms(), sffxs{}, ops)
}
// VCVTPH2PS_SAE: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPH2PS.SAE ymm k zmm
// VCVTPH2PS.SAE ymm zmm
func VCVTPH2PS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPH2PS.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTPH2PS_SAE_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.SAE.Z ymm k zmm
func VCVTPH2PS_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPH2PS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPH2PS_Z: Convert Half-Precision FP Values to Single-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPH2PS.Z m128 k ymm
// VCVTPH2PS.Z m64 k xmm
// VCVTPH2PS.Z xmm k xmm
// VCVTPH2PS.Z xmm k ymm
// VCVTPH2PS.Z m256 k zmm
// VCVTPH2PS.Z ymm k zmm
func VCVTPH2PS_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPH2PS.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTPS2DQ: Convert Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTPS2DQ m128 xmm
// VCVTPS2DQ m256 ymm
// VCVTPS2DQ xmm xmm
// VCVTPS2DQ ymm ymm
// VCVTPS2DQ m128 k xmm
// VCVTPS2DQ m256 k ymm
// VCVTPS2DQ xmm k xmm
// VCVTPS2DQ ymm k ymm
// VCVTPS2DQ m512 k zmm
// VCVTPS2DQ m512 zmm
// VCVTPS2DQ zmm k zmm
// VCVTPS2DQ zmm zmm
func VCVTPS2DQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{}, ops)
}
// VCVTPS2DQ_BCST: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTPS2DQ.BCST m32 k xmm
// VCVTPS2DQ.BCST m32 k ymm
// VCVTPS2DQ.BCST m32 xmm
// VCVTPS2DQ.BCST m32 ymm
// VCVTPS2DQ.BCST m32 k zmm
// VCVTPS2DQ.BCST m32 zmm
func VCVTPS2DQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPS2DQ_BCST_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.BCST.Z m32 k xmm
// VCVTPS2DQ.BCST.Z m32 k ymm
// VCVTPS2DQ.BCST.Z m32 k zmm
func VCVTPS2DQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPS2DQ_RD_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE zmm k zmm
// VCVTPS2DQ.RD_SAE zmm zmm
func VCVTPS2DQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPS2DQ_RD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RD_SAE.Z zmm k zmm
func VCVTPS2DQ_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2DQ_RN_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE zmm k zmm
// VCVTPS2DQ.RN_SAE zmm zmm
func VCVTPS2DQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPS2DQ_RN_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RN_SAE.Z zmm k zmm
func VCVTPS2DQ_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2DQ_RU_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE zmm k zmm
// VCVTPS2DQ.RU_SAE zmm zmm
func VCVTPS2DQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPS2DQ_RU_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RU_SAE.Z zmm k zmm
func VCVTPS2DQ_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2DQ_RZ_SAE: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE zmm k zmm
// VCVTPS2DQ.RZ_SAE zmm zmm
func VCVTPS2DQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPS2DQ_RZ_SAE_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.RZ_SAE.Z zmm k zmm
func VCVTPS2DQ_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2DQ_Z: Convert Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTPS2DQ.Z m128 k xmm
// VCVTPS2DQ.Z m256 k ymm
// VCVTPS2DQ.Z xmm k xmm
// VCVTPS2DQ.Z ymm k ymm
// VCVTPS2DQ.Z m512 k zmm
// VCVTPS2DQ.Z zmm k zmm
func VCVTPS2DQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2DQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTPS2PD: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values.
//
// Forms:
//
// VCVTPS2PD m128 ymm
// VCVTPS2PD m64 xmm
// VCVTPS2PD xmm xmm
// VCVTPS2PD xmm ymm
// VCVTPS2PD m64 k xmm
// VCVTPS2PD xmm k xmm
// VCVTPS2PD m256 k zmm
// VCVTPS2PD m256 zmm
// VCVTPS2PD ymm k zmm
// VCVTPS2PD ymm zmm
// VCVTPS2PD m128 k ymm
// VCVTPS2PD xmm k ymm
func VCVTPS2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{}, ops)
}
// VCVTPS2PD_BCST: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast).
//
// Forms:
//
// VCVTPS2PD.BCST m32 k xmm
// VCVTPS2PD.BCST m32 xmm
// VCVTPS2PD.BCST m32 k zmm
// VCVTPS2PD.BCST m32 zmm
// VCVTPS2PD.BCST m32 k ymm
// VCVTPS2PD.BCST m32 ymm
func VCVTPS2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPS2PD_BCST_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.BCST.Z m32 k xmm
// VCVTPS2PD.BCST.Z m32 k zmm
// VCVTPS2PD.BCST.Z m32 k ymm
func VCVTPS2PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPS2PD_SAE: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PD.SAE ymm k zmm
// VCVTPS2PD.SAE ymm zmm
func VCVTPS2PD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTPS2PD_SAE_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.SAE.Z ymm k zmm
func VCVTPS2PD_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2PD_Z: Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PD.Z m64 k xmm
// VCVTPS2PD.Z xmm k xmm
// VCVTPS2PD.Z m256 k zmm
// VCVTPS2PD.Z ymm k zmm
// VCVTPS2PD.Z m128 k ymm
// VCVTPS2PD.Z xmm k ymm
func VCVTPS2PD_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTPS2PH: Convert Single-Precision FP value to Half-Precision FP value.
//
// Forms:
//
// VCVTPS2PH imm8 xmm m64
// VCVTPS2PH imm8 xmm xmm
// VCVTPS2PH imm8 ymm m128
// VCVTPS2PH imm8 ymm xmm
// VCVTPS2PH imm8 xmm k m64
// VCVTPS2PH imm8 xmm k xmm
// VCVTPS2PH imm8 ymm k m128
// VCVTPS2PH imm8 ymm k xmm
// VCVTPS2PH imm8 zmm k m256
// VCVTPS2PH imm8 zmm k ymm
// VCVTPS2PH imm8 zmm m256
// VCVTPS2PH imm8 zmm ymm
func VCVTPS2PH(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PH.Forms(), sffxs{}, ops)
}
// VCVTPS2PH_SAE: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions).
//
// Forms:
//
// VCVTPS2PH.SAE imm8 zmm k ymm
// VCVTPS2PH.SAE imm8 zmm ymm
func VCVTPS2PH_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PH.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTPS2PH_SAE_Z: Convert Single-Precision FP value to Half-Precision FP value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.SAE.Z imm8 zmm k ymm
func VCVTPS2PH_SAE_Z(i, z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PH.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, k, y})
}
// VCVTPS2PH_Z: Convert Single-Precision FP value to Half-Precision FP value (Zeroing Masking).
//
// Forms:
//
// VCVTPS2PH.Z imm8 xmm k m64
// VCVTPS2PH.Z imm8 xmm k xmm
// VCVTPS2PH.Z imm8 ymm k m128
// VCVTPS2PH.Z imm8 ymm k xmm
// VCVTPS2PH.Z imm8 zmm k m256
// VCVTPS2PH.Z imm8 zmm k ymm
func VCVTPS2PH_Z(i, xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2PH.Forms(), sffxs{sffxZ}, []operand.Op{i, xyz, k, mxy})
}
// VCVTPS2QQ: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTPS2QQ m128 k ymm
// VCVTPS2QQ m128 ymm
// VCVTPS2QQ m64 k xmm
// VCVTPS2QQ m64 xmm
// VCVTPS2QQ xmm k xmm
// VCVTPS2QQ xmm k ymm
// VCVTPS2QQ xmm xmm
// VCVTPS2QQ xmm ymm
// VCVTPS2QQ m256 k zmm
// VCVTPS2QQ m256 zmm
// VCVTPS2QQ ymm k zmm
// VCVTPS2QQ ymm zmm
func VCVTPS2QQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{}, ops)
}
// VCVTPS2QQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2QQ.BCST m32 k xmm
// VCVTPS2QQ.BCST m32 k ymm
// VCVTPS2QQ.BCST m32 xmm
// VCVTPS2QQ.BCST m32 ymm
// VCVTPS2QQ.BCST m32 k zmm
// VCVTPS2QQ.BCST m32 zmm
func VCVTPS2QQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPS2QQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.BCST.Z m32 k xmm
// VCVTPS2QQ.BCST.Z m32 k ymm
// VCVTPS2QQ.BCST.Z m32 k zmm
func VCVTPS2QQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPS2QQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE ymm k zmm
// VCVTPS2QQ.RD_SAE ymm zmm
func VCVTPS2QQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPS2QQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RD_SAE.Z ymm k zmm
func VCVTPS2QQ_RD_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2QQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE ymm k zmm
// VCVTPS2QQ.RN_SAE ymm zmm
func VCVTPS2QQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPS2QQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RN_SAE.Z ymm k zmm
func VCVTPS2QQ_RN_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2QQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE ymm k zmm
// VCVTPS2QQ.RU_SAE ymm zmm
func VCVTPS2QQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPS2QQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RU_SAE.Z ymm k zmm
func VCVTPS2QQ_RU_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2QQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE ymm k zmm
// VCVTPS2QQ.RZ_SAE ymm zmm
func VCVTPS2QQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPS2QQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.RZ_SAE.Z ymm k zmm
func VCVTPS2QQ_RZ_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2QQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2QQ.Z m128 k ymm
// VCVTPS2QQ.Z m64 k xmm
// VCVTPS2QQ.Z xmm k xmm
// VCVTPS2QQ.Z xmm k ymm
// VCVTPS2QQ.Z m256 k zmm
// VCVTPS2QQ.Z ymm k zmm
func VCVTPS2QQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2QQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTPS2UDQ: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTPS2UDQ m128 k xmm
// VCVTPS2UDQ m128 xmm
// VCVTPS2UDQ m256 k ymm
// VCVTPS2UDQ m256 ymm
// VCVTPS2UDQ xmm k xmm
// VCVTPS2UDQ xmm xmm
// VCVTPS2UDQ ymm k ymm
// VCVTPS2UDQ ymm ymm
// VCVTPS2UDQ m512 k zmm
// VCVTPS2UDQ m512 zmm
// VCVTPS2UDQ zmm k zmm
// VCVTPS2UDQ zmm zmm
func VCVTPS2UDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{}, ops)
}
// VCVTPS2UDQ_BCST: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UDQ.BCST m32 k xmm
// VCVTPS2UDQ.BCST m32 k ymm
// VCVTPS2UDQ.BCST m32 xmm
// VCVTPS2UDQ.BCST m32 ymm
// VCVTPS2UDQ.BCST m32 k zmm
// VCVTPS2UDQ.BCST m32 zmm
func VCVTPS2UDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPS2UDQ_BCST_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.BCST.Z m32 k xmm
// VCVTPS2UDQ.BCST.Z m32 k ymm
// VCVTPS2UDQ.BCST.Z m32 k zmm
func VCVTPS2UDQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPS2UDQ_RD_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE zmm k zmm
// VCVTPS2UDQ.RD_SAE zmm zmm
func VCVTPS2UDQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPS2UDQ_RD_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RD_SAE.Z zmm k zmm
func VCVTPS2UDQ_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2UDQ_RN_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE zmm k zmm
// VCVTPS2UDQ.RN_SAE zmm zmm
func VCVTPS2UDQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPS2UDQ_RN_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RN_SAE.Z zmm k zmm
func VCVTPS2UDQ_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2UDQ_RU_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE zmm k zmm
// VCVTPS2UDQ.RU_SAE zmm zmm
func VCVTPS2UDQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPS2UDQ_RU_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RU_SAE.Z zmm k zmm
func VCVTPS2UDQ_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2UDQ_RZ_SAE: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE zmm k zmm
// VCVTPS2UDQ.RZ_SAE zmm zmm
func VCVTPS2UDQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPS2UDQ_RZ_SAE_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.RZ_SAE.Z zmm k zmm
func VCVTPS2UDQ_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTPS2UDQ_Z: Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UDQ.Z m128 k xmm
// VCVTPS2UDQ.Z m256 k ymm
// VCVTPS2UDQ.Z xmm k xmm
// VCVTPS2UDQ.Z ymm k ymm
// VCVTPS2UDQ.Z m512 k zmm
// VCVTPS2UDQ.Z zmm k zmm
func VCVTPS2UDQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTPS2UQQ: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTPS2UQQ m128 k ymm
// VCVTPS2UQQ m128 ymm
// VCVTPS2UQQ m64 k xmm
// VCVTPS2UQQ m64 xmm
// VCVTPS2UQQ xmm k xmm
// VCVTPS2UQQ xmm k ymm
// VCVTPS2UQQ xmm xmm
// VCVTPS2UQQ xmm ymm
// VCVTPS2UQQ m256 k zmm
// VCVTPS2UQQ m256 zmm
// VCVTPS2UQQ ymm k zmm
// VCVTPS2UQQ ymm zmm
func VCVTPS2UQQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{}, ops)
}
// VCVTPS2UQQ_BCST: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTPS2UQQ.BCST m32 k xmm
// VCVTPS2UQQ.BCST m32 k ymm
// VCVTPS2UQQ.BCST m32 xmm
// VCVTPS2UQQ.BCST m32 ymm
// VCVTPS2UQQ.BCST m32 k zmm
// VCVTPS2UQQ.BCST m32 zmm
func VCVTPS2UQQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTPS2UQQ_BCST_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.BCST.Z m32 k xmm
// VCVTPS2UQQ.BCST.Z m32 k ymm
// VCVTPS2UQQ.BCST.Z m32 k zmm
func VCVTPS2UQQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTPS2UQQ_RD_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE ymm k zmm
// VCVTPS2UQQ.RD_SAE ymm zmm
func VCVTPS2UQQ_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTPS2UQQ_RD_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RD_SAE.Z ymm k zmm
func VCVTPS2UQQ_RD_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2UQQ_RN_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE ymm k zmm
// VCVTPS2UQQ.RN_SAE ymm zmm
func VCVTPS2UQQ_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTPS2UQQ_RN_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RN_SAE.Z ymm k zmm
func VCVTPS2UQQ_RN_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2UQQ_RU_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE ymm k zmm
// VCVTPS2UQQ.RU_SAE ymm zmm
func VCVTPS2UQQ_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTPS2UQQ_RU_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RU_SAE.Z ymm k zmm
func VCVTPS2UQQ_RU_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2UQQ_RZ_SAE: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE ymm k zmm
// VCVTPS2UQQ.RZ_SAE ymm zmm
func VCVTPS2UQQ_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTPS2UQQ_RZ_SAE_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.RZ_SAE.Z ymm k zmm
func VCVTPS2UQQ_RZ_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTPS2UQQ_Z: Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTPS2UQQ.Z m128 k ymm
// VCVTPS2UQQ.Z m64 k xmm
// VCVTPS2UQQ.Z xmm k xmm
// VCVTPS2UQQ.Z xmm k ymm
// VCVTPS2UQQ.Z m256 k zmm
// VCVTPS2UQQ.Z ymm k zmm
func VCVTPS2UQQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTPS2UQQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTQQ2PD: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PD m128 k xmm
// VCVTQQ2PD m128 xmm
// VCVTQQ2PD m256 k ymm
// VCVTQQ2PD m256 ymm
// VCVTQQ2PD xmm k xmm
// VCVTQQ2PD xmm xmm
// VCVTQQ2PD ymm k ymm
// VCVTQQ2PD ymm ymm
// VCVTQQ2PD m512 k zmm
// VCVTQQ2PD m512 zmm
// VCVTQQ2PD zmm k zmm
// VCVTQQ2PD zmm zmm
func VCVTQQ2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{}, ops)
}
// VCVTQQ2PD_BCST: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PD.BCST m64 k xmm
// VCVTQQ2PD.BCST m64 k ymm
// VCVTQQ2PD.BCST m64 xmm
// VCVTQQ2PD.BCST m64 ymm
// VCVTQQ2PD.BCST m64 k zmm
// VCVTQQ2PD.BCST m64 zmm
func VCVTQQ2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTQQ2PD_BCST_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.BCST.Z m64 k xmm
// VCVTQQ2PD.BCST.Z m64 k ymm
// VCVTQQ2PD.BCST.Z m64 k zmm
func VCVTQQ2PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTQQ2PD_RD_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE zmm k zmm
// VCVTQQ2PD.RD_SAE zmm zmm
func VCVTQQ2PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTQQ2PD_RD_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RD_SAE.Z zmm k zmm
func VCVTQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTQQ2PD_RN_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE zmm k zmm
// VCVTQQ2PD.RN_SAE zmm zmm
func VCVTQQ2PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTQQ2PD_RN_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RN_SAE.Z zmm k zmm
func VCVTQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTQQ2PD_RU_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE zmm k zmm
// VCVTQQ2PD.RU_SAE zmm zmm
func VCVTQQ2PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTQQ2PD_RU_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RU_SAE.Z zmm k zmm
func VCVTQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTQQ2PD_RZ_SAE: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE zmm k zmm
// VCVTQQ2PD.RZ_SAE zmm zmm
func VCVTQQ2PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTQQ2PD_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.RZ_SAE.Z zmm k zmm
func VCVTQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTQQ2PD_Z: Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PD.Z m128 k xmm
// VCVTQQ2PD.Z m256 k ymm
// VCVTQQ2PD.Z xmm k xmm
// VCVTQQ2PD.Z ymm k ymm
// VCVTQQ2PD.Z m512 k zmm
// VCVTQQ2PD.Z zmm k zmm
func VCVTQQ2PD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTQQ2PS: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PS m512 k ymm
// VCVTQQ2PS m512 ymm
// VCVTQQ2PS zmm k ymm
// VCVTQQ2PS zmm ymm
func VCVTQQ2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{}, ops)
}
// VCVTQQ2PSX: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSX m128 k xmm
// VCVTQQ2PSX m128 xmm
// VCVTQQ2PSX xmm k xmm
// VCVTQQ2PSX xmm xmm
func VCVTQQ2PSX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSX.Forms(), sffxs{}, ops)
}
// VCVTQQ2PSX_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSX.BCST m64 k xmm
// VCVTQQ2PSX.BCST m64 xmm
func VCVTQQ2PSX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTQQ2PSX_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.BCST.Z m64 k xmm
func VCVTQQ2PSX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTQQ2PSX_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSX.Z m128 k xmm
// VCVTQQ2PSX.Z xmm k xmm
func VCVTQQ2PSX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTQQ2PSY: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTQQ2PSY m256 k xmm
// VCVTQQ2PSY m256 xmm
// VCVTQQ2PSY ymm k xmm
// VCVTQQ2PSY ymm xmm
func VCVTQQ2PSY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSY.Forms(), sffxs{}, ops)
}
// VCVTQQ2PSY_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PSY.BCST m64 k xmm
// VCVTQQ2PSY.BCST m64 xmm
func VCVTQQ2PSY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTQQ2PSY_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.BCST.Z m64 k xmm
func VCVTQQ2PSY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTQQ2PSY_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PSY.Z m256 k xmm
// VCVTQQ2PSY.Z ymm k xmm
func VCVTQQ2PSY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PSY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTQQ2PS_BCST: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTQQ2PS.BCST m64 k ymm
// VCVTQQ2PS.BCST m64 ymm
func VCVTQQ2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTQQ2PS_BCST_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.BCST.Z m64 k ymm
func VCVTQQ2PS_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTQQ2PS_RD_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE zmm k ymm
// VCVTQQ2PS.RD_SAE zmm ymm
func VCVTQQ2PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTQQ2PS_RD_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RD_SAE.Z zmm k ymm
func VCVTQQ2PS_RD_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTQQ2PS_RN_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE zmm k ymm
// VCVTQQ2PS.RN_SAE zmm ymm
func VCVTQQ2PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTQQ2PS_RN_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RN_SAE.Z zmm k ymm
func VCVTQQ2PS_RN_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTQQ2PS_RU_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE zmm k ymm
// VCVTQQ2PS.RU_SAE zmm ymm
func VCVTQQ2PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTQQ2PS_RU_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RU_SAE.Z zmm k ymm
func VCVTQQ2PS_RU_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTQQ2PS_RZ_SAE: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE zmm k ymm
// VCVTQQ2PS.RZ_SAE zmm ymm
func VCVTQQ2PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTQQ2PS_RZ_SAE_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.RZ_SAE.Z zmm k ymm
func VCVTQQ2PS_RZ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTQQ2PS_Z: Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTQQ2PS.Z m512 k ymm
// VCVTQQ2PS.Z zmm k ymm
func VCVTQQ2PS_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTQQ2PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTSD2SI: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SI m64 r32
// VCVTSD2SI xmm r32
func VCVTSD2SI(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SI.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSD2SIQ: Convert Scalar Double-Precision FP Value to Integer.
//
// Forms:
//
// VCVTSD2SIQ m64 r64
// VCVTSD2SIQ xmm r64
func VCVTSD2SIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSD2SIQ_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RD_SAE xmm r64
func VCVTSD2SIQ_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SIQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSD2SIQ_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SIQ.RN_SAE xmm r64
func VCVTSD2SIQ_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SIQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSD2SIQ_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SIQ.RU_SAE xmm r64
func VCVTSD2SIQ_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SIQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSD2SIQ_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SIQ.RZ_SAE xmm r64
func VCVTSD2SIQ_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SIQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSD2SI_RD_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SI.RD_SAE xmm r32
func VCVTSD2SI_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SI.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSD2SI_RN_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SI.RN_SAE xmm r32
func VCVTSD2SI_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SI.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSD2SI_RU_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SI.RU_SAE xmm r32
func VCVTSD2SI_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SI.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSD2SI_RZ_SAE: Convert Scalar Double-Precision FP Value to Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SI.RZ_SAE xmm r32
func VCVTSD2SI_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SI.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSD2SS: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSD2SS m64 xmm xmm
// VCVTSD2SS xmm xmm xmm
// VCVTSD2SS m64 xmm k xmm
// VCVTSD2SS xmm xmm k xmm
func VCVTSD2SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{}, ops)
}
// VCVTSD2SS_RD_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2SS.RD_SAE xmm xmm k xmm
// VCVTSD2SS.RD_SAE xmm xmm xmm
func VCVTSD2SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTSD2SS_RD_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RD_SAE.Z xmm xmm k xmm
func VCVTSD2SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VCVTSD2SS_RN_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2SS.RN_SAE xmm xmm k xmm
// VCVTSD2SS.RN_SAE xmm xmm xmm
func VCVTSD2SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTSD2SS_RN_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RN_SAE.Z xmm xmm k xmm
func VCVTSD2SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VCVTSD2SS_RU_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2SS.RU_SAE xmm xmm k xmm
// VCVTSD2SS.RU_SAE xmm xmm xmm
func VCVTSD2SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTSD2SS_RU_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RU_SAE.Z xmm xmm k xmm
func VCVTSD2SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VCVTSD2SS_RZ_SAE: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE xmm xmm k xmm
// VCVTSD2SS.RZ_SAE xmm xmm xmm
func VCVTSD2SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTSD2SS_RZ_SAE_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.RZ_SAE.Z xmm xmm k xmm
func VCVTSD2SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VCVTSD2SS_Z: Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSD2SS.Z m64 xmm k xmm
// VCVTSD2SS.Z xmm xmm k xmm
func VCVTSD2SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VCVTSD2USIL: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIL m64 r32
// VCVTSD2USIL xmm r32
func VCVTSD2USIL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSD2USIL_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIL.RD_SAE xmm r32
func VCVTSD2USIL_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIL.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIL_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIL.RN_SAE xmm r32
func VCVTSD2USIL_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIL.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIL_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIL.RU_SAE xmm r32
func VCVTSD2USIL_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIL.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIL_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIL.RZ_SAE xmm r32
func VCVTSD2USIL_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIL.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIQ: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSD2USIQ m64 r64
// VCVTSD2USIQ xmm r64
func VCVTSD2USIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSD2USIQ_RD_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RD_SAE xmm r64
func VCVTSD2USIQ_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIQ_RN_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSD2USIQ.RN_SAE xmm r64
func VCVTSD2USIQ_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIQ_RU_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSD2USIQ.RU_SAE xmm r64
func VCVTSD2USIQ_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSD2USIQ_RZ_SAE: Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSD2USIQ.RZ_SAE xmm r64
func VCVTSD2USIQ_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSD2USIQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSI2SDL: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDL m32 xmm xmm
// VCVTSI2SDL r32 xmm xmm
func VCVTSI2SDL(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDL.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTSI2SDQ: Convert Dword Integer to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSI2SDQ m64 xmm xmm
// VCVTSI2SDQ r64 xmm xmm
func VCVTSI2SDQ(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDQ.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTSI2SDQ_RD_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RD_SAE r64 xmm xmm
func VCVTSI2SDQ_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SDQ_RN_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SDQ.RN_SAE r64 xmm xmm
func VCVTSI2SDQ_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SDQ_RU_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SDQ.RU_SAE r64 xmm xmm
func VCVTSI2SDQ_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SDQ_RZ_SAE: Convert Dword Integer to Scalar Double-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SDQ.RZ_SAE r64 xmm xmm
func VCVTSI2SDQ_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SDQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSL: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSL m32 xmm xmm
// VCVTSI2SSL r32 xmm xmm
func VCVTSI2SSL(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSL.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTSI2SSL_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSL.RD_SAE r32 xmm xmm
func VCVTSI2SSL_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSL.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSL_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSL.RN_SAE r32 xmm xmm
func VCVTSI2SSL_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSL.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSL_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSL.RU_SAE r32 xmm xmm
func VCVTSI2SSL_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSL.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSL_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSL.RZ_SAE r32 xmm xmm
func VCVTSI2SSL_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSL.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSQ: Convert Dword Integer to Scalar Single-Precision FP Value.
//
// Forms:
//
// VCVTSI2SSQ m64 xmm xmm
// VCVTSI2SSQ r64 xmm xmm
func VCVTSI2SSQ(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSQ.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTSI2SSQ_RD_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RD_SAE r64 xmm xmm
func VCVTSI2SSQ_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSQ_RN_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Nearest).
//
// Forms:
//
// VCVTSI2SSQ.RN_SAE r64 xmm xmm
func VCVTSI2SSQ_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSQ_RU_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSI2SSQ.RU_SAE r64 xmm xmm
func VCVTSI2SSQ_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTSI2SSQ_RZ_SAE: Convert Dword Integer to Scalar Single-Precision FP Value (Round Towards Zero).
//
// Forms:
//
// VCVTSI2SSQ.RZ_SAE r64 xmm xmm
func VCVTSI2SSQ_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSI2SSQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VCVTSS2SD: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value.
//
// Forms:
//
// VCVTSS2SD m32 xmm xmm
// VCVTSS2SD xmm xmm xmm
// VCVTSS2SD m32 xmm k xmm
// VCVTSS2SD xmm xmm k xmm
func VCVTSS2SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SD.Forms(), sffxs{}, ops)
}
// VCVTSS2SD_SAE: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions).
//
// Forms:
//
// VCVTSS2SD.SAE xmm xmm k xmm
// VCVTSS2SD.SAE xmm xmm xmm
func VCVTSS2SD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SD.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTSS2SD_SAE_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.SAE.Z xmm xmm k xmm
func VCVTSS2SD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VCVTSS2SD_Z: Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value (Zeroing Masking).
//
// Forms:
//
// VCVTSS2SD.Z m32 xmm k xmm
// VCVTSS2SD.Z xmm xmm k xmm
func VCVTSS2SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VCVTSS2SI: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SI m32 r32
// VCVTSS2SI xmm r32
func VCVTSS2SI(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SI.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSS2SIQ: Convert Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTSS2SIQ m32 r64
// VCVTSS2SIQ xmm r64
func VCVTSS2SIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSS2SIQ_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RD_SAE xmm r64
func VCVTSS2SIQ_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SIQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSS2SIQ_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SIQ.RN_SAE xmm r64
func VCVTSS2SIQ_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SIQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSS2SIQ_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SIQ.RU_SAE xmm r64
func VCVTSS2SIQ_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SIQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSS2SIQ_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SIQ.RZ_SAE xmm r64
func VCVTSS2SIQ_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SIQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSS2SI_RD_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2SI.RD_SAE xmm r32
func VCVTSS2SI_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SI.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSS2SI_RN_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2SI.RN_SAE xmm r32
func VCVTSS2SI_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SI.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSS2SI_RU_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2SI.RU_SAE xmm r32
func VCVTSS2SI_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SI.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSS2SI_RZ_SAE: Convert Scalar Single-Precision FP Value to Dword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2SI.RZ_SAE xmm r32
func VCVTSS2SI_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2SI.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIL: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIL m32 r32
// VCVTSS2USIL xmm r32
func VCVTSS2USIL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSS2USIL_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIL.RD_SAE xmm r32
func VCVTSS2USIL_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIL.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIL_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIL.RN_SAE xmm r32
func VCVTSS2USIL_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIL.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIL_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIL.RU_SAE xmm r32
func VCVTSS2USIL_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIL.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIL_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIL.RZ_SAE xmm r32
func VCVTSS2USIL_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIL.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIQ: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer.
//
// Forms:
//
// VCVTSS2USIQ m32 r64
// VCVTSS2USIQ xmm r64
func VCVTSS2USIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTSS2USIQ_RD_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RD_SAE xmm r64
func VCVTSS2USIQ_RD_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIQ_RN_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Nearest).
//
// Forms:
//
// VCVTSS2USIQ.RN_SAE xmm r64
func VCVTSS2USIQ_RN_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIQ_RU_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTSS2USIQ.RU_SAE xmm r64
func VCVTSS2USIQ_RU_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{x, r})
}
// VCVTSS2USIQ_RZ_SAE: Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (Round Towards Zero).
//
// Forms:
//
// VCVTSS2USIQ.RZ_SAE xmm r64
func VCVTSS2USIQ_RZ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTSS2USIQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{x, r})
}
// VCVTTPD2DQ: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQ m512 k ymm
// VCVTTPD2DQ m512 ymm
// VCVTTPD2DQ zmm k ymm
// VCVTTPD2DQ zmm ymm
func VCVTTPD2DQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{}, ops)
}
// VCVTTPD2DQX: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQX m128 xmm
// VCVTTPD2DQX xmm xmm
// VCVTTPD2DQX m128 k xmm
// VCVTTPD2DQX xmm k xmm
func VCVTTPD2DQX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQX.Forms(), sffxs{}, ops)
}
// VCVTTPD2DQX_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQX.BCST m64 k xmm
// VCVTTPD2DQX.BCST m64 xmm
func VCVTTPD2DQX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2DQX_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.BCST.Z m64 k xmm
func VCVTTPD2DQX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTTPD2DQX_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQX.Z m128 k xmm
// VCVTTPD2DQX.Z xmm k xmm
func VCVTTPD2DQX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTTPD2DQY: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPD2DQY m256 xmm
// VCVTTPD2DQY ymm xmm
// VCVTTPD2DQY m256 k xmm
// VCVTTPD2DQY ymm k xmm
func VCVTTPD2DQY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQY.Forms(), sffxs{}, ops)
}
// VCVTTPD2DQY_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQY.BCST m64 k xmm
// VCVTTPD2DQY.BCST m64 xmm
func VCVTTPD2DQY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2DQY_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.BCST.Z m64 k xmm
func VCVTTPD2DQY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTTPD2DQY_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQY.Z m256 k xmm
// VCVTTPD2DQY.Z ymm k xmm
func VCVTTPD2DQY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTTPD2DQ_BCST: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2DQ.BCST m64 k ymm
// VCVTTPD2DQ.BCST m64 ymm
func VCVTTPD2DQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2DQ_BCST_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.BCST.Z m64 k ymm
func VCVTTPD2DQ_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTTPD2DQ_SAE: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2DQ.SAE zmm k ymm
// VCVTTPD2DQ.SAE zmm ymm
func VCVTTPD2DQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPD2DQ_SAE_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.SAE.Z zmm k ymm
func VCVTTPD2DQ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTTPD2DQ_Z: Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2DQ.Z m512 k ymm
// VCVTTPD2DQ.Z zmm k ymm
func VCVTTPD2DQ_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2DQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTTPD2QQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers.
//
// Forms:
//
// VCVTTPD2QQ m128 k xmm
// VCVTTPD2QQ m128 xmm
// VCVTTPD2QQ m256 k ymm
// VCVTTPD2QQ m256 ymm
// VCVTTPD2QQ xmm k xmm
// VCVTTPD2QQ xmm xmm
// VCVTTPD2QQ ymm k ymm
// VCVTTPD2QQ ymm ymm
// VCVTTPD2QQ m512 k zmm
// VCVTTPD2QQ m512 zmm
// VCVTTPD2QQ zmm k zmm
// VCVTTPD2QQ zmm zmm
func VCVTTPD2QQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{}, ops)
}
// VCVTTPD2QQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2QQ.BCST m64 k xmm
// VCVTTPD2QQ.BCST m64 k ymm
// VCVTTPD2QQ.BCST m64 xmm
// VCVTTPD2QQ.BCST m64 ymm
// VCVTTPD2QQ.BCST m64 k zmm
// VCVTTPD2QQ.BCST m64 zmm
func VCVTTPD2QQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2QQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.BCST.Z m64 k xmm
// VCVTTPD2QQ.BCST.Z m64 k ymm
// VCVTTPD2QQ.BCST.Z m64 k zmm
func VCVTTPD2QQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPD2QQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2QQ.SAE zmm k zmm
// VCVTTPD2QQ.SAE zmm zmm
func VCVTTPD2QQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPD2QQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.SAE.Z zmm k zmm
func VCVTTPD2QQ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTTPD2QQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2QQ.Z m128 k xmm
// VCVTTPD2QQ.Z m256 k ymm
// VCVTTPD2QQ.Z xmm k xmm
// VCVTTPD2QQ.Z ymm k ymm
// VCVTTPD2QQ.Z m512 k zmm
// VCVTTPD2QQ.Z zmm k zmm
func VCVTTPD2QQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2QQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTTPD2UDQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQ m512 k ymm
// VCVTTPD2UDQ m512 ymm
// VCVTTPD2UDQ zmm k ymm
// VCVTTPD2UDQ zmm ymm
func VCVTTPD2UDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{}, ops)
}
// VCVTTPD2UDQX: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQX m128 k xmm
// VCVTTPD2UDQX m128 xmm
// VCVTTPD2UDQX xmm k xmm
// VCVTTPD2UDQX xmm xmm
func VCVTTPD2UDQX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQX.Forms(), sffxs{}, ops)
}
// VCVTTPD2UDQX_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQX.BCST m64 k xmm
// VCVTTPD2UDQX.BCST m64 xmm
func VCVTTPD2UDQX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2UDQX_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.BCST.Z m64 k xmm
func VCVTTPD2UDQX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTTPD2UDQX_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQX.Z m128 k xmm
// VCVTTPD2UDQX.Z xmm k xmm
func VCVTTPD2UDQX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTTPD2UDQY: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VCVTTPD2UDQY m256 k xmm
// VCVTTPD2UDQY m256 xmm
// VCVTTPD2UDQY ymm k xmm
// VCVTTPD2UDQY ymm xmm
func VCVTTPD2UDQY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQY.Forms(), sffxs{}, ops)
}
// VCVTTPD2UDQY_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQY.BCST m64 k xmm
// VCVTTPD2UDQY.BCST m64 xmm
func VCVTTPD2UDQY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2UDQY_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.BCST.Z m64 k xmm
func VCVTTPD2UDQY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTTPD2UDQY_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQY.Z m256 k xmm
// VCVTTPD2UDQY.Z ymm k xmm
func VCVTTPD2UDQY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTTPD2UDQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UDQ.BCST m64 k ymm
// VCVTTPD2UDQ.BCST m64 ymm
func VCVTTPD2UDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2UDQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.BCST.Z m64 k ymm
func VCVTTPD2UDQ_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTTPD2UDQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UDQ.SAE zmm k ymm
// VCVTTPD2UDQ.SAE zmm ymm
func VCVTTPD2UDQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPD2UDQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.SAE.Z zmm k ymm
func VCVTTPD2UDQ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTTPD2UDQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UDQ.Z m512 k ymm
// VCVTTPD2UDQ.Z zmm k ymm
func VCVTTPD2UDQ_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UDQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTTPD2UQQ: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers.
//
// Forms:
//
// VCVTTPD2UQQ m128 k xmm
// VCVTTPD2UQQ m128 xmm
// VCVTTPD2UQQ m256 k ymm
// VCVTTPD2UQQ m256 ymm
// VCVTTPD2UQQ xmm k xmm
// VCVTTPD2UQQ xmm xmm
// VCVTTPD2UQQ ymm k ymm
// VCVTTPD2UQQ ymm ymm
// VCVTTPD2UQQ m512 k zmm
// VCVTTPD2UQQ m512 zmm
// VCVTTPD2UQQ zmm k zmm
// VCVTTPD2UQQ zmm zmm
func VCVTTPD2UQQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{}, ops)
}
// VCVTTPD2UQQ_BCST: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VCVTTPD2UQQ.BCST m64 k xmm
// VCVTTPD2UQQ.BCST m64 k ymm
// VCVTTPD2UQQ.BCST m64 xmm
// VCVTTPD2UQQ.BCST m64 ymm
// VCVTTPD2UQQ.BCST m64 k zmm
// VCVTTPD2UQQ.BCST m64 zmm
func VCVTTPD2UQQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPD2UQQ_BCST_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.BCST.Z m64 k xmm
// VCVTTPD2UQQ.BCST.Z m64 k ymm
// VCVTTPD2UQQ.BCST.Z m64 k zmm
func VCVTTPD2UQQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPD2UQQ_SAE: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPD2UQQ.SAE zmm k zmm
// VCVTTPD2UQQ.SAE zmm zmm
func VCVTTPD2UQQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPD2UQQ_SAE_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.SAE.Z zmm k zmm
func VCVTTPD2UQQ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTTPD2UQQ_Z: Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPD2UQQ.Z m128 k xmm
// VCVTTPD2UQQ.Z m256 k ymm
// VCVTTPD2UQQ.Z xmm k xmm
// VCVTTPD2UQQ.Z ymm k ymm
// VCVTTPD2UQQ.Z m512 k zmm
// VCVTTPD2UQQ.Z zmm k zmm
func VCVTTPD2UQQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPD2UQQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTTPS2DQ: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers.
//
// Forms:
//
// VCVTTPS2DQ m128 xmm
// VCVTTPS2DQ m256 ymm
// VCVTTPS2DQ xmm xmm
// VCVTTPS2DQ ymm ymm
// VCVTTPS2DQ m128 k xmm
// VCVTTPS2DQ m256 k ymm
// VCVTTPS2DQ xmm k xmm
// VCVTTPS2DQ ymm k ymm
// VCVTTPS2DQ m512 k zmm
// VCVTTPS2DQ m512 zmm
// VCVTTPS2DQ zmm k zmm
// VCVTTPS2DQ zmm zmm
func VCVTTPS2DQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{}, ops)
}
// VCVTTPS2DQ_BCST: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast).
//
// Forms:
//
// VCVTTPS2DQ.BCST m32 k xmm
// VCVTTPS2DQ.BCST m32 k ymm
// VCVTTPS2DQ.BCST m32 xmm
// VCVTTPS2DQ.BCST m32 ymm
// VCVTTPS2DQ.BCST m32 k zmm
// VCVTTPS2DQ.BCST m32 zmm
func VCVTTPS2DQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPS2DQ_BCST_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.BCST.Z m32 k xmm
// VCVTTPS2DQ.BCST.Z m32 k ymm
// VCVTTPS2DQ.BCST.Z m32 k zmm
func VCVTTPS2DQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPS2DQ_SAE: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2DQ.SAE zmm k zmm
// VCVTTPS2DQ.SAE zmm zmm
func VCVTTPS2DQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPS2DQ_SAE_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.SAE.Z zmm k zmm
func VCVTTPS2DQ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTTPS2DQ_Z: Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2DQ.Z m128 k xmm
// VCVTTPS2DQ.Z m256 k ymm
// VCVTTPS2DQ.Z xmm k xmm
// VCVTTPS2DQ.Z ymm k ymm
// VCVTTPS2DQ.Z m512 k zmm
// VCVTTPS2DQ.Z zmm k zmm
func VCVTTPS2DQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2DQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTTPS2QQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2QQ m128 k ymm
// VCVTTPS2QQ m128 ymm
// VCVTTPS2QQ m64 k xmm
// VCVTTPS2QQ m64 xmm
// VCVTTPS2QQ xmm k xmm
// VCVTTPS2QQ xmm k ymm
// VCVTTPS2QQ xmm xmm
// VCVTTPS2QQ xmm ymm
// VCVTTPS2QQ m256 k zmm
// VCVTTPS2QQ m256 zmm
// VCVTTPS2QQ ymm k zmm
// VCVTTPS2QQ ymm zmm
func VCVTTPS2QQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{}, ops)
}
// VCVTTPS2QQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2QQ.BCST m32 k xmm
// VCVTTPS2QQ.BCST m32 k ymm
// VCVTTPS2QQ.BCST m32 xmm
// VCVTTPS2QQ.BCST m32 ymm
// VCVTTPS2QQ.BCST m32 k zmm
// VCVTTPS2QQ.BCST m32 zmm
func VCVTTPS2QQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPS2QQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.BCST.Z m32 k xmm
// VCVTTPS2QQ.BCST.Z m32 k ymm
// VCVTTPS2QQ.BCST.Z m32 k zmm
func VCVTTPS2QQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPS2QQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2QQ.SAE ymm k zmm
// VCVTTPS2QQ.SAE ymm zmm
func VCVTTPS2QQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPS2QQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.SAE.Z ymm k zmm
func VCVTTPS2QQ_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTTPS2QQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2QQ.Z m128 k ymm
// VCVTTPS2QQ.Z m64 k xmm
// VCVTTPS2QQ.Z xmm k xmm
// VCVTTPS2QQ.Z xmm k ymm
// VCVTTPS2QQ.Z m256 k zmm
// VCVTTPS2QQ.Z ymm k zmm
func VCVTTPS2QQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2QQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTTPS2UDQ: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values.
//
// Forms:
//
// VCVTTPS2UDQ m128 k xmm
// VCVTTPS2UDQ m128 xmm
// VCVTTPS2UDQ m256 k ymm
// VCVTTPS2UDQ m256 ymm
// VCVTTPS2UDQ xmm k xmm
// VCVTTPS2UDQ xmm xmm
// VCVTTPS2UDQ ymm k ymm
// VCVTTPS2UDQ ymm ymm
// VCVTTPS2UDQ m512 k zmm
// VCVTTPS2UDQ m512 zmm
// VCVTTPS2UDQ zmm k zmm
// VCVTTPS2UDQ zmm zmm
func VCVTTPS2UDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{}, ops)
}
// VCVTTPS2UDQ_BCST: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UDQ.BCST m32 k xmm
// VCVTTPS2UDQ.BCST m32 k ymm
// VCVTTPS2UDQ.BCST m32 xmm
// VCVTTPS2UDQ.BCST m32 ymm
// VCVTTPS2UDQ.BCST m32 k zmm
// VCVTTPS2UDQ.BCST m32 zmm
func VCVTTPS2UDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPS2UDQ_BCST_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.BCST.Z m32 k xmm
// VCVTTPS2UDQ.BCST.Z m32 k ymm
// VCVTTPS2UDQ.BCST.Z m32 k zmm
func VCVTTPS2UDQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPS2UDQ_SAE: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UDQ.SAE zmm k zmm
// VCVTTPS2UDQ.SAE zmm zmm
func VCVTTPS2UDQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPS2UDQ_SAE_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.SAE.Z zmm k zmm
func VCVTTPS2UDQ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTTPS2UDQ_Z: Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UDQ.Z m128 k xmm
// VCVTTPS2UDQ.Z m256 k ymm
// VCVTTPS2UDQ.Z xmm k xmm
// VCVTTPS2UDQ.Z ymm k ymm
// VCVTTPS2UDQ.Z m512 k zmm
// VCVTTPS2UDQ.Z zmm k zmm
func VCVTTPS2UDQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTTPS2UQQ: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values.
//
// Forms:
//
// VCVTTPS2UQQ m128 k ymm
// VCVTTPS2UQQ m128 ymm
// VCVTTPS2UQQ m64 k xmm
// VCVTTPS2UQQ m64 xmm
// VCVTTPS2UQQ xmm k xmm
// VCVTTPS2UQQ xmm k ymm
// VCVTTPS2UQQ xmm xmm
// VCVTTPS2UQQ xmm ymm
// VCVTTPS2UQQ m256 k zmm
// VCVTTPS2UQQ m256 zmm
// VCVTTPS2UQQ ymm k zmm
// VCVTTPS2UQQ ymm zmm
func VCVTTPS2UQQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{}, ops)
}
// VCVTTPS2UQQ_BCST: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast).
//
// Forms:
//
// VCVTTPS2UQQ.BCST m32 k xmm
// VCVTTPS2UQQ.BCST m32 k ymm
// VCVTTPS2UQQ.BCST m32 xmm
// VCVTTPS2UQQ.BCST m32 ymm
// VCVTTPS2UQQ.BCST m32 k zmm
// VCVTTPS2UQQ.BCST m32 zmm
func VCVTTPS2UQQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTTPS2UQQ_BCST_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.BCST.Z m32 k xmm
// VCVTTPS2UQQ.BCST.Z m32 k ymm
// VCVTTPS2UQQ.BCST.Z m32 k zmm
func VCVTTPS2UQQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTTPS2UQQ_SAE: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions).
//
// Forms:
//
// VCVTTPS2UQQ.SAE ymm k zmm
// VCVTTPS2UQQ.SAE ymm zmm
func VCVTTPS2UQQ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{sffxSAE}, ops)
}
// VCVTTPS2UQQ_SAE_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.SAE.Z ymm k zmm
func VCVTTPS2UQQ_SAE_Z(y, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{y, k, z})
}
// VCVTTPS2UQQ_Z: Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VCVTTPS2UQQ.Z m128 k ymm
// VCVTTPS2UQQ.Z m64 k xmm
// VCVTTPS2UQQ.Z xmm k xmm
// VCVTTPS2UQQ.Z xmm k ymm
// VCVTTPS2UQQ.Z m256 k zmm
// VCVTTPS2UQQ.Z ymm k zmm
func VCVTTPS2UQQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTPS2UQQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTTSD2SI: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SI m64 r32
// VCVTTSD2SI xmm r32
func VCVTTSD2SI(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2SI.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSD2SIQ: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer.
//
// Forms:
//
// VCVTTSD2SIQ m64 r64
// VCVTTSD2SIQ xmm r64
func VCVTTSD2SIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2SIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSD2SIQ_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SIQ.SAE xmm r64
func VCVTTSD2SIQ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2SIQ.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSD2SI_SAE: Convert with Truncation Scalar Double-Precision FP Value to Signed Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2SI.SAE xmm r32
func VCVTTSD2SI_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2SI.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSD2USIL: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIL m64 r32
// VCVTTSD2USIL xmm r32
func VCVTTSD2USIL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2USIL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSD2USIL_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIL.SAE xmm r32
func VCVTTSD2USIL_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2USIL.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSD2USIQ: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSD2USIQ m64 r64
// VCVTTSD2USIQ xmm r64
func VCVTTSD2USIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2USIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSD2USIQ_SAE: Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSD2USIQ.SAE xmm r64
func VCVTTSD2USIQ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSD2USIQ.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSS2SI: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SI m32 r32
// VCVTTSS2SI xmm r32
func VCVTTSS2SI(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2SI.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSS2SIQ: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
//
// Forms:
//
// VCVTTSS2SIQ m32 r64
// VCVTTSS2SIQ xmm r64
func VCVTTSS2SIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2SIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSS2SIQ_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SIQ.SAE xmm r64
func VCVTTSS2SIQ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2SIQ.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSS2SI_SAE: Convert with Truncation Scalar Single-Precision FP Value to Dword Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2SI.SAE xmm r32
func VCVTTSS2SI_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2SI.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSS2USIL: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIL m32 r32
// VCVTTSS2USIL xmm r32
func VCVTTSS2USIL(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2USIL.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSS2USIL_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIL.SAE xmm r32
func VCVTTSS2USIL_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2USIL.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTTSS2USIQ: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer.
//
// Forms:
//
// VCVTTSS2USIQ m32 r64
// VCVTTSS2USIQ xmm r64
func VCVTTSS2USIQ(mx, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2USIQ.Forms(), sffxs{}, []operand.Op{mx, r})
}
// VCVTTSS2USIQ_SAE: Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (Suppress All Exceptions).
//
// Forms:
//
// VCVTTSS2USIQ.SAE xmm r64
func VCVTTSS2USIQ_SAE(x, r operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTTSS2USIQ.Forms(), sffxs{sffxSAE}, []operand.Op{x, r})
}
// VCVTUDQ2PD: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PD m128 k ymm
// VCVTUDQ2PD m128 ymm
// VCVTUDQ2PD m64 k xmm
// VCVTUDQ2PD m64 xmm
// VCVTUDQ2PD xmm k xmm
// VCVTUDQ2PD xmm k ymm
// VCVTUDQ2PD xmm xmm
// VCVTUDQ2PD xmm ymm
// VCVTUDQ2PD m256 k zmm
// VCVTUDQ2PD m256 zmm
// VCVTUDQ2PD ymm k zmm
// VCVTUDQ2PD ymm zmm
func VCVTUDQ2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PD.Forms(), sffxs{}, ops)
}
// VCVTUDQ2PD_BCST: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PD.BCST m32 k xmm
// VCVTUDQ2PD.BCST m32 k ymm
// VCVTUDQ2PD.BCST m32 xmm
// VCVTUDQ2PD.BCST m32 ymm
// VCVTUDQ2PD.BCST m32 k zmm
// VCVTUDQ2PD.BCST m32 zmm
func VCVTUDQ2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUDQ2PD_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.BCST.Z m32 k xmm
// VCVTUDQ2PD.BCST.Z m32 k ymm
// VCVTUDQ2PD.BCST.Z m32 k zmm
func VCVTUDQ2PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTUDQ2PD_Z: Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PD.Z m128 k ymm
// VCVTUDQ2PD.Z m64 k xmm
// VCVTUDQ2PD.Z xmm k xmm
// VCVTUDQ2PD.Z xmm k ymm
// VCVTUDQ2PD.Z m256 k zmm
// VCVTUDQ2PD.Z ymm k zmm
func VCVTUDQ2PD_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VCVTUDQ2PS: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUDQ2PS m128 k xmm
// VCVTUDQ2PS m128 xmm
// VCVTUDQ2PS m256 k ymm
// VCVTUDQ2PS m256 ymm
// VCVTUDQ2PS xmm k xmm
// VCVTUDQ2PS xmm xmm
// VCVTUDQ2PS ymm k ymm
// VCVTUDQ2PS ymm ymm
// VCVTUDQ2PS m512 k zmm
// VCVTUDQ2PS m512 zmm
// VCVTUDQ2PS zmm k zmm
// VCVTUDQ2PS zmm zmm
func VCVTUDQ2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{}, ops)
}
// VCVTUDQ2PS_BCST: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUDQ2PS.BCST m32 k xmm
// VCVTUDQ2PS.BCST m32 k ymm
// VCVTUDQ2PS.BCST m32 xmm
// VCVTUDQ2PS.BCST m32 ymm
// VCVTUDQ2PS.BCST m32 k zmm
// VCVTUDQ2PS.BCST m32 zmm
func VCVTUDQ2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUDQ2PS_BCST_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.BCST.Z m32 k xmm
// VCVTUDQ2PS.BCST.Z m32 k ymm
// VCVTUDQ2PS.BCST.Z m32 k zmm
func VCVTUDQ2PS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTUDQ2PS_RD_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE zmm k zmm
// VCVTUDQ2PS.RD_SAE zmm zmm
func VCVTUDQ2PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTUDQ2PS_RD_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RD_SAE.Z zmm k zmm
func VCVTUDQ2PS_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUDQ2PS_RN_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE zmm k zmm
// VCVTUDQ2PS.RN_SAE zmm zmm
func VCVTUDQ2PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTUDQ2PS_RN_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RN_SAE.Z zmm k zmm
func VCVTUDQ2PS_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUDQ2PS_RU_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE zmm k zmm
// VCVTUDQ2PS.RU_SAE zmm zmm
func VCVTUDQ2PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTUDQ2PS_RU_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RU_SAE.Z zmm k zmm
func VCVTUDQ2PS_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUDQ2PS_RZ_SAE: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE zmm k zmm
// VCVTUDQ2PS.RZ_SAE zmm zmm
func VCVTUDQ2PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTUDQ2PS_RZ_SAE_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.RZ_SAE.Z zmm k zmm
func VCVTUDQ2PS_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUDQ2PS_Z: Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUDQ2PS.Z m128 k xmm
// VCVTUDQ2PS.Z m256 k ymm
// VCVTUDQ2PS.Z xmm k xmm
// VCVTUDQ2PS.Z ymm k ymm
// VCVTUDQ2PS.Z m512 k zmm
// VCVTUDQ2PS.Z zmm k zmm
func VCVTUDQ2PS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUDQ2PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTUQQ2PD: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PD m128 k xmm
// VCVTUQQ2PD m128 xmm
// VCVTUQQ2PD m256 k ymm
// VCVTUQQ2PD m256 ymm
// VCVTUQQ2PD xmm k xmm
// VCVTUQQ2PD xmm xmm
// VCVTUQQ2PD ymm k ymm
// VCVTUQQ2PD ymm ymm
// VCVTUQQ2PD m512 k zmm
// VCVTUQQ2PD m512 zmm
// VCVTUQQ2PD zmm k zmm
// VCVTUQQ2PD zmm zmm
func VCVTUQQ2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{}, ops)
}
// VCVTUQQ2PD_BCST: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PD.BCST m64 k xmm
// VCVTUQQ2PD.BCST m64 k ymm
// VCVTUQQ2PD.BCST m64 xmm
// VCVTUQQ2PD.BCST m64 ymm
// VCVTUQQ2PD.BCST m64 k zmm
// VCVTUQQ2PD.BCST m64 zmm
func VCVTUQQ2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUQQ2PD_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.BCST.Z m64 k xmm
// VCVTUQQ2PD.BCST.Z m64 k ymm
// VCVTUQQ2PD.BCST.Z m64 k zmm
func VCVTUQQ2PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VCVTUQQ2PD_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE zmm k zmm
// VCVTUQQ2PD.RD_SAE zmm zmm
func VCVTUQQ2PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTUQQ2PD_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RD_SAE.Z zmm k zmm
func VCVTUQQ2PD_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUQQ2PD_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE zmm k zmm
// VCVTUQQ2PD.RN_SAE zmm zmm
func VCVTUQQ2PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTUQQ2PD_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RN_SAE.Z zmm k zmm
func VCVTUQQ2PD_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUQQ2PD_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE zmm k zmm
// VCVTUQQ2PD.RU_SAE zmm zmm
func VCVTUQQ2PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTUQQ2PD_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RU_SAE.Z zmm k zmm
func VCVTUQQ2PD_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUQQ2PD_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE zmm k zmm
// VCVTUQQ2PD.RZ_SAE zmm zmm
func VCVTUQQ2PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTUQQ2PD_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.RZ_SAE.Z zmm k zmm
func VCVTUQQ2PD_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VCVTUQQ2PD_Z: Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PD.Z m128 k xmm
// VCVTUQQ2PD.Z m256 k ymm
// VCVTUQQ2PD.Z xmm k xmm
// VCVTUQQ2PD.Z ymm k ymm
// VCVTUQQ2PD.Z m512 k zmm
// VCVTUQQ2PD.Z zmm k zmm
func VCVTUQQ2PD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VCVTUQQ2PS: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PS m512 k ymm
// VCVTUQQ2PS m512 ymm
// VCVTUQQ2PS zmm k ymm
// VCVTUQQ2PS zmm ymm
func VCVTUQQ2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{}, ops)
}
// VCVTUQQ2PSX: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSX m128 k xmm
// VCVTUQQ2PSX m128 xmm
// VCVTUQQ2PSX xmm k xmm
// VCVTUQQ2PSX xmm xmm
func VCVTUQQ2PSX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSX.Forms(), sffxs{}, ops)
}
// VCVTUQQ2PSX_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSX.BCST m64 k xmm
// VCVTUQQ2PSX.BCST m64 xmm
func VCVTUQQ2PSX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSX.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUQQ2PSX_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.BCST.Z m64 k xmm
func VCVTUQQ2PSX_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSX.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTUQQ2PSX_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSX.Z m128 k xmm
// VCVTUQQ2PSX.Z xmm k xmm
func VCVTUQQ2PSX_Z(mx, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSX.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, x})
}
// VCVTUQQ2PSY: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VCVTUQQ2PSY m256 k xmm
// VCVTUQQ2PSY m256 xmm
// VCVTUQQ2PSY ymm k xmm
// VCVTUQQ2PSY ymm xmm
func VCVTUQQ2PSY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSY.Forms(), sffxs{}, ops)
}
// VCVTUQQ2PSY_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PSY.BCST m64 k xmm
// VCVTUQQ2PSY.BCST m64 xmm
func VCVTUQQ2PSY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSY.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUQQ2PSY_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.BCST.Z m64 k xmm
func VCVTUQQ2PSY_BCST_Z(m, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSY.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, x})
}
// VCVTUQQ2PSY_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PSY.Z m256 k xmm
// VCVTUQQ2PSY.Z ymm k xmm
func VCVTUQQ2PSY_Z(my, k, x operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PSY.Forms(), sffxs{sffxZ}, []operand.Op{my, k, x})
}
// VCVTUQQ2PS_BCST: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VCVTUQQ2PS.BCST m64 k ymm
// VCVTUQQ2PS.BCST m64 ymm
func VCVTUQQ2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VCVTUQQ2PS_BCST_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.BCST.Z m64 k ymm
func VCVTUQQ2PS_BCST_Z(m, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, y})
}
// VCVTUQQ2PS_RD_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE zmm k ymm
// VCVTUQQ2PS.RD_SAE zmm ymm
func VCVTUQQ2PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VCVTUQQ2PS_RD_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RD_SAE.Z zmm k ymm
func VCVTUQQ2PS_RD_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTUQQ2PS_RN_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE zmm k ymm
// VCVTUQQ2PS.RN_SAE zmm ymm
func VCVTUQQ2PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VCVTUQQ2PS_RN_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RN_SAE.Z zmm k ymm
func VCVTUQQ2PS_RN_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTUQQ2PS_RU_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE zmm k ymm
// VCVTUQQ2PS.RU_SAE zmm ymm
func VCVTUQQ2PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VCVTUQQ2PS_RU_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RU_SAE.Z zmm k ymm
func VCVTUQQ2PS_RU_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTUQQ2PS_RZ_SAE: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE zmm k ymm
// VCVTUQQ2PS.RZ_SAE zmm ymm
func VCVTUQQ2PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VCVTUQQ2PS_RZ_SAE_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.RZ_SAE.Z zmm k ymm
func VCVTUQQ2PS_RZ_SAE_Z(z, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, y})
}
// VCVTUQQ2PS_Z: Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VCVTUQQ2PS.Z m512 k ymm
// VCVTUQQ2PS.Z zmm k ymm
func VCVTUQQ2PS_Z(mz, k, y operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUQQ2PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, y})
}
// VCVTUSI2SDL: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDL m32 xmm xmm
// VCVTUSI2SDL r32 xmm xmm
func VCVTUSI2SDL(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDL.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTUSI2SDQ: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SDQ m64 xmm xmm
// VCVTUSI2SDQ r64 xmm xmm
func VCVTUSI2SDQ(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDQ.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTUSI2SDQ_RD_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RD_SAE r64 xmm xmm
func VCVTUSI2SDQ_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SDQ_RN_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SDQ.RN_SAE r64 xmm xmm
func VCVTUSI2SDQ_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SDQ_RU_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SDQ.RU_SAE r64 xmm xmm
func VCVTUSI2SDQ_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SDQ_RZ_SAE: Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SDQ.RZ_SAE r64 xmm xmm
func VCVTUSI2SDQ_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SDQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSL: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSL m32 xmm xmm
// VCVTUSI2SSL r32 xmm xmm
func VCVTUSI2SSL(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSL.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTUSI2SSL_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RD_SAE r32 xmm xmm
func VCVTUSI2SSL_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSL.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSL_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSL.RN_SAE r32 xmm xmm
func VCVTUSI2SSL_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSL.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSL_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSL.RU_SAE r32 xmm xmm
func VCVTUSI2SSL_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSL.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSL_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSL.RZ_SAE r32 xmm xmm
func VCVTUSI2SSL_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSL.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSQ: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VCVTUSI2SSQ m64 xmm xmm
// VCVTUSI2SSQ r64 xmm xmm
func VCVTUSI2SSQ(mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSQ.Forms(), sffxs{}, []operand.Op{mr, x, x1})
}
// VCVTUSI2SSQ_RD_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RD_SAE r64 xmm xmm
func VCVTUSI2SSQ_RD_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSQ.Forms(), sffxs{sffxRD_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSQ_RN_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VCVTUSI2SSQ.RN_SAE r64 xmm xmm
func VCVTUSI2SSQ_RN_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSQ.Forms(), sffxs{sffxRN_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSQ_RU_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VCVTUSI2SSQ.RU_SAE r64 xmm xmm
func VCVTUSI2SSQ_RU_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSQ.Forms(), sffxs{sffxRU_SAE}, []operand.Op{r, x, x1})
}
// VCVTUSI2SSQ_RZ_SAE: Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VCVTUSI2SSQ.RZ_SAE r64 xmm xmm
func VCVTUSI2SSQ_RZ_SAE(r, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVCVTUSI2SSQ.Forms(), sffxs{sffxRZ_SAE}, []operand.Op{r, x, x1})
}
// VDBPSADBW: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes.
//
// Forms:
//
// VDBPSADBW imm8 m128 xmm k xmm
// VDBPSADBW imm8 m128 xmm xmm
// VDBPSADBW imm8 m256 ymm k ymm
// VDBPSADBW imm8 m256 ymm ymm
// VDBPSADBW imm8 xmm xmm k xmm
// VDBPSADBW imm8 xmm xmm xmm
// VDBPSADBW imm8 ymm ymm k ymm
// VDBPSADBW imm8 ymm ymm ymm
// VDBPSADBW imm8 m512 zmm k zmm
// VDBPSADBW imm8 m512 zmm zmm
// VDBPSADBW imm8 zmm zmm k zmm
// VDBPSADBW imm8 zmm zmm zmm
func VDBPSADBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDBPSADBW.Forms(), sffxs{}, ops)
}
// VDBPSADBW_Z: Double Block Packed Sum-Absolute-Differences on Unsigned Bytes (Zeroing Masking).
//
// Forms:
//
// VDBPSADBW.Z imm8 m128 xmm k xmm
// VDBPSADBW.Z imm8 m256 ymm k ymm
// VDBPSADBW.Z imm8 xmm xmm k xmm
// VDBPSADBW.Z imm8 ymm ymm k ymm
// VDBPSADBW.Z imm8 m512 zmm k zmm
// VDBPSADBW.Z imm8 zmm zmm k zmm
func VDBPSADBW_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDBPSADBW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VDIVPD: Divide Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPD m128 xmm xmm
// VDIVPD m256 ymm ymm
// VDIVPD xmm xmm xmm
// VDIVPD ymm ymm ymm
// VDIVPD m128 xmm k xmm
// VDIVPD m256 ymm k ymm
// VDIVPD xmm xmm k xmm
// VDIVPD ymm ymm k ymm
// VDIVPD m512 zmm k zmm
// VDIVPD m512 zmm zmm
// VDIVPD zmm zmm k zmm
// VDIVPD zmm zmm zmm
func VDIVPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{}, ops)
}
// VDIVPD_BCST: Divide Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPD.BCST m64 xmm k xmm
// VDIVPD.BCST m64 xmm xmm
// VDIVPD.BCST m64 ymm k ymm
// VDIVPD.BCST m64 ymm ymm
// VDIVPD.BCST m64 zmm k zmm
// VDIVPD.BCST m64 zmm zmm
func VDIVPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxBCST}, ops)
}
// VDIVPD_BCST_Z: Divide Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPD.BCST.Z m64 xmm k xmm
// VDIVPD.BCST.Z m64 ymm k ymm
// VDIVPD.BCST.Z m64 zmm k zmm
func VDIVPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VDIVPD_RD_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPD.RD_SAE zmm zmm k zmm
// VDIVPD.RD_SAE zmm zmm zmm
func VDIVPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VDIVPD_RD_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RD_SAE.Z zmm zmm k zmm
func VDIVPD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPD_RN_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPD.RN_SAE zmm zmm k zmm
// VDIVPD.RN_SAE zmm zmm zmm
func VDIVPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VDIVPD_RN_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RN_SAE.Z zmm zmm k zmm
func VDIVPD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPD_RU_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPD.RU_SAE zmm zmm k zmm
// VDIVPD.RU_SAE zmm zmm zmm
func VDIVPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VDIVPD_RU_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RU_SAE.Z zmm zmm k zmm
func VDIVPD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPD_RZ_SAE: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPD.RZ_SAE zmm zmm k zmm
// VDIVPD.RZ_SAE zmm zmm zmm
func VDIVPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VDIVPD_RZ_SAE_Z: Divide Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPD.RZ_SAE.Z zmm zmm k zmm
func VDIVPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPD_Z: Divide Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPD.Z m128 xmm k xmm
// VDIVPD.Z m256 ymm k ymm
// VDIVPD.Z xmm xmm k xmm
// VDIVPD.Z ymm ymm k ymm
// VDIVPD.Z m512 zmm k zmm
// VDIVPD.Z zmm zmm k zmm
func VDIVPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VDIVPS: Divide Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVPS m128 xmm xmm
// VDIVPS m256 ymm ymm
// VDIVPS xmm xmm xmm
// VDIVPS ymm ymm ymm
// VDIVPS m128 xmm k xmm
// VDIVPS m256 ymm k ymm
// VDIVPS xmm xmm k xmm
// VDIVPS ymm ymm k ymm
// VDIVPS m512 zmm k zmm
// VDIVPS m512 zmm zmm
// VDIVPS zmm zmm k zmm
// VDIVPS zmm zmm zmm
func VDIVPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{}, ops)
}
// VDIVPS_BCST: Divide Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VDIVPS.BCST m32 xmm k xmm
// VDIVPS.BCST m32 xmm xmm
// VDIVPS.BCST m32 ymm k ymm
// VDIVPS.BCST m32 ymm ymm
// VDIVPS.BCST m32 zmm k zmm
// VDIVPS.BCST m32 zmm zmm
func VDIVPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxBCST}, ops)
}
// VDIVPS_BCST_Z: Divide Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VDIVPS.BCST.Z m32 xmm k xmm
// VDIVPS.BCST.Z m32 ymm k ymm
// VDIVPS.BCST.Z m32 zmm k zmm
func VDIVPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VDIVPS_RD_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVPS.RD_SAE zmm zmm k zmm
// VDIVPS.RD_SAE zmm zmm zmm
func VDIVPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VDIVPS_RD_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RD_SAE.Z zmm zmm k zmm
func VDIVPS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPS_RN_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVPS.RN_SAE zmm zmm k zmm
// VDIVPS.RN_SAE zmm zmm zmm
func VDIVPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VDIVPS_RN_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RN_SAE.Z zmm zmm k zmm
func VDIVPS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPS_RU_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVPS.RU_SAE zmm zmm k zmm
// VDIVPS.RU_SAE zmm zmm zmm
func VDIVPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VDIVPS_RU_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RU_SAE.Z zmm zmm k zmm
func VDIVPS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPS_RZ_SAE: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVPS.RZ_SAE zmm zmm k zmm
// VDIVPS.RZ_SAE zmm zmm zmm
func VDIVPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VDIVPS_RZ_SAE_Z: Divide Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVPS.RZ_SAE.Z zmm zmm k zmm
func VDIVPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VDIVPS_Z: Divide Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVPS.Z m128 xmm k xmm
// VDIVPS.Z m256 ymm k ymm
// VDIVPS.Z xmm xmm k xmm
// VDIVPS.Z ymm ymm k ymm
// VDIVPS.Z m512 zmm k zmm
// VDIVPS.Z zmm zmm k zmm
func VDIVPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VDIVSD: Divide Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSD m64 xmm xmm
// VDIVSD xmm xmm xmm
// VDIVSD m64 xmm k xmm
// VDIVSD xmm xmm k xmm
func VDIVSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{}, ops)
}
// VDIVSD_RD_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSD.RD_SAE xmm xmm k xmm
// VDIVSD.RD_SAE xmm xmm xmm
func VDIVSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VDIVSD_RD_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RD_SAE.Z xmm xmm k xmm
func VDIVSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSD_RN_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSD.RN_SAE xmm xmm k xmm
// VDIVSD.RN_SAE xmm xmm xmm
func VDIVSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VDIVSD_RN_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RN_SAE.Z xmm xmm k xmm
func VDIVSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSD_RU_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSD.RU_SAE xmm xmm k xmm
// VDIVSD.RU_SAE xmm xmm xmm
func VDIVSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VDIVSD_RU_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RU_SAE.Z xmm xmm k xmm
func VDIVSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSD_RZ_SAE: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSD.RZ_SAE xmm xmm k xmm
// VDIVSD.RZ_SAE xmm xmm xmm
func VDIVSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VDIVSD_RZ_SAE_Z: Divide Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSD.RZ_SAE.Z xmm xmm k xmm
func VDIVSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSD_Z: Divide Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSD.Z m64 xmm k xmm
// VDIVSD.Z xmm xmm k xmm
func VDIVSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VDIVSS: Divide Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VDIVSS m32 xmm xmm
// VDIVSS xmm xmm xmm
// VDIVSS m32 xmm k xmm
// VDIVSS xmm xmm k xmm
func VDIVSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{}, ops)
}
// VDIVSS_RD_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VDIVSS.RD_SAE xmm xmm k xmm
// VDIVSS.RD_SAE xmm xmm xmm
func VDIVSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VDIVSS_RD_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RD_SAE.Z xmm xmm k xmm
func VDIVSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSS_RN_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VDIVSS.RN_SAE xmm xmm k xmm
// VDIVSS.RN_SAE xmm xmm xmm
func VDIVSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VDIVSS_RN_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RN_SAE.Z xmm xmm k xmm
func VDIVSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSS_RU_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VDIVSS.RU_SAE xmm xmm k xmm
// VDIVSS.RU_SAE xmm xmm xmm
func VDIVSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VDIVSS_RU_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RU_SAE.Z xmm xmm k xmm
func VDIVSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSS_RZ_SAE: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VDIVSS.RZ_SAE xmm xmm k xmm
// VDIVSS.RZ_SAE xmm xmm xmm
func VDIVSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VDIVSS_RZ_SAE_Z: Divide Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VDIVSS.RZ_SAE.Z xmm xmm k xmm
func VDIVSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VDIVSS_Z: Divide Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VDIVSS.Z m32 xmm k xmm
// VDIVSS.Z xmm xmm k xmm
func VDIVSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDIVSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VDPPD: Dot Product of Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VDPPD imm8 m128 xmm xmm
// VDPPD imm8 xmm xmm xmm
func VDPPD(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDPPD.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
}
// VDPPS: Dot Product of Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VDPPS imm8 m128 xmm xmm
// VDPPS imm8 m256 ymm ymm
// VDPPS imm8 xmm xmm xmm
// VDPPS imm8 ymm ymm ymm
func VDPPS(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVDPPS.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VEXP2PD: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PD m512 k zmm
// VEXP2PD m512 zmm
// VEXP2PD zmm k zmm
// VEXP2PD zmm zmm
func VEXP2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{}, ops)
}
// VEXP2PD_BCST: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PD.BCST m64 k zmm
// VEXP2PD.BCST m64 zmm
func VEXP2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VEXP2PD_BCST_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.BCST.Z m64 k zmm
func VEXP2PD_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VEXP2PD_SAE: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PD.SAE zmm k zmm
// VEXP2PD.SAE zmm zmm
func VEXP2PD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{sffxSAE}, ops)
}
// VEXP2PD_SAE_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PD.SAE.Z zmm k zmm
func VEXP2PD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VEXP2PD_Z: Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PD.Z m512 k zmm
// VEXP2PD.Z zmm k zmm
func VEXP2PD_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PD.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VEXP2PS: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error.
//
// Forms:
//
// VEXP2PS m512 k zmm
// VEXP2PS m512 zmm
// VEXP2PS zmm k zmm
// VEXP2PS zmm zmm
func VEXP2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{}, ops)
}
// VEXP2PS_BCST: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast).
//
// Forms:
//
// VEXP2PS.BCST m32 k zmm
// VEXP2PS.BCST m32 zmm
func VEXP2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VEXP2PS_BCST_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.BCST.Z m32 k zmm
func VEXP2PS_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VEXP2PS_SAE: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VEXP2PS.SAE zmm k zmm
// VEXP2PS.SAE zmm zmm
func VEXP2PS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{sffxSAE}, ops)
}
// VEXP2PS_SAE_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VEXP2PS.SAE.Z zmm k zmm
func VEXP2PS_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VEXP2PS_Z: Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (Zeroing Masking).
//
// Forms:
//
// VEXP2PS.Z m512 k zmm
// VEXP2PS.Z zmm k zmm
func VEXP2PS_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVEXP2PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VEXPANDPD: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPD m256 k ymm
// VEXPANDPD m256 ymm
// VEXPANDPD ymm k ymm
// VEXPANDPD ymm ymm
// VEXPANDPD m512 k zmm
// VEXPANDPD m512 zmm
// VEXPANDPD zmm k zmm
// VEXPANDPD zmm zmm
// VEXPANDPD m128 k xmm
// VEXPANDPD m128 xmm
// VEXPANDPD xmm k xmm
// VEXPANDPD xmm xmm
func VEXPANDPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXPANDPD.Forms(), sffxs{}, ops)
}
// VEXPANDPD_Z: Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPD.Z m256 k ymm
// VEXPANDPD.Z ymm k ymm
// VEXPANDPD.Z m512 k zmm
// VEXPANDPD.Z zmm k zmm
// VEXPANDPD.Z m128 k xmm
// VEXPANDPD.Z xmm k xmm
func VEXPANDPD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVEXPANDPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VEXPANDPS: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory.
//
// Forms:
//
// VEXPANDPS m128 k xmm
// VEXPANDPS m128 xmm
// VEXPANDPS m256 k ymm
// VEXPANDPS m256 ymm
// VEXPANDPS xmm k xmm
// VEXPANDPS xmm xmm
// VEXPANDPS ymm k ymm
// VEXPANDPS ymm ymm
// VEXPANDPS m512 k zmm
// VEXPANDPS m512 zmm
// VEXPANDPS zmm k zmm
// VEXPANDPS zmm zmm
func VEXPANDPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXPANDPS.Forms(), sffxs{}, ops)
}
// VEXPANDPS_Z: Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory (Zeroing Masking).
//
// Forms:
//
// VEXPANDPS.Z m128 k xmm
// VEXPANDPS.Z m256 k ymm
// VEXPANDPS.Z xmm k xmm
// VEXPANDPS.Z ymm k ymm
// VEXPANDPS.Z m512 k zmm
// VEXPANDPS.Z zmm k zmm
func VEXPANDPS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVEXPANDPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VEXTRACTF128: Extract Packed Floating-Point Values.
//
// Forms:
//
// VEXTRACTF128 imm8 ymm m128
// VEXTRACTF128 imm8 ymm xmm
func VEXTRACTF128(i, y, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF128.Forms(), sffxs{}, []operand.Op{i, y, mx})
}
// VEXTRACTF32X4: Extract 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X4 imm8 ymm k m128
// VEXTRACTF32X4 imm8 ymm k xmm
// VEXTRACTF32X4 imm8 ymm m128
// VEXTRACTF32X4 imm8 ymm xmm
// VEXTRACTF32X4 imm8 zmm k m128
// VEXTRACTF32X4 imm8 zmm k xmm
// VEXTRACTF32X4 imm8 zmm m128
// VEXTRACTF32X4 imm8 zmm xmm
func VEXTRACTF32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF32X4.Forms(), sffxs{}, ops)
}
// VEXTRACTF32X4_Z: Extract 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X4.Z imm8 ymm k m128
// VEXTRACTF32X4.Z imm8 ymm k xmm
// VEXTRACTF32X4.Z imm8 zmm k m128
// VEXTRACTF32X4.Z imm8 zmm k xmm
func VEXTRACTF32X4_Z(i, yz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, yz, k, mx})
}
// VEXTRACTF32X8: Extract 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF32X8 imm8 zmm k m256
// VEXTRACTF32X8 imm8 zmm k ymm
// VEXTRACTF32X8 imm8 zmm m256
// VEXTRACTF32X8 imm8 zmm ymm
func VEXTRACTF32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF32X8.Forms(), sffxs{}, ops)
}
// VEXTRACTF32X8_Z: Extract 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF32X8.Z imm8 zmm k m256
// VEXTRACTF32X8.Z imm8 zmm k ymm
func VEXTRACTF32X8_Z(i, z, k, my operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF32X8.Forms(), sffxs{sffxZ}, []operand.Op{i, z, k, my})
}
// VEXTRACTF64X2: Extract 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X2 imm8 ymm k m128
// VEXTRACTF64X2 imm8 ymm k xmm
// VEXTRACTF64X2 imm8 ymm m128
// VEXTRACTF64X2 imm8 ymm xmm
// VEXTRACTF64X2 imm8 zmm k m128
// VEXTRACTF64X2 imm8 zmm k xmm
// VEXTRACTF64X2 imm8 zmm m128
// VEXTRACTF64X2 imm8 zmm xmm
func VEXTRACTF64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF64X2.Forms(), sffxs{}, ops)
}
// VEXTRACTF64X2_Z: Extract 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X2.Z imm8 ymm k m128
// VEXTRACTF64X2.Z imm8 ymm k xmm
// VEXTRACTF64X2.Z imm8 zmm k m128
// VEXTRACTF64X2.Z imm8 zmm k xmm
func VEXTRACTF64X2_Z(i, yz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, yz, k, mx})
}
// VEXTRACTF64X4: Extract 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VEXTRACTF64X4 imm8 zmm k m256
// VEXTRACTF64X4 imm8 zmm k ymm
// VEXTRACTF64X4 imm8 zmm m256
// VEXTRACTF64X4 imm8 zmm ymm
func VEXTRACTF64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF64X4.Forms(), sffxs{}, ops)
}
// VEXTRACTF64X4_Z: Extract 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTF64X4.Z imm8 zmm k m256
// VEXTRACTF64X4.Z imm8 zmm k ymm
func VEXTRACTF64X4_Z(i, z, k, my operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTF64X4.Forms(), sffxs{sffxZ}, []operand.Op{i, z, k, my})
}
// VEXTRACTI128: Extract Packed Integer Values.
//
// Forms:
//
// VEXTRACTI128 imm8 ymm m128
// VEXTRACTI128 imm8 ymm xmm
func VEXTRACTI128(i, y, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI128.Forms(), sffxs{}, []operand.Op{i, y, mx})
}
// VEXTRACTI32X4: Extract 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X4 imm8 ymm k m128
// VEXTRACTI32X4 imm8 ymm k xmm
// VEXTRACTI32X4 imm8 ymm m128
// VEXTRACTI32X4 imm8 ymm xmm
// VEXTRACTI32X4 imm8 zmm k m128
// VEXTRACTI32X4 imm8 zmm k xmm
// VEXTRACTI32X4 imm8 zmm m128
// VEXTRACTI32X4 imm8 zmm xmm
func VEXTRACTI32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI32X4.Forms(), sffxs{}, ops)
}
// VEXTRACTI32X4_Z: Extract 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X4.Z imm8 ymm k m128
// VEXTRACTI32X4.Z imm8 ymm k xmm
// VEXTRACTI32X4.Z imm8 zmm k m128
// VEXTRACTI32X4.Z imm8 zmm k xmm
func VEXTRACTI32X4_Z(i, yz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, yz, k, mx})
}
// VEXTRACTI32X8: Extract 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VEXTRACTI32X8 imm8 zmm k m256
// VEXTRACTI32X8 imm8 zmm k ymm
// VEXTRACTI32X8 imm8 zmm m256
// VEXTRACTI32X8 imm8 zmm ymm
func VEXTRACTI32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI32X8.Forms(), sffxs{}, ops)
}
// VEXTRACTI32X8_Z: Extract 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI32X8.Z imm8 zmm k m256
// VEXTRACTI32X8.Z imm8 zmm k ymm
func VEXTRACTI32X8_Z(i, z, k, my operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI32X8.Forms(), sffxs{sffxZ}, []operand.Op{i, z, k, my})
}
// VEXTRACTI64X2: Extract 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X2 imm8 ymm k m128
// VEXTRACTI64X2 imm8 ymm k xmm
// VEXTRACTI64X2 imm8 ymm m128
// VEXTRACTI64X2 imm8 ymm xmm
// VEXTRACTI64X2 imm8 zmm k m128
// VEXTRACTI64X2 imm8 zmm k xmm
// VEXTRACTI64X2 imm8 zmm m128
// VEXTRACTI64X2 imm8 zmm xmm
func VEXTRACTI64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI64X2.Forms(), sffxs{}, ops)
}
// VEXTRACTI64X2_Z: Extract 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X2.Z imm8 ymm k m128
// VEXTRACTI64X2.Z imm8 ymm k xmm
// VEXTRACTI64X2.Z imm8 zmm k m128
// VEXTRACTI64X2.Z imm8 zmm k xmm
func VEXTRACTI64X2_Z(i, yz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, yz, k, mx})
}
// VEXTRACTI64X4: Extract 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VEXTRACTI64X4 imm8 zmm k m256
// VEXTRACTI64X4 imm8 zmm k ymm
// VEXTRACTI64X4 imm8 zmm m256
// VEXTRACTI64X4 imm8 zmm ymm
func VEXTRACTI64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI64X4.Forms(), sffxs{}, ops)
}
// VEXTRACTI64X4_Z: Extract 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VEXTRACTI64X4.Z imm8 zmm k m256
// VEXTRACTI64X4.Z imm8 zmm k ymm
func VEXTRACTI64X4_Z(i, z, k, my operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTI64X4.Forms(), sffxs{sffxZ}, []operand.Op{i, z, k, my})
}
// VEXTRACTPS: Extract Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VEXTRACTPS imm8 xmm m32
// VEXTRACTPS imm8 xmm r32
func VEXTRACTPS(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcVEXTRACTPS.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// VFIXUPIMMPD: Fix Up Special Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPD imm8 m128 xmm k xmm
// VFIXUPIMMPD imm8 m128 xmm xmm
// VFIXUPIMMPD imm8 m256 ymm k ymm
// VFIXUPIMMPD imm8 m256 ymm ymm
// VFIXUPIMMPD imm8 xmm xmm k xmm
// VFIXUPIMMPD imm8 xmm xmm xmm
// VFIXUPIMMPD imm8 ymm ymm k ymm
// VFIXUPIMMPD imm8 ymm ymm ymm
// VFIXUPIMMPD imm8 m512 zmm k zmm
// VFIXUPIMMPD imm8 m512 zmm zmm
// VFIXUPIMMPD imm8 zmm zmm k zmm
// VFIXUPIMMPD imm8 zmm zmm zmm
func VFIXUPIMMPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{}, ops)
}
// VFIXUPIMMPD_BCST: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPD.BCST imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST imm8 m64 xmm xmm
// VFIXUPIMMPD.BCST imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST imm8 m64 ymm ymm
// VFIXUPIMMPD.BCST imm8 m64 zmm k zmm
// VFIXUPIMMPD.BCST imm8 m64 zmm zmm
func VFIXUPIMMPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{sffxBCST}, ops)
}
// VFIXUPIMMPD_BCST_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.BCST.Z imm8 m64 xmm k xmm
// VFIXUPIMMPD.BCST.Z imm8 m64 ymm k ymm
// VFIXUPIMMPD.BCST.Z imm8 m64 zmm k zmm
func VFIXUPIMMPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VFIXUPIMMPD_SAE: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPD.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPD.SAE imm8 zmm zmm zmm
func VFIXUPIMMPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{sffxSAE}, ops)
}
// VFIXUPIMMPD_SAE_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.SAE.Z imm8 zmm zmm k zmm
func VFIXUPIMMPD_SAE_Z(i, z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, z1, k, z2})
}
// VFIXUPIMMPD_Z: Fix Up Special Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPD.Z imm8 m128 xmm k xmm
// VFIXUPIMMPD.Z imm8 m256 ymm k ymm
// VFIXUPIMMPD.Z imm8 xmm xmm k xmm
// VFIXUPIMMPD.Z imm8 ymm ymm k ymm
// VFIXUPIMMPD.Z imm8 m512 zmm k zmm
// VFIXUPIMMPD.Z imm8 zmm zmm k zmm
func VFIXUPIMMPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VFIXUPIMMPS: Fix Up Special Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFIXUPIMMPS imm8 m256 ymm k ymm
// VFIXUPIMMPS imm8 m256 ymm ymm
// VFIXUPIMMPS imm8 ymm ymm k ymm
// VFIXUPIMMPS imm8 ymm ymm ymm
// VFIXUPIMMPS imm8 m512 zmm k zmm
// VFIXUPIMMPS imm8 m512 zmm zmm
// VFIXUPIMMPS imm8 zmm zmm k zmm
// VFIXUPIMMPS imm8 zmm zmm zmm
// VFIXUPIMMPS imm8 m128 xmm k xmm
// VFIXUPIMMPS imm8 m128 xmm xmm
// VFIXUPIMMPS imm8 xmm xmm k xmm
// VFIXUPIMMPS imm8 xmm xmm xmm
func VFIXUPIMMPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{}, ops)
}
// VFIXUPIMMPS_BCST: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFIXUPIMMPS.BCST imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST imm8 m32 ymm ymm
// VFIXUPIMMPS.BCST imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST imm8 m32 zmm zmm
// VFIXUPIMMPS.BCST imm8 m32 xmm k xmm
// VFIXUPIMMPS.BCST imm8 m32 xmm xmm
func VFIXUPIMMPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{sffxBCST}, ops)
}
// VFIXUPIMMPS_BCST_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.BCST.Z imm8 m32 ymm k ymm
// VFIXUPIMMPS.BCST.Z imm8 m32 zmm k zmm
// VFIXUPIMMPS.BCST.Z imm8 m32 xmm k xmm
func VFIXUPIMMPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VFIXUPIMMPS_SAE: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMPS.SAE imm8 zmm zmm k zmm
// VFIXUPIMMPS.SAE imm8 zmm zmm zmm
func VFIXUPIMMPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{sffxSAE}, ops)
}
// VFIXUPIMMPS_SAE_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.SAE.Z imm8 zmm zmm k zmm
func VFIXUPIMMPS_SAE_Z(i, z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, z1, k, z2})
}
// VFIXUPIMMPS_Z: Fix Up Special Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMPS.Z imm8 m256 ymm k ymm
// VFIXUPIMMPS.Z imm8 ymm ymm k ymm
// VFIXUPIMMPS.Z imm8 m512 zmm k zmm
// VFIXUPIMMPS.Z imm8 zmm zmm k zmm
// VFIXUPIMMPS.Z imm8 m128 xmm k xmm
// VFIXUPIMMPS.Z imm8 xmm xmm k xmm
func VFIXUPIMMPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VFIXUPIMMSD: Fix Up Special Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSD imm8 m64 xmm k xmm
// VFIXUPIMMSD imm8 m64 xmm xmm
// VFIXUPIMMSD imm8 xmm xmm k xmm
// VFIXUPIMMSD imm8 xmm xmm xmm
func VFIXUPIMMSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSD.Forms(), sffxs{}, ops)
}
// VFIXUPIMMSD_SAE: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSD.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSD.SAE imm8 xmm xmm xmm
func VFIXUPIMMSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSD.Forms(), sffxs{sffxSAE}, ops)
}
// VFIXUPIMMSD_SAE_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.SAE.Z imm8 xmm xmm k xmm
func VFIXUPIMMSD_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VFIXUPIMMSD_Z: Fix Up Special Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSD.Z imm8 m64 xmm k xmm
// VFIXUPIMMSD.Z imm8 xmm xmm k xmm
func VFIXUPIMMSD_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSD.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VFIXUPIMMSS: Fix Up Special Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFIXUPIMMSS imm8 m32 xmm k xmm
// VFIXUPIMMSS imm8 m32 xmm xmm
// VFIXUPIMMSS imm8 xmm xmm k xmm
// VFIXUPIMMSS imm8 xmm xmm xmm
func VFIXUPIMMSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSS.Forms(), sffxs{}, ops)
}
// VFIXUPIMMSS_SAE: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VFIXUPIMMSS.SAE imm8 xmm xmm k xmm
// VFIXUPIMMSS.SAE imm8 xmm xmm xmm
func VFIXUPIMMSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSS.Forms(), sffxs{sffxSAE}, ops)
}
// VFIXUPIMMSS_SAE_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.SAE.Z imm8 xmm xmm k xmm
func VFIXUPIMMSS_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VFIXUPIMMSS_Z: Fix Up Special Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VFIXUPIMMSS.Z imm8 m32 xmm k xmm
// VFIXUPIMMSS.Z imm8 xmm xmm k xmm
func VFIXUPIMMSS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFIXUPIMMSS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VFMADD132PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PD m128 xmm xmm
// VFMADD132PD m256 ymm ymm
// VFMADD132PD xmm xmm xmm
// VFMADD132PD ymm ymm ymm
// VFMADD132PD m128 xmm k xmm
// VFMADD132PD m256 ymm k ymm
// VFMADD132PD xmm xmm k xmm
// VFMADD132PD ymm ymm k ymm
// VFMADD132PD m512 zmm k zmm
// VFMADD132PD m512 zmm zmm
// VFMADD132PD zmm zmm k zmm
// VFMADD132PD zmm zmm zmm
func VFMADD132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{}, ops)
}
// VFMADD132PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PD.BCST m64 xmm k xmm
// VFMADD132PD.BCST m64 xmm xmm
// VFMADD132PD.BCST m64 ymm k ymm
// VFMADD132PD.BCST m64 ymm ymm
// VFMADD132PD.BCST m64 zmm k zmm
// VFMADD132PD.BCST m64 zmm zmm
func VFMADD132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD132PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.BCST.Z m64 xmm k xmm
// VFMADD132PD.BCST.Z m64 ymm k ymm
// VFMADD132PD.BCST.Z m64 zmm k zmm
func VFMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD132PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PD.RD_SAE zmm zmm k zmm
// VFMADD132PD.RD_SAE zmm zmm zmm
func VFMADD132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD132PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RD_SAE.Z zmm zmm k zmm
func VFMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PD.RN_SAE zmm zmm k zmm
// VFMADD132PD.RN_SAE zmm zmm zmm
func VFMADD132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD132PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RN_SAE.Z zmm zmm k zmm
func VFMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PD.RU_SAE zmm zmm k zmm
// VFMADD132PD.RU_SAE zmm zmm zmm
func VFMADD132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD132PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RU_SAE.Z zmm zmm k zmm
func VFMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PD.RZ_SAE zmm zmm k zmm
// VFMADD132PD.RZ_SAE zmm zmm zmm
func VFMADD132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD132PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.RZ_SAE.Z zmm zmm k zmm
func VFMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PD.Z m128 xmm k xmm
// VFMADD132PD.Z m256 ymm k ymm
// VFMADD132PD.Z xmm xmm k xmm
// VFMADD132PD.Z ymm ymm k ymm
// VFMADD132PD.Z m512 zmm k zmm
// VFMADD132PD.Z zmm zmm k zmm
func VFMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD132PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132PS m128 xmm xmm
// VFMADD132PS m256 ymm ymm
// VFMADD132PS xmm xmm xmm
// VFMADD132PS ymm ymm ymm
// VFMADD132PS m128 xmm k xmm
// VFMADD132PS m256 ymm k ymm
// VFMADD132PS xmm xmm k xmm
// VFMADD132PS ymm ymm k ymm
// VFMADD132PS m512 zmm k zmm
// VFMADD132PS m512 zmm zmm
// VFMADD132PS zmm zmm k zmm
// VFMADD132PS zmm zmm zmm
func VFMADD132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{}, ops)
}
// VFMADD132PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD132PS.BCST m32 xmm k xmm
// VFMADD132PS.BCST m32 xmm xmm
// VFMADD132PS.BCST m32 ymm k ymm
// VFMADD132PS.BCST m32 ymm ymm
// VFMADD132PS.BCST m32 zmm k zmm
// VFMADD132PS.BCST m32 zmm zmm
func VFMADD132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD132PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.BCST.Z m32 xmm k xmm
// VFMADD132PS.BCST.Z m32 ymm k ymm
// VFMADD132PS.BCST.Z m32 zmm k zmm
func VFMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD132PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132PS.RD_SAE zmm zmm k zmm
// VFMADD132PS.RD_SAE zmm zmm zmm
func VFMADD132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD132PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RD_SAE.Z zmm zmm k zmm
func VFMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132PS.RN_SAE zmm zmm k zmm
// VFMADD132PS.RN_SAE zmm zmm zmm
func VFMADD132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD132PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RN_SAE.Z zmm zmm k zmm
func VFMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132PS.RU_SAE zmm zmm k zmm
// VFMADD132PS.RU_SAE zmm zmm zmm
func VFMADD132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD132PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RU_SAE.Z zmm zmm k zmm
func VFMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132PS.RZ_SAE zmm zmm k zmm
// VFMADD132PS.RZ_SAE zmm zmm zmm
func VFMADD132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD132PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.RZ_SAE.Z zmm zmm k zmm
func VFMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD132PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132PS.Z m128 xmm k xmm
// VFMADD132PS.Z m256 ymm k ymm
// VFMADD132PS.Z xmm xmm k xmm
// VFMADD132PS.Z ymm ymm k ymm
// VFMADD132PS.Z m512 zmm k zmm
// VFMADD132PS.Z zmm zmm k zmm
func VFMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD132SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SD m64 xmm xmm
// VFMADD132SD xmm xmm xmm
// VFMADD132SD m64 xmm k xmm
// VFMADD132SD xmm xmm k xmm
func VFMADD132SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{}, ops)
}
// VFMADD132SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SD.RD_SAE xmm xmm k xmm
// VFMADD132SD.RD_SAE xmm xmm xmm
func VFMADD132SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD132SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RD_SAE.Z xmm xmm k xmm
func VFMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SD.RN_SAE xmm xmm k xmm
// VFMADD132SD.RN_SAE xmm xmm xmm
func VFMADD132SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD132SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RN_SAE.Z xmm xmm k xmm
func VFMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SD.RU_SAE xmm xmm k xmm
// VFMADD132SD.RU_SAE xmm xmm xmm
func VFMADD132SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD132SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RU_SAE.Z xmm xmm k xmm
func VFMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SD.RZ_SAE xmm xmm k xmm
// VFMADD132SD.RZ_SAE xmm xmm xmm
func VFMADD132SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD132SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.RZ_SAE.Z xmm xmm k xmm
func VFMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SD.Z m64 xmm k xmm
// VFMADD132SD.Z xmm xmm k xmm
func VFMADD132SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADD132SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD132SS m32 xmm xmm
// VFMADD132SS xmm xmm xmm
// VFMADD132SS m32 xmm k xmm
// VFMADD132SS xmm xmm k xmm
func VFMADD132SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{}, ops)
}
// VFMADD132SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD132SS.RD_SAE xmm xmm k xmm
// VFMADD132SS.RD_SAE xmm xmm xmm
func VFMADD132SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD132SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RD_SAE.Z xmm xmm k xmm
func VFMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD132SS.RN_SAE xmm xmm k xmm
// VFMADD132SS.RN_SAE xmm xmm xmm
func VFMADD132SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD132SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RN_SAE.Z xmm xmm k xmm
func VFMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD132SS.RU_SAE xmm xmm k xmm
// VFMADD132SS.RU_SAE xmm xmm xmm
func VFMADD132SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD132SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RU_SAE.Z xmm xmm k xmm
func VFMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD132SS.RZ_SAE xmm xmm k xmm
// VFMADD132SS.RZ_SAE xmm xmm xmm
func VFMADD132SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD132SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.RZ_SAE.Z xmm xmm k xmm
func VFMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD132SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD132SS.Z m32 xmm k xmm
// VFMADD132SS.Z xmm xmm k xmm
func VFMADD132SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD132SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADD213PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PD m128 xmm xmm
// VFMADD213PD m256 ymm ymm
// VFMADD213PD xmm xmm xmm
// VFMADD213PD ymm ymm ymm
// VFMADD213PD m128 xmm k xmm
// VFMADD213PD m256 ymm k ymm
// VFMADD213PD xmm xmm k xmm
// VFMADD213PD ymm ymm k ymm
// VFMADD213PD m512 zmm k zmm
// VFMADD213PD m512 zmm zmm
// VFMADD213PD zmm zmm k zmm
// VFMADD213PD zmm zmm zmm
func VFMADD213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{}, ops)
}
// VFMADD213PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PD.BCST m64 xmm k xmm
// VFMADD213PD.BCST m64 xmm xmm
// VFMADD213PD.BCST m64 ymm k ymm
// VFMADD213PD.BCST m64 ymm ymm
// VFMADD213PD.BCST m64 zmm k zmm
// VFMADD213PD.BCST m64 zmm zmm
func VFMADD213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD213PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.BCST.Z m64 xmm k xmm
// VFMADD213PD.BCST.Z m64 ymm k ymm
// VFMADD213PD.BCST.Z m64 zmm k zmm
func VFMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD213PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PD.RD_SAE zmm zmm k zmm
// VFMADD213PD.RD_SAE zmm zmm zmm
func VFMADD213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD213PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RD_SAE.Z zmm zmm k zmm
func VFMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PD.RN_SAE zmm zmm k zmm
// VFMADD213PD.RN_SAE zmm zmm zmm
func VFMADD213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD213PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RN_SAE.Z zmm zmm k zmm
func VFMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PD.RU_SAE zmm zmm k zmm
// VFMADD213PD.RU_SAE zmm zmm zmm
func VFMADD213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD213PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RU_SAE.Z zmm zmm k zmm
func VFMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PD.RZ_SAE zmm zmm k zmm
// VFMADD213PD.RZ_SAE zmm zmm zmm
func VFMADD213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD213PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.RZ_SAE.Z zmm zmm k zmm
func VFMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PD.Z m128 xmm k xmm
// VFMADD213PD.Z m256 ymm k ymm
// VFMADD213PD.Z xmm xmm k xmm
// VFMADD213PD.Z ymm ymm k ymm
// VFMADD213PD.Z m512 zmm k zmm
// VFMADD213PD.Z zmm zmm k zmm
func VFMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD213PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213PS m128 xmm xmm
// VFMADD213PS m256 ymm ymm
// VFMADD213PS xmm xmm xmm
// VFMADD213PS ymm ymm ymm
// VFMADD213PS m128 xmm k xmm
// VFMADD213PS m256 ymm k ymm
// VFMADD213PS xmm xmm k xmm
// VFMADD213PS ymm ymm k ymm
// VFMADD213PS m512 zmm k zmm
// VFMADD213PS m512 zmm zmm
// VFMADD213PS zmm zmm k zmm
// VFMADD213PS zmm zmm zmm
func VFMADD213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{}, ops)
}
// VFMADD213PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD213PS.BCST m32 xmm k xmm
// VFMADD213PS.BCST m32 xmm xmm
// VFMADD213PS.BCST m32 ymm k ymm
// VFMADD213PS.BCST m32 ymm ymm
// VFMADD213PS.BCST m32 zmm k zmm
// VFMADD213PS.BCST m32 zmm zmm
func VFMADD213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD213PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.BCST.Z m32 xmm k xmm
// VFMADD213PS.BCST.Z m32 ymm k ymm
// VFMADD213PS.BCST.Z m32 zmm k zmm
func VFMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD213PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213PS.RD_SAE zmm zmm k zmm
// VFMADD213PS.RD_SAE zmm zmm zmm
func VFMADD213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD213PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RD_SAE.Z zmm zmm k zmm
func VFMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213PS.RN_SAE zmm zmm k zmm
// VFMADD213PS.RN_SAE zmm zmm zmm
func VFMADD213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD213PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RN_SAE.Z zmm zmm k zmm
func VFMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213PS.RU_SAE zmm zmm k zmm
// VFMADD213PS.RU_SAE zmm zmm zmm
func VFMADD213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD213PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RU_SAE.Z zmm zmm k zmm
func VFMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213PS.RZ_SAE zmm zmm k zmm
// VFMADD213PS.RZ_SAE zmm zmm zmm
func VFMADD213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD213PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.RZ_SAE.Z zmm zmm k zmm
func VFMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD213PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213PS.Z m128 xmm k xmm
// VFMADD213PS.Z m256 ymm k ymm
// VFMADD213PS.Z xmm xmm k xmm
// VFMADD213PS.Z ymm ymm k ymm
// VFMADD213PS.Z m512 zmm k zmm
// VFMADD213PS.Z zmm zmm k zmm
func VFMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD213SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SD m64 xmm xmm
// VFMADD213SD xmm xmm xmm
// VFMADD213SD m64 xmm k xmm
// VFMADD213SD xmm xmm k xmm
func VFMADD213SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{}, ops)
}
// VFMADD213SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SD.RD_SAE xmm xmm k xmm
// VFMADD213SD.RD_SAE xmm xmm xmm
func VFMADD213SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD213SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RD_SAE.Z xmm xmm k xmm
func VFMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SD.RN_SAE xmm xmm k xmm
// VFMADD213SD.RN_SAE xmm xmm xmm
func VFMADD213SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD213SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RN_SAE.Z xmm xmm k xmm
func VFMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SD.RU_SAE xmm xmm k xmm
// VFMADD213SD.RU_SAE xmm xmm xmm
func VFMADD213SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD213SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RU_SAE.Z xmm xmm k xmm
func VFMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SD.RZ_SAE xmm xmm k xmm
// VFMADD213SD.RZ_SAE xmm xmm xmm
func VFMADD213SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD213SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.RZ_SAE.Z xmm xmm k xmm
func VFMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SD.Z m64 xmm k xmm
// VFMADD213SD.Z xmm xmm k xmm
func VFMADD213SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADD213SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD213SS m32 xmm xmm
// VFMADD213SS xmm xmm xmm
// VFMADD213SS m32 xmm k xmm
// VFMADD213SS xmm xmm k xmm
func VFMADD213SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{}, ops)
}
// VFMADD213SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD213SS.RD_SAE xmm xmm k xmm
// VFMADD213SS.RD_SAE xmm xmm xmm
func VFMADD213SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD213SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RD_SAE.Z xmm xmm k xmm
func VFMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD213SS.RN_SAE xmm xmm k xmm
// VFMADD213SS.RN_SAE xmm xmm xmm
func VFMADD213SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD213SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RN_SAE.Z xmm xmm k xmm
func VFMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD213SS.RU_SAE xmm xmm k xmm
// VFMADD213SS.RU_SAE xmm xmm xmm
func VFMADD213SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD213SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RU_SAE.Z xmm xmm k xmm
func VFMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD213SS.RZ_SAE xmm xmm k xmm
// VFMADD213SS.RZ_SAE xmm xmm xmm
func VFMADD213SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD213SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.RZ_SAE.Z xmm xmm k xmm
func VFMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD213SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD213SS.Z m32 xmm k xmm
// VFMADD213SS.Z xmm xmm k xmm
func VFMADD213SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD213SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADD231PD: Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PD m128 xmm xmm
// VFMADD231PD m256 ymm ymm
// VFMADD231PD xmm xmm xmm
// VFMADD231PD ymm ymm ymm
// VFMADD231PD m128 xmm k xmm
// VFMADD231PD m256 ymm k ymm
// VFMADD231PD xmm xmm k xmm
// VFMADD231PD ymm ymm k ymm
// VFMADD231PD m512 zmm k zmm
// VFMADD231PD m512 zmm zmm
// VFMADD231PD zmm zmm k zmm
// VFMADD231PD zmm zmm zmm
func VFMADD231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{}, ops)
}
// VFMADD231PD_BCST: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PD.BCST m64 xmm k xmm
// VFMADD231PD.BCST m64 xmm xmm
// VFMADD231PD.BCST m64 ymm k ymm
// VFMADD231PD.BCST m64 ymm ymm
// VFMADD231PD.BCST m64 zmm k zmm
// VFMADD231PD.BCST m64 zmm zmm
func VFMADD231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD231PD_BCST_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.BCST.Z m64 xmm k xmm
// VFMADD231PD.BCST.Z m64 ymm k ymm
// VFMADD231PD.BCST.Z m64 zmm k zmm
func VFMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD231PD_RD_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PD.RD_SAE zmm zmm k zmm
// VFMADD231PD.RD_SAE zmm zmm zmm
func VFMADD231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD231PD_RD_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RD_SAE.Z zmm zmm k zmm
func VFMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PD_RN_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PD.RN_SAE zmm zmm k zmm
// VFMADD231PD.RN_SAE zmm zmm zmm
func VFMADD231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD231PD_RN_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RN_SAE.Z zmm zmm k zmm
func VFMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PD_RU_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PD.RU_SAE zmm zmm k zmm
// VFMADD231PD.RU_SAE zmm zmm zmm
func VFMADD231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD231PD_RU_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RU_SAE.Z zmm zmm k zmm
func VFMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PD_RZ_SAE: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PD.RZ_SAE zmm zmm k zmm
// VFMADD231PD.RZ_SAE zmm zmm zmm
func VFMADD231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD231PD_RZ_SAE_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.RZ_SAE.Z zmm zmm k zmm
func VFMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PD_Z: Fused Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PD.Z m128 xmm k xmm
// VFMADD231PD.Z m256 ymm k ymm
// VFMADD231PD.Z xmm xmm k xmm
// VFMADD231PD.Z ymm ymm k ymm
// VFMADD231PD.Z m512 zmm k zmm
// VFMADD231PD.Z zmm zmm k zmm
func VFMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD231PS: Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231PS m128 xmm xmm
// VFMADD231PS m256 ymm ymm
// VFMADD231PS xmm xmm xmm
// VFMADD231PS ymm ymm ymm
// VFMADD231PS m128 xmm k xmm
// VFMADD231PS m256 ymm k ymm
// VFMADD231PS xmm xmm k xmm
// VFMADD231PS ymm ymm k ymm
// VFMADD231PS m512 zmm k zmm
// VFMADD231PS m512 zmm zmm
// VFMADD231PS zmm zmm k zmm
// VFMADD231PS zmm zmm zmm
func VFMADD231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{}, ops)
}
// VFMADD231PS_BCST: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADD231PS.BCST m32 xmm k xmm
// VFMADD231PS.BCST m32 xmm xmm
// VFMADD231PS.BCST m32 ymm k ymm
// VFMADD231PS.BCST m32 ymm ymm
// VFMADD231PS.BCST m32 zmm k zmm
// VFMADD231PS.BCST m32 zmm zmm
func VFMADD231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADD231PS_BCST_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.BCST.Z m32 xmm k xmm
// VFMADD231PS.BCST.Z m32 ymm k ymm
// VFMADD231PS.BCST.Z m32 zmm k zmm
func VFMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADD231PS_RD_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231PS.RD_SAE zmm zmm k zmm
// VFMADD231PS.RD_SAE zmm zmm zmm
func VFMADD231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD231PS_RD_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RD_SAE.Z zmm zmm k zmm
func VFMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PS_RN_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231PS.RN_SAE zmm zmm k zmm
// VFMADD231PS.RN_SAE zmm zmm zmm
func VFMADD231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD231PS_RN_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RN_SAE.Z zmm zmm k zmm
func VFMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PS_RU_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231PS.RU_SAE zmm zmm k zmm
// VFMADD231PS.RU_SAE zmm zmm zmm
func VFMADD231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD231PS_RU_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RU_SAE.Z zmm zmm k zmm
func VFMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PS_RZ_SAE: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231PS.RZ_SAE zmm zmm k zmm
// VFMADD231PS.RZ_SAE zmm zmm zmm
func VFMADD231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD231PS_RZ_SAE_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.RZ_SAE.Z zmm zmm k zmm
func VFMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADD231PS_Z: Fused Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231PS.Z m128 xmm k xmm
// VFMADD231PS.Z m256 ymm k ymm
// VFMADD231PS.Z xmm xmm k xmm
// VFMADD231PS.Z ymm ymm k ymm
// VFMADD231PS.Z m512 zmm k zmm
// VFMADD231PS.Z zmm zmm k zmm
func VFMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADD231SD: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SD m64 xmm xmm
// VFMADD231SD xmm xmm xmm
// VFMADD231SD m64 xmm k xmm
// VFMADD231SD xmm xmm k xmm
func VFMADD231SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{}, ops)
}
// VFMADD231SD_RD_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SD.RD_SAE xmm xmm k xmm
// VFMADD231SD.RD_SAE xmm xmm xmm
func VFMADD231SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD231SD_RD_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RD_SAE.Z xmm xmm k xmm
func VFMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SD_RN_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SD.RN_SAE xmm xmm k xmm
// VFMADD231SD.RN_SAE xmm xmm xmm
func VFMADD231SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD231SD_RN_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RN_SAE.Z xmm xmm k xmm
func VFMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SD_RU_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SD.RU_SAE xmm xmm k xmm
// VFMADD231SD.RU_SAE xmm xmm xmm
func VFMADD231SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD231SD_RU_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RU_SAE.Z xmm xmm k xmm
func VFMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SD_RZ_SAE: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SD.RZ_SAE xmm xmm k xmm
// VFMADD231SD.RZ_SAE xmm xmm xmm
func VFMADD231SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD231SD_RZ_SAE_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.RZ_SAE.Z xmm xmm k xmm
func VFMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SD_Z: Fused Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SD.Z m64 xmm k xmm
// VFMADD231SD.Z xmm xmm k xmm
func VFMADD231SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADD231SS: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADD231SS m32 xmm xmm
// VFMADD231SS xmm xmm xmm
// VFMADD231SS m32 xmm k xmm
// VFMADD231SS xmm xmm k xmm
func VFMADD231SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{}, ops)
}
// VFMADD231SS_RD_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADD231SS.RD_SAE xmm xmm k xmm
// VFMADD231SS.RD_SAE xmm xmm xmm
func VFMADD231SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADD231SS_RD_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RD_SAE.Z xmm xmm k xmm
func VFMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SS_RN_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADD231SS.RN_SAE xmm xmm k xmm
// VFMADD231SS.RN_SAE xmm xmm xmm
func VFMADD231SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADD231SS_RN_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RN_SAE.Z xmm xmm k xmm
func VFMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SS_RU_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADD231SS.RU_SAE xmm xmm k xmm
// VFMADD231SS.RU_SAE xmm xmm xmm
func VFMADD231SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADD231SS_RU_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RU_SAE.Z xmm xmm k xmm
func VFMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SS_RZ_SAE: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADD231SS.RZ_SAE xmm xmm k xmm
// VFMADD231SS.RZ_SAE xmm xmm xmm
func VFMADD231SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADD231SS_RZ_SAE_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.RZ_SAE.Z xmm xmm k xmm
func VFMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMADD231SS_Z: Fused Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADD231SS.Z m32 xmm k xmm
// VFMADD231SS.Z xmm xmm k xmm
func VFMADD231SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADD231SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMADDSUB132PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PD m128 xmm xmm
// VFMADDSUB132PD m256 ymm ymm
// VFMADDSUB132PD xmm xmm xmm
// VFMADDSUB132PD ymm ymm ymm
// VFMADDSUB132PD m128 xmm k xmm
// VFMADDSUB132PD m256 ymm k ymm
// VFMADDSUB132PD xmm xmm k xmm
// VFMADDSUB132PD ymm ymm k ymm
// VFMADDSUB132PD m512 zmm k zmm
// VFMADDSUB132PD m512 zmm zmm
// VFMADDSUB132PD zmm zmm k zmm
// VFMADDSUB132PD zmm zmm zmm
func VFMADDSUB132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{}, ops)
}
// VFMADDSUB132PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PD.BCST m64 xmm k xmm
// VFMADDSUB132PD.BCST m64 xmm xmm
// VFMADDSUB132PD.BCST m64 ymm k ymm
// VFMADDSUB132PD.BCST m64 ymm ymm
// VFMADDSUB132PD.BCST m64 zmm k zmm
// VFMADDSUB132PD.BCST m64 zmm zmm
func VFMADDSUB132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB132PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.BCST.Z m64 xmm k xmm
// VFMADDSUB132PD.BCST.Z m64 ymm k ymm
// VFMADDSUB132PD.BCST.Z m64 zmm k zmm
func VFMADDSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB132PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE zmm zmm k zmm
// VFMADDSUB132PD.RD_SAE zmm zmm zmm
func VFMADDSUB132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB132PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE zmm zmm k zmm
// VFMADDSUB132PD.RN_SAE zmm zmm zmm
func VFMADDSUB132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB132PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE zmm zmm k zmm
// VFMADDSUB132PD.RU_SAE zmm zmm zmm
func VFMADDSUB132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB132PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PD.RZ_SAE zmm zmm zmm
func VFMADDSUB132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB132PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PD.Z m128 xmm k xmm
// VFMADDSUB132PD.Z m256 ymm k ymm
// VFMADDSUB132PD.Z xmm xmm k xmm
// VFMADDSUB132PD.Z ymm ymm k ymm
// VFMADDSUB132PD.Z m512 zmm k zmm
// VFMADDSUB132PD.Z zmm zmm k zmm
func VFMADDSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADDSUB132PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB132PS m128 xmm xmm
// VFMADDSUB132PS m256 ymm ymm
// VFMADDSUB132PS xmm xmm xmm
// VFMADDSUB132PS ymm ymm ymm
// VFMADDSUB132PS m128 xmm k xmm
// VFMADDSUB132PS m256 ymm k ymm
// VFMADDSUB132PS xmm xmm k xmm
// VFMADDSUB132PS ymm ymm k ymm
// VFMADDSUB132PS m512 zmm k zmm
// VFMADDSUB132PS m512 zmm zmm
// VFMADDSUB132PS zmm zmm k zmm
// VFMADDSUB132PS zmm zmm zmm
func VFMADDSUB132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{}, ops)
}
// VFMADDSUB132PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB132PS.BCST m32 xmm k xmm
// VFMADDSUB132PS.BCST m32 xmm xmm
// VFMADDSUB132PS.BCST m32 ymm k ymm
// VFMADDSUB132PS.BCST m32 ymm ymm
// VFMADDSUB132PS.BCST m32 zmm k zmm
// VFMADDSUB132PS.BCST m32 zmm zmm
func VFMADDSUB132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB132PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.BCST.Z m32 xmm k xmm
// VFMADDSUB132PS.BCST.Z m32 ymm k ymm
// VFMADDSUB132PS.BCST.Z m32 zmm k zmm
func VFMADDSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB132PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE zmm zmm k zmm
// VFMADDSUB132PS.RD_SAE zmm zmm zmm
func VFMADDSUB132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB132PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE zmm zmm k zmm
// VFMADDSUB132PS.RN_SAE zmm zmm zmm
func VFMADDSUB132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB132PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE zmm zmm k zmm
// VFMADDSUB132PS.RU_SAE zmm zmm zmm
func VFMADDSUB132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB132PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB132PS.RZ_SAE zmm zmm zmm
func VFMADDSUB132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB132PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB132PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB132PS.Z m128 xmm k xmm
// VFMADDSUB132PS.Z m256 ymm k ymm
// VFMADDSUB132PS.Z xmm xmm k xmm
// VFMADDSUB132PS.Z ymm ymm k ymm
// VFMADDSUB132PS.Z m512 zmm k zmm
// VFMADDSUB132PS.Z zmm zmm k zmm
func VFMADDSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADDSUB213PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PD m128 xmm xmm
// VFMADDSUB213PD m256 ymm ymm
// VFMADDSUB213PD xmm xmm xmm
// VFMADDSUB213PD ymm ymm ymm
// VFMADDSUB213PD m128 xmm k xmm
// VFMADDSUB213PD m256 ymm k ymm
// VFMADDSUB213PD xmm xmm k xmm
// VFMADDSUB213PD ymm ymm k ymm
// VFMADDSUB213PD m512 zmm k zmm
// VFMADDSUB213PD m512 zmm zmm
// VFMADDSUB213PD zmm zmm k zmm
// VFMADDSUB213PD zmm zmm zmm
func VFMADDSUB213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{}, ops)
}
// VFMADDSUB213PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PD.BCST m64 xmm k xmm
// VFMADDSUB213PD.BCST m64 xmm xmm
// VFMADDSUB213PD.BCST m64 ymm k ymm
// VFMADDSUB213PD.BCST m64 ymm ymm
// VFMADDSUB213PD.BCST m64 zmm k zmm
// VFMADDSUB213PD.BCST m64 zmm zmm
func VFMADDSUB213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB213PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.BCST.Z m64 xmm k xmm
// VFMADDSUB213PD.BCST.Z m64 ymm k ymm
// VFMADDSUB213PD.BCST.Z m64 zmm k zmm
func VFMADDSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB213PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE zmm zmm k zmm
// VFMADDSUB213PD.RD_SAE zmm zmm zmm
func VFMADDSUB213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB213PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE zmm zmm k zmm
// VFMADDSUB213PD.RN_SAE zmm zmm zmm
func VFMADDSUB213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB213PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE zmm zmm k zmm
// VFMADDSUB213PD.RU_SAE zmm zmm zmm
func VFMADDSUB213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB213PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PD.RZ_SAE zmm zmm zmm
func VFMADDSUB213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB213PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PD.Z m128 xmm k xmm
// VFMADDSUB213PD.Z m256 ymm k ymm
// VFMADDSUB213PD.Z xmm xmm k xmm
// VFMADDSUB213PD.Z ymm ymm k ymm
// VFMADDSUB213PD.Z m512 zmm k zmm
// VFMADDSUB213PD.Z zmm zmm k zmm
func VFMADDSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADDSUB213PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB213PS m128 xmm xmm
// VFMADDSUB213PS m256 ymm ymm
// VFMADDSUB213PS xmm xmm xmm
// VFMADDSUB213PS ymm ymm ymm
// VFMADDSUB213PS m128 xmm k xmm
// VFMADDSUB213PS m256 ymm k ymm
// VFMADDSUB213PS xmm xmm k xmm
// VFMADDSUB213PS ymm ymm k ymm
// VFMADDSUB213PS m512 zmm k zmm
// VFMADDSUB213PS m512 zmm zmm
// VFMADDSUB213PS zmm zmm k zmm
// VFMADDSUB213PS zmm zmm zmm
func VFMADDSUB213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{}, ops)
}
// VFMADDSUB213PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB213PS.BCST m32 xmm k xmm
// VFMADDSUB213PS.BCST m32 xmm xmm
// VFMADDSUB213PS.BCST m32 ymm k ymm
// VFMADDSUB213PS.BCST m32 ymm ymm
// VFMADDSUB213PS.BCST m32 zmm k zmm
// VFMADDSUB213PS.BCST m32 zmm zmm
func VFMADDSUB213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB213PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.BCST.Z m32 xmm k xmm
// VFMADDSUB213PS.BCST.Z m32 ymm k ymm
// VFMADDSUB213PS.BCST.Z m32 zmm k zmm
func VFMADDSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB213PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE zmm zmm k zmm
// VFMADDSUB213PS.RD_SAE zmm zmm zmm
func VFMADDSUB213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB213PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE zmm zmm k zmm
// VFMADDSUB213PS.RN_SAE zmm zmm zmm
func VFMADDSUB213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB213PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE zmm zmm k zmm
// VFMADDSUB213PS.RU_SAE zmm zmm zmm
func VFMADDSUB213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB213PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB213PS.RZ_SAE zmm zmm zmm
func VFMADDSUB213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB213PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB213PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB213PS.Z m128 xmm k xmm
// VFMADDSUB213PS.Z m256 ymm k ymm
// VFMADDSUB213PS.Z xmm xmm k xmm
// VFMADDSUB213PS.Z ymm ymm k ymm
// VFMADDSUB213PS.Z m512 zmm k zmm
// VFMADDSUB213PS.Z zmm zmm k zmm
func VFMADDSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADDSUB231PD: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PD m128 xmm xmm
// VFMADDSUB231PD m256 ymm ymm
// VFMADDSUB231PD xmm xmm xmm
// VFMADDSUB231PD ymm ymm ymm
// VFMADDSUB231PD m128 xmm k xmm
// VFMADDSUB231PD m256 ymm k ymm
// VFMADDSUB231PD xmm xmm k xmm
// VFMADDSUB231PD ymm ymm k ymm
// VFMADDSUB231PD m512 zmm k zmm
// VFMADDSUB231PD m512 zmm zmm
// VFMADDSUB231PD zmm zmm k zmm
// VFMADDSUB231PD zmm zmm zmm
func VFMADDSUB231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{}, ops)
}
// VFMADDSUB231PD_BCST: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PD.BCST m64 xmm k xmm
// VFMADDSUB231PD.BCST m64 xmm xmm
// VFMADDSUB231PD.BCST m64 ymm k ymm
// VFMADDSUB231PD.BCST m64 ymm ymm
// VFMADDSUB231PD.BCST m64 zmm k zmm
// VFMADDSUB231PD.BCST m64 zmm zmm
func VFMADDSUB231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB231PD_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.BCST.Z m64 xmm k xmm
// VFMADDSUB231PD.BCST.Z m64 ymm k ymm
// VFMADDSUB231PD.BCST.Z m64 zmm k zmm
func VFMADDSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB231PD_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE zmm zmm k zmm
// VFMADDSUB231PD.RD_SAE zmm zmm zmm
func VFMADDSUB231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB231PD_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PD_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE zmm zmm k zmm
// VFMADDSUB231PD.RN_SAE zmm zmm zmm
func VFMADDSUB231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB231PD_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PD_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE zmm zmm k zmm
// VFMADDSUB231PD.RU_SAE zmm zmm zmm
func VFMADDSUB231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB231PD_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PD_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PD.RZ_SAE zmm zmm zmm
func VFMADDSUB231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB231PD_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PD_Z: Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PD.Z m128 xmm k xmm
// VFMADDSUB231PD.Z m256 ymm k ymm
// VFMADDSUB231PD.Z xmm xmm k xmm
// VFMADDSUB231PD.Z ymm ymm k ymm
// VFMADDSUB231PD.Z m512 zmm k zmm
// VFMADDSUB231PD.Z zmm zmm k zmm
func VFMADDSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMADDSUB231PS: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMADDSUB231PS m128 xmm xmm
// VFMADDSUB231PS m256 ymm ymm
// VFMADDSUB231PS xmm xmm xmm
// VFMADDSUB231PS ymm ymm ymm
// VFMADDSUB231PS m128 xmm k xmm
// VFMADDSUB231PS m256 ymm k ymm
// VFMADDSUB231PS xmm xmm k xmm
// VFMADDSUB231PS ymm ymm k ymm
// VFMADDSUB231PS m512 zmm k zmm
// VFMADDSUB231PS m512 zmm zmm
// VFMADDSUB231PS zmm zmm k zmm
// VFMADDSUB231PS zmm zmm zmm
func VFMADDSUB231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{}, ops)
}
// VFMADDSUB231PS_BCST: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMADDSUB231PS.BCST m32 xmm k xmm
// VFMADDSUB231PS.BCST m32 xmm xmm
// VFMADDSUB231PS.BCST m32 ymm k ymm
// VFMADDSUB231PS.BCST m32 ymm ymm
// VFMADDSUB231PS.BCST m32 zmm k zmm
// VFMADDSUB231PS.BCST m32 zmm zmm
func VFMADDSUB231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMADDSUB231PS_BCST_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.BCST.Z m32 xmm k xmm
// VFMADDSUB231PS.BCST.Z m32 ymm k ymm
// VFMADDSUB231PS.BCST.Z m32 zmm k zmm
func VFMADDSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMADDSUB231PS_RD_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE zmm zmm k zmm
// VFMADDSUB231PS.RD_SAE zmm zmm zmm
func VFMADDSUB231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMADDSUB231PS_RD_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RD_SAE.Z zmm zmm k zmm
func VFMADDSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PS_RN_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE zmm zmm k zmm
// VFMADDSUB231PS.RN_SAE zmm zmm zmm
func VFMADDSUB231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMADDSUB231PS_RN_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RN_SAE.Z zmm zmm k zmm
func VFMADDSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PS_RU_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE zmm zmm k zmm
// VFMADDSUB231PS.RU_SAE zmm zmm zmm
func VFMADDSUB231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMADDSUB231PS_RU_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RU_SAE.Z zmm zmm k zmm
func VFMADDSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PS_RZ_SAE: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE zmm zmm k zmm
// VFMADDSUB231PS.RZ_SAE zmm zmm zmm
func VFMADDSUB231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMADDSUB231PS_RZ_SAE_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.RZ_SAE.Z zmm zmm k zmm
func VFMADDSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMADDSUB231PS_Z: Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMADDSUB231PS.Z m128 xmm k xmm
// VFMADDSUB231PS.Z m256 ymm k ymm
// VFMADDSUB231PS.Z xmm xmm k xmm
// VFMADDSUB231PS.Z ymm ymm k ymm
// VFMADDSUB231PS.Z m512 zmm k zmm
// VFMADDSUB231PS.Z zmm zmm k zmm
func VFMADDSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMADDSUB231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB132PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PD m128 xmm xmm
// VFMSUB132PD m256 ymm ymm
// VFMSUB132PD xmm xmm xmm
// VFMSUB132PD ymm ymm ymm
// VFMSUB132PD m128 xmm k xmm
// VFMSUB132PD m256 ymm k ymm
// VFMSUB132PD xmm xmm k xmm
// VFMSUB132PD ymm ymm k ymm
// VFMSUB132PD m512 zmm k zmm
// VFMSUB132PD m512 zmm zmm
// VFMSUB132PD zmm zmm k zmm
// VFMSUB132PD zmm zmm zmm
func VFMSUB132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{}, ops)
}
// VFMSUB132PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PD.BCST m64 xmm k xmm
// VFMSUB132PD.BCST m64 xmm xmm
// VFMSUB132PD.BCST m64 ymm k ymm
// VFMSUB132PD.BCST m64 ymm ymm
// VFMSUB132PD.BCST m64 zmm k zmm
// VFMSUB132PD.BCST m64 zmm zmm
func VFMSUB132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB132PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.BCST.Z m64 xmm k xmm
// VFMSUB132PD.BCST.Z m64 ymm k ymm
// VFMSUB132PD.BCST.Z m64 zmm k zmm
func VFMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB132PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PD.RD_SAE zmm zmm k zmm
// VFMSUB132PD.RD_SAE zmm zmm zmm
func VFMSUB132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB132PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RD_SAE.Z zmm zmm k zmm
func VFMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PD.RN_SAE zmm zmm k zmm
// VFMSUB132PD.RN_SAE zmm zmm zmm
func VFMSUB132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB132PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RN_SAE.Z zmm zmm k zmm
func VFMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PD.RU_SAE zmm zmm k zmm
// VFMSUB132PD.RU_SAE zmm zmm zmm
func VFMSUB132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB132PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RU_SAE.Z zmm zmm k zmm
func VFMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE zmm zmm k zmm
// VFMSUB132PD.RZ_SAE zmm zmm zmm
func VFMSUB132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB132PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PD.Z m128 xmm k xmm
// VFMSUB132PD.Z m256 ymm k ymm
// VFMSUB132PD.Z xmm xmm k xmm
// VFMSUB132PD.Z ymm ymm k ymm
// VFMSUB132PD.Z m512 zmm k zmm
// VFMSUB132PD.Z zmm zmm k zmm
func VFMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB132PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132PS m128 xmm xmm
// VFMSUB132PS m256 ymm ymm
// VFMSUB132PS xmm xmm xmm
// VFMSUB132PS ymm ymm ymm
// VFMSUB132PS m128 xmm k xmm
// VFMSUB132PS m256 ymm k ymm
// VFMSUB132PS xmm xmm k xmm
// VFMSUB132PS ymm ymm k ymm
// VFMSUB132PS m512 zmm k zmm
// VFMSUB132PS m512 zmm zmm
// VFMSUB132PS zmm zmm k zmm
// VFMSUB132PS zmm zmm zmm
func VFMSUB132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{}, ops)
}
// VFMSUB132PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB132PS.BCST m32 xmm k xmm
// VFMSUB132PS.BCST m32 xmm xmm
// VFMSUB132PS.BCST m32 ymm k ymm
// VFMSUB132PS.BCST m32 ymm ymm
// VFMSUB132PS.BCST m32 zmm k zmm
// VFMSUB132PS.BCST m32 zmm zmm
func VFMSUB132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB132PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.BCST.Z m32 xmm k xmm
// VFMSUB132PS.BCST.Z m32 ymm k ymm
// VFMSUB132PS.BCST.Z m32 zmm k zmm
func VFMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB132PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132PS.RD_SAE zmm zmm k zmm
// VFMSUB132PS.RD_SAE zmm zmm zmm
func VFMSUB132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB132PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RD_SAE.Z zmm zmm k zmm
func VFMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132PS.RN_SAE zmm zmm k zmm
// VFMSUB132PS.RN_SAE zmm zmm zmm
func VFMSUB132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB132PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RN_SAE.Z zmm zmm k zmm
func VFMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132PS.RU_SAE zmm zmm k zmm
// VFMSUB132PS.RU_SAE zmm zmm zmm
func VFMSUB132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB132PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RU_SAE.Z zmm zmm k zmm
func VFMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE zmm zmm k zmm
// VFMSUB132PS.RZ_SAE zmm zmm zmm
func VFMSUB132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB132PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB132PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132PS.Z m128 xmm k xmm
// VFMSUB132PS.Z m256 ymm k ymm
// VFMSUB132PS.Z xmm xmm k xmm
// VFMSUB132PS.Z ymm ymm k ymm
// VFMSUB132PS.Z m512 zmm k zmm
// VFMSUB132PS.Z zmm zmm k zmm
func VFMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB132SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SD m64 xmm xmm
// VFMSUB132SD xmm xmm xmm
// VFMSUB132SD m64 xmm k xmm
// VFMSUB132SD xmm xmm k xmm
func VFMSUB132SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{}, ops)
}
// VFMSUB132SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SD.RD_SAE xmm xmm k xmm
// VFMSUB132SD.RD_SAE xmm xmm xmm
func VFMSUB132SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB132SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RD_SAE.Z xmm xmm k xmm
func VFMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SD.RN_SAE xmm xmm k xmm
// VFMSUB132SD.RN_SAE xmm xmm xmm
func VFMSUB132SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB132SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RN_SAE.Z xmm xmm k xmm
func VFMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SD.RU_SAE xmm xmm k xmm
// VFMSUB132SD.RU_SAE xmm xmm xmm
func VFMSUB132SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB132SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RU_SAE.Z xmm xmm k xmm
func VFMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE xmm xmm k xmm
// VFMSUB132SD.RZ_SAE xmm xmm xmm
func VFMSUB132SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB132SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.RZ_SAE.Z xmm xmm k xmm
func VFMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SD.Z m64 xmm k xmm
// VFMSUB132SD.Z xmm xmm k xmm
func VFMSUB132SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUB132SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB132SS m32 xmm xmm
// VFMSUB132SS xmm xmm xmm
// VFMSUB132SS m32 xmm k xmm
// VFMSUB132SS xmm xmm k xmm
func VFMSUB132SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{}, ops)
}
// VFMSUB132SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB132SS.RD_SAE xmm xmm k xmm
// VFMSUB132SS.RD_SAE xmm xmm xmm
func VFMSUB132SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB132SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RD_SAE.Z xmm xmm k xmm
func VFMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB132SS.RN_SAE xmm xmm k xmm
// VFMSUB132SS.RN_SAE xmm xmm xmm
func VFMSUB132SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB132SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RN_SAE.Z xmm xmm k xmm
func VFMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB132SS.RU_SAE xmm xmm k xmm
// VFMSUB132SS.RU_SAE xmm xmm xmm
func VFMSUB132SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB132SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RU_SAE.Z xmm xmm k xmm
func VFMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE xmm xmm k xmm
// VFMSUB132SS.RZ_SAE xmm xmm xmm
func VFMSUB132SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB132SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.RZ_SAE.Z xmm xmm k xmm
func VFMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB132SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB132SS.Z m32 xmm k xmm
// VFMSUB132SS.Z xmm xmm k xmm
func VFMSUB132SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB132SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUB213PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PD m128 xmm xmm
// VFMSUB213PD m256 ymm ymm
// VFMSUB213PD xmm xmm xmm
// VFMSUB213PD ymm ymm ymm
// VFMSUB213PD m128 xmm k xmm
// VFMSUB213PD m256 ymm k ymm
// VFMSUB213PD xmm xmm k xmm
// VFMSUB213PD ymm ymm k ymm
// VFMSUB213PD m512 zmm k zmm
// VFMSUB213PD m512 zmm zmm
// VFMSUB213PD zmm zmm k zmm
// VFMSUB213PD zmm zmm zmm
func VFMSUB213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{}, ops)
}
// VFMSUB213PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PD.BCST m64 xmm k xmm
// VFMSUB213PD.BCST m64 xmm xmm
// VFMSUB213PD.BCST m64 ymm k ymm
// VFMSUB213PD.BCST m64 ymm ymm
// VFMSUB213PD.BCST m64 zmm k zmm
// VFMSUB213PD.BCST m64 zmm zmm
func VFMSUB213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB213PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.BCST.Z m64 xmm k xmm
// VFMSUB213PD.BCST.Z m64 ymm k ymm
// VFMSUB213PD.BCST.Z m64 zmm k zmm
func VFMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB213PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PD.RD_SAE zmm zmm k zmm
// VFMSUB213PD.RD_SAE zmm zmm zmm
func VFMSUB213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB213PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RD_SAE.Z zmm zmm k zmm
func VFMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PD.RN_SAE zmm zmm k zmm
// VFMSUB213PD.RN_SAE zmm zmm zmm
func VFMSUB213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB213PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RN_SAE.Z zmm zmm k zmm
func VFMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PD.RU_SAE zmm zmm k zmm
// VFMSUB213PD.RU_SAE zmm zmm zmm
func VFMSUB213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB213PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RU_SAE.Z zmm zmm k zmm
func VFMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE zmm zmm k zmm
// VFMSUB213PD.RZ_SAE zmm zmm zmm
func VFMSUB213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB213PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PD.Z m128 xmm k xmm
// VFMSUB213PD.Z m256 ymm k ymm
// VFMSUB213PD.Z xmm xmm k xmm
// VFMSUB213PD.Z ymm ymm k ymm
// VFMSUB213PD.Z m512 zmm k zmm
// VFMSUB213PD.Z zmm zmm k zmm
func VFMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB213PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213PS m128 xmm xmm
// VFMSUB213PS m256 ymm ymm
// VFMSUB213PS xmm xmm xmm
// VFMSUB213PS ymm ymm ymm
// VFMSUB213PS m128 xmm k xmm
// VFMSUB213PS m256 ymm k ymm
// VFMSUB213PS xmm xmm k xmm
// VFMSUB213PS ymm ymm k ymm
// VFMSUB213PS m512 zmm k zmm
// VFMSUB213PS m512 zmm zmm
// VFMSUB213PS zmm zmm k zmm
// VFMSUB213PS zmm zmm zmm
func VFMSUB213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{}, ops)
}
// VFMSUB213PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB213PS.BCST m32 xmm k xmm
// VFMSUB213PS.BCST m32 xmm xmm
// VFMSUB213PS.BCST m32 ymm k ymm
// VFMSUB213PS.BCST m32 ymm ymm
// VFMSUB213PS.BCST m32 zmm k zmm
// VFMSUB213PS.BCST m32 zmm zmm
func VFMSUB213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB213PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.BCST.Z m32 xmm k xmm
// VFMSUB213PS.BCST.Z m32 ymm k ymm
// VFMSUB213PS.BCST.Z m32 zmm k zmm
func VFMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB213PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213PS.RD_SAE zmm zmm k zmm
// VFMSUB213PS.RD_SAE zmm zmm zmm
func VFMSUB213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB213PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RD_SAE.Z zmm zmm k zmm
func VFMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213PS.RN_SAE zmm zmm k zmm
// VFMSUB213PS.RN_SAE zmm zmm zmm
func VFMSUB213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB213PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RN_SAE.Z zmm zmm k zmm
func VFMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213PS.RU_SAE zmm zmm k zmm
// VFMSUB213PS.RU_SAE zmm zmm zmm
func VFMSUB213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB213PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RU_SAE.Z zmm zmm k zmm
func VFMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE zmm zmm k zmm
// VFMSUB213PS.RZ_SAE zmm zmm zmm
func VFMSUB213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB213PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB213PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213PS.Z m128 xmm k xmm
// VFMSUB213PS.Z m256 ymm k ymm
// VFMSUB213PS.Z xmm xmm k xmm
// VFMSUB213PS.Z ymm ymm k ymm
// VFMSUB213PS.Z m512 zmm k zmm
// VFMSUB213PS.Z zmm zmm k zmm
func VFMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB213SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SD m64 xmm xmm
// VFMSUB213SD xmm xmm xmm
// VFMSUB213SD m64 xmm k xmm
// VFMSUB213SD xmm xmm k xmm
func VFMSUB213SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{}, ops)
}
// VFMSUB213SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SD.RD_SAE xmm xmm k xmm
// VFMSUB213SD.RD_SAE xmm xmm xmm
func VFMSUB213SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB213SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RD_SAE.Z xmm xmm k xmm
func VFMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SD.RN_SAE xmm xmm k xmm
// VFMSUB213SD.RN_SAE xmm xmm xmm
func VFMSUB213SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB213SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RN_SAE.Z xmm xmm k xmm
func VFMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SD.RU_SAE xmm xmm k xmm
// VFMSUB213SD.RU_SAE xmm xmm xmm
func VFMSUB213SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB213SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RU_SAE.Z xmm xmm k xmm
func VFMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE xmm xmm k xmm
// VFMSUB213SD.RZ_SAE xmm xmm xmm
func VFMSUB213SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB213SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.RZ_SAE.Z xmm xmm k xmm
func VFMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SD.Z m64 xmm k xmm
// VFMSUB213SD.Z xmm xmm k xmm
func VFMSUB213SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUB213SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB213SS m32 xmm xmm
// VFMSUB213SS xmm xmm xmm
// VFMSUB213SS m32 xmm k xmm
// VFMSUB213SS xmm xmm k xmm
func VFMSUB213SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{}, ops)
}
// VFMSUB213SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB213SS.RD_SAE xmm xmm k xmm
// VFMSUB213SS.RD_SAE xmm xmm xmm
func VFMSUB213SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB213SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RD_SAE.Z xmm xmm k xmm
func VFMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB213SS.RN_SAE xmm xmm k xmm
// VFMSUB213SS.RN_SAE xmm xmm xmm
func VFMSUB213SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB213SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RN_SAE.Z xmm xmm k xmm
func VFMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB213SS.RU_SAE xmm xmm k xmm
// VFMSUB213SS.RU_SAE xmm xmm xmm
func VFMSUB213SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB213SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RU_SAE.Z xmm xmm k xmm
func VFMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE xmm xmm k xmm
// VFMSUB213SS.RZ_SAE xmm xmm xmm
func VFMSUB213SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB213SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.RZ_SAE.Z xmm xmm k xmm
func VFMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB213SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB213SS.Z m32 xmm k xmm
// VFMSUB213SS.Z xmm xmm k xmm
func VFMSUB213SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB213SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUB231PD: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PD m128 xmm xmm
// VFMSUB231PD m256 ymm ymm
// VFMSUB231PD xmm xmm xmm
// VFMSUB231PD ymm ymm ymm
// VFMSUB231PD m128 xmm k xmm
// VFMSUB231PD m256 ymm k ymm
// VFMSUB231PD xmm xmm k xmm
// VFMSUB231PD ymm ymm k ymm
// VFMSUB231PD m512 zmm k zmm
// VFMSUB231PD m512 zmm zmm
// VFMSUB231PD zmm zmm k zmm
// VFMSUB231PD zmm zmm zmm
func VFMSUB231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{}, ops)
}
// VFMSUB231PD_BCST: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PD.BCST m64 xmm k xmm
// VFMSUB231PD.BCST m64 xmm xmm
// VFMSUB231PD.BCST m64 ymm k ymm
// VFMSUB231PD.BCST m64 ymm ymm
// VFMSUB231PD.BCST m64 zmm k zmm
// VFMSUB231PD.BCST m64 zmm zmm
func VFMSUB231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB231PD_BCST_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.BCST.Z m64 xmm k xmm
// VFMSUB231PD.BCST.Z m64 ymm k ymm
// VFMSUB231PD.BCST.Z m64 zmm k zmm
func VFMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB231PD_RD_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PD.RD_SAE zmm zmm k zmm
// VFMSUB231PD.RD_SAE zmm zmm zmm
func VFMSUB231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB231PD_RD_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RD_SAE.Z zmm zmm k zmm
func VFMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PD_RN_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PD.RN_SAE zmm zmm k zmm
// VFMSUB231PD.RN_SAE zmm zmm zmm
func VFMSUB231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB231PD_RN_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RN_SAE.Z zmm zmm k zmm
func VFMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PD_RU_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PD.RU_SAE zmm zmm k zmm
// VFMSUB231PD.RU_SAE zmm zmm zmm
func VFMSUB231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB231PD_RU_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RU_SAE.Z zmm zmm k zmm
func VFMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PD_RZ_SAE: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE zmm zmm k zmm
// VFMSUB231PD.RZ_SAE zmm zmm zmm
func VFMSUB231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB231PD_RZ_SAE_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PD_Z: Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PD.Z m128 xmm k xmm
// VFMSUB231PD.Z m256 ymm k ymm
// VFMSUB231PD.Z xmm xmm k xmm
// VFMSUB231PD.Z ymm ymm k ymm
// VFMSUB231PD.Z m512 zmm k zmm
// VFMSUB231PD.Z zmm zmm k zmm
func VFMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB231PS: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231PS m128 xmm xmm
// VFMSUB231PS m256 ymm ymm
// VFMSUB231PS xmm xmm xmm
// VFMSUB231PS ymm ymm ymm
// VFMSUB231PS m128 xmm k xmm
// VFMSUB231PS m256 ymm k ymm
// VFMSUB231PS xmm xmm k xmm
// VFMSUB231PS ymm ymm k ymm
// VFMSUB231PS m512 zmm k zmm
// VFMSUB231PS m512 zmm zmm
// VFMSUB231PS zmm zmm k zmm
// VFMSUB231PS zmm zmm zmm
func VFMSUB231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{}, ops)
}
// VFMSUB231PS_BCST: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUB231PS.BCST m32 xmm k xmm
// VFMSUB231PS.BCST m32 xmm xmm
// VFMSUB231PS.BCST m32 ymm k ymm
// VFMSUB231PS.BCST m32 ymm ymm
// VFMSUB231PS.BCST m32 zmm k zmm
// VFMSUB231PS.BCST m32 zmm zmm
func VFMSUB231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUB231PS_BCST_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.BCST.Z m32 xmm k xmm
// VFMSUB231PS.BCST.Z m32 ymm k ymm
// VFMSUB231PS.BCST.Z m32 zmm k zmm
func VFMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUB231PS_RD_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231PS.RD_SAE zmm zmm k zmm
// VFMSUB231PS.RD_SAE zmm zmm zmm
func VFMSUB231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB231PS_RD_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RD_SAE.Z zmm zmm k zmm
func VFMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PS_RN_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231PS.RN_SAE zmm zmm k zmm
// VFMSUB231PS.RN_SAE zmm zmm zmm
func VFMSUB231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB231PS_RN_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RN_SAE.Z zmm zmm k zmm
func VFMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PS_RU_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231PS.RU_SAE zmm zmm k zmm
// VFMSUB231PS.RU_SAE zmm zmm zmm
func VFMSUB231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB231PS_RU_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RU_SAE.Z zmm zmm k zmm
func VFMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PS_RZ_SAE: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE zmm zmm k zmm
// VFMSUB231PS.RZ_SAE zmm zmm zmm
func VFMSUB231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB231PS_RZ_SAE_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUB231PS_Z: Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231PS.Z m128 xmm k xmm
// VFMSUB231PS.Z m256 ymm k ymm
// VFMSUB231PS.Z xmm xmm k xmm
// VFMSUB231PS.Z ymm ymm k ymm
// VFMSUB231PS.Z m512 zmm k zmm
// VFMSUB231PS.Z zmm zmm k zmm
func VFMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUB231SD: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SD m64 xmm xmm
// VFMSUB231SD xmm xmm xmm
// VFMSUB231SD m64 xmm k xmm
// VFMSUB231SD xmm xmm k xmm
func VFMSUB231SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{}, ops)
}
// VFMSUB231SD_RD_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SD.RD_SAE xmm xmm k xmm
// VFMSUB231SD.RD_SAE xmm xmm xmm
func VFMSUB231SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB231SD_RD_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RD_SAE.Z xmm xmm k xmm
func VFMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SD_RN_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SD.RN_SAE xmm xmm k xmm
// VFMSUB231SD.RN_SAE xmm xmm xmm
func VFMSUB231SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB231SD_RN_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RN_SAE.Z xmm xmm k xmm
func VFMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SD_RU_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SD.RU_SAE xmm xmm k xmm
// VFMSUB231SD.RU_SAE xmm xmm xmm
func VFMSUB231SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB231SD_RU_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RU_SAE.Z xmm xmm k xmm
func VFMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SD_RZ_SAE: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE xmm xmm k xmm
// VFMSUB231SD.RZ_SAE xmm xmm xmm
func VFMSUB231SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB231SD_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.RZ_SAE.Z xmm xmm k xmm
func VFMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SD_Z: Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SD.Z m64 xmm k xmm
// VFMSUB231SD.Z xmm xmm k xmm
func VFMSUB231SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUB231SS: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUB231SS m32 xmm xmm
// VFMSUB231SS xmm xmm xmm
// VFMSUB231SS m32 xmm k xmm
// VFMSUB231SS xmm xmm k xmm
func VFMSUB231SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{}, ops)
}
// VFMSUB231SS_RD_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUB231SS.RD_SAE xmm xmm k xmm
// VFMSUB231SS.RD_SAE xmm xmm xmm
func VFMSUB231SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUB231SS_RD_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RD_SAE.Z xmm xmm k xmm
func VFMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SS_RN_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUB231SS.RN_SAE xmm xmm k xmm
// VFMSUB231SS.RN_SAE xmm xmm xmm
func VFMSUB231SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUB231SS_RN_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RN_SAE.Z xmm xmm k xmm
func VFMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SS_RU_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUB231SS.RU_SAE xmm xmm k xmm
// VFMSUB231SS.RU_SAE xmm xmm xmm
func VFMSUB231SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUB231SS_RU_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RU_SAE.Z xmm xmm k xmm
func VFMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SS_RZ_SAE: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE xmm xmm k xmm
// VFMSUB231SS.RZ_SAE xmm xmm xmm
func VFMSUB231SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUB231SS_RZ_SAE_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.RZ_SAE.Z xmm xmm k xmm
func VFMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFMSUB231SS_Z: Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUB231SS.Z m32 xmm k xmm
// VFMSUB231SS.Z xmm xmm k xmm
func VFMSUB231SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUB231SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFMSUBADD132PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PD m128 xmm xmm
// VFMSUBADD132PD m256 ymm ymm
// VFMSUBADD132PD xmm xmm xmm
// VFMSUBADD132PD ymm ymm ymm
// VFMSUBADD132PD m128 xmm k xmm
// VFMSUBADD132PD m256 ymm k ymm
// VFMSUBADD132PD xmm xmm k xmm
// VFMSUBADD132PD ymm ymm k ymm
// VFMSUBADD132PD m512 zmm k zmm
// VFMSUBADD132PD m512 zmm zmm
// VFMSUBADD132PD zmm zmm k zmm
// VFMSUBADD132PD zmm zmm zmm
func VFMSUBADD132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{}, ops)
}
// VFMSUBADD132PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PD.BCST m64 xmm k xmm
// VFMSUBADD132PD.BCST m64 xmm xmm
// VFMSUBADD132PD.BCST m64 ymm k ymm
// VFMSUBADD132PD.BCST m64 ymm ymm
// VFMSUBADD132PD.BCST m64 zmm k zmm
// VFMSUBADD132PD.BCST m64 zmm zmm
func VFMSUBADD132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD132PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.BCST.Z m64 xmm k xmm
// VFMSUBADD132PD.BCST.Z m64 ymm k ymm
// VFMSUBADD132PD.BCST.Z m64 zmm k zmm
func VFMSUBADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD132PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE zmm zmm k zmm
// VFMSUBADD132PD.RD_SAE zmm zmm zmm
func VFMSUBADD132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD132PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE zmm zmm k zmm
// VFMSUBADD132PD.RN_SAE zmm zmm zmm
func VFMSUBADD132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD132PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE zmm zmm k zmm
// VFMSUBADD132PD.RU_SAE zmm zmm zmm
func VFMSUBADD132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD132PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PD.RZ_SAE zmm zmm zmm
func VFMSUBADD132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD132PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PD.Z m128 xmm k xmm
// VFMSUBADD132PD.Z m256 ymm k ymm
// VFMSUBADD132PD.Z xmm xmm k xmm
// VFMSUBADD132PD.Z ymm ymm k ymm
// VFMSUBADD132PD.Z m512 zmm k zmm
// VFMSUBADD132PD.Z zmm zmm k zmm
func VFMSUBADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUBADD132PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD132PS m128 xmm xmm
// VFMSUBADD132PS m256 ymm ymm
// VFMSUBADD132PS xmm xmm xmm
// VFMSUBADD132PS ymm ymm ymm
// VFMSUBADD132PS m128 xmm k xmm
// VFMSUBADD132PS m256 ymm k ymm
// VFMSUBADD132PS xmm xmm k xmm
// VFMSUBADD132PS ymm ymm k ymm
// VFMSUBADD132PS m512 zmm k zmm
// VFMSUBADD132PS m512 zmm zmm
// VFMSUBADD132PS zmm zmm k zmm
// VFMSUBADD132PS zmm zmm zmm
func VFMSUBADD132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{}, ops)
}
// VFMSUBADD132PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD132PS.BCST m32 xmm k xmm
// VFMSUBADD132PS.BCST m32 xmm xmm
// VFMSUBADD132PS.BCST m32 ymm k ymm
// VFMSUBADD132PS.BCST m32 ymm ymm
// VFMSUBADD132PS.BCST m32 zmm k zmm
// VFMSUBADD132PS.BCST m32 zmm zmm
func VFMSUBADD132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD132PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.BCST.Z m32 xmm k xmm
// VFMSUBADD132PS.BCST.Z m32 ymm k ymm
// VFMSUBADD132PS.BCST.Z m32 zmm k zmm
func VFMSUBADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD132PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE zmm zmm k zmm
// VFMSUBADD132PS.RD_SAE zmm zmm zmm
func VFMSUBADD132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD132PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE zmm zmm k zmm
// VFMSUBADD132PS.RN_SAE zmm zmm zmm
func VFMSUBADD132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD132PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE zmm zmm k zmm
// VFMSUBADD132PS.RU_SAE zmm zmm zmm
func VFMSUBADD132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD132PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD132PS.RZ_SAE zmm zmm zmm
func VFMSUBADD132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD132PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD132PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD132PS.Z m128 xmm k xmm
// VFMSUBADD132PS.Z m256 ymm k ymm
// VFMSUBADD132PS.Z xmm xmm k xmm
// VFMSUBADD132PS.Z ymm ymm k ymm
// VFMSUBADD132PS.Z m512 zmm k zmm
// VFMSUBADD132PS.Z zmm zmm k zmm
func VFMSUBADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUBADD213PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PD m128 xmm xmm
// VFMSUBADD213PD m256 ymm ymm
// VFMSUBADD213PD xmm xmm xmm
// VFMSUBADD213PD ymm ymm ymm
// VFMSUBADD213PD m128 xmm k xmm
// VFMSUBADD213PD m256 ymm k ymm
// VFMSUBADD213PD xmm xmm k xmm
// VFMSUBADD213PD ymm ymm k ymm
// VFMSUBADD213PD m512 zmm k zmm
// VFMSUBADD213PD m512 zmm zmm
// VFMSUBADD213PD zmm zmm k zmm
// VFMSUBADD213PD zmm zmm zmm
func VFMSUBADD213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{}, ops)
}
// VFMSUBADD213PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PD.BCST m64 xmm k xmm
// VFMSUBADD213PD.BCST m64 xmm xmm
// VFMSUBADD213PD.BCST m64 ymm k ymm
// VFMSUBADD213PD.BCST m64 ymm ymm
// VFMSUBADD213PD.BCST m64 zmm k zmm
// VFMSUBADD213PD.BCST m64 zmm zmm
func VFMSUBADD213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD213PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.BCST.Z m64 xmm k xmm
// VFMSUBADD213PD.BCST.Z m64 ymm k ymm
// VFMSUBADD213PD.BCST.Z m64 zmm k zmm
func VFMSUBADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD213PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE zmm zmm k zmm
// VFMSUBADD213PD.RD_SAE zmm zmm zmm
func VFMSUBADD213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD213PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE zmm zmm k zmm
// VFMSUBADD213PD.RN_SAE zmm zmm zmm
func VFMSUBADD213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD213PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE zmm zmm k zmm
// VFMSUBADD213PD.RU_SAE zmm zmm zmm
func VFMSUBADD213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD213PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PD.RZ_SAE zmm zmm zmm
func VFMSUBADD213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD213PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PD.Z m128 xmm k xmm
// VFMSUBADD213PD.Z m256 ymm k ymm
// VFMSUBADD213PD.Z xmm xmm k xmm
// VFMSUBADD213PD.Z ymm ymm k ymm
// VFMSUBADD213PD.Z m512 zmm k zmm
// VFMSUBADD213PD.Z zmm zmm k zmm
func VFMSUBADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUBADD213PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD213PS m128 xmm xmm
// VFMSUBADD213PS m256 ymm ymm
// VFMSUBADD213PS xmm xmm xmm
// VFMSUBADD213PS ymm ymm ymm
// VFMSUBADD213PS m128 xmm k xmm
// VFMSUBADD213PS m256 ymm k ymm
// VFMSUBADD213PS xmm xmm k xmm
// VFMSUBADD213PS ymm ymm k ymm
// VFMSUBADD213PS m512 zmm k zmm
// VFMSUBADD213PS m512 zmm zmm
// VFMSUBADD213PS zmm zmm k zmm
// VFMSUBADD213PS zmm zmm zmm
func VFMSUBADD213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{}, ops)
}
// VFMSUBADD213PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD213PS.BCST m32 xmm k xmm
// VFMSUBADD213PS.BCST m32 xmm xmm
// VFMSUBADD213PS.BCST m32 ymm k ymm
// VFMSUBADD213PS.BCST m32 ymm ymm
// VFMSUBADD213PS.BCST m32 zmm k zmm
// VFMSUBADD213PS.BCST m32 zmm zmm
func VFMSUBADD213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD213PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.BCST.Z m32 xmm k xmm
// VFMSUBADD213PS.BCST.Z m32 ymm k ymm
// VFMSUBADD213PS.BCST.Z m32 zmm k zmm
func VFMSUBADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD213PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE zmm zmm k zmm
// VFMSUBADD213PS.RD_SAE zmm zmm zmm
func VFMSUBADD213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD213PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE zmm zmm k zmm
// VFMSUBADD213PS.RN_SAE zmm zmm zmm
func VFMSUBADD213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD213PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE zmm zmm k zmm
// VFMSUBADD213PS.RU_SAE zmm zmm zmm
func VFMSUBADD213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD213PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD213PS.RZ_SAE zmm zmm zmm
func VFMSUBADD213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD213PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD213PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD213PS.Z m128 xmm k xmm
// VFMSUBADD213PS.Z m256 ymm k ymm
// VFMSUBADD213PS.Z xmm xmm k xmm
// VFMSUBADD213PS.Z ymm ymm k ymm
// VFMSUBADD213PS.Z m512 zmm k zmm
// VFMSUBADD213PS.Z zmm zmm k zmm
func VFMSUBADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUBADD231PD: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PD m128 xmm xmm
// VFMSUBADD231PD m256 ymm ymm
// VFMSUBADD231PD xmm xmm xmm
// VFMSUBADD231PD ymm ymm ymm
// VFMSUBADD231PD m128 xmm k xmm
// VFMSUBADD231PD m256 ymm k ymm
// VFMSUBADD231PD xmm xmm k xmm
// VFMSUBADD231PD ymm ymm k ymm
// VFMSUBADD231PD m512 zmm k zmm
// VFMSUBADD231PD m512 zmm zmm
// VFMSUBADD231PD zmm zmm k zmm
// VFMSUBADD231PD zmm zmm zmm
func VFMSUBADD231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{}, ops)
}
// VFMSUBADD231PD_BCST: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PD.BCST m64 xmm k xmm
// VFMSUBADD231PD.BCST m64 xmm xmm
// VFMSUBADD231PD.BCST m64 ymm k ymm
// VFMSUBADD231PD.BCST m64 ymm ymm
// VFMSUBADD231PD.BCST m64 zmm k zmm
// VFMSUBADD231PD.BCST m64 zmm zmm
func VFMSUBADD231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD231PD_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.BCST.Z m64 xmm k xmm
// VFMSUBADD231PD.BCST.Z m64 ymm k ymm
// VFMSUBADD231PD.BCST.Z m64 zmm k zmm
func VFMSUBADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD231PD_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE zmm zmm k zmm
// VFMSUBADD231PD.RD_SAE zmm zmm zmm
func VFMSUBADD231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD231PD_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PD_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE zmm zmm k zmm
// VFMSUBADD231PD.RN_SAE zmm zmm zmm
func VFMSUBADD231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD231PD_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PD_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE zmm zmm k zmm
// VFMSUBADD231PD.RU_SAE zmm zmm zmm
func VFMSUBADD231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD231PD_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PD_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PD.RZ_SAE zmm zmm zmm
func VFMSUBADD231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD231PD_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PD_Z: Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PD.Z m128 xmm k xmm
// VFMSUBADD231PD.Z m256 ymm k ymm
// VFMSUBADD231PD.Z xmm xmm k xmm
// VFMSUBADD231PD.Z ymm ymm k ymm
// VFMSUBADD231PD.Z m512 zmm k zmm
// VFMSUBADD231PD.Z zmm zmm k zmm
func VFMSUBADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFMSUBADD231PS: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFMSUBADD231PS m128 xmm xmm
// VFMSUBADD231PS m256 ymm ymm
// VFMSUBADD231PS xmm xmm xmm
// VFMSUBADD231PS ymm ymm ymm
// VFMSUBADD231PS m128 xmm k xmm
// VFMSUBADD231PS m256 ymm k ymm
// VFMSUBADD231PS xmm xmm k xmm
// VFMSUBADD231PS ymm ymm k ymm
// VFMSUBADD231PS m512 zmm k zmm
// VFMSUBADD231PS m512 zmm zmm
// VFMSUBADD231PS zmm zmm k zmm
// VFMSUBADD231PS zmm zmm zmm
func VFMSUBADD231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{}, ops)
}
// VFMSUBADD231PS_BCST: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFMSUBADD231PS.BCST m32 xmm k xmm
// VFMSUBADD231PS.BCST m32 xmm xmm
// VFMSUBADD231PS.BCST m32 ymm k ymm
// VFMSUBADD231PS.BCST m32 ymm ymm
// VFMSUBADD231PS.BCST m32 zmm k zmm
// VFMSUBADD231PS.BCST m32 zmm zmm
func VFMSUBADD231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFMSUBADD231PS_BCST_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.BCST.Z m32 xmm k xmm
// VFMSUBADD231PS.BCST.Z m32 ymm k ymm
// VFMSUBADD231PS.BCST.Z m32 zmm k zmm
func VFMSUBADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFMSUBADD231PS_RD_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE zmm zmm k zmm
// VFMSUBADD231PS.RD_SAE zmm zmm zmm
func VFMSUBADD231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFMSUBADD231PS_RD_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RD_SAE.Z zmm zmm k zmm
func VFMSUBADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PS_RN_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE zmm zmm k zmm
// VFMSUBADD231PS.RN_SAE zmm zmm zmm
func VFMSUBADD231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFMSUBADD231PS_RN_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RN_SAE.Z zmm zmm k zmm
func VFMSUBADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PS_RU_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE zmm zmm k zmm
// VFMSUBADD231PS.RU_SAE zmm zmm zmm
func VFMSUBADD231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFMSUBADD231PS_RU_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RU_SAE.Z zmm zmm k zmm
func VFMSUBADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PS_RZ_SAE: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE zmm zmm k zmm
// VFMSUBADD231PS.RZ_SAE zmm zmm zmm
func VFMSUBADD231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFMSUBADD231PS_RZ_SAE_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.RZ_SAE.Z zmm zmm k zmm
func VFMSUBADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFMSUBADD231PS_Z: Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFMSUBADD231PS.Z m128 xmm k xmm
// VFMSUBADD231PS.Z m256 ymm k ymm
// VFMSUBADD231PS.Z xmm xmm k xmm
// VFMSUBADD231PS.Z ymm ymm k ymm
// VFMSUBADD231PS.Z m512 zmm k zmm
// VFMSUBADD231PS.Z zmm zmm k zmm
func VFMSUBADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFMSUBADD231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD132PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PD m128 xmm xmm
// VFNMADD132PD m256 ymm ymm
// VFNMADD132PD xmm xmm xmm
// VFNMADD132PD ymm ymm ymm
// VFNMADD132PD m128 xmm k xmm
// VFNMADD132PD m256 ymm k ymm
// VFNMADD132PD xmm xmm k xmm
// VFNMADD132PD ymm ymm k ymm
// VFNMADD132PD m512 zmm k zmm
// VFNMADD132PD m512 zmm zmm
// VFNMADD132PD zmm zmm k zmm
// VFNMADD132PD zmm zmm zmm
func VFNMADD132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{}, ops)
}
// VFNMADD132PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PD.BCST m64 xmm k xmm
// VFNMADD132PD.BCST m64 xmm xmm
// VFNMADD132PD.BCST m64 ymm k ymm
// VFNMADD132PD.BCST m64 ymm ymm
// VFNMADD132PD.BCST m64 zmm k zmm
// VFNMADD132PD.BCST m64 zmm zmm
func VFNMADD132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD132PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.BCST.Z m64 xmm k xmm
// VFNMADD132PD.BCST.Z m64 ymm k ymm
// VFNMADD132PD.BCST.Z m64 zmm k zmm
func VFNMADD132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD132PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PD.RD_SAE zmm zmm k zmm
// VFNMADD132PD.RD_SAE zmm zmm zmm
func VFNMADD132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD132PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RD_SAE.Z zmm zmm k zmm
func VFNMADD132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PD.RN_SAE zmm zmm k zmm
// VFNMADD132PD.RN_SAE zmm zmm zmm
func VFNMADD132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD132PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RN_SAE.Z zmm zmm k zmm
func VFNMADD132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PD.RU_SAE zmm zmm k zmm
// VFNMADD132PD.RU_SAE zmm zmm zmm
func VFNMADD132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD132PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RU_SAE.Z zmm zmm k zmm
func VFNMADD132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE zmm zmm k zmm
// VFNMADD132PD.RZ_SAE zmm zmm zmm
func VFNMADD132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD132PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.RZ_SAE.Z zmm zmm k zmm
func VFNMADD132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PD.Z m128 xmm k xmm
// VFNMADD132PD.Z m256 ymm k ymm
// VFNMADD132PD.Z xmm xmm k xmm
// VFNMADD132PD.Z ymm ymm k ymm
// VFNMADD132PD.Z m512 zmm k zmm
// VFNMADD132PD.Z zmm zmm k zmm
func VFNMADD132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD132PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132PS m128 xmm xmm
// VFNMADD132PS m256 ymm ymm
// VFNMADD132PS xmm xmm xmm
// VFNMADD132PS ymm ymm ymm
// VFNMADD132PS m128 xmm k xmm
// VFNMADD132PS m256 ymm k ymm
// VFNMADD132PS xmm xmm k xmm
// VFNMADD132PS ymm ymm k ymm
// VFNMADD132PS m512 zmm k zmm
// VFNMADD132PS m512 zmm zmm
// VFNMADD132PS zmm zmm k zmm
// VFNMADD132PS zmm zmm zmm
func VFNMADD132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{}, ops)
}
// VFNMADD132PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD132PS.BCST m32 xmm k xmm
// VFNMADD132PS.BCST m32 xmm xmm
// VFNMADD132PS.BCST m32 ymm k ymm
// VFNMADD132PS.BCST m32 ymm ymm
// VFNMADD132PS.BCST m32 zmm k zmm
// VFNMADD132PS.BCST m32 zmm zmm
func VFNMADD132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD132PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.BCST.Z m32 xmm k xmm
// VFNMADD132PS.BCST.Z m32 ymm k ymm
// VFNMADD132PS.BCST.Z m32 zmm k zmm
func VFNMADD132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD132PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132PS.RD_SAE zmm zmm k zmm
// VFNMADD132PS.RD_SAE zmm zmm zmm
func VFNMADD132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD132PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RD_SAE.Z zmm zmm k zmm
func VFNMADD132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132PS.RN_SAE zmm zmm k zmm
// VFNMADD132PS.RN_SAE zmm zmm zmm
func VFNMADD132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD132PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RN_SAE.Z zmm zmm k zmm
func VFNMADD132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132PS.RU_SAE zmm zmm k zmm
// VFNMADD132PS.RU_SAE zmm zmm zmm
func VFNMADD132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD132PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RU_SAE.Z zmm zmm k zmm
func VFNMADD132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE zmm zmm k zmm
// VFNMADD132PS.RZ_SAE zmm zmm zmm
func VFNMADD132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD132PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.RZ_SAE.Z zmm zmm k zmm
func VFNMADD132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD132PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132PS.Z m128 xmm k xmm
// VFNMADD132PS.Z m256 ymm k ymm
// VFNMADD132PS.Z xmm xmm k xmm
// VFNMADD132PS.Z ymm ymm k ymm
// VFNMADD132PS.Z m512 zmm k zmm
// VFNMADD132PS.Z zmm zmm k zmm
func VFNMADD132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD132SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SD m64 xmm xmm
// VFNMADD132SD xmm xmm xmm
// VFNMADD132SD m64 xmm k xmm
// VFNMADD132SD xmm xmm k xmm
func VFNMADD132SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{}, ops)
}
// VFNMADD132SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SD.RD_SAE xmm xmm k xmm
// VFNMADD132SD.RD_SAE xmm xmm xmm
func VFNMADD132SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD132SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RD_SAE.Z xmm xmm k xmm
func VFNMADD132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SD.RN_SAE xmm xmm k xmm
// VFNMADD132SD.RN_SAE xmm xmm xmm
func VFNMADD132SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD132SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RN_SAE.Z xmm xmm k xmm
func VFNMADD132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SD.RU_SAE xmm xmm k xmm
// VFNMADD132SD.RU_SAE xmm xmm xmm
func VFNMADD132SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD132SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RU_SAE.Z xmm xmm k xmm
func VFNMADD132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE xmm xmm k xmm
// VFNMADD132SD.RZ_SAE xmm xmm xmm
func VFNMADD132SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD132SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.RZ_SAE.Z xmm xmm k xmm
func VFNMADD132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SD.Z m64 xmm k xmm
// VFNMADD132SD.Z xmm xmm k xmm
func VFNMADD132SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMADD132SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD132SS m32 xmm xmm
// VFNMADD132SS xmm xmm xmm
// VFNMADD132SS m32 xmm k xmm
// VFNMADD132SS xmm xmm k xmm
func VFNMADD132SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{}, ops)
}
// VFNMADD132SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD132SS.RD_SAE xmm xmm k xmm
// VFNMADD132SS.RD_SAE xmm xmm xmm
func VFNMADD132SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD132SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RD_SAE.Z xmm xmm k xmm
func VFNMADD132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD132SS.RN_SAE xmm xmm k xmm
// VFNMADD132SS.RN_SAE xmm xmm xmm
func VFNMADD132SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD132SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RN_SAE.Z xmm xmm k xmm
func VFNMADD132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD132SS.RU_SAE xmm xmm k xmm
// VFNMADD132SS.RU_SAE xmm xmm xmm
func VFNMADD132SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD132SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RU_SAE.Z xmm xmm k xmm
func VFNMADD132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE xmm xmm k xmm
// VFNMADD132SS.RZ_SAE xmm xmm xmm
func VFNMADD132SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD132SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.RZ_SAE.Z xmm xmm k xmm
func VFNMADD132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD132SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD132SS.Z m32 xmm k xmm
// VFNMADD132SS.Z xmm xmm k xmm
func VFNMADD132SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD132SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMADD213PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PD m128 xmm xmm
// VFNMADD213PD m256 ymm ymm
// VFNMADD213PD xmm xmm xmm
// VFNMADD213PD ymm ymm ymm
// VFNMADD213PD m128 xmm k xmm
// VFNMADD213PD m256 ymm k ymm
// VFNMADD213PD xmm xmm k xmm
// VFNMADD213PD ymm ymm k ymm
// VFNMADD213PD m512 zmm k zmm
// VFNMADD213PD m512 zmm zmm
// VFNMADD213PD zmm zmm k zmm
// VFNMADD213PD zmm zmm zmm
func VFNMADD213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{}, ops)
}
// VFNMADD213PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PD.BCST m64 xmm k xmm
// VFNMADD213PD.BCST m64 xmm xmm
// VFNMADD213PD.BCST m64 ymm k ymm
// VFNMADD213PD.BCST m64 ymm ymm
// VFNMADD213PD.BCST m64 zmm k zmm
// VFNMADD213PD.BCST m64 zmm zmm
func VFNMADD213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD213PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.BCST.Z m64 xmm k xmm
// VFNMADD213PD.BCST.Z m64 ymm k ymm
// VFNMADD213PD.BCST.Z m64 zmm k zmm
func VFNMADD213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD213PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PD.RD_SAE zmm zmm k zmm
// VFNMADD213PD.RD_SAE zmm zmm zmm
func VFNMADD213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD213PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RD_SAE.Z zmm zmm k zmm
func VFNMADD213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PD.RN_SAE zmm zmm k zmm
// VFNMADD213PD.RN_SAE zmm zmm zmm
func VFNMADD213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD213PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RN_SAE.Z zmm zmm k zmm
func VFNMADD213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PD.RU_SAE zmm zmm k zmm
// VFNMADD213PD.RU_SAE zmm zmm zmm
func VFNMADD213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD213PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RU_SAE.Z zmm zmm k zmm
func VFNMADD213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE zmm zmm k zmm
// VFNMADD213PD.RZ_SAE zmm zmm zmm
func VFNMADD213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD213PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.RZ_SAE.Z zmm zmm k zmm
func VFNMADD213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PD.Z m128 xmm k xmm
// VFNMADD213PD.Z m256 ymm k ymm
// VFNMADD213PD.Z xmm xmm k xmm
// VFNMADD213PD.Z ymm ymm k ymm
// VFNMADD213PD.Z m512 zmm k zmm
// VFNMADD213PD.Z zmm zmm k zmm
func VFNMADD213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD213PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213PS m128 xmm xmm
// VFNMADD213PS m256 ymm ymm
// VFNMADD213PS xmm xmm xmm
// VFNMADD213PS ymm ymm ymm
// VFNMADD213PS m128 xmm k xmm
// VFNMADD213PS m256 ymm k ymm
// VFNMADD213PS xmm xmm k xmm
// VFNMADD213PS ymm ymm k ymm
// VFNMADD213PS m512 zmm k zmm
// VFNMADD213PS m512 zmm zmm
// VFNMADD213PS zmm zmm k zmm
// VFNMADD213PS zmm zmm zmm
func VFNMADD213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{}, ops)
}
// VFNMADD213PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD213PS.BCST m32 xmm k xmm
// VFNMADD213PS.BCST m32 xmm xmm
// VFNMADD213PS.BCST m32 ymm k ymm
// VFNMADD213PS.BCST m32 ymm ymm
// VFNMADD213PS.BCST m32 zmm k zmm
// VFNMADD213PS.BCST m32 zmm zmm
func VFNMADD213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD213PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.BCST.Z m32 xmm k xmm
// VFNMADD213PS.BCST.Z m32 ymm k ymm
// VFNMADD213PS.BCST.Z m32 zmm k zmm
func VFNMADD213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD213PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213PS.RD_SAE zmm zmm k zmm
// VFNMADD213PS.RD_SAE zmm zmm zmm
func VFNMADD213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD213PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RD_SAE.Z zmm zmm k zmm
func VFNMADD213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213PS.RN_SAE zmm zmm k zmm
// VFNMADD213PS.RN_SAE zmm zmm zmm
func VFNMADD213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD213PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RN_SAE.Z zmm zmm k zmm
func VFNMADD213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213PS.RU_SAE zmm zmm k zmm
// VFNMADD213PS.RU_SAE zmm zmm zmm
func VFNMADD213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD213PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RU_SAE.Z zmm zmm k zmm
func VFNMADD213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE zmm zmm k zmm
// VFNMADD213PS.RZ_SAE zmm zmm zmm
func VFNMADD213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD213PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.RZ_SAE.Z zmm zmm k zmm
func VFNMADD213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD213PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213PS.Z m128 xmm k xmm
// VFNMADD213PS.Z m256 ymm k ymm
// VFNMADD213PS.Z xmm xmm k xmm
// VFNMADD213PS.Z ymm ymm k ymm
// VFNMADD213PS.Z m512 zmm k zmm
// VFNMADD213PS.Z zmm zmm k zmm
func VFNMADD213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD213SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SD m64 xmm xmm
// VFNMADD213SD xmm xmm xmm
// VFNMADD213SD m64 xmm k xmm
// VFNMADD213SD xmm xmm k xmm
func VFNMADD213SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{}, ops)
}
// VFNMADD213SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SD.RD_SAE xmm xmm k xmm
// VFNMADD213SD.RD_SAE xmm xmm xmm
func VFNMADD213SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD213SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RD_SAE.Z xmm xmm k xmm
func VFNMADD213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SD.RN_SAE xmm xmm k xmm
// VFNMADD213SD.RN_SAE xmm xmm xmm
func VFNMADD213SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD213SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RN_SAE.Z xmm xmm k xmm
func VFNMADD213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SD.RU_SAE xmm xmm k xmm
// VFNMADD213SD.RU_SAE xmm xmm xmm
func VFNMADD213SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD213SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RU_SAE.Z xmm xmm k xmm
func VFNMADD213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE xmm xmm k xmm
// VFNMADD213SD.RZ_SAE xmm xmm xmm
func VFNMADD213SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD213SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.RZ_SAE.Z xmm xmm k xmm
func VFNMADD213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SD.Z m64 xmm k xmm
// VFNMADD213SD.Z xmm xmm k xmm
func VFNMADD213SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMADD213SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD213SS m32 xmm xmm
// VFNMADD213SS xmm xmm xmm
// VFNMADD213SS m32 xmm k xmm
// VFNMADD213SS xmm xmm k xmm
func VFNMADD213SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{}, ops)
}
// VFNMADD213SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD213SS.RD_SAE xmm xmm k xmm
// VFNMADD213SS.RD_SAE xmm xmm xmm
func VFNMADD213SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD213SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RD_SAE.Z xmm xmm k xmm
func VFNMADD213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD213SS.RN_SAE xmm xmm k xmm
// VFNMADD213SS.RN_SAE xmm xmm xmm
func VFNMADD213SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD213SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RN_SAE.Z xmm xmm k xmm
func VFNMADD213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD213SS.RU_SAE xmm xmm k xmm
// VFNMADD213SS.RU_SAE xmm xmm xmm
func VFNMADD213SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD213SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RU_SAE.Z xmm xmm k xmm
func VFNMADD213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE xmm xmm k xmm
// VFNMADD213SS.RZ_SAE xmm xmm xmm
func VFNMADD213SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD213SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.RZ_SAE.Z xmm xmm k xmm
func VFNMADD213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD213SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD213SS.Z m32 xmm k xmm
// VFNMADD213SS.Z xmm xmm k xmm
func VFNMADD213SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD213SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMADD231PD: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PD m128 xmm xmm
// VFNMADD231PD m256 ymm ymm
// VFNMADD231PD xmm xmm xmm
// VFNMADD231PD ymm ymm ymm
// VFNMADD231PD m128 xmm k xmm
// VFNMADD231PD m256 ymm k ymm
// VFNMADD231PD xmm xmm k xmm
// VFNMADD231PD ymm ymm k ymm
// VFNMADD231PD m512 zmm k zmm
// VFNMADD231PD m512 zmm zmm
// VFNMADD231PD zmm zmm k zmm
// VFNMADD231PD zmm zmm zmm
func VFNMADD231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{}, ops)
}
// VFNMADD231PD_BCST: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PD.BCST m64 xmm k xmm
// VFNMADD231PD.BCST m64 xmm xmm
// VFNMADD231PD.BCST m64 ymm k ymm
// VFNMADD231PD.BCST m64 ymm ymm
// VFNMADD231PD.BCST m64 zmm k zmm
// VFNMADD231PD.BCST m64 zmm zmm
func VFNMADD231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD231PD_BCST_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.BCST.Z m64 xmm k xmm
// VFNMADD231PD.BCST.Z m64 ymm k ymm
// VFNMADD231PD.BCST.Z m64 zmm k zmm
func VFNMADD231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD231PD_RD_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PD.RD_SAE zmm zmm k zmm
// VFNMADD231PD.RD_SAE zmm zmm zmm
func VFNMADD231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD231PD_RD_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RD_SAE.Z zmm zmm k zmm
func VFNMADD231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PD_RN_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PD.RN_SAE zmm zmm k zmm
// VFNMADD231PD.RN_SAE zmm zmm zmm
func VFNMADD231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD231PD_RN_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RN_SAE.Z zmm zmm k zmm
func VFNMADD231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PD_RU_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PD.RU_SAE zmm zmm k zmm
// VFNMADD231PD.RU_SAE zmm zmm zmm
func VFNMADD231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD231PD_RU_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RU_SAE.Z zmm zmm k zmm
func VFNMADD231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PD_RZ_SAE: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE zmm zmm k zmm
// VFNMADD231PD.RZ_SAE zmm zmm zmm
func VFNMADD231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD231PD_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.RZ_SAE.Z zmm zmm k zmm
func VFNMADD231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PD_Z: Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PD.Z m128 xmm k xmm
// VFNMADD231PD.Z m256 ymm k ymm
// VFNMADD231PD.Z xmm xmm k xmm
// VFNMADD231PD.Z ymm ymm k ymm
// VFNMADD231PD.Z m512 zmm k zmm
// VFNMADD231PD.Z zmm zmm k zmm
func VFNMADD231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD231PS: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231PS m128 xmm xmm
// VFNMADD231PS m256 ymm ymm
// VFNMADD231PS xmm xmm xmm
// VFNMADD231PS ymm ymm ymm
// VFNMADD231PS m128 xmm k xmm
// VFNMADD231PS m256 ymm k ymm
// VFNMADD231PS xmm xmm k xmm
// VFNMADD231PS ymm ymm k ymm
// VFNMADD231PS m512 zmm k zmm
// VFNMADD231PS m512 zmm zmm
// VFNMADD231PS zmm zmm k zmm
// VFNMADD231PS zmm zmm zmm
func VFNMADD231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{}, ops)
}
// VFNMADD231PS_BCST: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMADD231PS.BCST m32 xmm k xmm
// VFNMADD231PS.BCST m32 xmm xmm
// VFNMADD231PS.BCST m32 ymm k ymm
// VFNMADD231PS.BCST m32 ymm ymm
// VFNMADD231PS.BCST m32 zmm k zmm
// VFNMADD231PS.BCST m32 zmm zmm
func VFNMADD231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMADD231PS_BCST_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.BCST.Z m32 xmm k xmm
// VFNMADD231PS.BCST.Z m32 ymm k ymm
// VFNMADD231PS.BCST.Z m32 zmm k zmm
func VFNMADD231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMADD231PS_RD_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231PS.RD_SAE zmm zmm k zmm
// VFNMADD231PS.RD_SAE zmm zmm zmm
func VFNMADD231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD231PS_RD_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RD_SAE.Z zmm zmm k zmm
func VFNMADD231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PS_RN_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231PS.RN_SAE zmm zmm k zmm
// VFNMADD231PS.RN_SAE zmm zmm zmm
func VFNMADD231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD231PS_RN_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RN_SAE.Z zmm zmm k zmm
func VFNMADD231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PS_RU_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231PS.RU_SAE zmm zmm k zmm
// VFNMADD231PS.RU_SAE zmm zmm zmm
func VFNMADD231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD231PS_RU_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RU_SAE.Z zmm zmm k zmm
func VFNMADD231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PS_RZ_SAE: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE zmm zmm k zmm
// VFNMADD231PS.RZ_SAE zmm zmm zmm
func VFNMADD231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD231PS_RZ_SAE_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.RZ_SAE.Z zmm zmm k zmm
func VFNMADD231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMADD231PS_Z: Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231PS.Z m128 xmm k xmm
// VFNMADD231PS.Z m256 ymm k ymm
// VFNMADD231PS.Z xmm xmm k xmm
// VFNMADD231PS.Z ymm ymm k ymm
// VFNMADD231PS.Z m512 zmm k zmm
// VFNMADD231PS.Z zmm zmm k zmm
func VFNMADD231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMADD231SD: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SD m64 xmm xmm
// VFNMADD231SD xmm xmm xmm
// VFNMADD231SD m64 xmm k xmm
// VFNMADD231SD xmm xmm k xmm
func VFNMADD231SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{}, ops)
}
// VFNMADD231SD_RD_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SD.RD_SAE xmm xmm k xmm
// VFNMADD231SD.RD_SAE xmm xmm xmm
func VFNMADD231SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD231SD_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RD_SAE.Z xmm xmm k xmm
func VFNMADD231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SD_RN_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SD.RN_SAE xmm xmm k xmm
// VFNMADD231SD.RN_SAE xmm xmm xmm
func VFNMADD231SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD231SD_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RN_SAE.Z xmm xmm k xmm
func VFNMADD231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SD_RU_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SD.RU_SAE xmm xmm k xmm
// VFNMADD231SD.RU_SAE xmm xmm xmm
func VFNMADD231SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD231SD_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RU_SAE.Z xmm xmm k xmm
func VFNMADD231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SD_RZ_SAE: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE xmm xmm k xmm
// VFNMADD231SD.RZ_SAE xmm xmm xmm
func VFNMADD231SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD231SD_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.RZ_SAE.Z xmm xmm k xmm
func VFNMADD231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SD_Z: Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SD.Z m64 xmm k xmm
// VFNMADD231SD.Z xmm xmm k xmm
func VFNMADD231SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMADD231SS: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMADD231SS m32 xmm xmm
// VFNMADD231SS xmm xmm xmm
// VFNMADD231SS m32 xmm k xmm
// VFNMADD231SS xmm xmm k xmm
func VFNMADD231SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{}, ops)
}
// VFNMADD231SS_RD_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMADD231SS.RD_SAE xmm xmm k xmm
// VFNMADD231SS.RD_SAE xmm xmm xmm
func VFNMADD231SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMADD231SS_RD_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RD_SAE.Z xmm xmm k xmm
func VFNMADD231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SS_RN_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMADD231SS.RN_SAE xmm xmm k xmm
// VFNMADD231SS.RN_SAE xmm xmm xmm
func VFNMADD231SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMADD231SS_RN_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RN_SAE.Z xmm xmm k xmm
func VFNMADD231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SS_RU_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMADD231SS.RU_SAE xmm xmm k xmm
// VFNMADD231SS.RU_SAE xmm xmm xmm
func VFNMADD231SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMADD231SS_RU_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RU_SAE.Z xmm xmm k xmm
func VFNMADD231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SS_RZ_SAE: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE xmm xmm k xmm
// VFNMADD231SS.RZ_SAE xmm xmm xmm
func VFNMADD231SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMADD231SS_RZ_SAE_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.RZ_SAE.Z xmm xmm k xmm
func VFNMADD231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMADD231SS_Z: Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMADD231SS.Z m32 xmm k xmm
// VFNMADD231SS.Z xmm xmm k xmm
func VFNMADD231SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMADD231SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB132PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PD m128 xmm xmm
// VFNMSUB132PD m256 ymm ymm
// VFNMSUB132PD xmm xmm xmm
// VFNMSUB132PD ymm ymm ymm
// VFNMSUB132PD m128 xmm k xmm
// VFNMSUB132PD m256 ymm k ymm
// VFNMSUB132PD xmm xmm k xmm
// VFNMSUB132PD ymm ymm k ymm
// VFNMSUB132PD m512 zmm k zmm
// VFNMSUB132PD m512 zmm zmm
// VFNMSUB132PD zmm zmm k zmm
// VFNMSUB132PD zmm zmm zmm
func VFNMSUB132PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{}, ops)
}
// VFNMSUB132PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PD.BCST m64 xmm k xmm
// VFNMSUB132PD.BCST m64 xmm xmm
// VFNMSUB132PD.BCST m64 ymm k ymm
// VFNMSUB132PD.BCST m64 ymm ymm
// VFNMSUB132PD.BCST m64 zmm k zmm
// VFNMSUB132PD.BCST m64 zmm zmm
func VFNMSUB132PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB132PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.BCST.Z m64 xmm k xmm
// VFNMSUB132PD.BCST.Z m64 ymm k ymm
// VFNMSUB132PD.BCST.Z m64 zmm k zmm
func VFNMSUB132PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB132PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE zmm zmm k zmm
// VFNMSUB132PD.RD_SAE zmm zmm zmm
func VFNMSUB132PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB132PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RD_SAE.Z zmm zmm k zmm
func VFNMSUB132PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE zmm zmm k zmm
// VFNMSUB132PD.RN_SAE zmm zmm zmm
func VFNMSUB132PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB132PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RN_SAE.Z zmm zmm k zmm
func VFNMSUB132PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE zmm zmm k zmm
// VFNMSUB132PD.RU_SAE zmm zmm zmm
func VFNMSUB132PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB132PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RU_SAE.Z zmm zmm k zmm
func VFNMSUB132PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE zmm zmm k zmm
// VFNMSUB132PD.RZ_SAE zmm zmm zmm
func VFNMSUB132PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB132PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB132PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PD.Z m128 xmm k xmm
// VFNMSUB132PD.Z m256 ymm k ymm
// VFNMSUB132PD.Z xmm xmm k xmm
// VFNMSUB132PD.Z ymm ymm k ymm
// VFNMSUB132PD.Z m512 zmm k zmm
// VFNMSUB132PD.Z zmm zmm k zmm
func VFNMSUB132PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB132PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132PS m128 xmm xmm
// VFNMSUB132PS m256 ymm ymm
// VFNMSUB132PS xmm xmm xmm
// VFNMSUB132PS ymm ymm ymm
// VFNMSUB132PS m128 xmm k xmm
// VFNMSUB132PS m256 ymm k ymm
// VFNMSUB132PS xmm xmm k xmm
// VFNMSUB132PS ymm ymm k ymm
// VFNMSUB132PS m512 zmm k zmm
// VFNMSUB132PS m512 zmm zmm
// VFNMSUB132PS zmm zmm k zmm
// VFNMSUB132PS zmm zmm zmm
func VFNMSUB132PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{}, ops)
}
// VFNMSUB132PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB132PS.BCST m32 xmm k xmm
// VFNMSUB132PS.BCST m32 xmm xmm
// VFNMSUB132PS.BCST m32 ymm k ymm
// VFNMSUB132PS.BCST m32 ymm ymm
// VFNMSUB132PS.BCST m32 zmm k zmm
// VFNMSUB132PS.BCST m32 zmm zmm
func VFNMSUB132PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB132PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.BCST.Z m32 xmm k xmm
// VFNMSUB132PS.BCST.Z m32 ymm k ymm
// VFNMSUB132PS.BCST.Z m32 zmm k zmm
func VFNMSUB132PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB132PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE zmm zmm k zmm
// VFNMSUB132PS.RD_SAE zmm zmm zmm
func VFNMSUB132PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB132PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RD_SAE.Z zmm zmm k zmm
func VFNMSUB132PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE zmm zmm k zmm
// VFNMSUB132PS.RN_SAE zmm zmm zmm
func VFNMSUB132PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB132PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RN_SAE.Z zmm zmm k zmm
func VFNMSUB132PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE zmm zmm k zmm
// VFNMSUB132PS.RU_SAE zmm zmm zmm
func VFNMSUB132PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB132PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RU_SAE.Z zmm zmm k zmm
func VFNMSUB132PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE zmm zmm k zmm
// VFNMSUB132PS.RZ_SAE zmm zmm zmm
func VFNMSUB132PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB132PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB132PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB132PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132PS.Z m128 xmm k xmm
// VFNMSUB132PS.Z m256 ymm k ymm
// VFNMSUB132PS.Z xmm xmm k xmm
// VFNMSUB132PS.Z ymm ymm k ymm
// VFNMSUB132PS.Z m512 zmm k zmm
// VFNMSUB132PS.Z zmm zmm k zmm
func VFNMSUB132PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB132SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SD m64 xmm xmm
// VFNMSUB132SD xmm xmm xmm
// VFNMSUB132SD m64 xmm k xmm
// VFNMSUB132SD xmm xmm k xmm
func VFNMSUB132SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{}, ops)
}
// VFNMSUB132SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE xmm xmm k xmm
// VFNMSUB132SD.RD_SAE xmm xmm xmm
func VFNMSUB132SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB132SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RD_SAE.Z xmm xmm k xmm
func VFNMSUB132SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE xmm xmm k xmm
// VFNMSUB132SD.RN_SAE xmm xmm xmm
func VFNMSUB132SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB132SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RN_SAE.Z xmm xmm k xmm
func VFNMSUB132SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE xmm xmm k xmm
// VFNMSUB132SD.RU_SAE xmm xmm xmm
func VFNMSUB132SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB132SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RU_SAE.Z xmm xmm k xmm
func VFNMSUB132SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE xmm xmm k xmm
// VFNMSUB132SD.RZ_SAE xmm xmm xmm
func VFNMSUB132SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB132SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB132SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SD.Z m64 xmm k xmm
// VFNMSUB132SD.Z xmm xmm k xmm
func VFNMSUB132SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB132SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB132SS m32 xmm xmm
// VFNMSUB132SS xmm xmm xmm
// VFNMSUB132SS m32 xmm k xmm
// VFNMSUB132SS xmm xmm k xmm
func VFNMSUB132SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{}, ops)
}
// VFNMSUB132SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE xmm xmm k xmm
// VFNMSUB132SS.RD_SAE xmm xmm xmm
func VFNMSUB132SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB132SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RD_SAE.Z xmm xmm k xmm
func VFNMSUB132SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE xmm xmm k xmm
// VFNMSUB132SS.RN_SAE xmm xmm xmm
func VFNMSUB132SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB132SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RN_SAE.Z xmm xmm k xmm
func VFNMSUB132SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE xmm xmm k xmm
// VFNMSUB132SS.RU_SAE xmm xmm xmm
func VFNMSUB132SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB132SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RU_SAE.Z xmm xmm k xmm
func VFNMSUB132SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE xmm xmm k xmm
// VFNMSUB132SS.RZ_SAE xmm xmm xmm
func VFNMSUB132SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB132SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB132SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB132SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB132SS.Z m32 xmm k xmm
// VFNMSUB132SS.Z xmm xmm k xmm
func VFNMSUB132SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB132SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB213PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PD m128 xmm xmm
// VFNMSUB213PD m256 ymm ymm
// VFNMSUB213PD xmm xmm xmm
// VFNMSUB213PD ymm ymm ymm
// VFNMSUB213PD m128 xmm k xmm
// VFNMSUB213PD m256 ymm k ymm
// VFNMSUB213PD xmm xmm k xmm
// VFNMSUB213PD ymm ymm k ymm
// VFNMSUB213PD m512 zmm k zmm
// VFNMSUB213PD m512 zmm zmm
// VFNMSUB213PD zmm zmm k zmm
// VFNMSUB213PD zmm zmm zmm
func VFNMSUB213PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{}, ops)
}
// VFNMSUB213PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PD.BCST m64 xmm k xmm
// VFNMSUB213PD.BCST m64 xmm xmm
// VFNMSUB213PD.BCST m64 ymm k ymm
// VFNMSUB213PD.BCST m64 ymm ymm
// VFNMSUB213PD.BCST m64 zmm k zmm
// VFNMSUB213PD.BCST m64 zmm zmm
func VFNMSUB213PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB213PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.BCST.Z m64 xmm k xmm
// VFNMSUB213PD.BCST.Z m64 ymm k ymm
// VFNMSUB213PD.BCST.Z m64 zmm k zmm
func VFNMSUB213PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB213PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE zmm zmm k zmm
// VFNMSUB213PD.RD_SAE zmm zmm zmm
func VFNMSUB213PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB213PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RD_SAE.Z zmm zmm k zmm
func VFNMSUB213PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE zmm zmm k zmm
// VFNMSUB213PD.RN_SAE zmm zmm zmm
func VFNMSUB213PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB213PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RN_SAE.Z zmm zmm k zmm
func VFNMSUB213PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE zmm zmm k zmm
// VFNMSUB213PD.RU_SAE zmm zmm zmm
func VFNMSUB213PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB213PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RU_SAE.Z zmm zmm k zmm
func VFNMSUB213PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE zmm zmm k zmm
// VFNMSUB213PD.RZ_SAE zmm zmm zmm
func VFNMSUB213PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB213PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB213PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PD.Z m128 xmm k xmm
// VFNMSUB213PD.Z m256 ymm k ymm
// VFNMSUB213PD.Z xmm xmm k xmm
// VFNMSUB213PD.Z ymm ymm k ymm
// VFNMSUB213PD.Z m512 zmm k zmm
// VFNMSUB213PD.Z zmm zmm k zmm
func VFNMSUB213PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB213PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213PS m128 xmm xmm
// VFNMSUB213PS m256 ymm ymm
// VFNMSUB213PS xmm xmm xmm
// VFNMSUB213PS ymm ymm ymm
// VFNMSUB213PS m128 xmm k xmm
// VFNMSUB213PS m256 ymm k ymm
// VFNMSUB213PS xmm xmm k xmm
// VFNMSUB213PS ymm ymm k ymm
// VFNMSUB213PS m512 zmm k zmm
// VFNMSUB213PS m512 zmm zmm
// VFNMSUB213PS zmm zmm k zmm
// VFNMSUB213PS zmm zmm zmm
func VFNMSUB213PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{}, ops)
}
// VFNMSUB213PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB213PS.BCST m32 xmm k xmm
// VFNMSUB213PS.BCST m32 xmm xmm
// VFNMSUB213PS.BCST m32 ymm k ymm
// VFNMSUB213PS.BCST m32 ymm ymm
// VFNMSUB213PS.BCST m32 zmm k zmm
// VFNMSUB213PS.BCST m32 zmm zmm
func VFNMSUB213PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB213PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.BCST.Z m32 xmm k xmm
// VFNMSUB213PS.BCST.Z m32 ymm k ymm
// VFNMSUB213PS.BCST.Z m32 zmm k zmm
func VFNMSUB213PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB213PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE zmm zmm k zmm
// VFNMSUB213PS.RD_SAE zmm zmm zmm
func VFNMSUB213PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB213PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RD_SAE.Z zmm zmm k zmm
func VFNMSUB213PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE zmm zmm k zmm
// VFNMSUB213PS.RN_SAE zmm zmm zmm
func VFNMSUB213PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB213PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RN_SAE.Z zmm zmm k zmm
func VFNMSUB213PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE zmm zmm k zmm
// VFNMSUB213PS.RU_SAE zmm zmm zmm
func VFNMSUB213PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB213PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RU_SAE.Z zmm zmm k zmm
func VFNMSUB213PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE zmm zmm k zmm
// VFNMSUB213PS.RZ_SAE zmm zmm zmm
func VFNMSUB213PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB213PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB213PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB213PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213PS.Z m128 xmm k xmm
// VFNMSUB213PS.Z m256 ymm k ymm
// VFNMSUB213PS.Z xmm xmm k xmm
// VFNMSUB213PS.Z ymm ymm k ymm
// VFNMSUB213PS.Z m512 zmm k zmm
// VFNMSUB213PS.Z zmm zmm k zmm
func VFNMSUB213PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB213SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SD m64 xmm xmm
// VFNMSUB213SD xmm xmm xmm
// VFNMSUB213SD m64 xmm k xmm
// VFNMSUB213SD xmm xmm k xmm
func VFNMSUB213SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{}, ops)
}
// VFNMSUB213SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE xmm xmm k xmm
// VFNMSUB213SD.RD_SAE xmm xmm xmm
func VFNMSUB213SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB213SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RD_SAE.Z xmm xmm k xmm
func VFNMSUB213SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE xmm xmm k xmm
// VFNMSUB213SD.RN_SAE xmm xmm xmm
func VFNMSUB213SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB213SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RN_SAE.Z xmm xmm k xmm
func VFNMSUB213SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE xmm xmm k xmm
// VFNMSUB213SD.RU_SAE xmm xmm xmm
func VFNMSUB213SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB213SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RU_SAE.Z xmm xmm k xmm
func VFNMSUB213SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE xmm xmm k xmm
// VFNMSUB213SD.RZ_SAE xmm xmm xmm
func VFNMSUB213SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB213SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB213SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SD.Z m64 xmm k xmm
// VFNMSUB213SD.Z xmm xmm k xmm
func VFNMSUB213SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB213SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB213SS m32 xmm xmm
// VFNMSUB213SS xmm xmm xmm
// VFNMSUB213SS m32 xmm k xmm
// VFNMSUB213SS xmm xmm k xmm
func VFNMSUB213SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{}, ops)
}
// VFNMSUB213SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE xmm xmm k xmm
// VFNMSUB213SS.RD_SAE xmm xmm xmm
func VFNMSUB213SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB213SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RD_SAE.Z xmm xmm k xmm
func VFNMSUB213SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE xmm xmm k xmm
// VFNMSUB213SS.RN_SAE xmm xmm xmm
func VFNMSUB213SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB213SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RN_SAE.Z xmm xmm k xmm
func VFNMSUB213SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE xmm xmm k xmm
// VFNMSUB213SS.RU_SAE xmm xmm xmm
func VFNMSUB213SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB213SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RU_SAE.Z xmm xmm k xmm
func VFNMSUB213SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE xmm xmm k xmm
// VFNMSUB213SS.RZ_SAE xmm xmm xmm
func VFNMSUB213SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB213SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB213SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB213SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB213SS.Z m32 xmm k xmm
// VFNMSUB213SS.Z xmm xmm k xmm
func VFNMSUB213SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB213SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB231PD: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PD m128 xmm xmm
// VFNMSUB231PD m256 ymm ymm
// VFNMSUB231PD xmm xmm xmm
// VFNMSUB231PD ymm ymm ymm
// VFNMSUB231PD m128 xmm k xmm
// VFNMSUB231PD m256 ymm k ymm
// VFNMSUB231PD xmm xmm k xmm
// VFNMSUB231PD ymm ymm k ymm
// VFNMSUB231PD m512 zmm k zmm
// VFNMSUB231PD m512 zmm zmm
// VFNMSUB231PD zmm zmm k zmm
// VFNMSUB231PD zmm zmm zmm
func VFNMSUB231PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{}, ops)
}
// VFNMSUB231PD_BCST: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PD.BCST m64 xmm k xmm
// VFNMSUB231PD.BCST m64 xmm xmm
// VFNMSUB231PD.BCST m64 ymm k ymm
// VFNMSUB231PD.BCST m64 ymm ymm
// VFNMSUB231PD.BCST m64 zmm k zmm
// VFNMSUB231PD.BCST m64 zmm zmm
func VFNMSUB231PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB231PD_BCST_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.BCST.Z m64 xmm k xmm
// VFNMSUB231PD.BCST.Z m64 ymm k ymm
// VFNMSUB231PD.BCST.Z m64 zmm k zmm
func VFNMSUB231PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB231PD_RD_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE zmm zmm k zmm
// VFNMSUB231PD.RD_SAE zmm zmm zmm
func VFNMSUB231PD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB231PD_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RD_SAE.Z zmm zmm k zmm
func VFNMSUB231PD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PD_RN_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE zmm zmm k zmm
// VFNMSUB231PD.RN_SAE zmm zmm zmm
func VFNMSUB231PD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB231PD_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RN_SAE.Z zmm zmm k zmm
func VFNMSUB231PD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PD_RU_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE zmm zmm k zmm
// VFNMSUB231PD.RU_SAE zmm zmm zmm
func VFNMSUB231PD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB231PD_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RU_SAE.Z zmm zmm k zmm
func VFNMSUB231PD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PD_RZ_SAE: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE zmm zmm k zmm
// VFNMSUB231PD.RZ_SAE zmm zmm zmm
func VFNMSUB231PD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB231PD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB231PD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PD_Z: Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PD.Z m128 xmm k xmm
// VFNMSUB231PD.Z m256 ymm k ymm
// VFNMSUB231PD.Z xmm xmm k xmm
// VFNMSUB231PD.Z ymm ymm k ymm
// VFNMSUB231PD.Z m512 zmm k zmm
// VFNMSUB231PD.Z zmm zmm k zmm
func VFNMSUB231PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB231PS: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231PS m128 xmm xmm
// VFNMSUB231PS m256 ymm ymm
// VFNMSUB231PS xmm xmm xmm
// VFNMSUB231PS ymm ymm ymm
// VFNMSUB231PS m128 xmm k xmm
// VFNMSUB231PS m256 ymm k ymm
// VFNMSUB231PS xmm xmm k xmm
// VFNMSUB231PS ymm ymm k ymm
// VFNMSUB231PS m512 zmm k zmm
// VFNMSUB231PS m512 zmm zmm
// VFNMSUB231PS zmm zmm k zmm
// VFNMSUB231PS zmm zmm zmm
func VFNMSUB231PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{}, ops)
}
// VFNMSUB231PS_BCST: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFNMSUB231PS.BCST m32 xmm k xmm
// VFNMSUB231PS.BCST m32 xmm xmm
// VFNMSUB231PS.BCST m32 ymm k ymm
// VFNMSUB231PS.BCST m32 ymm ymm
// VFNMSUB231PS.BCST m32 zmm k zmm
// VFNMSUB231PS.BCST m32 zmm zmm
func VFNMSUB231PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxBCST}, ops)
}
// VFNMSUB231PS_BCST_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.BCST.Z m32 xmm k xmm
// VFNMSUB231PS.BCST.Z m32 ymm k ymm
// VFNMSUB231PS.BCST.Z m32 zmm k zmm
func VFNMSUB231PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VFNMSUB231PS_RD_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE zmm zmm k zmm
// VFNMSUB231PS.RD_SAE zmm zmm zmm
func VFNMSUB231PS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB231PS_RD_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RD_SAE.Z zmm zmm k zmm
func VFNMSUB231PS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PS_RN_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE zmm zmm k zmm
// VFNMSUB231PS.RN_SAE zmm zmm zmm
func VFNMSUB231PS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB231PS_RN_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RN_SAE.Z zmm zmm k zmm
func VFNMSUB231PS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PS_RU_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE zmm zmm k zmm
// VFNMSUB231PS.RU_SAE zmm zmm zmm
func VFNMSUB231PS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB231PS_RU_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RU_SAE.Z zmm zmm k zmm
func VFNMSUB231PS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PS_RZ_SAE: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE zmm zmm k zmm
// VFNMSUB231PS.RZ_SAE zmm zmm zmm
func VFNMSUB231PS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB231PS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.RZ_SAE.Z zmm zmm k zmm
func VFNMSUB231PS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VFNMSUB231PS_Z: Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231PS.Z m128 xmm k xmm
// VFNMSUB231PS.Z m256 ymm k ymm
// VFNMSUB231PS.Z xmm xmm k xmm
// VFNMSUB231PS.Z ymm ymm k ymm
// VFNMSUB231PS.Z m512 zmm k zmm
// VFNMSUB231PS.Z zmm zmm k zmm
func VFNMSUB231PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VFNMSUB231SD: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SD m64 xmm xmm
// VFNMSUB231SD xmm xmm xmm
// VFNMSUB231SD m64 xmm k xmm
// VFNMSUB231SD xmm xmm k xmm
func VFNMSUB231SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{}, ops)
}
// VFNMSUB231SD_RD_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE xmm xmm k xmm
// VFNMSUB231SD.RD_SAE xmm xmm xmm
func VFNMSUB231SD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB231SD_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RD_SAE.Z xmm xmm k xmm
func VFNMSUB231SD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SD_RN_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE xmm xmm k xmm
// VFNMSUB231SD.RN_SAE xmm xmm xmm
func VFNMSUB231SD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB231SD_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RN_SAE.Z xmm xmm k xmm
func VFNMSUB231SD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SD_RU_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE xmm xmm k xmm
// VFNMSUB231SD.RU_SAE xmm xmm xmm
func VFNMSUB231SD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB231SD_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RU_SAE.Z xmm xmm k xmm
func VFNMSUB231SD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SD_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE xmm xmm k xmm
// VFNMSUB231SD.RZ_SAE xmm xmm xmm
func VFNMSUB231SD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB231SD_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB231SD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SD_Z: Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SD.Z m64 xmm k xmm
// VFNMSUB231SD.Z xmm xmm k xmm
func VFNMSUB231SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFNMSUB231SS: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VFNMSUB231SS m32 xmm xmm
// VFNMSUB231SS xmm xmm xmm
// VFNMSUB231SS m32 xmm k xmm
// VFNMSUB231SS xmm xmm k xmm
func VFNMSUB231SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{}, ops)
}
// VFNMSUB231SS_RD_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE xmm xmm k xmm
// VFNMSUB231SS.RD_SAE xmm xmm xmm
func VFNMSUB231SS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VFNMSUB231SS_RD_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RD_SAE.Z xmm xmm k xmm
func VFNMSUB231SS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SS_RN_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE xmm xmm k xmm
// VFNMSUB231SS.RN_SAE xmm xmm xmm
func VFNMSUB231SS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VFNMSUB231SS_RN_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RN_SAE.Z xmm xmm k xmm
func VFNMSUB231SS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SS_RU_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE xmm xmm k xmm
// VFNMSUB231SS.RU_SAE xmm xmm xmm
func VFNMSUB231SS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VFNMSUB231SS_RU_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RU_SAE.Z xmm xmm k xmm
func VFNMSUB231SS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SS_RZ_SAE: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE xmm xmm k xmm
// VFNMSUB231SS.RZ_SAE xmm xmm xmm
func VFNMSUB231SS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VFNMSUB231SS_RZ_SAE_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.RZ_SAE.Z xmm xmm k xmm
func VFNMSUB231SS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VFNMSUB231SS_Z: Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VFNMSUB231SS.Z m32 xmm k xmm
// VFNMSUB231SS.Z xmm xmm k xmm
func VFNMSUB231SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVFNMSUB231SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VFPCLASSPDX: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDX imm8 m128 k k
// VFPCLASSPDX imm8 m128 k
// VFPCLASSPDX imm8 xmm k k
// VFPCLASSPDX imm8 xmm k
func VFPCLASSPDX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDX.Forms(), sffxs{}, ops)
}
// VFPCLASSPDX_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDX.BCST imm8 m64 k k
// VFPCLASSPDX.BCST imm8 m64 k
func VFPCLASSPDX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDX.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSPDY: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDY imm8 m256 k k
// VFPCLASSPDY imm8 m256 k
// VFPCLASSPDY imm8 ymm k k
// VFPCLASSPDY imm8 ymm k
func VFPCLASSPDY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDY.Forms(), sffxs{}, ops)
}
// VFPCLASSPDY_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDY.BCST imm8 m64 k k
// VFPCLASSPDY.BCST imm8 m64 k
func VFPCLASSPDY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDY.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSPDZ: Test Class of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPDZ imm8 m512 k k
// VFPCLASSPDZ imm8 m512 k
// VFPCLASSPDZ imm8 zmm k k
// VFPCLASSPDZ imm8 zmm k
func VFPCLASSPDZ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDZ.Forms(), sffxs{}, ops)
}
// VFPCLASSPDZ_BCST: Test Class of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPDZ.BCST imm8 m64 k k
// VFPCLASSPDZ.BCST imm8 m64 k
func VFPCLASSPDZ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPDZ.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSPSX: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSX imm8 m128 k k
// VFPCLASSPSX imm8 m128 k
// VFPCLASSPSX imm8 xmm k k
// VFPCLASSPSX imm8 xmm k
func VFPCLASSPSX(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSX.Forms(), sffxs{}, ops)
}
// VFPCLASSPSX_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSX.BCST imm8 m32 k k
// VFPCLASSPSX.BCST imm8 m32 k
func VFPCLASSPSX_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSX.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSPSY: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSY imm8 m256 k k
// VFPCLASSPSY imm8 m256 k
// VFPCLASSPSY imm8 ymm k k
// VFPCLASSPSY imm8 ymm k
func VFPCLASSPSY(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSY.Forms(), sffxs{}, ops)
}
// VFPCLASSPSY_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSY.BCST imm8 m32 k k
// VFPCLASSPSY.BCST imm8 m32 k
func VFPCLASSPSY_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSY.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSPSZ: Test Class of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VFPCLASSPSZ imm8 m512 k k
// VFPCLASSPSZ imm8 m512 k
// VFPCLASSPSZ imm8 zmm k k
// VFPCLASSPSZ imm8 zmm k
func VFPCLASSPSZ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSZ.Forms(), sffxs{}, ops)
}
// VFPCLASSPSZ_BCST: Test Class of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VFPCLASSPSZ.BCST imm8 m32 k k
// VFPCLASSPSZ.BCST imm8 m32 k
func VFPCLASSPSZ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSPSZ.Forms(), sffxs{sffxBCST}, ops)
}
// VFPCLASSSD: Test Class of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSD imm8 m64 k k
// VFPCLASSSD imm8 m64 k
// VFPCLASSSD imm8 xmm k k
// VFPCLASSSD imm8 xmm k
func VFPCLASSSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSSD.Forms(), sffxs{}, ops)
}
// VFPCLASSSS: Test Class of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VFPCLASSSS imm8 m32 k k
// VFPCLASSSS imm8 m32 k
// VFPCLASSSS imm8 xmm k k
// VFPCLASSSS imm8 xmm k
func VFPCLASSSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVFPCLASSSS.Forms(), sffxs{}, ops)
}
// VGATHERDPD: Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPD xmm vm32x xmm
// VGATHERDPD ymm vm32x ymm
// VGATHERDPD vm32x k xmm
// VGATHERDPD vm32x k ymm
// VGATHERDPD vm32y k zmm
func VGATHERDPD(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGATHERDPD.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VGATHERDPS: Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices.
//
// Forms:
//
// VGATHERDPS xmm vm32x xmm
// VGATHERDPS ymm vm32y ymm
// VGATHERDPS vm32x k xmm
// VGATHERDPS vm32y k ymm
// VGATHERDPS vm32z k zmm
func VGATHERDPS(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGATHERDPS.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VGATHERQPD: Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPD xmm vm64x xmm
// VGATHERQPD ymm vm64y ymm
// VGATHERQPD vm64x k xmm
// VGATHERQPD vm64y k ymm
// VGATHERQPD vm64z k zmm
func VGATHERQPD(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGATHERQPD.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VGATHERQPS: Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices.
//
// Forms:
//
// VGATHERQPS xmm vm64x xmm
// VGATHERQPS xmm vm64y xmm
// VGATHERQPS vm64x k xmm
// VGATHERQPS vm64y k xmm
// VGATHERQPS vm64z k ymm
func VGATHERQPS(vx, kv, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVGATHERQPS.Forms(), sffxs{}, []operand.Op{vx, kv, xy})
}
// VGETEXPPD: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPD m128 k xmm
// VGETEXPPD m128 xmm
// VGETEXPPD m256 k ymm
// VGETEXPPD m256 ymm
// VGETEXPPD xmm k xmm
// VGETEXPPD xmm xmm
// VGETEXPPD ymm k ymm
// VGETEXPPD ymm ymm
// VGETEXPPD m512 k zmm
// VGETEXPPD m512 zmm
// VGETEXPPD zmm k zmm
// VGETEXPPD zmm zmm
func VGETEXPPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{}, ops)
}
// VGETEXPPD_BCST: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPD.BCST m64 k xmm
// VGETEXPPD.BCST m64 k ymm
// VGETEXPPD.BCST m64 xmm
// VGETEXPPD.BCST m64 ymm
// VGETEXPPD.BCST m64 k zmm
// VGETEXPPD.BCST m64 zmm
func VGETEXPPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{sffxBCST}, ops)
}
// VGETEXPPD_BCST_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.BCST.Z m64 k xmm
// VGETEXPPD.BCST.Z m64 k ymm
// VGETEXPPD.BCST.Z m64 k zmm
func VGETEXPPD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VGETEXPPD_SAE: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPD.SAE zmm k zmm
// VGETEXPPD.SAE zmm zmm
func VGETEXPPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{sffxSAE}, ops)
}
// VGETEXPPD_SAE_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.SAE.Z zmm k zmm
func VGETEXPPD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VGETEXPPD_Z: Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPD.Z m128 k xmm
// VGETEXPPD.Z m256 k ymm
// VGETEXPPD.Z xmm k xmm
// VGETEXPPD.Z ymm k ymm
// VGETEXPPD.Z m512 k zmm
// VGETEXPPD.Z zmm k zmm
func VGETEXPPD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VGETEXPPS: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETEXPPS m128 k xmm
// VGETEXPPS m128 xmm
// VGETEXPPS m256 k ymm
// VGETEXPPS m256 ymm
// VGETEXPPS xmm k xmm
// VGETEXPPS xmm xmm
// VGETEXPPS ymm k ymm
// VGETEXPPS ymm ymm
// VGETEXPPS m512 k zmm
// VGETEXPPS m512 zmm
// VGETEXPPS zmm k zmm
// VGETEXPPS zmm zmm
func VGETEXPPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{}, ops)
}
// VGETEXPPS_BCST: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETEXPPS.BCST m32 k xmm
// VGETEXPPS.BCST m32 k ymm
// VGETEXPPS.BCST m32 xmm
// VGETEXPPS.BCST m32 ymm
// VGETEXPPS.BCST m32 k zmm
// VGETEXPPS.BCST m32 zmm
func VGETEXPPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{sffxBCST}, ops)
}
// VGETEXPPS_BCST_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.BCST.Z m32 k xmm
// VGETEXPPS.BCST.Z m32 k ymm
// VGETEXPPS.BCST.Z m32 k zmm
func VGETEXPPS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VGETEXPPS_SAE: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPPS.SAE zmm k zmm
// VGETEXPPS.SAE zmm zmm
func VGETEXPPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{sffxSAE}, ops)
}
// VGETEXPPS_SAE_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.SAE.Z zmm k zmm
func VGETEXPPS_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VGETEXPPS_Z: Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETEXPPS.Z m128 k xmm
// VGETEXPPS.Z m256 k ymm
// VGETEXPPS.Z xmm k xmm
// VGETEXPPS.Z ymm k ymm
// VGETEXPPS.Z m512 k zmm
// VGETEXPPS.Z zmm k zmm
func VGETEXPPS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VGETEXPSD: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSD m64 xmm k xmm
// VGETEXPSD m64 xmm xmm
// VGETEXPSD xmm xmm k xmm
// VGETEXPSD xmm xmm xmm
func VGETEXPSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSD.Forms(), sffxs{}, ops)
}
// VGETEXPSD_SAE: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSD.SAE xmm xmm k xmm
// VGETEXPSD.SAE xmm xmm xmm
func VGETEXPSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSD.Forms(), sffxs{sffxSAE}, ops)
}
// VGETEXPSD_SAE_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.SAE.Z xmm xmm k xmm
func VGETEXPSD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VGETEXPSD_Z: Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSD.Z m64 xmm k xmm
// VGETEXPSD.Z xmm xmm k xmm
func VGETEXPSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VGETEXPSS: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETEXPSS m32 xmm k xmm
// VGETEXPSS m32 xmm xmm
// VGETEXPSS xmm xmm k xmm
// VGETEXPSS xmm xmm xmm
func VGETEXPSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSS.Forms(), sffxs{}, ops)
}
// VGETEXPSS_SAE: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETEXPSS.SAE xmm xmm k xmm
// VGETEXPSS.SAE xmm xmm xmm
func VGETEXPSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSS.Forms(), sffxs{sffxSAE}, ops)
}
// VGETEXPSS_SAE_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.SAE.Z xmm xmm k xmm
func VGETEXPSS_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VGETEXPSS_Z: Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETEXPSS.Z m32 xmm k xmm
// VGETEXPSS.Z xmm xmm k xmm
func VGETEXPSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETEXPSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VGETMANTPD: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPD imm8 m128 k xmm
// VGETMANTPD imm8 m128 xmm
// VGETMANTPD imm8 m256 k ymm
// VGETMANTPD imm8 m256 ymm
// VGETMANTPD imm8 xmm k xmm
// VGETMANTPD imm8 xmm xmm
// VGETMANTPD imm8 ymm k ymm
// VGETMANTPD imm8 ymm ymm
// VGETMANTPD imm8 m512 k zmm
// VGETMANTPD imm8 m512 zmm
// VGETMANTPD imm8 zmm k zmm
// VGETMANTPD imm8 zmm zmm
func VGETMANTPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{}, ops)
}
// VGETMANTPD_BCST: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPD.BCST imm8 m64 k xmm
// VGETMANTPD.BCST imm8 m64 k ymm
// VGETMANTPD.BCST imm8 m64 xmm
// VGETMANTPD.BCST imm8 m64 ymm
// VGETMANTPD.BCST imm8 m64 k zmm
// VGETMANTPD.BCST imm8 m64 zmm
func VGETMANTPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{sffxBCST}, ops)
}
// VGETMANTPD_BCST_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.BCST.Z imm8 m64 k xmm
// VGETMANTPD.BCST.Z imm8 m64 k ymm
// VGETMANTPD.BCST.Z imm8 m64 k zmm
func VGETMANTPD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VGETMANTPD_SAE: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPD.SAE imm8 zmm k zmm
// VGETMANTPD.SAE imm8 zmm zmm
func VGETMANTPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{sffxSAE}, ops)
}
// VGETMANTPD_SAE_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.SAE.Z imm8 zmm k zmm
func VGETMANTPD_SAE_Z(i, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, k, z1})
}
// VGETMANTPD_Z: Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPD.Z imm8 m128 k xmm
// VGETMANTPD.Z imm8 m256 k ymm
// VGETMANTPD.Z imm8 xmm k xmm
// VGETMANTPD.Z imm8 ymm k ymm
// VGETMANTPD.Z imm8 m512 k zmm
// VGETMANTPD.Z imm8 zmm k zmm
func VGETMANTPD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VGETMANTPS: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VGETMANTPS imm8 m128 k xmm
// VGETMANTPS imm8 m128 xmm
// VGETMANTPS imm8 m256 k ymm
// VGETMANTPS imm8 m256 ymm
// VGETMANTPS imm8 xmm k xmm
// VGETMANTPS imm8 xmm xmm
// VGETMANTPS imm8 ymm k ymm
// VGETMANTPS imm8 ymm ymm
// VGETMANTPS imm8 m512 k zmm
// VGETMANTPS imm8 m512 zmm
// VGETMANTPS imm8 zmm k zmm
// VGETMANTPS imm8 zmm zmm
func VGETMANTPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{}, ops)
}
// VGETMANTPS_BCST: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VGETMANTPS.BCST imm8 m32 k xmm
// VGETMANTPS.BCST imm8 m32 k ymm
// VGETMANTPS.BCST imm8 m32 xmm
// VGETMANTPS.BCST imm8 m32 ymm
// VGETMANTPS.BCST imm8 m32 k zmm
// VGETMANTPS.BCST imm8 m32 zmm
func VGETMANTPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{sffxBCST}, ops)
}
// VGETMANTPS_BCST_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.BCST.Z imm8 m32 k xmm
// VGETMANTPS.BCST.Z imm8 m32 k ymm
// VGETMANTPS.BCST.Z imm8 m32 k zmm
func VGETMANTPS_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VGETMANTPS_SAE: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTPS.SAE imm8 zmm k zmm
// VGETMANTPS.SAE imm8 zmm zmm
func VGETMANTPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{sffxSAE}, ops)
}
// VGETMANTPS_SAE_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.SAE.Z imm8 zmm k zmm
func VGETMANTPS_SAE_Z(i, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, k, z1})
}
// VGETMANTPS_Z: Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VGETMANTPS.Z imm8 m128 k xmm
// VGETMANTPS.Z imm8 m256 k ymm
// VGETMANTPS.Z imm8 xmm k xmm
// VGETMANTPS.Z imm8 ymm k ymm
// VGETMANTPS.Z imm8 m512 k zmm
// VGETMANTPS.Z imm8 zmm k zmm
func VGETMANTPS_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VGETMANTSD: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSD imm8 m64 xmm k xmm
// VGETMANTSD imm8 m64 xmm xmm
// VGETMANTSD imm8 xmm xmm k xmm
// VGETMANTSD imm8 xmm xmm xmm
func VGETMANTSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSD.Forms(), sffxs{}, ops)
}
// VGETMANTSD_SAE: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSD.SAE imm8 xmm xmm k xmm
// VGETMANTSD.SAE imm8 xmm xmm xmm
func VGETMANTSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSD.Forms(), sffxs{sffxSAE}, ops)
}
// VGETMANTSD_SAE_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.SAE.Z imm8 xmm xmm k xmm
func VGETMANTSD_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VGETMANTSD_Z: Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSD.Z imm8 m64 xmm k xmm
// VGETMANTSD.Z imm8 xmm xmm k xmm
func VGETMANTSD_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSD.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VGETMANTSS: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VGETMANTSS imm8 m32 xmm k xmm
// VGETMANTSS imm8 m32 xmm xmm
// VGETMANTSS imm8 xmm xmm k xmm
// VGETMANTSS imm8 xmm xmm xmm
func VGETMANTSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSS.Forms(), sffxs{}, ops)
}
// VGETMANTSS_SAE: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VGETMANTSS.SAE imm8 xmm xmm k xmm
// VGETMANTSS.SAE imm8 xmm xmm xmm
func VGETMANTSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSS.Forms(), sffxs{sffxSAE}, ops)
}
// VGETMANTSS_SAE_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.SAE.Z imm8 xmm xmm k xmm
func VGETMANTSS_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VGETMANTSS_Z: Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VGETMANTSS.Z imm8 m32 xmm k xmm
// VGETMANTSS.Z imm8 xmm xmm k xmm
func VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVGETMANTSS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VHADDPD: Packed Double-FP Horizontal Add.
//
// Forms:
//
// VHADDPD m128 xmm xmm
// VHADDPD m256 ymm ymm
// VHADDPD xmm xmm xmm
// VHADDPD ymm ymm ymm
func VHADDPD(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVHADDPD.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VHADDPS: Packed Single-FP Horizontal Add.
//
// Forms:
//
// VHADDPS m128 xmm xmm
// VHADDPS m256 ymm ymm
// VHADDPS xmm xmm xmm
// VHADDPS ymm ymm ymm
func VHADDPS(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVHADDPS.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VHSUBPD: Packed Double-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPD m128 xmm xmm
// VHSUBPD m256 ymm ymm
// VHSUBPD xmm xmm xmm
// VHSUBPD ymm ymm ymm
func VHSUBPD(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVHSUBPD.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VHSUBPS: Packed Single-FP Horizontal Subtract.
//
// Forms:
//
// VHSUBPS m128 xmm xmm
// VHSUBPS m256 ymm ymm
// VHSUBPS xmm xmm xmm
// VHSUBPS ymm ymm ymm
func VHSUBPS(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVHSUBPS.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VINSERTF128: Insert Packed Floating-Point Values.
//
// Forms:
//
// VINSERTF128 imm8 m128 ymm ymm
// VINSERTF128 imm8 xmm ymm ymm
func VINSERTF128(i, mx, y, y1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF128.Forms(), sffxs{}, []operand.Op{i, mx, y, y1})
}
// VINSERTF32X4: Insert 128 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X4 imm8 m128 ymm k ymm
// VINSERTF32X4 imm8 m128 ymm ymm
// VINSERTF32X4 imm8 xmm ymm k ymm
// VINSERTF32X4 imm8 xmm ymm ymm
// VINSERTF32X4 imm8 m128 zmm k zmm
// VINSERTF32X4 imm8 m128 zmm zmm
// VINSERTF32X4 imm8 xmm zmm k zmm
// VINSERTF32X4 imm8 xmm zmm zmm
func VINSERTF32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF32X4.Forms(), sffxs{}, ops)
}
// VINSERTF32X4_Z: Insert 128 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X4.Z imm8 m128 ymm k ymm
// VINSERTF32X4.Z imm8 xmm ymm k ymm
// VINSERTF32X4.Z imm8 m128 zmm k zmm
// VINSERTF32X4.Z imm8 xmm zmm k zmm
func VINSERTF32X4_Z(i, mx, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, yz, k, yz1})
}
// VINSERTF32X8: Insert 256 Bits of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF32X8 imm8 m256 zmm k zmm
// VINSERTF32X8 imm8 m256 zmm zmm
// VINSERTF32X8 imm8 ymm zmm k zmm
// VINSERTF32X8 imm8 ymm zmm zmm
func VINSERTF32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF32X8.Forms(), sffxs{}, ops)
}
// VINSERTF32X8_Z: Insert 256 Bits of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF32X8.Z imm8 m256 zmm k zmm
// VINSERTF32X8.Z imm8 ymm zmm k zmm
func VINSERTF32X8_Z(i, my, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF32X8.Forms(), sffxs{sffxZ}, []operand.Op{i, my, z, k, z1})
}
// VINSERTF64X2: Insert 128 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X2 imm8 m128 ymm k ymm
// VINSERTF64X2 imm8 m128 ymm ymm
// VINSERTF64X2 imm8 xmm ymm k ymm
// VINSERTF64X2 imm8 xmm ymm ymm
// VINSERTF64X2 imm8 m128 zmm k zmm
// VINSERTF64X2 imm8 m128 zmm zmm
// VINSERTF64X2 imm8 xmm zmm k zmm
// VINSERTF64X2 imm8 xmm zmm zmm
func VINSERTF64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF64X2.Forms(), sffxs{}, ops)
}
// VINSERTF64X2_Z: Insert 128 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X2.Z imm8 m128 ymm k ymm
// VINSERTF64X2.Z imm8 xmm ymm k ymm
// VINSERTF64X2.Z imm8 m128 zmm k zmm
// VINSERTF64X2.Z imm8 xmm zmm k zmm
func VINSERTF64X2_Z(i, mx, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, yz, k, yz1})
}
// VINSERTF64X4: Insert 256 Bits of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VINSERTF64X4 imm8 m256 zmm k zmm
// VINSERTF64X4 imm8 m256 zmm zmm
// VINSERTF64X4 imm8 ymm zmm k zmm
// VINSERTF64X4 imm8 ymm zmm zmm
func VINSERTF64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF64X4.Forms(), sffxs{}, ops)
}
// VINSERTF64X4_Z: Insert 256 Bits of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VINSERTF64X4.Z imm8 m256 zmm k zmm
// VINSERTF64X4.Z imm8 ymm zmm k zmm
func VINSERTF64X4_Z(i, my, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTF64X4.Forms(), sffxs{sffxZ}, []operand.Op{i, my, z, k, z1})
}
// VINSERTI128: Insert Packed Integer Values.
//
// Forms:
//
// VINSERTI128 imm8 m128 ymm ymm
// VINSERTI128 imm8 xmm ymm ymm
func VINSERTI128(i, mx, y, y1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI128.Forms(), sffxs{}, []operand.Op{i, mx, y, y1})
}
// VINSERTI32X4: Insert 128 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X4 imm8 m128 ymm k ymm
// VINSERTI32X4 imm8 m128 ymm ymm
// VINSERTI32X4 imm8 xmm ymm k ymm
// VINSERTI32X4 imm8 xmm ymm ymm
// VINSERTI32X4 imm8 m128 zmm k zmm
// VINSERTI32X4 imm8 m128 zmm zmm
// VINSERTI32X4 imm8 xmm zmm k zmm
// VINSERTI32X4 imm8 xmm zmm zmm
func VINSERTI32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI32X4.Forms(), sffxs{}, ops)
}
// VINSERTI32X4_Z: Insert 128 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X4.Z imm8 m128 ymm k ymm
// VINSERTI32X4.Z imm8 xmm ymm k ymm
// VINSERTI32X4.Z imm8 m128 zmm k zmm
// VINSERTI32X4.Z imm8 xmm zmm k zmm
func VINSERTI32X4_Z(i, mx, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, yz, k, yz1})
}
// VINSERTI32X8: Insert 256 Bits of Packed Doubleword Integer Values.
//
// Forms:
//
// VINSERTI32X8 imm8 m256 zmm k zmm
// VINSERTI32X8 imm8 m256 zmm zmm
// VINSERTI32X8 imm8 ymm zmm k zmm
// VINSERTI32X8 imm8 ymm zmm zmm
func VINSERTI32X8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI32X8.Forms(), sffxs{}, ops)
}
// VINSERTI32X8_Z: Insert 256 Bits of Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI32X8.Z imm8 m256 zmm k zmm
// VINSERTI32X8.Z imm8 ymm zmm k zmm
func VINSERTI32X8_Z(i, my, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI32X8.Forms(), sffxs{sffxZ}, []operand.Op{i, my, z, k, z1})
}
// VINSERTI64X2: Insert 128 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X2 imm8 m128 ymm k ymm
// VINSERTI64X2 imm8 m128 ymm ymm
// VINSERTI64X2 imm8 xmm ymm k ymm
// VINSERTI64X2 imm8 xmm ymm ymm
// VINSERTI64X2 imm8 m128 zmm k zmm
// VINSERTI64X2 imm8 m128 zmm zmm
// VINSERTI64X2 imm8 xmm zmm k zmm
// VINSERTI64X2 imm8 xmm zmm zmm
func VINSERTI64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI64X2.Forms(), sffxs{}, ops)
}
// VINSERTI64X2_Z: Insert 128 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X2.Z imm8 m128 ymm k ymm
// VINSERTI64X2.Z imm8 xmm ymm k ymm
// VINSERTI64X2.Z imm8 m128 zmm k zmm
// VINSERTI64X2.Z imm8 xmm zmm k zmm
func VINSERTI64X2_Z(i, mx, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, yz, k, yz1})
}
// VINSERTI64X4: Insert 256 Bits of Packed Quadword Integer Values.
//
// Forms:
//
// VINSERTI64X4 imm8 m256 zmm k zmm
// VINSERTI64X4 imm8 m256 zmm zmm
// VINSERTI64X4 imm8 ymm zmm k zmm
// VINSERTI64X4 imm8 ymm zmm zmm
func VINSERTI64X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI64X4.Forms(), sffxs{}, ops)
}
// VINSERTI64X4_Z: Insert 256 Bits of Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VINSERTI64X4.Z imm8 m256 zmm k zmm
// VINSERTI64X4.Z imm8 ymm zmm k zmm
func VINSERTI64X4_Z(i, my, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTI64X4.Forms(), sffxs{sffxZ}, []operand.Op{i, my, z, k, z1})
}
// VINSERTPS: Insert Packed Single Precision Floating-Point Value.
//
// Forms:
//
// VINSERTPS imm8 m32 xmm xmm
// VINSERTPS imm8 xmm xmm xmm
func VINSERTPS(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVINSERTPS.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
}
// VLDDQU: Load Unaligned Integer 128 Bits.
//
// Forms:
//
// VLDDQU m128 xmm
// VLDDQU m256 ymm
func VLDDQU(m, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVLDDQU.Forms(), sffxs{}, []operand.Op{m, xy})
}
// VLDMXCSR: Load MXCSR Register.
//
// Forms:
//
// VLDMXCSR m32
func VLDMXCSR(m operand.Op) (*intrep.Instruction, error) {
return build(opcVLDMXCSR.Forms(), sffxs{}, []operand.Op{m})
}
// VMASKMOVDQU: Store Selected Bytes of Double Quadword.
//
// Forms:
//
// VMASKMOVDQU xmm xmm
func VMASKMOVDQU(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMASKMOVDQU.Forms(), sffxs{}, []operand.Op{x, x1})
}
// VMASKMOVPD: Conditional Move Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPD m128 xmm xmm
// VMASKMOVPD m256 ymm ymm
// VMASKMOVPD xmm xmm m128
// VMASKMOVPD ymm ymm m256
func VMASKMOVPD(mxy, xy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMASKMOVPD.Forms(), sffxs{}, []operand.Op{mxy, xy, mxy1})
}
// VMASKMOVPS: Conditional Move Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMASKMOVPS m128 xmm xmm
// VMASKMOVPS m256 ymm ymm
// VMASKMOVPS xmm xmm m128
// VMASKMOVPS ymm ymm m256
func VMASKMOVPS(mxy, xy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMASKMOVPS.Forms(), sffxs{}, []operand.Op{mxy, xy, mxy1})
}
// VMAXPD: Return Maximum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPD m128 xmm xmm
// VMAXPD m256 ymm ymm
// VMAXPD xmm xmm xmm
// VMAXPD ymm ymm ymm
// VMAXPD m128 xmm k xmm
// VMAXPD m256 ymm k ymm
// VMAXPD xmm xmm k xmm
// VMAXPD ymm ymm k ymm
// VMAXPD m512 zmm k zmm
// VMAXPD m512 zmm zmm
// VMAXPD zmm zmm k zmm
// VMAXPD zmm zmm zmm
func VMAXPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{}, ops)
}
// VMAXPD_BCST: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPD.BCST m64 xmm k xmm
// VMAXPD.BCST m64 xmm xmm
// VMAXPD.BCST m64 ymm k ymm
// VMAXPD.BCST m64 ymm ymm
// VMAXPD.BCST m64 zmm k zmm
// VMAXPD.BCST m64 zmm zmm
func VMAXPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{sffxBCST}, ops)
}
// VMAXPD_BCST_Z: Return Maximum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPD.BCST.Z m64 xmm k xmm
// VMAXPD.BCST.Z m64 ymm k ymm
// VMAXPD.BCST.Z m64 zmm k zmm
func VMAXPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMAXPD_SAE: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPD.SAE zmm zmm k zmm
// VMAXPD.SAE zmm zmm zmm
func VMAXPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{sffxSAE}, ops)
}
// VMAXPD_SAE_Z: Return Maximum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPD.SAE.Z zmm zmm k zmm
func VMAXPD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMAXPD_Z: Return Maximum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPD.Z m128 xmm k xmm
// VMAXPD.Z m256 ymm k ymm
// VMAXPD.Z xmm xmm k xmm
// VMAXPD.Z ymm ymm k ymm
// VMAXPD.Z m512 zmm k zmm
// VMAXPD.Z zmm zmm k zmm
func VMAXPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMAXPS: Return Maximum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMAXPS m128 xmm xmm
// VMAXPS m256 ymm ymm
// VMAXPS xmm xmm xmm
// VMAXPS ymm ymm ymm
// VMAXPS m128 xmm k xmm
// VMAXPS m256 ymm k ymm
// VMAXPS xmm xmm k xmm
// VMAXPS ymm ymm k ymm
// VMAXPS m512 zmm k zmm
// VMAXPS m512 zmm zmm
// VMAXPS zmm zmm k zmm
// VMAXPS zmm zmm zmm
func VMAXPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{}, ops)
}
// VMAXPS_BCST: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMAXPS.BCST m32 xmm k xmm
// VMAXPS.BCST m32 xmm xmm
// VMAXPS.BCST m32 ymm k ymm
// VMAXPS.BCST m32 ymm ymm
// VMAXPS.BCST m32 zmm k zmm
// VMAXPS.BCST m32 zmm zmm
func VMAXPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{sffxBCST}, ops)
}
// VMAXPS_BCST_Z: Return Maximum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMAXPS.BCST.Z m32 xmm k xmm
// VMAXPS.BCST.Z m32 ymm k ymm
// VMAXPS.BCST.Z m32 zmm k zmm
func VMAXPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMAXPS_SAE: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMAXPS.SAE zmm zmm k zmm
// VMAXPS.SAE zmm zmm zmm
func VMAXPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{sffxSAE}, ops)
}
// VMAXPS_SAE_Z: Return Maximum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXPS.SAE.Z zmm zmm k zmm
func VMAXPS_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMAXPS_Z: Return Maximum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMAXPS.Z m128 xmm k xmm
// VMAXPS.Z m256 ymm k ymm
// VMAXPS.Z xmm xmm k xmm
// VMAXPS.Z ymm ymm k ymm
// VMAXPS.Z m512 zmm k zmm
// VMAXPS.Z zmm zmm k zmm
func VMAXPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMAXSD: Return Maximum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSD m64 xmm xmm
// VMAXSD xmm xmm xmm
// VMAXSD m64 xmm k xmm
// VMAXSD xmm xmm k xmm
func VMAXSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSD.Forms(), sffxs{}, ops)
}
// VMAXSD_SAE: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSD.SAE xmm xmm k xmm
// VMAXSD.SAE xmm xmm xmm
func VMAXSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSD.Forms(), sffxs{sffxSAE}, ops)
}
// VMAXSD_SAE_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSD.SAE.Z xmm xmm k xmm
func VMAXSD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMAXSD_Z: Return Maximum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSD.Z m64 xmm k xmm
// VMAXSD.Z xmm xmm k xmm
func VMAXSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VMAXSS: Return Maximum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMAXSS m32 xmm xmm
// VMAXSS xmm xmm xmm
// VMAXSS m32 xmm k xmm
// VMAXSS xmm xmm k xmm
func VMAXSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSS.Forms(), sffxs{}, ops)
}
// VMAXSS_SAE: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMAXSS.SAE xmm xmm k xmm
// VMAXSS.SAE xmm xmm xmm
func VMAXSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSS.Forms(), sffxs{sffxSAE}, ops)
}
// VMAXSS_SAE_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMAXSS.SAE.Z xmm xmm k xmm
func VMAXSS_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMAXSS_Z: Return Maximum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMAXSS.Z m32 xmm k xmm
// VMAXSS.Z xmm xmm k xmm
func VMAXSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMAXSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VMINPD: Return Minimum Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMINPD m128 xmm xmm
// VMINPD m256 ymm ymm
// VMINPD xmm xmm xmm
// VMINPD ymm ymm ymm
// VMINPD m128 xmm k xmm
// VMINPD m256 ymm k ymm
// VMINPD xmm xmm k xmm
// VMINPD ymm ymm k ymm
// VMINPD m512 zmm k zmm
// VMINPD m512 zmm zmm
// VMINPD zmm zmm k zmm
// VMINPD zmm zmm zmm
func VMINPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{}, ops)
}
// VMINPD_BCST: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPD.BCST m64 xmm k xmm
// VMINPD.BCST m64 xmm xmm
// VMINPD.BCST m64 ymm k ymm
// VMINPD.BCST m64 ymm ymm
// VMINPD.BCST m64 zmm k zmm
// VMINPD.BCST m64 zmm zmm
func VMINPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{sffxBCST}, ops)
}
// VMINPD_BCST_Z: Return Minimum Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPD.BCST.Z m64 xmm k xmm
// VMINPD.BCST.Z m64 ymm k ymm
// VMINPD.BCST.Z m64 zmm k zmm
func VMINPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMINPD_SAE: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPD.SAE zmm zmm k zmm
// VMINPD.SAE zmm zmm zmm
func VMINPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{sffxSAE}, ops)
}
// VMINPD_SAE_Z: Return Minimum Packed Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPD.SAE.Z zmm zmm k zmm
func VMINPD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMINPD_Z: Return Minimum Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPD.Z m128 xmm k xmm
// VMINPD.Z m256 ymm k ymm
// VMINPD.Z xmm xmm k xmm
// VMINPD.Z ymm ymm k ymm
// VMINPD.Z m512 zmm k zmm
// VMINPD.Z zmm zmm k zmm
func VMINPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMINPS: Return Minimum Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMINPS m128 xmm xmm
// VMINPS m256 ymm ymm
// VMINPS xmm xmm xmm
// VMINPS ymm ymm ymm
// VMINPS m128 xmm k xmm
// VMINPS m256 ymm k ymm
// VMINPS xmm xmm k xmm
// VMINPS ymm ymm k ymm
// VMINPS m512 zmm k zmm
// VMINPS m512 zmm zmm
// VMINPS zmm zmm k zmm
// VMINPS zmm zmm zmm
func VMINPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{}, ops)
}
// VMINPS_BCST: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMINPS.BCST m32 xmm k xmm
// VMINPS.BCST m32 xmm xmm
// VMINPS.BCST m32 ymm k ymm
// VMINPS.BCST m32 ymm ymm
// VMINPS.BCST m32 zmm k zmm
// VMINPS.BCST m32 zmm zmm
func VMINPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{sffxBCST}, ops)
}
// VMINPS_BCST_Z: Return Minimum Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMINPS.BCST.Z m32 xmm k xmm
// VMINPS.BCST.Z m32 ymm k ymm
// VMINPS.BCST.Z m32 zmm k zmm
func VMINPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMINPS_SAE: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VMINPS.SAE zmm zmm k zmm
// VMINPS.SAE zmm zmm zmm
func VMINPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{sffxSAE}, ops)
}
// VMINPS_SAE_Z: Return Minimum Packed Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINPS.SAE.Z zmm zmm k zmm
func VMINPS_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMINPS_Z: Return Minimum Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMINPS.Z m128 xmm k xmm
// VMINPS.Z m256 ymm k ymm
// VMINPS.Z xmm xmm k xmm
// VMINPS.Z ymm ymm k ymm
// VMINPS.Z m512 zmm k zmm
// VMINPS.Z zmm zmm k zmm
func VMINPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMINSD: Return Minimum Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMINSD m64 xmm xmm
// VMINSD xmm xmm xmm
// VMINSD m64 xmm k xmm
// VMINSD xmm xmm k xmm
func VMINSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSD.Forms(), sffxs{}, ops)
}
// VMINSD_SAE: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSD.SAE xmm xmm k xmm
// VMINSD.SAE xmm xmm xmm
func VMINSD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSD.Forms(), sffxs{sffxSAE}, ops)
}
// VMINSD_SAE_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSD.SAE.Z xmm xmm k xmm
func VMINSD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMINSD_Z: Return Minimum Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSD.Z m64 xmm k xmm
// VMINSD.Z xmm xmm k xmm
func VMINSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VMINSS: Return Minimum Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VMINSS m32 xmm xmm
// VMINSS xmm xmm xmm
// VMINSS m32 xmm k xmm
// VMINSS xmm xmm k xmm
func VMINSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSS.Forms(), sffxs{}, ops)
}
// VMINSS_SAE: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions).
//
// Forms:
//
// VMINSS.SAE xmm xmm k xmm
// VMINSS.SAE xmm xmm xmm
func VMINSS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSS.Forms(), sffxs{sffxSAE}, ops)
}
// VMINSS_SAE_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VMINSS.SAE.Z xmm xmm k xmm
func VMINSS_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMINSS_Z: Return Minimum Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMINSS.Z m32 xmm k xmm
// VMINSS.Z xmm xmm k xmm
func VMINSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMINSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VMOVAPD: Move Aligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPD m128 xmm
// VMOVAPD m256 ymm
// VMOVAPD xmm m128
// VMOVAPD xmm xmm
// VMOVAPD ymm m256
// VMOVAPD ymm ymm
// VMOVAPD m128 k xmm
// VMOVAPD m256 k ymm
// VMOVAPD xmm k m128
// VMOVAPD xmm k xmm
// VMOVAPD ymm k m256
// VMOVAPD ymm k ymm
// VMOVAPD m512 k zmm
// VMOVAPD m512 zmm
// VMOVAPD zmm k m512
// VMOVAPD zmm k zmm
// VMOVAPD zmm m512
// VMOVAPD zmm zmm
func VMOVAPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVAPD.Forms(), sffxs{}, ops)
}
// VMOVAPD_Z: Move Aligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPD.Z m128 k xmm
// VMOVAPD.Z m256 k ymm
// VMOVAPD.Z xmm k m128
// VMOVAPD.Z xmm k xmm
// VMOVAPD.Z ymm k m256
// VMOVAPD.Z ymm k ymm
// VMOVAPD.Z m512 k zmm
// VMOVAPD.Z zmm k m512
// VMOVAPD.Z zmm k zmm
func VMOVAPD_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVAPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVAPS: Move Aligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVAPS m128 xmm
// VMOVAPS m256 ymm
// VMOVAPS xmm m128
// VMOVAPS xmm xmm
// VMOVAPS ymm m256
// VMOVAPS ymm ymm
// VMOVAPS m128 k xmm
// VMOVAPS m256 k ymm
// VMOVAPS xmm k m128
// VMOVAPS xmm k xmm
// VMOVAPS ymm k m256
// VMOVAPS ymm k ymm
// VMOVAPS m512 k zmm
// VMOVAPS m512 zmm
// VMOVAPS zmm k m512
// VMOVAPS zmm k zmm
// VMOVAPS zmm m512
// VMOVAPS zmm zmm
func VMOVAPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVAPS.Forms(), sffxs{}, ops)
}
// VMOVAPS_Z: Move Aligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVAPS.Z m128 k xmm
// VMOVAPS.Z m256 k ymm
// VMOVAPS.Z xmm k m128
// VMOVAPS.Z xmm k xmm
// VMOVAPS.Z ymm k m256
// VMOVAPS.Z ymm k ymm
// VMOVAPS.Z m512 k zmm
// VMOVAPS.Z zmm k m512
// VMOVAPS.Z zmm k zmm
func VMOVAPS_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVAPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVD: Move Doubleword.
//
// Forms:
//
// VMOVD m32 xmm
// VMOVD r32 xmm
// VMOVD xmm m32
// VMOVD xmm r32
func VMOVD(mrx, mrx1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVD.Forms(), sffxs{}, []operand.Op{mrx, mrx1})
}
// VMOVDDUP: Move One Double-FP and Duplicate.
//
// Forms:
//
// VMOVDDUP m256 ymm
// VMOVDDUP m64 xmm
// VMOVDDUP xmm xmm
// VMOVDDUP ymm ymm
// VMOVDDUP m256 k ymm
// VMOVDDUP m64 k xmm
// VMOVDDUP xmm k xmm
// VMOVDDUP ymm k ymm
// VMOVDDUP m512 k zmm
// VMOVDDUP m512 zmm
// VMOVDDUP zmm k zmm
// VMOVDDUP zmm zmm
func VMOVDDUP(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDDUP.Forms(), sffxs{}, ops)
}
// VMOVDDUP_Z: Move One Double-FP and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVDDUP.Z m256 k ymm
// VMOVDDUP.Z m64 k xmm
// VMOVDDUP.Z xmm k xmm
// VMOVDDUP.Z ymm k ymm
// VMOVDDUP.Z m512 k zmm
// VMOVDDUP.Z zmm k zmm
func VMOVDDUP_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDDUP.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VMOVDQA: Move Aligned Double Quadword.
//
// Forms:
//
// VMOVDQA m128 xmm
// VMOVDQA m256 ymm
// VMOVDQA xmm m128
// VMOVDQA xmm xmm
// VMOVDQA ymm m256
// VMOVDQA ymm ymm
func VMOVDQA(mxy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQA.Forms(), sffxs{}, []operand.Op{mxy, mxy1})
}
// VMOVDQA32: Move Aligned Doubleword Values.
//
// Forms:
//
// VMOVDQA32 m128 k xmm
// VMOVDQA32 m128 xmm
// VMOVDQA32 m256 k ymm
// VMOVDQA32 m256 ymm
// VMOVDQA32 xmm k m128
// VMOVDQA32 xmm k xmm
// VMOVDQA32 xmm m128
// VMOVDQA32 xmm xmm
// VMOVDQA32 ymm k m256
// VMOVDQA32 ymm k ymm
// VMOVDQA32 ymm m256
// VMOVDQA32 ymm ymm
// VMOVDQA32 m512 k zmm
// VMOVDQA32 m512 zmm
// VMOVDQA32 zmm k m512
// VMOVDQA32 zmm k zmm
// VMOVDQA32 zmm m512
// VMOVDQA32 zmm zmm
func VMOVDQA32(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQA32.Forms(), sffxs{}, ops)
}
// VMOVDQA32_Z: Move Aligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA32.Z m128 k xmm
// VMOVDQA32.Z m256 k ymm
// VMOVDQA32.Z xmm k m128
// VMOVDQA32.Z xmm k xmm
// VMOVDQA32.Z ymm k m256
// VMOVDQA32.Z ymm k ymm
// VMOVDQA32.Z m512 k zmm
// VMOVDQA32.Z zmm k m512
// VMOVDQA32.Z zmm k zmm
func VMOVDQA32_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQA32.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVDQA64: Move Aligned Quadword Values.
//
// Forms:
//
// VMOVDQA64 m128 k xmm
// VMOVDQA64 m128 xmm
// VMOVDQA64 m256 k ymm
// VMOVDQA64 m256 ymm
// VMOVDQA64 xmm k m128
// VMOVDQA64 xmm k xmm
// VMOVDQA64 xmm m128
// VMOVDQA64 xmm xmm
// VMOVDQA64 ymm k m256
// VMOVDQA64 ymm k ymm
// VMOVDQA64 ymm m256
// VMOVDQA64 ymm ymm
// VMOVDQA64 m512 k zmm
// VMOVDQA64 m512 zmm
// VMOVDQA64 zmm k m512
// VMOVDQA64 zmm k zmm
// VMOVDQA64 zmm m512
// VMOVDQA64 zmm zmm
func VMOVDQA64(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQA64.Forms(), sffxs{}, ops)
}
// VMOVDQA64_Z: Move Aligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQA64.Z m128 k xmm
// VMOVDQA64.Z m256 k ymm
// VMOVDQA64.Z xmm k m128
// VMOVDQA64.Z xmm k xmm
// VMOVDQA64.Z ymm k m256
// VMOVDQA64.Z ymm k ymm
// VMOVDQA64.Z m512 k zmm
// VMOVDQA64.Z zmm k m512
// VMOVDQA64.Z zmm k zmm
func VMOVDQA64_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQA64.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVDQU: Move Unaligned Double Quadword.
//
// Forms:
//
// VMOVDQU m128 xmm
// VMOVDQU m256 ymm
// VMOVDQU xmm m128
// VMOVDQU xmm xmm
// VMOVDQU ymm m256
// VMOVDQU ymm ymm
func VMOVDQU(mxy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU.Forms(), sffxs{}, []operand.Op{mxy, mxy1})
}
// VMOVDQU16: Move Unaligned Word Values.
//
// Forms:
//
// VMOVDQU16 m128 k xmm
// VMOVDQU16 m128 xmm
// VMOVDQU16 m256 k ymm
// VMOVDQU16 m256 ymm
// VMOVDQU16 xmm k m128
// VMOVDQU16 xmm k xmm
// VMOVDQU16 xmm m128
// VMOVDQU16 xmm xmm
// VMOVDQU16 ymm k m256
// VMOVDQU16 ymm k ymm
// VMOVDQU16 ymm m256
// VMOVDQU16 ymm ymm
// VMOVDQU16 m512 k zmm
// VMOVDQU16 m512 zmm
// VMOVDQU16 zmm k m512
// VMOVDQU16 zmm k zmm
// VMOVDQU16 zmm m512
// VMOVDQU16 zmm zmm
func VMOVDQU16(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU16.Forms(), sffxs{}, ops)
}
// VMOVDQU16_Z: Move Unaligned Word Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU16.Z m128 k xmm
// VMOVDQU16.Z m256 k ymm
// VMOVDQU16.Z xmm k m128
// VMOVDQU16.Z xmm k xmm
// VMOVDQU16.Z ymm k m256
// VMOVDQU16.Z ymm k ymm
// VMOVDQU16.Z m512 k zmm
// VMOVDQU16.Z zmm k m512
// VMOVDQU16.Z zmm k zmm
func VMOVDQU16_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU16.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVDQU32: Move Unaligned Doubleword Values.
//
// Forms:
//
// VMOVDQU32 m128 k xmm
// VMOVDQU32 m128 xmm
// VMOVDQU32 m256 k ymm
// VMOVDQU32 m256 ymm
// VMOVDQU32 xmm k m128
// VMOVDQU32 xmm k xmm
// VMOVDQU32 xmm m128
// VMOVDQU32 xmm xmm
// VMOVDQU32 ymm k m256
// VMOVDQU32 ymm k ymm
// VMOVDQU32 ymm m256
// VMOVDQU32 ymm ymm
// VMOVDQU32 m512 k zmm
// VMOVDQU32 m512 zmm
// VMOVDQU32 zmm k m512
// VMOVDQU32 zmm k zmm
// VMOVDQU32 zmm m512
// VMOVDQU32 zmm zmm
func VMOVDQU32(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU32.Forms(), sffxs{}, ops)
}
// VMOVDQU32_Z: Move Unaligned Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU32.Z m128 k xmm
// VMOVDQU32.Z m256 k ymm
// VMOVDQU32.Z xmm k m128
// VMOVDQU32.Z xmm k xmm
// VMOVDQU32.Z ymm k m256
// VMOVDQU32.Z ymm k ymm
// VMOVDQU32.Z m512 k zmm
// VMOVDQU32.Z zmm k m512
// VMOVDQU32.Z zmm k zmm
func VMOVDQU32_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU32.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVDQU64: Move Unaligned Quadword Values.
//
// Forms:
//
// VMOVDQU64 m128 k xmm
// VMOVDQU64 m128 xmm
// VMOVDQU64 m256 k ymm
// VMOVDQU64 m256 ymm
// VMOVDQU64 xmm k m128
// VMOVDQU64 xmm k xmm
// VMOVDQU64 xmm m128
// VMOVDQU64 xmm xmm
// VMOVDQU64 ymm k m256
// VMOVDQU64 ymm k ymm
// VMOVDQU64 ymm m256
// VMOVDQU64 ymm ymm
// VMOVDQU64 m512 k zmm
// VMOVDQU64 m512 zmm
// VMOVDQU64 zmm k m512
// VMOVDQU64 zmm k zmm
// VMOVDQU64 zmm m512
// VMOVDQU64 zmm zmm
func VMOVDQU64(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU64.Forms(), sffxs{}, ops)
}
// VMOVDQU64_Z: Move Unaligned Quadword Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU64.Z m128 k xmm
// VMOVDQU64.Z m256 k ymm
// VMOVDQU64.Z xmm k m128
// VMOVDQU64.Z xmm k xmm
// VMOVDQU64.Z ymm k m256
// VMOVDQU64.Z ymm k ymm
// VMOVDQU64.Z m512 k zmm
// VMOVDQU64.Z zmm k m512
// VMOVDQU64.Z zmm k zmm
func VMOVDQU64_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU64.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVDQU8: Move Unaligned Byte Values.
//
// Forms:
//
// VMOVDQU8 m128 k xmm
// VMOVDQU8 m128 xmm
// VMOVDQU8 m256 k ymm
// VMOVDQU8 m256 ymm
// VMOVDQU8 xmm k m128
// VMOVDQU8 xmm k xmm
// VMOVDQU8 xmm m128
// VMOVDQU8 xmm xmm
// VMOVDQU8 ymm k m256
// VMOVDQU8 ymm k ymm
// VMOVDQU8 ymm m256
// VMOVDQU8 ymm ymm
// VMOVDQU8 m512 k zmm
// VMOVDQU8 m512 zmm
// VMOVDQU8 zmm k m512
// VMOVDQU8 zmm k zmm
// VMOVDQU8 zmm m512
// VMOVDQU8 zmm zmm
func VMOVDQU8(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU8.Forms(), sffxs{}, ops)
}
// VMOVDQU8_Z: Move Unaligned Byte Values (Zeroing Masking).
//
// Forms:
//
// VMOVDQU8.Z m128 k xmm
// VMOVDQU8.Z m256 k ymm
// VMOVDQU8.Z xmm k m128
// VMOVDQU8.Z xmm k xmm
// VMOVDQU8.Z ymm k m256
// VMOVDQU8.Z ymm k ymm
// VMOVDQU8.Z m512 k zmm
// VMOVDQU8.Z zmm k m512
// VMOVDQU8.Z zmm k zmm
func VMOVDQU8_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVDQU8.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVHLPS: Move Packed Single-Precision Floating-Point Values High to Low.
//
// Forms:
//
// VMOVHLPS xmm xmm xmm
func VMOVHLPS(x, x1, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVHLPS.Forms(), sffxs{}, []operand.Op{x, x1, x2})
}
// VMOVHPD: Move High Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVHPD m64 xmm xmm
// VMOVHPD xmm m64
func VMOVHPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVHPD.Forms(), sffxs{}, ops)
}
// VMOVHPS: Move High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVHPS m64 xmm xmm
// VMOVHPS xmm m64
func VMOVHPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVHPS.Forms(), sffxs{}, ops)
}
// VMOVLHPS: Move Packed Single-Precision Floating-Point Values Low to High.
//
// Forms:
//
// VMOVLHPS xmm xmm xmm
func VMOVLHPS(x, x1, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVLHPS.Forms(), sffxs{}, []operand.Op{x, x1, x2})
}
// VMOVLPD: Move Low Packed Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVLPD m64 xmm xmm
// VMOVLPD xmm m64
func VMOVLPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVLPD.Forms(), sffxs{}, ops)
}
// VMOVLPS: Move Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVLPS m64 xmm xmm
// VMOVLPS xmm m64
func VMOVLPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVLPS.Forms(), sffxs{}, ops)
}
// VMOVMSKPD: Extract Packed Double-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPD xmm r32
// VMOVMSKPD ymm r32
func VMOVMSKPD(xy, r operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVMSKPD.Forms(), sffxs{}, []operand.Op{xy, r})
}
// VMOVMSKPS: Extract Packed Single-Precision Floating-Point Sign Mask.
//
// Forms:
//
// VMOVMSKPS xmm r32
// VMOVMSKPS ymm r32
func VMOVMSKPS(xy, r operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVMSKPS.Forms(), sffxs{}, []operand.Op{xy, r})
}
// VMOVNTDQ: Store Double Quadword Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTDQ xmm m128
// VMOVNTDQ ymm m256
// VMOVNTDQ zmm m512
func VMOVNTDQ(xyz, m operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVNTDQ.Forms(), sffxs{}, []operand.Op{xyz, m})
}
// VMOVNTDQA: Load Double Quadword Non-Temporal Aligned Hint.
//
// Forms:
//
// VMOVNTDQA m256 ymm
// VMOVNTDQA m128 xmm
// VMOVNTDQA m512 zmm
func VMOVNTDQA(m, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVNTDQA.Forms(), sffxs{}, []operand.Op{m, xyz})
}
// VMOVNTPD: Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPD xmm m128
// VMOVNTPD ymm m256
// VMOVNTPD zmm m512
func VMOVNTPD(xyz, m operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVNTPD.Forms(), sffxs{}, []operand.Op{xyz, m})
}
// VMOVNTPS: Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint.
//
// Forms:
//
// VMOVNTPS xmm m128
// VMOVNTPS ymm m256
// VMOVNTPS zmm m512
func VMOVNTPS(xyz, m operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVNTPS.Forms(), sffxs{}, []operand.Op{xyz, m})
}
// VMOVQ: Move Quadword.
//
// Forms:
//
// VMOVQ m64 xmm
// VMOVQ r64 xmm
// VMOVQ xmm m64
// VMOVQ xmm r64
// VMOVQ xmm xmm
func VMOVQ(mrx, mrx1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVQ.Forms(), sffxs{}, []operand.Op{mrx, mrx1})
}
// VMOVSD: Move Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VMOVSD m64 xmm
// VMOVSD xmm m64
// VMOVSD xmm xmm xmm
// VMOVSD m64 k xmm
// VMOVSD xmm k m64
// VMOVSD xmm xmm k xmm
func VMOVSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSD.Forms(), sffxs{}, ops)
}
// VMOVSD_Z: Move Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VMOVSD.Z m64 k xmm
// VMOVSD.Z xmm xmm k xmm
func VMOVSD_Z(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSD.Forms(), sffxs{sffxZ}, ops)
}
// VMOVSHDUP: Move Packed Single-FP High and Duplicate.
//
// Forms:
//
// VMOVSHDUP m128 xmm
// VMOVSHDUP m256 ymm
// VMOVSHDUP xmm xmm
// VMOVSHDUP ymm ymm
// VMOVSHDUP m128 k xmm
// VMOVSHDUP m256 k ymm
// VMOVSHDUP xmm k xmm
// VMOVSHDUP ymm k ymm
// VMOVSHDUP m512 k zmm
// VMOVSHDUP m512 zmm
// VMOVSHDUP zmm k zmm
// VMOVSHDUP zmm zmm
func VMOVSHDUP(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSHDUP.Forms(), sffxs{}, ops)
}
// VMOVSHDUP_Z: Move Packed Single-FP High and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSHDUP.Z m128 k xmm
// VMOVSHDUP.Z m256 k ymm
// VMOVSHDUP.Z xmm k xmm
// VMOVSHDUP.Z ymm k ymm
// VMOVSHDUP.Z m512 k zmm
// VMOVSHDUP.Z zmm k zmm
func VMOVSHDUP_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSHDUP.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VMOVSLDUP: Move Packed Single-FP Low and Duplicate.
//
// Forms:
//
// VMOVSLDUP m128 xmm
// VMOVSLDUP m256 ymm
// VMOVSLDUP xmm xmm
// VMOVSLDUP ymm ymm
// VMOVSLDUP m128 k xmm
// VMOVSLDUP m256 k ymm
// VMOVSLDUP xmm k xmm
// VMOVSLDUP ymm k ymm
// VMOVSLDUP m512 k zmm
// VMOVSLDUP m512 zmm
// VMOVSLDUP zmm k zmm
// VMOVSLDUP zmm zmm
func VMOVSLDUP(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSLDUP.Forms(), sffxs{}, ops)
}
// VMOVSLDUP_Z: Move Packed Single-FP Low and Duplicate (Zeroing Masking).
//
// Forms:
//
// VMOVSLDUP.Z m128 k xmm
// VMOVSLDUP.Z m256 k ymm
// VMOVSLDUP.Z xmm k xmm
// VMOVSLDUP.Z ymm k ymm
// VMOVSLDUP.Z m512 k zmm
// VMOVSLDUP.Z zmm k zmm
func VMOVSLDUP_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSLDUP.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VMOVSS: Move Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVSS m32 xmm
// VMOVSS xmm m32
// VMOVSS xmm xmm xmm
// VMOVSS m32 k xmm
// VMOVSS xmm k m32
// VMOVSS xmm xmm k xmm
func VMOVSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSS.Forms(), sffxs{}, ops)
}
// VMOVSS_Z: Move Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVSS.Z m32 k xmm
// VMOVSS.Z xmm xmm k xmm
func VMOVSS_Z(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVSS.Forms(), sffxs{sffxZ}, ops)
}
// VMOVUPD: Move Unaligned Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPD m128 xmm
// VMOVUPD m256 ymm
// VMOVUPD xmm m128
// VMOVUPD xmm xmm
// VMOVUPD ymm m256
// VMOVUPD ymm ymm
// VMOVUPD m128 k xmm
// VMOVUPD m256 k ymm
// VMOVUPD xmm k m128
// VMOVUPD xmm k xmm
// VMOVUPD ymm k m256
// VMOVUPD ymm k ymm
// VMOVUPD m512 k zmm
// VMOVUPD m512 zmm
// VMOVUPD zmm k m512
// VMOVUPD zmm k zmm
// VMOVUPD zmm m512
// VMOVUPD zmm zmm
func VMOVUPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVUPD.Forms(), sffxs{}, ops)
}
// VMOVUPD_Z: Move Unaligned Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPD.Z m128 k xmm
// VMOVUPD.Z m256 k ymm
// VMOVUPD.Z xmm k m128
// VMOVUPD.Z xmm k xmm
// VMOVUPD.Z ymm k m256
// VMOVUPD.Z ymm k ymm
// VMOVUPD.Z m512 k zmm
// VMOVUPD.Z zmm k m512
// VMOVUPD.Z zmm k zmm
func VMOVUPD_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVUPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMOVUPS: Move Unaligned Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMOVUPS m128 xmm
// VMOVUPS m256 ymm
// VMOVUPS xmm m128
// VMOVUPS xmm xmm
// VMOVUPS ymm m256
// VMOVUPS ymm ymm
// VMOVUPS m128 k xmm
// VMOVUPS m256 k ymm
// VMOVUPS xmm k m128
// VMOVUPS xmm k xmm
// VMOVUPS ymm k m256
// VMOVUPS ymm k ymm
// VMOVUPS m512 k zmm
// VMOVUPS m512 zmm
// VMOVUPS zmm k m512
// VMOVUPS zmm k zmm
// VMOVUPS zmm m512
// VMOVUPS zmm zmm
func VMOVUPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVUPS.Forms(), sffxs{}, ops)
}
// VMOVUPS_Z: Move Unaligned Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMOVUPS.Z m128 k xmm
// VMOVUPS.Z m256 k ymm
// VMOVUPS.Z xmm k m128
// VMOVUPS.Z xmm k xmm
// VMOVUPS.Z ymm k m256
// VMOVUPS.Z ymm k ymm
// VMOVUPS.Z m512 k zmm
// VMOVUPS.Z zmm k m512
// VMOVUPS.Z zmm k zmm
func VMOVUPS_Z(mxyz, k, mxyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMOVUPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, mxyz1})
}
// VMPSADBW: Compute Multiple Packed Sums of Absolute Difference.
//
// Forms:
//
// VMPSADBW imm8 m256 ymm ymm
// VMPSADBW imm8 ymm ymm ymm
// VMPSADBW imm8 m128 xmm xmm
// VMPSADBW imm8 xmm xmm xmm
func VMPSADBW(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMPSADBW.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VMULPD: Multiply Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULPD m128 xmm xmm
// VMULPD m256 ymm ymm
// VMULPD xmm xmm xmm
// VMULPD ymm ymm ymm
// VMULPD m128 xmm k xmm
// VMULPD m256 ymm k ymm
// VMULPD xmm xmm k xmm
// VMULPD ymm ymm k ymm
// VMULPD m512 zmm k zmm
// VMULPD m512 zmm zmm
// VMULPD zmm zmm k zmm
// VMULPD zmm zmm zmm
func VMULPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{}, ops)
}
// VMULPD_BCST: Multiply Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPD.BCST m64 xmm k xmm
// VMULPD.BCST m64 xmm xmm
// VMULPD.BCST m64 ymm k ymm
// VMULPD.BCST m64 ymm ymm
// VMULPD.BCST m64 zmm k zmm
// VMULPD.BCST m64 zmm zmm
func VMULPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxBCST}, ops)
}
// VMULPD_BCST_Z: Multiply Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPD.BCST.Z m64 xmm k xmm
// VMULPD.BCST.Z m64 ymm k ymm
// VMULPD.BCST.Z m64 zmm k zmm
func VMULPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMULPD_RD_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPD.RD_SAE zmm zmm k zmm
// VMULPD.RD_SAE zmm zmm zmm
func VMULPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VMULPD_RD_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RD_SAE.Z zmm zmm k zmm
func VMULPD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPD_RN_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPD.RN_SAE zmm zmm k zmm
// VMULPD.RN_SAE zmm zmm zmm
func VMULPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VMULPD_RN_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPD.RN_SAE.Z zmm zmm k zmm
func VMULPD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPD_RU_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPD.RU_SAE zmm zmm k zmm
// VMULPD.RU_SAE zmm zmm zmm
func VMULPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VMULPD_RU_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPD.RU_SAE.Z zmm zmm k zmm
func VMULPD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPD_RZ_SAE: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPD.RZ_SAE zmm zmm k zmm
// VMULPD.RZ_SAE zmm zmm zmm
func VMULPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VMULPD_RZ_SAE_Z: Multiply Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPD.RZ_SAE.Z zmm zmm k zmm
func VMULPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPD_Z: Multiply Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPD.Z m128 xmm k xmm
// VMULPD.Z m256 ymm k ymm
// VMULPD.Z xmm xmm k xmm
// VMULPD.Z ymm ymm k ymm
// VMULPD.Z m512 zmm k zmm
// VMULPD.Z zmm zmm k zmm
func VMULPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMULPS: Multiply Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULPS m128 xmm xmm
// VMULPS m256 ymm ymm
// VMULPS xmm xmm xmm
// VMULPS ymm ymm ymm
// VMULPS m128 xmm k xmm
// VMULPS m256 ymm k ymm
// VMULPS xmm xmm k xmm
// VMULPS ymm ymm k ymm
// VMULPS m512 zmm k zmm
// VMULPS m512 zmm zmm
// VMULPS zmm zmm k zmm
// VMULPS zmm zmm zmm
func VMULPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{}, ops)
}
// VMULPS_BCST: Multiply Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VMULPS.BCST m32 xmm k xmm
// VMULPS.BCST m32 xmm xmm
// VMULPS.BCST m32 ymm k ymm
// VMULPS.BCST m32 ymm ymm
// VMULPS.BCST m32 zmm k zmm
// VMULPS.BCST m32 zmm zmm
func VMULPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxBCST}, ops)
}
// VMULPS_BCST_Z: Multiply Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VMULPS.BCST.Z m32 xmm k xmm
// VMULPS.BCST.Z m32 ymm k ymm
// VMULPS.BCST.Z m32 zmm k zmm
func VMULPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VMULPS_RD_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULPS.RD_SAE zmm zmm k zmm
// VMULPS.RD_SAE zmm zmm zmm
func VMULPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VMULPS_RD_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RD_SAE.Z zmm zmm k zmm
func VMULPS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPS_RN_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULPS.RN_SAE zmm zmm k zmm
// VMULPS.RN_SAE zmm zmm zmm
func VMULPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VMULPS_RN_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULPS.RN_SAE.Z zmm zmm k zmm
func VMULPS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPS_RU_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULPS.RU_SAE zmm zmm k zmm
// VMULPS.RU_SAE zmm zmm zmm
func VMULPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VMULPS_RU_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULPS.RU_SAE.Z zmm zmm k zmm
func VMULPS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPS_RZ_SAE: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULPS.RZ_SAE zmm zmm k zmm
// VMULPS.RZ_SAE zmm zmm zmm
func VMULPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VMULPS_RZ_SAE_Z: Multiply Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULPS.RZ_SAE.Z zmm zmm k zmm
func VMULPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VMULPS_Z: Multiply Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULPS.Z m128 xmm k xmm
// VMULPS.Z m256 ymm k ymm
// VMULPS.Z xmm xmm k xmm
// VMULPS.Z ymm ymm k ymm
// VMULPS.Z m512 zmm k zmm
// VMULPS.Z zmm zmm k zmm
func VMULPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VMULSD: Multiply Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VMULSD m64 xmm xmm
// VMULSD xmm xmm xmm
// VMULSD m64 xmm k xmm
// VMULSD xmm xmm k xmm
func VMULSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{}, ops)
}
// VMULSD_RD_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSD.RD_SAE xmm xmm k xmm
// VMULSD.RD_SAE xmm xmm xmm
func VMULSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VMULSD_RD_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RD_SAE.Z xmm xmm k xmm
func VMULSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSD_RN_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSD.RN_SAE xmm xmm k xmm
// VMULSD.RN_SAE xmm xmm xmm
func VMULSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VMULSD_RN_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSD.RN_SAE.Z xmm xmm k xmm
func VMULSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSD_RU_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSD.RU_SAE xmm xmm k xmm
// VMULSD.RU_SAE xmm xmm xmm
func VMULSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VMULSD_RU_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSD.RU_SAE.Z xmm xmm k xmm
func VMULSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSD_RZ_SAE: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSD.RZ_SAE xmm xmm k xmm
// VMULSD.RZ_SAE xmm xmm xmm
func VMULSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VMULSD_RZ_SAE_Z: Multiply Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSD.RZ_SAE.Z xmm xmm k xmm
func VMULSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSD_Z: Multiply Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSD.Z m64 xmm k xmm
// VMULSD.Z xmm xmm k xmm
func VMULSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VMULSS: Multiply Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VMULSS m32 xmm xmm
// VMULSS xmm xmm xmm
// VMULSS m32 xmm k xmm
// VMULSS xmm xmm k xmm
func VMULSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{}, ops)
}
// VMULSS_RD_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VMULSS.RD_SAE xmm xmm k xmm
// VMULSS.RD_SAE xmm xmm xmm
func VMULSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VMULSS_RD_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RD_SAE.Z xmm xmm k xmm
func VMULSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSS_RN_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VMULSS.RN_SAE xmm xmm k xmm
// VMULSS.RN_SAE xmm xmm xmm
func VMULSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VMULSS_RN_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VMULSS.RN_SAE.Z xmm xmm k xmm
func VMULSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSS_RU_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VMULSS.RU_SAE xmm xmm k xmm
// VMULSS.RU_SAE xmm xmm xmm
func VMULSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VMULSS_RU_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VMULSS.RU_SAE.Z xmm xmm k xmm
func VMULSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSS_RZ_SAE: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VMULSS.RZ_SAE xmm xmm k xmm
// VMULSS.RZ_SAE xmm xmm xmm
func VMULSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VMULSS_RZ_SAE_Z: Multiply Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VMULSS.RZ_SAE.Z xmm xmm k xmm
func VMULSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VMULSS_Z: Multiply Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VMULSS.Z m32 xmm k xmm
// VMULSS.Z xmm xmm k xmm
func VMULSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVMULSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VORPD: Bitwise Logical OR of Double-Precision Floating-Point Values.
//
// Forms:
//
// VORPD m128 xmm xmm
// VORPD m256 ymm ymm
// VORPD xmm xmm xmm
// VORPD ymm ymm ymm
// VORPD m128 xmm k xmm
// VORPD m256 ymm k ymm
// VORPD xmm xmm k xmm
// VORPD ymm ymm k ymm
// VORPD m512 zmm k zmm
// VORPD m512 zmm zmm
// VORPD zmm zmm k zmm
// VORPD zmm zmm zmm
func VORPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVORPD.Forms(), sffxs{}, ops)
}
// VORPD_BCST: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPD.BCST m64 xmm k xmm
// VORPD.BCST m64 xmm xmm
// VORPD.BCST m64 ymm k ymm
// VORPD.BCST m64 ymm ymm
// VORPD.BCST m64 zmm k zmm
// VORPD.BCST m64 zmm zmm
func VORPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVORPD.Forms(), sffxs{sffxBCST}, ops)
}
// VORPD_BCST_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPD.BCST.Z m64 xmm k xmm
// VORPD.BCST.Z m64 ymm k ymm
// VORPD.BCST.Z m64 zmm k zmm
func VORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVORPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VORPD_Z: Bitwise Logical OR of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPD.Z m128 xmm k xmm
// VORPD.Z m256 ymm k ymm
// VORPD.Z xmm xmm k xmm
// VORPD.Z ymm ymm k ymm
// VORPD.Z m512 zmm k zmm
// VORPD.Z zmm zmm k zmm
func VORPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVORPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VORPS: Bitwise Logical OR of Single-Precision Floating-Point Values.
//
// Forms:
//
// VORPS m128 xmm xmm
// VORPS m256 ymm ymm
// VORPS xmm xmm xmm
// VORPS ymm ymm ymm
// VORPS m128 xmm k xmm
// VORPS m256 ymm k ymm
// VORPS xmm xmm k xmm
// VORPS ymm ymm k ymm
// VORPS m512 zmm k zmm
// VORPS m512 zmm zmm
// VORPS zmm zmm k zmm
// VORPS zmm zmm zmm
func VORPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVORPS.Forms(), sffxs{}, ops)
}
// VORPS_BCST: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VORPS.BCST m32 xmm k xmm
// VORPS.BCST m32 xmm xmm
// VORPS.BCST m32 ymm k ymm
// VORPS.BCST m32 ymm ymm
// VORPS.BCST m32 zmm k zmm
// VORPS.BCST m32 zmm zmm
func VORPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVORPS.Forms(), sffxs{sffxBCST}, ops)
}
// VORPS_BCST_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VORPS.BCST.Z m32 xmm k xmm
// VORPS.BCST.Z m32 ymm k ymm
// VORPS.BCST.Z m32 zmm k zmm
func VORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVORPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VORPS_Z: Bitwise Logical OR of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VORPS.Z m128 xmm k xmm
// VORPS.Z m256 ymm k ymm
// VORPS.Z xmm xmm k xmm
// VORPS.Z ymm ymm k ymm
// VORPS.Z m512 zmm k zmm
// VORPS.Z zmm zmm k zmm
func VORPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVORPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPABSB: Packed Absolute Value of Byte Integers.
//
// Forms:
//
// VPABSB m256 ymm
// VPABSB ymm ymm
// VPABSB m128 xmm
// VPABSB xmm xmm
// VPABSB m128 k xmm
// VPABSB m256 k ymm
// VPABSB xmm k xmm
// VPABSB ymm k ymm
// VPABSB m512 k zmm
// VPABSB m512 zmm
// VPABSB zmm k zmm
// VPABSB zmm zmm
func VPABSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSB.Forms(), sffxs{}, ops)
}
// VPABSB_Z: Packed Absolute Value of Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPABSB.Z m128 k xmm
// VPABSB.Z m256 k ymm
// VPABSB.Z xmm k xmm
// VPABSB.Z ymm k ymm
// VPABSB.Z m512 k zmm
// VPABSB.Z zmm k zmm
func VPABSB_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPABSD: Packed Absolute Value of Doubleword Integers.
//
// Forms:
//
// VPABSD m256 ymm
// VPABSD ymm ymm
// VPABSD m128 xmm
// VPABSD xmm xmm
// VPABSD m128 k xmm
// VPABSD m256 k ymm
// VPABSD xmm k xmm
// VPABSD ymm k ymm
// VPABSD m512 k zmm
// VPABSD m512 zmm
// VPABSD zmm k zmm
// VPABSD zmm zmm
func VPABSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSD.Forms(), sffxs{}, ops)
}
// VPABSD_BCST: Packed Absolute Value of Doubleword Integers (Broadcast).
//
// Forms:
//
// VPABSD.BCST m32 k xmm
// VPABSD.BCST m32 k ymm
// VPABSD.BCST m32 xmm
// VPABSD.BCST m32 ymm
// VPABSD.BCST m32 k zmm
// VPABSD.BCST m32 zmm
func VPABSD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSD.Forms(), sffxs{sffxBCST}, ops)
}
// VPABSD_BCST_Z: Packed Absolute Value of Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSD.BCST.Z m32 k xmm
// VPABSD.BCST.Z m32 k ymm
// VPABSD.BCST.Z m32 k zmm
func VPABSD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPABSD_Z: Packed Absolute Value of Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSD.Z m128 k xmm
// VPABSD.Z m256 k ymm
// VPABSD.Z xmm k xmm
// VPABSD.Z ymm k ymm
// VPABSD.Z m512 k zmm
// VPABSD.Z zmm k zmm
func VPABSD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPABSQ: Packed Absolute Value of Quadword Integers.
//
// Forms:
//
// VPABSQ m128 k xmm
// VPABSQ m128 xmm
// VPABSQ m256 k ymm
// VPABSQ m256 ymm
// VPABSQ xmm k xmm
// VPABSQ xmm xmm
// VPABSQ ymm k ymm
// VPABSQ ymm ymm
// VPABSQ m512 k zmm
// VPABSQ m512 zmm
// VPABSQ zmm k zmm
// VPABSQ zmm zmm
func VPABSQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSQ.Forms(), sffxs{}, ops)
}
// VPABSQ_BCST: Packed Absolute Value of Quadword Integers (Broadcast).
//
// Forms:
//
// VPABSQ.BCST m64 k xmm
// VPABSQ.BCST m64 k ymm
// VPABSQ.BCST m64 xmm
// VPABSQ.BCST m64 ymm
// VPABSQ.BCST m64 k zmm
// VPABSQ.BCST m64 zmm
func VPABSQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPABSQ_BCST_Z: Packed Absolute Value of Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPABSQ.BCST.Z m64 k xmm
// VPABSQ.BCST.Z m64 k ymm
// VPABSQ.BCST.Z m64 k zmm
func VPABSQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPABSQ_Z: Packed Absolute Value of Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPABSQ.Z m128 k xmm
// VPABSQ.Z m256 k ymm
// VPABSQ.Z xmm k xmm
// VPABSQ.Z ymm k ymm
// VPABSQ.Z m512 k zmm
// VPABSQ.Z zmm k zmm
func VPABSQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPABSW: Packed Absolute Value of Word Integers.
//
// Forms:
//
// VPABSW m256 ymm
// VPABSW ymm ymm
// VPABSW m128 xmm
// VPABSW xmm xmm
// VPABSW m128 k xmm
// VPABSW m256 k ymm
// VPABSW xmm k xmm
// VPABSW ymm k ymm
// VPABSW m512 k zmm
// VPABSW m512 zmm
// VPABSW zmm k zmm
// VPABSW zmm zmm
func VPABSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSW.Forms(), sffxs{}, ops)
}
// VPABSW_Z: Packed Absolute Value of Word Integers (Zeroing Masking).
//
// Forms:
//
// VPABSW.Z m128 k xmm
// VPABSW.Z m256 k ymm
// VPABSW.Z xmm k xmm
// VPABSW.Z ymm k ymm
// VPABSW.Z m512 k zmm
// VPABSW.Z zmm k zmm
func VPABSW_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPABSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPACKSSDW: Pack Doublewords into Words with Signed Saturation.
//
// Forms:
//
// VPACKSSDW m256 ymm ymm
// VPACKSSDW ymm ymm ymm
// VPACKSSDW m128 xmm xmm
// VPACKSSDW xmm xmm xmm
// VPACKSSDW m128 xmm k xmm
// VPACKSSDW m256 ymm k ymm
// VPACKSSDW xmm xmm k xmm
// VPACKSSDW ymm ymm k ymm
// VPACKSSDW m512 zmm k zmm
// VPACKSSDW m512 zmm zmm
// VPACKSSDW zmm zmm k zmm
// VPACKSSDW zmm zmm zmm
func VPACKSSDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSDW.Forms(), sffxs{}, ops)
}
// VPACKSSDW_BCST: Pack Doublewords into Words with Signed Saturation (Broadcast).
//
// Forms:
//
// VPACKSSDW.BCST m32 xmm k xmm
// VPACKSSDW.BCST m32 xmm xmm
// VPACKSSDW.BCST m32 ymm k ymm
// VPACKSSDW.BCST m32 ymm ymm
// VPACKSSDW.BCST m32 zmm k zmm
// VPACKSSDW.BCST m32 zmm zmm
func VPACKSSDW_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSDW.Forms(), sffxs{sffxBCST}, ops)
}
// VPACKSSDW_BCST_Z: Pack Doublewords into Words with Signed Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.BCST.Z m32 xmm k xmm
// VPACKSSDW.BCST.Z m32 ymm k ymm
// VPACKSSDW.BCST.Z m32 zmm k zmm
func VPACKSSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSDW.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPACKSSDW_Z: Pack Doublewords into Words with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSDW.Z m128 xmm k xmm
// VPACKSSDW.Z m256 ymm k ymm
// VPACKSSDW.Z xmm xmm k xmm
// VPACKSSDW.Z ymm ymm k ymm
// VPACKSSDW.Z m512 zmm k zmm
// VPACKSSDW.Z zmm zmm k zmm
func VPACKSSDW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSDW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPACKSSWB: Pack Words into Bytes with Signed Saturation.
//
// Forms:
//
// VPACKSSWB m256 ymm ymm
// VPACKSSWB ymm ymm ymm
// VPACKSSWB m128 xmm xmm
// VPACKSSWB xmm xmm xmm
// VPACKSSWB m128 xmm k xmm
// VPACKSSWB m256 ymm k ymm
// VPACKSSWB xmm xmm k xmm
// VPACKSSWB ymm ymm k ymm
// VPACKSSWB m512 zmm k zmm
// VPACKSSWB m512 zmm zmm
// VPACKSSWB zmm zmm k zmm
// VPACKSSWB zmm zmm zmm
func VPACKSSWB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSWB.Forms(), sffxs{}, ops)
}
// VPACKSSWB_Z: Pack Words into Bytes with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKSSWB.Z m128 xmm k xmm
// VPACKSSWB.Z m256 ymm k ymm
// VPACKSSWB.Z xmm xmm k xmm
// VPACKSSWB.Z ymm ymm k ymm
// VPACKSSWB.Z m512 zmm k zmm
// VPACKSSWB.Z zmm zmm k zmm
func VPACKSSWB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKSSWB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPACKUSDW: Pack Doublewords into Words with Unsigned Saturation.
//
// Forms:
//
// VPACKUSDW m256 ymm ymm
// VPACKUSDW ymm ymm ymm
// VPACKUSDW m128 xmm xmm
// VPACKUSDW xmm xmm xmm
// VPACKUSDW m128 xmm k xmm
// VPACKUSDW m256 ymm k ymm
// VPACKUSDW xmm xmm k xmm
// VPACKUSDW ymm ymm k ymm
// VPACKUSDW m512 zmm k zmm
// VPACKUSDW m512 zmm zmm
// VPACKUSDW zmm zmm k zmm
// VPACKUSDW zmm zmm zmm
func VPACKUSDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSDW.Forms(), sffxs{}, ops)
}
// VPACKUSDW_BCST: Pack Doublewords into Words with Unsigned Saturation (Broadcast).
//
// Forms:
//
// VPACKUSDW.BCST m32 xmm k xmm
// VPACKUSDW.BCST m32 xmm xmm
// VPACKUSDW.BCST m32 ymm k ymm
// VPACKUSDW.BCST m32 ymm ymm
// VPACKUSDW.BCST m32 zmm k zmm
// VPACKUSDW.BCST m32 zmm zmm
func VPACKUSDW_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSDW.Forms(), sffxs{sffxBCST}, ops)
}
// VPACKUSDW_BCST_Z: Pack Doublewords into Words with Unsigned Saturation (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.BCST.Z m32 xmm k xmm
// VPACKUSDW.BCST.Z m32 ymm k ymm
// VPACKUSDW.BCST.Z m32 zmm k zmm
func VPACKUSDW_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSDW.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPACKUSDW_Z: Pack Doublewords into Words with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSDW.Z m128 xmm k xmm
// VPACKUSDW.Z m256 ymm k ymm
// VPACKUSDW.Z xmm xmm k xmm
// VPACKUSDW.Z ymm ymm k ymm
// VPACKUSDW.Z m512 zmm k zmm
// VPACKUSDW.Z zmm zmm k zmm
func VPACKUSDW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSDW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPACKUSWB: Pack Words into Bytes with Unsigned Saturation.
//
// Forms:
//
// VPACKUSWB m256 ymm ymm
// VPACKUSWB ymm ymm ymm
// VPACKUSWB m128 xmm xmm
// VPACKUSWB xmm xmm xmm
// VPACKUSWB m128 xmm k xmm
// VPACKUSWB m256 ymm k ymm
// VPACKUSWB xmm xmm k xmm
// VPACKUSWB ymm ymm k ymm
// VPACKUSWB m512 zmm k zmm
// VPACKUSWB m512 zmm zmm
// VPACKUSWB zmm zmm k zmm
// VPACKUSWB zmm zmm zmm
func VPACKUSWB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSWB.Forms(), sffxs{}, ops)
}
// VPACKUSWB_Z: Pack Words into Bytes with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPACKUSWB.Z m128 xmm k xmm
// VPACKUSWB.Z m256 ymm k ymm
// VPACKUSWB.Z xmm xmm k xmm
// VPACKUSWB.Z ymm ymm k ymm
// VPACKUSWB.Z m512 zmm k zmm
// VPACKUSWB.Z zmm zmm k zmm
func VPACKUSWB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPACKUSWB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDB: Add Packed Byte Integers.
//
// Forms:
//
// VPADDB m256 ymm ymm
// VPADDB ymm ymm ymm
// VPADDB m128 xmm xmm
// VPADDB xmm xmm xmm
// VPADDB m128 xmm k xmm
// VPADDB m256 ymm k ymm
// VPADDB xmm xmm k xmm
// VPADDB ymm ymm k ymm
// VPADDB m512 zmm k zmm
// VPADDB m512 zmm zmm
// VPADDB zmm zmm k zmm
// VPADDB zmm zmm zmm
func VPADDB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDB.Forms(), sffxs{}, ops)
}
// VPADDB_Z: Add Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPADDB.Z m128 xmm k xmm
// VPADDB.Z m256 ymm k ymm
// VPADDB.Z xmm xmm k xmm
// VPADDB.Z ymm ymm k ymm
// VPADDB.Z m512 zmm k zmm
// VPADDB.Z zmm zmm k zmm
func VPADDB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDD: Add Packed Doubleword Integers.
//
// Forms:
//
// VPADDD m256 ymm ymm
// VPADDD ymm ymm ymm
// VPADDD m128 xmm xmm
// VPADDD xmm xmm xmm
// VPADDD m128 xmm k xmm
// VPADDD m256 ymm k ymm
// VPADDD xmm xmm k xmm
// VPADDD ymm ymm k ymm
// VPADDD m512 zmm k zmm
// VPADDD m512 zmm zmm
// VPADDD zmm zmm k zmm
// VPADDD zmm zmm zmm
func VPADDD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDD.Forms(), sffxs{}, ops)
}
// VPADDD_BCST: Add Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPADDD.BCST m32 xmm k xmm
// VPADDD.BCST m32 xmm xmm
// VPADDD.BCST m32 ymm k ymm
// VPADDD.BCST m32 ymm ymm
// VPADDD.BCST m32 zmm k zmm
// VPADDD.BCST m32 zmm zmm
func VPADDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDD.Forms(), sffxs{sffxBCST}, ops)
}
// VPADDD_BCST_Z: Add Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDD.BCST.Z m32 xmm k xmm
// VPADDD.BCST.Z m32 ymm k ymm
// VPADDD.BCST.Z m32 zmm k zmm
func VPADDD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPADDD_Z: Add Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDD.Z m128 xmm k xmm
// VPADDD.Z m256 ymm k ymm
// VPADDD.Z xmm xmm k xmm
// VPADDD.Z ymm ymm k ymm
// VPADDD.Z m512 zmm k zmm
// VPADDD.Z zmm zmm k zmm
func VPADDD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDQ: Add Packed Quadword Integers.
//
// Forms:
//
// VPADDQ m256 ymm ymm
// VPADDQ ymm ymm ymm
// VPADDQ m128 xmm xmm
// VPADDQ xmm xmm xmm
// VPADDQ m128 xmm k xmm
// VPADDQ m256 ymm k ymm
// VPADDQ xmm xmm k xmm
// VPADDQ ymm ymm k ymm
// VPADDQ m512 zmm k zmm
// VPADDQ m512 zmm zmm
// VPADDQ zmm zmm k zmm
// VPADDQ zmm zmm zmm
func VPADDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDQ.Forms(), sffxs{}, ops)
}
// VPADDQ_BCST: Add Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPADDQ.BCST m64 xmm k xmm
// VPADDQ.BCST m64 xmm xmm
// VPADDQ.BCST m64 ymm k ymm
// VPADDQ.BCST m64 ymm ymm
// VPADDQ.BCST m64 zmm k zmm
// VPADDQ.BCST m64 zmm zmm
func VPADDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPADDQ_BCST_Z: Add Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPADDQ.BCST.Z m64 xmm k xmm
// VPADDQ.BCST.Z m64 ymm k ymm
// VPADDQ.BCST.Z m64 zmm k zmm
func VPADDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPADDQ_Z: Add Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPADDQ.Z m128 xmm k xmm
// VPADDQ.Z m256 ymm k ymm
// VPADDQ.Z xmm xmm k xmm
// VPADDQ.Z ymm ymm k ymm
// VPADDQ.Z m512 zmm k zmm
// VPADDQ.Z zmm zmm k zmm
func VPADDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDSB: Add Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPADDSB m256 ymm ymm
// VPADDSB ymm ymm ymm
// VPADDSB m128 xmm xmm
// VPADDSB xmm xmm xmm
// VPADDSB m128 xmm k xmm
// VPADDSB m256 ymm k ymm
// VPADDSB xmm xmm k xmm
// VPADDSB ymm ymm k ymm
// VPADDSB m512 zmm k zmm
// VPADDSB m512 zmm zmm
// VPADDSB zmm zmm k zmm
// VPADDSB zmm zmm zmm
func VPADDSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDSB.Forms(), sffxs{}, ops)
}
// VPADDSB_Z: Add Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSB.Z m128 xmm k xmm
// VPADDSB.Z m256 ymm k ymm
// VPADDSB.Z xmm xmm k xmm
// VPADDSB.Z ymm ymm k ymm
// VPADDSB.Z m512 zmm k zmm
// VPADDSB.Z zmm zmm k zmm
func VPADDSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDSW: Add Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPADDSW m256 ymm ymm
// VPADDSW ymm ymm ymm
// VPADDSW m128 xmm xmm
// VPADDSW xmm xmm xmm
// VPADDSW m128 xmm k xmm
// VPADDSW m256 ymm k ymm
// VPADDSW xmm xmm k xmm
// VPADDSW ymm ymm k ymm
// VPADDSW m512 zmm k zmm
// VPADDSW m512 zmm zmm
// VPADDSW zmm zmm k zmm
// VPADDSW zmm zmm zmm
func VPADDSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDSW.Forms(), sffxs{}, ops)
}
// VPADDSW_Z: Add Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDSW.Z m128 xmm k xmm
// VPADDSW.Z m256 ymm k ymm
// VPADDSW.Z xmm xmm k xmm
// VPADDSW.Z ymm ymm k ymm
// VPADDSW.Z m512 zmm k zmm
// VPADDSW.Z zmm zmm k zmm
func VPADDSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDUSB: Add Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSB m256 ymm ymm
// VPADDUSB ymm ymm ymm
// VPADDUSB m128 xmm xmm
// VPADDUSB xmm xmm xmm
// VPADDUSB m128 xmm k xmm
// VPADDUSB m256 ymm k ymm
// VPADDUSB xmm xmm k xmm
// VPADDUSB ymm ymm k ymm
// VPADDUSB m512 zmm k zmm
// VPADDUSB m512 zmm zmm
// VPADDUSB zmm zmm k zmm
// VPADDUSB zmm zmm zmm
func VPADDUSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDUSB.Forms(), sffxs{}, ops)
}
// VPADDUSB_Z: Add Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSB.Z m128 xmm k xmm
// VPADDUSB.Z m256 ymm k ymm
// VPADDUSB.Z xmm xmm k xmm
// VPADDUSB.Z ymm ymm k ymm
// VPADDUSB.Z m512 zmm k zmm
// VPADDUSB.Z zmm zmm k zmm
func VPADDUSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDUSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDUSW: Add Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPADDUSW m256 ymm ymm
// VPADDUSW ymm ymm ymm
// VPADDUSW m128 xmm xmm
// VPADDUSW xmm xmm xmm
// VPADDUSW m128 xmm k xmm
// VPADDUSW m256 ymm k ymm
// VPADDUSW xmm xmm k xmm
// VPADDUSW ymm ymm k ymm
// VPADDUSW m512 zmm k zmm
// VPADDUSW m512 zmm zmm
// VPADDUSW zmm zmm k zmm
// VPADDUSW zmm zmm zmm
func VPADDUSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDUSW.Forms(), sffxs{}, ops)
}
// VPADDUSW_Z: Add Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPADDUSW.Z m128 xmm k xmm
// VPADDUSW.Z m256 ymm k ymm
// VPADDUSW.Z xmm xmm k xmm
// VPADDUSW.Z ymm ymm k ymm
// VPADDUSW.Z m512 zmm k zmm
// VPADDUSW.Z zmm zmm k zmm
func VPADDUSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDUSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPADDW: Add Packed Word Integers.
//
// Forms:
//
// VPADDW m256 ymm ymm
// VPADDW ymm ymm ymm
// VPADDW m128 xmm xmm
// VPADDW xmm xmm xmm
// VPADDW m128 xmm k xmm
// VPADDW m256 ymm k ymm
// VPADDW xmm xmm k xmm
// VPADDW ymm ymm k ymm
// VPADDW m512 zmm k zmm
// VPADDW m512 zmm zmm
// VPADDW zmm zmm k zmm
// VPADDW zmm zmm zmm
func VPADDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDW.Forms(), sffxs{}, ops)
}
// VPADDW_Z: Add Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPADDW.Z m128 xmm k xmm
// VPADDW.Z m256 ymm k ymm
// VPADDW.Z xmm xmm k xmm
// VPADDW.Z ymm ymm k ymm
// VPADDW.Z m512 zmm k zmm
// VPADDW.Z zmm zmm k zmm
func VPADDW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPADDW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPALIGNR: Packed Align Right.
//
// Forms:
//
// VPALIGNR imm8 m256 ymm ymm
// VPALIGNR imm8 ymm ymm ymm
// VPALIGNR imm8 m128 xmm xmm
// VPALIGNR imm8 xmm xmm xmm
// VPALIGNR imm8 m128 xmm k xmm
// VPALIGNR imm8 m256 ymm k ymm
// VPALIGNR imm8 xmm xmm k xmm
// VPALIGNR imm8 ymm ymm k ymm
// VPALIGNR imm8 m512 zmm k zmm
// VPALIGNR imm8 m512 zmm zmm
// VPALIGNR imm8 zmm zmm k zmm
// VPALIGNR imm8 zmm zmm zmm
func VPALIGNR(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPALIGNR.Forms(), sffxs{}, ops)
}
// VPALIGNR_Z: Packed Align Right (Zeroing Masking).
//
// Forms:
//
// VPALIGNR.Z imm8 m128 xmm k xmm
// VPALIGNR.Z imm8 m256 ymm k ymm
// VPALIGNR.Z imm8 xmm xmm k xmm
// VPALIGNR.Z imm8 ymm ymm k ymm
// VPALIGNR.Z imm8 m512 zmm k zmm
// VPALIGNR.Z imm8 zmm zmm k zmm
func VPALIGNR_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPALIGNR.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VPAND: Packed Bitwise Logical AND.
//
// Forms:
//
// VPAND m256 ymm ymm
// VPAND ymm ymm ymm
// VPAND m128 xmm xmm
// VPAND xmm xmm xmm
func VPAND(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPAND.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPANDD: Bitwise Logical AND of Packed Doubleword Integers.
//
// Forms:
//
// VPANDD m128 xmm k xmm
// VPANDD m128 xmm xmm
// VPANDD m256 ymm k ymm
// VPANDD m256 ymm ymm
// VPANDD xmm xmm k xmm
// VPANDD xmm xmm xmm
// VPANDD ymm ymm k ymm
// VPANDD ymm ymm ymm
// VPANDD m512 zmm k zmm
// VPANDD m512 zmm zmm
// VPANDD zmm zmm k zmm
// VPANDD zmm zmm zmm
func VPANDD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDD.Forms(), sffxs{}, ops)
}
// VPANDD_BCST: Bitwise Logical AND of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDD.BCST m32 xmm k xmm
// VPANDD.BCST m32 xmm xmm
// VPANDD.BCST m32 ymm k ymm
// VPANDD.BCST m32 ymm ymm
// VPANDD.BCST m32 zmm k zmm
// VPANDD.BCST m32 zmm zmm
func VPANDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDD.Forms(), sffxs{sffxBCST}, ops)
}
// VPANDD_BCST_Z: Bitwise Logical AND of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDD.BCST.Z m32 xmm k xmm
// VPANDD.BCST.Z m32 ymm k ymm
// VPANDD.BCST.Z m32 zmm k zmm
func VPANDD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPANDD_Z: Bitwise Logical AND of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDD.Z m128 xmm k xmm
// VPANDD.Z m256 ymm k ymm
// VPANDD.Z xmm xmm k xmm
// VPANDD.Z ymm ymm k ymm
// VPANDD.Z m512 zmm k zmm
// VPANDD.Z zmm zmm k zmm
func VPANDD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPANDN: Packed Bitwise Logical AND NOT.
//
// Forms:
//
// VPANDN m256 ymm ymm
// VPANDN ymm ymm ymm
// VPANDN m128 xmm xmm
// VPANDN xmm xmm xmm
func VPANDN(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDN.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPANDND: Bitwise Logical AND NOT of Packed Doubleword Integers.
//
// Forms:
//
// VPANDND m128 xmm k xmm
// VPANDND m128 xmm xmm
// VPANDND m256 ymm k ymm
// VPANDND m256 ymm ymm
// VPANDND xmm xmm k xmm
// VPANDND xmm xmm xmm
// VPANDND ymm ymm k ymm
// VPANDND ymm ymm ymm
// VPANDND m512 zmm k zmm
// VPANDND m512 zmm zmm
// VPANDND zmm zmm k zmm
// VPANDND zmm zmm zmm
func VPANDND(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDND.Forms(), sffxs{}, ops)
}
// VPANDND_BCST: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPANDND.BCST m32 xmm k xmm
// VPANDND.BCST m32 xmm xmm
// VPANDND.BCST m32 ymm k ymm
// VPANDND.BCST m32 ymm ymm
// VPANDND.BCST m32 zmm k zmm
// VPANDND.BCST m32 zmm zmm
func VPANDND_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDND.Forms(), sffxs{sffxBCST}, ops)
}
// VPANDND_BCST_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDND.BCST.Z m32 xmm k xmm
// VPANDND.BCST.Z m32 ymm k ymm
// VPANDND.BCST.Z m32 zmm k zmm
func VPANDND_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDND.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPANDND_Z: Bitwise Logical AND NOT of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDND.Z m128 xmm k xmm
// VPANDND.Z m256 ymm k ymm
// VPANDND.Z xmm xmm k xmm
// VPANDND.Z ymm ymm k ymm
// VPANDND.Z m512 zmm k zmm
// VPANDND.Z zmm zmm k zmm
func VPANDND_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDND.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPANDNQ: Bitwise Logical AND NOT of Packed Quadword Integers.
//
// Forms:
//
// VPANDNQ m128 xmm k xmm
// VPANDNQ m128 xmm xmm
// VPANDNQ m256 ymm k ymm
// VPANDNQ m256 ymm ymm
// VPANDNQ xmm xmm k xmm
// VPANDNQ xmm xmm xmm
// VPANDNQ ymm ymm k ymm
// VPANDNQ ymm ymm ymm
// VPANDNQ m512 zmm k zmm
// VPANDNQ m512 zmm zmm
// VPANDNQ zmm zmm k zmm
// VPANDNQ zmm zmm zmm
func VPANDNQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDNQ.Forms(), sffxs{}, ops)
}
// VPANDNQ_BCST: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDNQ.BCST m64 xmm k xmm
// VPANDNQ.BCST m64 xmm xmm
// VPANDNQ.BCST m64 ymm k ymm
// VPANDNQ.BCST m64 ymm ymm
// VPANDNQ.BCST m64 zmm k zmm
// VPANDNQ.BCST m64 zmm zmm
func VPANDNQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDNQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPANDNQ_BCST_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDNQ.BCST.Z m64 xmm k xmm
// VPANDNQ.BCST.Z m64 ymm k ymm
// VPANDNQ.BCST.Z m64 zmm k zmm
func VPANDNQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDNQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPANDNQ_Z: Bitwise Logical AND NOT of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDNQ.Z m128 xmm k xmm
// VPANDNQ.Z m256 ymm k ymm
// VPANDNQ.Z xmm xmm k xmm
// VPANDNQ.Z ymm ymm k ymm
// VPANDNQ.Z m512 zmm k zmm
// VPANDNQ.Z zmm zmm k zmm
func VPANDNQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDNQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPANDQ: Bitwise Logical AND of Packed Quadword Integers.
//
// Forms:
//
// VPANDQ m128 xmm k xmm
// VPANDQ m128 xmm xmm
// VPANDQ m256 ymm k ymm
// VPANDQ m256 ymm ymm
// VPANDQ xmm xmm k xmm
// VPANDQ xmm xmm xmm
// VPANDQ ymm ymm k ymm
// VPANDQ ymm ymm ymm
// VPANDQ m512 zmm k zmm
// VPANDQ m512 zmm zmm
// VPANDQ zmm zmm k zmm
// VPANDQ zmm zmm zmm
func VPANDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDQ.Forms(), sffxs{}, ops)
}
// VPANDQ_BCST: Bitwise Logical AND of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPANDQ.BCST m64 xmm k xmm
// VPANDQ.BCST m64 xmm xmm
// VPANDQ.BCST m64 ymm k ymm
// VPANDQ.BCST m64 ymm ymm
// VPANDQ.BCST m64 zmm k zmm
// VPANDQ.BCST m64 zmm zmm
func VPANDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPANDQ_BCST_Z: Bitwise Logical AND of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPANDQ.BCST.Z m64 xmm k xmm
// VPANDQ.BCST.Z m64 ymm k ymm
// VPANDQ.BCST.Z m64 zmm k zmm
func VPANDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPANDQ_Z: Bitwise Logical AND of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPANDQ.Z m128 xmm k xmm
// VPANDQ.Z m256 ymm k ymm
// VPANDQ.Z xmm xmm k xmm
// VPANDQ.Z ymm ymm k ymm
// VPANDQ.Z m512 zmm k zmm
// VPANDQ.Z zmm zmm k zmm
func VPANDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPANDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPAVGB: Average Packed Byte Integers.
//
// Forms:
//
// VPAVGB m256 ymm ymm
// VPAVGB ymm ymm ymm
// VPAVGB m128 xmm xmm
// VPAVGB xmm xmm xmm
// VPAVGB m128 xmm k xmm
// VPAVGB m256 ymm k ymm
// VPAVGB xmm xmm k xmm
// VPAVGB ymm ymm k ymm
// VPAVGB m512 zmm k zmm
// VPAVGB m512 zmm zmm
// VPAVGB zmm zmm k zmm
// VPAVGB zmm zmm zmm
func VPAVGB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPAVGB.Forms(), sffxs{}, ops)
}
// VPAVGB_Z: Average Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGB.Z m128 xmm k xmm
// VPAVGB.Z m256 ymm k ymm
// VPAVGB.Z xmm xmm k xmm
// VPAVGB.Z ymm ymm k ymm
// VPAVGB.Z m512 zmm k zmm
// VPAVGB.Z zmm zmm k zmm
func VPAVGB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPAVGB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPAVGW: Average Packed Word Integers.
//
// Forms:
//
// VPAVGW m256 ymm ymm
// VPAVGW ymm ymm ymm
// VPAVGW m128 xmm xmm
// VPAVGW xmm xmm xmm
// VPAVGW m128 xmm k xmm
// VPAVGW m256 ymm k ymm
// VPAVGW xmm xmm k xmm
// VPAVGW ymm ymm k ymm
// VPAVGW m512 zmm k zmm
// VPAVGW m512 zmm zmm
// VPAVGW zmm zmm k zmm
// VPAVGW zmm zmm zmm
func VPAVGW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPAVGW.Forms(), sffxs{}, ops)
}
// VPAVGW_Z: Average Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPAVGW.Z m128 xmm k xmm
// VPAVGW.Z m256 ymm k ymm
// VPAVGW.Z xmm xmm k xmm
// VPAVGW.Z ymm ymm k ymm
// VPAVGW.Z m512 zmm k zmm
// VPAVGW.Z zmm zmm k zmm
func VPAVGW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPAVGW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPBLENDD: Blend Packed Doublewords.
//
// Forms:
//
// VPBLENDD imm8 m128 xmm xmm
// VPBLENDD imm8 m256 ymm ymm
// VPBLENDD imm8 xmm xmm xmm
// VPBLENDD imm8 ymm ymm ymm
func VPBLENDD(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDD.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VPBLENDMB: Blend Byte Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMB m128 xmm k xmm
// VPBLENDMB m128 xmm xmm
// VPBLENDMB m256 ymm k ymm
// VPBLENDMB m256 ymm ymm
// VPBLENDMB xmm xmm k xmm
// VPBLENDMB xmm xmm xmm
// VPBLENDMB ymm ymm k ymm
// VPBLENDMB ymm ymm ymm
// VPBLENDMB m512 zmm k zmm
// VPBLENDMB m512 zmm zmm
// VPBLENDMB zmm zmm k zmm
// VPBLENDMB zmm zmm zmm
func VPBLENDMB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMB.Forms(), sffxs{}, ops)
}
// VPBLENDMB_Z: Blend Byte Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMB.Z m128 xmm k xmm
// VPBLENDMB.Z m256 ymm k ymm
// VPBLENDMB.Z xmm xmm k xmm
// VPBLENDMB.Z ymm ymm k ymm
// VPBLENDMB.Z m512 zmm k zmm
// VPBLENDMB.Z zmm zmm k zmm
func VPBLENDMB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPBLENDMD: Blend Doubleword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMD m128 xmm k xmm
// VPBLENDMD m128 xmm xmm
// VPBLENDMD m256 ymm k ymm
// VPBLENDMD m256 ymm ymm
// VPBLENDMD xmm xmm k xmm
// VPBLENDMD xmm xmm xmm
// VPBLENDMD ymm ymm k ymm
// VPBLENDMD ymm ymm ymm
// VPBLENDMD m512 zmm k zmm
// VPBLENDMD m512 zmm zmm
// VPBLENDMD zmm zmm k zmm
// VPBLENDMD zmm zmm zmm
func VPBLENDMD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMD.Forms(), sffxs{}, ops)
}
// VPBLENDMD_BCST: Blend Doubleword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMD.BCST m32 xmm k xmm
// VPBLENDMD.BCST m32 xmm xmm
// VPBLENDMD.BCST m32 ymm k ymm
// VPBLENDMD.BCST m32 ymm ymm
// VPBLENDMD.BCST m32 zmm k zmm
// VPBLENDMD.BCST m32 zmm zmm
func VPBLENDMD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMD.Forms(), sffxs{sffxBCST}, ops)
}
// VPBLENDMD_BCST_Z: Blend Doubleword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.BCST.Z m32 xmm k xmm
// VPBLENDMD.BCST.Z m32 ymm k ymm
// VPBLENDMD.BCST.Z m32 zmm k zmm
func VPBLENDMD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPBLENDMD_Z: Blend Doubleword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMD.Z m128 xmm k xmm
// VPBLENDMD.Z m256 ymm k ymm
// VPBLENDMD.Z xmm xmm k xmm
// VPBLENDMD.Z ymm ymm k ymm
// VPBLENDMD.Z m512 zmm k zmm
// VPBLENDMD.Z zmm zmm k zmm
func VPBLENDMD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPBLENDMQ: Blend Quadword Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMQ m128 xmm k xmm
// VPBLENDMQ m128 xmm xmm
// VPBLENDMQ m256 ymm k ymm
// VPBLENDMQ m256 ymm ymm
// VPBLENDMQ xmm xmm k xmm
// VPBLENDMQ xmm xmm xmm
// VPBLENDMQ ymm ymm k ymm
// VPBLENDMQ ymm ymm ymm
// VPBLENDMQ m512 zmm k zmm
// VPBLENDMQ m512 zmm zmm
// VPBLENDMQ zmm zmm k zmm
// VPBLENDMQ zmm zmm zmm
func VPBLENDMQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMQ.Forms(), sffxs{}, ops)
}
// VPBLENDMQ_BCST: Blend Quadword Vectors Using an OpMask Control (Broadcast).
//
// Forms:
//
// VPBLENDMQ.BCST m64 xmm k xmm
// VPBLENDMQ.BCST m64 xmm xmm
// VPBLENDMQ.BCST m64 ymm k ymm
// VPBLENDMQ.BCST m64 ymm ymm
// VPBLENDMQ.BCST m64 zmm k zmm
// VPBLENDMQ.BCST m64 zmm zmm
func VPBLENDMQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPBLENDMQ_BCST_Z: Blend Quadword Vectors Using an OpMask Control (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.BCST.Z m64 xmm k xmm
// VPBLENDMQ.BCST.Z m64 ymm k ymm
// VPBLENDMQ.BCST.Z m64 zmm k zmm
func VPBLENDMQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPBLENDMQ_Z: Blend Quadword Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMQ.Z m128 xmm k xmm
// VPBLENDMQ.Z m256 ymm k ymm
// VPBLENDMQ.Z xmm xmm k xmm
// VPBLENDMQ.Z ymm ymm k ymm
// VPBLENDMQ.Z m512 zmm k zmm
// VPBLENDMQ.Z zmm zmm k zmm
func VPBLENDMQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPBLENDMW: Blend Word Vectors Using an OpMask Control.
//
// Forms:
//
// VPBLENDMW m128 xmm k xmm
// VPBLENDMW m128 xmm xmm
// VPBLENDMW m256 ymm k ymm
// VPBLENDMW m256 ymm ymm
// VPBLENDMW xmm xmm k xmm
// VPBLENDMW xmm xmm xmm
// VPBLENDMW ymm ymm k ymm
// VPBLENDMW ymm ymm ymm
// VPBLENDMW m512 zmm k zmm
// VPBLENDMW m512 zmm zmm
// VPBLENDMW zmm zmm k zmm
// VPBLENDMW zmm zmm zmm
func VPBLENDMW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMW.Forms(), sffxs{}, ops)
}
// VPBLENDMW_Z: Blend Word Vectors Using an OpMask Control (Zeroing Masking).
//
// Forms:
//
// VPBLENDMW.Z m128 xmm k xmm
// VPBLENDMW.Z m256 ymm k ymm
// VPBLENDMW.Z xmm xmm k xmm
// VPBLENDMW.Z ymm ymm k ymm
// VPBLENDMW.Z m512 zmm k zmm
// VPBLENDMW.Z zmm zmm k zmm
func VPBLENDMW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDMW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPBLENDVB: Variable Blend Packed Bytes.
//
// Forms:
//
// VPBLENDVB ymm m256 ymm ymm
// VPBLENDVB ymm ymm ymm ymm
// VPBLENDVB xmm m128 xmm xmm
// VPBLENDVB xmm xmm xmm xmm
func VPBLENDVB(xy, mxy, xy1, xy2 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDVB.Forms(), sffxs{}, []operand.Op{xy, mxy, xy1, xy2})
}
// VPBLENDW: Blend Packed Words.
//
// Forms:
//
// VPBLENDW imm8 m256 ymm ymm
// VPBLENDW imm8 ymm ymm ymm
// VPBLENDW imm8 m128 xmm xmm
// VPBLENDW imm8 xmm xmm xmm
func VPBLENDW(i, mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPBLENDW.Forms(), sffxs{}, []operand.Op{i, mxy, xy, xy1})
}
// VPBROADCASTB: Broadcast Byte Integer.
//
// Forms:
//
// VPBROADCASTB m8 xmm
// VPBROADCASTB m8 ymm
// VPBROADCASTB xmm xmm
// VPBROADCASTB xmm ymm
// VPBROADCASTB m8 k xmm
// VPBROADCASTB m8 k ymm
// VPBROADCASTB r32 k xmm
// VPBROADCASTB r32 k ymm
// VPBROADCASTB r32 xmm
// VPBROADCASTB r32 ymm
// VPBROADCASTB xmm k xmm
// VPBROADCASTB xmm k ymm
// VPBROADCASTB m8 k zmm
// VPBROADCASTB m8 zmm
// VPBROADCASTB r32 k zmm
// VPBROADCASTB r32 zmm
// VPBROADCASTB xmm k zmm
// VPBROADCASTB xmm zmm
func VPBROADCASTB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTB.Forms(), sffxs{}, ops)
}
// VPBROADCASTB_Z: Broadcast Byte Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTB.Z m8 k xmm
// VPBROADCASTB.Z m8 k ymm
// VPBROADCASTB.Z r32 k xmm
// VPBROADCASTB.Z r32 k ymm
// VPBROADCASTB.Z xmm k xmm
// VPBROADCASTB.Z xmm k ymm
// VPBROADCASTB.Z m8 k zmm
// VPBROADCASTB.Z r32 k zmm
// VPBROADCASTB.Z xmm k zmm
func VPBROADCASTB_Z(mrx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTB.Forms(), sffxs{sffxZ}, []operand.Op{mrx, k, xyz})
}
// VPBROADCASTD: Broadcast Doubleword Integer.
//
// Forms:
//
// VPBROADCASTD m32 xmm
// VPBROADCASTD m32 ymm
// VPBROADCASTD xmm xmm
// VPBROADCASTD xmm ymm
// VPBROADCASTD m32 k xmm
// VPBROADCASTD m32 k ymm
// VPBROADCASTD r32 k xmm
// VPBROADCASTD r32 k ymm
// VPBROADCASTD r32 xmm
// VPBROADCASTD r32 ymm
// VPBROADCASTD xmm k xmm
// VPBROADCASTD xmm k ymm
// VPBROADCASTD m32 k zmm
// VPBROADCASTD m32 zmm
// VPBROADCASTD r32 k zmm
// VPBROADCASTD r32 zmm
// VPBROADCASTD xmm k zmm
// VPBROADCASTD xmm zmm
func VPBROADCASTD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTD.Forms(), sffxs{}, ops)
}
// VPBROADCASTD_Z: Broadcast Doubleword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTD.Z m32 k xmm
// VPBROADCASTD.Z m32 k ymm
// VPBROADCASTD.Z r32 k xmm
// VPBROADCASTD.Z r32 k ymm
// VPBROADCASTD.Z xmm k xmm
// VPBROADCASTD.Z xmm k ymm
// VPBROADCASTD.Z m32 k zmm
// VPBROADCASTD.Z r32 k zmm
// VPBROADCASTD.Z xmm k zmm
func VPBROADCASTD_Z(mrx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTD.Forms(), sffxs{sffxZ}, []operand.Op{mrx, k, xyz})
}
// VPBROADCASTMB2Q: Broadcast Low Byte of Mask Register to Packed Quadword Values.
//
// Forms:
//
// VPBROADCASTMB2Q k xmm
// VPBROADCASTMB2Q k ymm
// VPBROADCASTMB2Q k zmm
func VPBROADCASTMB2Q(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTMB2Q.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPBROADCASTMW2D: Broadcast Low Word of Mask Register to Packed Doubleword Values.
//
// Forms:
//
// VPBROADCASTMW2D k xmm
// VPBROADCASTMW2D k ymm
// VPBROADCASTMW2D k zmm
func VPBROADCASTMW2D(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTMW2D.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPBROADCASTQ: Broadcast Quadword Integer.
//
// Forms:
//
// VPBROADCASTQ m64 xmm
// VPBROADCASTQ m64 ymm
// VPBROADCASTQ xmm xmm
// VPBROADCASTQ xmm ymm
// VPBROADCASTQ m64 k xmm
// VPBROADCASTQ m64 k ymm
// VPBROADCASTQ r64 k xmm
// VPBROADCASTQ r64 k ymm
// VPBROADCASTQ r64 xmm
// VPBROADCASTQ r64 ymm
// VPBROADCASTQ xmm k xmm
// VPBROADCASTQ xmm k ymm
// VPBROADCASTQ m64 k zmm
// VPBROADCASTQ m64 zmm
// VPBROADCASTQ r64 k zmm
// VPBROADCASTQ r64 zmm
// VPBROADCASTQ xmm k zmm
// VPBROADCASTQ xmm zmm
func VPBROADCASTQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTQ.Forms(), sffxs{}, ops)
}
// VPBROADCASTQ_Z: Broadcast Quadword Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTQ.Z m64 k xmm
// VPBROADCASTQ.Z m64 k ymm
// VPBROADCASTQ.Z r64 k xmm
// VPBROADCASTQ.Z r64 k ymm
// VPBROADCASTQ.Z xmm k xmm
// VPBROADCASTQ.Z xmm k ymm
// VPBROADCASTQ.Z m64 k zmm
// VPBROADCASTQ.Z r64 k zmm
// VPBROADCASTQ.Z xmm k zmm
func VPBROADCASTQ_Z(mrx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTQ.Forms(), sffxs{sffxZ}, []operand.Op{mrx, k, xyz})
}
// VPBROADCASTW: Broadcast Word Integer.
//
// Forms:
//
// VPBROADCASTW m16 xmm
// VPBROADCASTW m16 ymm
// VPBROADCASTW xmm xmm
// VPBROADCASTW xmm ymm
// VPBROADCASTW m16 k xmm
// VPBROADCASTW m16 k ymm
// VPBROADCASTW r32 k xmm
// VPBROADCASTW r32 k ymm
// VPBROADCASTW r32 xmm
// VPBROADCASTW r32 ymm
// VPBROADCASTW xmm k xmm
// VPBROADCASTW xmm k ymm
// VPBROADCASTW m16 k zmm
// VPBROADCASTW m16 zmm
// VPBROADCASTW r32 k zmm
// VPBROADCASTW r32 zmm
// VPBROADCASTW xmm k zmm
// VPBROADCASTW xmm zmm
func VPBROADCASTW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTW.Forms(), sffxs{}, ops)
}
// VPBROADCASTW_Z: Broadcast Word Integer (Zeroing Masking).
//
// Forms:
//
// VPBROADCASTW.Z m16 k xmm
// VPBROADCASTW.Z m16 k ymm
// VPBROADCASTW.Z r32 k xmm
// VPBROADCASTW.Z r32 k ymm
// VPBROADCASTW.Z xmm k xmm
// VPBROADCASTW.Z xmm k ymm
// VPBROADCASTW.Z m16 k zmm
// VPBROADCASTW.Z r32 k zmm
// VPBROADCASTW.Z xmm k zmm
func VPBROADCASTW_Z(mrx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPBROADCASTW.Forms(), sffxs{sffxZ}, []operand.Op{mrx, k, xyz})
}
// VPCLMULQDQ: Carry-Less Quadword Multiplication.
//
// Forms:
//
// VPCLMULQDQ imm8 m128 xmm xmm
// VPCLMULQDQ imm8 xmm xmm xmm
func VPCLMULQDQ(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPCLMULQDQ.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
}
// VPCMPB: Compare Packed Signed Byte Values.
//
// Forms:
//
// VPCMPB imm8 m128 xmm k k
// VPCMPB imm8 m128 xmm k
// VPCMPB imm8 m256 ymm k k
// VPCMPB imm8 m256 ymm k
// VPCMPB imm8 xmm xmm k k
// VPCMPB imm8 xmm xmm k
// VPCMPB imm8 ymm ymm k k
// VPCMPB imm8 ymm ymm k
// VPCMPB imm8 m512 zmm k k
// VPCMPB imm8 m512 zmm k
// VPCMPB imm8 zmm zmm k k
// VPCMPB imm8 zmm zmm k
func VPCMPB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPB.Forms(), sffxs{}, ops)
}
// VPCMPD: Compare Packed Signed Doubleword Values.
//
// Forms:
//
// VPCMPD imm8 m128 xmm k k
// VPCMPD imm8 m128 xmm k
// VPCMPD imm8 m256 ymm k k
// VPCMPD imm8 m256 ymm k
// VPCMPD imm8 xmm xmm k k
// VPCMPD imm8 xmm xmm k
// VPCMPD imm8 ymm ymm k k
// VPCMPD imm8 ymm ymm k
// VPCMPD imm8 m512 zmm k k
// VPCMPD imm8 m512 zmm k
// VPCMPD imm8 zmm zmm k k
// VPCMPD imm8 zmm zmm k
func VPCMPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPD.Forms(), sffxs{}, ops)
}
// VPCMPD_BCST: Compare Packed Signed Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPD.BCST imm8 m32 xmm k k
// VPCMPD.BCST imm8 m32 xmm k
// VPCMPD.BCST imm8 m32 ymm k k
// VPCMPD.BCST imm8 m32 ymm k
// VPCMPD.BCST imm8 m32 zmm k k
// VPCMPD.BCST imm8 m32 zmm k
func VPCMPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPD.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPEQB: Compare Packed Byte Data for Equality.
//
// Forms:
//
// VPCMPEQB m256 ymm ymm
// VPCMPEQB ymm ymm ymm
// VPCMPEQB m128 xmm xmm
// VPCMPEQB xmm xmm xmm
// VPCMPEQB m128 xmm k k
// VPCMPEQB m128 xmm k
// VPCMPEQB m256 ymm k k
// VPCMPEQB m256 ymm k
// VPCMPEQB xmm xmm k k
// VPCMPEQB xmm xmm k
// VPCMPEQB ymm ymm k k
// VPCMPEQB ymm ymm k
// VPCMPEQB m512 zmm k k
// VPCMPEQB m512 zmm k
// VPCMPEQB zmm zmm k k
// VPCMPEQB zmm zmm k
func VPCMPEQB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQB.Forms(), sffxs{}, ops)
}
// VPCMPEQD: Compare Packed Doubleword Data for Equality.
//
// Forms:
//
// VPCMPEQD m256 ymm ymm
// VPCMPEQD ymm ymm ymm
// VPCMPEQD m128 xmm xmm
// VPCMPEQD xmm xmm xmm
// VPCMPEQD m128 xmm k k
// VPCMPEQD m128 xmm k
// VPCMPEQD m256 ymm k k
// VPCMPEQD m256 ymm k
// VPCMPEQD xmm xmm k k
// VPCMPEQD xmm xmm k
// VPCMPEQD ymm ymm k k
// VPCMPEQD ymm ymm k
// VPCMPEQD m512 zmm k k
// VPCMPEQD m512 zmm k
// VPCMPEQD zmm zmm k k
// VPCMPEQD zmm zmm k
func VPCMPEQD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQD.Forms(), sffxs{}, ops)
}
// VPCMPEQD_BCST: Compare Packed Doubleword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQD.BCST m32 xmm k k
// VPCMPEQD.BCST m32 xmm k
// VPCMPEQD.BCST m32 ymm k k
// VPCMPEQD.BCST m32 ymm k
// VPCMPEQD.BCST m32 zmm k k
// VPCMPEQD.BCST m32 zmm k
func VPCMPEQD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQD.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPEQQ: Compare Packed Quadword Data for Equality.
//
// Forms:
//
// VPCMPEQQ m256 ymm ymm
// VPCMPEQQ ymm ymm ymm
// VPCMPEQQ m128 xmm xmm
// VPCMPEQQ xmm xmm xmm
// VPCMPEQQ m128 xmm k k
// VPCMPEQQ m128 xmm k
// VPCMPEQQ m256 ymm k k
// VPCMPEQQ m256 ymm k
// VPCMPEQQ xmm xmm k k
// VPCMPEQQ xmm xmm k
// VPCMPEQQ ymm ymm k k
// VPCMPEQQ ymm ymm k
// VPCMPEQQ m512 zmm k k
// VPCMPEQQ m512 zmm k
// VPCMPEQQ zmm zmm k k
// VPCMPEQQ zmm zmm k
func VPCMPEQQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQQ.Forms(), sffxs{}, ops)
}
// VPCMPEQQ_BCST: Compare Packed Quadword Data for Equality (Broadcast).
//
// Forms:
//
// VPCMPEQQ.BCST m64 xmm k k
// VPCMPEQQ.BCST m64 xmm k
// VPCMPEQQ.BCST m64 ymm k k
// VPCMPEQQ.BCST m64 ymm k
// VPCMPEQQ.BCST m64 zmm k k
// VPCMPEQQ.BCST m64 zmm k
func VPCMPEQQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPEQW: Compare Packed Word Data for Equality.
//
// Forms:
//
// VPCMPEQW m256 ymm ymm
// VPCMPEQW ymm ymm ymm
// VPCMPEQW m128 xmm xmm
// VPCMPEQW xmm xmm xmm
// VPCMPEQW m128 xmm k k
// VPCMPEQW m128 xmm k
// VPCMPEQW m256 ymm k k
// VPCMPEQW m256 ymm k
// VPCMPEQW xmm xmm k k
// VPCMPEQW xmm xmm k
// VPCMPEQW ymm ymm k k
// VPCMPEQW ymm ymm k
// VPCMPEQW m512 zmm k k
// VPCMPEQW m512 zmm k
// VPCMPEQW zmm zmm k k
// VPCMPEQW zmm zmm k
func VPCMPEQW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPEQW.Forms(), sffxs{}, ops)
}
// VPCMPESTRI: Packed Compare Explicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPESTRI imm8 m128 xmm
// VPCMPESTRI imm8 xmm xmm
func VPCMPESTRI(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPESTRI.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// VPCMPESTRM: Packed Compare Explicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPESTRM imm8 m128 xmm
// VPCMPESTRM imm8 xmm xmm
func VPCMPESTRM(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPESTRM.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// VPCMPGTB: Compare Packed Signed Byte Integers for Greater Than.
//
// Forms:
//
// VPCMPGTB m256 ymm ymm
// VPCMPGTB ymm ymm ymm
// VPCMPGTB m128 xmm xmm
// VPCMPGTB xmm xmm xmm
// VPCMPGTB m128 xmm k k
// VPCMPGTB m128 xmm k
// VPCMPGTB m256 ymm k k
// VPCMPGTB m256 ymm k
// VPCMPGTB xmm xmm k k
// VPCMPGTB xmm xmm k
// VPCMPGTB ymm ymm k k
// VPCMPGTB ymm ymm k
// VPCMPGTB m512 zmm k k
// VPCMPGTB m512 zmm k
// VPCMPGTB zmm zmm k k
// VPCMPGTB zmm zmm k
func VPCMPGTB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTB.Forms(), sffxs{}, ops)
}
// VPCMPGTD: Compare Packed Signed Doubleword Integers for Greater Than.
//
// Forms:
//
// VPCMPGTD m256 ymm ymm
// VPCMPGTD ymm ymm ymm
// VPCMPGTD m128 xmm xmm
// VPCMPGTD xmm xmm xmm
// VPCMPGTD m128 xmm k k
// VPCMPGTD m128 xmm k
// VPCMPGTD m256 ymm k k
// VPCMPGTD m256 ymm k
// VPCMPGTD xmm xmm k k
// VPCMPGTD xmm xmm k
// VPCMPGTD ymm ymm k k
// VPCMPGTD ymm ymm k
// VPCMPGTD m512 zmm k k
// VPCMPGTD m512 zmm k
// VPCMPGTD zmm zmm k k
// VPCMPGTD zmm zmm k
func VPCMPGTD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTD.Forms(), sffxs{}, ops)
}
// VPCMPGTD_BCST: Compare Packed Signed Doubleword Integers for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTD.BCST m32 xmm k k
// VPCMPGTD.BCST m32 xmm k
// VPCMPGTD.BCST m32 ymm k k
// VPCMPGTD.BCST m32 ymm k
// VPCMPGTD.BCST m32 zmm k k
// VPCMPGTD.BCST m32 zmm k
func VPCMPGTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTD.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPGTQ: Compare Packed Data for Greater Than.
//
// Forms:
//
// VPCMPGTQ m256 ymm ymm
// VPCMPGTQ ymm ymm ymm
// VPCMPGTQ m128 xmm xmm
// VPCMPGTQ xmm xmm xmm
// VPCMPGTQ m128 xmm k k
// VPCMPGTQ m128 xmm k
// VPCMPGTQ m256 ymm k k
// VPCMPGTQ m256 ymm k
// VPCMPGTQ xmm xmm k k
// VPCMPGTQ xmm xmm k
// VPCMPGTQ ymm ymm k k
// VPCMPGTQ ymm ymm k
// VPCMPGTQ m512 zmm k k
// VPCMPGTQ m512 zmm k
// VPCMPGTQ zmm zmm k k
// VPCMPGTQ zmm zmm k
func VPCMPGTQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTQ.Forms(), sffxs{}, ops)
}
// VPCMPGTQ_BCST: Compare Packed Data for Greater Than (Broadcast).
//
// Forms:
//
// VPCMPGTQ.BCST m64 xmm k k
// VPCMPGTQ.BCST m64 xmm k
// VPCMPGTQ.BCST m64 ymm k k
// VPCMPGTQ.BCST m64 ymm k
// VPCMPGTQ.BCST m64 zmm k k
// VPCMPGTQ.BCST m64 zmm k
func VPCMPGTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPGTW: Compare Packed Signed Word Integers for Greater Than.
//
// Forms:
//
// VPCMPGTW m256 ymm ymm
// VPCMPGTW ymm ymm ymm
// VPCMPGTW m128 xmm xmm
// VPCMPGTW xmm xmm xmm
// VPCMPGTW m128 xmm k k
// VPCMPGTW m128 xmm k
// VPCMPGTW m256 ymm k k
// VPCMPGTW m256 ymm k
// VPCMPGTW xmm xmm k k
// VPCMPGTW xmm xmm k
// VPCMPGTW ymm ymm k k
// VPCMPGTW ymm ymm k
// VPCMPGTW m512 zmm k k
// VPCMPGTW m512 zmm k
// VPCMPGTW zmm zmm k k
// VPCMPGTW zmm zmm k
func VPCMPGTW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPGTW.Forms(), sffxs{}, ops)
}
// VPCMPISTRI: Packed Compare Implicit Length Strings, Return Index.
//
// Forms:
//
// VPCMPISTRI imm8 m128 xmm
// VPCMPISTRI imm8 xmm xmm
func VPCMPISTRI(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPISTRI.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// VPCMPISTRM: Packed Compare Implicit Length Strings, Return Mask.
//
// Forms:
//
// VPCMPISTRM imm8 m128 xmm
// VPCMPISTRM imm8 xmm xmm
func VPCMPISTRM(i, mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPISTRM.Forms(), sffxs{}, []operand.Op{i, mx, x})
}
// VPCMPQ: Compare Packed Signed Quadword Values.
//
// Forms:
//
// VPCMPQ imm8 m128 xmm k k
// VPCMPQ imm8 m128 xmm k
// VPCMPQ imm8 m256 ymm k k
// VPCMPQ imm8 m256 ymm k
// VPCMPQ imm8 xmm xmm k k
// VPCMPQ imm8 xmm xmm k
// VPCMPQ imm8 ymm ymm k k
// VPCMPQ imm8 ymm ymm k
// VPCMPQ imm8 m512 zmm k k
// VPCMPQ imm8 m512 zmm k
// VPCMPQ imm8 zmm zmm k k
// VPCMPQ imm8 zmm zmm k
func VPCMPQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPQ.Forms(), sffxs{}, ops)
}
// VPCMPQ_BCST: Compare Packed Signed Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPQ.BCST imm8 m64 xmm k k
// VPCMPQ.BCST imm8 m64 xmm k
// VPCMPQ.BCST imm8 m64 ymm k k
// VPCMPQ.BCST imm8 m64 ymm k
// VPCMPQ.BCST imm8 m64 zmm k k
// VPCMPQ.BCST imm8 m64 zmm k
func VPCMPQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPUB: Compare Packed Unsigned Byte Values.
//
// Forms:
//
// VPCMPUB imm8 m128 xmm k k
// VPCMPUB imm8 m128 xmm k
// VPCMPUB imm8 m256 ymm k k
// VPCMPUB imm8 m256 ymm k
// VPCMPUB imm8 xmm xmm k k
// VPCMPUB imm8 xmm xmm k
// VPCMPUB imm8 ymm ymm k k
// VPCMPUB imm8 ymm ymm k
// VPCMPUB imm8 m512 zmm k k
// VPCMPUB imm8 m512 zmm k
// VPCMPUB imm8 zmm zmm k k
// VPCMPUB imm8 zmm zmm k
func VPCMPUB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUB.Forms(), sffxs{}, ops)
}
// VPCMPUD: Compare Packed Unsigned Doubleword Values.
//
// Forms:
//
// VPCMPUD imm8 m128 xmm k k
// VPCMPUD imm8 m128 xmm k
// VPCMPUD imm8 m256 ymm k k
// VPCMPUD imm8 m256 ymm k
// VPCMPUD imm8 xmm xmm k k
// VPCMPUD imm8 xmm xmm k
// VPCMPUD imm8 ymm ymm k k
// VPCMPUD imm8 ymm ymm k
// VPCMPUD imm8 m512 zmm k k
// VPCMPUD imm8 m512 zmm k
// VPCMPUD imm8 zmm zmm k k
// VPCMPUD imm8 zmm zmm k
func VPCMPUD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUD.Forms(), sffxs{}, ops)
}
// VPCMPUD_BCST: Compare Packed Unsigned Doubleword Values (Broadcast).
//
// Forms:
//
// VPCMPUD.BCST imm8 m32 xmm k k
// VPCMPUD.BCST imm8 m32 xmm k
// VPCMPUD.BCST imm8 m32 ymm k k
// VPCMPUD.BCST imm8 m32 ymm k
// VPCMPUD.BCST imm8 m32 zmm k k
// VPCMPUD.BCST imm8 m32 zmm k
func VPCMPUD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUD.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPUQ: Compare Packed Unsigned Quadword Values.
//
// Forms:
//
// VPCMPUQ imm8 m128 xmm k k
// VPCMPUQ imm8 m128 xmm k
// VPCMPUQ imm8 m256 ymm k k
// VPCMPUQ imm8 m256 ymm k
// VPCMPUQ imm8 xmm xmm k k
// VPCMPUQ imm8 xmm xmm k
// VPCMPUQ imm8 ymm ymm k k
// VPCMPUQ imm8 ymm ymm k
// VPCMPUQ imm8 m512 zmm k k
// VPCMPUQ imm8 m512 zmm k
// VPCMPUQ imm8 zmm zmm k k
// VPCMPUQ imm8 zmm zmm k
func VPCMPUQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUQ.Forms(), sffxs{}, ops)
}
// VPCMPUQ_BCST: Compare Packed Unsigned Quadword Values (Broadcast).
//
// Forms:
//
// VPCMPUQ.BCST imm8 m64 xmm k k
// VPCMPUQ.BCST imm8 m64 xmm k
// VPCMPUQ.BCST imm8 m64 ymm k k
// VPCMPUQ.BCST imm8 m64 ymm k
// VPCMPUQ.BCST imm8 m64 zmm k k
// VPCMPUQ.BCST imm8 m64 zmm k
func VPCMPUQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPCMPUW: Compare Packed Unsigned Word Values.
//
// Forms:
//
// VPCMPUW imm8 m128 xmm k k
// VPCMPUW imm8 m128 xmm k
// VPCMPUW imm8 m256 ymm k k
// VPCMPUW imm8 m256 ymm k
// VPCMPUW imm8 xmm xmm k k
// VPCMPUW imm8 xmm xmm k
// VPCMPUW imm8 ymm ymm k k
// VPCMPUW imm8 ymm ymm k
// VPCMPUW imm8 m512 zmm k k
// VPCMPUW imm8 m512 zmm k
// VPCMPUW imm8 zmm zmm k k
// VPCMPUW imm8 zmm zmm k
func VPCMPUW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPUW.Forms(), sffxs{}, ops)
}
// VPCMPW: Compare Packed Signed Word Values.
//
// Forms:
//
// VPCMPW imm8 m128 xmm k k
// VPCMPW imm8 m128 xmm k
// VPCMPW imm8 m256 ymm k k
// VPCMPW imm8 m256 ymm k
// VPCMPW imm8 xmm xmm k k
// VPCMPW imm8 xmm xmm k
// VPCMPW imm8 ymm ymm k k
// VPCMPW imm8 ymm ymm k
// VPCMPW imm8 m512 zmm k k
// VPCMPW imm8 m512 zmm k
// VPCMPW imm8 zmm zmm k k
// VPCMPW imm8 zmm zmm k
func VPCMPW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCMPW.Forms(), sffxs{}, ops)
}
// VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSD xmm k m128
// VPCOMPRESSD xmm k xmm
// VPCOMPRESSD xmm m128
// VPCOMPRESSD xmm xmm
// VPCOMPRESSD ymm k m256
// VPCOMPRESSD ymm k ymm
// VPCOMPRESSD ymm m256
// VPCOMPRESSD ymm ymm
// VPCOMPRESSD zmm k m512
// VPCOMPRESSD zmm k zmm
// VPCOMPRESSD zmm m512
// VPCOMPRESSD zmm zmm
func VPCOMPRESSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCOMPRESSD.Forms(), sffxs{}, ops)
}
// VPCOMPRESSD_Z: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSD.Z xmm k m128
// VPCOMPRESSD.Z xmm k xmm
// VPCOMPRESSD.Z ymm k m256
// VPCOMPRESSD.Z ymm k ymm
// VPCOMPRESSD.Z zmm k m512
// VPCOMPRESSD.Z zmm k zmm
func VPCOMPRESSD_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCOMPRESSD.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
}
// VPCOMPRESSQ: Store Sparse Packed Quadword Integer Values into Dense Memory/Register.
//
// Forms:
//
// VPCOMPRESSQ xmm k m128
// VPCOMPRESSQ xmm k xmm
// VPCOMPRESSQ xmm m128
// VPCOMPRESSQ xmm xmm
// VPCOMPRESSQ ymm k m256
// VPCOMPRESSQ ymm k ymm
// VPCOMPRESSQ ymm m256
// VPCOMPRESSQ ymm ymm
// VPCOMPRESSQ zmm k m512
// VPCOMPRESSQ zmm k zmm
// VPCOMPRESSQ zmm m512
// VPCOMPRESSQ zmm zmm
func VPCOMPRESSQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCOMPRESSQ.Forms(), sffxs{}, ops)
}
// VPCOMPRESSQ_Z: Store Sparse Packed Quadword Integer Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCOMPRESSQ.Z xmm k m128
// VPCOMPRESSQ.Z xmm k xmm
// VPCOMPRESSQ.Z ymm k m256
// VPCOMPRESSQ.Z ymm k ymm
// VPCOMPRESSQ.Z zmm k m512
// VPCOMPRESSQ.Z zmm k zmm
func VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCOMPRESSQ.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
}
// VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTD m128 k xmm
// VPCONFLICTD m128 xmm
// VPCONFLICTD m256 k ymm
// VPCONFLICTD m256 ymm
// VPCONFLICTD xmm k xmm
// VPCONFLICTD xmm xmm
// VPCONFLICTD ymm k ymm
// VPCONFLICTD ymm ymm
// VPCONFLICTD m512 k zmm
// VPCONFLICTD m512 zmm
// VPCONFLICTD zmm k zmm
// VPCONFLICTD zmm zmm
func VPCONFLICTD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTD.Forms(), sffxs{}, ops)
}
// VPCONFLICTD_BCST: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTD.BCST m32 k xmm
// VPCONFLICTD.BCST m32 k ymm
// VPCONFLICTD.BCST m32 xmm
// VPCONFLICTD.BCST m32 ymm
// VPCONFLICTD.BCST m32 k zmm
// VPCONFLICTD.BCST m32 zmm
func VPCONFLICTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTD.Forms(), sffxs{sffxBCST}, ops)
}
// VPCONFLICTD_BCST_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.BCST.Z m32 k xmm
// VPCONFLICTD.BCST.Z m32 k ymm
// VPCONFLICTD.BCST.Z m32 k zmm
func VPCONFLICTD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPCONFLICTD_Z: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTD.Z m128 k xmm
// VPCONFLICTD.Z m256 k ymm
// VPCONFLICTD.Z xmm k xmm
// VPCONFLICTD.Z ymm k ymm
// VPCONFLICTD.Z m512 k zmm
// VPCONFLICTD.Z zmm k zmm
func VPCONFLICTD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPCONFLICTQ: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register.
//
// Forms:
//
// VPCONFLICTQ m128 k xmm
// VPCONFLICTQ m128 xmm
// VPCONFLICTQ m256 k ymm
// VPCONFLICTQ m256 ymm
// VPCONFLICTQ xmm k xmm
// VPCONFLICTQ xmm xmm
// VPCONFLICTQ ymm k ymm
// VPCONFLICTQ ymm ymm
// VPCONFLICTQ m512 k zmm
// VPCONFLICTQ m512 zmm
// VPCONFLICTQ zmm k zmm
// VPCONFLICTQ zmm zmm
func VPCONFLICTQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTQ.Forms(), sffxs{}, ops)
}
// VPCONFLICTQ_BCST: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast).
//
// Forms:
//
// VPCONFLICTQ.BCST m64 k xmm
// VPCONFLICTQ.BCST m64 k ymm
// VPCONFLICTQ.BCST m64 xmm
// VPCONFLICTQ.BCST m64 ymm
// VPCONFLICTQ.BCST m64 k zmm
// VPCONFLICTQ.BCST m64 zmm
func VPCONFLICTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPCONFLICTQ_BCST_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.BCST.Z m64 k xmm
// VPCONFLICTQ.BCST.Z m64 k ymm
// VPCONFLICTQ.BCST.Z m64 k zmm
func VPCONFLICTQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPCONFLICTQ_Z: Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPCONFLICTQ.Z m128 k xmm
// VPCONFLICTQ.Z m256 k ymm
// VPCONFLICTQ.Z xmm k xmm
// VPCONFLICTQ.Z ymm k ymm
// VPCONFLICTQ.Z m512 k zmm
// VPCONFLICTQ.Z zmm k zmm
func VPCONFLICTQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPCONFLICTQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPERM2F128: Permute Floating-Point Values.
//
// Forms:
//
// VPERM2F128 imm8 m256 ymm ymm
// VPERM2F128 imm8 ymm ymm ymm
func VPERM2F128(i, my, y, y1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERM2F128.Forms(), sffxs{}, []operand.Op{i, my, y, y1})
}
// VPERM2I128: Permute 128-Bit Integer Values.
//
// Forms:
//
// VPERM2I128 imm8 m256 ymm ymm
// VPERM2I128 imm8 ymm ymm ymm
func VPERM2I128(i, my, y, y1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERM2I128.Forms(), sffxs{}, []operand.Op{i, my, y, y1})
}
// VPERMB: Permute Byte Integers.
//
// Forms:
//
// VPERMB m128 xmm k xmm
// VPERMB m128 xmm xmm
// VPERMB m256 ymm k ymm
// VPERMB m256 ymm ymm
// VPERMB xmm xmm k xmm
// VPERMB xmm xmm xmm
// VPERMB ymm ymm k ymm
// VPERMB ymm ymm ymm
// VPERMB m512 zmm k zmm
// VPERMB m512 zmm zmm
// VPERMB zmm zmm k zmm
// VPERMB zmm zmm zmm
func VPERMB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMB.Forms(), sffxs{}, ops)
}
// VPERMB_Z: Permute Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPERMB.Z m128 xmm k xmm
// VPERMB.Z m256 ymm k ymm
// VPERMB.Z xmm xmm k xmm
// VPERMB.Z ymm ymm k ymm
// VPERMB.Z m512 zmm k zmm
// VPERMB.Z zmm zmm k zmm
func VPERMB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMD: Permute Doubleword Integers.
//
// Forms:
//
// VPERMD m256 ymm ymm
// VPERMD ymm ymm ymm
// VPERMD m256 ymm k ymm
// VPERMD ymm ymm k ymm
// VPERMD m512 zmm k zmm
// VPERMD m512 zmm zmm
// VPERMD zmm zmm k zmm
// VPERMD zmm zmm zmm
func VPERMD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMD.Forms(), sffxs{}, ops)
}
// VPERMD_BCST: Permute Doubleword Integers (Broadcast).
//
// Forms:
//
// VPERMD.BCST m32 ymm k ymm
// VPERMD.BCST m32 ymm ymm
// VPERMD.BCST m32 zmm k zmm
// VPERMD.BCST m32 zmm zmm
func VPERMD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMD.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMD_BCST_Z: Permute Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMD.BCST.Z m32 ymm k ymm
// VPERMD.BCST.Z m32 zmm k zmm
func VPERMD_BCST_Z(m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, yz, k, yz1})
}
// VPERMD_Z: Permute Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMD.Z m256 ymm k ymm
// VPERMD.Z ymm ymm k ymm
// VPERMD.Z m512 zmm k zmm
// VPERMD.Z zmm zmm k zmm
func VPERMD_Z(myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMD.Forms(), sffxs{sffxZ}, []operand.Op{myz, yz, k, yz1})
}
// VPERMI2B: Full Permute of Bytes From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2B m128 xmm k xmm
// VPERMI2B m128 xmm xmm
// VPERMI2B m256 ymm k ymm
// VPERMI2B m256 ymm ymm
// VPERMI2B xmm xmm k xmm
// VPERMI2B xmm xmm xmm
// VPERMI2B ymm ymm k ymm
// VPERMI2B ymm ymm ymm
// VPERMI2B m512 zmm k zmm
// VPERMI2B m512 zmm zmm
// VPERMI2B zmm zmm k zmm
// VPERMI2B zmm zmm zmm
func VPERMI2B(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2B.Forms(), sffxs{}, ops)
}
// VPERMI2B_Z: Full Permute of Bytes From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2B.Z m128 xmm k xmm
// VPERMI2B.Z m256 ymm k ymm
// VPERMI2B.Z xmm xmm k xmm
// VPERMI2B.Z ymm ymm k ymm
// VPERMI2B.Z m512 zmm k zmm
// VPERMI2B.Z zmm zmm k zmm
func VPERMI2B_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2B.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMI2D: Full Permute of Doublewords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2D m128 xmm k xmm
// VPERMI2D m128 xmm xmm
// VPERMI2D m256 ymm k ymm
// VPERMI2D m256 ymm ymm
// VPERMI2D xmm xmm k xmm
// VPERMI2D xmm xmm xmm
// VPERMI2D ymm ymm k ymm
// VPERMI2D ymm ymm ymm
// VPERMI2D m512 zmm k zmm
// VPERMI2D m512 zmm zmm
// VPERMI2D zmm zmm k zmm
// VPERMI2D zmm zmm zmm
func VPERMI2D(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2D.Forms(), sffxs{}, ops)
}
// VPERMI2D_BCST: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2D.BCST m32 xmm k xmm
// VPERMI2D.BCST m32 xmm xmm
// VPERMI2D.BCST m32 ymm k ymm
// VPERMI2D.BCST m32 ymm ymm
// VPERMI2D.BCST m32 zmm k zmm
// VPERMI2D.BCST m32 zmm zmm
func VPERMI2D_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2D.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMI2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2D.BCST.Z m32 xmm k xmm
// VPERMI2D.BCST.Z m32 ymm k ymm
// VPERMI2D.BCST.Z m32 zmm k zmm
func VPERMI2D_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2D.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMI2D_Z: Full Permute of Doublewords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2D.Z m128 xmm k xmm
// VPERMI2D.Z m256 ymm k ymm
// VPERMI2D.Z xmm xmm k xmm
// VPERMI2D.Z ymm ymm k ymm
// VPERMI2D.Z m512 zmm k zmm
// VPERMI2D.Z zmm zmm k zmm
func VPERMI2D_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2D.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMI2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PD m128 xmm k xmm
// VPERMI2PD m128 xmm xmm
// VPERMI2PD m256 ymm k ymm
// VPERMI2PD m256 ymm ymm
// VPERMI2PD xmm xmm k xmm
// VPERMI2PD xmm xmm xmm
// VPERMI2PD ymm ymm k ymm
// VPERMI2PD ymm ymm ymm
// VPERMI2PD m512 zmm k zmm
// VPERMI2PD m512 zmm zmm
// VPERMI2PD zmm zmm k zmm
// VPERMI2PD zmm zmm zmm
func VPERMI2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PD.Forms(), sffxs{}, ops)
}
// VPERMI2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PD.BCST m64 xmm k xmm
// VPERMI2PD.BCST m64 xmm xmm
// VPERMI2PD.BCST m64 ymm k ymm
// VPERMI2PD.BCST m64 ymm ymm
// VPERMI2PD.BCST m64 zmm k zmm
// VPERMI2PD.BCST m64 zmm zmm
func VPERMI2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMI2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.BCST.Z m64 xmm k xmm
// VPERMI2PD.BCST.Z m64 ymm k ymm
// VPERMI2PD.BCST.Z m64 zmm k zmm
func VPERMI2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMI2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PD.Z m128 xmm k xmm
// VPERMI2PD.Z m256 ymm k ymm
// VPERMI2PD.Z xmm xmm k xmm
// VPERMI2PD.Z ymm ymm k ymm
// VPERMI2PD.Z m512 zmm k zmm
// VPERMI2PD.Z zmm zmm k zmm
func VPERMI2PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMI2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2PS m128 xmm k xmm
// VPERMI2PS m128 xmm xmm
// VPERMI2PS m256 ymm k ymm
// VPERMI2PS m256 ymm ymm
// VPERMI2PS xmm xmm k xmm
// VPERMI2PS xmm xmm xmm
// VPERMI2PS ymm ymm k ymm
// VPERMI2PS ymm ymm ymm
// VPERMI2PS m512 zmm k zmm
// VPERMI2PS m512 zmm zmm
// VPERMI2PS zmm zmm k zmm
// VPERMI2PS zmm zmm zmm
func VPERMI2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PS.Forms(), sffxs{}, ops)
}
// VPERMI2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2PS.BCST m32 xmm k xmm
// VPERMI2PS.BCST m32 xmm xmm
// VPERMI2PS.BCST m32 ymm k ymm
// VPERMI2PS.BCST m32 ymm ymm
// VPERMI2PS.BCST m32 zmm k zmm
// VPERMI2PS.BCST m32 zmm zmm
func VPERMI2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMI2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.BCST.Z m32 xmm k xmm
// VPERMI2PS.BCST.Z m32 ymm k ymm
// VPERMI2PS.BCST.Z m32 zmm k zmm
func VPERMI2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMI2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2PS.Z m128 xmm k xmm
// VPERMI2PS.Z m256 ymm k ymm
// VPERMI2PS.Z xmm xmm k xmm
// VPERMI2PS.Z ymm ymm k ymm
// VPERMI2PS.Z m512 zmm k zmm
// VPERMI2PS.Z zmm zmm k zmm
func VPERMI2PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMI2Q: Full Permute of Quadwords From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2Q m128 xmm k xmm
// VPERMI2Q m128 xmm xmm
// VPERMI2Q m256 ymm k ymm
// VPERMI2Q m256 ymm ymm
// VPERMI2Q xmm xmm k xmm
// VPERMI2Q xmm xmm xmm
// VPERMI2Q ymm ymm k ymm
// VPERMI2Q ymm ymm ymm
// VPERMI2Q m512 zmm k zmm
// VPERMI2Q m512 zmm zmm
// VPERMI2Q zmm zmm k zmm
// VPERMI2Q zmm zmm zmm
func VPERMI2Q(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2Q.Forms(), sffxs{}, ops)
}
// VPERMI2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast).
//
// Forms:
//
// VPERMI2Q.BCST m64 xmm k xmm
// VPERMI2Q.BCST m64 xmm xmm
// VPERMI2Q.BCST m64 ymm k ymm
// VPERMI2Q.BCST m64 ymm ymm
// VPERMI2Q.BCST m64 zmm k zmm
// VPERMI2Q.BCST m64 zmm zmm
func VPERMI2Q_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2Q.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMI2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.BCST.Z m64 xmm k xmm
// VPERMI2Q.BCST.Z m64 ymm k ymm
// VPERMI2Q.BCST.Z m64 zmm k zmm
func VPERMI2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2Q.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMI2Q_Z: Full Permute of Quadwords From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2Q.Z m128 xmm k xmm
// VPERMI2Q.Z m256 ymm k ymm
// VPERMI2Q.Z xmm xmm k xmm
// VPERMI2Q.Z ymm ymm k ymm
// VPERMI2Q.Z m512 zmm k zmm
// VPERMI2Q.Z zmm zmm k zmm
func VPERMI2Q_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2Q.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMI2W: Full Permute of Words From Two Tables Overwriting the Index.
//
// Forms:
//
// VPERMI2W m128 xmm k xmm
// VPERMI2W m128 xmm xmm
// VPERMI2W m256 ymm k ymm
// VPERMI2W m256 ymm ymm
// VPERMI2W xmm xmm k xmm
// VPERMI2W xmm xmm xmm
// VPERMI2W ymm ymm k ymm
// VPERMI2W ymm ymm ymm
// VPERMI2W m512 zmm k zmm
// VPERMI2W m512 zmm zmm
// VPERMI2W zmm zmm k zmm
// VPERMI2W zmm zmm zmm
func VPERMI2W(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2W.Forms(), sffxs{}, ops)
}
// VPERMI2W_Z: Full Permute of Words From Two Tables Overwriting the Index (Zeroing Masking).
//
// Forms:
//
// VPERMI2W.Z m128 xmm k xmm
// VPERMI2W.Z m256 ymm k ymm
// VPERMI2W.Z xmm xmm k xmm
// VPERMI2W.Z ymm ymm k ymm
// VPERMI2W.Z m512 zmm k zmm
// VPERMI2W.Z zmm zmm k zmm
func VPERMI2W_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMI2W.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMILPD: Permute Double-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPD imm8 m128 xmm
// VPERMILPD imm8 m256 ymm
// VPERMILPD imm8 xmm xmm
// VPERMILPD imm8 ymm ymm
// VPERMILPD m128 xmm xmm
// VPERMILPD m256 ymm ymm
// VPERMILPD xmm xmm xmm
// VPERMILPD ymm ymm ymm
// VPERMILPD imm8 m128 k xmm
// VPERMILPD imm8 m256 k ymm
// VPERMILPD imm8 xmm k xmm
// VPERMILPD imm8 ymm k ymm
// VPERMILPD m128 xmm k xmm
// VPERMILPD m256 ymm k ymm
// VPERMILPD xmm xmm k xmm
// VPERMILPD ymm ymm k ymm
// VPERMILPD imm8 m512 k zmm
// VPERMILPD imm8 m512 zmm
// VPERMILPD imm8 zmm k zmm
// VPERMILPD imm8 zmm zmm
// VPERMILPD m512 zmm k zmm
// VPERMILPD m512 zmm zmm
// VPERMILPD zmm zmm k zmm
// VPERMILPD zmm zmm zmm
func VPERMILPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPD.Forms(), sffxs{}, ops)
}
// VPERMILPD_BCST: Permute Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPD.BCST imm8 m64 k xmm
// VPERMILPD.BCST imm8 m64 k ymm
// VPERMILPD.BCST imm8 m64 xmm
// VPERMILPD.BCST imm8 m64 ymm
// VPERMILPD.BCST m64 xmm k xmm
// VPERMILPD.BCST m64 xmm xmm
// VPERMILPD.BCST m64 ymm k ymm
// VPERMILPD.BCST m64 ymm ymm
// VPERMILPD.BCST imm8 m64 k zmm
// VPERMILPD.BCST imm8 m64 zmm
// VPERMILPD.BCST m64 zmm k zmm
// VPERMILPD.BCST m64 zmm zmm
func VPERMILPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPD.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMILPD_BCST_Z: Permute Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPD.BCST.Z imm8 m64 k xmm
// VPERMILPD.BCST.Z imm8 m64 k ymm
// VPERMILPD.BCST.Z m64 xmm k xmm
// VPERMILPD.BCST.Z m64 ymm k ymm
// VPERMILPD.BCST.Z imm8 m64 k zmm
// VPERMILPD.BCST.Z m64 zmm k zmm
func VPERMILPD_BCST_Z(im, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{im, mxyz, k, xyz})
}
// VPERMILPD_Z: Permute Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPD.Z imm8 m128 k xmm
// VPERMILPD.Z imm8 m256 k ymm
// VPERMILPD.Z imm8 xmm k xmm
// VPERMILPD.Z imm8 ymm k ymm
// VPERMILPD.Z m128 xmm k xmm
// VPERMILPD.Z m256 ymm k ymm
// VPERMILPD.Z xmm xmm k xmm
// VPERMILPD.Z ymm ymm k ymm
// VPERMILPD.Z imm8 m512 k zmm
// VPERMILPD.Z imm8 zmm k zmm
// VPERMILPD.Z m512 zmm k zmm
// VPERMILPD.Z zmm zmm k zmm
func VPERMILPD_Z(imxyz, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPD.Forms(), sffxs{sffxZ}, []operand.Op{imxyz, mxyz, k, xyz})
}
// VPERMILPS: Permute Single-Precision Floating-Point Values.
//
// Forms:
//
// VPERMILPS imm8 m128 xmm
// VPERMILPS imm8 m256 ymm
// VPERMILPS imm8 xmm xmm
// VPERMILPS imm8 ymm ymm
// VPERMILPS m128 xmm xmm
// VPERMILPS m256 ymm ymm
// VPERMILPS xmm xmm xmm
// VPERMILPS ymm ymm ymm
// VPERMILPS imm8 m128 k xmm
// VPERMILPS imm8 m256 k ymm
// VPERMILPS imm8 xmm k xmm
// VPERMILPS imm8 ymm k ymm
// VPERMILPS m128 xmm k xmm
// VPERMILPS m256 ymm k ymm
// VPERMILPS xmm xmm k xmm
// VPERMILPS ymm ymm k ymm
// VPERMILPS imm8 m512 k zmm
// VPERMILPS imm8 m512 zmm
// VPERMILPS imm8 zmm k zmm
// VPERMILPS imm8 zmm zmm
// VPERMILPS m512 zmm k zmm
// VPERMILPS m512 zmm zmm
// VPERMILPS zmm zmm k zmm
// VPERMILPS zmm zmm zmm
func VPERMILPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPS.Forms(), sffxs{}, ops)
}
// VPERMILPS_BCST: Permute Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VPERMILPS.BCST imm8 m32 k xmm
// VPERMILPS.BCST imm8 m32 k ymm
// VPERMILPS.BCST imm8 m32 xmm
// VPERMILPS.BCST imm8 m32 ymm
// VPERMILPS.BCST m32 xmm k xmm
// VPERMILPS.BCST m32 xmm xmm
// VPERMILPS.BCST m32 ymm k ymm
// VPERMILPS.BCST m32 ymm ymm
// VPERMILPS.BCST imm8 m32 k zmm
// VPERMILPS.BCST imm8 m32 zmm
// VPERMILPS.BCST m32 zmm k zmm
// VPERMILPS.BCST m32 zmm zmm
func VPERMILPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPS.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMILPS_BCST_Z: Permute Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMILPS.BCST.Z imm8 m32 k xmm
// VPERMILPS.BCST.Z imm8 m32 k ymm
// VPERMILPS.BCST.Z m32 xmm k xmm
// VPERMILPS.BCST.Z m32 ymm k ymm
// VPERMILPS.BCST.Z imm8 m32 k zmm
// VPERMILPS.BCST.Z m32 zmm k zmm
func VPERMILPS_BCST_Z(im, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{im, mxyz, k, xyz})
}
// VPERMILPS_Z: Permute Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VPERMILPS.Z imm8 m128 k xmm
// VPERMILPS.Z imm8 m256 k ymm
// VPERMILPS.Z imm8 xmm k xmm
// VPERMILPS.Z imm8 ymm k ymm
// VPERMILPS.Z m128 xmm k xmm
// VPERMILPS.Z m256 ymm k ymm
// VPERMILPS.Z xmm xmm k xmm
// VPERMILPS.Z ymm ymm k ymm
// VPERMILPS.Z imm8 m512 k zmm
// VPERMILPS.Z imm8 zmm k zmm
// VPERMILPS.Z m512 zmm k zmm
// VPERMILPS.Z zmm zmm k zmm
func VPERMILPS_Z(imxyz, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMILPS.Forms(), sffxs{sffxZ}, []operand.Op{imxyz, mxyz, k, xyz})
}
// VPERMPD: Permute Double-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPD imm8 m256 ymm
// VPERMPD imm8 ymm ymm
// VPERMPD imm8 m256 k ymm
// VPERMPD imm8 ymm k ymm
// VPERMPD m256 ymm k ymm
// VPERMPD m256 ymm ymm
// VPERMPD ymm ymm k ymm
// VPERMPD ymm ymm ymm
// VPERMPD imm8 m512 k zmm
// VPERMPD imm8 m512 zmm
// VPERMPD imm8 zmm k zmm
// VPERMPD imm8 zmm zmm
// VPERMPD m512 zmm k zmm
// VPERMPD m512 zmm zmm
// VPERMPD zmm zmm k zmm
// VPERMPD zmm zmm zmm
func VPERMPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPD.Forms(), sffxs{}, ops)
}
// VPERMPD_BCST: Permute Double-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPD.BCST imm8 m64 k ymm
// VPERMPD.BCST imm8 m64 ymm
// VPERMPD.BCST m64 ymm k ymm
// VPERMPD.BCST m64 ymm ymm
// VPERMPD.BCST imm8 m64 k zmm
// VPERMPD.BCST imm8 m64 zmm
// VPERMPD.BCST m64 zmm k zmm
// VPERMPD.BCST m64 zmm zmm
func VPERMPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPD.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMPD_BCST_Z: Permute Double-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPD.BCST.Z imm8 m64 k ymm
// VPERMPD.BCST.Z m64 ymm k ymm
// VPERMPD.BCST.Z imm8 m64 k zmm
// VPERMPD.BCST.Z m64 zmm k zmm
func VPERMPD_BCST_Z(im, myz, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{im, myz, k, yz})
}
// VPERMPD_Z: Permute Double-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPD.Z imm8 m256 k ymm
// VPERMPD.Z imm8 ymm k ymm
// VPERMPD.Z m256 ymm k ymm
// VPERMPD.Z ymm ymm k ymm
// VPERMPD.Z imm8 m512 k zmm
// VPERMPD.Z imm8 zmm k zmm
// VPERMPD.Z m512 zmm k zmm
// VPERMPD.Z zmm zmm k zmm
func VPERMPD_Z(imyz, myz, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPD.Forms(), sffxs{sffxZ}, []operand.Op{imyz, myz, k, yz})
}
// VPERMPS: Permute Single-Precision Floating-Point Elements.
//
// Forms:
//
// VPERMPS m256 ymm ymm
// VPERMPS ymm ymm ymm
// VPERMPS m256 ymm k ymm
// VPERMPS ymm ymm k ymm
// VPERMPS m512 zmm k zmm
// VPERMPS m512 zmm zmm
// VPERMPS zmm zmm k zmm
// VPERMPS zmm zmm zmm
func VPERMPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPS.Forms(), sffxs{}, ops)
}
// VPERMPS_BCST: Permute Single-Precision Floating-Point Elements (Broadcast).
//
// Forms:
//
// VPERMPS.BCST m32 ymm k ymm
// VPERMPS.BCST m32 ymm ymm
// VPERMPS.BCST m32 zmm k zmm
// VPERMPS.BCST m32 zmm zmm
func VPERMPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPS.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMPS_BCST_Z: Permute Single-Precision Floating-Point Elements (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMPS.BCST.Z m32 ymm k ymm
// VPERMPS.BCST.Z m32 zmm k zmm
func VPERMPS_BCST_Z(m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, yz, k, yz1})
}
// VPERMPS_Z: Permute Single-Precision Floating-Point Elements (Zeroing Masking).
//
// Forms:
//
// VPERMPS.Z m256 ymm k ymm
// VPERMPS.Z ymm ymm k ymm
// VPERMPS.Z m512 zmm k zmm
// VPERMPS.Z zmm zmm k zmm
func VPERMPS_Z(myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMPS.Forms(), sffxs{sffxZ}, []operand.Op{myz, yz, k, yz1})
}
// VPERMQ: Permute Quadword Integers.
//
// Forms:
//
// VPERMQ imm8 m256 ymm
// VPERMQ imm8 ymm ymm
// VPERMQ imm8 m256 k ymm
// VPERMQ imm8 ymm k ymm
// VPERMQ m256 ymm k ymm
// VPERMQ m256 ymm ymm
// VPERMQ ymm ymm k ymm
// VPERMQ ymm ymm ymm
// VPERMQ imm8 m512 k zmm
// VPERMQ imm8 m512 zmm
// VPERMQ imm8 zmm k zmm
// VPERMQ imm8 zmm zmm
// VPERMQ m512 zmm k zmm
// VPERMQ m512 zmm zmm
// VPERMQ zmm zmm k zmm
// VPERMQ zmm zmm zmm
func VPERMQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMQ.Forms(), sffxs{}, ops)
}
// VPERMQ_BCST: Permute Quadword Integers (Broadcast).
//
// Forms:
//
// VPERMQ.BCST imm8 m64 k ymm
// VPERMQ.BCST imm8 m64 ymm
// VPERMQ.BCST m64 ymm k ymm
// VPERMQ.BCST m64 ymm ymm
// VPERMQ.BCST imm8 m64 k zmm
// VPERMQ.BCST imm8 m64 zmm
// VPERMQ.BCST m64 zmm k zmm
// VPERMQ.BCST m64 zmm zmm
func VPERMQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMQ_BCST_Z: Permute Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMQ.BCST.Z imm8 m64 k ymm
// VPERMQ.BCST.Z m64 ymm k ymm
// VPERMQ.BCST.Z imm8 m64 k zmm
// VPERMQ.BCST.Z m64 zmm k zmm
func VPERMQ_BCST_Z(im, myz, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{im, myz, k, yz})
}
// VPERMQ_Z: Permute Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPERMQ.Z imm8 m256 k ymm
// VPERMQ.Z imm8 ymm k ymm
// VPERMQ.Z m256 ymm k ymm
// VPERMQ.Z ymm ymm k ymm
// VPERMQ.Z imm8 m512 k zmm
// VPERMQ.Z imm8 zmm k zmm
// VPERMQ.Z m512 zmm k zmm
// VPERMQ.Z zmm zmm k zmm
func VPERMQ_Z(imyz, myz, k, yz operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMQ.Forms(), sffxs{sffxZ}, []operand.Op{imyz, myz, k, yz})
}
// VPERMT2B: Full Permute of Bytes From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2B m128 xmm k xmm
// VPERMT2B m128 xmm xmm
// VPERMT2B m256 ymm k ymm
// VPERMT2B m256 ymm ymm
// VPERMT2B xmm xmm k xmm
// VPERMT2B xmm xmm xmm
// VPERMT2B ymm ymm k ymm
// VPERMT2B ymm ymm ymm
// VPERMT2B m512 zmm k zmm
// VPERMT2B m512 zmm zmm
// VPERMT2B zmm zmm k zmm
// VPERMT2B zmm zmm zmm
func VPERMT2B(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2B.Forms(), sffxs{}, ops)
}
// VPERMT2B_Z: Full Permute of Bytes From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2B.Z m128 xmm k xmm
// VPERMT2B.Z m256 ymm k ymm
// VPERMT2B.Z xmm xmm k xmm
// VPERMT2B.Z ymm ymm k ymm
// VPERMT2B.Z m512 zmm k zmm
// VPERMT2B.Z zmm zmm k zmm
func VPERMT2B_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2B.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMT2D: Full Permute of Doublewords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2D m128 xmm k xmm
// VPERMT2D m128 xmm xmm
// VPERMT2D m256 ymm k ymm
// VPERMT2D m256 ymm ymm
// VPERMT2D xmm xmm k xmm
// VPERMT2D xmm xmm xmm
// VPERMT2D ymm ymm k ymm
// VPERMT2D ymm ymm ymm
// VPERMT2D m512 zmm k zmm
// VPERMT2D m512 zmm zmm
// VPERMT2D zmm zmm k zmm
// VPERMT2D zmm zmm zmm
func VPERMT2D(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2D.Forms(), sffxs{}, ops)
}
// VPERMT2D_BCST: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2D.BCST m32 xmm k xmm
// VPERMT2D.BCST m32 xmm xmm
// VPERMT2D.BCST m32 ymm k ymm
// VPERMT2D.BCST m32 ymm ymm
// VPERMT2D.BCST m32 zmm k zmm
// VPERMT2D.BCST m32 zmm zmm
func VPERMT2D_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2D.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMT2D_BCST_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2D.BCST.Z m32 xmm k xmm
// VPERMT2D.BCST.Z m32 ymm k ymm
// VPERMT2D.BCST.Z m32 zmm k zmm
func VPERMT2D_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2D.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMT2D_Z: Full Permute of Doublewords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2D.Z m128 xmm k xmm
// VPERMT2D.Z m256 ymm k ymm
// VPERMT2D.Z xmm xmm k xmm
// VPERMT2D.Z ymm ymm k ymm
// VPERMT2D.Z m512 zmm k zmm
// VPERMT2D.Z zmm zmm k zmm
func VPERMT2D_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2D.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMT2PD: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PD m128 xmm k xmm
// VPERMT2PD m128 xmm xmm
// VPERMT2PD m256 ymm k ymm
// VPERMT2PD m256 ymm ymm
// VPERMT2PD xmm xmm k xmm
// VPERMT2PD xmm xmm xmm
// VPERMT2PD ymm ymm k ymm
// VPERMT2PD ymm ymm ymm
// VPERMT2PD m512 zmm k zmm
// VPERMT2PD m512 zmm zmm
// VPERMT2PD zmm zmm k zmm
// VPERMT2PD zmm zmm zmm
func VPERMT2PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PD.Forms(), sffxs{}, ops)
}
// VPERMT2PD_BCST: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PD.BCST m64 xmm k xmm
// VPERMT2PD.BCST m64 xmm xmm
// VPERMT2PD.BCST m64 ymm k ymm
// VPERMT2PD.BCST m64 ymm ymm
// VPERMT2PD.BCST m64 zmm k zmm
// VPERMT2PD.BCST m64 zmm zmm
func VPERMT2PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PD.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMT2PD_BCST_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.BCST.Z m64 xmm k xmm
// VPERMT2PD.BCST.Z m64 ymm k ymm
// VPERMT2PD.BCST.Z m64 zmm k zmm
func VPERMT2PD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMT2PD_Z: Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PD.Z m128 xmm k xmm
// VPERMT2PD.Z m256 ymm k ymm
// VPERMT2PD.Z xmm xmm k xmm
// VPERMT2PD.Z ymm ymm k ymm
// VPERMT2PD.Z m512 zmm k zmm
// VPERMT2PD.Z zmm zmm k zmm
func VPERMT2PD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMT2PS: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2PS m128 xmm k xmm
// VPERMT2PS m128 xmm xmm
// VPERMT2PS m256 ymm k ymm
// VPERMT2PS m256 ymm ymm
// VPERMT2PS xmm xmm k xmm
// VPERMT2PS xmm xmm xmm
// VPERMT2PS ymm ymm k ymm
// VPERMT2PS ymm ymm ymm
// VPERMT2PS m512 zmm k zmm
// VPERMT2PS m512 zmm zmm
// VPERMT2PS zmm zmm k zmm
// VPERMT2PS zmm zmm zmm
func VPERMT2PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PS.Forms(), sffxs{}, ops)
}
// VPERMT2PS_BCST: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2PS.BCST m32 xmm k xmm
// VPERMT2PS.BCST m32 xmm xmm
// VPERMT2PS.BCST m32 ymm k ymm
// VPERMT2PS.BCST m32 ymm ymm
// VPERMT2PS.BCST m32 zmm k zmm
// VPERMT2PS.BCST m32 zmm zmm
func VPERMT2PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PS.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMT2PS_BCST_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.BCST.Z m32 xmm k xmm
// VPERMT2PS.BCST.Z m32 ymm k ymm
// VPERMT2PS.BCST.Z m32 zmm k zmm
func VPERMT2PS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMT2PS_Z: Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2PS.Z m128 xmm k xmm
// VPERMT2PS.Z m256 ymm k ymm
// VPERMT2PS.Z xmm xmm k xmm
// VPERMT2PS.Z ymm ymm k ymm
// VPERMT2PS.Z m512 zmm k zmm
// VPERMT2PS.Z zmm zmm k zmm
func VPERMT2PS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMT2Q: Full Permute of Quadwords From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2Q m128 xmm k xmm
// VPERMT2Q m128 xmm xmm
// VPERMT2Q m256 ymm k ymm
// VPERMT2Q m256 ymm ymm
// VPERMT2Q xmm xmm k xmm
// VPERMT2Q xmm xmm xmm
// VPERMT2Q ymm ymm k ymm
// VPERMT2Q ymm ymm ymm
// VPERMT2Q m512 zmm k zmm
// VPERMT2Q m512 zmm zmm
// VPERMT2Q zmm zmm k zmm
// VPERMT2Q zmm zmm zmm
func VPERMT2Q(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2Q.Forms(), sffxs{}, ops)
}
// VPERMT2Q_BCST: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast).
//
// Forms:
//
// VPERMT2Q.BCST m64 xmm k xmm
// VPERMT2Q.BCST m64 xmm xmm
// VPERMT2Q.BCST m64 ymm k ymm
// VPERMT2Q.BCST m64 ymm ymm
// VPERMT2Q.BCST m64 zmm k zmm
// VPERMT2Q.BCST m64 zmm zmm
func VPERMT2Q_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2Q.Forms(), sffxs{sffxBCST}, ops)
}
// VPERMT2Q_BCST_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.BCST.Z m64 xmm k xmm
// VPERMT2Q.BCST.Z m64 ymm k ymm
// VPERMT2Q.BCST.Z m64 zmm k zmm
func VPERMT2Q_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2Q.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPERMT2Q_Z: Full Permute of Quadwords From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2Q.Z m128 xmm k xmm
// VPERMT2Q.Z m256 ymm k ymm
// VPERMT2Q.Z xmm xmm k xmm
// VPERMT2Q.Z ymm ymm k ymm
// VPERMT2Q.Z m512 zmm k zmm
// VPERMT2Q.Z zmm zmm k zmm
func VPERMT2Q_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2Q.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMT2W: Full Permute of Words From Two Tables Overwriting a Table.
//
// Forms:
//
// VPERMT2W m128 xmm k xmm
// VPERMT2W m128 xmm xmm
// VPERMT2W m256 ymm k ymm
// VPERMT2W m256 ymm ymm
// VPERMT2W xmm xmm k xmm
// VPERMT2W xmm xmm xmm
// VPERMT2W ymm ymm k ymm
// VPERMT2W ymm ymm ymm
// VPERMT2W m512 zmm k zmm
// VPERMT2W m512 zmm zmm
// VPERMT2W zmm zmm k zmm
// VPERMT2W zmm zmm zmm
func VPERMT2W(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2W.Forms(), sffxs{}, ops)
}
// VPERMT2W_Z: Full Permute of Words From Two Tables Overwriting a Table (Zeroing Masking).
//
// Forms:
//
// VPERMT2W.Z m128 xmm k xmm
// VPERMT2W.Z m256 ymm k ymm
// VPERMT2W.Z xmm xmm k xmm
// VPERMT2W.Z ymm ymm k ymm
// VPERMT2W.Z m512 zmm k zmm
// VPERMT2W.Z zmm zmm k zmm
func VPERMT2W_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMT2W.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPERMW: Permute Word Integers.
//
// Forms:
//
// VPERMW m128 xmm k xmm
// VPERMW m128 xmm xmm
// VPERMW m256 ymm k ymm
// VPERMW m256 ymm ymm
// VPERMW xmm xmm k xmm
// VPERMW xmm xmm xmm
// VPERMW ymm ymm k ymm
// VPERMW ymm ymm ymm
// VPERMW m512 zmm k zmm
// VPERMW m512 zmm zmm
// VPERMW zmm zmm k zmm
// VPERMW zmm zmm zmm
func VPERMW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMW.Forms(), sffxs{}, ops)
}
// VPERMW_Z: Permute Word Integers (Zeroing Masking).
//
// Forms:
//
// VPERMW.Z m128 xmm k xmm
// VPERMW.Z m256 ymm k ymm
// VPERMW.Z xmm xmm k xmm
// VPERMW.Z ymm ymm k ymm
// VPERMW.Z m512 zmm k zmm
// VPERMW.Z zmm zmm k zmm
func VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPERMW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDD m128 k xmm
// VPEXPANDD m128 xmm
// VPEXPANDD m256 k ymm
// VPEXPANDD m256 ymm
// VPEXPANDD xmm k xmm
// VPEXPANDD xmm xmm
// VPEXPANDD ymm k ymm
// VPEXPANDD ymm ymm
// VPEXPANDD m512 k zmm
// VPEXPANDD m512 zmm
// VPEXPANDD zmm k zmm
// VPEXPANDD zmm zmm
func VPEXPANDD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXPANDD.Forms(), sffxs{}, ops)
}
// VPEXPANDD_Z: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDD.Z m128 k xmm
// VPEXPANDD.Z m256 k ymm
// VPEXPANDD.Z xmm k xmm
// VPEXPANDD.Z ymm k ymm
// VPEXPANDD.Z m512 k zmm
// VPEXPANDD.Z zmm k zmm
func VPEXPANDD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXPANDD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPEXPANDQ: Load Sparse Packed Quadword Integer Values from Dense Memory/Register.
//
// Forms:
//
// VPEXPANDQ m128 k xmm
// VPEXPANDQ m128 xmm
// VPEXPANDQ m256 k ymm
// VPEXPANDQ m256 ymm
// VPEXPANDQ xmm k xmm
// VPEXPANDQ xmm xmm
// VPEXPANDQ ymm k ymm
// VPEXPANDQ ymm ymm
// VPEXPANDQ m512 k zmm
// VPEXPANDQ m512 zmm
// VPEXPANDQ zmm k zmm
// VPEXPANDQ zmm zmm
func VPEXPANDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXPANDQ.Forms(), sffxs{}, ops)
}
// VPEXPANDQ_Z: Load Sparse Packed Quadword Integer Values from Dense Memory/Register (Zeroing Masking).
//
// Forms:
//
// VPEXPANDQ.Z m128 k xmm
// VPEXPANDQ.Z m256 k ymm
// VPEXPANDQ.Z xmm k xmm
// VPEXPANDQ.Z ymm k ymm
// VPEXPANDQ.Z m512 k zmm
// VPEXPANDQ.Z zmm k zmm
func VPEXPANDQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXPANDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPEXTRB: Extract Byte.
//
// Forms:
//
// VPEXTRB imm8 xmm m8
// VPEXTRB imm8 xmm r32
func VPEXTRB(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXTRB.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// VPEXTRD: Extract Doubleword.
//
// Forms:
//
// VPEXTRD imm8 xmm m32
// VPEXTRD imm8 xmm r32
func VPEXTRD(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXTRD.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// VPEXTRQ: Extract Quadword.
//
// Forms:
//
// VPEXTRQ imm8 xmm m64
// VPEXTRQ imm8 xmm r64
func VPEXTRQ(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXTRQ.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// VPEXTRW: Extract Word.
//
// Forms:
//
// VPEXTRW imm8 xmm m16
// VPEXTRW imm8 xmm r32
func VPEXTRW(i, x, mr operand.Op) (*intrep.Instruction, error) {
return build(opcVPEXTRW.Forms(), sffxs{}, []operand.Op{i, x, mr})
}
// VPGATHERDD: Gather Packed Doubleword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDD xmm vm32x xmm
// VPGATHERDD ymm vm32y ymm
// VPGATHERDD vm32x k xmm
// VPGATHERDD vm32y k ymm
// VPGATHERDD vm32z k zmm
func VPGATHERDD(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPGATHERDD.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VPGATHERDQ: Gather Packed Quadword Values Using Signed Doubleword Indices.
//
// Forms:
//
// VPGATHERDQ xmm vm32x xmm
// VPGATHERDQ ymm vm32x ymm
// VPGATHERDQ vm32x k xmm
// VPGATHERDQ vm32x k ymm
// VPGATHERDQ vm32y k zmm
func VPGATHERDQ(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPGATHERDQ.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VPGATHERQD: Gather Packed Doubleword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQD xmm vm64x xmm
// VPGATHERQD xmm vm64y xmm
// VPGATHERQD vm64x k xmm
// VPGATHERQD vm64y k xmm
// VPGATHERQD vm64z k ymm
func VPGATHERQD(vx, kv, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVPGATHERQD.Forms(), sffxs{}, []operand.Op{vx, kv, xy})
}
// VPGATHERQQ: Gather Packed Quadword Values Using Signed Quadword Indices.
//
// Forms:
//
// VPGATHERQQ xmm vm64x xmm
// VPGATHERQQ ymm vm64y ymm
// VPGATHERQQ vm64x k xmm
// VPGATHERQQ vm64y k ymm
// VPGATHERQQ vm64z k zmm
func VPGATHERQQ(vxy, kv, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPGATHERQQ.Forms(), sffxs{}, []operand.Op{vxy, kv, xyz})
}
// VPHADDD: Packed Horizontal Add Doubleword Integer.
//
// Forms:
//
// VPHADDD m256 ymm ymm
// VPHADDD ymm ymm ymm
// VPHADDD m128 xmm xmm
// VPHADDD xmm xmm xmm
func VPHADDD(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHADDD.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPHADDSW: Packed Horizontal Add Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHADDSW m256 ymm ymm
// VPHADDSW ymm ymm ymm
// VPHADDSW m128 xmm xmm
// VPHADDSW xmm xmm xmm
func VPHADDSW(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHADDSW.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPHADDW: Packed Horizontal Add Word Integers.
//
// Forms:
//
// VPHADDW m256 ymm ymm
// VPHADDW ymm ymm ymm
// VPHADDW m128 xmm xmm
// VPHADDW xmm xmm xmm
func VPHADDW(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHADDW.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPHMINPOSUW: Packed Horizontal Minimum of Unsigned Word Integers.
//
// Forms:
//
// VPHMINPOSUW m128 xmm
// VPHMINPOSUW xmm xmm
func VPHMINPOSUW(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVPHMINPOSUW.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VPHSUBD: Packed Horizontal Subtract Doubleword Integers.
//
// Forms:
//
// VPHSUBD m256 ymm ymm
// VPHSUBD ymm ymm ymm
// VPHSUBD m128 xmm xmm
// VPHSUBD xmm xmm xmm
func VPHSUBD(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHSUBD.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPHSUBSW: Packed Horizontal Subtract Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPHSUBSW m256 ymm ymm
// VPHSUBSW ymm ymm ymm
// VPHSUBSW m128 xmm xmm
// VPHSUBSW xmm xmm xmm
func VPHSUBSW(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHSUBSW.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPHSUBW: Packed Horizontal Subtract Word Integers.
//
// Forms:
//
// VPHSUBW m256 ymm ymm
// VPHSUBW ymm ymm ymm
// VPHSUBW m128 xmm xmm
// VPHSUBW xmm xmm xmm
func VPHSUBW(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPHSUBW.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPINSRB: Insert Byte.
//
// Forms:
//
// VPINSRB imm8 m8 xmm xmm
// VPINSRB imm8 r32 xmm xmm
func VPINSRB(i, mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPINSRB.Forms(), sffxs{}, []operand.Op{i, mr, x, x1})
}
// VPINSRD: Insert Doubleword.
//
// Forms:
//
// VPINSRD imm8 m32 xmm xmm
// VPINSRD imm8 r32 xmm xmm
func VPINSRD(i, mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPINSRD.Forms(), sffxs{}, []operand.Op{i, mr, x, x1})
}
// VPINSRQ: Insert Quadword.
//
// Forms:
//
// VPINSRQ imm8 m64 xmm xmm
// VPINSRQ imm8 r64 xmm xmm
func VPINSRQ(i, mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPINSRQ.Forms(), sffxs{}, []operand.Op{i, mr, x, x1})
}
// VPINSRW: Insert Word.
//
// Forms:
//
// VPINSRW imm8 m16 xmm xmm
// VPINSRW imm8 r32 xmm xmm
func VPINSRW(i, mr, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPINSRW.Forms(), sffxs{}, []operand.Op{i, mr, x, x1})
}
// VPLZCNTD: Count the Number of Leading Zero Bits for Packed Doubleword Values.
//
// Forms:
//
// VPLZCNTD m128 k xmm
// VPLZCNTD m128 xmm
// VPLZCNTD m256 k ymm
// VPLZCNTD m256 ymm
// VPLZCNTD xmm k xmm
// VPLZCNTD xmm xmm
// VPLZCNTD ymm k ymm
// VPLZCNTD ymm ymm
// VPLZCNTD m512 k zmm
// VPLZCNTD m512 zmm
// VPLZCNTD zmm k zmm
// VPLZCNTD zmm zmm
func VPLZCNTD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTD.Forms(), sffxs{}, ops)
}
// VPLZCNTD_BCST: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast).
//
// Forms:
//
// VPLZCNTD.BCST m32 k xmm
// VPLZCNTD.BCST m32 k ymm
// VPLZCNTD.BCST m32 xmm
// VPLZCNTD.BCST m32 ymm
// VPLZCNTD.BCST m32 k zmm
// VPLZCNTD.BCST m32 zmm
func VPLZCNTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTD.Forms(), sffxs{sffxBCST}, ops)
}
// VPLZCNTD_BCST_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.BCST.Z m32 k xmm
// VPLZCNTD.BCST.Z m32 k ymm
// VPLZCNTD.BCST.Z m32 k zmm
func VPLZCNTD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPLZCNTD_Z: Count the Number of Leading Zero Bits for Packed Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTD.Z m128 k xmm
// VPLZCNTD.Z m256 k ymm
// VPLZCNTD.Z xmm k xmm
// VPLZCNTD.Z ymm k ymm
// VPLZCNTD.Z m512 k zmm
// VPLZCNTD.Z zmm k zmm
func VPLZCNTD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPLZCNTQ: Count the Number of Leading Zero Bits for Packed Quadword Values.
//
// Forms:
//
// VPLZCNTQ m128 k xmm
// VPLZCNTQ m128 xmm
// VPLZCNTQ m256 k ymm
// VPLZCNTQ m256 ymm
// VPLZCNTQ xmm k xmm
// VPLZCNTQ xmm xmm
// VPLZCNTQ ymm k ymm
// VPLZCNTQ ymm ymm
// VPLZCNTQ m512 k zmm
// VPLZCNTQ m512 zmm
// VPLZCNTQ zmm k zmm
// VPLZCNTQ zmm zmm
func VPLZCNTQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTQ.Forms(), sffxs{}, ops)
}
// VPLZCNTQ_BCST: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast).
//
// Forms:
//
// VPLZCNTQ.BCST m64 k xmm
// VPLZCNTQ.BCST m64 k ymm
// VPLZCNTQ.BCST m64 xmm
// VPLZCNTQ.BCST m64 ymm
// VPLZCNTQ.BCST m64 k zmm
// VPLZCNTQ.BCST m64 zmm
func VPLZCNTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPLZCNTQ_BCST_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.BCST.Z m64 k xmm
// VPLZCNTQ.BCST.Z m64 k ymm
// VPLZCNTQ.BCST.Z m64 k zmm
func VPLZCNTQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VPLZCNTQ_Z: Count the Number of Leading Zero Bits for Packed Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPLZCNTQ.Z m128 k xmm
// VPLZCNTQ.Z m256 k ymm
// VPLZCNTQ.Z xmm k xmm
// VPLZCNTQ.Z ymm k ymm
// VPLZCNTQ.Z m512 k zmm
// VPLZCNTQ.Z zmm k zmm
func VPLZCNTQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPLZCNTQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VPMADD52HUQ: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52HUQ m128 xmm k xmm
// VPMADD52HUQ m128 xmm xmm
// VPMADD52HUQ m256 ymm k ymm
// VPMADD52HUQ m256 ymm ymm
// VPMADD52HUQ xmm xmm k xmm
// VPMADD52HUQ xmm xmm xmm
// VPMADD52HUQ ymm ymm k ymm
// VPMADD52HUQ ymm ymm ymm
// VPMADD52HUQ m512 zmm k zmm
// VPMADD52HUQ m512 zmm zmm
// VPMADD52HUQ zmm zmm k zmm
// VPMADD52HUQ zmm zmm zmm
func VPMADD52HUQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52HUQ.Forms(), sffxs{}, ops)
}
// VPMADD52HUQ_BCST: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52HUQ.BCST m64 xmm k xmm
// VPMADD52HUQ.BCST m64 xmm xmm
// VPMADD52HUQ.BCST m64 ymm k ymm
// VPMADD52HUQ.BCST m64 ymm ymm
// VPMADD52HUQ.BCST m64 zmm k zmm
// VPMADD52HUQ.BCST m64 zmm zmm
func VPMADD52HUQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52HUQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMADD52HUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.BCST.Z m64 xmm k xmm
// VPMADD52HUQ.BCST.Z m64 ymm k ymm
// VPMADD52HUQ.BCST.Z m64 zmm k zmm
func VPMADD52HUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52HUQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMADD52HUQ_Z: Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52HUQ.Z m128 xmm k xmm
// VPMADD52HUQ.Z m256 ymm k ymm
// VPMADD52HUQ.Z xmm xmm k xmm
// VPMADD52HUQ.Z ymm ymm k ymm
// VPMADD52HUQ.Z m512 zmm k zmm
// VPMADD52HUQ.Z zmm zmm k zmm
func VPMADD52HUQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52HUQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMADD52LUQ: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators.
//
// Forms:
//
// VPMADD52LUQ m128 xmm k xmm
// VPMADD52LUQ m128 xmm xmm
// VPMADD52LUQ m256 ymm k ymm
// VPMADD52LUQ m256 ymm ymm
// VPMADD52LUQ xmm xmm k xmm
// VPMADD52LUQ xmm xmm xmm
// VPMADD52LUQ ymm ymm k ymm
// VPMADD52LUQ ymm ymm ymm
// VPMADD52LUQ m512 zmm k zmm
// VPMADD52LUQ m512 zmm zmm
// VPMADD52LUQ zmm zmm k zmm
// VPMADD52LUQ zmm zmm zmm
func VPMADD52LUQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52LUQ.Forms(), sffxs{}, ops)
}
// VPMADD52LUQ_BCST: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast).
//
// Forms:
//
// VPMADD52LUQ.BCST m64 xmm k xmm
// VPMADD52LUQ.BCST m64 xmm xmm
// VPMADD52LUQ.BCST m64 ymm k ymm
// VPMADD52LUQ.BCST m64 ymm ymm
// VPMADD52LUQ.BCST m64 zmm k zmm
// VPMADD52LUQ.BCST m64 zmm zmm
func VPMADD52LUQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52LUQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMADD52LUQ_BCST_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.BCST.Z m64 xmm k xmm
// VPMADD52LUQ.BCST.Z m64 ymm k ymm
// VPMADD52LUQ.BCST.Z m64 zmm k zmm
func VPMADD52LUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52LUQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMADD52LUQ_Z: Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (Zeroing Masking).
//
// Forms:
//
// VPMADD52LUQ.Z m128 xmm k xmm
// VPMADD52LUQ.Z m256 ymm k ymm
// VPMADD52LUQ.Z xmm xmm k xmm
// VPMADD52LUQ.Z ymm ymm k ymm
// VPMADD52LUQ.Z m512 zmm k zmm
// VPMADD52LUQ.Z zmm zmm k zmm
func VPMADD52LUQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADD52LUQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMADDUBSW: Multiply and Add Packed Signed and Unsigned Byte Integers.
//
// Forms:
//
// VPMADDUBSW m256 ymm ymm
// VPMADDUBSW ymm ymm ymm
// VPMADDUBSW m128 xmm xmm
// VPMADDUBSW xmm xmm xmm
// VPMADDUBSW m128 xmm k xmm
// VPMADDUBSW m256 ymm k ymm
// VPMADDUBSW xmm xmm k xmm
// VPMADDUBSW ymm ymm k ymm
// VPMADDUBSW m512 zmm k zmm
// VPMADDUBSW m512 zmm zmm
// VPMADDUBSW zmm zmm k zmm
// VPMADDUBSW zmm zmm zmm
func VPMADDUBSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADDUBSW.Forms(), sffxs{}, ops)
}
// VPMADDUBSW_Z: Multiply and Add Packed Signed and Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDUBSW.Z m128 xmm k xmm
// VPMADDUBSW.Z m256 ymm k ymm
// VPMADDUBSW.Z xmm xmm k xmm
// VPMADDUBSW.Z ymm ymm k ymm
// VPMADDUBSW.Z m512 zmm k zmm
// VPMADDUBSW.Z zmm zmm k zmm
func VPMADDUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADDUBSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMADDWD: Multiply and Add Packed Signed Word Integers.
//
// Forms:
//
// VPMADDWD m256 ymm ymm
// VPMADDWD ymm ymm ymm
// VPMADDWD m128 xmm xmm
// VPMADDWD xmm xmm xmm
// VPMADDWD m128 xmm k xmm
// VPMADDWD m256 ymm k ymm
// VPMADDWD xmm xmm k xmm
// VPMADDWD ymm ymm k ymm
// VPMADDWD m512 zmm k zmm
// VPMADDWD m512 zmm zmm
// VPMADDWD zmm zmm k zmm
// VPMADDWD zmm zmm zmm
func VPMADDWD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADDWD.Forms(), sffxs{}, ops)
}
// VPMADDWD_Z: Multiply and Add Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMADDWD.Z m128 xmm k xmm
// VPMADDWD.Z m256 ymm k ymm
// VPMADDWD.Z xmm xmm k xmm
// VPMADDWD.Z ymm ymm k ymm
// VPMADDWD.Z m512 zmm k zmm
// VPMADDWD.Z zmm zmm k zmm
func VPMADDWD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMADDWD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMASKMOVD: Conditional Move Packed Doubleword Integers.
//
// Forms:
//
// VPMASKMOVD m128 xmm xmm
// VPMASKMOVD m256 ymm ymm
// VPMASKMOVD xmm xmm m128
// VPMASKMOVD ymm ymm m256
func VPMASKMOVD(mxy, xy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMASKMOVD.Forms(), sffxs{}, []operand.Op{mxy, xy, mxy1})
}
// VPMASKMOVQ: Conditional Move Packed Quadword Integers.
//
// Forms:
//
// VPMASKMOVQ m128 xmm xmm
// VPMASKMOVQ m256 ymm ymm
// VPMASKMOVQ xmm xmm m128
// VPMASKMOVQ ymm ymm m256
func VPMASKMOVQ(mxy, xy, mxy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMASKMOVQ.Forms(), sffxs{}, []operand.Op{mxy, xy, mxy1})
}
// VPMAXSB: Maximum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMAXSB m256 ymm ymm
// VPMAXSB ymm ymm ymm
// VPMAXSB m128 xmm xmm
// VPMAXSB xmm xmm xmm
// VPMAXSB m128 xmm k xmm
// VPMAXSB m256 ymm k ymm
// VPMAXSB xmm xmm k xmm
// VPMAXSB ymm ymm k ymm
// VPMAXSB m512 zmm k zmm
// VPMAXSB m512 zmm zmm
// VPMAXSB zmm zmm k zmm
// VPMAXSB zmm zmm zmm
func VPMAXSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSB.Forms(), sffxs{}, ops)
}
// VPMAXSB_Z: Maximum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSB.Z m128 xmm k xmm
// VPMAXSB.Z m256 ymm k ymm
// VPMAXSB.Z xmm xmm k xmm
// VPMAXSB.Z ymm ymm k ymm
// VPMAXSB.Z m512 zmm k zmm
// VPMAXSB.Z zmm zmm k zmm
func VPMAXSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXSD: Maximum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMAXSD m256 ymm ymm
// VPMAXSD ymm ymm ymm
// VPMAXSD m128 xmm xmm
// VPMAXSD xmm xmm xmm
// VPMAXSD m128 xmm k xmm
// VPMAXSD m256 ymm k ymm
// VPMAXSD xmm xmm k xmm
// VPMAXSD ymm ymm k ymm
// VPMAXSD m512 zmm k zmm
// VPMAXSD m512 zmm zmm
// VPMAXSD zmm zmm k zmm
// VPMAXSD zmm zmm zmm
func VPMAXSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSD.Forms(), sffxs{}, ops)
}
// VPMAXSD_BCST: Maximum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXSD.BCST m32 xmm k xmm
// VPMAXSD.BCST m32 xmm xmm
// VPMAXSD.BCST m32 ymm k ymm
// VPMAXSD.BCST m32 ymm ymm
// VPMAXSD.BCST m32 zmm k zmm
// VPMAXSD.BCST m32 zmm zmm
func VPMAXSD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSD.Forms(), sffxs{sffxBCST}, ops)
}
// VPMAXSD_BCST_Z: Maximum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSD.BCST.Z m32 xmm k xmm
// VPMAXSD.BCST.Z m32 ymm k ymm
// VPMAXSD.BCST.Z m32 zmm k zmm
func VPMAXSD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMAXSD_Z: Maximum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSD.Z m128 xmm k xmm
// VPMAXSD.Z m256 ymm k ymm
// VPMAXSD.Z xmm xmm k xmm
// VPMAXSD.Z ymm ymm k ymm
// VPMAXSD.Z m512 zmm k zmm
// VPMAXSD.Z zmm zmm k zmm
func VPMAXSD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXSQ: Maximum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMAXSQ m128 xmm k xmm
// VPMAXSQ m128 xmm xmm
// VPMAXSQ m256 ymm k ymm
// VPMAXSQ m256 ymm ymm
// VPMAXSQ xmm xmm k xmm
// VPMAXSQ xmm xmm xmm
// VPMAXSQ ymm ymm k ymm
// VPMAXSQ ymm ymm ymm
// VPMAXSQ m512 zmm k zmm
// VPMAXSQ m512 zmm zmm
// VPMAXSQ zmm zmm k zmm
// VPMAXSQ zmm zmm zmm
func VPMAXSQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSQ.Forms(), sffxs{}, ops)
}
// VPMAXSQ_BCST: Maximum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXSQ.BCST m64 xmm k xmm
// VPMAXSQ.BCST m64 xmm xmm
// VPMAXSQ.BCST m64 ymm k ymm
// VPMAXSQ.BCST m64 ymm ymm
// VPMAXSQ.BCST m64 zmm k zmm
// VPMAXSQ.BCST m64 zmm zmm
func VPMAXSQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMAXSQ_BCST_Z: Maximum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.BCST.Z m64 xmm k xmm
// VPMAXSQ.BCST.Z m64 ymm k ymm
// VPMAXSQ.BCST.Z m64 zmm k zmm
func VPMAXSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMAXSQ_Z: Maximum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSQ.Z m128 xmm k xmm
// VPMAXSQ.Z m256 ymm k ymm
// VPMAXSQ.Z xmm xmm k xmm
// VPMAXSQ.Z ymm ymm k ymm
// VPMAXSQ.Z m512 zmm k zmm
// VPMAXSQ.Z zmm zmm k zmm
func VPMAXSQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXSW: Maximum of Packed Signed Word Integers.
//
// Forms:
//
// VPMAXSW m256 ymm ymm
// VPMAXSW ymm ymm ymm
// VPMAXSW m128 xmm xmm
// VPMAXSW xmm xmm xmm
// VPMAXSW m128 xmm k xmm
// VPMAXSW m256 ymm k ymm
// VPMAXSW xmm xmm k xmm
// VPMAXSW ymm ymm k ymm
// VPMAXSW m512 zmm k zmm
// VPMAXSW m512 zmm zmm
// VPMAXSW zmm zmm k zmm
// VPMAXSW zmm zmm zmm
func VPMAXSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSW.Forms(), sffxs{}, ops)
}
// VPMAXSW_Z: Maximum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXSW.Z m128 xmm k xmm
// VPMAXSW.Z m256 ymm k ymm
// VPMAXSW.Z xmm xmm k xmm
// VPMAXSW.Z ymm ymm k ymm
// VPMAXSW.Z m512 zmm k zmm
// VPMAXSW.Z zmm zmm k zmm
func VPMAXSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXUB: Maximum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMAXUB m256 ymm ymm
// VPMAXUB ymm ymm ymm
// VPMAXUB m128 xmm xmm
// VPMAXUB xmm xmm xmm
// VPMAXUB m128 xmm k xmm
// VPMAXUB m256 ymm k ymm
// VPMAXUB xmm xmm k xmm
// VPMAXUB ymm ymm k ymm
// VPMAXUB m512 zmm k zmm
// VPMAXUB m512 zmm zmm
// VPMAXUB zmm zmm k zmm
// VPMAXUB zmm zmm zmm
func VPMAXUB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUB.Forms(), sffxs{}, ops)
}
// VPMAXUB_Z: Maximum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUB.Z m128 xmm k xmm
// VPMAXUB.Z m256 ymm k ymm
// VPMAXUB.Z xmm xmm k xmm
// VPMAXUB.Z ymm ymm k ymm
// VPMAXUB.Z m512 zmm k zmm
// VPMAXUB.Z zmm zmm k zmm
func VPMAXUB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXUD: Maximum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMAXUD m256 ymm ymm
// VPMAXUD ymm ymm ymm
// VPMAXUD m128 xmm xmm
// VPMAXUD xmm xmm xmm
// VPMAXUD m128 xmm k xmm
// VPMAXUD m256 ymm k ymm
// VPMAXUD xmm xmm k xmm
// VPMAXUD ymm ymm k ymm
// VPMAXUD m512 zmm k zmm
// VPMAXUD m512 zmm zmm
// VPMAXUD zmm zmm k zmm
// VPMAXUD zmm zmm zmm
func VPMAXUD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUD.Forms(), sffxs{}, ops)
}
// VPMAXUD_BCST: Maximum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMAXUD.BCST m32 xmm k xmm
// VPMAXUD.BCST m32 xmm xmm
// VPMAXUD.BCST m32 ymm k ymm
// VPMAXUD.BCST m32 ymm ymm
// VPMAXUD.BCST m32 zmm k zmm
// VPMAXUD.BCST m32 zmm zmm
func VPMAXUD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUD.Forms(), sffxs{sffxBCST}, ops)
}
// VPMAXUD_BCST_Z: Maximum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUD.BCST.Z m32 xmm k xmm
// VPMAXUD.BCST.Z m32 ymm k ymm
// VPMAXUD.BCST.Z m32 zmm k zmm
func VPMAXUD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMAXUD_Z: Maximum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUD.Z m128 xmm k xmm
// VPMAXUD.Z m256 ymm k ymm
// VPMAXUD.Z xmm xmm k xmm
// VPMAXUD.Z ymm ymm k ymm
// VPMAXUD.Z m512 zmm k zmm
// VPMAXUD.Z zmm zmm k zmm
func VPMAXUD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXUQ: Maximum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMAXUQ m128 xmm k xmm
// VPMAXUQ m128 xmm xmm
// VPMAXUQ m256 ymm k ymm
// VPMAXUQ m256 ymm ymm
// VPMAXUQ xmm xmm k xmm
// VPMAXUQ xmm xmm xmm
// VPMAXUQ ymm ymm k ymm
// VPMAXUQ ymm ymm ymm
// VPMAXUQ m512 zmm k zmm
// VPMAXUQ m512 zmm zmm
// VPMAXUQ zmm zmm k zmm
// VPMAXUQ zmm zmm zmm
func VPMAXUQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUQ.Forms(), sffxs{}, ops)
}
// VPMAXUQ_BCST: Maximum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMAXUQ.BCST m64 xmm k xmm
// VPMAXUQ.BCST m64 xmm xmm
// VPMAXUQ.BCST m64 ymm k ymm
// VPMAXUQ.BCST m64 ymm ymm
// VPMAXUQ.BCST m64 zmm k zmm
// VPMAXUQ.BCST m64 zmm zmm
func VPMAXUQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMAXUQ_BCST_Z: Maximum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.BCST.Z m64 xmm k xmm
// VPMAXUQ.BCST.Z m64 ymm k ymm
// VPMAXUQ.BCST.Z m64 zmm k zmm
func VPMAXUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMAXUQ_Z: Maximum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUQ.Z m128 xmm k xmm
// VPMAXUQ.Z m256 ymm k ymm
// VPMAXUQ.Z xmm xmm k xmm
// VPMAXUQ.Z ymm ymm k ymm
// VPMAXUQ.Z m512 zmm k zmm
// VPMAXUQ.Z zmm zmm k zmm
func VPMAXUQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMAXUW: Maximum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMAXUW m256 ymm ymm
// VPMAXUW ymm ymm ymm
// VPMAXUW m128 xmm xmm
// VPMAXUW xmm xmm xmm
// VPMAXUW m128 xmm k xmm
// VPMAXUW m256 ymm k ymm
// VPMAXUW xmm xmm k xmm
// VPMAXUW ymm ymm k ymm
// VPMAXUW m512 zmm k zmm
// VPMAXUW m512 zmm zmm
// VPMAXUW zmm zmm k zmm
// VPMAXUW zmm zmm zmm
func VPMAXUW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUW.Forms(), sffxs{}, ops)
}
// VPMAXUW_Z: Maximum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMAXUW.Z m128 xmm k xmm
// VPMAXUW.Z m256 ymm k ymm
// VPMAXUW.Z xmm xmm k xmm
// VPMAXUW.Z ymm ymm k ymm
// VPMAXUW.Z m512 zmm k zmm
// VPMAXUW.Z zmm zmm k zmm
func VPMAXUW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMAXUW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINSB: Minimum of Packed Signed Byte Integers.
//
// Forms:
//
// VPMINSB m256 ymm ymm
// VPMINSB ymm ymm ymm
// VPMINSB m128 xmm xmm
// VPMINSB xmm xmm xmm
// VPMINSB m128 xmm k xmm
// VPMINSB m256 ymm k ymm
// VPMINSB xmm xmm k xmm
// VPMINSB ymm ymm k ymm
// VPMINSB m512 zmm k zmm
// VPMINSB m512 zmm zmm
// VPMINSB zmm zmm k zmm
// VPMINSB zmm zmm zmm
func VPMINSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSB.Forms(), sffxs{}, ops)
}
// VPMINSB_Z: Minimum of Packed Signed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSB.Z m128 xmm k xmm
// VPMINSB.Z m256 ymm k ymm
// VPMINSB.Z xmm xmm k xmm
// VPMINSB.Z ymm ymm k ymm
// VPMINSB.Z m512 zmm k zmm
// VPMINSB.Z zmm zmm k zmm
func VPMINSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINSD: Minimum of Packed Signed Doubleword Integers.
//
// Forms:
//
// VPMINSD m256 ymm ymm
// VPMINSD ymm ymm ymm
// VPMINSD m128 xmm xmm
// VPMINSD xmm xmm xmm
// VPMINSD m128 xmm k xmm
// VPMINSD m256 ymm k ymm
// VPMINSD xmm xmm k xmm
// VPMINSD ymm ymm k ymm
// VPMINSD m512 zmm k zmm
// VPMINSD m512 zmm zmm
// VPMINSD zmm zmm k zmm
// VPMINSD zmm zmm zmm
func VPMINSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSD.Forms(), sffxs{}, ops)
}
// VPMINSD_BCST: Minimum of Packed Signed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINSD.BCST m32 xmm k xmm
// VPMINSD.BCST m32 xmm xmm
// VPMINSD.BCST m32 ymm k ymm
// VPMINSD.BCST m32 ymm ymm
// VPMINSD.BCST m32 zmm k zmm
// VPMINSD.BCST m32 zmm zmm
func VPMINSD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSD.Forms(), sffxs{sffxBCST}, ops)
}
// VPMINSD_BCST_Z: Minimum of Packed Signed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSD.BCST.Z m32 xmm k xmm
// VPMINSD.BCST.Z m32 ymm k ymm
// VPMINSD.BCST.Z m32 zmm k zmm
func VPMINSD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMINSD_Z: Minimum of Packed Signed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSD.Z m128 xmm k xmm
// VPMINSD.Z m256 ymm k ymm
// VPMINSD.Z xmm xmm k xmm
// VPMINSD.Z ymm ymm k ymm
// VPMINSD.Z m512 zmm k zmm
// VPMINSD.Z zmm zmm k zmm
func VPMINSD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINSQ: Minimum of Packed Signed Quadword Integers.
//
// Forms:
//
// VPMINSQ m128 xmm k xmm
// VPMINSQ m128 xmm xmm
// VPMINSQ m256 ymm k ymm
// VPMINSQ m256 ymm ymm
// VPMINSQ xmm xmm k xmm
// VPMINSQ xmm xmm xmm
// VPMINSQ ymm ymm k ymm
// VPMINSQ ymm ymm ymm
// VPMINSQ m512 zmm k zmm
// VPMINSQ m512 zmm zmm
// VPMINSQ zmm zmm k zmm
// VPMINSQ zmm zmm zmm
func VPMINSQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSQ.Forms(), sffxs{}, ops)
}
// VPMINSQ_BCST: Minimum of Packed Signed Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINSQ.BCST m64 xmm k xmm
// VPMINSQ.BCST m64 xmm xmm
// VPMINSQ.BCST m64 ymm k ymm
// VPMINSQ.BCST m64 ymm ymm
// VPMINSQ.BCST m64 zmm k zmm
// VPMINSQ.BCST m64 zmm zmm
func VPMINSQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMINSQ_BCST_Z: Minimum of Packed Signed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINSQ.BCST.Z m64 xmm k xmm
// VPMINSQ.BCST.Z m64 ymm k ymm
// VPMINSQ.BCST.Z m64 zmm k zmm
func VPMINSQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMINSQ_Z: Minimum of Packed Signed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSQ.Z m128 xmm k xmm
// VPMINSQ.Z m256 ymm k ymm
// VPMINSQ.Z xmm xmm k xmm
// VPMINSQ.Z ymm ymm k ymm
// VPMINSQ.Z m512 zmm k zmm
// VPMINSQ.Z zmm zmm k zmm
func VPMINSQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINSW: Minimum of Packed Signed Word Integers.
//
// Forms:
//
// VPMINSW m256 ymm ymm
// VPMINSW ymm ymm ymm
// VPMINSW m128 xmm xmm
// VPMINSW xmm xmm xmm
// VPMINSW m128 xmm k xmm
// VPMINSW m256 ymm k ymm
// VPMINSW xmm xmm k xmm
// VPMINSW ymm ymm k ymm
// VPMINSW m512 zmm k zmm
// VPMINSW m512 zmm zmm
// VPMINSW zmm zmm k zmm
// VPMINSW zmm zmm zmm
func VPMINSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSW.Forms(), sffxs{}, ops)
}
// VPMINSW_Z: Minimum of Packed Signed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINSW.Z m128 xmm k xmm
// VPMINSW.Z m256 ymm k ymm
// VPMINSW.Z xmm xmm k xmm
// VPMINSW.Z ymm ymm k ymm
// VPMINSW.Z m512 zmm k zmm
// VPMINSW.Z zmm zmm k zmm
func VPMINSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINUB: Minimum of Packed Unsigned Byte Integers.
//
// Forms:
//
// VPMINUB m256 ymm ymm
// VPMINUB ymm ymm ymm
// VPMINUB m128 xmm xmm
// VPMINUB xmm xmm xmm
// VPMINUB m128 xmm k xmm
// VPMINUB m256 ymm k ymm
// VPMINUB xmm xmm k xmm
// VPMINUB ymm ymm k ymm
// VPMINUB m512 zmm k zmm
// VPMINUB m512 zmm zmm
// VPMINUB zmm zmm k zmm
// VPMINUB zmm zmm zmm
func VPMINUB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUB.Forms(), sffxs{}, ops)
}
// VPMINUB_Z: Minimum of Packed Unsigned Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUB.Z m128 xmm k xmm
// VPMINUB.Z m256 ymm k ymm
// VPMINUB.Z xmm xmm k xmm
// VPMINUB.Z ymm ymm k ymm
// VPMINUB.Z m512 zmm k zmm
// VPMINUB.Z zmm zmm k zmm
func VPMINUB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINUD: Minimum of Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMINUD m256 ymm ymm
// VPMINUD ymm ymm ymm
// VPMINUD m128 xmm xmm
// VPMINUD xmm xmm xmm
// VPMINUD m128 xmm k xmm
// VPMINUD m256 ymm k ymm
// VPMINUD xmm xmm k xmm
// VPMINUD ymm ymm k ymm
// VPMINUD m512 zmm k zmm
// VPMINUD m512 zmm zmm
// VPMINUD zmm zmm k zmm
// VPMINUD zmm zmm zmm
func VPMINUD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUD.Forms(), sffxs{}, ops)
}
// VPMINUD_BCST: Minimum of Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMINUD.BCST m32 xmm k xmm
// VPMINUD.BCST m32 xmm xmm
// VPMINUD.BCST m32 ymm k ymm
// VPMINUD.BCST m32 ymm ymm
// VPMINUD.BCST m32 zmm k zmm
// VPMINUD.BCST m32 zmm zmm
func VPMINUD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUD.Forms(), sffxs{sffxBCST}, ops)
}
// VPMINUD_BCST_Z: Minimum of Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUD.BCST.Z m32 xmm k xmm
// VPMINUD.BCST.Z m32 ymm k ymm
// VPMINUD.BCST.Z m32 zmm k zmm
func VPMINUD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMINUD_Z: Minimum of Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUD.Z m128 xmm k xmm
// VPMINUD.Z m256 ymm k ymm
// VPMINUD.Z xmm xmm k xmm
// VPMINUD.Z ymm ymm k ymm
// VPMINUD.Z m512 zmm k zmm
// VPMINUD.Z zmm zmm k zmm
func VPMINUD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINUQ: Minimum of Packed Unsigned Quadword Integers.
//
// Forms:
//
// VPMINUQ m128 xmm k xmm
// VPMINUQ m128 xmm xmm
// VPMINUQ m256 ymm k ymm
// VPMINUQ m256 ymm ymm
// VPMINUQ xmm xmm k xmm
// VPMINUQ xmm xmm xmm
// VPMINUQ ymm ymm k ymm
// VPMINUQ ymm ymm ymm
// VPMINUQ m512 zmm k zmm
// VPMINUQ m512 zmm zmm
// VPMINUQ zmm zmm k zmm
// VPMINUQ zmm zmm zmm
func VPMINUQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUQ.Forms(), sffxs{}, ops)
}
// VPMINUQ_BCST: Minimum of Packed Unsigned Quadword Integers (Broadcast).
//
// Forms:
//
// VPMINUQ.BCST m64 xmm k xmm
// VPMINUQ.BCST m64 xmm xmm
// VPMINUQ.BCST m64 ymm k ymm
// VPMINUQ.BCST m64 ymm ymm
// VPMINUQ.BCST m64 zmm k zmm
// VPMINUQ.BCST m64 zmm zmm
func VPMINUQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMINUQ_BCST_Z: Minimum of Packed Unsigned Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMINUQ.BCST.Z m64 xmm k xmm
// VPMINUQ.BCST.Z m64 ymm k ymm
// VPMINUQ.BCST.Z m64 zmm k zmm
func VPMINUQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMINUQ_Z: Minimum of Packed Unsigned Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUQ.Z m128 xmm k xmm
// VPMINUQ.Z m256 ymm k ymm
// VPMINUQ.Z xmm xmm k xmm
// VPMINUQ.Z ymm ymm k ymm
// VPMINUQ.Z m512 zmm k zmm
// VPMINUQ.Z zmm zmm k zmm
func VPMINUQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMINUW: Minimum of Packed Unsigned Word Integers.
//
// Forms:
//
// VPMINUW m256 ymm ymm
// VPMINUW ymm ymm ymm
// VPMINUW m128 xmm xmm
// VPMINUW xmm xmm xmm
// VPMINUW m128 xmm k xmm
// VPMINUW m256 ymm k ymm
// VPMINUW xmm xmm k xmm
// VPMINUW ymm ymm k ymm
// VPMINUW m512 zmm k zmm
// VPMINUW m512 zmm zmm
// VPMINUW zmm zmm k zmm
// VPMINUW zmm zmm zmm
func VPMINUW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUW.Forms(), sffxs{}, ops)
}
// VPMINUW_Z: Minimum of Packed Unsigned Word Integers (Zeroing Masking).
//
// Forms:
//
// VPMINUW.Z m128 xmm k xmm
// VPMINUW.Z m256 ymm k ymm
// VPMINUW.Z xmm xmm k xmm
// VPMINUW.Z ymm ymm k ymm
// VPMINUW.Z m512 zmm k zmm
// VPMINUW.Z zmm zmm k zmm
func VPMINUW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMINUW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMOVB2M: Move Signs of Packed Byte Integers to Mask Register.
//
// Forms:
//
// VPMOVB2M xmm k
// VPMOVB2M ymm k
// VPMOVB2M zmm k
func VPMOVB2M(xyz, k operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVB2M.Forms(), sffxs{}, []operand.Op{xyz, k})
}
// VPMOVD2M: Move Signs of Packed Doubleword Integers to Mask Register.
//
// Forms:
//
// VPMOVD2M xmm k
// VPMOVD2M ymm k
// VPMOVD2M zmm k
func VPMOVD2M(xyz, k operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVD2M.Forms(), sffxs{}, []operand.Op{xyz, k})
}
// VPMOVDB: Down Convert Packed Doubleword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVDB xmm k m32
// VPMOVDB xmm k xmm
// VPMOVDB xmm m32
// VPMOVDB xmm xmm
// VPMOVDB ymm k m64
// VPMOVDB ymm k xmm
// VPMOVDB ymm m64
// VPMOVDB ymm xmm
// VPMOVDB zmm k m128
// VPMOVDB zmm k xmm
// VPMOVDB zmm m128
// VPMOVDB zmm xmm
func VPMOVDB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVDB.Forms(), sffxs{}, ops)
}
// VPMOVDB_Z: Down Convert Packed Doubleword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDB.Z xmm k m32
// VPMOVDB.Z xmm k xmm
// VPMOVDB.Z ymm k m64
// VPMOVDB.Z ymm k xmm
// VPMOVDB.Z zmm k m128
// VPMOVDB.Z zmm k xmm
func VPMOVDB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVDB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVDW: Down Convert Packed Doubleword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVDW xmm k m64
// VPMOVDW xmm k xmm
// VPMOVDW xmm m64
// VPMOVDW xmm xmm
// VPMOVDW ymm k m128
// VPMOVDW ymm k xmm
// VPMOVDW ymm m128
// VPMOVDW ymm xmm
// VPMOVDW zmm k m256
// VPMOVDW zmm k ymm
// VPMOVDW zmm m256
// VPMOVDW zmm ymm
func VPMOVDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVDW.Forms(), sffxs{}, ops)
}
// VPMOVDW_Z: Down Convert Packed Doubleword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVDW.Z xmm k m64
// VPMOVDW.Z xmm k xmm
// VPMOVDW.Z ymm k m128
// VPMOVDW.Z ymm k xmm
// VPMOVDW.Z zmm k m256
// VPMOVDW.Z zmm k ymm
func VPMOVDW_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVDW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVM2B: Expand Bits of Mask Register to Packed Byte Integers.
//
// Forms:
//
// VPMOVM2B k xmm
// VPMOVM2B k ymm
// VPMOVM2B k zmm
func VPMOVM2B(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVM2B.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPMOVM2D: Expand Bits of Mask Register to Packed Doubleword Integers.
//
// Forms:
//
// VPMOVM2D k xmm
// VPMOVM2D k ymm
// VPMOVM2D k zmm
func VPMOVM2D(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVM2D.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPMOVM2Q: Expand Bits of Mask Register to Packed Quadword Integers.
//
// Forms:
//
// VPMOVM2Q k xmm
// VPMOVM2Q k ymm
// VPMOVM2Q k zmm
func VPMOVM2Q(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVM2Q.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPMOVM2W: Expand Bits of Mask Register to Packed Word Integers.
//
// Forms:
//
// VPMOVM2W k xmm
// VPMOVM2W k ymm
// VPMOVM2W k zmm
func VPMOVM2W(k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVM2W.Forms(), sffxs{}, []operand.Op{k, xyz})
}
// VPMOVMSKB: Move Byte Mask.
//
// Forms:
//
// VPMOVMSKB ymm r32
// VPMOVMSKB xmm r32
func VPMOVMSKB(xy, r operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVMSKB.Forms(), sffxs{}, []operand.Op{xy, r})
}
// VPMOVQ2M: Move Signs of Packed Quadword Integers to Mask Register.
//
// Forms:
//
// VPMOVQ2M xmm k
// VPMOVQ2M ymm k
// VPMOVQ2M zmm k
func VPMOVQ2M(xyz, k operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQ2M.Forms(), sffxs{}, []operand.Op{xyz, k})
}
// VPMOVQB: Down Convert Packed Quadword Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVQB xmm k m16
// VPMOVQB xmm k xmm
// VPMOVQB xmm m16
// VPMOVQB xmm xmm
// VPMOVQB ymm k m32
// VPMOVQB ymm k xmm
// VPMOVQB ymm m32
// VPMOVQB ymm xmm
// VPMOVQB zmm k m64
// VPMOVQB zmm k xmm
// VPMOVQB zmm m64
// VPMOVQB zmm xmm
func VPMOVQB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQB.Forms(), sffxs{}, ops)
}
// VPMOVQB_Z: Down Convert Packed Quadword Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQB.Z xmm k m16
// VPMOVQB.Z xmm k xmm
// VPMOVQB.Z ymm k m32
// VPMOVQB.Z ymm k xmm
// VPMOVQB.Z zmm k m64
// VPMOVQB.Z zmm k xmm
func VPMOVQB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVQD: Down Convert Packed Quadword Values to Doubleword Values with Truncation.
//
// Forms:
//
// VPMOVQD xmm k m64
// VPMOVQD xmm k xmm
// VPMOVQD xmm m64
// VPMOVQD xmm xmm
// VPMOVQD ymm k m128
// VPMOVQD ymm k xmm
// VPMOVQD ymm m128
// VPMOVQD ymm xmm
// VPMOVQD zmm k m256
// VPMOVQD zmm k ymm
// VPMOVQD zmm m256
// VPMOVQD zmm ymm
func VPMOVQD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQD.Forms(), sffxs{}, ops)
}
// VPMOVQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQD.Z xmm k m64
// VPMOVQD.Z xmm k xmm
// VPMOVQD.Z ymm k m128
// VPMOVQD.Z ymm k xmm
// VPMOVQD.Z zmm k m256
// VPMOVQD.Z zmm k ymm
func VPMOVQD_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQD.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVQW: Down Convert Packed Quadword Values to Word Values with Truncation.
//
// Forms:
//
// VPMOVQW xmm k m32
// VPMOVQW xmm k xmm
// VPMOVQW xmm m32
// VPMOVQW xmm xmm
// VPMOVQW ymm k m64
// VPMOVQW ymm k xmm
// VPMOVQW ymm m64
// VPMOVQW ymm xmm
// VPMOVQW zmm k m128
// VPMOVQW zmm k xmm
// VPMOVQW zmm m128
// VPMOVQW zmm xmm
func VPMOVQW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQW.Forms(), sffxs{}, ops)
}
// VPMOVQW_Z: Down Convert Packed Quadword Values to Word Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVQW.Z xmm k m32
// VPMOVQW.Z xmm k xmm
// VPMOVQW.Z ymm k m64
// VPMOVQW.Z ymm k xmm
// VPMOVQW.Z zmm k m128
// VPMOVQW.Z zmm k xmm
func VPMOVQW_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVQW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVSDB: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDB xmm k m32
// VPMOVSDB xmm k xmm
// VPMOVSDB xmm m32
// VPMOVSDB xmm xmm
// VPMOVSDB ymm k m64
// VPMOVSDB ymm k xmm
// VPMOVSDB ymm m64
// VPMOVSDB ymm xmm
// VPMOVSDB zmm k m128
// VPMOVSDB zmm k xmm
// VPMOVSDB zmm m128
// VPMOVSDB zmm xmm
func VPMOVSDB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSDB.Forms(), sffxs{}, ops)
}
// VPMOVSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDB.Z xmm k m32
// VPMOVSDB.Z xmm k xmm
// VPMOVSDB.Z ymm k m64
// VPMOVSDB.Z ymm k xmm
// VPMOVSDB.Z zmm k m128
// VPMOVSDB.Z zmm k xmm
func VPMOVSDB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSDB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVSDW: Down Convert Packed Doubleword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSDW xmm k m64
// VPMOVSDW xmm k xmm
// VPMOVSDW xmm m64
// VPMOVSDW xmm xmm
// VPMOVSDW ymm k m128
// VPMOVSDW ymm k xmm
// VPMOVSDW ymm m128
// VPMOVSDW ymm xmm
// VPMOVSDW zmm k m256
// VPMOVSDW zmm k ymm
// VPMOVSDW zmm m256
// VPMOVSDW zmm ymm
func VPMOVSDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSDW.Forms(), sffxs{}, ops)
}
// VPMOVSDW_Z: Down Convert Packed Doubleword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSDW.Z xmm k m64
// VPMOVSDW.Z xmm k xmm
// VPMOVSDW.Z ymm k m128
// VPMOVSDW.Z ymm k xmm
// VPMOVSDW.Z zmm k m256
// VPMOVSDW.Z zmm k ymm
func VPMOVSDW_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSDW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVSQB: Down Convert Packed Quadword Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQB xmm k m16
// VPMOVSQB xmm k xmm
// VPMOVSQB xmm m16
// VPMOVSQB xmm xmm
// VPMOVSQB ymm k m32
// VPMOVSQB ymm k xmm
// VPMOVSQB ymm m32
// VPMOVSQB ymm xmm
// VPMOVSQB zmm k m64
// VPMOVSQB zmm k xmm
// VPMOVSQB zmm m64
// VPMOVSQB zmm xmm
func VPMOVSQB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQB.Forms(), sffxs{}, ops)
}
// VPMOVSQB_Z: Down Convert Packed Quadword Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQB.Z xmm k m16
// VPMOVSQB.Z xmm k xmm
// VPMOVSQB.Z ymm k m32
// VPMOVSQB.Z ymm k xmm
// VPMOVSQB.Z zmm k m64
// VPMOVSQB.Z zmm k xmm
func VPMOVSQB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVSQD: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQD xmm k m64
// VPMOVSQD xmm k xmm
// VPMOVSQD xmm m64
// VPMOVSQD xmm xmm
// VPMOVSQD ymm k m128
// VPMOVSQD ymm k xmm
// VPMOVSQD ymm m128
// VPMOVSQD ymm xmm
// VPMOVSQD zmm k m256
// VPMOVSQD zmm k ymm
// VPMOVSQD zmm m256
// VPMOVSQD zmm ymm
func VPMOVSQD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQD.Forms(), sffxs{}, ops)
}
// VPMOVSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQD.Z xmm k m64
// VPMOVSQD.Z xmm k xmm
// VPMOVSQD.Z ymm k m128
// VPMOVSQD.Z ymm k xmm
// VPMOVSQD.Z zmm k m256
// VPMOVSQD.Z zmm k ymm
func VPMOVSQD_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQD.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVSQW: Down Convert Packed Quadword Values to Word Values with Signed Saturation.
//
// Forms:
//
// VPMOVSQW xmm k m32
// VPMOVSQW xmm k xmm
// VPMOVSQW xmm m32
// VPMOVSQW xmm xmm
// VPMOVSQW ymm k m64
// VPMOVSQW ymm k xmm
// VPMOVSQW ymm m64
// VPMOVSQW ymm xmm
// VPMOVSQW zmm k m128
// VPMOVSQW zmm k xmm
// VPMOVSQW zmm m128
// VPMOVSQW zmm xmm
func VPMOVSQW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQW.Forms(), sffxs{}, ops)
}
// VPMOVSQW_Z: Down Convert Packed Quadword Values to Word Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSQW.Z xmm k m32
// VPMOVSQW.Z xmm k xmm
// VPMOVSQW.Z ymm k m64
// VPMOVSQW.Z ymm k xmm
// VPMOVSQW.Z zmm k m128
// VPMOVSQW.Z zmm k xmm
func VPMOVSQW_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSQW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVSWB: Down Convert Packed Word Values to Byte Values with Signed Saturation.
//
// Forms:
//
// VPMOVSWB xmm k m64
// VPMOVSWB xmm k xmm
// VPMOVSWB xmm m64
// VPMOVSWB xmm xmm
// VPMOVSWB ymm k m128
// VPMOVSWB ymm k xmm
// VPMOVSWB ymm m128
// VPMOVSWB ymm xmm
// VPMOVSWB zmm k m256
// VPMOVSWB zmm k ymm
// VPMOVSWB zmm m256
// VPMOVSWB zmm ymm
func VPMOVSWB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSWB.Forms(), sffxs{}, ops)
}
// VPMOVSWB_Z: Down Convert Packed Word Values to Byte Values with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVSWB.Z xmm k m64
// VPMOVSWB.Z xmm k xmm
// VPMOVSWB.Z ymm k m128
// VPMOVSWB.Z ymm k xmm
// VPMOVSWB.Z zmm k m256
// VPMOVSWB.Z zmm k ymm
func VPMOVSWB_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSWB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVSXBD: Move Packed Byte Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBD m64 ymm
// VPMOVSXBD xmm ymm
// VPMOVSXBD m32 xmm
// VPMOVSXBD xmm xmm
// VPMOVSXBD m32 k xmm
// VPMOVSXBD m64 k ymm
// VPMOVSXBD xmm k xmm
// VPMOVSXBD xmm k ymm
// VPMOVSXBD m128 k zmm
// VPMOVSXBD m128 zmm
// VPMOVSXBD xmm k zmm
// VPMOVSXBD xmm zmm
func VPMOVSXBD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBD.Forms(), sffxs{}, ops)
}
// VPMOVSXBD_Z: Move Packed Byte Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBD.Z m32 k xmm
// VPMOVSXBD.Z m64 k ymm
// VPMOVSXBD.Z xmm k xmm
// VPMOVSXBD.Z xmm k ymm
// VPMOVSXBD.Z m128 k zmm
// VPMOVSXBD.Z xmm k zmm
func VPMOVSXBD_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBD.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMOVSXBQ: Move Packed Byte Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBQ m32 ymm
// VPMOVSXBQ xmm ymm
// VPMOVSXBQ m16 xmm
// VPMOVSXBQ xmm xmm
// VPMOVSXBQ m16 k xmm
// VPMOVSXBQ m32 k ymm
// VPMOVSXBQ xmm k xmm
// VPMOVSXBQ xmm k ymm
// VPMOVSXBQ m64 k zmm
// VPMOVSXBQ m64 zmm
// VPMOVSXBQ xmm k zmm
// VPMOVSXBQ xmm zmm
func VPMOVSXBQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBQ.Forms(), sffxs{}, ops)
}
// VPMOVSXBQ_Z: Move Packed Byte Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBQ.Z m16 k xmm
// VPMOVSXBQ.Z m32 k ymm
// VPMOVSXBQ.Z xmm k xmm
// VPMOVSXBQ.Z xmm k ymm
// VPMOVSXBQ.Z m64 k zmm
// VPMOVSXBQ.Z xmm k zmm
func VPMOVSXBQ_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBQ.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMOVSXBW: Move Packed Byte Integers to Word Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXBW m128 ymm
// VPMOVSXBW xmm ymm
// VPMOVSXBW m64 xmm
// VPMOVSXBW xmm xmm
// VPMOVSXBW m128 k ymm
// VPMOVSXBW m64 k xmm
// VPMOVSXBW xmm k xmm
// VPMOVSXBW xmm k ymm
// VPMOVSXBW m256 k zmm
// VPMOVSXBW m256 zmm
// VPMOVSXBW ymm k zmm
// VPMOVSXBW ymm zmm
func VPMOVSXBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBW.Forms(), sffxs{}, ops)
}
// VPMOVSXBW_Z: Move Packed Byte Integers to Word Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXBW.Z m128 k ymm
// VPMOVSXBW.Z m64 k xmm
// VPMOVSXBW.Z xmm k xmm
// VPMOVSXBW.Z xmm k ymm
// VPMOVSXBW.Z m256 k zmm
// VPMOVSXBW.Z ymm k zmm
func VPMOVSXBW_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXBW.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVSXDQ: Move Packed Doubleword Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXDQ m128 ymm
// VPMOVSXDQ xmm ymm
// VPMOVSXDQ m64 xmm
// VPMOVSXDQ xmm xmm
// VPMOVSXDQ m128 k ymm
// VPMOVSXDQ m64 k xmm
// VPMOVSXDQ xmm k xmm
// VPMOVSXDQ xmm k ymm
// VPMOVSXDQ m256 k zmm
// VPMOVSXDQ m256 zmm
// VPMOVSXDQ ymm k zmm
// VPMOVSXDQ ymm zmm
func VPMOVSXDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXDQ.Forms(), sffxs{}, ops)
}
// VPMOVSXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXDQ.Z m128 k ymm
// VPMOVSXDQ.Z m64 k xmm
// VPMOVSXDQ.Z xmm k xmm
// VPMOVSXDQ.Z xmm k ymm
// VPMOVSXDQ.Z m256 k zmm
// VPMOVSXDQ.Z ymm k zmm
func VPMOVSXDQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVSXWD: Move Packed Word Integers to Doubleword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWD m128 ymm
// VPMOVSXWD xmm ymm
// VPMOVSXWD m64 xmm
// VPMOVSXWD xmm xmm
// VPMOVSXWD m128 k ymm
// VPMOVSXWD m64 k xmm
// VPMOVSXWD xmm k xmm
// VPMOVSXWD xmm k ymm
// VPMOVSXWD m256 k zmm
// VPMOVSXWD m256 zmm
// VPMOVSXWD ymm k zmm
// VPMOVSXWD ymm zmm
func VPMOVSXWD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXWD.Forms(), sffxs{}, ops)
}
// VPMOVSXWD_Z: Move Packed Word Integers to Doubleword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWD.Z m128 k ymm
// VPMOVSXWD.Z m64 k xmm
// VPMOVSXWD.Z xmm k xmm
// VPMOVSXWD.Z xmm k ymm
// VPMOVSXWD.Z m256 k zmm
// VPMOVSXWD.Z ymm k zmm
func VPMOVSXWD_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXWD.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVSXWQ: Move Packed Word Integers to Quadword Integers with Sign Extension.
//
// Forms:
//
// VPMOVSXWQ m64 ymm
// VPMOVSXWQ xmm ymm
// VPMOVSXWQ m32 xmm
// VPMOVSXWQ xmm xmm
// VPMOVSXWQ m32 k xmm
// VPMOVSXWQ m64 k ymm
// VPMOVSXWQ xmm k xmm
// VPMOVSXWQ xmm k ymm
// VPMOVSXWQ m128 k zmm
// VPMOVSXWQ m128 zmm
// VPMOVSXWQ xmm k zmm
// VPMOVSXWQ xmm zmm
func VPMOVSXWQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXWQ.Forms(), sffxs{}, ops)
}
// VPMOVSXWQ_Z: Move Packed Word Integers to Quadword Integers with Sign Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVSXWQ.Z m32 k xmm
// VPMOVSXWQ.Z m64 k ymm
// VPMOVSXWQ.Z xmm k xmm
// VPMOVSXWQ.Z xmm k ymm
// VPMOVSXWQ.Z m128 k zmm
// VPMOVSXWQ.Z xmm k zmm
func VPMOVSXWQ_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVSXWQ.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMOVUSDB: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDB xmm k m32
// VPMOVUSDB xmm k xmm
// VPMOVUSDB xmm m32
// VPMOVUSDB xmm xmm
// VPMOVUSDB ymm k m64
// VPMOVUSDB ymm k xmm
// VPMOVUSDB ymm m64
// VPMOVUSDB ymm xmm
// VPMOVUSDB zmm k m128
// VPMOVUSDB zmm k xmm
// VPMOVUSDB zmm m128
// VPMOVUSDB zmm xmm
func VPMOVUSDB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSDB.Forms(), sffxs{}, ops)
}
// VPMOVUSDB_Z: Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDB.Z xmm k m32
// VPMOVUSDB.Z xmm k xmm
// VPMOVUSDB.Z ymm k m64
// VPMOVUSDB.Z ymm k xmm
// VPMOVUSDB.Z zmm k m128
// VPMOVUSDB.Z zmm k xmm
func VPMOVUSDB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSDB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVUSDW: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSDW xmm k m64
// VPMOVUSDW xmm k xmm
// VPMOVUSDW xmm m64
// VPMOVUSDW xmm xmm
// VPMOVUSDW ymm k m128
// VPMOVUSDW ymm k xmm
// VPMOVUSDW ymm m128
// VPMOVUSDW ymm xmm
// VPMOVUSDW zmm k m256
// VPMOVUSDW zmm k ymm
// VPMOVUSDW zmm m256
// VPMOVUSDW zmm ymm
func VPMOVUSDW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSDW.Forms(), sffxs{}, ops)
}
// VPMOVUSDW_Z: Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSDW.Z xmm k m64
// VPMOVUSDW.Z xmm k xmm
// VPMOVUSDW.Z ymm k m128
// VPMOVUSDW.Z ymm k xmm
// VPMOVUSDW.Z zmm k m256
// VPMOVUSDW.Z zmm k ymm
func VPMOVUSDW_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSDW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVUSQB: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQB xmm k m16
// VPMOVUSQB xmm k xmm
// VPMOVUSQB xmm m16
// VPMOVUSQB xmm xmm
// VPMOVUSQB ymm k m32
// VPMOVUSQB ymm k xmm
// VPMOVUSQB ymm m32
// VPMOVUSQB ymm xmm
// VPMOVUSQB zmm k m64
// VPMOVUSQB zmm k xmm
// VPMOVUSQB zmm m64
// VPMOVUSQB zmm xmm
func VPMOVUSQB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQB.Forms(), sffxs{}, ops)
}
// VPMOVUSQB_Z: Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQB.Z xmm k m16
// VPMOVUSQB.Z xmm k xmm
// VPMOVUSQB.Z ymm k m32
// VPMOVUSQB.Z ymm k xmm
// VPMOVUSQB.Z zmm k m64
// VPMOVUSQB.Z zmm k xmm
func VPMOVUSQB_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVUSQD: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQD xmm k m64
// VPMOVUSQD xmm k xmm
// VPMOVUSQD xmm m64
// VPMOVUSQD xmm xmm
// VPMOVUSQD ymm k m128
// VPMOVUSQD ymm k xmm
// VPMOVUSQD ymm m128
// VPMOVUSQD ymm xmm
// VPMOVUSQD zmm k m256
// VPMOVUSQD zmm k ymm
// VPMOVUSQD zmm m256
// VPMOVUSQD zmm ymm
func VPMOVUSQD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQD.Forms(), sffxs{}, ops)
}
// VPMOVUSQD_Z: Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQD.Z xmm k m64
// VPMOVUSQD.Z xmm k xmm
// VPMOVUSQD.Z ymm k m128
// VPMOVUSQD.Z ymm k xmm
// VPMOVUSQD.Z zmm k m256
// VPMOVUSQD.Z zmm k ymm
func VPMOVUSQD_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQD.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVUSQW: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSQW xmm k m32
// VPMOVUSQW xmm k xmm
// VPMOVUSQW xmm m32
// VPMOVUSQW xmm xmm
// VPMOVUSQW ymm k m64
// VPMOVUSQW ymm k xmm
// VPMOVUSQW ymm m64
// VPMOVUSQW ymm xmm
// VPMOVUSQW zmm k m128
// VPMOVUSQW zmm k xmm
// VPMOVUSQW zmm m128
// VPMOVUSQW zmm xmm
func VPMOVUSQW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQW.Forms(), sffxs{}, ops)
}
// VPMOVUSQW_Z: Down Convert Packed Quadword Values to Word Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSQW.Z xmm k m32
// VPMOVUSQW.Z xmm k xmm
// VPMOVUSQW.Z ymm k m64
// VPMOVUSQW.Z ymm k xmm
// VPMOVUSQW.Z zmm k m128
// VPMOVUSQW.Z zmm k xmm
func VPMOVUSQW_Z(xyz, k, mx operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSQW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mx})
}
// VPMOVUSWB: Down Convert Packed Word Values to Byte Values with Unsigned Saturation.
//
// Forms:
//
// VPMOVUSWB xmm k m64
// VPMOVUSWB xmm k xmm
// VPMOVUSWB xmm m64
// VPMOVUSWB xmm xmm
// VPMOVUSWB ymm k m128
// VPMOVUSWB ymm k xmm
// VPMOVUSWB ymm m128
// VPMOVUSWB ymm xmm
// VPMOVUSWB zmm k m256
// VPMOVUSWB zmm k ymm
// VPMOVUSWB zmm m256
// VPMOVUSWB zmm ymm
func VPMOVUSWB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSWB.Forms(), sffxs{}, ops)
}
// VPMOVUSWB_Z: Down Convert Packed Word Values to Byte Values with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPMOVUSWB.Z xmm k m64
// VPMOVUSWB.Z xmm k xmm
// VPMOVUSWB.Z ymm k m128
// VPMOVUSWB.Z ymm k xmm
// VPMOVUSWB.Z zmm k m256
// VPMOVUSWB.Z zmm k ymm
func VPMOVUSWB_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVUSWB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVW2M: Move Signs of Packed Word Integers to Mask Register.
//
// Forms:
//
// VPMOVW2M xmm k
// VPMOVW2M ymm k
// VPMOVW2M zmm k
func VPMOVW2M(xyz, k operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVW2M.Forms(), sffxs{}, []operand.Op{xyz, k})
}
// VPMOVWB: Down Convert Packed Word Values to Byte Values with Truncation.
//
// Forms:
//
// VPMOVWB xmm k m64
// VPMOVWB xmm k xmm
// VPMOVWB xmm m64
// VPMOVWB xmm xmm
// VPMOVWB ymm k m128
// VPMOVWB ymm k xmm
// VPMOVWB ymm m128
// VPMOVWB ymm xmm
// VPMOVWB zmm k m256
// VPMOVWB zmm k ymm
// VPMOVWB zmm m256
// VPMOVWB zmm ymm
func VPMOVWB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVWB.Forms(), sffxs{}, ops)
}
// VPMOVWB_Z: Down Convert Packed Word Values to Byte Values with Truncation (Zeroing Masking).
//
// Forms:
//
// VPMOVWB.Z xmm k m64
// VPMOVWB.Z xmm k xmm
// VPMOVWB.Z ymm k m128
// VPMOVWB.Z ymm k xmm
// VPMOVWB.Z zmm k m256
// VPMOVWB.Z zmm k ymm
func VPMOVWB_Z(xyz, k, mxy operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVWB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxy})
}
// VPMOVZXBD: Move Packed Byte Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBD m64 ymm
// VPMOVZXBD xmm ymm
// VPMOVZXBD m32 xmm
// VPMOVZXBD xmm xmm
// VPMOVZXBD m32 k xmm
// VPMOVZXBD m64 k ymm
// VPMOVZXBD xmm k xmm
// VPMOVZXBD xmm k ymm
// VPMOVZXBD m128 k zmm
// VPMOVZXBD m128 zmm
// VPMOVZXBD xmm k zmm
// VPMOVZXBD xmm zmm
func VPMOVZXBD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBD.Forms(), sffxs{}, ops)
}
// VPMOVZXBD_Z: Move Packed Byte Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBD.Z m32 k xmm
// VPMOVZXBD.Z m64 k ymm
// VPMOVZXBD.Z xmm k xmm
// VPMOVZXBD.Z xmm k ymm
// VPMOVZXBD.Z m128 k zmm
// VPMOVZXBD.Z xmm k zmm
func VPMOVZXBD_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBD.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMOVZXBQ: Move Packed Byte Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBQ m32 ymm
// VPMOVZXBQ xmm ymm
// VPMOVZXBQ m16 xmm
// VPMOVZXBQ xmm xmm
// VPMOVZXBQ m16 k xmm
// VPMOVZXBQ m32 k ymm
// VPMOVZXBQ xmm k xmm
// VPMOVZXBQ xmm k ymm
// VPMOVZXBQ m64 k zmm
// VPMOVZXBQ m64 zmm
// VPMOVZXBQ xmm k zmm
// VPMOVZXBQ xmm zmm
func VPMOVZXBQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBQ.Forms(), sffxs{}, ops)
}
// VPMOVZXBQ_Z: Move Packed Byte Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBQ.Z m16 k xmm
// VPMOVZXBQ.Z m32 k ymm
// VPMOVZXBQ.Z xmm k xmm
// VPMOVZXBQ.Z xmm k ymm
// VPMOVZXBQ.Z m64 k zmm
// VPMOVZXBQ.Z xmm k zmm
func VPMOVZXBQ_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBQ.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMOVZXBW: Move Packed Byte Integers to Word Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXBW m128 ymm
// VPMOVZXBW xmm ymm
// VPMOVZXBW m64 xmm
// VPMOVZXBW xmm xmm
// VPMOVZXBW m128 k ymm
// VPMOVZXBW m64 k xmm
// VPMOVZXBW xmm k xmm
// VPMOVZXBW xmm k ymm
// VPMOVZXBW m256 k zmm
// VPMOVZXBW m256 zmm
// VPMOVZXBW ymm k zmm
// VPMOVZXBW ymm zmm
func VPMOVZXBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBW.Forms(), sffxs{}, ops)
}
// VPMOVZXBW_Z: Move Packed Byte Integers to Word Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXBW.Z m128 k ymm
// VPMOVZXBW.Z m64 k xmm
// VPMOVZXBW.Z xmm k xmm
// VPMOVZXBW.Z xmm k ymm
// VPMOVZXBW.Z m256 k zmm
// VPMOVZXBW.Z ymm k zmm
func VPMOVZXBW_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXBW.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVZXDQ: Move Packed Doubleword Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXDQ m128 ymm
// VPMOVZXDQ xmm ymm
// VPMOVZXDQ m64 xmm
// VPMOVZXDQ xmm xmm
// VPMOVZXDQ m128 k ymm
// VPMOVZXDQ m64 k xmm
// VPMOVZXDQ xmm k xmm
// VPMOVZXDQ xmm k ymm
// VPMOVZXDQ m256 k zmm
// VPMOVZXDQ m256 zmm
// VPMOVZXDQ ymm k zmm
// VPMOVZXDQ ymm zmm
func VPMOVZXDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXDQ.Forms(), sffxs{}, ops)
}
// VPMOVZXDQ_Z: Move Packed Doubleword Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXDQ.Z m128 k ymm
// VPMOVZXDQ.Z m64 k xmm
// VPMOVZXDQ.Z xmm k xmm
// VPMOVZXDQ.Z xmm k ymm
// VPMOVZXDQ.Z m256 k zmm
// VPMOVZXDQ.Z ymm k zmm
func VPMOVZXDQ_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVZXWD: Move Packed Word Integers to Doubleword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWD m128 ymm
// VPMOVZXWD xmm ymm
// VPMOVZXWD m64 xmm
// VPMOVZXWD xmm xmm
// VPMOVZXWD m128 k ymm
// VPMOVZXWD m64 k xmm
// VPMOVZXWD xmm k xmm
// VPMOVZXWD xmm k ymm
// VPMOVZXWD m256 k zmm
// VPMOVZXWD m256 zmm
// VPMOVZXWD ymm k zmm
// VPMOVZXWD ymm zmm
func VPMOVZXWD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXWD.Forms(), sffxs{}, ops)
}
// VPMOVZXWD_Z: Move Packed Word Integers to Doubleword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWD.Z m128 k ymm
// VPMOVZXWD.Z m64 k xmm
// VPMOVZXWD.Z xmm k xmm
// VPMOVZXWD.Z xmm k ymm
// VPMOVZXWD.Z m256 k zmm
// VPMOVZXWD.Z ymm k zmm
func VPMOVZXWD_Z(mxy, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXWD.Forms(), sffxs{sffxZ}, []operand.Op{mxy, k, xyz})
}
// VPMOVZXWQ: Move Packed Word Integers to Quadword Integers with Zero Extension.
//
// Forms:
//
// VPMOVZXWQ m64 ymm
// VPMOVZXWQ xmm ymm
// VPMOVZXWQ m32 xmm
// VPMOVZXWQ xmm xmm
// VPMOVZXWQ m32 k xmm
// VPMOVZXWQ m64 k ymm
// VPMOVZXWQ xmm k xmm
// VPMOVZXWQ xmm k ymm
// VPMOVZXWQ m128 k zmm
// VPMOVZXWQ m128 zmm
// VPMOVZXWQ xmm k zmm
// VPMOVZXWQ xmm zmm
func VPMOVZXWQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXWQ.Forms(), sffxs{}, ops)
}
// VPMOVZXWQ_Z: Move Packed Word Integers to Quadword Integers with Zero Extension (Zeroing Masking).
//
// Forms:
//
// VPMOVZXWQ.Z m32 k xmm
// VPMOVZXWQ.Z m64 k ymm
// VPMOVZXWQ.Z xmm k xmm
// VPMOVZXWQ.Z xmm k ymm
// VPMOVZXWQ.Z m128 k zmm
// VPMOVZXWQ.Z xmm k zmm
func VPMOVZXWQ_Z(mx, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPMOVZXWQ.Forms(), sffxs{sffxZ}, []operand.Op{mx, k, xyz})
}
// VPMULDQ: Multiply Packed Signed Doubleword Integers and Store Quadword Result.
//
// Forms:
//
// VPMULDQ m256 ymm ymm
// VPMULDQ ymm ymm ymm
// VPMULDQ m128 xmm xmm
// VPMULDQ xmm xmm xmm
// VPMULDQ m128 xmm k xmm
// VPMULDQ m256 ymm k ymm
// VPMULDQ xmm xmm k xmm
// VPMULDQ ymm ymm k ymm
// VPMULDQ m512 zmm k zmm
// VPMULDQ m512 zmm zmm
// VPMULDQ zmm zmm k zmm
// VPMULDQ zmm zmm zmm
func VPMULDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULDQ.Forms(), sffxs{}, ops)
}
// VPMULDQ_BCST: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast).
//
// Forms:
//
// VPMULDQ.BCST m64 xmm k xmm
// VPMULDQ.BCST m64 xmm xmm
// VPMULDQ.BCST m64 ymm k ymm
// VPMULDQ.BCST m64 ymm ymm
// VPMULDQ.BCST m64 zmm k zmm
// VPMULDQ.BCST m64 zmm zmm
func VPMULDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMULDQ_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULDQ.BCST.Z m64 xmm k xmm
// VPMULDQ.BCST.Z m64 ymm k ymm
// VPMULDQ.BCST.Z m64 zmm k zmm
func VPMULDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMULDQ_Z: Multiply Packed Signed Doubleword Integers and Store Quadword Result (Zeroing Masking).
//
// Forms:
//
// VPMULDQ.Z m128 xmm k xmm
// VPMULDQ.Z m256 ymm k ymm
// VPMULDQ.Z xmm xmm k xmm
// VPMULDQ.Z ymm ymm k ymm
// VPMULDQ.Z m512 zmm k zmm
// VPMULDQ.Z zmm zmm k zmm
func VPMULDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULHRSW: Packed Multiply Signed Word Integers and Store High Result with Round and Scale.
//
// Forms:
//
// VPMULHRSW m256 ymm ymm
// VPMULHRSW ymm ymm ymm
// VPMULHRSW m128 xmm xmm
// VPMULHRSW xmm xmm xmm
// VPMULHRSW m128 xmm k xmm
// VPMULHRSW m256 ymm k ymm
// VPMULHRSW xmm xmm k xmm
// VPMULHRSW ymm ymm k ymm
// VPMULHRSW m512 zmm k zmm
// VPMULHRSW m512 zmm zmm
// VPMULHRSW zmm zmm k zmm
// VPMULHRSW zmm zmm zmm
func VPMULHRSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHRSW.Forms(), sffxs{}, ops)
}
// VPMULHRSW_Z: Packed Multiply Signed Word Integers and Store High Result with Round and Scale (Zeroing Masking).
//
// Forms:
//
// VPMULHRSW.Z m128 xmm k xmm
// VPMULHRSW.Z m256 ymm k ymm
// VPMULHRSW.Z xmm xmm k xmm
// VPMULHRSW.Z ymm ymm k ymm
// VPMULHRSW.Z m512 zmm k zmm
// VPMULHRSW.Z zmm zmm k zmm
func VPMULHRSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHRSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULHUW: Multiply Packed Unsigned Word Integers and Store High Result.
//
// Forms:
//
// VPMULHUW m256 ymm ymm
// VPMULHUW ymm ymm ymm
// VPMULHUW m128 xmm xmm
// VPMULHUW xmm xmm xmm
// VPMULHUW m128 xmm k xmm
// VPMULHUW m256 ymm k ymm
// VPMULHUW xmm xmm k xmm
// VPMULHUW ymm ymm k ymm
// VPMULHUW m512 zmm k zmm
// VPMULHUW m512 zmm zmm
// VPMULHUW zmm zmm k zmm
// VPMULHUW zmm zmm zmm
func VPMULHUW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHUW.Forms(), sffxs{}, ops)
}
// VPMULHUW_Z: Multiply Packed Unsigned Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHUW.Z m128 xmm k xmm
// VPMULHUW.Z m256 ymm k ymm
// VPMULHUW.Z xmm xmm k xmm
// VPMULHUW.Z ymm ymm k ymm
// VPMULHUW.Z m512 zmm k zmm
// VPMULHUW.Z zmm zmm k zmm
func VPMULHUW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHUW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULHW: Multiply Packed Signed Word Integers and Store High Result.
//
// Forms:
//
// VPMULHW m256 ymm ymm
// VPMULHW ymm ymm ymm
// VPMULHW m128 xmm xmm
// VPMULHW xmm xmm xmm
// VPMULHW m128 xmm k xmm
// VPMULHW m256 ymm k ymm
// VPMULHW xmm xmm k xmm
// VPMULHW ymm ymm k ymm
// VPMULHW m512 zmm k zmm
// VPMULHW m512 zmm zmm
// VPMULHW zmm zmm k zmm
// VPMULHW zmm zmm zmm
func VPMULHW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHW.Forms(), sffxs{}, ops)
}
// VPMULHW_Z: Multiply Packed Signed Word Integers and Store High Result (Zeroing Masking).
//
// Forms:
//
// VPMULHW.Z m128 xmm k xmm
// VPMULHW.Z m256 ymm k ymm
// VPMULHW.Z xmm xmm k xmm
// VPMULHW.Z ymm ymm k ymm
// VPMULHW.Z m512 zmm k zmm
// VPMULHW.Z zmm zmm k zmm
func VPMULHW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULHW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULLD: Multiply Packed Signed Doubleword Integers and Store Low Result.
//
// Forms:
//
// VPMULLD m256 ymm ymm
// VPMULLD ymm ymm ymm
// VPMULLD m128 xmm xmm
// VPMULLD xmm xmm xmm
// VPMULLD m128 xmm k xmm
// VPMULLD m256 ymm k ymm
// VPMULLD xmm xmm k xmm
// VPMULLD ymm ymm k ymm
// VPMULLD m512 zmm k zmm
// VPMULLD m512 zmm zmm
// VPMULLD zmm zmm k zmm
// VPMULLD zmm zmm zmm
func VPMULLD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLD.Forms(), sffxs{}, ops)
}
// VPMULLD_BCST: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLD.BCST m32 xmm k xmm
// VPMULLD.BCST m32 xmm xmm
// VPMULLD.BCST m32 ymm k ymm
// VPMULLD.BCST m32 ymm ymm
// VPMULLD.BCST m32 zmm k zmm
// VPMULLD.BCST m32 zmm zmm
func VPMULLD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLD.Forms(), sffxs{sffxBCST}, ops)
}
// VPMULLD_BCST_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLD.BCST.Z m32 xmm k xmm
// VPMULLD.BCST.Z m32 ymm k ymm
// VPMULLD.BCST.Z m32 zmm k zmm
func VPMULLD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMULLD_Z: Multiply Packed Signed Doubleword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLD.Z m128 xmm k xmm
// VPMULLD.Z m256 ymm k ymm
// VPMULLD.Z xmm xmm k xmm
// VPMULLD.Z ymm ymm k ymm
// VPMULLD.Z m512 zmm k zmm
// VPMULLD.Z zmm zmm k zmm
func VPMULLD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULLQ: Multiply Packed Signed Quadword Integers and Store Low Result.
//
// Forms:
//
// VPMULLQ m128 xmm k xmm
// VPMULLQ m128 xmm xmm
// VPMULLQ m256 ymm k ymm
// VPMULLQ m256 ymm ymm
// VPMULLQ xmm xmm k xmm
// VPMULLQ xmm xmm xmm
// VPMULLQ ymm ymm k ymm
// VPMULLQ ymm ymm ymm
// VPMULLQ m512 zmm k zmm
// VPMULLQ m512 zmm zmm
// VPMULLQ zmm zmm k zmm
// VPMULLQ zmm zmm zmm
func VPMULLQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLQ.Forms(), sffxs{}, ops)
}
// VPMULLQ_BCST: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast).
//
// Forms:
//
// VPMULLQ.BCST m64 xmm k xmm
// VPMULLQ.BCST m64 xmm xmm
// VPMULLQ.BCST m64 ymm k ymm
// VPMULLQ.BCST m64 ymm ymm
// VPMULLQ.BCST m64 zmm k zmm
// VPMULLQ.BCST m64 zmm zmm
func VPMULLQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMULLQ_BCST_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULLQ.BCST.Z m64 xmm k xmm
// VPMULLQ.BCST.Z m64 ymm k ymm
// VPMULLQ.BCST.Z m64 zmm k zmm
func VPMULLQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMULLQ_Z: Multiply Packed Signed Quadword Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLQ.Z m128 xmm k xmm
// VPMULLQ.Z m256 ymm k ymm
// VPMULLQ.Z xmm xmm k xmm
// VPMULLQ.Z ymm ymm k ymm
// VPMULLQ.Z m512 zmm k zmm
// VPMULLQ.Z zmm zmm k zmm
func VPMULLQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULLW: Multiply Packed Signed Word Integers and Store Low Result.
//
// Forms:
//
// VPMULLW m256 ymm ymm
// VPMULLW ymm ymm ymm
// VPMULLW m128 xmm xmm
// VPMULLW xmm xmm xmm
// VPMULLW m128 xmm k xmm
// VPMULLW m256 ymm k ymm
// VPMULLW xmm xmm k xmm
// VPMULLW ymm ymm k ymm
// VPMULLW m512 zmm k zmm
// VPMULLW m512 zmm zmm
// VPMULLW zmm zmm k zmm
// VPMULLW zmm zmm zmm
func VPMULLW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLW.Forms(), sffxs{}, ops)
}
// VPMULLW_Z: Multiply Packed Signed Word Integers and Store Low Result (Zeroing Masking).
//
// Forms:
//
// VPMULLW.Z m128 xmm k xmm
// VPMULLW.Z m256 ymm k ymm
// VPMULLW.Z xmm xmm k xmm
// VPMULLW.Z ymm ymm k ymm
// VPMULLW.Z m512 zmm k zmm
// VPMULLW.Z zmm zmm k zmm
func VPMULLW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULLW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULTISHIFTQB: Select Packed Unaligned Bytes from Quadword Sources.
//
// Forms:
//
// VPMULTISHIFTQB m128 xmm k xmm
// VPMULTISHIFTQB m128 xmm xmm
// VPMULTISHIFTQB m256 ymm k ymm
// VPMULTISHIFTQB m256 ymm ymm
// VPMULTISHIFTQB xmm xmm k xmm
// VPMULTISHIFTQB xmm xmm xmm
// VPMULTISHIFTQB ymm ymm k ymm
// VPMULTISHIFTQB ymm ymm ymm
// VPMULTISHIFTQB m512 zmm k zmm
// VPMULTISHIFTQB m512 zmm zmm
// VPMULTISHIFTQB zmm zmm k zmm
// VPMULTISHIFTQB zmm zmm zmm
func VPMULTISHIFTQB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULTISHIFTQB.Forms(), sffxs{}, ops)
}
// VPMULTISHIFTQB_BCST: Select Packed Unaligned Bytes from Quadword Sources (Broadcast).
//
// Forms:
//
// VPMULTISHIFTQB.BCST m64 xmm k xmm
// VPMULTISHIFTQB.BCST m64 xmm xmm
// VPMULTISHIFTQB.BCST m64 ymm k ymm
// VPMULTISHIFTQB.BCST m64 ymm ymm
// VPMULTISHIFTQB.BCST m64 zmm k zmm
// VPMULTISHIFTQB.BCST m64 zmm zmm
func VPMULTISHIFTQB_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULTISHIFTQB.Forms(), sffxs{sffxBCST}, ops)
}
// VPMULTISHIFTQB_BCST_Z: Select Packed Unaligned Bytes from Quadword Sources (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.BCST.Z m64 xmm k xmm
// VPMULTISHIFTQB.BCST.Z m64 ymm k ymm
// VPMULTISHIFTQB.BCST.Z m64 zmm k zmm
func VPMULTISHIFTQB_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULTISHIFTQB.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMULTISHIFTQB_Z: Select Packed Unaligned Bytes from Quadword Sources (Zeroing Masking).
//
// Forms:
//
// VPMULTISHIFTQB.Z m128 xmm k xmm
// VPMULTISHIFTQB.Z m256 ymm k ymm
// VPMULTISHIFTQB.Z xmm xmm k xmm
// VPMULTISHIFTQB.Z ymm ymm k ymm
// VPMULTISHIFTQB.Z m512 zmm k zmm
// VPMULTISHIFTQB.Z zmm zmm k zmm
func VPMULTISHIFTQB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULTISHIFTQB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPMULUDQ: Multiply Packed Unsigned Doubleword Integers.
//
// Forms:
//
// VPMULUDQ m256 ymm ymm
// VPMULUDQ ymm ymm ymm
// VPMULUDQ m128 xmm xmm
// VPMULUDQ xmm xmm xmm
// VPMULUDQ m128 xmm k xmm
// VPMULUDQ m256 ymm k ymm
// VPMULUDQ xmm xmm k xmm
// VPMULUDQ ymm ymm k ymm
// VPMULUDQ m512 zmm k zmm
// VPMULUDQ m512 zmm zmm
// VPMULUDQ zmm zmm k zmm
// VPMULUDQ zmm zmm zmm
func VPMULUDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULUDQ.Forms(), sffxs{}, ops)
}
// VPMULUDQ_BCST: Multiply Packed Unsigned Doubleword Integers (Broadcast).
//
// Forms:
//
// VPMULUDQ.BCST m64 xmm k xmm
// VPMULUDQ.BCST m64 xmm xmm
// VPMULUDQ.BCST m64 ymm k ymm
// VPMULUDQ.BCST m64 ymm ymm
// VPMULUDQ.BCST m64 zmm k zmm
// VPMULUDQ.BCST m64 zmm zmm
func VPMULUDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULUDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPMULUDQ_BCST_Z: Multiply Packed Unsigned Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.BCST.Z m64 xmm k xmm
// VPMULUDQ.BCST.Z m64 ymm k ymm
// VPMULUDQ.BCST.Z m64 zmm k zmm
func VPMULUDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULUDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPMULUDQ_Z: Multiply Packed Unsigned Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPMULUDQ.Z m128 xmm k xmm
// VPMULUDQ.Z m256 ymm k ymm
// VPMULUDQ.Z xmm xmm k xmm
// VPMULUDQ.Z ymm ymm k ymm
// VPMULUDQ.Z m512 zmm k zmm
// VPMULUDQ.Z zmm zmm k zmm
func VPMULUDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPMULUDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPOPCNTD: Packed Population Count for Doubleword Integers.
//
// Forms:
//
// VPOPCNTD m512 k zmm
// VPOPCNTD m512 zmm
// VPOPCNTD zmm k zmm
// VPOPCNTD zmm zmm
func VPOPCNTD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTD.Forms(), sffxs{}, ops)
}
// VPOPCNTD_BCST: Packed Population Count for Doubleword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTD.BCST m32 k zmm
// VPOPCNTD.BCST m32 zmm
func VPOPCNTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTD.Forms(), sffxs{sffxBCST}, ops)
}
// VPOPCNTD_BCST_Z: Packed Population Count for Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.BCST.Z m32 k zmm
func VPOPCNTD_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTD.Z m512 k zmm
// VPOPCNTD.Z zmm k zmm
func VPOPCNTD_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTD.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VPOPCNTQ: Packed Population Count for Quadword Integers.
//
// Forms:
//
// VPOPCNTQ m512 k zmm
// VPOPCNTQ m512 zmm
// VPOPCNTQ zmm k zmm
// VPOPCNTQ zmm zmm
func VPOPCNTQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTQ.Forms(), sffxs{}, ops)
}
// VPOPCNTQ_BCST: Packed Population Count for Quadword Integers (Broadcast).
//
// Forms:
//
// VPOPCNTQ.BCST m64 k zmm
// VPOPCNTQ.BCST m64 zmm
func VPOPCNTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPOPCNTQ_BCST_Z: Packed Population Count for Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.BCST.Z m64 k zmm
func VPOPCNTQ_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPOPCNTQ.Z m512 k zmm
// VPOPCNTQ.Z zmm k zmm
func VPOPCNTQ_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVPOPCNTQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VPOR: Packed Bitwise Logical OR.
//
// Forms:
//
// VPOR m256 ymm ymm
// VPOR ymm ymm ymm
// VPOR m128 xmm xmm
// VPOR xmm xmm xmm
func VPOR(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPOR.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPORD: Bitwise Logical OR of Packed Doubleword Integers.
//
// Forms:
//
// VPORD m128 xmm k xmm
// VPORD m128 xmm xmm
// VPORD m256 ymm k ymm
// VPORD m256 ymm ymm
// VPORD xmm xmm k xmm
// VPORD xmm xmm xmm
// VPORD ymm ymm k ymm
// VPORD ymm ymm ymm
// VPORD m512 zmm k zmm
// VPORD m512 zmm zmm
// VPORD zmm zmm k zmm
// VPORD zmm zmm zmm
func VPORD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPORD.Forms(), sffxs{}, ops)
}
// VPORD_BCST: Bitwise Logical OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPORD.BCST m32 xmm k xmm
// VPORD.BCST m32 xmm xmm
// VPORD.BCST m32 ymm k ymm
// VPORD.BCST m32 ymm ymm
// VPORD.BCST m32 zmm k zmm
// VPORD.BCST m32 zmm zmm
func VPORD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPORD.Forms(), sffxs{sffxBCST}, ops)
}
// VPORD_BCST_Z: Bitwise Logical OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORD.BCST.Z m32 xmm k xmm
// VPORD.BCST.Z m32 ymm k ymm
// VPORD.BCST.Z m32 zmm k zmm
func VPORD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPORD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPORD_Z: Bitwise Logical OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPORD.Z m128 xmm k xmm
// VPORD.Z m256 ymm k ymm
// VPORD.Z xmm xmm k xmm
// VPORD.Z ymm ymm k ymm
// VPORD.Z m512 zmm k zmm
// VPORD.Z zmm zmm k zmm
func VPORD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPORD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPORQ: Bitwise Logical OR of Packed Quadword Integers.
//
// Forms:
//
// VPORQ m128 xmm k xmm
// VPORQ m128 xmm xmm
// VPORQ m256 ymm k ymm
// VPORQ m256 ymm ymm
// VPORQ xmm xmm k xmm
// VPORQ xmm xmm xmm
// VPORQ ymm ymm k ymm
// VPORQ ymm ymm ymm
// VPORQ m512 zmm k zmm
// VPORQ m512 zmm zmm
// VPORQ zmm zmm k zmm
// VPORQ zmm zmm zmm
func VPORQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPORQ.Forms(), sffxs{}, ops)
}
// VPORQ_BCST: Bitwise Logical OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPORQ.BCST m64 xmm k xmm
// VPORQ.BCST m64 xmm xmm
// VPORQ.BCST m64 ymm k ymm
// VPORQ.BCST m64 ymm ymm
// VPORQ.BCST m64 zmm k zmm
// VPORQ.BCST m64 zmm zmm
func VPORQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPORQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPORQ_BCST_Z: Bitwise Logical OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPORQ.BCST.Z m64 xmm k xmm
// VPORQ.BCST.Z m64 ymm k ymm
// VPORQ.BCST.Z m64 zmm k zmm
func VPORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPORQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPORQ_Z: Bitwise Logical OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPORQ.Z m128 xmm k xmm
// VPORQ.Z m256 ymm k ymm
// VPORQ.Z xmm xmm k xmm
// VPORQ.Z ymm ymm k ymm
// VPORQ.Z m512 zmm k zmm
// VPORQ.Z zmm zmm k zmm
func VPORQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPORQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPROLD: Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLD imm8 m128 k xmm
// VPROLD imm8 m128 xmm
// VPROLD imm8 m256 k ymm
// VPROLD imm8 m256 ymm
// VPROLD imm8 xmm k xmm
// VPROLD imm8 xmm xmm
// VPROLD imm8 ymm k ymm
// VPROLD imm8 ymm ymm
// VPROLD imm8 m512 k zmm
// VPROLD imm8 m512 zmm
// VPROLD imm8 zmm k zmm
// VPROLD imm8 zmm zmm
func VPROLD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLD.Forms(), sffxs{}, ops)
}
// VPROLD_BCST: Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLD.BCST imm8 m32 k xmm
// VPROLD.BCST imm8 m32 k ymm
// VPROLD.BCST imm8 m32 xmm
// VPROLD.BCST imm8 m32 ymm
// VPROLD.BCST imm8 m32 k zmm
// VPROLD.BCST imm8 m32 zmm
func VPROLD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLD.Forms(), sffxs{sffxBCST}, ops)
}
// VPROLD_BCST_Z: Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLD.BCST.Z imm8 m32 k xmm
// VPROLD.BCST.Z imm8 m32 k ymm
// VPROLD.BCST.Z imm8 m32 k zmm
func VPROLD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPROLD_Z: Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLD.Z imm8 m128 k xmm
// VPROLD.Z imm8 m256 k ymm
// VPROLD.Z imm8 xmm k xmm
// VPROLD.Z imm8 ymm k ymm
// VPROLD.Z imm8 m512 k zmm
// VPROLD.Z imm8 zmm k zmm
func VPROLD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPROLQ: Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLQ imm8 m128 k xmm
// VPROLQ imm8 m128 xmm
// VPROLQ imm8 m256 k ymm
// VPROLQ imm8 m256 ymm
// VPROLQ imm8 xmm k xmm
// VPROLQ imm8 xmm xmm
// VPROLQ imm8 ymm k ymm
// VPROLQ imm8 ymm ymm
// VPROLQ imm8 m512 k zmm
// VPROLQ imm8 m512 zmm
// VPROLQ imm8 zmm k zmm
// VPROLQ imm8 zmm zmm
func VPROLQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLQ.Forms(), sffxs{}, ops)
}
// VPROLQ_BCST: Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLQ.BCST imm8 m64 k xmm
// VPROLQ.BCST imm8 m64 k ymm
// VPROLQ.BCST imm8 m64 xmm
// VPROLQ.BCST imm8 m64 ymm
// VPROLQ.BCST imm8 m64 k zmm
// VPROLQ.BCST imm8 m64 zmm
func VPROLQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPROLQ_BCST_Z: Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLQ.BCST.Z imm8 m64 k xmm
// VPROLQ.BCST.Z imm8 m64 k ymm
// VPROLQ.BCST.Z imm8 m64 k zmm
func VPROLQ_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPROLQ_Z: Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLQ.Z imm8 m128 k xmm
// VPROLQ.Z imm8 m256 k ymm
// VPROLQ.Z imm8 xmm k xmm
// VPROLQ.Z imm8 ymm k ymm
// VPROLQ.Z imm8 m512 k zmm
// VPROLQ.Z imm8 zmm k zmm
func VPROLQ_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPROLVD: Variable Rotate Packed Doubleword Left.
//
// Forms:
//
// VPROLVD m128 xmm k xmm
// VPROLVD m128 xmm xmm
// VPROLVD m256 ymm k ymm
// VPROLVD m256 ymm ymm
// VPROLVD xmm xmm k xmm
// VPROLVD xmm xmm xmm
// VPROLVD ymm ymm k ymm
// VPROLVD ymm ymm ymm
// VPROLVD m512 zmm k zmm
// VPROLVD m512 zmm zmm
// VPROLVD zmm zmm k zmm
// VPROLVD zmm zmm zmm
func VPROLVD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVD.Forms(), sffxs{}, ops)
}
// VPROLVD_BCST: Variable Rotate Packed Doubleword Left (Broadcast).
//
// Forms:
//
// VPROLVD.BCST m32 xmm k xmm
// VPROLVD.BCST m32 xmm xmm
// VPROLVD.BCST m32 ymm k ymm
// VPROLVD.BCST m32 ymm ymm
// VPROLVD.BCST m32 zmm k zmm
// VPROLVD.BCST m32 zmm zmm
func VPROLVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVD.Forms(), sffxs{sffxBCST}, ops)
}
// VPROLVD_BCST_Z: Variable Rotate Packed Doubleword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVD.BCST.Z m32 xmm k xmm
// VPROLVD.BCST.Z m32 ymm k ymm
// VPROLVD.BCST.Z m32 zmm k zmm
func VPROLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPROLVD_Z: Variable Rotate Packed Doubleword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVD.Z m128 xmm k xmm
// VPROLVD.Z m256 ymm k ymm
// VPROLVD.Z xmm xmm k xmm
// VPROLVD.Z ymm ymm k ymm
// VPROLVD.Z m512 zmm k zmm
// VPROLVD.Z zmm zmm k zmm
func VPROLVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPROLVQ: Variable Rotate Packed Quadword Left.
//
// Forms:
//
// VPROLVQ m128 xmm k xmm
// VPROLVQ m128 xmm xmm
// VPROLVQ m256 ymm k ymm
// VPROLVQ m256 ymm ymm
// VPROLVQ xmm xmm k xmm
// VPROLVQ xmm xmm xmm
// VPROLVQ ymm ymm k ymm
// VPROLVQ ymm ymm ymm
// VPROLVQ m512 zmm k zmm
// VPROLVQ m512 zmm zmm
// VPROLVQ zmm zmm k zmm
// VPROLVQ zmm zmm zmm
func VPROLVQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVQ.Forms(), sffxs{}, ops)
}
// VPROLVQ_BCST: Variable Rotate Packed Quadword Left (Broadcast).
//
// Forms:
//
// VPROLVQ.BCST m64 xmm k xmm
// VPROLVQ.BCST m64 xmm xmm
// VPROLVQ.BCST m64 ymm k ymm
// VPROLVQ.BCST m64 ymm ymm
// VPROLVQ.BCST m64 zmm k zmm
// VPROLVQ.BCST m64 zmm zmm
func VPROLVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPROLVQ_BCST_Z: Variable Rotate Packed Quadword Left (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPROLVQ.BCST.Z m64 xmm k xmm
// VPROLVQ.BCST.Z m64 ymm k ymm
// VPROLVQ.BCST.Z m64 zmm k zmm
func VPROLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPROLVQ_Z: Variable Rotate Packed Quadword Left (Zeroing Masking).
//
// Forms:
//
// VPROLVQ.Z m128 xmm k xmm
// VPROLVQ.Z m256 ymm k ymm
// VPROLVQ.Z xmm xmm k xmm
// VPROLVQ.Z ymm ymm k ymm
// VPROLVQ.Z m512 zmm k zmm
// VPROLVQ.Z zmm zmm k zmm
func VPROLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPROLVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPRORD: Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORD imm8 m128 k xmm
// VPRORD imm8 m128 xmm
// VPRORD imm8 m256 k ymm
// VPRORD imm8 m256 ymm
// VPRORD imm8 xmm k xmm
// VPRORD imm8 xmm xmm
// VPRORD imm8 ymm k ymm
// VPRORD imm8 ymm ymm
// VPRORD imm8 m512 k zmm
// VPRORD imm8 m512 zmm
// VPRORD imm8 zmm k zmm
// VPRORD imm8 zmm zmm
func VPRORD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORD.Forms(), sffxs{}, ops)
}
// VPRORD_BCST: Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORD.BCST imm8 m32 k xmm
// VPRORD.BCST imm8 m32 k ymm
// VPRORD.BCST imm8 m32 xmm
// VPRORD.BCST imm8 m32 ymm
// VPRORD.BCST imm8 m32 k zmm
// VPRORD.BCST imm8 m32 zmm
func VPRORD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORD.Forms(), sffxs{sffxBCST}, ops)
}
// VPRORD_BCST_Z: Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORD.BCST.Z imm8 m32 k xmm
// VPRORD.BCST.Z imm8 m32 k ymm
// VPRORD.BCST.Z imm8 m32 k zmm
func VPRORD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPRORD_Z: Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORD.Z imm8 m128 k xmm
// VPRORD.Z imm8 m256 k ymm
// VPRORD.Z imm8 xmm k xmm
// VPRORD.Z imm8 ymm k ymm
// VPRORD.Z imm8 m512 k zmm
// VPRORD.Z imm8 zmm k zmm
func VPRORD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPRORQ: Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORQ imm8 m128 k xmm
// VPRORQ imm8 m128 xmm
// VPRORQ imm8 m256 k ymm
// VPRORQ imm8 m256 ymm
// VPRORQ imm8 xmm k xmm
// VPRORQ imm8 xmm xmm
// VPRORQ imm8 ymm k ymm
// VPRORQ imm8 ymm ymm
// VPRORQ imm8 m512 k zmm
// VPRORQ imm8 m512 zmm
// VPRORQ imm8 zmm k zmm
// VPRORQ imm8 zmm zmm
func VPRORQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORQ.Forms(), sffxs{}, ops)
}
// VPRORQ_BCST: Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORQ.BCST imm8 m64 k xmm
// VPRORQ.BCST imm8 m64 k ymm
// VPRORQ.BCST imm8 m64 xmm
// VPRORQ.BCST imm8 m64 ymm
// VPRORQ.BCST imm8 m64 k zmm
// VPRORQ.BCST imm8 m64 zmm
func VPRORQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPRORQ_BCST_Z: Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORQ.BCST.Z imm8 m64 k xmm
// VPRORQ.BCST.Z imm8 m64 k ymm
// VPRORQ.BCST.Z imm8 m64 k zmm
func VPRORQ_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPRORQ_Z: Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORQ.Z imm8 m128 k xmm
// VPRORQ.Z imm8 m256 k ymm
// VPRORQ.Z imm8 xmm k xmm
// VPRORQ.Z imm8 ymm k ymm
// VPRORQ.Z imm8 m512 k zmm
// VPRORQ.Z imm8 zmm k zmm
func VPRORQ_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPRORVD: Variable Rotate Packed Doubleword Right.
//
// Forms:
//
// VPRORVD m128 xmm k xmm
// VPRORVD m128 xmm xmm
// VPRORVD m256 ymm k ymm
// VPRORVD m256 ymm ymm
// VPRORVD xmm xmm k xmm
// VPRORVD xmm xmm xmm
// VPRORVD ymm ymm k ymm
// VPRORVD ymm ymm ymm
// VPRORVD m512 zmm k zmm
// VPRORVD m512 zmm zmm
// VPRORVD zmm zmm k zmm
// VPRORVD zmm zmm zmm
func VPRORVD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVD.Forms(), sffxs{}, ops)
}
// VPRORVD_BCST: Variable Rotate Packed Doubleword Right (Broadcast).
//
// Forms:
//
// VPRORVD.BCST m32 xmm k xmm
// VPRORVD.BCST m32 xmm xmm
// VPRORVD.BCST m32 ymm k ymm
// VPRORVD.BCST m32 ymm ymm
// VPRORVD.BCST m32 zmm k zmm
// VPRORVD.BCST m32 zmm zmm
func VPRORVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVD.Forms(), sffxs{sffxBCST}, ops)
}
// VPRORVD_BCST_Z: Variable Rotate Packed Doubleword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVD.BCST.Z m32 xmm k xmm
// VPRORVD.BCST.Z m32 ymm k ymm
// VPRORVD.BCST.Z m32 zmm k zmm
func VPRORVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPRORVD_Z: Variable Rotate Packed Doubleword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVD.Z m128 xmm k xmm
// VPRORVD.Z m256 ymm k ymm
// VPRORVD.Z xmm xmm k xmm
// VPRORVD.Z ymm ymm k ymm
// VPRORVD.Z m512 zmm k zmm
// VPRORVD.Z zmm zmm k zmm
func VPRORVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPRORVQ: Variable Rotate Packed Quadword Right.
//
// Forms:
//
// VPRORVQ m128 xmm k xmm
// VPRORVQ m128 xmm xmm
// VPRORVQ m256 ymm k ymm
// VPRORVQ m256 ymm ymm
// VPRORVQ xmm xmm k xmm
// VPRORVQ xmm xmm xmm
// VPRORVQ ymm ymm k ymm
// VPRORVQ ymm ymm ymm
// VPRORVQ m512 zmm k zmm
// VPRORVQ m512 zmm zmm
// VPRORVQ zmm zmm k zmm
// VPRORVQ zmm zmm zmm
func VPRORVQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVQ.Forms(), sffxs{}, ops)
}
// VPRORVQ_BCST: Variable Rotate Packed Quadword Right (Broadcast).
//
// Forms:
//
// VPRORVQ.BCST m64 xmm k xmm
// VPRORVQ.BCST m64 xmm xmm
// VPRORVQ.BCST m64 ymm k ymm
// VPRORVQ.BCST m64 ymm ymm
// VPRORVQ.BCST m64 zmm k zmm
// VPRORVQ.BCST m64 zmm zmm
func VPRORVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPRORVQ_BCST_Z: Variable Rotate Packed Quadword Right (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPRORVQ.BCST.Z m64 xmm k xmm
// VPRORVQ.BCST.Z m64 ymm k ymm
// VPRORVQ.BCST.Z m64 zmm k zmm
func VPRORVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPRORVQ_Z: Variable Rotate Packed Quadword Right (Zeroing Masking).
//
// Forms:
//
// VPRORVQ.Z m128 xmm k xmm
// VPRORVQ.Z m256 ymm k ymm
// VPRORVQ.Z xmm xmm k xmm
// VPRORVQ.Z ymm ymm k ymm
// VPRORVQ.Z m512 zmm k zmm
// VPRORVQ.Z zmm zmm k zmm
func VPRORVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPRORVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSADBW: Compute Sum of Absolute Differences.
//
// Forms:
//
// VPSADBW m256 ymm ymm
// VPSADBW ymm ymm ymm
// VPSADBW m128 xmm xmm
// VPSADBW xmm xmm xmm
// VPSADBW m512 zmm zmm
// VPSADBW zmm zmm zmm
func VPSADBW(mxyz, xyz, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSADBW.Forms(), sffxs{}, []operand.Op{mxyz, xyz, xyz1})
}
// VPSCATTERDD: Scatter Packed Doubleword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDD xmm k vm32x
// VPSCATTERDD ymm k vm32y
// VPSCATTERDD zmm k vm32z
func VPSCATTERDD(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVPSCATTERDD.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VPSCATTERDQ: Scatter Packed Quadword Values with Signed Doubleword Indices.
//
// Forms:
//
// VPSCATTERDQ xmm k vm32x
// VPSCATTERDQ ymm k vm32x
// VPSCATTERDQ zmm k vm32y
func VPSCATTERDQ(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVPSCATTERDQ.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VPSCATTERQD: Scatter Packed Doubleword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQD xmm k vm64x
// VPSCATTERQD xmm k vm64y
// VPSCATTERQD ymm k vm64z
func VPSCATTERQD(xy, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVPSCATTERQD.Forms(), sffxs{}, []operand.Op{xy, k, v})
}
// VPSCATTERQQ: Scatter Packed Quadword Values with Signed Quadword Indices.
//
// Forms:
//
// VPSCATTERQQ xmm k vm64x
// VPSCATTERQQ ymm k vm64y
// VPSCATTERQQ zmm k vm64z
func VPSCATTERQQ(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVPSCATTERQQ.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VPSHUFB: Packed Shuffle Bytes.
//
// Forms:
//
// VPSHUFB m256 ymm ymm
// VPSHUFB ymm ymm ymm
// VPSHUFB m128 xmm xmm
// VPSHUFB xmm xmm xmm
// VPSHUFB m128 xmm k xmm
// VPSHUFB m256 ymm k ymm
// VPSHUFB xmm xmm k xmm
// VPSHUFB ymm ymm k ymm
// VPSHUFB m512 zmm k zmm
// VPSHUFB m512 zmm zmm
// VPSHUFB zmm zmm k zmm
// VPSHUFB zmm zmm zmm
func VPSHUFB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFB.Forms(), sffxs{}, ops)
}
// VPSHUFB_Z: Packed Shuffle Bytes (Zeroing Masking).
//
// Forms:
//
// VPSHUFB.Z m128 xmm k xmm
// VPSHUFB.Z m256 ymm k ymm
// VPSHUFB.Z xmm xmm k xmm
// VPSHUFB.Z ymm ymm k ymm
// VPSHUFB.Z m512 zmm k zmm
// VPSHUFB.Z zmm zmm k zmm
func VPSHUFB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSHUFD: Shuffle Packed Doublewords.
//
// Forms:
//
// VPSHUFD imm8 m256 ymm
// VPSHUFD imm8 ymm ymm
// VPSHUFD imm8 m128 xmm
// VPSHUFD imm8 xmm xmm
// VPSHUFD imm8 m128 k xmm
// VPSHUFD imm8 m256 k ymm
// VPSHUFD imm8 xmm k xmm
// VPSHUFD imm8 ymm k ymm
// VPSHUFD imm8 m512 k zmm
// VPSHUFD imm8 m512 zmm
// VPSHUFD imm8 zmm k zmm
// VPSHUFD imm8 zmm zmm
func VPSHUFD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFD.Forms(), sffxs{}, ops)
}
// VPSHUFD_BCST: Shuffle Packed Doublewords (Broadcast).
//
// Forms:
//
// VPSHUFD.BCST imm8 m32 k xmm
// VPSHUFD.BCST imm8 m32 k ymm
// VPSHUFD.BCST imm8 m32 xmm
// VPSHUFD.BCST imm8 m32 ymm
// VPSHUFD.BCST imm8 m32 k zmm
// VPSHUFD.BCST imm8 m32 zmm
func VPSHUFD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSHUFD_BCST_Z: Shuffle Packed Doublewords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSHUFD.BCST.Z imm8 m32 k xmm
// VPSHUFD.BCST.Z imm8 m32 k ymm
// VPSHUFD.BCST.Z imm8 m32 k zmm
func VPSHUFD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSHUFD_Z: Shuffle Packed Doublewords (Zeroing Masking).
//
// Forms:
//
// VPSHUFD.Z imm8 m128 k xmm
// VPSHUFD.Z imm8 m256 k ymm
// VPSHUFD.Z imm8 xmm k xmm
// VPSHUFD.Z imm8 ymm k ymm
// VPSHUFD.Z imm8 m512 k zmm
// VPSHUFD.Z imm8 zmm k zmm
func VPSHUFD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPSHUFHW: Shuffle Packed High Words.
//
// Forms:
//
// VPSHUFHW imm8 m256 ymm
// VPSHUFHW imm8 ymm ymm
// VPSHUFHW imm8 m128 xmm
// VPSHUFHW imm8 xmm xmm
// VPSHUFHW imm8 m128 k xmm
// VPSHUFHW imm8 m256 k ymm
// VPSHUFHW imm8 xmm k xmm
// VPSHUFHW imm8 ymm k ymm
// VPSHUFHW imm8 m512 k zmm
// VPSHUFHW imm8 m512 zmm
// VPSHUFHW imm8 zmm k zmm
// VPSHUFHW imm8 zmm zmm
func VPSHUFHW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFHW.Forms(), sffxs{}, ops)
}
// VPSHUFHW_Z: Shuffle Packed High Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFHW.Z imm8 m128 k xmm
// VPSHUFHW.Z imm8 m256 k ymm
// VPSHUFHW.Z imm8 xmm k xmm
// VPSHUFHW.Z imm8 ymm k ymm
// VPSHUFHW.Z imm8 m512 k zmm
// VPSHUFHW.Z imm8 zmm k zmm
func VPSHUFHW_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFHW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPSHUFLW: Shuffle Packed Low Words.
//
// Forms:
//
// VPSHUFLW imm8 m256 ymm
// VPSHUFLW imm8 ymm ymm
// VPSHUFLW imm8 m128 xmm
// VPSHUFLW imm8 xmm xmm
// VPSHUFLW imm8 m128 k xmm
// VPSHUFLW imm8 m256 k ymm
// VPSHUFLW imm8 xmm k xmm
// VPSHUFLW imm8 ymm k ymm
// VPSHUFLW imm8 m512 k zmm
// VPSHUFLW imm8 m512 zmm
// VPSHUFLW imm8 zmm k zmm
// VPSHUFLW imm8 zmm zmm
func VPSHUFLW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFLW.Forms(), sffxs{}, ops)
}
// VPSHUFLW_Z: Shuffle Packed Low Words (Zeroing Masking).
//
// Forms:
//
// VPSHUFLW.Z imm8 m128 k xmm
// VPSHUFLW.Z imm8 m256 k ymm
// VPSHUFLW.Z imm8 xmm k xmm
// VPSHUFLW.Z imm8 ymm k ymm
// VPSHUFLW.Z imm8 m512 k zmm
// VPSHUFLW.Z imm8 zmm k zmm
func VPSHUFLW_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSHUFLW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VPSIGNB: Packed Sign of Byte Integers.
//
// Forms:
//
// VPSIGNB m256 ymm ymm
// VPSIGNB ymm ymm ymm
// VPSIGNB m128 xmm xmm
// VPSIGNB xmm xmm xmm
func VPSIGNB(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSIGNB.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPSIGND: Packed Sign of Doubleword Integers.
//
// Forms:
//
// VPSIGND m256 ymm ymm
// VPSIGND ymm ymm ymm
// VPSIGND m128 xmm xmm
// VPSIGND xmm xmm xmm
func VPSIGND(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSIGND.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPSIGNW: Packed Sign of Word Integers.
//
// Forms:
//
// VPSIGNW m256 ymm ymm
// VPSIGNW ymm ymm ymm
// VPSIGNW m128 xmm xmm
// VPSIGNW xmm xmm xmm
func VPSIGNW(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSIGNW.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPSLLD: Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLD imm8 ymm ymm
// VPSLLD m128 ymm ymm
// VPSLLD xmm ymm ymm
// VPSLLD imm8 xmm xmm
// VPSLLD m128 xmm xmm
// VPSLLD xmm xmm xmm
// VPSLLD imm8 m128 k xmm
// VPSLLD imm8 m128 xmm
// VPSLLD imm8 m256 k ymm
// VPSLLD imm8 m256 ymm
// VPSLLD imm8 xmm k xmm
// VPSLLD imm8 ymm k ymm
// VPSLLD m128 xmm k xmm
// VPSLLD m128 ymm k ymm
// VPSLLD xmm xmm k xmm
// VPSLLD xmm ymm k ymm
// VPSLLD imm8 m512 k zmm
// VPSLLD imm8 m512 zmm
// VPSLLD imm8 zmm k zmm
// VPSLLD imm8 zmm zmm
// VPSLLD m128 zmm k zmm
// VPSLLD m128 zmm zmm
// VPSLLD xmm zmm k zmm
// VPSLLD xmm zmm zmm
func VPSLLD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLD.Forms(), sffxs{}, ops)
}
// VPSLLDQ: Shift Packed Double Quadword Left Logical.
//
// Forms:
//
// VPSLLDQ imm8 ymm ymm
// VPSLLDQ imm8 xmm xmm
// VPSLLDQ imm8 m128 xmm
// VPSLLDQ imm8 m256 ymm
// VPSLLDQ imm8 m512 zmm
// VPSLLDQ imm8 zmm zmm
func VPSLLDQ(i, mxyz, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLDQ.Forms(), sffxs{}, []operand.Op{i, mxyz, xyz})
}
// VPSLLD_BCST: Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLD.BCST imm8 m32 k xmm
// VPSLLD.BCST imm8 m32 k ymm
// VPSLLD.BCST imm8 m32 xmm
// VPSLLD.BCST imm8 m32 ymm
// VPSLLD.BCST imm8 m32 k zmm
// VPSLLD.BCST imm8 m32 zmm
func VPSLLD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSLLD_BCST_Z: Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLD.BCST.Z imm8 m32 k xmm
// VPSLLD.BCST.Z imm8 m32 k ymm
// VPSLLD.BCST.Z imm8 m32 k zmm
func VPSLLD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSLLD_Z: Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLD.Z imm8 m128 k xmm
// VPSLLD.Z imm8 m256 k ymm
// VPSLLD.Z imm8 xmm k xmm
// VPSLLD.Z imm8 ymm k ymm
// VPSLLD.Z m128 xmm k xmm
// VPSLLD.Z m128 ymm k ymm
// VPSLLD.Z xmm xmm k xmm
// VPSLLD.Z xmm ymm k ymm
// VPSLLD.Z imm8 m512 k zmm
// VPSLLD.Z imm8 zmm k zmm
// VPSLLD.Z m128 zmm k zmm
// VPSLLD.Z xmm zmm k zmm
func VPSLLD_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLD.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSLLQ: Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLQ imm8 ymm ymm
// VPSLLQ m128 ymm ymm
// VPSLLQ xmm ymm ymm
// VPSLLQ imm8 xmm xmm
// VPSLLQ m128 xmm xmm
// VPSLLQ xmm xmm xmm
// VPSLLQ imm8 m128 k xmm
// VPSLLQ imm8 m128 xmm
// VPSLLQ imm8 m256 k ymm
// VPSLLQ imm8 m256 ymm
// VPSLLQ imm8 xmm k xmm
// VPSLLQ imm8 ymm k ymm
// VPSLLQ m128 xmm k xmm
// VPSLLQ m128 ymm k ymm
// VPSLLQ xmm xmm k xmm
// VPSLLQ xmm ymm k ymm
// VPSLLQ imm8 m512 k zmm
// VPSLLQ imm8 m512 zmm
// VPSLLQ imm8 zmm k zmm
// VPSLLQ imm8 zmm zmm
// VPSLLQ m128 zmm k zmm
// VPSLLQ m128 zmm zmm
// VPSLLQ xmm zmm k zmm
// VPSLLQ xmm zmm zmm
func VPSLLQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLQ.Forms(), sffxs{}, ops)
}
// VPSLLQ_BCST: Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLQ.BCST imm8 m64 k xmm
// VPSLLQ.BCST imm8 m64 k ymm
// VPSLLQ.BCST imm8 m64 xmm
// VPSLLQ.BCST imm8 m64 ymm
// VPSLLQ.BCST imm8 m64 k zmm
// VPSLLQ.BCST imm8 m64 zmm
func VPSLLQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSLLQ_BCST_Z: Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLQ.BCST.Z imm8 m64 k xmm
// VPSLLQ.BCST.Z imm8 m64 k ymm
// VPSLLQ.BCST.Z imm8 m64 k zmm
func VPSLLQ_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSLLQ_Z: Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLQ.Z imm8 m128 k xmm
// VPSLLQ.Z imm8 m256 k ymm
// VPSLLQ.Z imm8 xmm k xmm
// VPSLLQ.Z imm8 ymm k ymm
// VPSLLQ.Z m128 xmm k xmm
// VPSLLQ.Z m128 ymm k ymm
// VPSLLQ.Z xmm xmm k xmm
// VPSLLQ.Z xmm ymm k ymm
// VPSLLQ.Z imm8 m512 k zmm
// VPSLLQ.Z imm8 zmm k zmm
// VPSLLQ.Z m128 zmm k zmm
// VPSLLQ.Z xmm zmm k zmm
func VPSLLQ_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLQ.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSLLVD: Variable Shift Packed Doubleword Data Left Logical.
//
// Forms:
//
// VPSLLVD m128 xmm xmm
// VPSLLVD m256 ymm ymm
// VPSLLVD xmm xmm xmm
// VPSLLVD ymm ymm ymm
// VPSLLVD m128 xmm k xmm
// VPSLLVD m256 ymm k ymm
// VPSLLVD xmm xmm k xmm
// VPSLLVD ymm ymm k ymm
// VPSLLVD m512 zmm k zmm
// VPSLLVD m512 zmm zmm
// VPSLLVD zmm zmm k zmm
// VPSLLVD zmm zmm zmm
func VPSLLVD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVD.Forms(), sffxs{}, ops)
}
// VPSLLVD_BCST: Variable Shift Packed Doubleword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVD.BCST m32 xmm k xmm
// VPSLLVD.BCST m32 xmm xmm
// VPSLLVD.BCST m32 ymm k ymm
// VPSLLVD.BCST m32 ymm ymm
// VPSLLVD.BCST m32 zmm k zmm
// VPSLLVD.BCST m32 zmm zmm
func VPSLLVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSLLVD_BCST_Z: Variable Shift Packed Doubleword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVD.BCST.Z m32 xmm k xmm
// VPSLLVD.BCST.Z m32 ymm k ymm
// VPSLLVD.BCST.Z m32 zmm k zmm
func VPSLLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSLLVD_Z: Variable Shift Packed Doubleword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVD.Z m128 xmm k xmm
// VPSLLVD.Z m256 ymm k ymm
// VPSLLVD.Z xmm xmm k xmm
// VPSLLVD.Z ymm ymm k ymm
// VPSLLVD.Z m512 zmm k zmm
// VPSLLVD.Z zmm zmm k zmm
func VPSLLVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSLLVQ: Variable Shift Packed Quadword Data Left Logical.
//
// Forms:
//
// VPSLLVQ m128 xmm xmm
// VPSLLVQ m256 ymm ymm
// VPSLLVQ xmm xmm xmm
// VPSLLVQ ymm ymm ymm
// VPSLLVQ m128 xmm k xmm
// VPSLLVQ m256 ymm k ymm
// VPSLLVQ xmm xmm k xmm
// VPSLLVQ ymm ymm k ymm
// VPSLLVQ m512 zmm k zmm
// VPSLLVQ m512 zmm zmm
// VPSLLVQ zmm zmm k zmm
// VPSLLVQ zmm zmm zmm
func VPSLLVQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVQ.Forms(), sffxs{}, ops)
}
// VPSLLVQ_BCST: Variable Shift Packed Quadword Data Left Logical (Broadcast).
//
// Forms:
//
// VPSLLVQ.BCST m64 xmm k xmm
// VPSLLVQ.BCST m64 xmm xmm
// VPSLLVQ.BCST m64 ymm k ymm
// VPSLLVQ.BCST m64 ymm ymm
// VPSLLVQ.BCST m64 zmm k zmm
// VPSLLVQ.BCST m64 zmm zmm
func VPSLLVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSLLVQ_BCST_Z: Variable Shift Packed Quadword Data Left Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.BCST.Z m64 xmm k xmm
// VPSLLVQ.BCST.Z m64 ymm k ymm
// VPSLLVQ.BCST.Z m64 zmm k zmm
func VPSLLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSLLVQ_Z: Variable Shift Packed Quadword Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVQ.Z m128 xmm k xmm
// VPSLLVQ.Z m256 ymm k ymm
// VPSLLVQ.Z xmm xmm k xmm
// VPSLLVQ.Z ymm ymm k ymm
// VPSLLVQ.Z m512 zmm k zmm
// VPSLLVQ.Z zmm zmm k zmm
func VPSLLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSLLVW: Variable Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLVW m128 xmm k xmm
// VPSLLVW m128 xmm xmm
// VPSLLVW m256 ymm k ymm
// VPSLLVW m256 ymm ymm
// VPSLLVW xmm xmm k xmm
// VPSLLVW xmm xmm xmm
// VPSLLVW ymm ymm k ymm
// VPSLLVW ymm ymm ymm
// VPSLLVW m512 zmm k zmm
// VPSLLVW m512 zmm zmm
// VPSLLVW zmm zmm k zmm
// VPSLLVW zmm zmm zmm
func VPSLLVW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVW.Forms(), sffxs{}, ops)
}
// VPSLLVW_Z: Variable Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLVW.Z m128 xmm k xmm
// VPSLLVW.Z m256 ymm k ymm
// VPSLLVW.Z xmm xmm k xmm
// VPSLLVW.Z ymm ymm k ymm
// VPSLLVW.Z m512 zmm k zmm
// VPSLLVW.Z zmm zmm k zmm
func VPSLLVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSLLW: Shift Packed Word Data Left Logical.
//
// Forms:
//
// VPSLLW imm8 ymm ymm
// VPSLLW m128 ymm ymm
// VPSLLW xmm ymm ymm
// VPSLLW imm8 xmm xmm
// VPSLLW m128 xmm xmm
// VPSLLW xmm xmm xmm
// VPSLLW imm8 m128 k xmm
// VPSLLW imm8 m128 xmm
// VPSLLW imm8 m256 k ymm
// VPSLLW imm8 m256 ymm
// VPSLLW imm8 xmm k xmm
// VPSLLW imm8 ymm k ymm
// VPSLLW m128 xmm k xmm
// VPSLLW m128 ymm k ymm
// VPSLLW xmm xmm k xmm
// VPSLLW xmm ymm k ymm
// VPSLLW imm8 m512 k zmm
// VPSLLW imm8 m512 zmm
// VPSLLW imm8 zmm k zmm
// VPSLLW imm8 zmm zmm
// VPSLLW m128 zmm k zmm
// VPSLLW m128 zmm zmm
// VPSLLW xmm zmm k zmm
// VPSLLW xmm zmm zmm
func VPSLLW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLW.Forms(), sffxs{}, ops)
}
// VPSLLW_Z: Shift Packed Word Data Left Logical (Zeroing Masking).
//
// Forms:
//
// VPSLLW.Z imm8 m128 k xmm
// VPSLLW.Z imm8 m256 k ymm
// VPSLLW.Z imm8 xmm k xmm
// VPSLLW.Z imm8 ymm k ymm
// VPSLLW.Z m128 xmm k xmm
// VPSLLW.Z m128 ymm k ymm
// VPSLLW.Z xmm xmm k xmm
// VPSLLW.Z xmm ymm k ymm
// VPSLLW.Z imm8 m512 k zmm
// VPSLLW.Z imm8 zmm k zmm
// VPSLLW.Z m128 zmm k zmm
// VPSLLW.Z xmm zmm k zmm
func VPSLLW_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSLLW.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRAD: Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAD imm8 ymm ymm
// VPSRAD m128 ymm ymm
// VPSRAD xmm ymm ymm
// VPSRAD imm8 xmm xmm
// VPSRAD m128 xmm xmm
// VPSRAD xmm xmm xmm
// VPSRAD imm8 m128 k xmm
// VPSRAD imm8 m128 xmm
// VPSRAD imm8 m256 k ymm
// VPSRAD imm8 m256 ymm
// VPSRAD imm8 xmm k xmm
// VPSRAD imm8 ymm k ymm
// VPSRAD m128 xmm k xmm
// VPSRAD m128 ymm k ymm
// VPSRAD xmm xmm k xmm
// VPSRAD xmm ymm k ymm
// VPSRAD imm8 m512 k zmm
// VPSRAD imm8 m512 zmm
// VPSRAD imm8 zmm k zmm
// VPSRAD imm8 zmm zmm
// VPSRAD m128 zmm k zmm
// VPSRAD m128 zmm zmm
// VPSRAD xmm zmm k zmm
// VPSRAD xmm zmm zmm
func VPSRAD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAD.Forms(), sffxs{}, ops)
}
// VPSRAD_BCST: Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAD.BCST imm8 m32 k xmm
// VPSRAD.BCST imm8 m32 k ymm
// VPSRAD.BCST imm8 m32 xmm
// VPSRAD.BCST imm8 m32 ymm
// VPSRAD.BCST imm8 m32 k zmm
// VPSRAD.BCST imm8 m32 zmm
func VPSRAD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRAD_BCST_Z: Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAD.BCST.Z imm8 m32 k xmm
// VPSRAD.BCST.Z imm8 m32 k ymm
// VPSRAD.BCST.Z imm8 m32 k zmm
func VPSRAD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSRAD_Z: Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAD.Z imm8 m128 k xmm
// VPSRAD.Z imm8 m256 k ymm
// VPSRAD.Z imm8 xmm k xmm
// VPSRAD.Z imm8 ymm k ymm
// VPSRAD.Z m128 xmm k xmm
// VPSRAD.Z m128 ymm k ymm
// VPSRAD.Z xmm xmm k xmm
// VPSRAD.Z xmm ymm k ymm
// VPSRAD.Z imm8 m512 k zmm
// VPSRAD.Z imm8 zmm k zmm
// VPSRAD.Z m128 zmm k zmm
// VPSRAD.Z xmm zmm k zmm
func VPSRAD_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAD.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRAQ: Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAQ imm8 m128 k xmm
// VPSRAQ imm8 m128 xmm
// VPSRAQ imm8 m256 k ymm
// VPSRAQ imm8 m256 ymm
// VPSRAQ imm8 xmm k xmm
// VPSRAQ imm8 xmm xmm
// VPSRAQ imm8 ymm k ymm
// VPSRAQ imm8 ymm ymm
// VPSRAQ m128 xmm k xmm
// VPSRAQ m128 xmm xmm
// VPSRAQ m128 ymm k ymm
// VPSRAQ m128 ymm ymm
// VPSRAQ xmm xmm k xmm
// VPSRAQ xmm xmm xmm
// VPSRAQ xmm ymm k ymm
// VPSRAQ xmm ymm ymm
// VPSRAQ imm8 m512 k zmm
// VPSRAQ imm8 m512 zmm
// VPSRAQ imm8 zmm k zmm
// VPSRAQ imm8 zmm zmm
// VPSRAQ m128 zmm k zmm
// VPSRAQ m128 zmm zmm
// VPSRAQ xmm zmm k zmm
// VPSRAQ xmm zmm zmm
func VPSRAQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAQ.Forms(), sffxs{}, ops)
}
// VPSRAQ_BCST: Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAQ.BCST imm8 m64 k xmm
// VPSRAQ.BCST imm8 m64 k ymm
// VPSRAQ.BCST imm8 m64 xmm
// VPSRAQ.BCST imm8 m64 ymm
// VPSRAQ.BCST imm8 m64 k zmm
// VPSRAQ.BCST imm8 m64 zmm
func VPSRAQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRAQ_BCST_Z: Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAQ.BCST.Z imm8 m64 k xmm
// VPSRAQ.BCST.Z imm8 m64 k ymm
// VPSRAQ.BCST.Z imm8 m64 k zmm
func VPSRAQ_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSRAQ_Z: Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAQ.Z imm8 m128 k xmm
// VPSRAQ.Z imm8 m256 k ymm
// VPSRAQ.Z imm8 xmm k xmm
// VPSRAQ.Z imm8 ymm k ymm
// VPSRAQ.Z m128 xmm k xmm
// VPSRAQ.Z m128 ymm k ymm
// VPSRAQ.Z xmm xmm k xmm
// VPSRAQ.Z xmm ymm k ymm
// VPSRAQ.Z imm8 m512 k zmm
// VPSRAQ.Z imm8 zmm k zmm
// VPSRAQ.Z m128 zmm k zmm
// VPSRAQ.Z xmm zmm k zmm
func VPSRAQ_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAQ.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRAVD: Variable Shift Packed Doubleword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVD m128 xmm xmm
// VPSRAVD m256 ymm ymm
// VPSRAVD xmm xmm xmm
// VPSRAVD ymm ymm ymm
// VPSRAVD m128 xmm k xmm
// VPSRAVD m256 ymm k ymm
// VPSRAVD xmm xmm k xmm
// VPSRAVD ymm ymm k ymm
// VPSRAVD m512 zmm k zmm
// VPSRAVD m512 zmm zmm
// VPSRAVD zmm zmm k zmm
// VPSRAVD zmm zmm zmm
func VPSRAVD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVD.Forms(), sffxs{}, ops)
}
// VPSRAVD_BCST: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVD.BCST m32 xmm k xmm
// VPSRAVD.BCST m32 xmm xmm
// VPSRAVD.BCST m32 ymm k ymm
// VPSRAVD.BCST m32 ymm ymm
// VPSRAVD.BCST m32 zmm k zmm
// VPSRAVD.BCST m32 zmm zmm
func VPSRAVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRAVD_BCST_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVD.BCST.Z m32 xmm k xmm
// VPSRAVD.BCST.Z m32 ymm k ymm
// VPSRAVD.BCST.Z m32 zmm k zmm
func VPSRAVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSRAVD_Z: Variable Shift Packed Doubleword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVD.Z m128 xmm k xmm
// VPSRAVD.Z m256 ymm k ymm
// VPSRAVD.Z xmm xmm k xmm
// VPSRAVD.Z ymm ymm k ymm
// VPSRAVD.Z m512 zmm k zmm
// VPSRAVD.Z zmm zmm k zmm
func VPSRAVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRAVQ: Variable Shift Packed Quadword Data Right Arithmetic.
//
// Forms:
//
// VPSRAVQ m128 xmm k xmm
// VPSRAVQ m128 xmm xmm
// VPSRAVQ m256 ymm k ymm
// VPSRAVQ m256 ymm ymm
// VPSRAVQ xmm xmm k xmm
// VPSRAVQ xmm xmm xmm
// VPSRAVQ ymm ymm k ymm
// VPSRAVQ ymm ymm ymm
// VPSRAVQ m512 zmm k zmm
// VPSRAVQ m512 zmm zmm
// VPSRAVQ zmm zmm k zmm
// VPSRAVQ zmm zmm zmm
func VPSRAVQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVQ.Forms(), sffxs{}, ops)
}
// VPSRAVQ_BCST: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast).
//
// Forms:
//
// VPSRAVQ.BCST m64 xmm k xmm
// VPSRAVQ.BCST m64 xmm xmm
// VPSRAVQ.BCST m64 ymm k ymm
// VPSRAVQ.BCST m64 ymm ymm
// VPSRAVQ.BCST m64 zmm k zmm
// VPSRAVQ.BCST m64 zmm zmm
func VPSRAVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRAVQ_BCST_Z: Variable Shift Packed Quadword Data Right Arithmetic (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.BCST.Z m64 xmm k xmm
// VPSRAVQ.BCST.Z m64 ymm k ymm
// VPSRAVQ.BCST.Z m64 zmm k zmm
func VPSRAVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSRAVQ_Z: Variable Shift Packed Quadword Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVQ.Z m128 xmm k xmm
// VPSRAVQ.Z m256 ymm k ymm
// VPSRAVQ.Z xmm xmm k xmm
// VPSRAVQ.Z ymm ymm k ymm
// VPSRAVQ.Z m512 zmm k zmm
// VPSRAVQ.Z zmm zmm k zmm
func VPSRAVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRAVW: Variable Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAVW m128 xmm k xmm
// VPSRAVW m128 xmm xmm
// VPSRAVW m256 ymm k ymm
// VPSRAVW m256 ymm ymm
// VPSRAVW xmm xmm k xmm
// VPSRAVW xmm xmm xmm
// VPSRAVW ymm ymm k ymm
// VPSRAVW ymm ymm ymm
// VPSRAVW m512 zmm k zmm
// VPSRAVW m512 zmm zmm
// VPSRAVW zmm zmm k zmm
// VPSRAVW zmm zmm zmm
func VPSRAVW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVW.Forms(), sffxs{}, ops)
}
// VPSRAVW_Z: Variable Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAVW.Z m128 xmm k xmm
// VPSRAVW.Z m256 ymm k ymm
// VPSRAVW.Z xmm xmm k xmm
// VPSRAVW.Z ymm ymm k ymm
// VPSRAVW.Z m512 zmm k zmm
// VPSRAVW.Z zmm zmm k zmm
func VPSRAVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRAW: Shift Packed Word Data Right Arithmetic.
//
// Forms:
//
// VPSRAW imm8 ymm ymm
// VPSRAW m128 ymm ymm
// VPSRAW xmm ymm ymm
// VPSRAW imm8 xmm xmm
// VPSRAW m128 xmm xmm
// VPSRAW xmm xmm xmm
// VPSRAW imm8 m128 k xmm
// VPSRAW imm8 m128 xmm
// VPSRAW imm8 m256 k ymm
// VPSRAW imm8 m256 ymm
// VPSRAW imm8 xmm k xmm
// VPSRAW imm8 ymm k ymm
// VPSRAW m128 xmm k xmm
// VPSRAW m128 ymm k ymm
// VPSRAW xmm xmm k xmm
// VPSRAW xmm ymm k ymm
// VPSRAW imm8 m512 k zmm
// VPSRAW imm8 m512 zmm
// VPSRAW imm8 zmm k zmm
// VPSRAW imm8 zmm zmm
// VPSRAW m128 zmm k zmm
// VPSRAW m128 zmm zmm
// VPSRAW xmm zmm k zmm
// VPSRAW xmm zmm zmm
func VPSRAW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAW.Forms(), sffxs{}, ops)
}
// VPSRAW_Z: Shift Packed Word Data Right Arithmetic (Zeroing Masking).
//
// Forms:
//
// VPSRAW.Z imm8 m128 k xmm
// VPSRAW.Z imm8 m256 k ymm
// VPSRAW.Z imm8 xmm k xmm
// VPSRAW.Z imm8 ymm k ymm
// VPSRAW.Z m128 xmm k xmm
// VPSRAW.Z m128 ymm k ymm
// VPSRAW.Z xmm xmm k xmm
// VPSRAW.Z xmm ymm k ymm
// VPSRAW.Z imm8 m512 k zmm
// VPSRAW.Z imm8 zmm k zmm
// VPSRAW.Z m128 zmm k zmm
// VPSRAW.Z xmm zmm k zmm
func VPSRAW_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRAW.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRLD: Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLD imm8 ymm ymm
// VPSRLD m128 ymm ymm
// VPSRLD xmm ymm ymm
// VPSRLD imm8 xmm xmm
// VPSRLD m128 xmm xmm
// VPSRLD xmm xmm xmm
// VPSRLD imm8 m128 k xmm
// VPSRLD imm8 m128 xmm
// VPSRLD imm8 m256 k ymm
// VPSRLD imm8 m256 ymm
// VPSRLD imm8 xmm k xmm
// VPSRLD imm8 ymm k ymm
// VPSRLD m128 xmm k xmm
// VPSRLD m128 ymm k ymm
// VPSRLD xmm xmm k xmm
// VPSRLD xmm ymm k ymm
// VPSRLD imm8 m512 k zmm
// VPSRLD imm8 m512 zmm
// VPSRLD imm8 zmm k zmm
// VPSRLD imm8 zmm zmm
// VPSRLD m128 zmm k zmm
// VPSRLD m128 zmm zmm
// VPSRLD xmm zmm k zmm
// VPSRLD xmm zmm zmm
func VPSRLD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLD.Forms(), sffxs{}, ops)
}
// VPSRLDQ: Shift Packed Double Quadword Right Logical.
//
// Forms:
//
// VPSRLDQ imm8 ymm ymm
// VPSRLDQ imm8 xmm xmm
// VPSRLDQ imm8 m128 xmm
// VPSRLDQ imm8 m256 ymm
// VPSRLDQ imm8 m512 zmm
// VPSRLDQ imm8 zmm zmm
func VPSRLDQ(i, mxyz, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLDQ.Forms(), sffxs{}, []operand.Op{i, mxyz, xyz})
}
// VPSRLD_BCST: Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLD.BCST imm8 m32 k xmm
// VPSRLD.BCST imm8 m32 k ymm
// VPSRLD.BCST imm8 m32 xmm
// VPSRLD.BCST imm8 m32 ymm
// VPSRLD.BCST imm8 m32 k zmm
// VPSRLD.BCST imm8 m32 zmm
func VPSRLD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRLD_BCST_Z: Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLD.BCST.Z imm8 m32 k xmm
// VPSRLD.BCST.Z imm8 m32 k ymm
// VPSRLD.BCST.Z imm8 m32 k zmm
func VPSRLD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSRLD_Z: Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLD.Z imm8 m128 k xmm
// VPSRLD.Z imm8 m256 k ymm
// VPSRLD.Z imm8 xmm k xmm
// VPSRLD.Z imm8 ymm k ymm
// VPSRLD.Z m128 xmm k xmm
// VPSRLD.Z m128 ymm k ymm
// VPSRLD.Z xmm xmm k xmm
// VPSRLD.Z xmm ymm k ymm
// VPSRLD.Z imm8 m512 k zmm
// VPSRLD.Z imm8 zmm k zmm
// VPSRLD.Z m128 zmm k zmm
// VPSRLD.Z xmm zmm k zmm
func VPSRLD_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLD.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRLQ: Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLQ imm8 ymm ymm
// VPSRLQ m128 ymm ymm
// VPSRLQ xmm ymm ymm
// VPSRLQ imm8 xmm xmm
// VPSRLQ m128 xmm xmm
// VPSRLQ xmm xmm xmm
// VPSRLQ imm8 m128 k xmm
// VPSRLQ imm8 m128 xmm
// VPSRLQ imm8 m256 k ymm
// VPSRLQ imm8 m256 ymm
// VPSRLQ imm8 xmm k xmm
// VPSRLQ imm8 ymm k ymm
// VPSRLQ m128 xmm k xmm
// VPSRLQ m128 ymm k ymm
// VPSRLQ xmm xmm k xmm
// VPSRLQ xmm ymm k ymm
// VPSRLQ imm8 m512 k zmm
// VPSRLQ imm8 m512 zmm
// VPSRLQ imm8 zmm k zmm
// VPSRLQ imm8 zmm zmm
// VPSRLQ m128 zmm k zmm
// VPSRLQ m128 zmm zmm
// VPSRLQ xmm zmm k zmm
// VPSRLQ xmm zmm zmm
func VPSRLQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLQ.Forms(), sffxs{}, ops)
}
// VPSRLQ_BCST: Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLQ.BCST imm8 m64 k xmm
// VPSRLQ.BCST imm8 m64 k ymm
// VPSRLQ.BCST imm8 m64 xmm
// VPSRLQ.BCST imm8 m64 ymm
// VPSRLQ.BCST imm8 m64 k zmm
// VPSRLQ.BCST imm8 m64 zmm
func VPSRLQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRLQ_BCST_Z: Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLQ.BCST.Z imm8 m64 k xmm
// VPSRLQ.BCST.Z imm8 m64 k ymm
// VPSRLQ.BCST.Z imm8 m64 k zmm
func VPSRLQ_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VPSRLQ_Z: Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLQ.Z imm8 m128 k xmm
// VPSRLQ.Z imm8 m256 k ymm
// VPSRLQ.Z imm8 xmm k xmm
// VPSRLQ.Z imm8 ymm k ymm
// VPSRLQ.Z m128 xmm k xmm
// VPSRLQ.Z m128 ymm k ymm
// VPSRLQ.Z xmm xmm k xmm
// VPSRLQ.Z xmm ymm k ymm
// VPSRLQ.Z imm8 m512 k zmm
// VPSRLQ.Z imm8 zmm k zmm
// VPSRLQ.Z m128 zmm k zmm
// VPSRLQ.Z xmm zmm k zmm
func VPSRLQ_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLQ.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSRLVD: Variable Shift Packed Doubleword Data Right Logical.
//
// Forms:
//
// VPSRLVD m128 xmm xmm
// VPSRLVD m256 ymm ymm
// VPSRLVD xmm xmm xmm
// VPSRLVD ymm ymm ymm
// VPSRLVD m128 xmm k xmm
// VPSRLVD m256 ymm k ymm
// VPSRLVD xmm xmm k xmm
// VPSRLVD ymm ymm k ymm
// VPSRLVD m512 zmm k zmm
// VPSRLVD m512 zmm zmm
// VPSRLVD zmm zmm k zmm
// VPSRLVD zmm zmm zmm
func VPSRLVD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVD.Forms(), sffxs{}, ops)
}
// VPSRLVD_BCST: Variable Shift Packed Doubleword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVD.BCST m32 xmm k xmm
// VPSRLVD.BCST m32 xmm xmm
// VPSRLVD.BCST m32 ymm k ymm
// VPSRLVD.BCST m32 ymm ymm
// VPSRLVD.BCST m32 zmm k zmm
// VPSRLVD.BCST m32 zmm zmm
func VPSRLVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRLVD_BCST_Z: Variable Shift Packed Doubleword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVD.BCST.Z m32 xmm k xmm
// VPSRLVD.BCST.Z m32 ymm k ymm
// VPSRLVD.BCST.Z m32 zmm k zmm
func VPSRLVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSRLVD_Z: Variable Shift Packed Doubleword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVD.Z m128 xmm k xmm
// VPSRLVD.Z m256 ymm k ymm
// VPSRLVD.Z xmm xmm k xmm
// VPSRLVD.Z ymm ymm k ymm
// VPSRLVD.Z m512 zmm k zmm
// VPSRLVD.Z zmm zmm k zmm
func VPSRLVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRLVQ: Variable Shift Packed Quadword Data Right Logical.
//
// Forms:
//
// VPSRLVQ m128 xmm xmm
// VPSRLVQ m256 ymm ymm
// VPSRLVQ xmm xmm xmm
// VPSRLVQ ymm ymm ymm
// VPSRLVQ m128 xmm k xmm
// VPSRLVQ m256 ymm k ymm
// VPSRLVQ xmm xmm k xmm
// VPSRLVQ ymm ymm k ymm
// VPSRLVQ m512 zmm k zmm
// VPSRLVQ m512 zmm zmm
// VPSRLVQ zmm zmm k zmm
// VPSRLVQ zmm zmm zmm
func VPSRLVQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVQ.Forms(), sffxs{}, ops)
}
// VPSRLVQ_BCST: Variable Shift Packed Quadword Data Right Logical (Broadcast).
//
// Forms:
//
// VPSRLVQ.BCST m64 xmm k xmm
// VPSRLVQ.BCST m64 xmm xmm
// VPSRLVQ.BCST m64 ymm k ymm
// VPSRLVQ.BCST m64 ymm ymm
// VPSRLVQ.BCST m64 zmm k zmm
// VPSRLVQ.BCST m64 zmm zmm
func VPSRLVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSRLVQ_BCST_Z: Variable Shift Packed Quadword Data Right Logical (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.BCST.Z m64 xmm k xmm
// VPSRLVQ.BCST.Z m64 ymm k ymm
// VPSRLVQ.BCST.Z m64 zmm k zmm
func VPSRLVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSRLVQ_Z: Variable Shift Packed Quadword Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVQ.Z m128 xmm k xmm
// VPSRLVQ.Z m256 ymm k ymm
// VPSRLVQ.Z xmm xmm k xmm
// VPSRLVQ.Z ymm ymm k ymm
// VPSRLVQ.Z m512 zmm k zmm
// VPSRLVQ.Z zmm zmm k zmm
func VPSRLVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRLVW: Variable Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLVW m128 xmm k xmm
// VPSRLVW m128 xmm xmm
// VPSRLVW m256 ymm k ymm
// VPSRLVW m256 ymm ymm
// VPSRLVW xmm xmm k xmm
// VPSRLVW xmm xmm xmm
// VPSRLVW ymm ymm k ymm
// VPSRLVW ymm ymm ymm
// VPSRLVW m512 zmm k zmm
// VPSRLVW m512 zmm zmm
// VPSRLVW zmm zmm k zmm
// VPSRLVW zmm zmm zmm
func VPSRLVW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVW.Forms(), sffxs{}, ops)
}
// VPSRLVW_Z: Variable Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLVW.Z m128 xmm k xmm
// VPSRLVW.Z m256 ymm k ymm
// VPSRLVW.Z xmm xmm k xmm
// VPSRLVW.Z ymm ymm k ymm
// VPSRLVW.Z m512 zmm k zmm
// VPSRLVW.Z zmm zmm k zmm
func VPSRLVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSRLW: Shift Packed Word Data Right Logical.
//
// Forms:
//
// VPSRLW imm8 ymm ymm
// VPSRLW m128 ymm ymm
// VPSRLW xmm ymm ymm
// VPSRLW imm8 xmm xmm
// VPSRLW m128 xmm xmm
// VPSRLW xmm xmm xmm
// VPSRLW imm8 m128 k xmm
// VPSRLW imm8 m128 xmm
// VPSRLW imm8 m256 k ymm
// VPSRLW imm8 m256 ymm
// VPSRLW imm8 xmm k xmm
// VPSRLW imm8 ymm k ymm
// VPSRLW m128 xmm k xmm
// VPSRLW m128 ymm k ymm
// VPSRLW xmm xmm k xmm
// VPSRLW xmm ymm k ymm
// VPSRLW imm8 m512 k zmm
// VPSRLW imm8 m512 zmm
// VPSRLW imm8 zmm k zmm
// VPSRLW imm8 zmm zmm
// VPSRLW m128 zmm k zmm
// VPSRLW m128 zmm zmm
// VPSRLW xmm zmm k zmm
// VPSRLW xmm zmm zmm
func VPSRLW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLW.Forms(), sffxs{}, ops)
}
// VPSRLW_Z: Shift Packed Word Data Right Logical (Zeroing Masking).
//
// Forms:
//
// VPSRLW.Z imm8 m128 k xmm
// VPSRLW.Z imm8 m256 k ymm
// VPSRLW.Z imm8 xmm k xmm
// VPSRLW.Z imm8 ymm k ymm
// VPSRLW.Z m128 xmm k xmm
// VPSRLW.Z m128 ymm k ymm
// VPSRLW.Z xmm xmm k xmm
// VPSRLW.Z xmm ymm k ymm
// VPSRLW.Z imm8 m512 k zmm
// VPSRLW.Z imm8 zmm k zmm
// VPSRLW.Z m128 zmm k zmm
// VPSRLW.Z xmm zmm k zmm
func VPSRLW_Z(imx, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVPSRLW.Forms(), sffxs{sffxZ}, []operand.Op{imx, mxyz, k, xyz})
}
// VPSUBB: Subtract Packed Byte Integers.
//
// Forms:
//
// VPSUBB m256 ymm ymm
// VPSUBB ymm ymm ymm
// VPSUBB m128 xmm xmm
// VPSUBB xmm xmm xmm
// VPSUBB m128 xmm k xmm
// VPSUBB m256 ymm k ymm
// VPSUBB xmm xmm k xmm
// VPSUBB ymm ymm k ymm
// VPSUBB m512 zmm k zmm
// VPSUBB m512 zmm zmm
// VPSUBB zmm zmm k zmm
// VPSUBB zmm zmm zmm
func VPSUBB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBB.Forms(), sffxs{}, ops)
}
// VPSUBB_Z: Subtract Packed Byte Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBB.Z m128 xmm k xmm
// VPSUBB.Z m256 ymm k ymm
// VPSUBB.Z xmm xmm k xmm
// VPSUBB.Z ymm ymm k ymm
// VPSUBB.Z m512 zmm k zmm
// VPSUBB.Z zmm zmm k zmm
func VPSUBB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBD: Subtract Packed Doubleword Integers.
//
// Forms:
//
// VPSUBD m256 ymm ymm
// VPSUBD ymm ymm ymm
// VPSUBD m128 xmm xmm
// VPSUBD xmm xmm xmm
// VPSUBD m128 xmm k xmm
// VPSUBD m256 ymm k ymm
// VPSUBD xmm xmm k xmm
// VPSUBD ymm ymm k ymm
// VPSUBD m512 zmm k zmm
// VPSUBD m512 zmm zmm
// VPSUBD zmm zmm k zmm
// VPSUBD zmm zmm zmm
func VPSUBD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBD.Forms(), sffxs{}, ops)
}
// VPSUBD_BCST: Subtract Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPSUBD.BCST m32 xmm k xmm
// VPSUBD.BCST m32 xmm xmm
// VPSUBD.BCST m32 ymm k ymm
// VPSUBD.BCST m32 ymm ymm
// VPSUBD.BCST m32 zmm k zmm
// VPSUBD.BCST m32 zmm zmm
func VPSUBD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBD.Forms(), sffxs{sffxBCST}, ops)
}
// VPSUBD_BCST_Z: Subtract Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBD.BCST.Z m32 xmm k xmm
// VPSUBD.BCST.Z m32 ymm k ymm
// VPSUBD.BCST.Z m32 zmm k zmm
func VPSUBD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSUBD_Z: Subtract Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBD.Z m128 xmm k xmm
// VPSUBD.Z m256 ymm k ymm
// VPSUBD.Z xmm xmm k xmm
// VPSUBD.Z ymm ymm k ymm
// VPSUBD.Z m512 zmm k zmm
// VPSUBD.Z zmm zmm k zmm
func VPSUBD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBQ: Subtract Packed Quadword Integers.
//
// Forms:
//
// VPSUBQ m256 ymm ymm
// VPSUBQ ymm ymm ymm
// VPSUBQ m128 xmm xmm
// VPSUBQ xmm xmm xmm
// VPSUBQ m128 xmm k xmm
// VPSUBQ m256 ymm k ymm
// VPSUBQ xmm xmm k xmm
// VPSUBQ ymm ymm k ymm
// VPSUBQ m512 zmm k zmm
// VPSUBQ m512 zmm zmm
// VPSUBQ zmm zmm k zmm
// VPSUBQ zmm zmm zmm
func VPSUBQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBQ.Forms(), sffxs{}, ops)
}
// VPSUBQ_BCST: Subtract Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPSUBQ.BCST m64 xmm k xmm
// VPSUBQ.BCST m64 xmm xmm
// VPSUBQ.BCST m64 ymm k ymm
// VPSUBQ.BCST m64 ymm ymm
// VPSUBQ.BCST m64 zmm k zmm
// VPSUBQ.BCST m64 zmm zmm
func VPSUBQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPSUBQ_BCST_Z: Subtract Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPSUBQ.BCST.Z m64 xmm k xmm
// VPSUBQ.BCST.Z m64 ymm k ymm
// VPSUBQ.BCST.Z m64 zmm k zmm
func VPSUBQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPSUBQ_Z: Subtract Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBQ.Z m128 xmm k xmm
// VPSUBQ.Z m256 ymm k ymm
// VPSUBQ.Z xmm xmm k xmm
// VPSUBQ.Z ymm ymm k ymm
// VPSUBQ.Z m512 zmm k zmm
// VPSUBQ.Z zmm zmm k zmm
func VPSUBQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBSB: Subtract Packed Signed Byte Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSB m256 ymm ymm
// VPSUBSB ymm ymm ymm
// VPSUBSB m128 xmm xmm
// VPSUBSB xmm xmm xmm
// VPSUBSB m128 xmm k xmm
// VPSUBSB m256 ymm k ymm
// VPSUBSB xmm xmm k xmm
// VPSUBSB ymm ymm k ymm
// VPSUBSB m512 zmm k zmm
// VPSUBSB m512 zmm zmm
// VPSUBSB zmm zmm k zmm
// VPSUBSB zmm zmm zmm
func VPSUBSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBSB.Forms(), sffxs{}, ops)
}
// VPSUBSB_Z: Subtract Packed Signed Byte Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSB.Z m128 xmm k xmm
// VPSUBSB.Z m256 ymm k ymm
// VPSUBSB.Z xmm xmm k xmm
// VPSUBSB.Z ymm ymm k ymm
// VPSUBSB.Z m512 zmm k zmm
// VPSUBSB.Z zmm zmm k zmm
func VPSUBSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBSW: Subtract Packed Signed Word Integers with Signed Saturation.
//
// Forms:
//
// VPSUBSW m256 ymm ymm
// VPSUBSW ymm ymm ymm
// VPSUBSW m128 xmm xmm
// VPSUBSW xmm xmm xmm
// VPSUBSW m128 xmm k xmm
// VPSUBSW m256 ymm k ymm
// VPSUBSW xmm xmm k xmm
// VPSUBSW ymm ymm k ymm
// VPSUBSW m512 zmm k zmm
// VPSUBSW m512 zmm zmm
// VPSUBSW zmm zmm k zmm
// VPSUBSW zmm zmm zmm
func VPSUBSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBSW.Forms(), sffxs{}, ops)
}
// VPSUBSW_Z: Subtract Packed Signed Word Integers with Signed Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBSW.Z m128 xmm k xmm
// VPSUBSW.Z m256 ymm k ymm
// VPSUBSW.Z xmm xmm k xmm
// VPSUBSW.Z ymm ymm k ymm
// VPSUBSW.Z m512 zmm k zmm
// VPSUBSW.Z zmm zmm k zmm
func VPSUBSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBUSB: Subtract Packed Unsigned Byte Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSB m256 ymm ymm
// VPSUBUSB ymm ymm ymm
// VPSUBUSB m128 xmm xmm
// VPSUBUSB xmm xmm xmm
// VPSUBUSB m128 xmm k xmm
// VPSUBUSB m256 ymm k ymm
// VPSUBUSB xmm xmm k xmm
// VPSUBUSB ymm ymm k ymm
// VPSUBUSB m512 zmm k zmm
// VPSUBUSB m512 zmm zmm
// VPSUBUSB zmm zmm k zmm
// VPSUBUSB zmm zmm zmm
func VPSUBUSB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBUSB.Forms(), sffxs{}, ops)
}
// VPSUBUSB_Z: Subtract Packed Unsigned Byte Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSB.Z m128 xmm k xmm
// VPSUBUSB.Z m256 ymm k ymm
// VPSUBUSB.Z xmm xmm k xmm
// VPSUBUSB.Z ymm ymm k ymm
// VPSUBUSB.Z m512 zmm k zmm
// VPSUBUSB.Z zmm zmm k zmm
func VPSUBUSB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBUSB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBUSW: Subtract Packed Unsigned Word Integers with Unsigned Saturation.
//
// Forms:
//
// VPSUBUSW m256 ymm ymm
// VPSUBUSW ymm ymm ymm
// VPSUBUSW m128 xmm xmm
// VPSUBUSW xmm xmm xmm
// VPSUBUSW m128 xmm k xmm
// VPSUBUSW m256 ymm k ymm
// VPSUBUSW xmm xmm k xmm
// VPSUBUSW ymm ymm k ymm
// VPSUBUSW m512 zmm k zmm
// VPSUBUSW m512 zmm zmm
// VPSUBUSW zmm zmm k zmm
// VPSUBUSW zmm zmm zmm
func VPSUBUSW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBUSW.Forms(), sffxs{}, ops)
}
// VPSUBUSW_Z: Subtract Packed Unsigned Word Integers with Unsigned Saturation (Zeroing Masking).
//
// Forms:
//
// VPSUBUSW.Z m128 xmm k xmm
// VPSUBUSW.Z m256 ymm k ymm
// VPSUBUSW.Z xmm xmm k xmm
// VPSUBUSW.Z ymm ymm k ymm
// VPSUBUSW.Z m512 zmm k zmm
// VPSUBUSW.Z zmm zmm k zmm
func VPSUBUSW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBUSW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPSUBW: Subtract Packed Word Integers.
//
// Forms:
//
// VPSUBW m256 ymm ymm
// VPSUBW ymm ymm ymm
// VPSUBW m128 xmm xmm
// VPSUBW xmm xmm xmm
// VPSUBW m128 xmm k xmm
// VPSUBW m256 ymm k ymm
// VPSUBW xmm xmm k xmm
// VPSUBW ymm ymm k ymm
// VPSUBW m512 zmm k zmm
// VPSUBW m512 zmm zmm
// VPSUBW zmm zmm k zmm
// VPSUBW zmm zmm zmm
func VPSUBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBW.Forms(), sffxs{}, ops)
}
// VPSUBW_Z: Subtract Packed Word Integers (Zeroing Masking).
//
// Forms:
//
// VPSUBW.Z m128 xmm k xmm
// VPSUBW.Z m256 ymm k ymm
// VPSUBW.Z xmm xmm k xmm
// VPSUBW.Z ymm ymm k ymm
// VPSUBW.Z m512 zmm k zmm
// VPSUBW.Z zmm zmm k zmm
func VPSUBW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPSUBW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPTERNLOGD: Bitwise Ternary Logical Operation on Doubleword Values.
//
// Forms:
//
// VPTERNLOGD imm8 m128 xmm k xmm
// VPTERNLOGD imm8 m128 xmm xmm
// VPTERNLOGD imm8 m256 ymm k ymm
// VPTERNLOGD imm8 m256 ymm ymm
// VPTERNLOGD imm8 xmm xmm k xmm
// VPTERNLOGD imm8 xmm xmm xmm
// VPTERNLOGD imm8 ymm ymm k ymm
// VPTERNLOGD imm8 ymm ymm ymm
// VPTERNLOGD imm8 m512 zmm k zmm
// VPTERNLOGD imm8 m512 zmm zmm
// VPTERNLOGD imm8 zmm zmm k zmm
// VPTERNLOGD imm8 zmm zmm zmm
func VPTERNLOGD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGD.Forms(), sffxs{}, ops)
}
// VPTERNLOGD_BCST: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGD.BCST imm8 m32 xmm k xmm
// VPTERNLOGD.BCST imm8 m32 xmm xmm
// VPTERNLOGD.BCST imm8 m32 ymm k ymm
// VPTERNLOGD.BCST imm8 m32 ymm ymm
// VPTERNLOGD.BCST imm8 m32 zmm k zmm
// VPTERNLOGD.BCST imm8 m32 zmm zmm
func VPTERNLOGD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGD.Forms(), sffxs{sffxBCST}, ops)
}
// VPTERNLOGD_BCST_Z: Bitwise Ternary Logical Operation on Doubleword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.BCST.Z imm8 m32 xmm k xmm
// VPTERNLOGD.BCST.Z imm8 m32 ymm k ymm
// VPTERNLOGD.BCST.Z imm8 m32 zmm k zmm
func VPTERNLOGD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VPTERNLOGD_Z: Bitwise Ternary Logical Operation on Doubleword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGD.Z imm8 m128 xmm k xmm
// VPTERNLOGD.Z imm8 m256 ymm k ymm
// VPTERNLOGD.Z imm8 xmm xmm k xmm
// VPTERNLOGD.Z imm8 ymm ymm k ymm
// VPTERNLOGD.Z imm8 m512 zmm k zmm
// VPTERNLOGD.Z imm8 zmm zmm k zmm
func VPTERNLOGD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VPTERNLOGQ: Bitwise Ternary Logical Operation on Quadword Values.
//
// Forms:
//
// VPTERNLOGQ imm8 m128 xmm k xmm
// VPTERNLOGQ imm8 m128 xmm xmm
// VPTERNLOGQ imm8 m256 ymm k ymm
// VPTERNLOGQ imm8 m256 ymm ymm
// VPTERNLOGQ imm8 xmm xmm k xmm
// VPTERNLOGQ imm8 xmm xmm xmm
// VPTERNLOGQ imm8 ymm ymm k ymm
// VPTERNLOGQ imm8 ymm ymm ymm
// VPTERNLOGQ imm8 m512 zmm k zmm
// VPTERNLOGQ imm8 m512 zmm zmm
// VPTERNLOGQ imm8 zmm zmm k zmm
// VPTERNLOGQ imm8 zmm zmm zmm
func VPTERNLOGQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGQ.Forms(), sffxs{}, ops)
}
// VPTERNLOGQ_BCST: Bitwise Ternary Logical Operation on Quadword Values (Broadcast).
//
// Forms:
//
// VPTERNLOGQ.BCST imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST imm8 m64 xmm xmm
// VPTERNLOGQ.BCST imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST imm8 m64 ymm ymm
// VPTERNLOGQ.BCST imm8 m64 zmm k zmm
// VPTERNLOGQ.BCST imm8 m64 zmm zmm
func VPTERNLOGQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPTERNLOGQ_BCST_Z: Bitwise Ternary Logical Operation on Quadword Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.BCST.Z imm8 m64 xmm k xmm
// VPTERNLOGQ.BCST.Z imm8 m64 ymm k ymm
// VPTERNLOGQ.BCST.Z imm8 m64 zmm k zmm
func VPTERNLOGQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VPTERNLOGQ_Z: Bitwise Ternary Logical Operation on Quadword Values (Zeroing Masking).
//
// Forms:
//
// VPTERNLOGQ.Z imm8 m128 xmm k xmm
// VPTERNLOGQ.Z imm8 m256 ymm k ymm
// VPTERNLOGQ.Z imm8 xmm xmm k xmm
// VPTERNLOGQ.Z imm8 ymm ymm k ymm
// VPTERNLOGQ.Z imm8 m512 zmm k zmm
// VPTERNLOGQ.Z imm8 zmm zmm k zmm
func VPTERNLOGQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPTERNLOGQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VPTEST: Packed Logical Compare.
//
// Forms:
//
// VPTEST m128 xmm
// VPTEST m256 ymm
// VPTEST xmm xmm
// VPTEST ymm ymm
func VPTEST(mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVPTEST.Forms(), sffxs{}, []operand.Op{mxy, xy})
}
// VPTESTMB: Logical AND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMB m128 xmm k k
// VPTESTMB m128 xmm k
// VPTESTMB m256 ymm k k
// VPTESTMB m256 ymm k
// VPTESTMB xmm xmm k k
// VPTESTMB xmm xmm k
// VPTESTMB ymm ymm k k
// VPTESTMB ymm ymm k
// VPTESTMB m512 zmm k k
// VPTESTMB m512 zmm k
// VPTESTMB zmm zmm k k
// VPTESTMB zmm zmm k
func VPTESTMB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMB.Forms(), sffxs{}, ops)
}
// VPTESTMD: Logical AND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMD m128 xmm k k
// VPTESTMD m128 xmm k
// VPTESTMD m256 ymm k k
// VPTESTMD m256 ymm k
// VPTESTMD xmm xmm k k
// VPTESTMD xmm xmm k
// VPTESTMD ymm ymm k k
// VPTESTMD ymm ymm k
// VPTESTMD m512 zmm k k
// VPTESTMD m512 zmm k
// VPTESTMD zmm zmm k k
// VPTESTMD zmm zmm k
func VPTESTMD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMD.Forms(), sffxs{}, ops)
}
// VPTESTMD_BCST: Logical AND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMD.BCST m32 xmm k k
// VPTESTMD.BCST m32 xmm k
// VPTESTMD.BCST m32 ymm k k
// VPTESTMD.BCST m32 ymm k
// VPTESTMD.BCST m32 zmm k k
// VPTESTMD.BCST m32 zmm k
func VPTESTMD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMD.Forms(), sffxs{sffxBCST}, ops)
}
// VPTESTMQ: Logical AND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMQ m128 xmm k k
// VPTESTMQ m128 xmm k
// VPTESTMQ m256 ymm k k
// VPTESTMQ m256 ymm k
// VPTESTMQ xmm xmm k k
// VPTESTMQ xmm xmm k
// VPTESTMQ ymm ymm k k
// VPTESTMQ ymm ymm k
// VPTESTMQ m512 zmm k k
// VPTESTMQ m512 zmm k
// VPTESTMQ zmm zmm k k
// VPTESTMQ zmm zmm k
func VPTESTMQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMQ.Forms(), sffxs{}, ops)
}
// VPTESTMQ_BCST: Logical AND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTMQ.BCST m64 xmm k k
// VPTESTMQ.BCST m64 xmm k
// VPTESTMQ.BCST m64 ymm k k
// VPTESTMQ.BCST m64 ymm k
// VPTESTMQ.BCST m64 zmm k k
// VPTESTMQ.BCST m64 zmm k
func VPTESTMQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPTESTMW: Logical AND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTMW m128 xmm k k
// VPTESTMW m128 xmm k
// VPTESTMW m256 ymm k k
// VPTESTMW m256 ymm k
// VPTESTMW xmm xmm k k
// VPTESTMW xmm xmm k
// VPTESTMW ymm ymm k k
// VPTESTMW ymm ymm k
// VPTESTMW m512 zmm k k
// VPTESTMW m512 zmm k
// VPTESTMW zmm zmm k k
// VPTESTMW zmm zmm k
func VPTESTMW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTMW.Forms(), sffxs{}, ops)
}
// VPTESTNMB: Logical NAND of Packed Byte Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMB m512 zmm k k
// VPTESTNMB m512 zmm k
// VPTESTNMB zmm zmm k k
// VPTESTNMB zmm zmm k
// VPTESTNMB m128 xmm k k
// VPTESTNMB m128 xmm k
// VPTESTNMB m256 ymm k k
// VPTESTNMB m256 ymm k
// VPTESTNMB xmm xmm k k
// VPTESTNMB xmm xmm k
// VPTESTNMB ymm ymm k k
// VPTESTNMB ymm ymm k
func VPTESTNMB(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMB.Forms(), sffxs{}, ops)
}
// VPTESTNMD: Logical NAND of Packed Doubleword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMD m128 xmm k k
// VPTESTNMD m128 xmm k
// VPTESTNMD m256 ymm k k
// VPTESTNMD m256 ymm k
// VPTESTNMD xmm xmm k k
// VPTESTNMD xmm xmm k
// VPTESTNMD ymm ymm k k
// VPTESTNMD ymm ymm k
// VPTESTNMD m512 zmm k k
// VPTESTNMD m512 zmm k
// VPTESTNMD zmm zmm k k
// VPTESTNMD zmm zmm k
func VPTESTNMD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMD.Forms(), sffxs{}, ops)
}
// VPTESTNMD_BCST: Logical NAND of Packed Doubleword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMD.BCST m32 xmm k k
// VPTESTNMD.BCST m32 xmm k
// VPTESTNMD.BCST m32 ymm k k
// VPTESTNMD.BCST m32 ymm k
// VPTESTNMD.BCST m32 zmm k k
// VPTESTNMD.BCST m32 zmm k
func VPTESTNMD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMD.Forms(), sffxs{sffxBCST}, ops)
}
// VPTESTNMQ: Logical NAND of Packed Quadword Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMQ m128 xmm k k
// VPTESTNMQ m128 xmm k
// VPTESTNMQ m256 ymm k k
// VPTESTNMQ m256 ymm k
// VPTESTNMQ xmm xmm k k
// VPTESTNMQ xmm xmm k
// VPTESTNMQ ymm ymm k k
// VPTESTNMQ ymm ymm k
// VPTESTNMQ m512 zmm k k
// VPTESTNMQ m512 zmm k
// VPTESTNMQ zmm zmm k k
// VPTESTNMQ zmm zmm k
func VPTESTNMQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMQ.Forms(), sffxs{}, ops)
}
// VPTESTNMQ_BCST: Logical NAND of Packed Quadword Integer Values and Set Mask (Broadcast).
//
// Forms:
//
// VPTESTNMQ.BCST m64 xmm k k
// VPTESTNMQ.BCST m64 xmm k
// VPTESTNMQ.BCST m64 ymm k k
// VPTESTNMQ.BCST m64 ymm k
// VPTESTNMQ.BCST m64 zmm k k
// VPTESTNMQ.BCST m64 zmm k
func VPTESTNMQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPTESTNMW: Logical NAND of Packed Word Integer Values and Set Mask.
//
// Forms:
//
// VPTESTNMW m512 zmm k k
// VPTESTNMW m512 zmm k
// VPTESTNMW zmm zmm k k
// VPTESTNMW zmm zmm k
// VPTESTNMW m128 xmm k k
// VPTESTNMW m128 xmm k
// VPTESTNMW m256 ymm k k
// VPTESTNMW m256 ymm k
// VPTESTNMW xmm xmm k k
// VPTESTNMW xmm xmm k
// VPTESTNMW ymm ymm k k
// VPTESTNMW ymm ymm k
func VPTESTNMW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPTESTNMW.Forms(), sffxs{}, ops)
}
// VPUNPCKHBW: Unpack and Interleave High-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKHBW m256 ymm ymm
// VPUNPCKHBW ymm ymm ymm
// VPUNPCKHBW m128 xmm xmm
// VPUNPCKHBW xmm xmm xmm
// VPUNPCKHBW m128 xmm k xmm
// VPUNPCKHBW m256 ymm k ymm
// VPUNPCKHBW xmm xmm k xmm
// VPUNPCKHBW ymm ymm k ymm
// VPUNPCKHBW m512 zmm k zmm
// VPUNPCKHBW m512 zmm zmm
// VPUNPCKHBW zmm zmm k zmm
// VPUNPCKHBW zmm zmm zmm
func VPUNPCKHBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHBW.Forms(), sffxs{}, ops)
}
// VPUNPCKHBW_Z: Unpack and Interleave High-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHBW.Z m128 xmm k xmm
// VPUNPCKHBW.Z m256 ymm k ymm
// VPUNPCKHBW.Z xmm xmm k xmm
// VPUNPCKHBW.Z ymm ymm k ymm
// VPUNPCKHBW.Z m512 zmm k zmm
// VPUNPCKHBW.Z zmm zmm k zmm
func VPUNPCKHBW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHBW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKHDQ: Unpack and Interleave High-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKHDQ m256 ymm ymm
// VPUNPCKHDQ ymm ymm ymm
// VPUNPCKHDQ m128 xmm xmm
// VPUNPCKHDQ xmm xmm xmm
// VPUNPCKHDQ m128 xmm k xmm
// VPUNPCKHDQ m256 ymm k ymm
// VPUNPCKHDQ xmm xmm k xmm
// VPUNPCKHDQ ymm ymm k ymm
// VPUNPCKHDQ m512 zmm k zmm
// VPUNPCKHDQ m512 zmm zmm
// VPUNPCKHDQ zmm zmm k zmm
// VPUNPCKHDQ zmm zmm zmm
func VPUNPCKHDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHDQ.Forms(), sffxs{}, ops)
}
// VPUNPCKHDQ_BCST: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHDQ.BCST m32 xmm k xmm
// VPUNPCKHDQ.BCST m32 xmm xmm
// VPUNPCKHDQ.BCST m32 ymm k ymm
// VPUNPCKHDQ.BCST m32 ymm ymm
// VPUNPCKHDQ.BCST m32 zmm k zmm
// VPUNPCKHDQ.BCST m32 zmm zmm
func VPUNPCKHDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPUNPCKHDQ_BCST_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.BCST.Z m32 xmm k xmm
// VPUNPCKHDQ.BCST.Z m32 ymm k ymm
// VPUNPCKHDQ.BCST.Z m32 zmm k zmm
func VPUNPCKHDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPUNPCKHDQ_Z: Unpack and Interleave High-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHDQ.Z m128 xmm k xmm
// VPUNPCKHDQ.Z m256 ymm k ymm
// VPUNPCKHDQ.Z xmm xmm k xmm
// VPUNPCKHDQ.Z ymm ymm k ymm
// VPUNPCKHDQ.Z m512 zmm k zmm
// VPUNPCKHDQ.Z zmm zmm k zmm
func VPUNPCKHDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKHQDQ: Unpack and Interleave High-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKHQDQ m256 ymm ymm
// VPUNPCKHQDQ ymm ymm ymm
// VPUNPCKHQDQ m128 xmm xmm
// VPUNPCKHQDQ xmm xmm xmm
// VPUNPCKHQDQ m128 xmm k xmm
// VPUNPCKHQDQ m256 ymm k ymm
// VPUNPCKHQDQ xmm xmm k xmm
// VPUNPCKHQDQ ymm ymm k ymm
// VPUNPCKHQDQ m512 zmm k zmm
// VPUNPCKHQDQ m512 zmm zmm
// VPUNPCKHQDQ zmm zmm k zmm
// VPUNPCKHQDQ zmm zmm zmm
func VPUNPCKHQDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHQDQ.Forms(), sffxs{}, ops)
}
// VPUNPCKHQDQ_BCST: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKHQDQ.BCST m64 xmm k xmm
// VPUNPCKHQDQ.BCST m64 xmm xmm
// VPUNPCKHQDQ.BCST m64 ymm k ymm
// VPUNPCKHQDQ.BCST m64 ymm ymm
// VPUNPCKHQDQ.BCST m64 zmm k zmm
// VPUNPCKHQDQ.BCST m64 zmm zmm
func VPUNPCKHQDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHQDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPUNPCKHQDQ_BCST_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKHQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKHQDQ.BCST.Z m64 zmm k zmm
func VPUNPCKHQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHQDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPUNPCKHQDQ_Z: Unpack and Interleave High-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHQDQ.Z m128 xmm k xmm
// VPUNPCKHQDQ.Z m256 ymm k ymm
// VPUNPCKHQDQ.Z xmm xmm k xmm
// VPUNPCKHQDQ.Z ymm ymm k ymm
// VPUNPCKHQDQ.Z m512 zmm k zmm
// VPUNPCKHQDQ.Z zmm zmm k zmm
func VPUNPCKHQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHQDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKHWD: Unpack and Interleave High-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKHWD m256 ymm ymm
// VPUNPCKHWD ymm ymm ymm
// VPUNPCKHWD m128 xmm xmm
// VPUNPCKHWD xmm xmm xmm
// VPUNPCKHWD m128 xmm k xmm
// VPUNPCKHWD m256 ymm k ymm
// VPUNPCKHWD xmm xmm k xmm
// VPUNPCKHWD ymm ymm k ymm
// VPUNPCKHWD m512 zmm k zmm
// VPUNPCKHWD m512 zmm zmm
// VPUNPCKHWD zmm zmm k zmm
// VPUNPCKHWD zmm zmm zmm
func VPUNPCKHWD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHWD.Forms(), sffxs{}, ops)
}
// VPUNPCKHWD_Z: Unpack and Interleave High-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKHWD.Z m128 xmm k xmm
// VPUNPCKHWD.Z m256 ymm k ymm
// VPUNPCKHWD.Z xmm xmm k xmm
// VPUNPCKHWD.Z ymm ymm k ymm
// VPUNPCKHWD.Z m512 zmm k zmm
// VPUNPCKHWD.Z zmm zmm k zmm
func VPUNPCKHWD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKHWD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKLBW: Unpack and Interleave Low-Order Bytes into Words.
//
// Forms:
//
// VPUNPCKLBW m256 ymm ymm
// VPUNPCKLBW ymm ymm ymm
// VPUNPCKLBW m128 xmm xmm
// VPUNPCKLBW xmm xmm xmm
// VPUNPCKLBW m128 xmm k xmm
// VPUNPCKLBW m256 ymm k ymm
// VPUNPCKLBW xmm xmm k xmm
// VPUNPCKLBW ymm ymm k ymm
// VPUNPCKLBW m512 zmm k zmm
// VPUNPCKLBW m512 zmm zmm
// VPUNPCKLBW zmm zmm k zmm
// VPUNPCKLBW zmm zmm zmm
func VPUNPCKLBW(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLBW.Forms(), sffxs{}, ops)
}
// VPUNPCKLBW_Z: Unpack and Interleave Low-Order Bytes into Words (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLBW.Z m128 xmm k xmm
// VPUNPCKLBW.Z m256 ymm k ymm
// VPUNPCKLBW.Z xmm xmm k xmm
// VPUNPCKLBW.Z ymm ymm k ymm
// VPUNPCKLBW.Z m512 zmm k zmm
// VPUNPCKLBW.Z zmm zmm k zmm
func VPUNPCKLBW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLBW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKLDQ: Unpack and Interleave Low-Order Doublewords into Quadwords.
//
// Forms:
//
// VPUNPCKLDQ m256 ymm ymm
// VPUNPCKLDQ ymm ymm ymm
// VPUNPCKLDQ m128 xmm xmm
// VPUNPCKLDQ xmm xmm xmm
// VPUNPCKLDQ m128 xmm k xmm
// VPUNPCKLDQ m256 ymm k ymm
// VPUNPCKLDQ xmm xmm k xmm
// VPUNPCKLDQ ymm ymm k ymm
// VPUNPCKLDQ m512 zmm k zmm
// VPUNPCKLDQ m512 zmm zmm
// VPUNPCKLDQ zmm zmm k zmm
// VPUNPCKLDQ zmm zmm zmm
func VPUNPCKLDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLDQ.Forms(), sffxs{}, ops)
}
// VPUNPCKLDQ_BCST: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLDQ.BCST m32 xmm k xmm
// VPUNPCKLDQ.BCST m32 xmm xmm
// VPUNPCKLDQ.BCST m32 ymm k ymm
// VPUNPCKLDQ.BCST m32 ymm ymm
// VPUNPCKLDQ.BCST m32 zmm k zmm
// VPUNPCKLDQ.BCST m32 zmm zmm
func VPUNPCKLDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPUNPCKLDQ_BCST_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.BCST.Z m32 xmm k xmm
// VPUNPCKLDQ.BCST.Z m32 ymm k ymm
// VPUNPCKLDQ.BCST.Z m32 zmm k zmm
func VPUNPCKLDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPUNPCKLDQ_Z: Unpack and Interleave Low-Order Doublewords into Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLDQ.Z m128 xmm k xmm
// VPUNPCKLDQ.Z m256 ymm k ymm
// VPUNPCKLDQ.Z xmm xmm k xmm
// VPUNPCKLDQ.Z ymm ymm k ymm
// VPUNPCKLDQ.Z m512 zmm k zmm
// VPUNPCKLDQ.Z zmm zmm k zmm
func VPUNPCKLDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKLQDQ: Unpack and Interleave Low-Order Quadwords into Double Quadwords.
//
// Forms:
//
// VPUNPCKLQDQ m256 ymm ymm
// VPUNPCKLQDQ ymm ymm ymm
// VPUNPCKLQDQ m128 xmm xmm
// VPUNPCKLQDQ xmm xmm xmm
// VPUNPCKLQDQ m128 xmm k xmm
// VPUNPCKLQDQ m256 ymm k ymm
// VPUNPCKLQDQ xmm xmm k xmm
// VPUNPCKLQDQ ymm ymm k ymm
// VPUNPCKLQDQ m512 zmm k zmm
// VPUNPCKLQDQ m512 zmm zmm
// VPUNPCKLQDQ zmm zmm k zmm
// VPUNPCKLQDQ zmm zmm zmm
func VPUNPCKLQDQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLQDQ.Forms(), sffxs{}, ops)
}
// VPUNPCKLQDQ_BCST: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast).
//
// Forms:
//
// VPUNPCKLQDQ.BCST m64 xmm k xmm
// VPUNPCKLQDQ.BCST m64 xmm xmm
// VPUNPCKLQDQ.BCST m64 ymm k ymm
// VPUNPCKLQDQ.BCST m64 ymm ymm
// VPUNPCKLQDQ.BCST m64 zmm k zmm
// VPUNPCKLQDQ.BCST m64 zmm zmm
func VPUNPCKLQDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLQDQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPUNPCKLQDQ_BCST_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.BCST.Z m64 xmm k xmm
// VPUNPCKLQDQ.BCST.Z m64 ymm k ymm
// VPUNPCKLQDQ.BCST.Z m64 zmm k zmm
func VPUNPCKLQDQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLQDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPUNPCKLQDQ_Z: Unpack and Interleave Low-Order Quadwords into Double Quadwords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLQDQ.Z m128 xmm k xmm
// VPUNPCKLQDQ.Z m256 ymm k ymm
// VPUNPCKLQDQ.Z xmm xmm k xmm
// VPUNPCKLQDQ.Z ymm ymm k ymm
// VPUNPCKLQDQ.Z m512 zmm k zmm
// VPUNPCKLQDQ.Z zmm zmm k zmm
func VPUNPCKLQDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLQDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPUNPCKLWD: Unpack and Interleave Low-Order Words into Doublewords.
//
// Forms:
//
// VPUNPCKLWD m256 ymm ymm
// VPUNPCKLWD ymm ymm ymm
// VPUNPCKLWD m128 xmm xmm
// VPUNPCKLWD xmm xmm xmm
// VPUNPCKLWD m128 xmm k xmm
// VPUNPCKLWD m256 ymm k ymm
// VPUNPCKLWD xmm xmm k xmm
// VPUNPCKLWD ymm ymm k ymm
// VPUNPCKLWD m512 zmm k zmm
// VPUNPCKLWD m512 zmm zmm
// VPUNPCKLWD zmm zmm k zmm
// VPUNPCKLWD zmm zmm zmm
func VPUNPCKLWD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLWD.Forms(), sffxs{}, ops)
}
// VPUNPCKLWD_Z: Unpack and Interleave Low-Order Words into Doublewords (Zeroing Masking).
//
// Forms:
//
// VPUNPCKLWD.Z m128 xmm k xmm
// VPUNPCKLWD.Z m256 ymm k ymm
// VPUNPCKLWD.Z xmm xmm k xmm
// VPUNPCKLWD.Z ymm ymm k ymm
// VPUNPCKLWD.Z m512 zmm k zmm
// VPUNPCKLWD.Z zmm zmm k zmm
func VPUNPCKLWD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPUNPCKLWD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPXOR: Packed Bitwise Logical Exclusive OR.
//
// Forms:
//
// VPXOR m256 ymm ymm
// VPXOR ymm ymm ymm
// VPXOR m128 xmm xmm
// VPXOR xmm xmm xmm
func VPXOR(mxy, xy, xy1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPXOR.Forms(), sffxs{}, []operand.Op{mxy, xy, xy1})
}
// VPXORD: Bitwise Logical Exclusive OR of Packed Doubleword Integers.
//
// Forms:
//
// VPXORD m128 xmm k xmm
// VPXORD m128 xmm xmm
// VPXORD m256 ymm k ymm
// VPXORD m256 ymm ymm
// VPXORD xmm xmm k xmm
// VPXORD xmm xmm xmm
// VPXORD ymm ymm k ymm
// VPXORD ymm ymm ymm
// VPXORD m512 zmm k zmm
// VPXORD m512 zmm zmm
// VPXORD zmm zmm k zmm
// VPXORD zmm zmm zmm
func VPXORD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORD.Forms(), sffxs{}, ops)
}
// VPXORD_BCST: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast).
//
// Forms:
//
// VPXORD.BCST m32 xmm k xmm
// VPXORD.BCST m32 xmm xmm
// VPXORD.BCST m32 ymm k ymm
// VPXORD.BCST m32 ymm ymm
// VPXORD.BCST m32 zmm k zmm
// VPXORD.BCST m32 zmm zmm
func VPXORD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORD.Forms(), sffxs{sffxBCST}, ops)
}
// VPXORD_BCST_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORD.BCST.Z m32 xmm k xmm
// VPXORD.BCST.Z m32 ymm k ymm
// VPXORD.BCST.Z m32 zmm k zmm
func VPXORD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPXORD_Z: Bitwise Logical Exclusive OR of Packed Doubleword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORD.Z m128 xmm k xmm
// VPXORD.Z m256 ymm k ymm
// VPXORD.Z xmm xmm k xmm
// VPXORD.Z ymm ymm k ymm
// VPXORD.Z m512 zmm k zmm
// VPXORD.Z zmm zmm k zmm
func VPXORD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VPXORQ: Bitwise Logical Exclusive OR of Packed Quadword Integers.
//
// Forms:
//
// VPXORQ m128 xmm k xmm
// VPXORQ m128 xmm xmm
// VPXORQ m256 ymm k ymm
// VPXORQ m256 ymm ymm
// VPXORQ xmm xmm k xmm
// VPXORQ xmm xmm xmm
// VPXORQ ymm ymm k ymm
// VPXORQ ymm ymm ymm
// VPXORQ m512 zmm k zmm
// VPXORQ m512 zmm zmm
// VPXORQ zmm zmm k zmm
// VPXORQ zmm zmm zmm
func VPXORQ(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORQ.Forms(), sffxs{}, ops)
}
// VPXORQ_BCST: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast).
//
// Forms:
//
// VPXORQ.BCST m64 xmm k xmm
// VPXORQ.BCST m64 xmm xmm
// VPXORQ.BCST m64 ymm k ymm
// VPXORQ.BCST m64 ymm ymm
// VPXORQ.BCST m64 zmm k zmm
// VPXORQ.BCST m64 zmm zmm
func VPXORQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORQ.Forms(), sffxs{sffxBCST}, ops)
}
// VPXORQ_BCST_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Broadcast, Zeroing Masking).
//
// Forms:
//
// VPXORQ.BCST.Z m64 xmm k xmm
// VPXORQ.BCST.Z m64 ymm k ymm
// VPXORQ.BCST.Z m64 zmm k zmm
func VPXORQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VPXORQ_Z: Bitwise Logical Exclusive OR of Packed Quadword Integers (Zeroing Masking).
//
// Forms:
//
// VPXORQ.Z m128 xmm k xmm
// VPXORQ.Z m256 ymm k ymm
// VPXORQ.Z xmm xmm k xmm
// VPXORQ.Z ymm ymm k ymm
// VPXORQ.Z m512 zmm k zmm
// VPXORQ.Z zmm zmm k zmm
func VPXORQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVPXORQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VRANGEPD: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPD imm8 m128 xmm k xmm
// VRANGEPD imm8 m128 xmm xmm
// VRANGEPD imm8 m256 ymm k ymm
// VRANGEPD imm8 m256 ymm ymm
// VRANGEPD imm8 xmm xmm k xmm
// VRANGEPD imm8 xmm xmm xmm
// VRANGEPD imm8 ymm ymm k ymm
// VRANGEPD imm8 ymm ymm ymm
// VRANGEPD imm8 m512 zmm k zmm
// VRANGEPD imm8 m512 zmm zmm
// VRANGEPD imm8 zmm zmm k zmm
// VRANGEPD imm8 zmm zmm zmm
func VRANGEPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{}, ops)
}
// VRANGEPD_BCST: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPD.BCST imm8 m64 xmm k xmm
// VRANGEPD.BCST imm8 m64 xmm xmm
// VRANGEPD.BCST imm8 m64 ymm k ymm
// VRANGEPD.BCST imm8 m64 ymm ymm
// VRANGEPD.BCST imm8 m64 zmm k zmm
// VRANGEPD.BCST imm8 m64 zmm zmm
func VRANGEPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{sffxBCST}, ops)
}
// VRANGEPD_BCST_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.BCST.Z imm8 m64 xmm k xmm
// VRANGEPD.BCST.Z imm8 m64 ymm k ymm
// VRANGEPD.BCST.Z imm8 m64 zmm k zmm
func VRANGEPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VRANGEPD_SAE: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPD.SAE imm8 zmm zmm k zmm
// VRANGEPD.SAE imm8 zmm zmm zmm
func VRANGEPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{sffxSAE}, ops)
}
// VRANGEPD_SAE_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPD.SAE.Z imm8 zmm zmm k zmm
func VRANGEPD_SAE_Z(i, z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, z1, k, z2})
}
// VRANGEPD_Z: Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPD.Z imm8 m128 xmm k xmm
// VRANGEPD.Z imm8 m256 ymm k ymm
// VRANGEPD.Z imm8 xmm xmm k xmm
// VRANGEPD.Z imm8 ymm ymm k ymm
// VRANGEPD.Z imm8 m512 zmm k zmm
// VRANGEPD.Z imm8 zmm zmm k zmm
func VRANGEPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VRANGEPS: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGEPS imm8 m128 xmm k xmm
// VRANGEPS imm8 m128 xmm xmm
// VRANGEPS imm8 m256 ymm k ymm
// VRANGEPS imm8 m256 ymm ymm
// VRANGEPS imm8 xmm xmm k xmm
// VRANGEPS imm8 xmm xmm xmm
// VRANGEPS imm8 ymm ymm k ymm
// VRANGEPS imm8 ymm ymm ymm
// VRANGEPS imm8 m512 zmm k zmm
// VRANGEPS imm8 m512 zmm zmm
// VRANGEPS imm8 zmm zmm k zmm
// VRANGEPS imm8 zmm zmm zmm
func VRANGEPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{}, ops)
}
// VRANGEPS_BCST: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRANGEPS.BCST imm8 m32 xmm k xmm
// VRANGEPS.BCST imm8 m32 xmm xmm
// VRANGEPS.BCST imm8 m32 ymm k ymm
// VRANGEPS.BCST imm8 m32 ymm ymm
// VRANGEPS.BCST imm8 m32 zmm k zmm
// VRANGEPS.BCST imm8 m32 zmm zmm
func VRANGEPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{sffxBCST}, ops)
}
// VRANGEPS_BCST_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.BCST.Z imm8 m32 xmm k xmm
// VRANGEPS.BCST.Z imm8 m32 ymm k ymm
// VRANGEPS.BCST.Z imm8 m32 zmm k zmm
func VRANGEPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VRANGEPS_SAE: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGEPS.SAE imm8 zmm zmm k zmm
// VRANGEPS.SAE imm8 zmm zmm zmm
func VRANGEPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{sffxSAE}, ops)
}
// VRANGEPS_SAE_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGEPS.SAE.Z imm8 zmm zmm k zmm
func VRANGEPS_SAE_Z(i, z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, z1, k, z2})
}
// VRANGEPS_Z: Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGEPS.Z imm8 m128 xmm k xmm
// VRANGEPS.Z imm8 m256 ymm k ymm
// VRANGEPS.Z imm8 xmm xmm k xmm
// VRANGEPS.Z imm8 ymm ymm k ymm
// VRANGEPS.Z imm8 m512 zmm k zmm
// VRANGEPS.Z imm8 zmm zmm k zmm
func VRANGEPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGEPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VRANGESD: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESD imm8 m64 xmm k xmm
// VRANGESD imm8 m64 xmm xmm
// VRANGESD imm8 xmm xmm k xmm
// VRANGESD imm8 xmm xmm xmm
func VRANGESD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESD.Forms(), sffxs{}, ops)
}
// VRANGESD_SAE: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESD.SAE imm8 xmm xmm k xmm
// VRANGESD.SAE imm8 xmm xmm xmm
func VRANGESD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESD.Forms(), sffxs{sffxSAE}, ops)
}
// VRANGESD_SAE_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESD.SAE.Z imm8 xmm xmm k xmm
func VRANGESD_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VRANGESD_Z: Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESD.Z imm8 m64 xmm k xmm
// VRANGESD.Z imm8 xmm xmm k xmm
func VRANGESD_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESD.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VRANGESS: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRANGESS imm8 m32 xmm k xmm
// VRANGESS imm8 m32 xmm xmm
// VRANGESS imm8 xmm xmm k xmm
// VRANGESS imm8 xmm xmm xmm
func VRANGESS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESS.Forms(), sffxs{}, ops)
}
// VRANGESS_SAE: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions).
//
// Forms:
//
// VRANGESS.SAE imm8 xmm xmm k xmm
// VRANGESS.SAE imm8 xmm xmm xmm
func VRANGESS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESS.Forms(), sffxs{sffxSAE}, ops)
}
// VRANGESS_SAE_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRANGESS.SAE.Z imm8 xmm xmm k xmm
func VRANGESS_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VRANGESS_Z: Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRANGESS.Z imm8 m32 xmm k xmm
// VRANGESS.Z imm8 xmm xmm k xmm
func VRANGESS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRANGESS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VRCP14PD: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PD m128 k xmm
// VRCP14PD m128 xmm
// VRCP14PD m256 k ymm
// VRCP14PD m256 ymm
// VRCP14PD xmm k xmm
// VRCP14PD xmm xmm
// VRCP14PD ymm k ymm
// VRCP14PD ymm ymm
// VRCP14PD m512 k zmm
// VRCP14PD m512 zmm
// VRCP14PD zmm k zmm
// VRCP14PD zmm zmm
func VRCP14PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PD.Forms(), sffxs{}, ops)
}
// VRCP14PD_BCST: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PD.BCST m64 k xmm
// VRCP14PD.BCST m64 k ymm
// VRCP14PD.BCST m64 xmm
// VRCP14PD.BCST m64 ymm
// VRCP14PD.BCST m64 k zmm
// VRCP14PD.BCST m64 zmm
func VRCP14PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PD.Forms(), sffxs{sffxBCST}, ops)
}
// VRCP14PD_BCST_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PD.BCST.Z m64 k xmm
// VRCP14PD.BCST.Z m64 k ymm
// VRCP14PD.BCST.Z m64 k zmm
func VRCP14PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VRCP14PD_Z: Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PD.Z m128 k xmm
// VRCP14PD.Z m256 k ymm
// VRCP14PD.Z xmm k xmm
// VRCP14PD.Z ymm k ymm
// VRCP14PD.Z m512 k zmm
// VRCP14PD.Z zmm k zmm
func VRCP14PD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VRCP14PS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCP14PS m128 k xmm
// VRCP14PS m128 xmm
// VRCP14PS m256 k ymm
// VRCP14PS m256 ymm
// VRCP14PS xmm k xmm
// VRCP14PS xmm xmm
// VRCP14PS ymm k ymm
// VRCP14PS ymm ymm
// VRCP14PS m512 k zmm
// VRCP14PS m512 zmm
// VRCP14PS zmm k zmm
// VRCP14PS zmm zmm
func VRCP14PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PS.Forms(), sffxs{}, ops)
}
// VRCP14PS_BCST: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRCP14PS.BCST m32 k xmm
// VRCP14PS.BCST m32 k ymm
// VRCP14PS.BCST m32 xmm
// VRCP14PS.BCST m32 ymm
// VRCP14PS.BCST m32 k zmm
// VRCP14PS.BCST m32 zmm
func VRCP14PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PS.Forms(), sffxs{sffxBCST}, ops)
}
// VRCP14PS_BCST_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP14PS.BCST.Z m32 k xmm
// VRCP14PS.BCST.Z m32 k ymm
// VRCP14PS.BCST.Z m32 k zmm
func VRCP14PS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VRCP14PS_Z: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRCP14PS.Z m128 k xmm
// VRCP14PS.Z m256 k ymm
// VRCP14PS.Z xmm k xmm
// VRCP14PS.Z ymm k ymm
// VRCP14PS.Z m512 k zmm
// VRCP14PS.Z zmm k zmm
func VRCP14PS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VRCP14SD: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SD m64 xmm k xmm
// VRCP14SD m64 xmm xmm
// VRCP14SD xmm xmm k xmm
// VRCP14SD xmm xmm xmm
func VRCP14SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14SD.Forms(), sffxs{}, ops)
}
// VRCP14SD_Z: Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SD.Z m64 xmm k xmm
// VRCP14SD.Z xmm xmm k xmm
func VRCP14SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRCP14SS: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRCP14SS m32 xmm k xmm
// VRCP14SS m32 xmm xmm
// VRCP14SS xmm xmm k xmm
// VRCP14SS xmm xmm xmm
func VRCP14SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14SS.Forms(), sffxs{}, ops)
}
// VRCP14SS_Z: Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRCP14SS.Z m32 xmm k xmm
// VRCP14SS.Z xmm xmm k xmm
func VRCP14SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP14SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRCP28PD: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PD m512 k zmm
// VRCP28PD m512 zmm
// VRCP28PD zmm k zmm
// VRCP28PD zmm zmm
func VRCP28PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{}, ops)
}
// VRCP28PD_BCST: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PD.BCST m64 k zmm
// VRCP28PD.BCST m64 zmm
func VRCP28PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{sffxBCST}, ops)
}
// VRCP28PD_BCST_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.BCST.Z m64 k zmm
func VRCP28PD_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VRCP28PD_SAE: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PD.SAE zmm k zmm
// VRCP28PD.SAE zmm zmm
func VRCP28PD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{sffxSAE}, ops)
}
// VRCP28PD_SAE_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PD.SAE.Z zmm k zmm
func VRCP28PD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VRCP28PD_Z: Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PD.Z m512 k zmm
// VRCP28PD.Z zmm k zmm
func VRCP28PD_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PD.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VRCP28PS: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28PS m512 k zmm
// VRCP28PS m512 zmm
// VRCP28PS zmm k zmm
// VRCP28PS zmm zmm
func VRCP28PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{}, ops)
}
// VRCP28PS_BCST: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRCP28PS.BCST m32 k zmm
// VRCP28PS.BCST m32 zmm
func VRCP28PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{sffxBCST}, ops)
}
// VRCP28PS_BCST_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.BCST.Z m32 k zmm
func VRCP28PS_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VRCP28PS_SAE: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28PS.SAE zmm k zmm
// VRCP28PS.SAE zmm zmm
func VRCP28PS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{sffxSAE}, ops)
}
// VRCP28PS_SAE_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28PS.SAE.Z zmm k zmm
func VRCP28PS_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VRCP28PS_Z: Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28PS.Z m512 k zmm
// VRCP28PS.Z zmm k zmm
func VRCP28PS_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VRCP28SD: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SD m64 xmm k xmm
// VRCP28SD m64 xmm xmm
// VRCP28SD xmm xmm k xmm
// VRCP28SD xmm xmm xmm
func VRCP28SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SD.Forms(), sffxs{}, ops)
}
// VRCP28SD_SAE: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SD.SAE xmm xmm k xmm
// VRCP28SD.SAE xmm xmm xmm
func VRCP28SD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SD.Forms(), sffxs{sffxSAE}, ops)
}
// VRCP28SD_SAE_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SD.SAE.Z xmm xmm k xmm
func VRCP28SD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VRCP28SD_Z: Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SD.Z m64 xmm k xmm
// VRCP28SD.Z xmm xmm k xmm
func VRCP28SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRCP28SS: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRCP28SS m32 xmm k xmm
// VRCP28SS m32 xmm xmm
// VRCP28SS xmm xmm k xmm
// VRCP28SS xmm xmm xmm
func VRCP28SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SS.Forms(), sffxs{}, ops)
}
// VRCP28SS_SAE: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRCP28SS.SAE xmm xmm k xmm
// VRCP28SS.SAE xmm xmm xmm
func VRCP28SS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SS.Forms(), sffxs{sffxSAE}, ops)
}
// VRCP28SS_SAE_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRCP28SS.SAE.Z xmm xmm k xmm
func VRCP28SS_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VRCP28SS_Z: Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRCP28SS.Z m32 xmm k xmm
// VRCP28SS.Z xmm xmm k xmm
func VRCP28SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCP28SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRCPPS: Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPPS m128 xmm
// VRCPPS m256 ymm
// VRCPPS xmm xmm
// VRCPPS ymm ymm
func VRCPPS(mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVRCPPS.Forms(), sffxs{}, []operand.Op{mxy, xy})
}
// VRCPSS: Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VRCPSS m32 xmm xmm
// VRCPSS xmm xmm xmm
func VRCPSS(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRCPSS.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VREDUCEPD: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPD imm8 m128 k xmm
// VREDUCEPD imm8 m128 xmm
// VREDUCEPD imm8 m256 k ymm
// VREDUCEPD imm8 m256 ymm
// VREDUCEPD imm8 xmm k xmm
// VREDUCEPD imm8 xmm xmm
// VREDUCEPD imm8 ymm k ymm
// VREDUCEPD imm8 ymm ymm
// VREDUCEPD imm8 m512 k zmm
// VREDUCEPD imm8 m512 zmm
// VREDUCEPD imm8 zmm k zmm
// VREDUCEPD imm8 zmm zmm
func VREDUCEPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPD.Forms(), sffxs{}, ops)
}
// VREDUCEPD_BCST: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPD.BCST imm8 m64 k xmm
// VREDUCEPD.BCST imm8 m64 k ymm
// VREDUCEPD.BCST imm8 m64 xmm
// VREDUCEPD.BCST imm8 m64 ymm
// VREDUCEPD.BCST imm8 m64 k zmm
// VREDUCEPD.BCST imm8 m64 zmm
func VREDUCEPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPD.Forms(), sffxs{sffxBCST}, ops)
}
// VREDUCEPD_BCST_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.BCST.Z imm8 m64 k xmm
// VREDUCEPD.BCST.Z imm8 m64 k ymm
// VREDUCEPD.BCST.Z imm8 m64 k zmm
func VREDUCEPD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VREDUCEPD_Z: Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPD.Z imm8 m128 k xmm
// VREDUCEPD.Z imm8 m256 k ymm
// VREDUCEPD.Z imm8 xmm k xmm
// VREDUCEPD.Z imm8 ymm k ymm
// VREDUCEPD.Z imm8 m512 k zmm
// VREDUCEPD.Z imm8 zmm k zmm
func VREDUCEPD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VREDUCEPS: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VREDUCEPS imm8 m128 k xmm
// VREDUCEPS imm8 m128 xmm
// VREDUCEPS imm8 m256 k ymm
// VREDUCEPS imm8 m256 ymm
// VREDUCEPS imm8 xmm k xmm
// VREDUCEPS imm8 xmm xmm
// VREDUCEPS imm8 ymm k ymm
// VREDUCEPS imm8 ymm ymm
// VREDUCEPS imm8 m512 k zmm
// VREDUCEPS imm8 m512 zmm
// VREDUCEPS imm8 zmm k zmm
// VREDUCEPS imm8 zmm zmm
func VREDUCEPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPS.Forms(), sffxs{}, ops)
}
// VREDUCEPS_BCST: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VREDUCEPS.BCST imm8 m32 k xmm
// VREDUCEPS.BCST imm8 m32 k ymm
// VREDUCEPS.BCST imm8 m32 xmm
// VREDUCEPS.BCST imm8 m32 ymm
// VREDUCEPS.BCST imm8 m32 k zmm
// VREDUCEPS.BCST imm8 m32 zmm
func VREDUCEPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPS.Forms(), sffxs{sffxBCST}, ops)
}
// VREDUCEPS_BCST_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.BCST.Z imm8 m32 k xmm
// VREDUCEPS.BCST.Z imm8 m32 k ymm
// VREDUCEPS.BCST.Z imm8 m32 k zmm
func VREDUCEPS_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VREDUCEPS_Z: Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VREDUCEPS.Z imm8 m128 k xmm
// VREDUCEPS.Z imm8 m256 k ymm
// VREDUCEPS.Z imm8 xmm k xmm
// VREDUCEPS.Z imm8 ymm k ymm
// VREDUCEPS.Z imm8 m512 k zmm
// VREDUCEPS.Z imm8 zmm k zmm
func VREDUCEPS_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCEPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VREDUCESD: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESD imm8 m64 xmm k xmm
// VREDUCESD imm8 m64 xmm xmm
// VREDUCESD imm8 xmm xmm k xmm
// VREDUCESD imm8 xmm xmm xmm
func VREDUCESD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCESD.Forms(), sffxs{}, ops)
}
// VREDUCESD_Z: Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESD.Z imm8 m64 xmm k xmm
// VREDUCESD.Z imm8 xmm xmm k xmm
func VREDUCESD_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCESD.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VREDUCESS: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VREDUCESS imm8 m32 xmm k xmm
// VREDUCESS imm8 m32 xmm xmm
// VREDUCESS imm8 xmm xmm k xmm
// VREDUCESS imm8 xmm xmm xmm
func VREDUCESS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCESS.Forms(), sffxs{}, ops)
}
// VREDUCESS_Z: Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VREDUCESS.Z imm8 m32 xmm k xmm
// VREDUCESS.Z imm8 xmm xmm k xmm
func VREDUCESS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVREDUCESS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VRNDSCALEPD: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPD imm8 m128 k xmm
// VRNDSCALEPD imm8 m128 xmm
// VRNDSCALEPD imm8 m256 k ymm
// VRNDSCALEPD imm8 m256 ymm
// VRNDSCALEPD imm8 xmm k xmm
// VRNDSCALEPD imm8 xmm xmm
// VRNDSCALEPD imm8 ymm k ymm
// VRNDSCALEPD imm8 ymm ymm
// VRNDSCALEPD imm8 m512 k zmm
// VRNDSCALEPD imm8 m512 zmm
// VRNDSCALEPD imm8 zmm k zmm
// VRNDSCALEPD imm8 zmm zmm
func VRNDSCALEPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{}, ops)
}
// VRNDSCALEPD_BCST: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPD.BCST imm8 m64 k xmm
// VRNDSCALEPD.BCST imm8 m64 k ymm
// VRNDSCALEPD.BCST imm8 m64 xmm
// VRNDSCALEPD.BCST imm8 m64 ymm
// VRNDSCALEPD.BCST imm8 m64 k zmm
// VRNDSCALEPD.BCST imm8 m64 zmm
func VRNDSCALEPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{sffxBCST}, ops)
}
// VRNDSCALEPD_BCST_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.BCST.Z imm8 m64 k xmm
// VRNDSCALEPD.BCST.Z imm8 m64 k ymm
// VRNDSCALEPD.BCST.Z imm8 m64 k zmm
func VRNDSCALEPD_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VRNDSCALEPD_SAE: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPD.SAE imm8 zmm k zmm
// VRNDSCALEPD.SAE imm8 zmm zmm
func VRNDSCALEPD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{sffxSAE}, ops)
}
// VRNDSCALEPD_SAE_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.SAE.Z imm8 zmm k zmm
func VRNDSCALEPD_SAE_Z(i, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, k, z1})
}
// VRNDSCALEPD_Z: Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPD.Z imm8 m128 k xmm
// VRNDSCALEPD.Z imm8 m256 k ymm
// VRNDSCALEPD.Z imm8 xmm k xmm
// VRNDSCALEPD.Z imm8 ymm k ymm
// VRNDSCALEPD.Z imm8 m512 k zmm
// VRNDSCALEPD.Z imm8 zmm k zmm
func VRNDSCALEPD_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VRNDSCALEPS: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALEPS imm8 m128 k xmm
// VRNDSCALEPS imm8 m128 xmm
// VRNDSCALEPS imm8 m256 k ymm
// VRNDSCALEPS imm8 m256 ymm
// VRNDSCALEPS imm8 xmm k xmm
// VRNDSCALEPS imm8 xmm xmm
// VRNDSCALEPS imm8 ymm k ymm
// VRNDSCALEPS imm8 ymm ymm
// VRNDSCALEPS imm8 m512 k zmm
// VRNDSCALEPS imm8 m512 zmm
// VRNDSCALEPS imm8 zmm k zmm
// VRNDSCALEPS imm8 zmm zmm
func VRNDSCALEPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{}, ops)
}
// VRNDSCALEPS_BCST: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast).
//
// Forms:
//
// VRNDSCALEPS.BCST imm8 m32 k xmm
// VRNDSCALEPS.BCST imm8 m32 k ymm
// VRNDSCALEPS.BCST imm8 m32 xmm
// VRNDSCALEPS.BCST imm8 m32 ymm
// VRNDSCALEPS.BCST imm8 m32 k zmm
// VRNDSCALEPS.BCST imm8 m32 zmm
func VRNDSCALEPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{sffxBCST}, ops)
}
// VRNDSCALEPS_BCST_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.BCST.Z imm8 m32 k xmm
// VRNDSCALEPS.BCST.Z imm8 m32 k ymm
// VRNDSCALEPS.BCST.Z imm8 m32 k zmm
func VRNDSCALEPS_BCST_Z(i, m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, k, xyz})
}
// VRNDSCALEPS_SAE: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALEPS.SAE imm8 zmm k zmm
// VRNDSCALEPS.SAE imm8 zmm zmm
func VRNDSCALEPS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{sffxSAE}, ops)
}
// VRNDSCALEPS_SAE_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.SAE.Z imm8 zmm k zmm
func VRNDSCALEPS_SAE_Z(i, z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, z, k, z1})
}
// VRNDSCALEPS_Z: Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALEPS.Z imm8 m128 k xmm
// VRNDSCALEPS.Z imm8 m256 k ymm
// VRNDSCALEPS.Z imm8 xmm k xmm
// VRNDSCALEPS.Z imm8 ymm k ymm
// VRNDSCALEPS.Z imm8 m512 k zmm
// VRNDSCALEPS.Z imm8 zmm k zmm
func VRNDSCALEPS_Z(i, mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALEPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, k, xyz})
}
// VRNDSCALESD: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESD imm8 m64 xmm k xmm
// VRNDSCALESD imm8 m64 xmm xmm
// VRNDSCALESD imm8 xmm xmm k xmm
// VRNDSCALESD imm8 xmm xmm xmm
func VRNDSCALESD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESD.Forms(), sffxs{}, ops)
}
// VRNDSCALESD_SAE: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESD.SAE imm8 xmm xmm k xmm
// VRNDSCALESD.SAE imm8 xmm xmm xmm
func VRNDSCALESD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESD.Forms(), sffxs{sffxSAE}, ops)
}
// VRNDSCALESD_SAE_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.SAE.Z imm8 xmm xmm k xmm
func VRNDSCALESD_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VRNDSCALESD_Z: Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESD.Z imm8 m64 xmm k xmm
// VRNDSCALESD.Z imm8 xmm xmm k xmm
func VRNDSCALESD_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESD.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VRNDSCALESS: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits.
//
// Forms:
//
// VRNDSCALESS imm8 m32 xmm k xmm
// VRNDSCALESS imm8 m32 xmm xmm
// VRNDSCALESS imm8 xmm xmm k xmm
// VRNDSCALESS imm8 xmm xmm xmm
func VRNDSCALESS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESS.Forms(), sffxs{}, ops)
}
// VRNDSCALESS_SAE: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions).
//
// Forms:
//
// VRNDSCALESS.SAE imm8 xmm xmm k xmm
// VRNDSCALESS.SAE imm8 xmm xmm xmm
func VRNDSCALESS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESS.Forms(), sffxs{sffxSAE}, ops)
}
// VRNDSCALESS_SAE_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.SAE.Z imm8 xmm xmm k xmm
func VRNDSCALESS_SAE_Z(i, x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{i, x, x1, k, x2})
}
// VRNDSCALESS_Z: Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (Zeroing Masking).
//
// Forms:
//
// VRNDSCALESS.Z imm8 m32 xmm k xmm
// VRNDSCALESS.Z imm8 xmm xmm k xmm
func VRNDSCALESS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRNDSCALESS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1})
}
// VROUNDPD: Round Packed Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPD imm8 m128 xmm
// VROUNDPD imm8 m256 ymm
// VROUNDPD imm8 xmm xmm
// VROUNDPD imm8 ymm ymm
func VROUNDPD(i, mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVROUNDPD.Forms(), sffxs{}, []operand.Op{i, mxy, xy})
}
// VROUNDPS: Round Packed Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDPS imm8 m128 xmm
// VROUNDPS imm8 m256 ymm
// VROUNDPS imm8 xmm xmm
// VROUNDPS imm8 ymm ymm
func VROUNDPS(i, mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVROUNDPS.Forms(), sffxs{}, []operand.Op{i, mxy, xy})
}
// VROUNDSD: Round Scalar Double Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSD imm8 m64 xmm xmm
// VROUNDSD imm8 xmm xmm xmm
func VROUNDSD(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVROUNDSD.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
}
// VROUNDSS: Round Scalar Single Precision Floating-Point Values.
//
// Forms:
//
// VROUNDSS imm8 m32 xmm xmm
// VROUNDSS imm8 xmm xmm xmm
func VROUNDSS(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVROUNDSS.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
}
// VRSQRT14PD: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PD m128 k xmm
// VRSQRT14PD m128 xmm
// VRSQRT14PD m256 k ymm
// VRSQRT14PD m256 ymm
// VRSQRT14PD xmm k xmm
// VRSQRT14PD xmm xmm
// VRSQRT14PD ymm k ymm
// VRSQRT14PD ymm ymm
// VRSQRT14PD m512 k zmm
// VRSQRT14PD m512 zmm
// VRSQRT14PD zmm k zmm
// VRSQRT14PD zmm zmm
func VRSQRT14PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PD.Forms(), sffxs{}, ops)
}
// VRSQRT14PD_BCST: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PD.BCST m64 k xmm
// VRSQRT14PD.BCST m64 k ymm
// VRSQRT14PD.BCST m64 xmm
// VRSQRT14PD.BCST m64 ymm
// VRSQRT14PD.BCST m64 k zmm
// VRSQRT14PD.BCST m64 zmm
func VRSQRT14PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PD.Forms(), sffxs{sffxBCST}, ops)
}
// VRSQRT14PD_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.BCST.Z m64 k xmm
// VRSQRT14PD.BCST.Z m64 k ymm
// VRSQRT14PD.BCST.Z m64 k zmm
func VRSQRT14PD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VRSQRT14PD_Z: Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PD.Z m128 k xmm
// VRSQRT14PD.Z m256 k ymm
// VRSQRT14PD.Z xmm k xmm
// VRSQRT14PD.Z ymm k ymm
// VRSQRT14PD.Z m512 k zmm
// VRSQRT14PD.Z zmm k zmm
func VRSQRT14PD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VRSQRT14PS: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRT14PS m128 k xmm
// VRSQRT14PS m128 xmm
// VRSQRT14PS m256 k ymm
// VRSQRT14PS m256 ymm
// VRSQRT14PS xmm k xmm
// VRSQRT14PS xmm xmm
// VRSQRT14PS ymm k ymm
// VRSQRT14PS ymm ymm
// VRSQRT14PS m512 k zmm
// VRSQRT14PS m512 zmm
// VRSQRT14PS zmm k zmm
// VRSQRT14PS zmm zmm
func VRSQRT14PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PS.Forms(), sffxs{}, ops)
}
// VRSQRT14PS_BCST: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VRSQRT14PS.BCST m32 k xmm
// VRSQRT14PS.BCST m32 k ymm
// VRSQRT14PS.BCST m32 xmm
// VRSQRT14PS.BCST m32 ymm
// VRSQRT14PS.BCST m32 k zmm
// VRSQRT14PS.BCST m32 zmm
func VRSQRT14PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PS.Forms(), sffxs{sffxBCST}, ops)
}
// VRSQRT14PS_BCST_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.BCST.Z m32 k xmm
// VRSQRT14PS.BCST.Z m32 k ymm
// VRSQRT14PS.BCST.Z m32 k zmm
func VRSQRT14PS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VRSQRT14PS_Z: Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VRSQRT14PS.Z m128 k xmm
// VRSQRT14PS.Z m256 k ymm
// VRSQRT14PS.Z xmm k xmm
// VRSQRT14PS.Z ymm k ymm
// VRSQRT14PS.Z m512 k zmm
// VRSQRT14PS.Z zmm k zmm
func VRSQRT14PS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14PS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VRSQRT14SD: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SD m64 xmm k xmm
// VRSQRT14SD m64 xmm xmm
// VRSQRT14SD xmm xmm k xmm
// VRSQRT14SD xmm xmm xmm
func VRSQRT14SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14SD.Forms(), sffxs{}, ops)
}
// VRSQRT14SD_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SD.Z m64 xmm k xmm
// VRSQRT14SD.Z xmm xmm k xmm
func VRSQRT14SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRSQRT14SS: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRT14SS m32 xmm k xmm
// VRSQRT14SS m32 xmm xmm
// VRSQRT14SS xmm xmm k xmm
// VRSQRT14SS xmm xmm xmm
func VRSQRT14SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14SS.Forms(), sffxs{}, ops)
}
// VRSQRT14SS_Z: Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VRSQRT14SS.Z m32 xmm k xmm
// VRSQRT14SS.Z xmm xmm k xmm
func VRSQRT14SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT14SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRSQRT28PD: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PD m512 k zmm
// VRSQRT28PD m512 zmm
// VRSQRT28PD zmm k zmm
// VRSQRT28PD zmm zmm
func VRSQRT28PD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{}, ops)
}
// VRSQRT28PD_BCST: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PD.BCST m64 k zmm
// VRSQRT28PD.BCST m64 zmm
func VRSQRT28PD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{sffxBCST}, ops)
}
// VRSQRT28PD_BCST_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.BCST.Z m64 k zmm
func VRSQRT28PD_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VRSQRT28PD_SAE: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PD.SAE zmm k zmm
// VRSQRT28PD.SAE zmm zmm
func VRSQRT28PD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{sffxSAE}, ops)
}
// VRSQRT28PD_SAE_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.SAE.Z zmm k zmm
func VRSQRT28PD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VRSQRT28PD_Z: Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PD.Z m512 k zmm
// VRSQRT28PD.Z zmm k zmm
func VRSQRT28PD_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PD.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VRSQRT28PS: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28PS m512 k zmm
// VRSQRT28PS m512 zmm
// VRSQRT28PS zmm k zmm
// VRSQRT28PS zmm zmm
func VRSQRT28PS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{}, ops)
}
// VRSQRT28PS_BCST: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast).
//
// Forms:
//
// VRSQRT28PS.BCST m32 k zmm
// VRSQRT28PS.BCST m32 zmm
func VRSQRT28PS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{sffxBCST}, ops)
}
// VRSQRT28PS_BCST_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Broadcast, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.BCST.Z m32 k zmm
func VRSQRT28PS_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
}
// VRSQRT28PS_SAE: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28PS.SAE zmm k zmm
// VRSQRT28PS.SAE zmm zmm
func VRSQRT28PS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{sffxSAE}, ops)
}
// VRSQRT28PS_SAE_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.SAE.Z zmm k zmm
func VRSQRT28PS_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{z, k, z1})
}
// VRSQRT28PS_Z: Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28PS.Z m512 k zmm
// VRSQRT28PS.Z zmm k zmm
func VRSQRT28PS_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28PS.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
}
// VRSQRT28SD: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SD m64 xmm k xmm
// VRSQRT28SD m64 xmm xmm
// VRSQRT28SD xmm xmm k xmm
// VRSQRT28SD xmm xmm xmm
func VRSQRT28SD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SD.Forms(), sffxs{}, ops)
}
// VRSQRT28SD_SAE: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SD.SAE xmm xmm k xmm
// VRSQRT28SD.SAE xmm xmm xmm
func VRSQRT28SD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SD.Forms(), sffxs{sffxSAE}, ops)
}
// VRSQRT28SD_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.SAE.Z xmm xmm k xmm
func VRSQRT28SD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SD.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VRSQRT28SD_Z: Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SD.Z m64 xmm k xmm
// VRSQRT28SD.Z xmm xmm k xmm
func VRSQRT28SD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRSQRT28SS: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error.
//
// Forms:
//
// VRSQRT28SS m32 xmm k xmm
// VRSQRT28SS m32 xmm xmm
// VRSQRT28SS xmm xmm k xmm
// VRSQRT28SS xmm xmm xmm
func VRSQRT28SS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SS.Forms(), sffxs{}, ops)
}
// VRSQRT28SS_SAE: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions).
//
// Forms:
//
// VRSQRT28SS.SAE xmm xmm k xmm
// VRSQRT28SS.SAE xmm xmm xmm
func VRSQRT28SS_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SS.Forms(), sffxs{sffxSAE}, ops)
}
// VRSQRT28SS_SAE_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Suppress All Exceptions, Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.SAE.Z xmm xmm k xmm
func VRSQRT28SS_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SS.Forms(), sffxs{sffxSAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VRSQRT28SS_Z: Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (Zeroing Masking).
//
// Forms:
//
// VRSQRT28SS.Z m32 xmm k xmm
// VRSQRT28SS.Z xmm xmm k xmm
func VRSQRT28SS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRT28SS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VRSQRTPS: Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VRSQRTPS m128 xmm
// VRSQRTPS m256 ymm
// VRSQRTPS xmm xmm
// VRSQRTPS ymm ymm
func VRSQRTPS(mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRTPS.Forms(), sffxs{}, []operand.Op{mxy, xy})
}
// VRSQRTSS: Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VRSQRTSS m32 xmm xmm
// VRSQRTSS xmm xmm xmm
func VRSQRTSS(mx, x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVRSQRTSS.Forms(), sffxs{}, []operand.Op{mx, x, x1})
}
// VSCALEFPD: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPD m128 xmm k xmm
// VSCALEFPD m128 xmm xmm
// VSCALEFPD m256 ymm k ymm
// VSCALEFPD m256 ymm ymm
// VSCALEFPD xmm xmm k xmm
// VSCALEFPD xmm xmm xmm
// VSCALEFPD ymm ymm k ymm
// VSCALEFPD ymm ymm ymm
// VSCALEFPD m512 zmm k zmm
// VSCALEFPD m512 zmm zmm
// VSCALEFPD zmm zmm k zmm
// VSCALEFPD zmm zmm zmm
func VSCALEFPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{}, ops)
}
// VSCALEFPD_BCST: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPD.BCST m64 xmm k xmm
// VSCALEFPD.BCST m64 xmm xmm
// VSCALEFPD.BCST m64 ymm k ymm
// VSCALEFPD.BCST m64 ymm ymm
// VSCALEFPD.BCST m64 zmm k zmm
// VSCALEFPD.BCST m64 zmm zmm
func VSCALEFPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxBCST}, ops)
}
// VSCALEFPD_BCST_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.BCST.Z m64 xmm k xmm
// VSCALEFPD.BCST.Z m64 ymm k ymm
// VSCALEFPD.BCST.Z m64 zmm k zmm
func VSCALEFPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VSCALEFPD_RD_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPD.RD_SAE zmm zmm k zmm
// VSCALEFPD.RD_SAE zmm zmm zmm
func VSCALEFPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSCALEFPD_RD_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RD_SAE.Z zmm zmm k zmm
func VSCALEFPD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPD_RN_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPD.RN_SAE zmm zmm k zmm
// VSCALEFPD.RN_SAE zmm zmm zmm
func VSCALEFPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSCALEFPD_RN_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RN_SAE.Z zmm zmm k zmm
func VSCALEFPD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPD_RU_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPD.RU_SAE zmm zmm k zmm
// VSCALEFPD.RU_SAE zmm zmm zmm
func VSCALEFPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSCALEFPD_RU_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RU_SAE.Z zmm zmm k zmm
func VSCALEFPD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPD_RZ_SAE: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPD.RZ_SAE zmm zmm k zmm
// VSCALEFPD.RZ_SAE zmm zmm zmm
func VSCALEFPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSCALEFPD_RZ_SAE_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.RZ_SAE.Z zmm zmm k zmm
func VSCALEFPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPD_Z: Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPD.Z m128 xmm k xmm
// VSCALEFPD.Z m256 ymm k ymm
// VSCALEFPD.Z xmm xmm k xmm
// VSCALEFPD.Z ymm ymm k ymm
// VSCALEFPD.Z m512 zmm k zmm
// VSCALEFPD.Z zmm zmm k zmm
func VSCALEFPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VSCALEFPS: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values.
//
// Forms:
//
// VSCALEFPS m128 xmm k xmm
// VSCALEFPS m128 xmm xmm
// VSCALEFPS m256 ymm k ymm
// VSCALEFPS m256 ymm ymm
// VSCALEFPS xmm xmm k xmm
// VSCALEFPS xmm xmm xmm
// VSCALEFPS ymm ymm k ymm
// VSCALEFPS ymm ymm ymm
// VSCALEFPS m512 zmm k zmm
// VSCALEFPS m512 zmm zmm
// VSCALEFPS zmm zmm k zmm
// VSCALEFPS zmm zmm zmm
func VSCALEFPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{}, ops)
}
// VSCALEFPS_BCST: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSCALEFPS.BCST m32 xmm k xmm
// VSCALEFPS.BCST m32 xmm xmm
// VSCALEFPS.BCST m32 ymm k ymm
// VSCALEFPS.BCST m32 ymm ymm
// VSCALEFPS.BCST m32 zmm k zmm
// VSCALEFPS.BCST m32 zmm zmm
func VSCALEFPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxBCST}, ops)
}
// VSCALEFPS_BCST_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.BCST.Z m32 xmm k xmm
// VSCALEFPS.BCST.Z m32 ymm k ymm
// VSCALEFPS.BCST.Z m32 zmm k zmm
func VSCALEFPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VSCALEFPS_RD_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFPS.RD_SAE zmm zmm k zmm
// VSCALEFPS.RD_SAE zmm zmm zmm
func VSCALEFPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSCALEFPS_RD_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RD_SAE.Z zmm zmm k zmm
func VSCALEFPS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPS_RN_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSCALEFPS.RN_SAE zmm zmm k zmm
// VSCALEFPS.RN_SAE zmm zmm zmm
func VSCALEFPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSCALEFPS_RN_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RN_SAE.Z zmm zmm k zmm
func VSCALEFPS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPS_RU_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFPS.RU_SAE zmm zmm k zmm
// VSCALEFPS.RU_SAE zmm zmm zmm
func VSCALEFPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSCALEFPS_RU_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RU_SAE.Z zmm zmm k zmm
func VSCALEFPS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPS_RZ_SAE: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSCALEFPS.RZ_SAE zmm zmm k zmm
// VSCALEFPS.RZ_SAE zmm zmm zmm
func VSCALEFPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSCALEFPS_RZ_SAE_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.RZ_SAE.Z zmm zmm k zmm
func VSCALEFPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSCALEFPS_Z: Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSCALEFPS.Z m128 xmm k xmm
// VSCALEFPS.Z m256 ymm k ymm
// VSCALEFPS.Z xmm xmm k xmm
// VSCALEFPS.Z ymm ymm k ymm
// VSCALEFPS.Z m512 zmm k zmm
// VSCALEFPS.Z zmm zmm k zmm
func VSCALEFPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VSCALEFSD: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSD m64 xmm k xmm
// VSCALEFSD m64 xmm xmm
// VSCALEFSD xmm xmm k xmm
// VSCALEFSD xmm xmm xmm
func VSCALEFSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{}, ops)
}
// VSCALEFSD_RD_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSD.RD_SAE xmm xmm k xmm
// VSCALEFSD.RD_SAE xmm xmm xmm
func VSCALEFSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSCALEFSD_RD_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RD_SAE.Z xmm xmm k xmm
func VSCALEFSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSD_RN_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSD.RN_SAE xmm xmm k xmm
// VSCALEFSD.RN_SAE xmm xmm xmm
func VSCALEFSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSCALEFSD_RN_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RN_SAE.Z xmm xmm k xmm
func VSCALEFSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSD_RU_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSD.RU_SAE xmm xmm k xmm
// VSCALEFSD.RU_SAE xmm xmm xmm
func VSCALEFSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSCALEFSD_RU_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RU_SAE.Z xmm xmm k xmm
func VSCALEFSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSD_RZ_SAE: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSD.RZ_SAE xmm xmm k xmm
// VSCALEFSD.RZ_SAE xmm xmm xmm
func VSCALEFSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSCALEFSD_RZ_SAE_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.RZ_SAE.Z xmm xmm k xmm
func VSCALEFSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSD_Z: Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSD.Z m64 xmm k xmm
// VSCALEFSD.Z xmm xmm k xmm
func VSCALEFSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VSCALEFSS: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value.
//
// Forms:
//
// VSCALEFSS m32 xmm k xmm
// VSCALEFSS m32 xmm xmm
// VSCALEFSS xmm xmm k xmm
// VSCALEFSS xmm xmm xmm
func VSCALEFSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{}, ops)
}
// VSCALEFSS_RD_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSCALEFSS.RD_SAE xmm xmm k xmm
// VSCALEFSS.RD_SAE xmm xmm xmm
func VSCALEFSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSCALEFSS_RD_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RD_SAE.Z xmm xmm k xmm
func VSCALEFSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSS_RN_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSCALEFSS.RN_SAE xmm xmm k xmm
// VSCALEFSS.RN_SAE xmm xmm xmm
func VSCALEFSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSCALEFSS_RN_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RN_SAE.Z xmm xmm k xmm
func VSCALEFSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSS_RU_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSCALEFSS.RU_SAE xmm xmm k xmm
// VSCALEFSS.RU_SAE xmm xmm xmm
func VSCALEFSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSCALEFSS_RU_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RU_SAE.Z xmm xmm k xmm
func VSCALEFSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSS_RZ_SAE: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSCALEFSS.RZ_SAE xmm xmm k xmm
// VSCALEFSS.RZ_SAE xmm xmm xmm
func VSCALEFSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSCALEFSS_RZ_SAE_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.RZ_SAE.Z xmm xmm k xmm
func VSCALEFSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSCALEFSS_Z: Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSCALEFSS.Z m32 xmm k xmm
// VSCALEFSS.Z xmm xmm k xmm
func VSCALEFSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSCALEFSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VSCATTERDPD: Scatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPD xmm k vm32x
// VSCATTERDPD ymm k vm32x
// VSCATTERDPD zmm k vm32y
func VSCATTERDPD(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVSCATTERDPD.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VSCATTERDPS: Scatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices.
//
// Forms:
//
// VSCATTERDPS xmm k vm32x
// VSCATTERDPS ymm k vm32y
// VSCATTERDPS zmm k vm32z
func VSCATTERDPS(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVSCATTERDPS.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VSCATTERQPD: Scatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPD xmm k vm64x
// VSCATTERQPD ymm k vm64y
// VSCATTERQPD zmm k vm64z
func VSCATTERQPD(xyz, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVSCATTERQPD.Forms(), sffxs{}, []operand.Op{xyz, k, v})
}
// VSCATTERQPS: Scatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices.
//
// Forms:
//
// VSCATTERQPS xmm k vm64x
// VSCATTERQPS xmm k vm64y
// VSCATTERQPS ymm k vm64z
func VSCATTERQPS(xy, k, v operand.Op) (*intrep.Instruction, error) {
return build(opcVSCATTERQPS.Forms(), sffxs{}, []operand.Op{xy, k, v})
}
// VSHUFF32X4: Shuffle 128-Bit Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF32X4 imm8 m256 ymm k ymm
// VSHUFF32X4 imm8 m256 ymm ymm
// VSHUFF32X4 imm8 ymm ymm k ymm
// VSHUFF32X4 imm8 ymm ymm ymm
// VSHUFF32X4 imm8 m512 zmm k zmm
// VSHUFF32X4 imm8 m512 zmm zmm
// VSHUFF32X4 imm8 zmm zmm k zmm
// VSHUFF32X4 imm8 zmm zmm zmm
func VSHUFF32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF32X4.Forms(), sffxs{}, ops)
}
// VSHUFF32X4_BCST: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF32X4.BCST imm8 m32 ymm k ymm
// VSHUFF32X4.BCST imm8 m32 ymm ymm
// VSHUFF32X4.BCST imm8 m32 zmm k zmm
// VSHUFF32X4.BCST imm8 m32 zmm zmm
func VSHUFF32X4_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF32X4.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFF32X4_BCST_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFF32X4.BCST.Z imm8 m32 zmm k zmm
func VSHUFF32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF32X4.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, yz, k, yz1})
}
// VSHUFF32X4_Z: Shuffle 128-Bit Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF32X4.Z imm8 m256 ymm k ymm
// VSHUFF32X4.Z imm8 ymm ymm k ymm
// VSHUFF32X4.Z imm8 m512 zmm k zmm
// VSHUFF32X4.Z imm8 zmm zmm k zmm
func VSHUFF32X4_Z(i, myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, myz, yz, k, yz1})
}
// VSHUFF64X2: Shuffle 128-Bit Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFF64X2 imm8 m256 ymm k ymm
// VSHUFF64X2 imm8 m256 ymm ymm
// VSHUFF64X2 imm8 ymm ymm k ymm
// VSHUFF64X2 imm8 ymm ymm ymm
// VSHUFF64X2 imm8 m512 zmm k zmm
// VSHUFF64X2 imm8 m512 zmm zmm
// VSHUFF64X2 imm8 zmm zmm k zmm
// VSHUFF64X2 imm8 zmm zmm zmm
func VSHUFF64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF64X2.Forms(), sffxs{}, ops)
}
// VSHUFF64X2_BCST: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFF64X2.BCST imm8 m64 ymm k ymm
// VSHUFF64X2.BCST imm8 m64 ymm ymm
// VSHUFF64X2.BCST imm8 m64 zmm k zmm
// VSHUFF64X2.BCST imm8 m64 zmm zmm
func VSHUFF64X2_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF64X2.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFF64X2_BCST_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFF64X2.BCST.Z imm8 m64 zmm k zmm
func VSHUFF64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF64X2.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, yz, k, yz1})
}
// VSHUFF64X2_Z: Shuffle 128-Bit Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFF64X2.Z imm8 m256 ymm k ymm
// VSHUFF64X2.Z imm8 ymm ymm k ymm
// VSHUFF64X2.Z imm8 m512 zmm k zmm
// VSHUFF64X2.Z imm8 zmm zmm k zmm
func VSHUFF64X2_Z(i, myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFF64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, myz, yz, k, yz1})
}
// VSHUFI32X4: Shuffle 128-Bit Packed Doubleword Integer Values.
//
// Forms:
//
// VSHUFI32X4 imm8 m256 ymm k ymm
// VSHUFI32X4 imm8 m256 ymm ymm
// VSHUFI32X4 imm8 ymm ymm k ymm
// VSHUFI32X4 imm8 ymm ymm ymm
// VSHUFI32X4 imm8 m512 zmm k zmm
// VSHUFI32X4 imm8 m512 zmm zmm
// VSHUFI32X4 imm8 zmm zmm k zmm
// VSHUFI32X4 imm8 zmm zmm zmm
func VSHUFI32X4(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI32X4.Forms(), sffxs{}, ops)
}
// VSHUFI32X4_BCST: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI32X4.BCST imm8 m32 ymm k ymm
// VSHUFI32X4.BCST imm8 m32 ymm ymm
// VSHUFI32X4.BCST imm8 m32 zmm k zmm
// VSHUFI32X4.BCST imm8 m32 zmm zmm
func VSHUFI32X4_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI32X4.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFI32X4_BCST_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.BCST.Z imm8 m32 ymm k ymm
// VSHUFI32X4.BCST.Z imm8 m32 zmm k zmm
func VSHUFI32X4_BCST_Z(i, m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI32X4.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, yz, k, yz1})
}
// VSHUFI32X4_Z: Shuffle 128-Bit Packed Doubleword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI32X4.Z imm8 m256 ymm k ymm
// VSHUFI32X4.Z imm8 ymm ymm k ymm
// VSHUFI32X4.Z imm8 m512 zmm k zmm
// VSHUFI32X4.Z imm8 zmm zmm k zmm
func VSHUFI32X4_Z(i, myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI32X4.Forms(), sffxs{sffxZ}, []operand.Op{i, myz, yz, k, yz1})
}
// VSHUFI64X2: Shuffle 128-Bit Packed Quadword Integer Values.
//
// Forms:
//
// VSHUFI64X2 imm8 m256 ymm k ymm
// VSHUFI64X2 imm8 m256 ymm ymm
// VSHUFI64X2 imm8 ymm ymm k ymm
// VSHUFI64X2 imm8 ymm ymm ymm
// VSHUFI64X2 imm8 m512 zmm k zmm
// VSHUFI64X2 imm8 m512 zmm zmm
// VSHUFI64X2 imm8 zmm zmm k zmm
// VSHUFI64X2 imm8 zmm zmm zmm
func VSHUFI64X2(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI64X2.Forms(), sffxs{}, ops)
}
// VSHUFI64X2_BCST: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast).
//
// Forms:
//
// VSHUFI64X2.BCST imm8 m64 ymm k ymm
// VSHUFI64X2.BCST imm8 m64 ymm ymm
// VSHUFI64X2.BCST imm8 m64 zmm k zmm
// VSHUFI64X2.BCST imm8 m64 zmm zmm
func VSHUFI64X2_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI64X2.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFI64X2_BCST_Z: Shuffle 128-Bit Packed Quadword Integer Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.BCST.Z imm8 m64 ymm k ymm
// VSHUFI64X2.BCST.Z imm8 m64 zmm k zmm
func VSHUFI64X2_BCST_Z(i, m, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI64X2.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, yz, k, yz1})
}
// VSHUFI64X2_Z: Shuffle 128-Bit Packed Quadword Integer Values (Zeroing Masking).
//
// Forms:
//
// VSHUFI64X2.Z imm8 m256 ymm k ymm
// VSHUFI64X2.Z imm8 ymm ymm k ymm
// VSHUFI64X2.Z imm8 m512 zmm k zmm
// VSHUFI64X2.Z imm8 zmm zmm k zmm
func VSHUFI64X2_Z(i, myz, yz, k, yz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFI64X2.Forms(), sffxs{sffxZ}, []operand.Op{i, myz, yz, k, yz1})
}
// VSHUFPD: Shuffle Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPD imm8 m128 xmm xmm
// VSHUFPD imm8 m256 ymm ymm
// VSHUFPD imm8 xmm xmm xmm
// VSHUFPD imm8 ymm ymm ymm
// VSHUFPD imm8 m128 xmm k xmm
// VSHUFPD imm8 m256 ymm k ymm
// VSHUFPD imm8 xmm xmm k xmm
// VSHUFPD imm8 ymm ymm k ymm
// VSHUFPD imm8 m512 zmm k zmm
// VSHUFPD imm8 m512 zmm zmm
// VSHUFPD imm8 zmm zmm k zmm
// VSHUFPD imm8 zmm zmm zmm
func VSHUFPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPD.Forms(), sffxs{}, ops)
}
// VSHUFPD_BCST: Shuffle Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPD.BCST imm8 m64 xmm k xmm
// VSHUFPD.BCST imm8 m64 xmm xmm
// VSHUFPD.BCST imm8 m64 ymm k ymm
// VSHUFPD.BCST imm8 m64 ymm ymm
// VSHUFPD.BCST imm8 m64 zmm k zmm
// VSHUFPD.BCST imm8 m64 zmm zmm
func VSHUFPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPD.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFPD_BCST_Z: Shuffle Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPD.BCST.Z imm8 m64 xmm k xmm
// VSHUFPD.BCST.Z imm8 m64 ymm k ymm
// VSHUFPD.BCST.Z imm8 m64 zmm k zmm
func VSHUFPD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VSHUFPD_Z: Shuffle Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPD.Z imm8 m128 xmm k xmm
// VSHUFPD.Z imm8 m256 ymm k ymm
// VSHUFPD.Z imm8 xmm xmm k xmm
// VSHUFPD.Z imm8 ymm ymm k ymm
// VSHUFPD.Z imm8 m512 zmm k zmm
// VSHUFPD.Z imm8 zmm zmm k zmm
func VSHUFPD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VSHUFPS: Shuffle Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSHUFPS imm8 m128 xmm xmm
// VSHUFPS imm8 m256 ymm ymm
// VSHUFPS imm8 xmm xmm xmm
// VSHUFPS imm8 ymm ymm ymm
// VSHUFPS imm8 m128 xmm k xmm
// VSHUFPS imm8 m256 ymm k ymm
// VSHUFPS imm8 xmm xmm k xmm
// VSHUFPS imm8 ymm ymm k ymm
// VSHUFPS imm8 m512 zmm k zmm
// VSHUFPS imm8 m512 zmm zmm
// VSHUFPS imm8 zmm zmm k zmm
// VSHUFPS imm8 zmm zmm zmm
func VSHUFPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPS.Forms(), sffxs{}, ops)
}
// VSHUFPS_BCST: Shuffle Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSHUFPS.BCST imm8 m32 xmm k xmm
// VSHUFPS.BCST imm8 m32 xmm xmm
// VSHUFPS.BCST imm8 m32 ymm k ymm
// VSHUFPS.BCST imm8 m32 ymm ymm
// VSHUFPS.BCST imm8 m32 zmm k zmm
// VSHUFPS.BCST imm8 m32 zmm zmm
func VSHUFPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPS.Forms(), sffxs{sffxBCST}, ops)
}
// VSHUFPS_BCST_Z: Shuffle Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSHUFPS.BCST.Z imm8 m32 xmm k xmm
// VSHUFPS.BCST.Z imm8 m32 ymm k ymm
// VSHUFPS.BCST.Z imm8 m32 zmm k zmm
func VSHUFPS_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
}
// VSHUFPS_Z: Shuffle Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSHUFPS.Z imm8 m128 xmm k xmm
// VSHUFPS.Z imm8 m256 ymm k ymm
// VSHUFPS.Z imm8 xmm xmm k xmm
// VSHUFPS.Z imm8 ymm ymm k ymm
// VSHUFPS.Z imm8 m512 zmm k zmm
// VSHUFPS.Z imm8 zmm zmm k zmm
func VSHUFPS_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSHUFPS.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
}
// VSQRTPD: Compute Square Roots of Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPD m128 xmm
// VSQRTPD m256 ymm
// VSQRTPD xmm xmm
// VSQRTPD ymm ymm
// VSQRTPD m128 k xmm
// VSQRTPD m256 k ymm
// VSQRTPD xmm k xmm
// VSQRTPD ymm k ymm
// VSQRTPD m512 k zmm
// VSQRTPD m512 zmm
// VSQRTPD zmm k zmm
// VSQRTPD zmm zmm
func VSQRTPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{}, ops)
}
// VSQRTPD_BCST: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPD.BCST m32 k xmm
// VSQRTPD.BCST m32 k ymm
// VSQRTPD.BCST m32 xmm
// VSQRTPD.BCST m32 ymm
// VSQRTPD.BCST m64 k zmm
// VSQRTPD.BCST m64 zmm
func VSQRTPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxBCST}, ops)
}
// VSQRTPD_BCST_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.BCST.Z m32 k xmm
// VSQRTPD.BCST.Z m32 k ymm
// VSQRTPD.BCST.Z m64 k zmm
func VSQRTPD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VSQRTPD_RD_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPD.RD_SAE zmm k zmm
// VSQRTPD.RD_SAE zmm zmm
func VSQRTPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSQRTPD_RD_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RD_SAE.Z zmm k zmm
func VSQRTPD_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPD_RN_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPD.RN_SAE zmm k zmm
// VSQRTPD.RN_SAE zmm zmm
func VSQRTPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSQRTPD_RN_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RN_SAE.Z zmm k zmm
func VSQRTPD_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPD_RU_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPD.RU_SAE zmm k zmm
// VSQRTPD.RU_SAE zmm zmm
func VSQRTPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSQRTPD_RU_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RU_SAE.Z zmm k zmm
func VSQRTPD_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPD_RZ_SAE: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPD.RZ_SAE zmm k zmm
// VSQRTPD.RZ_SAE zmm zmm
func VSQRTPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSQRTPD_RZ_SAE_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPD.RZ_SAE.Z zmm k zmm
func VSQRTPD_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPD_Z: Compute Square Roots of Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPD.Z m128 k xmm
// VSQRTPD.Z m256 k ymm
// VSQRTPD.Z xmm k xmm
// VSQRTPD.Z ymm k ymm
// VSQRTPD.Z m512 k zmm
// VSQRTPD.Z zmm k zmm
func VSQRTPD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VSQRTPS: Compute Square Roots of Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSQRTPS m128 xmm
// VSQRTPS m256 ymm
// VSQRTPS xmm xmm
// VSQRTPS ymm ymm
// VSQRTPS m128 k xmm
// VSQRTPS m256 k ymm
// VSQRTPS xmm k xmm
// VSQRTPS ymm k ymm
// VSQRTPS m512 k zmm
// VSQRTPS m512 zmm
// VSQRTPS zmm k zmm
// VSQRTPS zmm zmm
func VSQRTPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{}, ops)
}
// VSQRTPS_BCST: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSQRTPS.BCST m32 k xmm
// VSQRTPS.BCST m32 k ymm
// VSQRTPS.BCST m32 xmm
// VSQRTPS.BCST m32 ymm
// VSQRTPS.BCST m32 k zmm
// VSQRTPS.BCST m32 zmm
func VSQRTPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxBCST}, ops)
}
// VSQRTPS_BCST_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.BCST.Z m32 k xmm
// VSQRTPS.BCST.Z m32 k ymm
// VSQRTPS.BCST.Z m32 k zmm
func VSQRTPS_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
}
// VSQRTPS_RD_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTPS.RD_SAE zmm k zmm
// VSQRTPS.RD_SAE zmm zmm
func VSQRTPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSQRTPS_RD_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RD_SAE.Z zmm k zmm
func VSQRTPS_RD_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPS_RN_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSQRTPS.RN_SAE zmm k zmm
// VSQRTPS.RN_SAE zmm zmm
func VSQRTPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSQRTPS_RN_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RN_SAE.Z zmm k zmm
func VSQRTPS_RN_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPS_RU_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTPS.RU_SAE zmm k zmm
// VSQRTPS.RU_SAE zmm zmm
func VSQRTPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSQRTPS_RU_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RU_SAE.Z zmm k zmm
func VSQRTPS_RU_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPS_RZ_SAE: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSQRTPS.RZ_SAE zmm k zmm
// VSQRTPS.RZ_SAE zmm zmm
func VSQRTPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSQRTPS_RZ_SAE_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTPS.RZ_SAE.Z zmm k zmm
func VSQRTPS_RZ_SAE_Z(z, k, z1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, k, z1})
}
// VSQRTPS_Z: Compute Square Roots of Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSQRTPS.Z m128 k xmm
// VSQRTPS.Z m256 k ymm
// VSQRTPS.Z xmm k xmm
// VSQRTPS.Z ymm k ymm
// VSQRTPS.Z m512 k zmm
// VSQRTPS.Z zmm k zmm
func VSQRTPS_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
}
// VSQRTSD: Compute Square Root of Scalar Double-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSD m64 xmm xmm
// VSQRTSD xmm xmm xmm
// VSQRTSD m64 xmm k xmm
// VSQRTSD xmm xmm k xmm
func VSQRTSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{}, ops)
}
// VSQRTSD_RD_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSD.RD_SAE xmm xmm k xmm
// VSQRTSD.RD_SAE xmm xmm xmm
func VSQRTSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSQRTSD_RD_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RD_SAE.Z xmm xmm k xmm
func VSQRTSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSD_RN_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSD.RN_SAE xmm xmm k xmm
// VSQRTSD.RN_SAE xmm xmm xmm
func VSQRTSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSQRTSD_RN_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RN_SAE.Z xmm xmm k xmm
func VSQRTSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSD_RU_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSD.RU_SAE xmm xmm k xmm
// VSQRTSD.RU_SAE xmm xmm xmm
func VSQRTSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSQRTSD_RU_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RU_SAE.Z xmm xmm k xmm
func VSQRTSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSD_RZ_SAE: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSD.RZ_SAE xmm xmm k xmm
// VSQRTSD.RZ_SAE xmm xmm xmm
func VSQRTSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSQRTSD_RZ_SAE_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSD.RZ_SAE.Z xmm xmm k xmm
func VSQRTSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSD_Z: Compute Square Root of Scalar Double-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSD.Z m64 xmm k xmm
// VSQRTSD.Z xmm xmm k xmm
func VSQRTSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VSQRTSS: Compute Square Root of Scalar Single-Precision Floating-Point Value.
//
// Forms:
//
// VSQRTSS m32 xmm xmm
// VSQRTSS xmm xmm xmm
// VSQRTSS m32 xmm k xmm
// VSQRTSS xmm xmm k xmm
func VSQRTSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{}, ops)
}
// VSQRTSS_RD_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity).
//
// Forms:
//
// VSQRTSS.RD_SAE xmm xmm k xmm
// VSQRTSS.RD_SAE xmm xmm xmm
func VSQRTSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSQRTSS_RD_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RD_SAE.Z xmm xmm k xmm
func VSQRTSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSS_RN_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest).
//
// Forms:
//
// VSQRTSS.RN_SAE xmm xmm k xmm
// VSQRTSS.RN_SAE xmm xmm xmm
func VSQRTSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSQRTSS_RN_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RN_SAE.Z xmm xmm k xmm
func VSQRTSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSS_RU_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity).
//
// Forms:
//
// VSQRTSS.RU_SAE xmm xmm k xmm
// VSQRTSS.RU_SAE xmm xmm xmm
func VSQRTSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSQRTSS_RU_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RU_SAE.Z xmm xmm k xmm
func VSQRTSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSS_RZ_SAE: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero).
//
// Forms:
//
// VSQRTSS.RZ_SAE xmm xmm k xmm
// VSQRTSS.RZ_SAE xmm xmm xmm
func VSQRTSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSQRTSS_RZ_SAE_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSQRTSS.RZ_SAE.Z xmm xmm k xmm
func VSQRTSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSQRTSS_Z: Compute Square Root of Scalar Single-Precision Floating-Point Value (Zeroing Masking).
//
// Forms:
//
// VSQRTSS.Z m32 xmm k xmm
// VSQRTSS.Z xmm xmm k xmm
func VSQRTSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSQRTSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VSTMXCSR: Store MXCSR Register State.
//
// Forms:
//
// VSTMXCSR m32
func VSTMXCSR(m operand.Op) (*intrep.Instruction, error) {
return build(opcVSTMXCSR.Forms(), sffxs{}, []operand.Op{m})
}
// VSUBPD: Subtract Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPD m128 xmm xmm
// VSUBPD m256 ymm ymm
// VSUBPD xmm xmm xmm
// VSUBPD ymm ymm ymm
// VSUBPD m128 xmm k xmm
// VSUBPD m256 ymm k ymm
// VSUBPD xmm xmm k xmm
// VSUBPD ymm ymm k ymm
// VSUBPD m512 zmm k zmm
// VSUBPD m512 zmm zmm
// VSUBPD zmm zmm k zmm
// VSUBPD zmm zmm zmm
func VSUBPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{}, ops)
}
// VSUBPD_BCST: Subtract Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPD.BCST m64 xmm k xmm
// VSUBPD.BCST m64 xmm xmm
// VSUBPD.BCST m64 ymm k ymm
// VSUBPD.BCST m64 ymm ymm
// VSUBPD.BCST m64 zmm k zmm
// VSUBPD.BCST m64 zmm zmm
func VSUBPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxBCST}, ops)
}
// VSUBPD_BCST_Z: Subtract Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPD.BCST.Z m64 xmm k xmm
// VSUBPD.BCST.Z m64 ymm k ymm
// VSUBPD.BCST.Z m64 zmm k zmm
func VSUBPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VSUBPD_RD_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPD.RD_SAE zmm zmm k zmm
// VSUBPD.RD_SAE zmm zmm zmm
func VSUBPD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSUBPD_RD_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RD_SAE.Z zmm zmm k zmm
func VSUBPD_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPD_RN_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPD.RN_SAE zmm zmm k zmm
// VSUBPD.RN_SAE zmm zmm zmm
func VSUBPD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSUBPD_RN_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RN_SAE.Z zmm zmm k zmm
func VSUBPD_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPD_RU_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPD.RU_SAE zmm zmm k zmm
// VSUBPD.RU_SAE zmm zmm zmm
func VSUBPD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSUBPD_RU_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RU_SAE.Z zmm zmm k zmm
func VSUBPD_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPD_RZ_SAE: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPD.RZ_SAE zmm zmm k zmm
// VSUBPD.RZ_SAE zmm zmm zmm
func VSUBPD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSUBPD_RZ_SAE_Z: Subtract Packed Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPD.RZ_SAE.Z zmm zmm k zmm
func VSUBPD_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPD_Z: Subtract Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPD.Z m128 xmm k xmm
// VSUBPD.Z m256 ymm k ymm
// VSUBPD.Z xmm xmm k xmm
// VSUBPD.Z ymm ymm k ymm
// VSUBPD.Z m512 zmm k zmm
// VSUBPD.Z zmm zmm k zmm
func VSUBPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VSUBPS: Subtract Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBPS m128 xmm xmm
// VSUBPS m256 ymm ymm
// VSUBPS xmm xmm xmm
// VSUBPS ymm ymm ymm
// VSUBPS m128 xmm k xmm
// VSUBPS m256 ymm k ymm
// VSUBPS xmm xmm k xmm
// VSUBPS ymm ymm k ymm
// VSUBPS m512 zmm k zmm
// VSUBPS m512 zmm zmm
// VSUBPS zmm zmm k zmm
// VSUBPS zmm zmm zmm
func VSUBPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{}, ops)
}
// VSUBPS_BCST: Subtract Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VSUBPS.BCST m32 xmm k xmm
// VSUBPS.BCST m32 xmm xmm
// VSUBPS.BCST m32 ymm k ymm
// VSUBPS.BCST m32 ymm ymm
// VSUBPS.BCST m32 zmm k zmm
// VSUBPS.BCST m32 zmm zmm
func VSUBPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxBCST}, ops)
}
// VSUBPS_BCST_Z: Subtract Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VSUBPS.BCST.Z m32 xmm k xmm
// VSUBPS.BCST.Z m32 ymm k ymm
// VSUBPS.BCST.Z m32 zmm k zmm
func VSUBPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VSUBPS_RD_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBPS.RD_SAE zmm zmm k zmm
// VSUBPS.RD_SAE zmm zmm zmm
func VSUBPS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSUBPS_RD_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RD_SAE.Z zmm zmm k zmm
func VSUBPS_RD_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPS_RN_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBPS.RN_SAE zmm zmm k zmm
// VSUBPS.RN_SAE zmm zmm zmm
func VSUBPS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSUBPS_RN_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RN_SAE.Z zmm zmm k zmm
func VSUBPS_RN_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPS_RU_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBPS.RU_SAE zmm zmm k zmm
// VSUBPS.RU_SAE zmm zmm zmm
func VSUBPS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSUBPS_RU_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RU_SAE.Z zmm zmm k zmm
func VSUBPS_RU_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPS_RZ_SAE: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBPS.RZ_SAE zmm zmm k zmm
// VSUBPS.RZ_SAE zmm zmm zmm
func VSUBPS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSUBPS_RZ_SAE_Z: Subtract Packed Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBPS.RZ_SAE.Z zmm zmm k zmm
func VSUBPS_RZ_SAE_Z(z, z1, k, z2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{z, z1, k, z2})
}
// VSUBPS_Z: Subtract Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBPS.Z m128 xmm k xmm
// VSUBPS.Z m256 ymm k ymm
// VSUBPS.Z xmm xmm k xmm
// VSUBPS.Z ymm ymm k ymm
// VSUBPS.Z m512 zmm k zmm
// VSUBPS.Z zmm zmm k zmm
func VSUBPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VSUBSD: Subtract Scalar Double-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSD m64 xmm xmm
// VSUBSD xmm xmm xmm
// VSUBSD m64 xmm k xmm
// VSUBSD xmm xmm k xmm
func VSUBSD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{}, ops)
}
// VSUBSD_RD_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSD.RD_SAE xmm xmm k xmm
// VSUBSD.RD_SAE xmm xmm xmm
func VSUBSD_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSUBSD_RD_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RD_SAE.Z xmm xmm k xmm
func VSUBSD_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSD_RN_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSD.RN_SAE xmm xmm k xmm
// VSUBSD.RN_SAE xmm xmm xmm
func VSUBSD_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSUBSD_RN_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RN_SAE.Z xmm xmm k xmm
func VSUBSD_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSD_RU_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSD.RU_SAE xmm xmm k xmm
// VSUBSD.RU_SAE xmm xmm xmm
func VSUBSD_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSUBSD_RU_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RU_SAE.Z xmm xmm k xmm
func VSUBSD_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSD_RZ_SAE: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSD.RZ_SAE xmm xmm k xmm
// VSUBSD.RZ_SAE xmm xmm xmm
func VSUBSD_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSUBSD_RZ_SAE_Z: Subtract Scalar Double-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSD.RZ_SAE.Z xmm xmm k xmm
func VSUBSD_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSD_Z: Subtract Scalar Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSD.Z m64 xmm k xmm
// VSUBSD.Z xmm xmm k xmm
func VSUBSD_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSD.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VSUBSS: Subtract Scalar Single-Precision Floating-Point Values.
//
// Forms:
//
// VSUBSS m32 xmm xmm
// VSUBSS xmm xmm xmm
// VSUBSS m32 xmm k xmm
// VSUBSS xmm xmm k xmm
func VSUBSS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{}, ops)
}
// VSUBSS_RD_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity).
//
// Forms:
//
// VSUBSS.RD_SAE xmm xmm k xmm
// VSUBSS.RD_SAE xmm xmm xmm
func VSUBSS_RD_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRD_SAE}, ops)
}
// VSUBSS_RD_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Negative Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RD_SAE.Z xmm xmm k xmm
func VSUBSS_RD_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRD_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSS_RN_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest).
//
// Forms:
//
// VSUBSS.RN_SAE xmm xmm k xmm
// VSUBSS.RN_SAE xmm xmm xmm
func VSUBSS_RN_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRN_SAE}, ops)
}
// VSUBSS_RN_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Nearest, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RN_SAE.Z xmm xmm k xmm
func VSUBSS_RN_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRN_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSS_RU_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity).
//
// Forms:
//
// VSUBSS.RU_SAE xmm xmm k xmm
// VSUBSS.RU_SAE xmm xmm xmm
func VSUBSS_RU_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRU_SAE}, ops)
}
// VSUBSS_RU_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Positive Infinity, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RU_SAE.Z xmm xmm k xmm
func VSUBSS_RU_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRU_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSS_RZ_SAE: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero).
//
// Forms:
//
// VSUBSS.RZ_SAE xmm xmm k xmm
// VSUBSS.RZ_SAE xmm xmm xmm
func VSUBSS_RZ_SAE(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRZ_SAE}, ops)
}
// VSUBSS_RZ_SAE_Z: Subtract Scalar Single-Precision Floating-Point Values (Round Towards Zero, Zeroing Masking).
//
// Forms:
//
// VSUBSS.RZ_SAE.Z xmm xmm k xmm
func VSUBSS_RZ_SAE_Z(x, x1, k, x2 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxRZ_SAE, sffxZ}, []operand.Op{x, x1, k, x2})
}
// VSUBSS_Z: Subtract Scalar Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VSUBSS.Z m32 xmm k xmm
// VSUBSS.Z xmm xmm k xmm
func VSUBSS_Z(mx, x, k, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVSUBSS.Forms(), sffxs{sffxZ}, []operand.Op{mx, x, k, x1})
}
// VTESTPD: Packed Double-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPD m128 xmm
// VTESTPD m256 ymm
// VTESTPD xmm xmm
// VTESTPD ymm ymm
func VTESTPD(mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVTESTPD.Forms(), sffxs{}, []operand.Op{mxy, xy})
}
// VTESTPS: Packed Single-Precision Floating-Point Bit Test.
//
// Forms:
//
// VTESTPS m128 xmm
// VTESTPS m256 ymm
// VTESTPS xmm xmm
// VTESTPS ymm ymm
func VTESTPS(mxy, xy operand.Op) (*intrep.Instruction, error) {
return build(opcVTESTPS.Forms(), sffxs{}, []operand.Op{mxy, xy})
}
// VUCOMISD: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISD m64 xmm
// VUCOMISD xmm xmm
func VUCOMISD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVUCOMISD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VUCOMISD_SAE: Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISD.SAE xmm xmm
func VUCOMISD_SAE(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUCOMISD.Forms(), sffxs{sffxSAE}, []operand.Op{x, x1})
}
// VUCOMISS: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS.
//
// Forms:
//
// VUCOMISS m32 xmm
// VUCOMISS xmm xmm
func VUCOMISS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcVUCOMISS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// VUCOMISS_SAE: Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS (Suppress All Exceptions).
//
// Forms:
//
// VUCOMISS.SAE xmm xmm
func VUCOMISS_SAE(x, x1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUCOMISS.Forms(), sffxs{sffxSAE}, []operand.Op{x, x1})
}
// VUNPCKHPD: Unpack and Interleave High Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPD m128 xmm xmm
// VUNPCKHPD m256 ymm ymm
// VUNPCKHPD xmm xmm xmm
// VUNPCKHPD ymm ymm ymm
// VUNPCKHPD m128 xmm k xmm
// VUNPCKHPD m256 ymm k ymm
// VUNPCKHPD xmm xmm k xmm
// VUNPCKHPD ymm ymm k ymm
// VUNPCKHPD m512 zmm k zmm
// VUNPCKHPD m512 zmm zmm
// VUNPCKHPD zmm zmm k zmm
// VUNPCKHPD zmm zmm zmm
func VUNPCKHPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPD.Forms(), sffxs{}, ops)
}
// VUNPCKHPD_BCST: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPD.BCST m64 xmm k xmm
// VUNPCKHPD.BCST m64 xmm xmm
// VUNPCKHPD.BCST m64 ymm k ymm
// VUNPCKHPD.BCST m64 ymm ymm
// VUNPCKHPD.BCST m64 zmm k zmm
// VUNPCKHPD.BCST m64 zmm zmm
func VUNPCKHPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPD.Forms(), sffxs{sffxBCST}, ops)
}
// VUNPCKHPD_BCST_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.BCST.Z m64 xmm k xmm
// VUNPCKHPD.BCST.Z m64 ymm k ymm
// VUNPCKHPD.BCST.Z m64 zmm k zmm
func VUNPCKHPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VUNPCKHPD_Z: Unpack and Interleave High Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPD.Z m128 xmm k xmm
// VUNPCKHPD.Z m256 ymm k ymm
// VUNPCKHPD.Z xmm xmm k xmm
// VUNPCKHPD.Z ymm ymm k ymm
// VUNPCKHPD.Z m512 zmm k zmm
// VUNPCKHPD.Z zmm zmm k zmm
func VUNPCKHPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VUNPCKHPS: Unpack and Interleave High Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKHPS m128 xmm xmm
// VUNPCKHPS m256 ymm ymm
// VUNPCKHPS xmm xmm xmm
// VUNPCKHPS ymm ymm ymm
// VUNPCKHPS m128 xmm k xmm
// VUNPCKHPS m256 ymm k ymm
// VUNPCKHPS xmm xmm k xmm
// VUNPCKHPS ymm ymm k ymm
// VUNPCKHPS m512 zmm k zmm
// VUNPCKHPS m512 zmm zmm
// VUNPCKHPS zmm zmm k zmm
// VUNPCKHPS zmm zmm zmm
func VUNPCKHPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPS.Forms(), sffxs{}, ops)
}
// VUNPCKHPS_BCST: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKHPS.BCST m32 xmm k xmm
// VUNPCKHPS.BCST m32 xmm xmm
// VUNPCKHPS.BCST m32 ymm k ymm
// VUNPCKHPS.BCST m32 ymm ymm
// VUNPCKHPS.BCST m32 zmm k zmm
// VUNPCKHPS.BCST m32 zmm zmm
func VUNPCKHPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPS.Forms(), sffxs{sffxBCST}, ops)
}
// VUNPCKHPS_BCST_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.BCST.Z m32 xmm k xmm
// VUNPCKHPS.BCST.Z m32 ymm k ymm
// VUNPCKHPS.BCST.Z m32 zmm k zmm
func VUNPCKHPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VUNPCKHPS_Z: Unpack and Interleave High Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKHPS.Z m128 xmm k xmm
// VUNPCKHPS.Z m256 ymm k ymm
// VUNPCKHPS.Z xmm xmm k xmm
// VUNPCKHPS.Z ymm ymm k ymm
// VUNPCKHPS.Z m512 zmm k zmm
// VUNPCKHPS.Z zmm zmm k zmm
func VUNPCKHPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKHPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VUNPCKLPD: Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPD m128 xmm xmm
// VUNPCKLPD m256 ymm ymm
// VUNPCKLPD xmm xmm xmm
// VUNPCKLPD ymm ymm ymm
// VUNPCKLPD m128 xmm k xmm
// VUNPCKLPD m256 ymm k ymm
// VUNPCKLPD xmm xmm k xmm
// VUNPCKLPD ymm ymm k ymm
// VUNPCKLPD m512 zmm k zmm
// VUNPCKLPD m512 zmm zmm
// VUNPCKLPD zmm zmm k zmm
// VUNPCKLPD zmm zmm zmm
func VUNPCKLPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPD.Forms(), sffxs{}, ops)
}
// VUNPCKLPD_BCST: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPD.BCST m64 xmm k xmm
// VUNPCKLPD.BCST m64 xmm xmm
// VUNPCKLPD.BCST m64 ymm k ymm
// VUNPCKLPD.BCST m64 ymm ymm
// VUNPCKLPD.BCST m64 zmm k zmm
// VUNPCKLPD.BCST m64 zmm zmm
func VUNPCKLPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPD.Forms(), sffxs{sffxBCST}, ops)
}
// VUNPCKLPD_BCST_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.BCST.Z m64 xmm k xmm
// VUNPCKLPD.BCST.Z m64 ymm k ymm
// VUNPCKLPD.BCST.Z m64 zmm k zmm
func VUNPCKLPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VUNPCKLPD_Z: Unpack and Interleave Low Packed Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPD.Z m128 xmm k xmm
// VUNPCKLPD.Z m256 ymm k ymm
// VUNPCKLPD.Z xmm xmm k xmm
// VUNPCKLPD.Z ymm ymm k ymm
// VUNPCKLPD.Z m512 zmm k zmm
// VUNPCKLPD.Z zmm zmm k zmm
func VUNPCKLPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VUNPCKLPS: Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
//
// Forms:
//
// VUNPCKLPS m128 xmm xmm
// VUNPCKLPS m256 ymm ymm
// VUNPCKLPS xmm xmm xmm
// VUNPCKLPS ymm ymm ymm
// VUNPCKLPS m128 xmm k xmm
// VUNPCKLPS m256 ymm k ymm
// VUNPCKLPS xmm xmm k xmm
// VUNPCKLPS ymm ymm k ymm
// VUNPCKLPS m512 zmm k zmm
// VUNPCKLPS m512 zmm zmm
// VUNPCKLPS zmm zmm k zmm
// VUNPCKLPS zmm zmm zmm
func VUNPCKLPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPS.Forms(), sffxs{}, ops)
}
// VUNPCKLPS_BCST: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VUNPCKLPS.BCST m32 xmm k xmm
// VUNPCKLPS.BCST m32 xmm xmm
// VUNPCKLPS.BCST m32 ymm k ymm
// VUNPCKLPS.BCST m32 ymm ymm
// VUNPCKLPS.BCST m32 zmm k zmm
// VUNPCKLPS.BCST m32 zmm zmm
func VUNPCKLPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPS.Forms(), sffxs{sffxBCST}, ops)
}
// VUNPCKLPS_BCST_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.BCST.Z m32 xmm k xmm
// VUNPCKLPS.BCST.Z m32 ymm k ymm
// VUNPCKLPS.BCST.Z m32 zmm k zmm
func VUNPCKLPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VUNPCKLPS_Z: Unpack and Interleave Low Packed Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VUNPCKLPS.Z m128 xmm k xmm
// VUNPCKLPS.Z m256 ymm k ymm
// VUNPCKLPS.Z xmm xmm k xmm
// VUNPCKLPS.Z ymm ymm k ymm
// VUNPCKLPS.Z m512 zmm k zmm
// VUNPCKLPS.Z zmm zmm k zmm
func VUNPCKLPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVUNPCKLPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VXORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// VXORPD m128 xmm xmm
// VXORPD m256 ymm ymm
// VXORPD xmm xmm xmm
// VXORPD ymm ymm ymm
// VXORPD m128 xmm k xmm
// VXORPD m256 ymm k ymm
// VXORPD xmm xmm k xmm
// VXORPD ymm ymm k ymm
// VXORPD m512 zmm k zmm
// VXORPD m512 zmm zmm
// VXORPD zmm zmm k zmm
// VXORPD zmm zmm zmm
func VXORPD(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPD.Forms(), sffxs{}, ops)
}
// VXORPD_BCST: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPD.BCST m64 xmm k xmm
// VXORPD.BCST m64 xmm xmm
// VXORPD.BCST m64 ymm k ymm
// VXORPD.BCST m64 ymm ymm
// VXORPD.BCST m64 zmm k zmm
// VXORPD.BCST m64 zmm zmm
func VXORPD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPD.Forms(), sffxs{sffxBCST}, ops)
}
// VXORPD_BCST_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPD.BCST.Z m64 xmm k xmm
// VXORPD.BCST.Z m64 ymm k ymm
// VXORPD.BCST.Z m64 zmm k zmm
func VXORPD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VXORPD_Z: Bitwise Logical XOR for Double-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPD.Z m128 xmm k xmm
// VXORPD.Z m256 ymm k ymm
// VXORPD.Z xmm xmm k xmm
// VXORPD.Z ymm ymm k ymm
// VXORPD.Z m512 zmm k zmm
// VXORPD.Z zmm zmm k zmm
func VXORPD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VXORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// VXORPS m128 xmm xmm
// VXORPS m256 ymm ymm
// VXORPS xmm xmm xmm
// VXORPS ymm ymm ymm
// VXORPS m128 xmm k xmm
// VXORPS m256 ymm k ymm
// VXORPS xmm xmm k xmm
// VXORPS ymm ymm k ymm
// VXORPS m512 zmm k zmm
// VXORPS m512 zmm zmm
// VXORPS zmm zmm k zmm
// VXORPS zmm zmm zmm
func VXORPS(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPS.Forms(), sffxs{}, ops)
}
// VXORPS_BCST: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast).
//
// Forms:
//
// VXORPS.BCST m32 xmm k xmm
// VXORPS.BCST m32 xmm xmm
// VXORPS.BCST m32 ymm k ymm
// VXORPS.BCST m32 ymm ymm
// VXORPS.BCST m32 zmm k zmm
// VXORPS.BCST m32 zmm zmm
func VXORPS_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPS.Forms(), sffxs{sffxBCST}, ops)
}
// VXORPS_BCST_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Broadcast, Zeroing Masking).
//
// Forms:
//
// VXORPS.BCST.Z m32 xmm k xmm
// VXORPS.BCST.Z m32 ymm k ymm
// VXORPS.BCST.Z m32 zmm k zmm
func VXORPS_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPS.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
}
// VXORPS_Z: Bitwise Logical XOR for Single-Precision Floating-Point Values (Zeroing Masking).
//
// Forms:
//
// VXORPS.Z m128 xmm k xmm
// VXORPS.Z m256 ymm k ymm
// VXORPS.Z xmm xmm k xmm
// VXORPS.Z ymm ymm k ymm
// VXORPS.Z m512 zmm k zmm
// VXORPS.Z zmm zmm k zmm
func VXORPS_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
return build(opcVXORPS.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
}
// VZEROALL: Zero All YMM Registers.
//
// Forms:
//
// VZEROALL
func VZEROALL() (*intrep.Instruction, error) {
return build(opcVZEROALL.Forms(), sffxs{}, []operand.Op{})
}
// VZEROUPPER: Zero Upper Bits of YMM Registers.
//
// Forms:
//
// VZEROUPPER
func VZEROUPPER() (*intrep.Instruction, error) {
return build(opcVZEROUPPER.Forms(), sffxs{}, []operand.Op{})
}
// XADDB: Exchange and Add.
//
// Forms:
//
// XADDB r8 m8
// XADDB r8 r8
func XADDB(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcXADDB.Forms(), sffxs{}, []operand.Op{r, mr})
}
// XADDL: Exchange and Add.
//
// Forms:
//
// XADDL r32 m32
// XADDL r32 r32
func XADDL(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcXADDL.Forms(), sffxs{}, []operand.Op{r, mr})
}
// XADDQ: Exchange and Add.
//
// Forms:
//
// XADDQ r64 m64
// XADDQ r64 r64
func XADDQ(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcXADDQ.Forms(), sffxs{}, []operand.Op{r, mr})
}
// XADDW: Exchange and Add.
//
// Forms:
//
// XADDW r16 m16
// XADDW r16 r16
func XADDW(r, mr operand.Op) (*intrep.Instruction, error) {
return build(opcXADDW.Forms(), sffxs{}, []operand.Op{r, mr})
}
// XCHGB: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGB m8 r8
// XCHGB r8 m8
// XCHGB r8 r8
func XCHGB(mr, mr1 operand.Op) (*intrep.Instruction, error) {
return build(opcXCHGB.Forms(), sffxs{}, []operand.Op{mr, mr1})
}
// XCHGL: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGL eax r32
// XCHGL m32 r32
// XCHGL r32 eax
// XCHGL r32 m32
// XCHGL r32 r32
func XCHGL(emr, emr1 operand.Op) (*intrep.Instruction, error) {
return build(opcXCHGL.Forms(), sffxs{}, []operand.Op{emr, emr1})
}
// XCHGQ: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGQ m64 r64
// XCHGQ r64 m64
// XCHGQ r64 r64
// XCHGQ r64 rax
// XCHGQ rax r64
func XCHGQ(mr, mr1 operand.Op) (*intrep.Instruction, error) {
return build(opcXCHGQ.Forms(), sffxs{}, []operand.Op{mr, mr1})
}
// XCHGW: Exchange Register/Memory with Register.
//
// Forms:
//
// XCHGW ax r16
// XCHGW m16 r16
// XCHGW r16 ax
// XCHGW r16 m16
// XCHGW r16 r16
func XCHGW(amr, amr1 operand.Op) (*intrep.Instruction, error) {
return build(opcXCHGW.Forms(), sffxs{}, []operand.Op{amr, amr1})
}
// XGETBV: Get Value of Extended Control Register.
//
// Forms:
//
// XGETBV
func XGETBV() (*intrep.Instruction, error) {
return build(opcXGETBV.Forms(), sffxs{}, []operand.Op{})
}
// XLAT: Table Look-up Translation.
//
// Forms:
//
// XLAT
func XLAT() (*intrep.Instruction, error) {
return build(opcXLAT.Forms(), sffxs{}, []operand.Op{})
}
// XORB: Logical Exclusive OR.
//
// Forms:
//
// XORB imm8 al
// XORB imm8 m8
// XORB imm8 r8
// XORB m8 r8
// XORB r8 m8
// XORB r8 r8
func XORB(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcXORB.Forms(), sffxs{}, []operand.Op{imr, amr})
}
// XORL: Logical Exclusive OR.
//
// Forms:
//
// XORL imm32 eax
// XORL imm32 m32
// XORL imm32 r32
// XORL imm8 m32
// XORL imm8 r32
// XORL m32 r32
// XORL r32 m32
// XORL r32 r32
func XORL(imr, emr operand.Op) (*intrep.Instruction, error) {
return build(opcXORL.Forms(), sffxs{}, []operand.Op{imr, emr})
}
// XORPD: Bitwise Logical XOR for Double-Precision Floating-Point Values.
//
// Forms:
//
// XORPD m128 xmm
// XORPD xmm xmm
func XORPD(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcXORPD.Forms(), sffxs{}, []operand.Op{mx, x})
}
// XORPS: Bitwise Logical XOR for Single-Precision Floating-Point Values.
//
// Forms:
//
// XORPS m128 xmm
// XORPS xmm xmm
func XORPS(mx, x operand.Op) (*intrep.Instruction, error) {
return build(opcXORPS.Forms(), sffxs{}, []operand.Op{mx, x})
}
// XORQ: Logical Exclusive OR.
//
// Forms:
//
// XORQ imm32 m64
// XORQ imm32 r64
// XORQ imm32 rax
// XORQ imm8 m64
// XORQ imm8 r64
// XORQ m64 r64
// XORQ r64 m64
// XORQ r64 r64
func XORQ(imr, mr operand.Op) (*intrep.Instruction, error) {
return build(opcXORQ.Forms(), sffxs{}, []operand.Op{imr, mr})
}
// XORW: Logical Exclusive OR.
//
// Forms:
//
// XORW imm16 ax
// XORW imm16 m16
// XORW imm16 r16
// XORW imm8 m16
// XORW imm8 r16
// XORW m16 r16
// XORW r16 m16
// XORW r16 r16
func XORW(imr, amr operand.Op) (*intrep.Instruction, error) {
return build(opcXORW.Forms(), sffxs{}, []operand.Op{imr, amr})
}
golang-github-mmcloughlin-avo-0.5.0/x86/zctors_test.go 0000664 0000000 0000000 00004333442 14370657153 0022731 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zctors_test.go ctorstest. DO NOT EDIT.
//go:build !integration
// +build !integration
package x86
import (
"math"
"testing"
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
var (
op1 operand.Op = operand.Imm(1)
op3 operand.Op = operand.Imm(3)
opimm2u operand.Op = operand.Imm(3)
opimm8 operand.Op = operand.Imm(math.MaxInt8)
opimm16 operand.Op = operand.Imm(math.MaxInt16)
opimm32 operand.Op = operand.Imm(math.MaxInt32)
opimm64 operand.Op = operand.Imm(math.MaxInt64)
opal operand.Op = reg.AL
opcl operand.Op = reg.CL
opax operand.Op = reg.AX
opeax operand.Op = reg.EAX
oprax operand.Op = reg.RAX
opr8 operand.Op = reg.CH
opr16 operand.Op = reg.R9W
opr32 operand.Op = reg.R10L
opr64 operand.Op = reg.R11
opxmm0 operand.Op = reg.X0
opxmm operand.Op = reg.X7
opymm operand.Op = reg.Y15
opzmm operand.Op = reg.Z31
opk operand.Op = reg.K7
opm operand.Op = operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}
opm8 operand.Op = operand.Mem{Base: reg.BL, Index: reg.CH, Scale: 1}
opm16 operand.Op = operand.Mem{Base: reg.BX, Index: reg.CX, Scale: 2}
opm32 operand.Op = operand.Mem{Base: reg.EBX, Index: reg.ECX, Scale: 4}
opm64 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm128 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm256 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opm512 operand.Op = operand.Mem{Base: reg.RBX, Index: reg.RCX, Scale: 8}
opvm32x operand.Op = operand.Mem{Base: reg.R13, Index: reg.X4, Scale: 1}
opvm64x operand.Op = operand.Mem{Base: reg.R13, Index: reg.X8, Scale: 1}
opvm32y operand.Op = operand.Mem{Base: reg.R13, Index: reg.Y4, Scale: 1}
opvm64y operand.Op = operand.Mem{Base: reg.R13, Index: reg.Y8, Scale: 1}
opvm32z operand.Op = operand.Mem{Base: reg.R13, Index: reg.Z4, Scale: 1}
opvm64z operand.Op = operand.Mem{Base: reg.R13, Index: reg.Z8, Scale: 1}
oprel8 operand.Op = operand.Rel(math.MaxInt8)
oprel32 operand.Op = operand.LabelRef("lbl")
)
func TestADCBValidFormsNoError(t *testing.T) {
if _, err := ADCB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := ADCB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ADCB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ADCB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ADCB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ADCB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestADCLValidFormsNoError(t *testing.T) {
if _, err := ADCL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADCL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestADCQValidFormsNoError(t *testing.T) {
if _, err := ADCQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADCQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestADCWValidFormsNoError(t *testing.T) {
if _, err := ADCW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADCW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestADCXLValidFormsNoError(t *testing.T) {
if _, err := ADCXL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADCXL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestADCXQValidFormsNoError(t *testing.T) {
if _, err := ADCXQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADCXQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestADDBValidFormsNoError(t *testing.T) {
if _, err := ADDB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := ADDB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ADDB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ADDB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ADDB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ADDB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestADDLValidFormsNoError(t *testing.T) {
if _, err := ADDL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ADDL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestADDPDValidFormsNoError(t *testing.T) {
if _, err := ADDPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDPSValidFormsNoError(t *testing.T) {
if _, err := ADDPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDQValidFormsNoError(t *testing.T) {
if _, err := ADDQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := ADDQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestADDSDValidFormsNoError(t *testing.T) {
if _, err := ADDSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDSSValidFormsNoError(t *testing.T) {
if _, err := ADDSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDSUBPDValidFormsNoError(t *testing.T) {
if _, err := ADDSUBPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDSUBPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDSUBPSValidFormsNoError(t *testing.T) {
if _, err := ADDSUBPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ADDSUBPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestADDWValidFormsNoError(t *testing.T) {
if _, err := ADDW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ADDW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestADOXLValidFormsNoError(t *testing.T) {
if _, err := ADOXL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ADOXL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestADOXQValidFormsNoError(t *testing.T) {
if _, err := ADOXQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ADOXQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestAESDECValidFormsNoError(t *testing.T) {
if _, err := AESDEC(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESDEC(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestAESDECLASTValidFormsNoError(t *testing.T) {
if _, err := AESDECLAST(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESDECLAST(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestAESENCValidFormsNoError(t *testing.T) {
if _, err := AESENC(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESENC(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestAESENCLASTValidFormsNoError(t *testing.T) {
if _, err := AESENCLAST(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESENCLAST(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestAESIMCValidFormsNoError(t *testing.T) {
if _, err := AESIMC(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESIMC(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestAESKEYGENASSISTValidFormsNoError(t *testing.T) {
if _, err := AESKEYGENASSIST(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := AESKEYGENASSIST(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestANDBValidFormsNoError(t *testing.T) {
if _, err := ANDB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := ANDB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ANDB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ANDB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ANDB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ANDB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestANDLValidFormsNoError(t *testing.T) {
if _, err := ANDL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ANDL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestANDNLValidFormsNoError(t *testing.T) {
if _, err := ANDNL(opm32, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ANDNL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestANDNPDValidFormsNoError(t *testing.T) {
if _, err := ANDNPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ANDNPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestANDNPSValidFormsNoError(t *testing.T) {
if _, err := ANDNPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ANDNPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestANDNQValidFormsNoError(t *testing.T) {
if _, err := ANDNQ(opm64, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ANDNQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestANDPDValidFormsNoError(t *testing.T) {
if _, err := ANDPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ANDPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestANDPSValidFormsNoError(t *testing.T) {
if _, err := ANDPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ANDPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestANDQValidFormsNoError(t *testing.T) {
if _, err := ANDQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := ANDQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestANDWValidFormsNoError(t *testing.T) {
if _, err := ANDW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ANDW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBEXTRLValidFormsNoError(t *testing.T) {
if _, err := BEXTRL(opr32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BEXTRL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBEXTRQValidFormsNoError(t *testing.T) {
if _, err := BEXTRQ(opr64, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BEXTRQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBLENDPDValidFormsNoError(t *testing.T) {
if _, err := BLENDPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := BLENDPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestBLENDPSValidFormsNoError(t *testing.T) {
if _, err := BLENDPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := BLENDPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestBLENDVPDValidFormsNoError(t *testing.T) {
if _, err := BLENDVPD(opxmm0, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := BLENDVPD(opxmm0, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestBLENDVPSValidFormsNoError(t *testing.T) {
if _, err := BLENDVPS(opxmm0, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := BLENDVPS(opxmm0, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestBLSILValidFormsNoError(t *testing.T) {
if _, err := BLSIL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BLSIL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBLSIQValidFormsNoError(t *testing.T) {
if _, err := BLSIQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BLSIQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBLSMSKLValidFormsNoError(t *testing.T) {
if _, err := BLSMSKL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BLSMSKL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBLSMSKQValidFormsNoError(t *testing.T) {
if _, err := BLSMSKQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BLSMSKQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBLSRLValidFormsNoError(t *testing.T) {
if _, err := BLSRL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BLSRL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBLSRQValidFormsNoError(t *testing.T) {
if _, err := BLSRQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BLSRQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBSFLValidFormsNoError(t *testing.T) {
if _, err := BSFL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BSFL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBSFQValidFormsNoError(t *testing.T) {
if _, err := BSFQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BSFQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBSFWValidFormsNoError(t *testing.T) {
if _, err := BSFW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := BSFW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBSRLValidFormsNoError(t *testing.T) {
if _, err := BSRL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BSRL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBSRQValidFormsNoError(t *testing.T) {
if _, err := BSRQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BSRQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBSRWValidFormsNoError(t *testing.T) {
if _, err := BSRW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := BSRW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBSWAPLValidFormsNoError(t *testing.T) {
if _, err := BSWAPL(opr32); err != nil {
t.Fatal(err)
}
}
func TestBSWAPQValidFormsNoError(t *testing.T) {
if _, err := BSWAPQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestBTCLValidFormsNoError(t *testing.T) {
if _, err := BTCL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTCL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := BTCL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTCL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBTCQValidFormsNoError(t *testing.T) {
if _, err := BTCQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTCQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := BTCQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTCQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBTCWValidFormsNoError(t *testing.T) {
if _, err := BTCW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTCW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := BTCW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTCW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBTLValidFormsNoError(t *testing.T) {
if _, err := BTL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := BTL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBTQValidFormsNoError(t *testing.T) {
if _, err := BTQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := BTQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBTRLValidFormsNoError(t *testing.T) {
if _, err := BTRL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTRL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := BTRL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTRL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBTRQValidFormsNoError(t *testing.T) {
if _, err := BTRQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTRQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := BTRQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTRQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBTRWValidFormsNoError(t *testing.T) {
if _, err := BTRW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTRW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := BTRW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTRW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBTSLValidFormsNoError(t *testing.T) {
if _, err := BTSL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTSL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := BTSL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := BTSL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBTSQValidFormsNoError(t *testing.T) {
if _, err := BTSQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTSQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := BTSQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := BTSQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestBTSWValidFormsNoError(t *testing.T) {
if _, err := BTSW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTSW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := BTSW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTSW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBTWValidFormsNoError(t *testing.T) {
if _, err := BTW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := BTW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := BTW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestBZHILValidFormsNoError(t *testing.T) {
if _, err := BZHIL(opr32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := BZHIL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestBZHIQValidFormsNoError(t *testing.T) {
if _, err := BZHIQ(opr64, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := BZHIQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCALLValidFormsNoError(t *testing.T) {
if _, err := CALL(oprel32); err != nil {
t.Fatal(err)
}
}
func TestCBWValidFormsNoError(t *testing.T) {
if _, err := CBW(); err != nil {
t.Fatal(err)
}
}
func TestCDQValidFormsNoError(t *testing.T) {
if _, err := CDQ(); err != nil {
t.Fatal(err)
}
}
func TestCDQEValidFormsNoError(t *testing.T) {
if _, err := CDQE(); err != nil {
t.Fatal(err)
}
}
func TestCLCValidFormsNoError(t *testing.T) {
if _, err := CLC(); err != nil {
t.Fatal(err)
}
}
func TestCLDValidFormsNoError(t *testing.T) {
if _, err := CLD(); err != nil {
t.Fatal(err)
}
}
func TestCLFLUSHValidFormsNoError(t *testing.T) {
if _, err := CLFLUSH(opm8); err != nil {
t.Fatal(err)
}
}
func TestCLFLUSHOPTValidFormsNoError(t *testing.T) {
if _, err := CLFLUSHOPT(opm8); err != nil {
t.Fatal(err)
}
}
func TestCMCValidFormsNoError(t *testing.T) {
if _, err := CMC(); err != nil {
t.Fatal(err)
}
}
func TestCMOVLCCValidFormsNoError(t *testing.T) {
if _, err := CMOVLCC(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLCC(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLCSValidFormsNoError(t *testing.T) {
if _, err := CMOVLCS(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLCS(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLEQValidFormsNoError(t *testing.T) {
if _, err := CMOVLEQ(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLEQ(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLGEValidFormsNoError(t *testing.T) {
if _, err := CMOVLGE(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLGE(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLGTValidFormsNoError(t *testing.T) {
if _, err := CMOVLGT(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLGT(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLHIValidFormsNoError(t *testing.T) {
if _, err := CMOVLHI(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLHI(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLLEValidFormsNoError(t *testing.T) {
if _, err := CMOVLLE(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLLE(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLLSValidFormsNoError(t *testing.T) {
if _, err := CMOVLLS(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLLS(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLLTValidFormsNoError(t *testing.T) {
if _, err := CMOVLLT(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLLT(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLMIValidFormsNoError(t *testing.T) {
if _, err := CMOVLMI(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLMI(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLNEValidFormsNoError(t *testing.T) {
if _, err := CMOVLNE(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLNE(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLOCValidFormsNoError(t *testing.T) {
if _, err := CMOVLOC(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLOC(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLOSValidFormsNoError(t *testing.T) {
if _, err := CMOVLOS(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLOS(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLPCValidFormsNoError(t *testing.T) {
if _, err := CMOVLPC(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLPC(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLPLValidFormsNoError(t *testing.T) {
if _, err := CMOVLPL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLPL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVLPSValidFormsNoError(t *testing.T) {
if _, err := CMOVLPS(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMOVLPS(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMOVQCCValidFormsNoError(t *testing.T) {
if _, err := CMOVQCC(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQCC(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQCSValidFormsNoError(t *testing.T) {
if _, err := CMOVQCS(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQCS(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQEQValidFormsNoError(t *testing.T) {
if _, err := CMOVQEQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQEQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQGEValidFormsNoError(t *testing.T) {
if _, err := CMOVQGE(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQGE(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQGTValidFormsNoError(t *testing.T) {
if _, err := CMOVQGT(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQGT(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQHIValidFormsNoError(t *testing.T) {
if _, err := CMOVQHI(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQHI(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQLEValidFormsNoError(t *testing.T) {
if _, err := CMOVQLE(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQLE(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQLSValidFormsNoError(t *testing.T) {
if _, err := CMOVQLS(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQLS(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQLTValidFormsNoError(t *testing.T) {
if _, err := CMOVQLT(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQLT(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQMIValidFormsNoError(t *testing.T) {
if _, err := CMOVQMI(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQMI(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQNEValidFormsNoError(t *testing.T) {
if _, err := CMOVQNE(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQNE(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQOCValidFormsNoError(t *testing.T) {
if _, err := CMOVQOC(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQOC(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQOSValidFormsNoError(t *testing.T) {
if _, err := CMOVQOS(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQOS(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQPCValidFormsNoError(t *testing.T) {
if _, err := CMOVQPC(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQPC(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQPLValidFormsNoError(t *testing.T) {
if _, err := CMOVQPL(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQPL(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVQPSValidFormsNoError(t *testing.T) {
if _, err := CMOVQPS(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMOVQPS(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMOVWCCValidFormsNoError(t *testing.T) {
if _, err := CMOVWCC(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWCC(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWCSValidFormsNoError(t *testing.T) {
if _, err := CMOVWCS(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWCS(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWEQValidFormsNoError(t *testing.T) {
if _, err := CMOVWEQ(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWEQ(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWGEValidFormsNoError(t *testing.T) {
if _, err := CMOVWGE(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWGE(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWGTValidFormsNoError(t *testing.T) {
if _, err := CMOVWGT(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWGT(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWHIValidFormsNoError(t *testing.T) {
if _, err := CMOVWHI(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWHI(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWLEValidFormsNoError(t *testing.T) {
if _, err := CMOVWLE(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWLE(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWLSValidFormsNoError(t *testing.T) {
if _, err := CMOVWLS(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWLS(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWLTValidFormsNoError(t *testing.T) {
if _, err := CMOVWLT(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWLT(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWMIValidFormsNoError(t *testing.T) {
if _, err := CMOVWMI(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWMI(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWNEValidFormsNoError(t *testing.T) {
if _, err := CMOVWNE(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWNE(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWOCValidFormsNoError(t *testing.T) {
if _, err := CMOVWOC(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWOC(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWOSValidFormsNoError(t *testing.T) {
if _, err := CMOVWOS(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWOS(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWPCValidFormsNoError(t *testing.T) {
if _, err := CMOVWPC(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWPC(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWPLValidFormsNoError(t *testing.T) {
if _, err := CMOVWPL(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWPL(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMOVWPSValidFormsNoError(t *testing.T) {
if _, err := CMOVWPS(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMOVWPS(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMPBValidFormsNoError(t *testing.T) {
if _, err := CMPB(opal, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPB(opm8, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := CMPB(opr8, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := CMPB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestCMPLValidFormsNoError(t *testing.T) {
if _, err := CMPL(opeax, opimm32); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opm32, opimm32); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opm32, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opr32, opimm32); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opr32, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := CMPL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMPPDValidFormsNoError(t *testing.T) {
if _, err := CMPPD(opm128, opxmm, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPPD(opxmm, opxmm, opimm8); err != nil {
t.Fatal(err)
}
}
func TestCMPPSValidFormsNoError(t *testing.T) {
if _, err := CMPPS(opm128, opxmm, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPPS(opxmm, opxmm, opimm8); err != nil {
t.Fatal(err)
}
}
func TestCMPQValidFormsNoError(t *testing.T) {
if _, err := CMPQ(opm64, opimm32); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opm64, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opr64, opimm32); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opr64, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CMPQ(oprax, opimm32); err != nil {
t.Fatal(err)
}
}
func TestCMPSDValidFormsNoError(t *testing.T) {
if _, err := CMPSD(opm64, opxmm, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPSD(opxmm, opxmm, opimm8); err != nil {
t.Fatal(err)
}
}
func TestCMPSSValidFormsNoError(t *testing.T) {
if _, err := CMPSS(opm32, opxmm, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPSS(opxmm, opxmm, opimm8); err != nil {
t.Fatal(err)
}
}
func TestCMPWValidFormsNoError(t *testing.T) {
if _, err := CMPW(opax, opimm16); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opm16, opimm16); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opm16, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opr16, opimm16); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opr16, opimm8); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := CMPW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHG16BValidFormsNoError(t *testing.T) {
if _, err := CMPXCHG16B(opm128); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHG8BValidFormsNoError(t *testing.T) {
if _, err := CMPXCHG8B(opm64); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHGBValidFormsNoError(t *testing.T) {
if _, err := CMPXCHGB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := CMPXCHGB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHGLValidFormsNoError(t *testing.T) {
if _, err := CMPXCHGL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := CMPXCHGL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHGQValidFormsNoError(t *testing.T) {
if _, err := CMPXCHGQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := CMPXCHGQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCMPXCHGWValidFormsNoError(t *testing.T) {
if _, err := CMPXCHGW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := CMPXCHGW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestCOMISDValidFormsNoError(t *testing.T) {
if _, err := COMISD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := COMISD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCOMISSValidFormsNoError(t *testing.T) {
if _, err := COMISS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := COMISS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCPUIDValidFormsNoError(t *testing.T) {
if _, err := CPUID(); err != nil {
t.Fatal(err)
}
}
func TestCQOValidFormsNoError(t *testing.T) {
if _, err := CQO(); err != nil {
t.Fatal(err)
}
}
func TestCRC32BValidFormsNoError(t *testing.T) {
if _, err := CRC32B(opm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := CRC32B(opm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := CRC32B(opr8, opr32); err != nil {
t.Fatal(err)
}
if _, err := CRC32B(opr8, opr64); err != nil {
t.Fatal(err)
}
}
func TestCRC32LValidFormsNoError(t *testing.T) {
if _, err := CRC32L(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CRC32L(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestCRC32QValidFormsNoError(t *testing.T) {
if _, err := CRC32Q(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CRC32Q(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestCRC32WValidFormsNoError(t *testing.T) {
if _, err := CRC32W(opm16, opr32); err != nil {
t.Fatal(err)
}
if _, err := CRC32W(opr16, opr32); err != nil {
t.Fatal(err)
}
}
func TestCVTPD2PLValidFormsNoError(t *testing.T) {
if _, err := CVTPD2PL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPD2PL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTPD2PSValidFormsNoError(t *testing.T) {
if _, err := CVTPD2PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPD2PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTPL2PDValidFormsNoError(t *testing.T) {
if _, err := CVTPL2PD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPL2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTPL2PSValidFormsNoError(t *testing.T) {
if _, err := CVTPL2PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPL2PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTPS2PDValidFormsNoError(t *testing.T) {
if _, err := CVTPS2PD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPS2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTPS2PLValidFormsNoError(t *testing.T) {
if _, err := CVTPS2PL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTPS2PL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSD2SLValidFormsNoError(t *testing.T) {
if _, err := CVTSD2SL(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTSD2SL(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CVTSD2SL(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTSD2SL(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestCVTSD2SSValidFormsNoError(t *testing.T) {
if _, err := CVTSD2SS(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSD2SS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSL2SDValidFormsNoError(t *testing.T) {
if _, err := CVTSL2SD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSL2SD(opr32, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSL2SSValidFormsNoError(t *testing.T) {
if _, err := CVTSL2SS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSL2SS(opr32, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSQ2SDValidFormsNoError(t *testing.T) {
if _, err := CVTSQ2SD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSQ2SD(opr64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSQ2SSValidFormsNoError(t *testing.T) {
if _, err := CVTSQ2SS(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSQ2SS(opr64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSS2SDValidFormsNoError(t *testing.T) {
if _, err := CVTSS2SD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTSS2SD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTSS2SLValidFormsNoError(t *testing.T) {
if _, err := CVTSS2SL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTSS2SL(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := CVTSS2SL(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTSS2SL(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestCVTTPD2PLValidFormsNoError(t *testing.T) {
if _, err := CVTTPD2PL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTTPD2PL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTTPS2PLValidFormsNoError(t *testing.T) {
if _, err := CVTTPS2PL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := CVTTPS2PL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestCVTTSD2SLValidFormsNoError(t *testing.T) {
if _, err := CVTTSD2SL(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTTSD2SL(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestCVTTSD2SQValidFormsNoError(t *testing.T) {
if _, err := CVTTSD2SQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := CVTTSD2SQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestCVTTSS2SLValidFormsNoError(t *testing.T) {
if _, err := CVTTSS2SL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTTSS2SL(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := CVTTSS2SL(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := CVTTSS2SL(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestCWDValidFormsNoError(t *testing.T) {
if _, err := CWD(); err != nil {
t.Fatal(err)
}
}
func TestCWDEValidFormsNoError(t *testing.T) {
if _, err := CWDE(); err != nil {
t.Fatal(err)
}
}
func TestDECBValidFormsNoError(t *testing.T) {
if _, err := DECB(opm8); err != nil {
t.Fatal(err)
}
if _, err := DECB(opr8); err != nil {
t.Fatal(err)
}
}
func TestDECLValidFormsNoError(t *testing.T) {
if _, err := DECL(opm32); err != nil {
t.Fatal(err)
}
if _, err := DECL(opr32); err != nil {
t.Fatal(err)
}
}
func TestDECQValidFormsNoError(t *testing.T) {
if _, err := DECQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := DECQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestDECWValidFormsNoError(t *testing.T) {
if _, err := DECW(opm16); err != nil {
t.Fatal(err)
}
if _, err := DECW(opr16); err != nil {
t.Fatal(err)
}
}
func TestDIVBValidFormsNoError(t *testing.T) {
if _, err := DIVB(opm8); err != nil {
t.Fatal(err)
}
if _, err := DIVB(opr8); err != nil {
t.Fatal(err)
}
}
func TestDIVLValidFormsNoError(t *testing.T) {
if _, err := DIVL(opm32); err != nil {
t.Fatal(err)
}
if _, err := DIVL(opr32); err != nil {
t.Fatal(err)
}
}
func TestDIVPDValidFormsNoError(t *testing.T) {
if _, err := DIVPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DIVPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestDIVPSValidFormsNoError(t *testing.T) {
if _, err := DIVPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DIVPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestDIVQValidFormsNoError(t *testing.T) {
if _, err := DIVQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := DIVQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestDIVSDValidFormsNoError(t *testing.T) {
if _, err := DIVSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DIVSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestDIVSSValidFormsNoError(t *testing.T) {
if _, err := DIVSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DIVSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestDIVWValidFormsNoError(t *testing.T) {
if _, err := DIVW(opm16); err != nil {
t.Fatal(err)
}
if _, err := DIVW(opr16); err != nil {
t.Fatal(err)
}
}
func TestDPPDValidFormsNoError(t *testing.T) {
if _, err := DPPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DPPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestDPPSValidFormsNoError(t *testing.T) {
if _, err := DPPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := DPPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestEXTRACTPSValidFormsNoError(t *testing.T) {
if _, err := EXTRACTPS(opimm2u, opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := EXTRACTPS(opimm2u, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestHADDPDValidFormsNoError(t *testing.T) {
if _, err := HADDPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := HADDPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestHADDPSValidFormsNoError(t *testing.T) {
if _, err := HADDPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := HADDPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestHSUBPDValidFormsNoError(t *testing.T) {
if _, err := HSUBPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := HSUBPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestHSUBPSValidFormsNoError(t *testing.T) {
if _, err := HSUBPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := HSUBPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestIDIVBValidFormsNoError(t *testing.T) {
if _, err := IDIVB(opm8); err != nil {
t.Fatal(err)
}
if _, err := IDIVB(opr8); err != nil {
t.Fatal(err)
}
}
func TestIDIVLValidFormsNoError(t *testing.T) {
if _, err := IDIVL(opm32); err != nil {
t.Fatal(err)
}
if _, err := IDIVL(opr32); err != nil {
t.Fatal(err)
}
}
func TestIDIVQValidFormsNoError(t *testing.T) {
if _, err := IDIVQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := IDIVQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestIDIVWValidFormsNoError(t *testing.T) {
if _, err := IDIVW(opm16); err != nil {
t.Fatal(err)
}
if _, err := IDIVW(opr16); err != nil {
t.Fatal(err)
}
}
func TestIMUL3LValidFormsNoError(t *testing.T) {
if _, err := IMUL3L(opimm32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := IMUL3L(opimm32, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := IMUL3L(opimm8, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := IMUL3L(opimm8, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestIMUL3QValidFormsNoError(t *testing.T) {
if _, err := IMUL3Q(opimm32, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := IMUL3Q(opimm32, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := IMUL3Q(opimm8, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := IMUL3Q(opimm8, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestIMUL3WValidFormsNoError(t *testing.T) {
if _, err := IMUL3W(opimm16, opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := IMUL3W(opimm16, opr16, opr16); err != nil {
t.Fatal(err)
}
if _, err := IMUL3W(opimm8, opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := IMUL3W(opimm8, opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestIMULBValidFormsNoError(t *testing.T) {
if _, err := IMULB(opm8); err != nil {
t.Fatal(err)
}
if _, err := IMULB(opr8); err != nil {
t.Fatal(err)
}
}
func TestIMULLValidFormsNoError(t *testing.T) {
if _, err := IMULL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := IMULL(opm32); err != nil {
t.Fatal(err)
}
if _, err := IMULL(opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := IMULL(opr32); err != nil {
t.Fatal(err)
}
}
func TestIMULQValidFormsNoError(t *testing.T) {
if _, err := IMULQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := IMULQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := IMULQ(opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := IMULQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestIMULWValidFormsNoError(t *testing.T) {
if _, err := IMULW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := IMULW(opm16); err != nil {
t.Fatal(err)
}
if _, err := IMULW(opr16, opr16); err != nil {
t.Fatal(err)
}
if _, err := IMULW(opr16); err != nil {
t.Fatal(err)
}
}
func TestINCBValidFormsNoError(t *testing.T) {
if _, err := INCB(opm8); err != nil {
t.Fatal(err)
}
if _, err := INCB(opr8); err != nil {
t.Fatal(err)
}
}
func TestINCLValidFormsNoError(t *testing.T) {
if _, err := INCL(opm32); err != nil {
t.Fatal(err)
}
if _, err := INCL(opr32); err != nil {
t.Fatal(err)
}
}
func TestINCQValidFormsNoError(t *testing.T) {
if _, err := INCQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := INCQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestINCWValidFormsNoError(t *testing.T) {
if _, err := INCW(opm16); err != nil {
t.Fatal(err)
}
if _, err := INCW(opr16); err != nil {
t.Fatal(err)
}
}
func TestINSERTPSValidFormsNoError(t *testing.T) {
if _, err := INSERTPS(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := INSERTPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestINTValidFormsNoError(t *testing.T) {
if _, err := INT(op3); err != nil {
t.Fatal(err)
}
if _, err := INT(opimm8); err != nil {
t.Fatal(err)
}
}
func TestJAValidFormsNoError(t *testing.T) {
if _, err := JA(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JA(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJAEValidFormsNoError(t *testing.T) {
if _, err := JAE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JAE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJBValidFormsNoError(t *testing.T) {
if _, err := JB(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JB(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJBEValidFormsNoError(t *testing.T) {
if _, err := JBE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JBE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJCValidFormsNoError(t *testing.T) {
if _, err := JC(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JC(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJCCValidFormsNoError(t *testing.T) {
if _, err := JCC(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JCC(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJCSValidFormsNoError(t *testing.T) {
if _, err := JCS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JCS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJCXZLValidFormsNoError(t *testing.T) {
if _, err := JCXZL(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJCXZQValidFormsNoError(t *testing.T) {
if _, err := JCXZQ(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJEValidFormsNoError(t *testing.T) {
if _, err := JE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJEQValidFormsNoError(t *testing.T) {
if _, err := JEQ(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JEQ(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJGValidFormsNoError(t *testing.T) {
if _, err := JG(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JG(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJGEValidFormsNoError(t *testing.T) {
if _, err := JGE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JGE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJGTValidFormsNoError(t *testing.T) {
if _, err := JGT(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JGT(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJHIValidFormsNoError(t *testing.T) {
if _, err := JHI(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JHI(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJHSValidFormsNoError(t *testing.T) {
if _, err := JHS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JHS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJLValidFormsNoError(t *testing.T) {
if _, err := JL(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JL(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJLEValidFormsNoError(t *testing.T) {
if _, err := JLE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JLE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJLOValidFormsNoError(t *testing.T) {
if _, err := JLO(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JLO(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJLSValidFormsNoError(t *testing.T) {
if _, err := JLS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JLS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJLTValidFormsNoError(t *testing.T) {
if _, err := JLT(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JLT(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJMIValidFormsNoError(t *testing.T) {
if _, err := JMI(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JMI(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJMPValidFormsNoError(t *testing.T) {
if _, err := JMP(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JMP(oprel8); err != nil {
t.Fatal(err)
}
if _, err := JMP(opm64); err != nil {
t.Fatal(err)
}
if _, err := JMP(opr64); err != nil {
t.Fatal(err)
}
}
func TestJNAValidFormsNoError(t *testing.T) {
if _, err := JNA(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNA(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNAEValidFormsNoError(t *testing.T) {
if _, err := JNAE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNAE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNBValidFormsNoError(t *testing.T) {
if _, err := JNB(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNB(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNBEValidFormsNoError(t *testing.T) {
if _, err := JNBE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNBE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNCValidFormsNoError(t *testing.T) {
if _, err := JNC(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNC(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNEValidFormsNoError(t *testing.T) {
if _, err := JNE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNGValidFormsNoError(t *testing.T) {
if _, err := JNG(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNG(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNGEValidFormsNoError(t *testing.T) {
if _, err := JNGE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNGE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNLValidFormsNoError(t *testing.T) {
if _, err := JNL(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNL(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNLEValidFormsNoError(t *testing.T) {
if _, err := JNLE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNLE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNOValidFormsNoError(t *testing.T) {
if _, err := JNO(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNO(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNPValidFormsNoError(t *testing.T) {
if _, err := JNP(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNP(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNSValidFormsNoError(t *testing.T) {
if _, err := JNS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJNZValidFormsNoError(t *testing.T) {
if _, err := JNZ(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JNZ(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJOValidFormsNoError(t *testing.T) {
if _, err := JO(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JO(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJOCValidFormsNoError(t *testing.T) {
if _, err := JOC(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JOC(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJOSValidFormsNoError(t *testing.T) {
if _, err := JOS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JOS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPValidFormsNoError(t *testing.T) {
if _, err := JP(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JP(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPCValidFormsNoError(t *testing.T) {
if _, err := JPC(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JPC(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPEValidFormsNoError(t *testing.T) {
if _, err := JPE(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JPE(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPLValidFormsNoError(t *testing.T) {
if _, err := JPL(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JPL(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPOValidFormsNoError(t *testing.T) {
if _, err := JPO(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JPO(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJPSValidFormsNoError(t *testing.T) {
if _, err := JPS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JPS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJSValidFormsNoError(t *testing.T) {
if _, err := JS(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JS(oprel8); err != nil {
t.Fatal(err)
}
}
func TestJZValidFormsNoError(t *testing.T) {
if _, err := JZ(oprel32); err != nil {
t.Fatal(err)
}
if _, err := JZ(oprel8); err != nil {
t.Fatal(err)
}
}
func TestKADDBValidFormsNoError(t *testing.T) {
if _, err := KADDB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKADDDValidFormsNoError(t *testing.T) {
if _, err := KADDD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKADDQValidFormsNoError(t *testing.T) {
if _, err := KADDQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKADDWValidFormsNoError(t *testing.T) {
if _, err := KADDW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDBValidFormsNoError(t *testing.T) {
if _, err := KANDB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDDValidFormsNoError(t *testing.T) {
if _, err := KANDD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDNBValidFormsNoError(t *testing.T) {
if _, err := KANDNB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDNDValidFormsNoError(t *testing.T) {
if _, err := KANDND(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDNQValidFormsNoError(t *testing.T) {
if _, err := KANDNQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDNWValidFormsNoError(t *testing.T) {
if _, err := KANDNW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDQValidFormsNoError(t *testing.T) {
if _, err := KANDQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKANDWValidFormsNoError(t *testing.T) {
if _, err := KANDW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKMOVBValidFormsNoError(t *testing.T) {
if _, err := KMOVB(opk, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVB(opk, opm8); err != nil {
t.Fatal(err)
}
if _, err := KMOVB(opk, opr32); err != nil {
t.Fatal(err)
}
if _, err := KMOVB(opm8, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVB(opr32, opk); err != nil {
t.Fatal(err)
}
}
func TestKMOVDValidFormsNoError(t *testing.T) {
if _, err := KMOVD(opk, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVD(opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := KMOVD(opk, opr32); err != nil {
t.Fatal(err)
}
if _, err := KMOVD(opm32, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVD(opr32, opk); err != nil {
t.Fatal(err)
}
}
func TestKMOVQValidFormsNoError(t *testing.T) {
if _, err := KMOVQ(opk, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVQ(opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := KMOVQ(opk, opr64); err != nil {
t.Fatal(err)
}
if _, err := KMOVQ(opm64, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVQ(opr64, opk); err != nil {
t.Fatal(err)
}
}
func TestKMOVWValidFormsNoError(t *testing.T) {
if _, err := KMOVW(opk, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVW(opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := KMOVW(opk, opr32); err != nil {
t.Fatal(err)
}
if _, err := KMOVW(opm16, opk); err != nil {
t.Fatal(err)
}
if _, err := KMOVW(opr32, opk); err != nil {
t.Fatal(err)
}
}
func TestKNOTBValidFormsNoError(t *testing.T) {
if _, err := KNOTB(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKNOTDValidFormsNoError(t *testing.T) {
if _, err := KNOTD(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKNOTQValidFormsNoError(t *testing.T) {
if _, err := KNOTQ(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKNOTWValidFormsNoError(t *testing.T) {
if _, err := KNOTW(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORBValidFormsNoError(t *testing.T) {
if _, err := KORB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORDValidFormsNoError(t *testing.T) {
if _, err := KORD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORQValidFormsNoError(t *testing.T) {
if _, err := KORQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORTESTBValidFormsNoError(t *testing.T) {
if _, err := KORTESTB(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORTESTDValidFormsNoError(t *testing.T) {
if _, err := KORTESTD(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORTESTQValidFormsNoError(t *testing.T) {
if _, err := KORTESTQ(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORTESTWValidFormsNoError(t *testing.T) {
if _, err := KORTESTW(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKORWValidFormsNoError(t *testing.T) {
if _, err := KORW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTLBValidFormsNoError(t *testing.T) {
if _, err := KSHIFTLB(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTLDValidFormsNoError(t *testing.T) {
if _, err := KSHIFTLD(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTLQValidFormsNoError(t *testing.T) {
if _, err := KSHIFTLQ(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTLWValidFormsNoError(t *testing.T) {
if _, err := KSHIFTLW(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTRBValidFormsNoError(t *testing.T) {
if _, err := KSHIFTRB(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTRDValidFormsNoError(t *testing.T) {
if _, err := KSHIFTRD(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTRQValidFormsNoError(t *testing.T) {
if _, err := KSHIFTRQ(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKSHIFTRWValidFormsNoError(t *testing.T) {
if _, err := KSHIFTRW(opimm8, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKTESTBValidFormsNoError(t *testing.T) {
if _, err := KTESTB(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKTESTDValidFormsNoError(t *testing.T) {
if _, err := KTESTD(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKTESTQValidFormsNoError(t *testing.T) {
if _, err := KTESTQ(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKTESTWValidFormsNoError(t *testing.T) {
if _, err := KTESTW(opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKUNPCKBWValidFormsNoError(t *testing.T) {
if _, err := KUNPCKBW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKUNPCKDQValidFormsNoError(t *testing.T) {
if _, err := KUNPCKDQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKUNPCKWDValidFormsNoError(t *testing.T) {
if _, err := KUNPCKWD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXNORBValidFormsNoError(t *testing.T) {
if _, err := KXNORB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXNORDValidFormsNoError(t *testing.T) {
if _, err := KXNORD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXNORQValidFormsNoError(t *testing.T) {
if _, err := KXNORQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXNORWValidFormsNoError(t *testing.T) {
if _, err := KXNORW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXORBValidFormsNoError(t *testing.T) {
if _, err := KXORB(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXORDValidFormsNoError(t *testing.T) {
if _, err := KXORD(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXORQValidFormsNoError(t *testing.T) {
if _, err := KXORQ(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestKXORWValidFormsNoError(t *testing.T) {
if _, err := KXORW(opk, opk, opk); err != nil {
t.Fatal(err)
}
}
func TestLDDQUValidFormsNoError(t *testing.T) {
if _, err := LDDQU(opm128, opxmm); err != nil {
t.Fatal(err)
}
}
func TestLDMXCSRValidFormsNoError(t *testing.T) {
if _, err := LDMXCSR(opm32); err != nil {
t.Fatal(err)
}
}
func TestLEALValidFormsNoError(t *testing.T) {
if _, err := LEAL(opm, opr32); err != nil {
t.Fatal(err)
}
}
func TestLEAQValidFormsNoError(t *testing.T) {
if _, err := LEAQ(opm, opr64); err != nil {
t.Fatal(err)
}
}
func TestLEAWValidFormsNoError(t *testing.T) {
if _, err := LEAW(opm, opr16); err != nil {
t.Fatal(err)
}
}
func TestLFENCEValidFormsNoError(t *testing.T) {
if _, err := LFENCE(); err != nil {
t.Fatal(err)
}
}
func TestLZCNTLValidFormsNoError(t *testing.T) {
if _, err := LZCNTL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := LZCNTL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestLZCNTQValidFormsNoError(t *testing.T) {
if _, err := LZCNTQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := LZCNTQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestLZCNTWValidFormsNoError(t *testing.T) {
if _, err := LZCNTW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := LZCNTW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestMASKMOVDQUValidFormsNoError(t *testing.T) {
if _, err := MASKMOVDQU(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMASKMOVOUValidFormsNoError(t *testing.T) {
if _, err := MASKMOVOU(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMAXPDValidFormsNoError(t *testing.T) {
if _, err := MAXPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MAXPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMAXPSValidFormsNoError(t *testing.T) {
if _, err := MAXPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MAXPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMAXSDValidFormsNoError(t *testing.T) {
if _, err := MAXSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MAXSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMAXSSValidFormsNoError(t *testing.T) {
if _, err := MAXSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MAXSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMFENCEValidFormsNoError(t *testing.T) {
if _, err := MFENCE(); err != nil {
t.Fatal(err)
}
}
func TestMINPDValidFormsNoError(t *testing.T) {
if _, err := MINPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MINPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMINPSValidFormsNoError(t *testing.T) {
if _, err := MINPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MINPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMINSDValidFormsNoError(t *testing.T) {
if _, err := MINSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MINSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMINSSValidFormsNoError(t *testing.T) {
if _, err := MINSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MINSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMONITORValidFormsNoError(t *testing.T) {
if _, err := MONITOR(); err != nil {
t.Fatal(err)
}
}
func TestMOVAPDValidFormsNoError(t *testing.T) {
if _, err := MOVAPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVAPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVAPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVAPSValidFormsNoError(t *testing.T) {
if _, err := MOVAPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVAPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVAPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVBValidFormsNoError(t *testing.T) {
if _, err := MOVB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := MOVB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := MOVB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := MOVB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := MOVB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestMOVBELLValidFormsNoError(t *testing.T) {
if _, err := MOVBELL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVBELL(opr32, opm32); err != nil {
t.Fatal(err)
}
}
func TestMOVBEQQValidFormsNoError(t *testing.T) {
if _, err := MOVBEQQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVBEQQ(opr64, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVBEWWValidFormsNoError(t *testing.T) {
if _, err := MOVBEWW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := MOVBEWW(opr16, opm16); err != nil {
t.Fatal(err)
}
}
func TestMOVBLSXValidFormsNoError(t *testing.T) {
if _, err := MOVBLSX(opm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVBLSX(opr8, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVBLZXValidFormsNoError(t *testing.T) {
if _, err := MOVBLZX(opm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVBLZX(opr8, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVBQSXValidFormsNoError(t *testing.T) {
if _, err := MOVBQSX(opm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVBQSX(opr8, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVBQZXValidFormsNoError(t *testing.T) {
if _, err := MOVBQZX(opm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVBQZX(opr8, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVBWSXValidFormsNoError(t *testing.T) {
if _, err := MOVBWSX(opm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := MOVBWSX(opr8, opr16); err != nil {
t.Fatal(err)
}
}
func TestMOVBWZXValidFormsNoError(t *testing.T) {
if _, err := MOVBWZX(opm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := MOVBWZX(opr8, opr16); err != nil {
t.Fatal(err)
}
}
func TestMOVDValidFormsNoError(t *testing.T) {
if _, err := MOVD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opr64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opxmm, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opimm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVD(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVDDUPValidFormsNoError(t *testing.T) {
if _, err := MOVDDUP(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVDQ2QValidFormsNoError(t *testing.T) {
if _, err := MOVDQ2Q(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opr64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opxmm, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opimm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVDQ2Q(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVHLPSValidFormsNoError(t *testing.T) {
if _, err := MOVHLPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVHPDValidFormsNoError(t *testing.T) {
if _, err := MOVHPD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVHPD(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVHPSValidFormsNoError(t *testing.T) {
if _, err := MOVHPS(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVHPS(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVLValidFormsNoError(t *testing.T) {
if _, err := MOVL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVLHPSValidFormsNoError(t *testing.T) {
if _, err := MOVLHPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVLPDValidFormsNoError(t *testing.T) {
if _, err := MOVLPD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVLPD(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVLPSValidFormsNoError(t *testing.T) {
if _, err := MOVLPS(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVLPS(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVLQSXValidFormsNoError(t *testing.T) {
if _, err := MOVLQSX(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVLQSX(opr32, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVLQZXValidFormsNoError(t *testing.T) {
if _, err := MOVLQZX(opm32, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVMSKPDValidFormsNoError(t *testing.T) {
if _, err := MOVMSKPD(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVMSKPSValidFormsNoError(t *testing.T) {
if _, err := MOVMSKPS(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVNTDQValidFormsNoError(t *testing.T) {
if _, err := MOVNTDQ(opxmm, opm128); err != nil {
t.Fatal(err)
}
}
func TestMOVNTDQAValidFormsNoError(t *testing.T) {
if _, err := MOVNTDQA(opm128, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVNTILValidFormsNoError(t *testing.T) {
if _, err := MOVNTIL(opr32, opm32); err != nil {
t.Fatal(err)
}
}
func TestMOVNTIQValidFormsNoError(t *testing.T) {
if _, err := MOVNTIQ(opr64, opm64); err != nil {
t.Fatal(err)
}
}
func TestMOVNTOValidFormsNoError(t *testing.T) {
if _, err := MOVNTO(opxmm, opm128); err != nil {
t.Fatal(err)
}
}
func TestMOVNTPDValidFormsNoError(t *testing.T) {
if _, err := MOVNTPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
}
func TestMOVNTPSValidFormsNoError(t *testing.T) {
if _, err := MOVNTPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
}
func TestMOVOValidFormsNoError(t *testing.T) {
if _, err := MOVO(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVO(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVO(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVOAValidFormsNoError(t *testing.T) {
if _, err := MOVOA(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVOA(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVOA(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVOUValidFormsNoError(t *testing.T) {
if _, err := MOVOU(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVOU(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVOU(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVQValidFormsNoError(t *testing.T) {
if _, err := MOVQ(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opr64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opimm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVSDValidFormsNoError(t *testing.T) {
if _, err := MOVSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVSD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := MOVSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVSHDUPValidFormsNoError(t *testing.T) {
if _, err := MOVSHDUP(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVSHDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVSLDUPValidFormsNoError(t *testing.T) {
if _, err := MOVSLDUP(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVSLDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVSSValidFormsNoError(t *testing.T) {
if _, err := MOVSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVSS(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := MOVSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVUPDValidFormsNoError(t *testing.T) {
if _, err := MOVUPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVUPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVUPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVUPSValidFormsNoError(t *testing.T) {
if _, err := MOVUPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MOVUPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := MOVUPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMOVWValidFormsNoError(t *testing.T) {
if _, err := MOVW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := MOVW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := MOVW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := MOVW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := MOVW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestMOVWLSXValidFormsNoError(t *testing.T) {
if _, err := MOVWLSX(opm16, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVWLSX(opr16, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVWLZXValidFormsNoError(t *testing.T) {
if _, err := MOVWLZX(opm16, opr32); err != nil {
t.Fatal(err)
}
if _, err := MOVWLZX(opr16, opr32); err != nil {
t.Fatal(err)
}
}
func TestMOVWQSXValidFormsNoError(t *testing.T) {
if _, err := MOVWQSX(opm16, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVWQSX(opr16, opr64); err != nil {
t.Fatal(err)
}
}
func TestMOVWQZXValidFormsNoError(t *testing.T) {
if _, err := MOVWQZX(opm16, opr64); err != nil {
t.Fatal(err)
}
if _, err := MOVWQZX(opr16, opr64); err != nil {
t.Fatal(err)
}
}
func TestMPSADBWValidFormsNoError(t *testing.T) {
if _, err := MPSADBW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MPSADBW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMULBValidFormsNoError(t *testing.T) {
if _, err := MULB(opm8); err != nil {
t.Fatal(err)
}
if _, err := MULB(opr8); err != nil {
t.Fatal(err)
}
}
func TestMULLValidFormsNoError(t *testing.T) {
if _, err := MULL(opm32); err != nil {
t.Fatal(err)
}
if _, err := MULL(opr32); err != nil {
t.Fatal(err)
}
}
func TestMULPDValidFormsNoError(t *testing.T) {
if _, err := MULPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MULPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMULPSValidFormsNoError(t *testing.T) {
if _, err := MULPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MULPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMULQValidFormsNoError(t *testing.T) {
if _, err := MULQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := MULQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestMULSDValidFormsNoError(t *testing.T) {
if _, err := MULSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MULSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMULSSValidFormsNoError(t *testing.T) {
if _, err := MULSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := MULSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestMULWValidFormsNoError(t *testing.T) {
if _, err := MULW(opm16); err != nil {
t.Fatal(err)
}
if _, err := MULW(opr16); err != nil {
t.Fatal(err)
}
}
func TestMULXLValidFormsNoError(t *testing.T) {
if _, err := MULXL(opm32, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := MULXL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestMULXQValidFormsNoError(t *testing.T) {
if _, err := MULXQ(opm64, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := MULXQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestMWAITValidFormsNoError(t *testing.T) {
if _, err := MWAIT(); err != nil {
t.Fatal(err)
}
}
func TestNEGBValidFormsNoError(t *testing.T) {
if _, err := NEGB(opm8); err != nil {
t.Fatal(err)
}
if _, err := NEGB(opr8); err != nil {
t.Fatal(err)
}
}
func TestNEGLValidFormsNoError(t *testing.T) {
if _, err := NEGL(opm32); err != nil {
t.Fatal(err)
}
if _, err := NEGL(opr32); err != nil {
t.Fatal(err)
}
}
func TestNEGQValidFormsNoError(t *testing.T) {
if _, err := NEGQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := NEGQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestNEGWValidFormsNoError(t *testing.T) {
if _, err := NEGW(opm16); err != nil {
t.Fatal(err)
}
if _, err := NEGW(opr16); err != nil {
t.Fatal(err)
}
}
func TestNOPValidFormsNoError(t *testing.T) {
if _, err := NOP(); err != nil {
t.Fatal(err)
}
}
func TestNOTBValidFormsNoError(t *testing.T) {
if _, err := NOTB(opm8); err != nil {
t.Fatal(err)
}
if _, err := NOTB(opr8); err != nil {
t.Fatal(err)
}
}
func TestNOTLValidFormsNoError(t *testing.T) {
if _, err := NOTL(opm32); err != nil {
t.Fatal(err)
}
if _, err := NOTL(opr32); err != nil {
t.Fatal(err)
}
}
func TestNOTQValidFormsNoError(t *testing.T) {
if _, err := NOTQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := NOTQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestNOTWValidFormsNoError(t *testing.T) {
if _, err := NOTW(opm16); err != nil {
t.Fatal(err)
}
if _, err := NOTW(opr16); err != nil {
t.Fatal(err)
}
}
func TestORBValidFormsNoError(t *testing.T) {
if _, err := ORB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := ORB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ORB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ORB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := ORB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ORB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestORLValidFormsNoError(t *testing.T) {
if _, err := ORL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := ORL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := ORL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestORPDValidFormsNoError(t *testing.T) {
if _, err := ORPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ORPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestORPSValidFormsNoError(t *testing.T) {
if _, err := ORPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ORPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestORQValidFormsNoError(t *testing.T) {
if _, err := ORQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := ORQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestORWValidFormsNoError(t *testing.T) {
if _, err := ORW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := ORW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := ORW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestPABSBValidFormsNoError(t *testing.T) {
if _, err := PABSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PABSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPABSDValidFormsNoError(t *testing.T) {
if _, err := PABSD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PABSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPABSWValidFormsNoError(t *testing.T) {
if _, err := PABSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PABSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPACKSSLWValidFormsNoError(t *testing.T) {
if _, err := PACKSSLW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PACKSSLW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPACKSSWBValidFormsNoError(t *testing.T) {
if _, err := PACKSSWB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PACKSSWB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPACKUSDWValidFormsNoError(t *testing.T) {
if _, err := PACKUSDW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PACKUSDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPACKUSWBValidFormsNoError(t *testing.T) {
if _, err := PACKUSWB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PACKUSWB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDBValidFormsNoError(t *testing.T) {
if _, err := PADDB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDDValidFormsNoError(t *testing.T) {
if _, err := PADDD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDLValidFormsNoError(t *testing.T) {
if _, err := PADDL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDQValidFormsNoError(t *testing.T) {
if _, err := PADDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDSBValidFormsNoError(t *testing.T) {
if _, err := PADDSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDSWValidFormsNoError(t *testing.T) {
if _, err := PADDSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDUSBValidFormsNoError(t *testing.T) {
if _, err := PADDUSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDUSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDUSWValidFormsNoError(t *testing.T) {
if _, err := PADDUSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDUSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPADDWValidFormsNoError(t *testing.T) {
if _, err := PADDW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PADDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPALIGNRValidFormsNoError(t *testing.T) {
if _, err := PALIGNR(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PALIGNR(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPANDValidFormsNoError(t *testing.T) {
if _, err := PAND(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PAND(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPANDNValidFormsNoError(t *testing.T) {
if _, err := PANDN(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PANDN(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPAUSEValidFormsNoError(t *testing.T) {
if _, err := PAUSE(); err != nil {
t.Fatal(err)
}
}
func TestPAVGBValidFormsNoError(t *testing.T) {
if _, err := PAVGB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PAVGB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPAVGWValidFormsNoError(t *testing.T) {
if _, err := PAVGW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PAVGW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPBLENDVBValidFormsNoError(t *testing.T) {
if _, err := PBLENDVB(opxmm0, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PBLENDVB(opxmm0, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPBLENDWValidFormsNoError(t *testing.T) {
if _, err := PBLENDW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PBLENDW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCLMULQDQValidFormsNoError(t *testing.T) {
if _, err := PCLMULQDQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCLMULQDQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPEQBValidFormsNoError(t *testing.T) {
if _, err := PCMPEQB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPEQB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPEQLValidFormsNoError(t *testing.T) {
if _, err := PCMPEQL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPEQL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPEQQValidFormsNoError(t *testing.T) {
if _, err := PCMPEQQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPEQQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPEQWValidFormsNoError(t *testing.T) {
if _, err := PCMPEQW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPEQW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPESTRIValidFormsNoError(t *testing.T) {
if _, err := PCMPESTRI(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPESTRI(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPESTRMValidFormsNoError(t *testing.T) {
if _, err := PCMPESTRM(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPESTRM(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPGTBValidFormsNoError(t *testing.T) {
if _, err := PCMPGTB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPGTB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPGTLValidFormsNoError(t *testing.T) {
if _, err := PCMPGTL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPGTL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPGTQValidFormsNoError(t *testing.T) {
if _, err := PCMPGTQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPGTQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPGTWValidFormsNoError(t *testing.T) {
if _, err := PCMPGTW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPGTW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPISTRIValidFormsNoError(t *testing.T) {
if _, err := PCMPISTRI(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPISTRI(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPCMPISTRMValidFormsNoError(t *testing.T) {
if _, err := PCMPISTRM(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PCMPISTRM(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPDEPLValidFormsNoError(t *testing.T) {
if _, err := PDEPL(opm32, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := PDEPL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestPDEPQValidFormsNoError(t *testing.T) {
if _, err := PDEPQ(opm64, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := PDEPQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestPEXTLValidFormsNoError(t *testing.T) {
if _, err := PEXTL(opm32, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := PEXTL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestPEXTQValidFormsNoError(t *testing.T) {
if _, err := PEXTQ(opm64, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := PEXTQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestPEXTRBValidFormsNoError(t *testing.T) {
if _, err := PEXTRB(opimm8, opxmm, opm8); err != nil {
t.Fatal(err)
}
if _, err := PEXTRB(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestPEXTRDValidFormsNoError(t *testing.T) {
if _, err := PEXTRD(opimm8, opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := PEXTRD(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestPEXTRQValidFormsNoError(t *testing.T) {
if _, err := PEXTRQ(opimm8, opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := PEXTRQ(opimm8, opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestPEXTRWValidFormsNoError(t *testing.T) {
if _, err := PEXTRW(opimm8, opxmm, opm16); err != nil {
t.Fatal(err)
}
if _, err := PEXTRW(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestPHADDDValidFormsNoError(t *testing.T) {
if _, err := PHADDD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHADDD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHADDSWValidFormsNoError(t *testing.T) {
if _, err := PHADDSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHADDSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHADDWValidFormsNoError(t *testing.T) {
if _, err := PHADDW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHADDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHMINPOSUWValidFormsNoError(t *testing.T) {
if _, err := PHMINPOSUW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHMINPOSUW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHSUBDValidFormsNoError(t *testing.T) {
if _, err := PHSUBD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHSUBD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHSUBSWValidFormsNoError(t *testing.T) {
if _, err := PHSUBSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHSUBSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPHSUBWValidFormsNoError(t *testing.T) {
if _, err := PHSUBW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PHSUBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPINSRBValidFormsNoError(t *testing.T) {
if _, err := PINSRB(opimm8, opm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PINSRB(opimm8, opr32, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPINSRDValidFormsNoError(t *testing.T) {
if _, err := PINSRD(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PINSRD(opimm8, opr32, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPINSRQValidFormsNoError(t *testing.T) {
if _, err := PINSRQ(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PINSRQ(opimm8, opr64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPINSRWValidFormsNoError(t *testing.T) {
if _, err := PINSRW(opimm8, opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PINSRW(opimm8, opr32, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMADDUBSWValidFormsNoError(t *testing.T) {
if _, err := PMADDUBSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMADDUBSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMADDWLValidFormsNoError(t *testing.T) {
if _, err := PMADDWL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMADDWL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXSBValidFormsNoError(t *testing.T) {
if _, err := PMAXSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXSDValidFormsNoError(t *testing.T) {
if _, err := PMAXSD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXSWValidFormsNoError(t *testing.T) {
if _, err := PMAXSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXUBValidFormsNoError(t *testing.T) {
if _, err := PMAXUB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXUB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXUDValidFormsNoError(t *testing.T) {
if _, err := PMAXUD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXUD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMAXUWValidFormsNoError(t *testing.T) {
if _, err := PMAXUW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMAXUW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINSBValidFormsNoError(t *testing.T) {
if _, err := PMINSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINSDValidFormsNoError(t *testing.T) {
if _, err := PMINSD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINSWValidFormsNoError(t *testing.T) {
if _, err := PMINSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINUBValidFormsNoError(t *testing.T) {
if _, err := PMINUB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINUB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINUDValidFormsNoError(t *testing.T) {
if _, err := PMINUD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINUD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMINUWValidFormsNoError(t *testing.T) {
if _, err := PMINUW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMINUW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVMSKBValidFormsNoError(t *testing.T) {
if _, err := PMOVMSKB(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXBDValidFormsNoError(t *testing.T) {
if _, err := PMOVSXBD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXBD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXBQValidFormsNoError(t *testing.T) {
if _, err := PMOVSXBQ(opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXBQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXBWValidFormsNoError(t *testing.T) {
if _, err := PMOVSXBW(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXDQValidFormsNoError(t *testing.T) {
if _, err := PMOVSXDQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXWDValidFormsNoError(t *testing.T) {
if _, err := PMOVSXWD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXWD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVSXWQValidFormsNoError(t *testing.T) {
if _, err := PMOVSXWQ(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVSXWQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXBDValidFormsNoError(t *testing.T) {
if _, err := PMOVZXBD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXBD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXBQValidFormsNoError(t *testing.T) {
if _, err := PMOVZXBQ(opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXBQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXBWValidFormsNoError(t *testing.T) {
if _, err := PMOVZXBW(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXDQValidFormsNoError(t *testing.T) {
if _, err := PMOVZXDQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXWDValidFormsNoError(t *testing.T) {
if _, err := PMOVZXWD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXWD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMOVZXWQValidFormsNoError(t *testing.T) {
if _, err := PMOVZXWQ(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMOVZXWQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULDQValidFormsNoError(t *testing.T) {
if _, err := PMULDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULHRSWValidFormsNoError(t *testing.T) {
if _, err := PMULHRSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULHRSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULHUWValidFormsNoError(t *testing.T) {
if _, err := PMULHUW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULHUW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULHWValidFormsNoError(t *testing.T) {
if _, err := PMULHW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULHW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULLDValidFormsNoError(t *testing.T) {
if _, err := PMULLD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULLD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULLWValidFormsNoError(t *testing.T) {
if _, err := PMULLW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULLW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPMULULQValidFormsNoError(t *testing.T) {
if _, err := PMULULQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PMULULQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPOPCNTLValidFormsNoError(t *testing.T) {
if _, err := POPCNTL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := POPCNTL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestPOPCNTQValidFormsNoError(t *testing.T) {
if _, err := POPCNTQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := POPCNTQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestPOPCNTWValidFormsNoError(t *testing.T) {
if _, err := POPCNTW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := POPCNTW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestPOPQValidFormsNoError(t *testing.T) {
if _, err := POPQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := POPQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestPOPWValidFormsNoError(t *testing.T) {
if _, err := POPW(opm16); err != nil {
t.Fatal(err)
}
if _, err := POPW(opr16); err != nil {
t.Fatal(err)
}
}
func TestPORValidFormsNoError(t *testing.T) {
if _, err := POR(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := POR(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPREFETCHNTAValidFormsNoError(t *testing.T) {
if _, err := PREFETCHNTA(opm8); err != nil {
t.Fatal(err)
}
}
func TestPREFETCHT0ValidFormsNoError(t *testing.T) {
if _, err := PREFETCHT0(opm8); err != nil {
t.Fatal(err)
}
}
func TestPREFETCHT1ValidFormsNoError(t *testing.T) {
if _, err := PREFETCHT1(opm8); err != nil {
t.Fatal(err)
}
}
func TestPREFETCHT2ValidFormsNoError(t *testing.T) {
if _, err := PREFETCHT2(opm8); err != nil {
t.Fatal(err)
}
}
func TestPSADBWValidFormsNoError(t *testing.T) {
if _, err := PSADBW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSADBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSHUFBValidFormsNoError(t *testing.T) {
if _, err := PSHUFB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSHUFB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSHUFDValidFormsNoError(t *testing.T) {
if _, err := PSHUFD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSHUFD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSHUFHWValidFormsNoError(t *testing.T) {
if _, err := PSHUFHW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSHUFHW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSHUFLValidFormsNoError(t *testing.T) {
if _, err := PSHUFL(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSHUFL(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSHUFLWValidFormsNoError(t *testing.T) {
if _, err := PSHUFLW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSHUFLW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSIGNBValidFormsNoError(t *testing.T) {
if _, err := PSIGNB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSIGNB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSIGNDValidFormsNoError(t *testing.T) {
if _, err := PSIGND(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSIGND(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSIGNWValidFormsNoError(t *testing.T) {
if _, err := PSIGNW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSIGNW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSLLDQValidFormsNoError(t *testing.T) {
if _, err := PSLLDQ(opimm8, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSLLLValidFormsNoError(t *testing.T) {
if _, err := PSLLL(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSLLOValidFormsNoError(t *testing.T) {
if _, err := PSLLO(opimm8, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSLLQValidFormsNoError(t *testing.T) {
if _, err := PSLLQ(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSLLWValidFormsNoError(t *testing.T) {
if _, err := PSLLW(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSLLW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRALValidFormsNoError(t *testing.T) {
if _, err := PSRAL(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRAL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRAL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRAWValidFormsNoError(t *testing.T) {
if _, err := PSRAW(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRAW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRAW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRLDQValidFormsNoError(t *testing.T) {
if _, err := PSRLDQ(opimm8, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRLLValidFormsNoError(t *testing.T) {
if _, err := PSRLL(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRLOValidFormsNoError(t *testing.T) {
if _, err := PSRLO(opimm8, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRLQValidFormsNoError(t *testing.T) {
if _, err := PSRLQ(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSRLWValidFormsNoError(t *testing.T) {
if _, err := PSRLW(opimm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSRLW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBBValidFormsNoError(t *testing.T) {
if _, err := PSUBB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBLValidFormsNoError(t *testing.T) {
if _, err := PSUBL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBQValidFormsNoError(t *testing.T) {
if _, err := PSUBQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBSBValidFormsNoError(t *testing.T) {
if _, err := PSUBSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBSWValidFormsNoError(t *testing.T) {
if _, err := PSUBSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBUSBValidFormsNoError(t *testing.T) {
if _, err := PSUBUSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBUSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBUSWValidFormsNoError(t *testing.T) {
if _, err := PSUBUSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBUSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPSUBWValidFormsNoError(t *testing.T) {
if _, err := PSUBW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PSUBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPTESTValidFormsNoError(t *testing.T) {
if _, err := PTEST(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PTEST(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKHBWValidFormsNoError(t *testing.T) {
if _, err := PUNPCKHBW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKHBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKHLQValidFormsNoError(t *testing.T) {
if _, err := PUNPCKHLQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKHLQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKHQDQValidFormsNoError(t *testing.T) {
if _, err := PUNPCKHQDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKHQDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKHWLValidFormsNoError(t *testing.T) {
if _, err := PUNPCKHWL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKHWL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKLBWValidFormsNoError(t *testing.T) {
if _, err := PUNPCKLBW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKLBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKLLQValidFormsNoError(t *testing.T) {
if _, err := PUNPCKLLQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKLLQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKLQDQValidFormsNoError(t *testing.T) {
if _, err := PUNPCKLQDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKLQDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUNPCKLWLValidFormsNoError(t *testing.T) {
if _, err := PUNPCKLWL(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PUNPCKLWL(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestPUSHQValidFormsNoError(t *testing.T) {
if _, err := PUSHQ(opimm32); err != nil {
t.Fatal(err)
}
if _, err := PUSHQ(opimm8); err != nil {
t.Fatal(err)
}
if _, err := PUSHQ(opm64); err != nil {
t.Fatal(err)
}
if _, err := PUSHQ(opr64); err != nil {
t.Fatal(err)
}
}
func TestPUSHWValidFormsNoError(t *testing.T) {
if _, err := PUSHW(opm16); err != nil {
t.Fatal(err)
}
if _, err := PUSHW(opr16); err != nil {
t.Fatal(err)
}
}
func TestPXORValidFormsNoError(t *testing.T) {
if _, err := PXOR(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := PXOR(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestRCLBValidFormsNoError(t *testing.T) {
if _, err := RCLB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCLB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := RCLB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCLB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := RCLB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCLB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestRCLLValidFormsNoError(t *testing.T) {
if _, err := RCLL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCLL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := RCLL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCLL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := RCLL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCLL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestRCLQValidFormsNoError(t *testing.T) {
if _, err := RCLQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCLQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := RCLQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCLQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := RCLQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCLQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestRCLWValidFormsNoError(t *testing.T) {
if _, err := RCLW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCLW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := RCLW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCLW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := RCLW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCLW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestRCPPSValidFormsNoError(t *testing.T) {
if _, err := RCPPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := RCPPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestRCPSSValidFormsNoError(t *testing.T) {
if _, err := RCPSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := RCPSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestRCRBValidFormsNoError(t *testing.T) {
if _, err := RCRB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCRB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := RCRB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCRB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := RCRB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := RCRB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestRCRLValidFormsNoError(t *testing.T) {
if _, err := RCRL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCRL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := RCRL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCRL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := RCRL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := RCRL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestRCRQValidFormsNoError(t *testing.T) {
if _, err := RCRQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCRQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := RCRQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCRQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := RCRQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := RCRQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestRCRWValidFormsNoError(t *testing.T) {
if _, err := RCRW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCRW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := RCRW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCRW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := RCRW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := RCRW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestRDRANDLValidFormsNoError(t *testing.T) {
if _, err := RDRANDL(opr16); err != nil {
t.Fatal(err)
}
if _, err := RDRANDL(opr32); err != nil {
t.Fatal(err)
}
if _, err := RDRANDL(opr64); err != nil {
t.Fatal(err)
}
}
func TestRDSEEDLValidFormsNoError(t *testing.T) {
if _, err := RDSEEDL(opr16); err != nil {
t.Fatal(err)
}
if _, err := RDSEEDL(opr32); err != nil {
t.Fatal(err)
}
if _, err := RDSEEDL(opr64); err != nil {
t.Fatal(err)
}
}
func TestRDTSCValidFormsNoError(t *testing.T) {
if _, err := RDTSC(); err != nil {
t.Fatal(err)
}
}
func TestRDTSCPValidFormsNoError(t *testing.T) {
if _, err := RDTSCP(); err != nil {
t.Fatal(err)
}
}
func TestRETValidFormsNoError(t *testing.T) {
if _, err := RET(); err != nil {
t.Fatal(err)
}
}
func TestRETFLValidFormsNoError(t *testing.T) {
if _, err := RETFL(opimm16); err != nil {
t.Fatal(err)
}
}
func TestRETFQValidFormsNoError(t *testing.T) {
if _, err := RETFQ(opimm16); err != nil {
t.Fatal(err)
}
}
func TestRETFWValidFormsNoError(t *testing.T) {
if _, err := RETFW(opimm16); err != nil {
t.Fatal(err)
}
}
func TestROLBValidFormsNoError(t *testing.T) {
if _, err := ROLB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := ROLB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := ROLB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := ROLB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := ROLB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := ROLB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestROLLValidFormsNoError(t *testing.T) {
if _, err := ROLL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := ROLL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := ROLL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := ROLL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := ROLL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := ROLL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestROLQValidFormsNoError(t *testing.T) {
if _, err := ROLQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := ROLQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := ROLQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := ROLQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := ROLQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := ROLQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestROLWValidFormsNoError(t *testing.T) {
if _, err := ROLW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := ROLW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := ROLW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := ROLW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := ROLW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := ROLW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestRORBValidFormsNoError(t *testing.T) {
if _, err := RORB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := RORB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := RORB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := RORB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := RORB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := RORB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestRORLValidFormsNoError(t *testing.T) {
if _, err := RORL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := RORL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := RORL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := RORL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := RORL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := RORL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestRORQValidFormsNoError(t *testing.T) {
if _, err := RORQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := RORQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := RORQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := RORQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := RORQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := RORQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestRORWValidFormsNoError(t *testing.T) {
if _, err := RORW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := RORW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := RORW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := RORW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := RORW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := RORW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestRORXLValidFormsNoError(t *testing.T) {
if _, err := RORXL(opimm8, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := RORXL(opimm8, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestRORXQValidFormsNoError(t *testing.T) {
if _, err := RORXQ(opimm8, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := RORXQ(opimm8, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestROUNDPDValidFormsNoError(t *testing.T) {
if _, err := ROUNDPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ROUNDPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestROUNDPSValidFormsNoError(t *testing.T) {
if _, err := ROUNDPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ROUNDPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestROUNDSDValidFormsNoError(t *testing.T) {
if _, err := ROUNDSD(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ROUNDSD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestROUNDSSValidFormsNoError(t *testing.T) {
if _, err := ROUNDSS(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := ROUNDSS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestRSQRTPSValidFormsNoError(t *testing.T) {
if _, err := RSQRTPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := RSQRTPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestRSQRTSSValidFormsNoError(t *testing.T) {
if _, err := RSQRTSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := RSQRTSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSALBValidFormsNoError(t *testing.T) {
if _, err := SALB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := SALB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := SALB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := SALB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := SALB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SALB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSALLValidFormsNoError(t *testing.T) {
if _, err := SALL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := SALL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := SALL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := SALL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := SALL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SALL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestSALQValidFormsNoError(t *testing.T) {
if _, err := SALQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := SALQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := SALQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := SALQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := SALQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SALQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestSALWValidFormsNoError(t *testing.T) {
if _, err := SALW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := SALW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := SALW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := SALW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := SALW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SALW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestSARBValidFormsNoError(t *testing.T) {
if _, err := SARB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := SARB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := SARB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := SARB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := SARB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SARB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSARLValidFormsNoError(t *testing.T) {
if _, err := SARL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := SARL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := SARL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := SARL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := SARL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SARL(opimm8, opr32); err != nil {
t.Fatal(err)
}
}
func TestSARQValidFormsNoError(t *testing.T) {
if _, err := SARQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := SARQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := SARQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := SARQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := SARQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SARQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
}
func TestSARWValidFormsNoError(t *testing.T) {
if _, err := SARW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := SARW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := SARW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := SARW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := SARW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SARW(opimm8, opr16); err != nil {
t.Fatal(err)
}
}
func TestSARXLValidFormsNoError(t *testing.T) {
if _, err := SARXL(opr32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SARXL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSARXQValidFormsNoError(t *testing.T) {
if _, err := SARXQ(opr64, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SARXQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSBBBValidFormsNoError(t *testing.T) {
if _, err := SBBB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := SBBB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SBBB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := SBBB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := SBBB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SBBB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSBBLValidFormsNoError(t *testing.T) {
if _, err := SBBL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SBBL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSBBQValidFormsNoError(t *testing.T) {
if _, err := SBBQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SBBQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSBBWValidFormsNoError(t *testing.T) {
if _, err := SBBW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SBBW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestSETCCValidFormsNoError(t *testing.T) {
if _, err := SETCC(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETCC(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETCSValidFormsNoError(t *testing.T) {
if _, err := SETCS(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETCS(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETEQValidFormsNoError(t *testing.T) {
if _, err := SETEQ(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETEQ(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETGEValidFormsNoError(t *testing.T) {
if _, err := SETGE(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETGE(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETGTValidFormsNoError(t *testing.T) {
if _, err := SETGT(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETGT(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETHIValidFormsNoError(t *testing.T) {
if _, err := SETHI(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETHI(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETLEValidFormsNoError(t *testing.T) {
if _, err := SETLE(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETLE(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETLSValidFormsNoError(t *testing.T) {
if _, err := SETLS(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETLS(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETLTValidFormsNoError(t *testing.T) {
if _, err := SETLT(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETLT(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETMIValidFormsNoError(t *testing.T) {
if _, err := SETMI(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETMI(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETNEValidFormsNoError(t *testing.T) {
if _, err := SETNE(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETNE(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETOCValidFormsNoError(t *testing.T) {
if _, err := SETOC(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETOC(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETOSValidFormsNoError(t *testing.T) {
if _, err := SETOS(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETOS(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETPCValidFormsNoError(t *testing.T) {
if _, err := SETPC(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETPC(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETPLValidFormsNoError(t *testing.T) {
if _, err := SETPL(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETPL(opr8); err != nil {
t.Fatal(err)
}
}
func TestSETPSValidFormsNoError(t *testing.T) {
if _, err := SETPS(opm8); err != nil {
t.Fatal(err)
}
if _, err := SETPS(opr8); err != nil {
t.Fatal(err)
}
}
func TestSFENCEValidFormsNoError(t *testing.T) {
if _, err := SFENCE(); err != nil {
t.Fatal(err)
}
}
func TestSHA1MSG1ValidFormsNoError(t *testing.T) {
if _, err := SHA1MSG1(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA1MSG1(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA1MSG2ValidFormsNoError(t *testing.T) {
if _, err := SHA1MSG2(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA1MSG2(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA1NEXTEValidFormsNoError(t *testing.T) {
if _, err := SHA1NEXTE(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA1NEXTE(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA1RNDS4ValidFormsNoError(t *testing.T) {
if _, err := SHA1RNDS4(opimm2u, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA1RNDS4(opimm2u, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA256MSG1ValidFormsNoError(t *testing.T) {
if _, err := SHA256MSG1(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA256MSG1(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA256MSG2ValidFormsNoError(t *testing.T) {
if _, err := SHA256MSG2(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA256MSG2(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHA256RNDS2ValidFormsNoError(t *testing.T) {
if _, err := SHA256RNDS2(opxmm0, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHA256RNDS2(opxmm0, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHLBValidFormsNoError(t *testing.T) {
if _, err := SHLB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHLB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := SHLB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHLB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := SHLB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHLB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSHLLValidFormsNoError(t *testing.T) {
if _, err := SHLL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opcl, opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opcl, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opimm8, opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHLL(opimm8, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSHLQValidFormsNoError(t *testing.T) {
if _, err := SHLQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opcl, opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opcl, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opimm8, opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHLQ(opimm8, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSHLWValidFormsNoError(t *testing.T) {
if _, err := SHLW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opcl, opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opcl, opr16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opimm8, opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHLW(opimm8, opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestSHLXLValidFormsNoError(t *testing.T) {
if _, err := SHLXL(opr32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHLXL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSHLXQValidFormsNoError(t *testing.T) {
if _, err := SHLXQ(opr64, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHLXQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSHRBValidFormsNoError(t *testing.T) {
if _, err := SHRB(op1, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHRB(op1, opr8); err != nil {
t.Fatal(err)
}
if _, err := SHRB(opcl, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHRB(opcl, opr8); err != nil {
t.Fatal(err)
}
if _, err := SHRB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SHRB(opimm8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSHRLValidFormsNoError(t *testing.T) {
if _, err := SHRL(op1, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(op1, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opcl, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opcl, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opcl, opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opcl, opr32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opimm8, opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SHRL(opimm8, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSHRQValidFormsNoError(t *testing.T) {
if _, err := SHRQ(op1, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(op1, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opcl, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opcl, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opcl, opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opcl, opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opimm8, opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SHRQ(opimm8, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSHRWValidFormsNoError(t *testing.T) {
if _, err := SHRW(op1, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(op1, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opcl, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opcl, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opcl, opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opcl, opr16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opimm8, opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SHRW(opimm8, opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestSHRXLValidFormsNoError(t *testing.T) {
if _, err := SHRXL(opr32, opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SHRXL(opr32, opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSHRXQValidFormsNoError(t *testing.T) {
if _, err := SHRXQ(opr64, opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SHRXQ(opr64, opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSHUFPDValidFormsNoError(t *testing.T) {
if _, err := SHUFPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHUFPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSHUFPSValidFormsNoError(t *testing.T) {
if _, err := SHUFPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SHUFPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSQRTPDValidFormsNoError(t *testing.T) {
if _, err := SQRTPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SQRTPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSQRTPSValidFormsNoError(t *testing.T) {
if _, err := SQRTPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SQRTPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSQRTSDValidFormsNoError(t *testing.T) {
if _, err := SQRTSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SQRTSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSQRTSSValidFormsNoError(t *testing.T) {
if _, err := SQRTSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SQRTSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSTCValidFormsNoError(t *testing.T) {
if _, err := STC(); err != nil {
t.Fatal(err)
}
}
func TestSTDValidFormsNoError(t *testing.T) {
if _, err := STD(); err != nil {
t.Fatal(err)
}
}
func TestSTMXCSRValidFormsNoError(t *testing.T) {
if _, err := STMXCSR(opm32); err != nil {
t.Fatal(err)
}
}
func TestSUBBValidFormsNoError(t *testing.T) {
if _, err := SUBB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := SUBB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SUBB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := SUBB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := SUBB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := SUBB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestSUBLValidFormsNoError(t *testing.T) {
if _, err := SUBL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := SUBL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestSUBPDValidFormsNoError(t *testing.T) {
if _, err := SUBPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SUBPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSUBPSValidFormsNoError(t *testing.T) {
if _, err := SUBPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SUBPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSUBQValidFormsNoError(t *testing.T) {
if _, err := SUBQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := SUBQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestSUBSDValidFormsNoError(t *testing.T) {
if _, err := SUBSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SUBSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSUBSSValidFormsNoError(t *testing.T) {
if _, err := SUBSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := SUBSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestSUBWValidFormsNoError(t *testing.T) {
if _, err := SUBW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := SUBW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestSYSCALLValidFormsNoError(t *testing.T) {
if _, err := SYSCALL(); err != nil {
t.Fatal(err)
}
}
func TestTESTBValidFormsNoError(t *testing.T) {
if _, err := TESTB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := TESTB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := TESTB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := TESTB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := TESTB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestTESTLValidFormsNoError(t *testing.T) {
if _, err := TESTL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := TESTL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := TESTL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := TESTL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := TESTL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestTESTQValidFormsNoError(t *testing.T) {
if _, err := TESTQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := TESTQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := TESTQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := TESTQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := TESTQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestTESTWValidFormsNoError(t *testing.T) {
if _, err := TESTW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := TESTW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := TESTW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := TESTW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := TESTW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestTZCNTLValidFormsNoError(t *testing.T) {
if _, err := TZCNTL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := TZCNTL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestTZCNTQValidFormsNoError(t *testing.T) {
if _, err := TZCNTQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := TZCNTQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestTZCNTWValidFormsNoError(t *testing.T) {
if _, err := TZCNTW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := TZCNTW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestUCOMISDValidFormsNoError(t *testing.T) {
if _, err := UCOMISD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UCOMISD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestUCOMISSValidFormsNoError(t *testing.T) {
if _, err := UCOMISS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UCOMISS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestUD2ValidFormsNoError(t *testing.T) {
if _, err := UD2(); err != nil {
t.Fatal(err)
}
}
func TestUNPCKHPDValidFormsNoError(t *testing.T) {
if _, err := UNPCKHPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UNPCKHPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestUNPCKHPSValidFormsNoError(t *testing.T) {
if _, err := UNPCKHPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UNPCKHPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestUNPCKLPDValidFormsNoError(t *testing.T) {
if _, err := UNPCKLPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UNPCKLPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestUNPCKLPSValidFormsNoError(t *testing.T) {
if _, err := UNPCKLPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := UNPCKLPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPDValidFormsNoError(t *testing.T) {
if _, err := VADDPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VADDPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPD_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPSValidFormsNoError(t *testing.T) {
if _, err := VADDPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VADDPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDPS_ZValidFormsNoError(t *testing.T) {
if _, err := VADDPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VADDPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSDValidFormsNoError(t *testing.T) {
if _, err := VADDSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSD_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSSValidFormsNoError(t *testing.T) {
if _, err := VADDSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSS_ZValidFormsNoError(t *testing.T) {
if _, err := VADDSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVADDSUBPDValidFormsNoError(t *testing.T) {
if _, err := VADDSUBPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVADDSUBPSValidFormsNoError(t *testing.T) {
if _, err := VADDSUBPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VADDSUBPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVAESDECValidFormsNoError(t *testing.T) {
if _, err := VAESDEC(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESDEC(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVAESDECLASTValidFormsNoError(t *testing.T) {
if _, err := VAESDECLAST(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESDECLAST(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVAESENCValidFormsNoError(t *testing.T) {
if _, err := VAESENC(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESENC(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVAESENCLASTValidFormsNoError(t *testing.T) {
if _, err := VAESENCLAST(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESENCLAST(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVAESIMCValidFormsNoError(t *testing.T) {
if _, err := VAESIMC(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESIMC(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVAESKEYGENASSISTValidFormsNoError(t *testing.T) {
if _, err := VAESKEYGENASSIST(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VAESKEYGENASSIST(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGNDValidFormsNoError(t *testing.T) {
if _, err := VALIGND(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGND_BCSTValidFormsNoError(t *testing.T) {
if _, err := VALIGND_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGND_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VALIGND_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGND_ZValidFormsNoError(t *testing.T) {
if _, err := VALIGND_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGND_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGNQValidFormsNoError(t *testing.T) {
if _, err := VALIGNQ(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGNQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VALIGNQ_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGNQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VALIGNQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVALIGNQ_ZValidFormsNoError(t *testing.T) {
if _, err := VALIGNQ_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VALIGNQ_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPDValidFormsNoError(t *testing.T) {
if _, err := VANDNPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VANDNPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VANDNPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPD_ZValidFormsNoError(t *testing.T) {
if _, err := VANDNPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPSValidFormsNoError(t *testing.T) {
if _, err := VANDNPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VANDNPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VANDNPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDNPS_ZValidFormsNoError(t *testing.T) {
if _, err := VANDNPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDNPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPDValidFormsNoError(t *testing.T) {
if _, err := VANDPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VANDPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VANDPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPD_ZValidFormsNoError(t *testing.T) {
if _, err := VANDPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPSValidFormsNoError(t *testing.T) {
if _, err := VANDPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VANDPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VANDPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVANDPS_ZValidFormsNoError(t *testing.T) {
if _, err := VANDPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VANDPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPDValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPD_ZValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPSValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDMPS_ZValidFormsNoError(t *testing.T) {
if _, err := VBLENDMPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDMPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDPDValidFormsNoError(t *testing.T) {
if _, err := VBLENDPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDPSValidFormsNoError(t *testing.T) {
if _, err := VBLENDPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDVPDValidFormsNoError(t *testing.T) {
if _, err := VBLENDVPD(opxmm, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPD(opxmm, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPD(opymm, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPD(opymm, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBLENDVPSValidFormsNoError(t *testing.T) {
if _, err := VBLENDVPS(opxmm, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPS(opxmm, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPS(opymm, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBLENDVPS(opymm, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF128ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF128(opm128, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X2ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X2(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X2_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X2_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X2_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X4ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X4(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X4(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X4(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X4(opm128, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X4_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X4_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X8ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X8(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF32X8(opm256, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF32X8_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF64X2ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF64X2(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF64X2(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF64X2(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF64X2(opm128, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF64X2_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF64X2_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF64X4ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF64X4(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTF64X4(opm256, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTF64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTF64X4_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI128ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI128(opm128, opymm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X2ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X2(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X2_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X2_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X2_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X4ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X4(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X4(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X4(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X4(opm128, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X4_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X4_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X8ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X8(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI32X8(opm256, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI32X8_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI64X2ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI64X2(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI64X2(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI64X2(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI64X2(opm128, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI64X2_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI64X2_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI64X4ValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI64X4(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTI64X4(opm256, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTI64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTI64X4_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTSDValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTSD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTSD_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTSD_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSD_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTSSValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTSS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opm32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVBROADCASTSS_ZValidFormsNoError(t *testing.T) {
if _, err := VBROADCASTSS_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VBROADCASTSS_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCMPPDValidFormsNoError(t *testing.T) {
if _, err := VCMPPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCMPPD_BCST(opimm8, opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_BCST(opimm8, opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_BCST(opimm8, opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_BCST(opimm8, opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_BCST(opimm8, opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_BCST(opimm8, opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCMPPD_SAE(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPD_SAE(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPPSValidFormsNoError(t *testing.T) {
if _, err := VCMPPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCMPPS_BCST(opimm8, opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_BCST(opimm8, opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_BCST(opimm8, opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_BCST(opimm8, opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_BCST(opimm8, opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_BCST(opimm8, opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VCMPPS_SAE(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPPS_SAE(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPSDValidFormsNoError(t *testing.T) {
if _, err := VCMPSD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD(opimm8, opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD(opimm8, opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCMPSD_SAE(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSD_SAE(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPSSValidFormsNoError(t *testing.T) {
if _, err := VCMPSS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS(opimm8, opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS(opimm8, opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCMPSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VCMPSS_SAE(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VCMPSS_SAE(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVCOMISDValidFormsNoError(t *testing.T) {
if _, err := VCOMISD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMISD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMISD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCOMISD_SAE(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMISSValidFormsNoError(t *testing.T) {
if _, err := VCOMISS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMISS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMISS_SAEValidFormsNoError(t *testing.T) {
if _, err := VCOMISS_SAE(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMPRESSPDValidFormsNoError(t *testing.T) {
if _, err := VCOMPRESSPD(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMPRESSPD_ZValidFormsNoError(t *testing.T) {
if _, err := VCOMPRESSPD_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMPRESSPSValidFormsNoError(t *testing.T) {
if _, err := VCOMPRESSPS(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCOMPRESSPS_ZValidFormsNoError(t *testing.T) {
if _, err := VCOMPRESSPS_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VCOMPRESSPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PDValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PD(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PD_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PD_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTDQ2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTDQ2PS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTDQ2PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQXValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQYValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQY(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RD_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_RD_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RD_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RN_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_RN_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RN_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RU_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_RU_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RU_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RZ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_RZ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_RZ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2DQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2DQ_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2DQ_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSXValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSYValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSY(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PSY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PSY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PSY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RD_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_RD_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RD_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RN_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_RN_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RN_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RU_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_RU_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RU_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RZ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_RZ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_RZ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2PS_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2PS_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2QQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2QQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2QQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQXValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQYValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQY(opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RD_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_RD_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RD_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RN_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_RN_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RN_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RU_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_RU_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RU_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RZ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_RZ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_RZ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UDQ_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UDQ_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPD2UQQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPD2UQQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPD2UQQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPH2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTPH2PS(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPH2PS_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPH2PS_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPH2PS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPH2PS_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPH2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPH2PS_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPH2PS_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2DQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2DQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2DQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PDValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opymm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PHValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PH(opimm8, opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PH_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PH_SAE(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_SAE(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PH_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PH_SAE_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2PH_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2PH_Z(opimm8, opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_Z(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_Z(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_Z(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2PH_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RD_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_RD_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RD_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RN_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_RN_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RN_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RU_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_RU_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RU_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RZ_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_RZ_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_RZ_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2QQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2QQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2QQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UDQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UDQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RD_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_RD_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RD_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RN_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_RN_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RN_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RU_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_RU_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RU_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RZ_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_RZ_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_RZ_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTPS2UQQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTPS2UQQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTPS2UQQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PDValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSXValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSYValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSY(opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PSY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PSY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PSY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RD_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_RD_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RD_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RN_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_RN_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RN_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RU_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_RU_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RU_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RZ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_RZ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_RZ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTQQ2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTQQ2PS_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTQQ2PS_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SI(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SI(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIQValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SIQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SIQ_RD_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SIQ_RN_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SIQ_RU_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SIQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SIQ_RZ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SI_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SI_RD_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SI_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SI_RN_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SI_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SI_RU_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SI_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SI_RZ_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SSValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2SS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2SS_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USILValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIL(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2USIL(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIL_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIL_RD_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIL_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIL_RN_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIL_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIL_RU_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIL_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIL_RZ_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIQValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTSD2USIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIQ_RD_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIQ_RN_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIQ_RU_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSD2USIQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSD2USIQ_RZ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDLValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDL(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSI2SDL(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDQValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDQ(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSI2SDQ(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDQ_RD_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDQ_RN_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDQ_RU_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SDQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SDQ_RZ_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSLValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSL(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSI2SSL(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSL_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSL_RD_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSL_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSL_RN_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSL_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSL_RU_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSL_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSL_RZ_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSQValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSQ(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSI2SSQ(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSQ_RD_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSQ_RN_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSQ_RU_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSI2SSQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSI2SSQ_RZ_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SDValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SD(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SD(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SD_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SI(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SI(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIQValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SIQ(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2SIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SIQ_RD_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SIQ_RN_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SIQ_RU_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SIQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SIQ_RZ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SI_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SI_RD_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SI_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SI_RN_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SI_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SI_RU_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2SI_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2SI_RZ_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USILValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2USIL(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIL_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIL_RD_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIL_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIL_RN_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIL_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIL_RU_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIL_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIL_RZ_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIQValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIQ(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTSS2USIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIQ_RD_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIQ_RN_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIQ_RU_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTSS2USIQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTSS2USIQ_RZ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQXValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQYValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQY(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2DQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2DQ_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2DQ_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2QQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2QQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2QQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQXValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQYValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQY(opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UDQ_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UDQ_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPD2UQQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPD2UQQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPD2UQQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2DQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2DQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2DQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2QQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2QQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2QQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UDQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UDQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ_SAE(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_SAE(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ_SAE_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTPS2UQQ_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTTPS2UQQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTTPS2UQQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2SIValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2SI(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSD2SI(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2SIQValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2SIQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSD2SIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2SIQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2SIQ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2SI_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2SI_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2USILValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2USIL(opm64, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSD2USIL(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2USIL_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2USIL_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2USIQValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2USIQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSD2USIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSD2USIQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSD2USIQ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2SIValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2SI(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSS2SI(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2SIQValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2SIQ(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSS2SIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2SIQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2SIQ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2SI_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2SI_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2USILValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2USIL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSS2USIL(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2USIL_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2USIL_SAE(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2USIQValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2USIQ(opm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := VCVTTSS2USIQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTTSS2USIQ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTTSS2USIQ_SAE(opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PDValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PD(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PD_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PD_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUDQ2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUDQ2PS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUDQ2PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PDValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS(opm512, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSXValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSX(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSX(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSX(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSX(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSX_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSX_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSX_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSX_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSX_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSX_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSX_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSYValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSY(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSY(opm256, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSY(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSY(opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSY_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSY_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSY_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSY_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PSY_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PSY_Z(opm256, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PSY_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RD_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_RD_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RD_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RN_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_RN_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RN_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RU_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_RU_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RU_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RZ_SAE(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_RZ_SAE(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_RZ_SAE_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUQQ2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VCVTUQQ2PS_Z(opm512, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUQQ2PS_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDLValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDL(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUSI2SDL(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDQValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDQ(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUSI2SDQ(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDQ_RD_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDQ_RN_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDQ_RU_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SDQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SDQ_RZ_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSLValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSL(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUSI2SSL(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSL_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSL_RD_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSL_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSL_RN_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSL_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSL_RU_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSL_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSL_RZ_SAE(opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSQValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSQ(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VCVTUSI2SSQ(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSQ_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSQ_RD_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSQ_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSQ_RN_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSQ_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSQ_RU_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVCVTUSI2SSQ_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VCVTUSI2SSQ_RZ_SAE(opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDBPSADBWValidFormsNoError(t *testing.T) {
if _, err := VDBPSADBW(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDBPSADBW_ZValidFormsNoError(t *testing.T) {
if _, err := VDBPSADBW_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDBPSADBW_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPDValidFormsNoError(t *testing.T) {
if _, err := VDIVPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPD_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPSValidFormsNoError(t *testing.T) {
if _, err := VDIVPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVPS_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSDValidFormsNoError(t *testing.T) {
if _, err := VDIVSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSD_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSSValidFormsNoError(t *testing.T) {
if _, err := VDIVSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDIVSS_ZValidFormsNoError(t *testing.T) {
if _, err := VDIVSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDIVSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDPPDValidFormsNoError(t *testing.T) {
if _, err := VDPPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDPPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVDPPSValidFormsNoError(t *testing.T) {
if _, err := VDPPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDPPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VDPPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VDPPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PDValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PD_SAEValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PSValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PS_SAEValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXP2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VEXP2PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXP2PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXPANDPDValidFormsNoError(t *testing.T) {
if _, err := VEXPANDPD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXPANDPD_ZValidFormsNoError(t *testing.T) {
if _, err := VEXPANDPD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXPANDPSValidFormsNoError(t *testing.T) {
if _, err := VEXPANDPS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXPANDPS_ZValidFormsNoError(t *testing.T) {
if _, err := VEXPANDPS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VEXPANDPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF128ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF128(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF128(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF32X4ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF32X4(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4(opimm8, opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF32X4_Z(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4_Z(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4_Z(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X4_Z(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF32X8ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF32X8(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X8(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X8(opimm8, opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X8(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF32X8_Z(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF32X8_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF64X2ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF64X2(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2(opimm8, opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF64X2_Z(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2_Z(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2_Z(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X2_Z(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF64X4ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF64X4(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X4(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X4(opimm8, opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X4(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTF64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTF64X4_Z(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTF64X4_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI128ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI128(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI128(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI32X4ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI32X4(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4(opimm8, opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI32X4_Z(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4_Z(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4_Z(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X4_Z(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI32X8ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI32X8(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X8(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X8(opimm8, opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X8(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI32X8_Z(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI32X8_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI64X2ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI64X2(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2(opimm8, opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI64X2_Z(opimm8, opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2_Z(opimm8, opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2_Z(opimm8, opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X2_Z(opimm8, opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI64X4ValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI64X4(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X4(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X4(opimm8, opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X4(opimm8, opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTI64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTI64X4_Z(opimm8, opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTI64X4_Z(opimm8, opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVEXTRACTPSValidFormsNoError(t *testing.T) {
if _, err := VEXTRACTPS(opimm8, opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VEXTRACTPS(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPDValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD_SAE(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_SAE(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPD_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPSValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS_SAE(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_SAE(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMPS_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMPS_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMPS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSDValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSD(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSD_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSD_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSD_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSD_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSSValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSS(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSS_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSS_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFIXUPIMMSS_ZValidFormsNoError(t *testing.T) {
if _, err := VFIXUPIMMSS_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFIXUPIMMSS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PDValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PSValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SDValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SSValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD132SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD132SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD132SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PDValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PSValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SDValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SSValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD213SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD213SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD213SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PDValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PSValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SDValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SSValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADD231SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADD231SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADD231SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PDValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PSValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PDValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PSValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PDValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PSValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMADDSUB231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMADDSUB231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMADDSUB231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB132SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB132SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB132SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB213SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB213SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB213SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SDValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SSValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUB231SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUB231SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUB231SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PDValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PSValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFMSUBADD231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFMSUBADD231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFMSUBADD231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD132SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD132SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD132SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD213SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD213SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD213SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SDValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SSValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMADD231SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMADD231SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMADD231SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB132SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB132SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB132SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB213SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB213SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB213SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231PS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SDValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SD_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SSValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFNMSUB231SS_ZValidFormsNoError(t *testing.T) {
if _, err := VFNMSUB231SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VFNMSUB231SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDXValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDX(opimm8, opm128, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDX(opimm8, opm128, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDX(opimm8, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDX(opimm8, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDX_BCST(opimm8, opm64, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDX_BCST(opimm8, opm64, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDYValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDY(opimm8, opm256, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDY(opimm8, opm256, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDY(opimm8, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDY(opimm8, opymm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDY_BCST(opimm8, opm64, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDY_BCST(opimm8, opm64, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDZValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDZ(opimm8, opm512, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDZ(opimm8, opm512, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDZ(opimm8, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDZ(opimm8, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPDZ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPDZ_BCST(opimm8, opm64, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPDZ_BCST(opimm8, opm64, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSXValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSX(opimm8, opm128, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSX(opimm8, opm128, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSX(opimm8, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSX(opimm8, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSX_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSX_BCST(opimm8, opm32, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSX_BCST(opimm8, opm32, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSYValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSY(opimm8, opm256, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSY(opimm8, opm256, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSY(opimm8, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSY(opimm8, opymm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSY_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSY_BCST(opimm8, opm32, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSY_BCST(opimm8, opm32, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSZValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSZ(opimm8, opm512, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSZ(opimm8, opm512, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSZ(opimm8, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSZ(opimm8, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSPSZ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSPSZ_BCST(opimm8, opm32, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSPSZ_BCST(opimm8, opm32, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSSDValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSSD(opimm8, opm64, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSD(opimm8, opm64, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSD(opimm8, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSD(opimm8, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVFPCLASSSSValidFormsNoError(t *testing.T) {
if _, err := VFPCLASSSS(opimm8, opm32, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSS(opimm8, opm32, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSS(opimm8, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VFPCLASSSS(opimm8, opxmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVGATHERDPDValidFormsNoError(t *testing.T) {
if _, err := VGATHERDPD(opxmm, opvm32x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPD(opymm, opvm32x, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPD(opvm32x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPD(opvm32x, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPD(opvm32y, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGATHERDPSValidFormsNoError(t *testing.T) {
if _, err := VGATHERDPS(opxmm, opvm32x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPS(opymm, opvm32y, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPS(opvm32x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPS(opvm32y, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERDPS(opvm32z, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGATHERQPDValidFormsNoError(t *testing.T) {
if _, err := VGATHERQPD(opxmm, opvm64x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPD(opymm, opvm64y, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPD(opvm64x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPD(opvm64y, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPD(opvm64z, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGATHERQPSValidFormsNoError(t *testing.T) {
if _, err := VGATHERQPS(opxmm, opvm64x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPS(opxmm, opvm64y, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPS(opvm64x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPS(opvm64y, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGATHERQPS(opvm64z, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPDValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPD_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPSValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPPS_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPPS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSDValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSD_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSSValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSS_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSS_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSS_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETEXPSS_ZValidFormsNoError(t *testing.T) {
if _, err := VGETEXPSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETEXPSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPDValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD_SAE(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_SAE(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD_SAE_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPD_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPSValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS_SAE(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_SAE(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS_SAE_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTPS_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTPS_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTPS_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSDValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSD(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSD_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSD_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSD_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSD_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSSValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSS(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSS_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSS_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVGETMANTSS_ZValidFormsNoError(t *testing.T) {
if _, err := VGETMANTSS_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VGETMANTSS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVHADDPDValidFormsNoError(t *testing.T) {
if _, err := VHADDPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVHADDPSValidFormsNoError(t *testing.T) {
if _, err := VHADDPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHADDPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVHSUBPDValidFormsNoError(t *testing.T) {
if _, err := VHSUBPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVHSUBPSValidFormsNoError(t *testing.T) {
if _, err := VHSUBPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VHSUBPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF128ValidFormsNoError(t *testing.T) {
if _, err := VINSERTF128(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF128(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF32X4ValidFormsNoError(t *testing.T) {
if _, err := VINSERTF32X4(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4(opimm8, opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTF32X4_Z(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4_Z(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4_Z(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X4_Z(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF32X8ValidFormsNoError(t *testing.T) {
if _, err := VINSERTF32X8(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X8(opimm8, opm256, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X8(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X8(opimm8, opymm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTF32X8_Z(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF32X8_Z(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF64X2ValidFormsNoError(t *testing.T) {
if _, err := VINSERTF64X2(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2(opimm8, opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTF64X2_Z(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2_Z(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2_Z(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X2_Z(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF64X4ValidFormsNoError(t *testing.T) {
if _, err := VINSERTF64X4(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X4(opimm8, opm256, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X4(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X4(opimm8, opymm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTF64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTF64X4_Z(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTF64X4_Z(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI128ValidFormsNoError(t *testing.T) {
if _, err := VINSERTI128(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI128(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI32X4ValidFormsNoError(t *testing.T) {
if _, err := VINSERTI32X4(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4(opimm8, opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTI32X4_Z(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4_Z(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4_Z(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X4_Z(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI32X8ValidFormsNoError(t *testing.T) {
if _, err := VINSERTI32X8(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X8(opimm8, opm256, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X8(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X8(opimm8, opymm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI32X8_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTI32X8_Z(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI32X8_Z(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI64X2ValidFormsNoError(t *testing.T) {
if _, err := VINSERTI64X2(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2(opimm8, opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTI64X2_Z(opimm8, opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2_Z(opimm8, opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2_Z(opimm8, opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X2_Z(opimm8, opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI64X4ValidFormsNoError(t *testing.T) {
if _, err := VINSERTI64X4(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X4(opimm8, opm256, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X4(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X4(opimm8, opymm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTI64X4_ZValidFormsNoError(t *testing.T) {
if _, err := VINSERTI64X4_Z(opimm8, opm256, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTI64X4_Z(opimm8, opymm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVINSERTPSValidFormsNoError(t *testing.T) {
if _, err := VINSERTPS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VINSERTPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVLDDQUValidFormsNoError(t *testing.T) {
if _, err := VLDDQU(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VLDDQU(opm256, opymm); err != nil {
t.Fatal(err)
}
}
func TestVLDMXCSRValidFormsNoError(t *testing.T) {
if _, err := VLDMXCSR(opm32); err != nil {
t.Fatal(err)
}
}
func TestVMASKMOVDQUValidFormsNoError(t *testing.T) {
if _, err := VMASKMOVDQU(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMASKMOVPDValidFormsNoError(t *testing.T) {
if _, err := VMASKMOVPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPD(opxmm, opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPD(opymm, opymm, opm256); err != nil {
t.Fatal(err)
}
}
func TestVMASKMOVPSValidFormsNoError(t *testing.T) {
if _, err := VMASKMOVPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPS(opxmm, opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMASKMOVPS(opymm, opymm, opm256); err != nil {
t.Fatal(err)
}
}
func TestVMAXPDValidFormsNoError(t *testing.T) {
if _, err := VMAXPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMAXPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMAXPD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPD_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPSValidFormsNoError(t *testing.T) {
if _, err := VMAXPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMAXPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VMAXPS_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPS_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXPS_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSDValidFormsNoError(t *testing.T) {
if _, err := VMAXSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMAXSD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXSD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSD_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSSValidFormsNoError(t *testing.T) {
if _, err := VMAXSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VMAXSS_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSS_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXSS_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMAXSS_ZValidFormsNoError(t *testing.T) {
if _, err := VMAXSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMAXSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPDValidFormsNoError(t *testing.T) {
if _, err := VMINPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMINPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMINPD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPD_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPSValidFormsNoError(t *testing.T) {
if _, err := VMINPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMINPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VMINPS_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPS_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINPS_ZValidFormsNoError(t *testing.T) {
if _, err := VMINPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMINPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSDValidFormsNoError(t *testing.T) {
if _, err := VMINSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMINSD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMINSD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSD_ZValidFormsNoError(t *testing.T) {
if _, err := VMINSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSSValidFormsNoError(t *testing.T) {
if _, err := VMINSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSS_SAEValidFormsNoError(t *testing.T) {
if _, err := VMINSS_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSS_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMINSS_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMINSS_ZValidFormsNoError(t *testing.T) {
if _, err := VMINSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMINSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVAPDValidFormsNoError(t *testing.T) {
if _, err := VMOVAPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVAPD_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVAPD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVAPSValidFormsNoError(t *testing.T) {
if _, err := VMOVAPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVAPS_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVAPS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVAPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDValidFormsNoError(t *testing.T) {
if _, err := VMOVD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVD(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVD(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VMOVD(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVMOVDDUPValidFormsNoError(t *testing.T) {
if _, err := VMOVDDUP(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDDUP_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDDUP_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDDUP_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQAValidFormsNoError(t *testing.T) {
if _, err := VMOVDQA(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQA32ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQA32(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQA32_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQA32_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA32_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQA64ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQA64(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQA64_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQA64_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQA64_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQUValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU16ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU16(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU16_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU16_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU16_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU32ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU32(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU32_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU32_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU32_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU64ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU64(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU64_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU64_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU64_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU8ValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU8(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVDQU8_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVDQU8_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVDQU8_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVHLPSValidFormsNoError(t *testing.T) {
if _, err := VMOVHLPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVHPDValidFormsNoError(t *testing.T) {
if _, err := VMOVHPD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVHPD(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestVMOVHPSValidFormsNoError(t *testing.T) {
if _, err := VMOVHPS(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVHPS(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestVMOVLHPSValidFormsNoError(t *testing.T) {
if _, err := VMOVLHPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVLPDValidFormsNoError(t *testing.T) {
if _, err := VMOVLPD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVLPD(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestVMOVLPSValidFormsNoError(t *testing.T) {
if _, err := VMOVLPS(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVLPS(opxmm, opm64); err != nil {
t.Fatal(err)
}
}
func TestVMOVMSKPDValidFormsNoError(t *testing.T) {
if _, err := VMOVMSKPD(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := VMOVMSKPD(opymm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVMOVMSKPSValidFormsNoError(t *testing.T) {
if _, err := VMOVMSKPS(opxmm, opr32); err != nil {
t.Fatal(err)
}
if _, err := VMOVMSKPS(opymm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVMOVNTDQValidFormsNoError(t *testing.T) {
if _, err := VMOVNTDQ(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTDQ(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTDQ(opzmm, opm512); err != nil {
t.Fatal(err)
}
}
func TestVMOVNTDQAValidFormsNoError(t *testing.T) {
if _, err := VMOVNTDQA(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTDQA(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTDQA(opm512, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVNTPDValidFormsNoError(t *testing.T) {
if _, err := VMOVNTPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTPD(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTPD(opzmm, opm512); err != nil {
t.Fatal(err)
}
}
func TestVMOVNTPSValidFormsNoError(t *testing.T) {
if _, err := VMOVNTPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTPS(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVNTPS(opzmm, opm512); err != nil {
t.Fatal(err)
}
}
func TestVMOVQValidFormsNoError(t *testing.T) {
if _, err := VMOVQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVQ(opr64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVQ(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VMOVQ(opxmm, opr64); err != nil {
t.Fatal(err)
}
if _, err := VMOVQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSDValidFormsNoError(t *testing.T) {
if _, err := VMOVSD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSD_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVSD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSHDUPValidFormsNoError(t *testing.T) {
if _, err := VMOVSHDUP(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSHDUP_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVSHDUP_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSHDUP_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSLDUPValidFormsNoError(t *testing.T) {
if _, err := VMOVSLDUP(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSLDUP_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVSLDUP_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSLDUP_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSSValidFormsNoError(t *testing.T) {
if _, err := VMOVSS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVSS_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVSS_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVUPDValidFormsNoError(t *testing.T) {
if _, err := VMOVUPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVUPD_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVUPD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVUPSValidFormsNoError(t *testing.T) {
if _, err := VMOVUPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMOVUPS_ZValidFormsNoError(t *testing.T) {
if _, err := VMOVUPS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VMOVUPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMPSADBWValidFormsNoError(t *testing.T) {
if _, err := VMPSADBW(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMPSADBW(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMPSADBW(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMPSADBW(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPDValidFormsNoError(t *testing.T) {
if _, err := VMULPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMULPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPD_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPSValidFormsNoError(t *testing.T) {
if _, err := VMULPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VMULPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULPS_ZValidFormsNoError(t *testing.T) {
if _, err := VMULPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VMULPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSDValidFormsNoError(t *testing.T) {
if _, err := VMULSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSD_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSSValidFormsNoError(t *testing.T) {
if _, err := VMULSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVMULSS_ZValidFormsNoError(t *testing.T) {
if _, err := VMULSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VMULSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVORPDValidFormsNoError(t *testing.T) {
if _, err := VORPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VORPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VORPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPD_ZValidFormsNoError(t *testing.T) {
if _, err := VORPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPSValidFormsNoError(t *testing.T) {
if _, err := VORPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VORPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VORPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVORPS_ZValidFormsNoError(t *testing.T) {
if _, err := VORPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VORPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSBValidFormsNoError(t *testing.T) {
if _, err := VPABSB(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSB_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSB_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSDValidFormsNoError(t *testing.T) {
if _, err := VPABSD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPABSD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSD_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSQValidFormsNoError(t *testing.T) {
if _, err := VPABSQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPABSQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSWValidFormsNoError(t *testing.T) {
if _, err := VPABSW(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPABSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPABSW_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPABSW_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSDWValidFormsNoError(t *testing.T) {
if _, err := VPACKSSDW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSDW_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPACKSSDW_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSDW_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKSSDW_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKSSDW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSDW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSWBValidFormsNoError(t *testing.T) {
if _, err := VPACKSSWB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKSSWB_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKSSWB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKSSWB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSDWValidFormsNoError(t *testing.T) {
if _, err := VPACKUSDW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSDW_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPACKUSDW_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSDW_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKUSDW_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKUSDW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSDW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSWBValidFormsNoError(t *testing.T) {
if _, err := VPACKUSWB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPACKUSWB_ZValidFormsNoError(t *testing.T) {
if _, err := VPACKUSWB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPACKUSWB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDBValidFormsNoError(t *testing.T) {
if _, err := VPADDB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDB_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDDValidFormsNoError(t *testing.T) {
if _, err := VPADDD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPADDD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDD_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDQValidFormsNoError(t *testing.T) {
if _, err := VPADDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPADDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDSBValidFormsNoError(t *testing.T) {
if _, err := VPADDSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDSWValidFormsNoError(t *testing.T) {
if _, err := VPADDSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDUSBValidFormsNoError(t *testing.T) {
if _, err := VPADDUSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDUSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDUSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDUSWValidFormsNoError(t *testing.T) {
if _, err := VPADDUSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDUSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDUSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDUSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDWValidFormsNoError(t *testing.T) {
if _, err := VPADDW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPADDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPADDW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPADDW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPALIGNRValidFormsNoError(t *testing.T) {
if _, err := VPALIGNR(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPALIGNR_ZValidFormsNoError(t *testing.T) {
if _, err := VPALIGNR_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPALIGNR_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDValidFormsNoError(t *testing.T) {
if _, err := VPAND(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAND(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAND(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAND(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDDValidFormsNoError(t *testing.T) {
if _, err := VPANDD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPANDD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDD_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNValidFormsNoError(t *testing.T) {
if _, err := VPANDN(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDN(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDN(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDN(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNDValidFormsNoError(t *testing.T) {
if _, err := VPANDND(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDND_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPANDND_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDND_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDND_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDND_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDND_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDND_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNQValidFormsNoError(t *testing.T) {
if _, err := VPANDNQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPANDNQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDNQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDNQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDNQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDNQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDQValidFormsNoError(t *testing.T) {
if _, err := VPANDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPANDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPANDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPANDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPANDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPAVGBValidFormsNoError(t *testing.T) {
if _, err := VPAVGB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPAVGB_ZValidFormsNoError(t *testing.T) {
if _, err := VPAVGB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPAVGWValidFormsNoError(t *testing.T) {
if _, err := VPAVGW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPAVGW_ZValidFormsNoError(t *testing.T) {
if _, err := VPAVGW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPAVGW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDDValidFormsNoError(t *testing.T) {
if _, err := VPBLENDD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMBValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMB_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMDValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMD_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMQValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMWValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDMW_ZValidFormsNoError(t *testing.T) {
if _, err := VPBLENDMW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDMW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDVBValidFormsNoError(t *testing.T) {
if _, err := VPBLENDVB(opymm, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDVB(opymm, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDVB(opxmm, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDVB(opxmm, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPBLENDWValidFormsNoError(t *testing.T) {
if _, err := VPBLENDW(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDW(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDW(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBLENDW(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTBValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTB(opm8, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opm8, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opm8, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opm8, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opm8, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opm8, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opr32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTB_ZValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTB_Z(opm8, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opm8, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opm8, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTB_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTDValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opm32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opr32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTD_ZValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTD_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTD_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTMB2QValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTMB2Q(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTMB2Q(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTMB2Q(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTMW2DValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTMW2D(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTMW2D(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTMW2D(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTQValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opr64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opr64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opr64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opr64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTQ_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTWValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTW(opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opm16, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opm16, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opm16, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opm16, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opr32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPBROADCASTW_ZValidFormsNoError(t *testing.T) {
if _, err := VPBROADCASTW_Z(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opm16, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opr32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opr32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opm16, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opr32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPBROADCASTW_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCLMULQDQValidFormsNoError(t *testing.T) {
if _, err := VPCLMULQDQ(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCLMULQDQ(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPCMPBValidFormsNoError(t *testing.T) {
if _, err := VPCMPB(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPB(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPDValidFormsNoError(t *testing.T) {
if _, err := VPCMPD(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPD_BCST(opimm8, opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD_BCST(opimm8, opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD_BCST(opimm8, opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD_BCST(opimm8, opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD_BCST(opimm8, opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPD_BCST(opimm8, opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQBValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQB(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQDValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQD_BCST(opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD_BCST(opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD_BCST(opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD_BCST(opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD_BCST(opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQD_BCST(opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQQValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQQ_BCST(opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ_BCST(opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ_BCST(opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ_BCST(opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ_BCST(opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQQ_BCST(opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPEQWValidFormsNoError(t *testing.T) {
if _, err := VPCMPEQW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPEQW(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPESTRIValidFormsNoError(t *testing.T) {
if _, err := VPCMPESTRI(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPESTRI(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPCMPESTRMValidFormsNoError(t *testing.T) {
if _, err := VPCMPESTRM(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPESTRM(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTBValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTB(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTDValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTD_BCST(opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD_BCST(opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD_BCST(opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD_BCST(opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD_BCST(opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTD_BCST(opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTQValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTQ_BCST(opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ_BCST(opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ_BCST(opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ_BCST(opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ_BCST(opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTQ_BCST(opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPGTWValidFormsNoError(t *testing.T) {
if _, err := VPCMPGTW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPGTW(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPISTRIValidFormsNoError(t *testing.T) {
if _, err := VPCMPISTRI(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPISTRI(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPCMPISTRMValidFormsNoError(t *testing.T) {
if _, err := VPCMPISTRM(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCMPISTRM(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPCMPQValidFormsNoError(t *testing.T) {
if _, err := VPCMPQ(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPQ_BCST(opimm8, opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ_BCST(opimm8, opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ_BCST(opimm8, opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ_BCST(opimm8, opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ_BCST(opimm8, opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPQ_BCST(opimm8, opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUBValidFormsNoError(t *testing.T) {
if _, err := VPCMPUB(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUB(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUDValidFormsNoError(t *testing.T) {
if _, err := VPCMPUD(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPUD_BCST(opimm8, opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD_BCST(opimm8, opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD_BCST(opimm8, opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD_BCST(opimm8, opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD_BCST(opimm8, opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUD_BCST(opimm8, opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUQValidFormsNoError(t *testing.T) {
if _, err := VPCMPUQ(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCMPUQ_BCST(opimm8, opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ_BCST(opimm8, opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ_BCST(opimm8, opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ_BCST(opimm8, opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ_BCST(opimm8, opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUQ_BCST(opimm8, opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPUWValidFormsNoError(t *testing.T) {
if _, err := VPCMPUW(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPUW(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCMPWValidFormsNoError(t *testing.T) {
if _, err := VPCMPW(opimm8, opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPCMPW(opimm8, opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPCOMPRESSDValidFormsNoError(t *testing.T) {
if _, err := VPCOMPRESSD(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCOMPRESSD_ZValidFormsNoError(t *testing.T) {
if _, err := VPCOMPRESSD_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCOMPRESSQValidFormsNoError(t *testing.T) {
if _, err := VPCOMPRESSQ(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opymm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opzmm, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCOMPRESSQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPCOMPRESSQ_Z(opxmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ_Z(opymm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ_Z(opzmm, opk, opm512); err != nil {
t.Fatal(err)
}
if _, err := VPCOMPRESSQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTDValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTD_ZValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTQValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPCONFLICTQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPCONFLICTQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPCONFLICTQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERM2F128ValidFormsNoError(t *testing.T) {
if _, err := VPERM2F128(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERM2F128(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPERM2I128ValidFormsNoError(t *testing.T) {
if _, err := VPERM2I128(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERM2I128(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPERMBValidFormsNoError(t *testing.T) {
if _, err := VPERMB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMB_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMDValidFormsNoError(t *testing.T) {
if _, err := VPERMD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMD_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2BValidFormsNoError(t *testing.T) {
if _, err := VPERMI2B(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2B_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2B_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2B_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2DValidFormsNoError(t *testing.T) {
if _, err := VPERMI2D(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2D_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMI2D_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2D_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2D_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2D_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2D_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2D_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PDValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PSValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2QValidFormsNoError(t *testing.T) {
if _, err := VPERMI2Q(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2Q_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMI2Q_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2Q_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2Q_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2Q_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2Q_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2Q_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2WValidFormsNoError(t *testing.T) {
if _, err := VPERMI2W(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMI2W_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMI2W_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMI2W_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPDValidFormsNoError(t *testing.T) {
if _, err := VPERMILPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMILPD_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMILPD_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPD_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMILPD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPSValidFormsNoError(t *testing.T) {
if _, err := VPERMILPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMILPS_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMILPS_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMILPS_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMILPS_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMILPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPDValidFormsNoError(t *testing.T) {
if _, err := VPERMPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMPD_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMPD_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPD_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMPD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPSValidFormsNoError(t *testing.T) {
if _, err := VPERMPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMPS_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMQValidFormsNoError(t *testing.T) {
if _, err := VPERMQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2BValidFormsNoError(t *testing.T) {
if _, err := VPERMT2B(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2B_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2B_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2B_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2DValidFormsNoError(t *testing.T) {
if _, err := VPERMT2D(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2D_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMT2D_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2D_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2D_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2D_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2D_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2D_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PDValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PD_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PSValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2PS_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2PS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2PS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2QValidFormsNoError(t *testing.T) {
if _, err := VPERMT2Q(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2Q_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPERMT2Q_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2Q_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2Q_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2Q_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2Q_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2Q_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2WValidFormsNoError(t *testing.T) {
if _, err := VPERMT2W(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMT2W_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMT2W_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMT2W_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMWValidFormsNoError(t *testing.T) {
if _, err := VPERMW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPERMW_ZValidFormsNoError(t *testing.T) {
if _, err := VPERMW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPERMW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPEXPANDDValidFormsNoError(t *testing.T) {
if _, err := VPEXPANDD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPEXPANDD_ZValidFormsNoError(t *testing.T) {
if _, err := VPEXPANDD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPEXPANDQValidFormsNoError(t *testing.T) {
if _, err := VPEXPANDQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPEXPANDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPEXPANDQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPEXPANDQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPEXTRBValidFormsNoError(t *testing.T) {
if _, err := VPEXTRB(opimm8, opxmm, opm8); err != nil {
t.Fatal(err)
}
if _, err := VPEXTRB(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVPEXTRDValidFormsNoError(t *testing.T) {
if _, err := VPEXTRD(opimm8, opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPEXTRD(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVPEXTRQValidFormsNoError(t *testing.T) {
if _, err := VPEXTRQ(opimm8, opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPEXTRQ(opimm8, opxmm, opr64); err != nil {
t.Fatal(err)
}
}
func TestVPEXTRWValidFormsNoError(t *testing.T) {
if _, err := VPEXTRW(opimm8, opxmm, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPEXTRW(opimm8, opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVPGATHERDDValidFormsNoError(t *testing.T) {
if _, err := VPGATHERDD(opxmm, opvm32x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDD(opymm, opvm32y, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDD(opvm32x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDD(opvm32y, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDD(opvm32z, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPGATHERDQValidFormsNoError(t *testing.T) {
if _, err := VPGATHERDQ(opxmm, opvm32x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDQ(opymm, opvm32x, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDQ(opvm32x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDQ(opvm32x, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERDQ(opvm32y, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPGATHERQDValidFormsNoError(t *testing.T) {
if _, err := VPGATHERQD(opxmm, opvm64x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQD(opxmm, opvm64y, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQD(opvm64x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQD(opvm64y, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQD(opvm64z, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPGATHERQQValidFormsNoError(t *testing.T) {
if _, err := VPGATHERQQ(opxmm, opvm64x, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQQ(opymm, opvm64y, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQQ(opvm64x, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQQ(opvm64y, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPGATHERQQ(opvm64z, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPHADDDValidFormsNoError(t *testing.T) {
if _, err := VPHADDD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHADDSWValidFormsNoError(t *testing.T) {
if _, err := VPHADDSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHADDWValidFormsNoError(t *testing.T) {
if _, err := VPHADDW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHADDW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHMINPOSUWValidFormsNoError(t *testing.T) {
if _, err := VPHMINPOSUW(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHMINPOSUW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHSUBDValidFormsNoError(t *testing.T) {
if _, err := VPHSUBD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHSUBSWValidFormsNoError(t *testing.T) {
if _, err := VPHSUBSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPHSUBWValidFormsNoError(t *testing.T) {
if _, err := VPHSUBW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPHSUBW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPINSRBValidFormsNoError(t *testing.T) {
if _, err := VPINSRB(opimm8, opm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPINSRB(opimm8, opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPINSRDValidFormsNoError(t *testing.T) {
if _, err := VPINSRD(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPINSRD(opimm8, opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPINSRQValidFormsNoError(t *testing.T) {
if _, err := VPINSRQ(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPINSRQ(opimm8, opr64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPINSRWValidFormsNoError(t *testing.T) {
if _, err := VPINSRW(opimm8, opm16, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPINSRW(opimm8, opr32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTDValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTD_ZValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTQValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTQ(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTQ_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTQ_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPLZCNTQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPLZCNTQ_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPLZCNTQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52HUQValidFormsNoError(t *testing.T) {
if _, err := VPMADD52HUQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52HUQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMADD52HUQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52HUQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADD52HUQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52HUQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADD52HUQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52HUQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52LUQValidFormsNoError(t *testing.T) {
if _, err := VPMADD52LUQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52LUQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMADD52LUQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52LUQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADD52LUQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADD52LUQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADD52LUQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADD52LUQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADDUBSWValidFormsNoError(t *testing.T) {
if _, err := VPMADDUBSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADDUBSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADDUBSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDUBSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADDWDValidFormsNoError(t *testing.T) {
if _, err := VPMADDWD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMADDWD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMADDWD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMADDWD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMASKMOVDValidFormsNoError(t *testing.T) {
if _, err := VPMASKMOVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVD(opxmm, opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVD(opymm, opymm, opm256); err != nil {
t.Fatal(err)
}
}
func TestVPMASKMOVQValidFormsNoError(t *testing.T) {
if _, err := VPMASKMOVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVQ(opxmm, opxmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMASKMOVQ(opymm, opymm, opm256); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSBValidFormsNoError(t *testing.T) {
if _, err := VPMAXSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSDValidFormsNoError(t *testing.T) {
if _, err := VPMAXSD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMAXSD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSQValidFormsNoError(t *testing.T) {
if _, err := VPMAXSQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMAXSQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSWValidFormsNoError(t *testing.T) {
if _, err := VPMAXSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUBValidFormsNoError(t *testing.T) {
if _, err := VPMAXUB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUDValidFormsNoError(t *testing.T) {
if _, err := VPMAXUD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMAXUD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUQValidFormsNoError(t *testing.T) {
if _, err := VPMAXUQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMAXUQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUWValidFormsNoError(t *testing.T) {
if _, err := VPMAXUW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMAXUW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMAXUW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMAXUW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSBValidFormsNoError(t *testing.T) {
if _, err := VPMINSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSDValidFormsNoError(t *testing.T) {
if _, err := VPMINSD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMINSD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSQValidFormsNoError(t *testing.T) {
if _, err := VPMINSQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMINSQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSWValidFormsNoError(t *testing.T) {
if _, err := VPMINSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUBValidFormsNoError(t *testing.T) {
if _, err := VPMINUB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUDValidFormsNoError(t *testing.T) {
if _, err := VPMINUD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMINUD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUQValidFormsNoError(t *testing.T) {
if _, err := VPMINUQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMINUQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUWValidFormsNoError(t *testing.T) {
if _, err := VPMINUW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMINUW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMINUW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMINUW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVB2MValidFormsNoError(t *testing.T) {
if _, err := VPMOVB2M(opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVB2M(opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVB2M(opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPMOVD2MValidFormsNoError(t *testing.T) {
if _, err := VPMOVD2M(opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVD2M(opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVD2M(opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPMOVDBValidFormsNoError(t *testing.T) {
if _, err := VPMOVDB(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVDB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVDB_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVDWValidFormsNoError(t *testing.T) {
if _, err := VPMOVDW(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVDW_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVDW_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVM2BValidFormsNoError(t *testing.T) {
if _, err := VPMOVM2B(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2B(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2B(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVM2DValidFormsNoError(t *testing.T) {
if _, err := VPMOVM2D(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2D(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2D(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVM2QValidFormsNoError(t *testing.T) {
if _, err := VPMOVM2Q(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2Q(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2Q(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVM2WValidFormsNoError(t *testing.T) {
if _, err := VPMOVM2W(opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2W(opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVM2W(opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVMSKBValidFormsNoError(t *testing.T) {
if _, err := VPMOVMSKB(opymm, opr32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVMSKB(opxmm, opr32); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQ2MValidFormsNoError(t *testing.T) {
if _, err := VPMOVQ2M(opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQ2M(opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQ2M(opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQBValidFormsNoError(t *testing.T) {
if _, err := VPMOVQB(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opxmm, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opymm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opzmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVQB_Z(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB_Z(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB_Z(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQDValidFormsNoError(t *testing.T) {
if _, err := VPMOVQD(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVQD_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQD_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQWValidFormsNoError(t *testing.T) {
if _, err := VPMOVQW(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVQW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVQW_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVQW_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSDBValidFormsNoError(t *testing.T) {
if _, err := VPMOVSDB(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSDB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSDB_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSDWValidFormsNoError(t *testing.T) {
if _, err := VPMOVSDW(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSDW_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSDW_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQBValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQB(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opxmm, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opymm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opzmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQB_Z(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB_Z(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB_Z(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQDValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQD(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQD_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQD_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQWValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQW(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSQW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSQW_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSQW_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSWBValidFormsNoError(t *testing.T) {
if _, err := VPMOVSWB(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSWB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSWB_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSWB_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBDValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBD(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opm128, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBD_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBD_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBQValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBQ(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBQ_Z(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBQ_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBWValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBW(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXBW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXBW_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXBW_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXDQValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXDQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXDQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXDQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXWDValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXWD(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXWD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXWD_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWD_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXWQValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXWQ(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opm128, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVSXWQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVSXWQ_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVSXWQ_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSDBValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSDB(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSDB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSDB_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSDWValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSDW(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSDW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSDW_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSDW_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQBValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQB(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opxmm, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opymm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opzmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQB_Z(opxmm, opk, opm16); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB_Z(opymm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB_Z(opzmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQB_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQDValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQD(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQD_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQD_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQWValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQW(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opxmm, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opymm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opzmm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW(opzmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSQW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSQW_Z(opxmm, opk, opm32); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW_Z(opymm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW_Z(opzmm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSQW_Z(opzmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSWBValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSWB(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVUSWB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVUSWB_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVUSWB_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVW2MValidFormsNoError(t *testing.T) {
if _, err := VPMOVW2M(opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVW2M(opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPMOVW2M(opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPMOVWBValidFormsNoError(t *testing.T) {
if _, err := VPMOVWB(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opxmm, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opymm, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opymm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opzmm, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB(opzmm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVWB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVWB_Z(opxmm, opk, opm64); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB_Z(opymm, opk, opm128); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB_Z(opymm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB_Z(opzmm, opk, opm256); err != nil {
t.Fatal(err)
}
if _, err := VPMOVWB_Z(opzmm, opk, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBDValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBD(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opm128, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBD_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBD_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBQValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBQ(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opm16, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opm64, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBQ_Z(opm16, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBQ_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBWValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBW(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXBW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXBW_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXBW_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXDQValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXDQ(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXDQ_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXDQ_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXWDValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXWD(opm128, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opm256, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD(opymm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXWD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXWD_Z(opm128, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD_Z(opm256, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWD_Z(opymm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXWQValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXWQ(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opm128, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ(opxmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMOVZXWQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMOVZXWQ_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ_Z(opxmm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ_Z(opm128, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMOVZXWQ_Z(opxmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULDQValidFormsNoError(t *testing.T) {
if _, err := VPMULDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMULDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHRSWValidFormsNoError(t *testing.T) {
if _, err := VPMULHRSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHRSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULHRSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHRSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHUWValidFormsNoError(t *testing.T) {
if _, err := VPMULHUW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHUW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULHUW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHUW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHWValidFormsNoError(t *testing.T) {
if _, err := VPMULHW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULHW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULHW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULHW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLDValidFormsNoError(t *testing.T) {
if _, err := VPMULLD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMULLD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULLD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLD_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULLD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLQValidFormsNoError(t *testing.T) {
if _, err := VPMULLQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMULLQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULLQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULLQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLWValidFormsNoError(t *testing.T) {
if _, err := VPMULLW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULLW_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULLW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULLW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULTISHIFTQBValidFormsNoError(t *testing.T) {
if _, err := VPMULTISHIFTQB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULTISHIFTQB_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMULTISHIFTQB_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULTISHIFTQB_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULTISHIFTQB_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULTISHIFTQB_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULTISHIFTQB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULTISHIFTQB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULUDQValidFormsNoError(t *testing.T) {
if _, err := VPMULUDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULUDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPMULUDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULUDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULUDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPMULUDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPMULUDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPMULUDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTDValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTD_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTD_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTD_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTD_ZValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTQValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTQ(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTQ(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTQ(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTQ(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTQ_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTQ_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTQ_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPOPCNTQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPOPCNTQ_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPOPCNTQ_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORValidFormsNoError(t *testing.T) {
if _, err := VPOR(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPOR(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPOR(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPOR(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPORDValidFormsNoError(t *testing.T) {
if _, err := VPORD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPORD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPORD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORD_ZValidFormsNoError(t *testing.T) {
if _, err := VPORD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORQValidFormsNoError(t *testing.T) {
if _, err := VPORQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPORQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPORQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPORQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPORQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPORQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLDValidFormsNoError(t *testing.T) {
if _, err := VPROLD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPROLD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLD_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLQValidFormsNoError(t *testing.T) {
if _, err := VPROLQ(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPROLQ_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLQ_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLQ_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVDValidFormsNoError(t *testing.T) {
if _, err := VPROLVD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPROLVD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVD_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLVD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVQValidFormsNoError(t *testing.T) {
if _, err := VPROLVQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPROLVQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPROLVQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPROLVQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPROLVQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORDValidFormsNoError(t *testing.T) {
if _, err := VPRORD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPRORD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORD_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORQValidFormsNoError(t *testing.T) {
if _, err := VPRORQ(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPRORQ_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORQ_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORQ_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVDValidFormsNoError(t *testing.T) {
if _, err := VPRORVD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPRORVD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVD_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORVD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVQValidFormsNoError(t *testing.T) {
if _, err := VPRORVQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPRORVQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPRORVQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPRORVQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPRORVQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSADBWValidFormsNoError(t *testing.T) {
if _, err := VPSADBW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSADBW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSADBW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSADBW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSADBW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSADBW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSCATTERDDValidFormsNoError(t *testing.T) {
if _, err := VPSCATTERDD(opxmm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERDD(opymm, opk, opvm32y); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERDD(opzmm, opk, opvm32z); err != nil {
t.Fatal(err)
}
}
func TestVPSCATTERDQValidFormsNoError(t *testing.T) {
if _, err := VPSCATTERDQ(opxmm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERDQ(opymm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERDQ(opzmm, opk, opvm32y); err != nil {
t.Fatal(err)
}
}
func TestVPSCATTERQDValidFormsNoError(t *testing.T) {
if _, err := VPSCATTERQD(opxmm, opk, opvm64x); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERQD(opxmm, opk, opvm64y); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERQD(opymm, opk, opvm64z); err != nil {
t.Fatal(err)
}
}
func TestVPSCATTERQQValidFormsNoError(t *testing.T) {
if _, err := VPSCATTERQQ(opxmm, opk, opvm64x); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERQQ(opymm, opk, opvm64y); err != nil {
t.Fatal(err)
}
if _, err := VPSCATTERQQ(opzmm, opk, opvm64z); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFBValidFormsNoError(t *testing.T) {
if _, err := VPSHUFB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFB_ZValidFormsNoError(t *testing.T) {
if _, err := VPSHUFB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFDValidFormsNoError(t *testing.T) {
if _, err := VPSHUFD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSHUFD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSHUFD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSHUFD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFHWValidFormsNoError(t *testing.T) {
if _, err := VPSHUFHW(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFHW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSHUFHW_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFHW_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFLWValidFormsNoError(t *testing.T) {
if _, err := VPSHUFLW(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSHUFLW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSHUFLW_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSHUFLW_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSIGNBValidFormsNoError(t *testing.T) {
if _, err := VPSIGNB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPSIGNDValidFormsNoError(t *testing.T) {
if _, err := VPSIGND(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGND(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGND(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGND(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPSIGNWValidFormsNoError(t *testing.T) {
if _, err := VPSIGNW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSIGNW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLDValidFormsNoError(t *testing.T) {
if _, err := VPSLLD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLDQValidFormsNoError(t *testing.T) {
if _, err := VPSLLDQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLDQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLDQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLDQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLDQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLDQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSLLD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLD_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLQValidFormsNoError(t *testing.T) {
if _, err := VPSLLQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSLLQ_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLQ_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLQ_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLQ_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVDValidFormsNoError(t *testing.T) {
if _, err := VPSLLVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSLLVD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLVD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVQValidFormsNoError(t *testing.T) {
if _, err := VPSLLVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSLLVQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLVQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVWValidFormsNoError(t *testing.T) {
if _, err := VPSLLVW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLVW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLVW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLVW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLWValidFormsNoError(t *testing.T) {
if _, err := VPSLLW(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSLLW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSLLW_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSLLW_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRADValidFormsNoError(t *testing.T) {
if _, err := VPSRAD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRAD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAD_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAQValidFormsNoError(t *testing.T) {
if _, err := VPSRAQ(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRAQ_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAQ_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAQ_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAQ_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVDValidFormsNoError(t *testing.T) {
if _, err := VPSRAVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRAVD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAVD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVQValidFormsNoError(t *testing.T) {
if _, err := VPSRAVQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRAVQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAVQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVWValidFormsNoError(t *testing.T) {
if _, err := VPSRAVW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAVW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAVW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAVW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAWValidFormsNoError(t *testing.T) {
if _, err := VPSRAW(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRAW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRAW_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRAW_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLDValidFormsNoError(t *testing.T) {
if _, err := VPSRLD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLDQValidFormsNoError(t *testing.T) {
if _, err := VPSRLDQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLDQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLDQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLDQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLDQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLDQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRLD_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLD_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLD_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLQValidFormsNoError(t *testing.T) {
if _, err := VPSRLQ(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRLQ_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLQ_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLQ_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLQ_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVDValidFormsNoError(t *testing.T) {
if _, err := VPSRLVD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRLVD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLVD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVQValidFormsNoError(t *testing.T) {
if _, err := VPSRLVQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSRLVQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLVQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVWValidFormsNoError(t *testing.T) {
if _, err := VPSRLVW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLVW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLVW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLVW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLWValidFormsNoError(t *testing.T) {
if _, err := VPSRLW(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opm128, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW(opxmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSRLW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSRLW_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opm128, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opxmm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opm128, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSRLW_Z(opxmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBBValidFormsNoError(t *testing.T) {
if _, err := VPSUBB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBB_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBDValidFormsNoError(t *testing.T) {
if _, err := VPSUBD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSUBD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBD_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBQValidFormsNoError(t *testing.T) {
if _, err := VPSUBQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPSUBQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBSBValidFormsNoError(t *testing.T) {
if _, err := VPSUBSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBSWValidFormsNoError(t *testing.T) {
if _, err := VPSUBSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBUSBValidFormsNoError(t *testing.T) {
if _, err := VPSUBUSB(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBUSB_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBUSB_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSB_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBUSWValidFormsNoError(t *testing.T) {
if _, err := VPSUBUSW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBUSW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBUSW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBUSW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBWValidFormsNoError(t *testing.T) {
if _, err := VPSUBW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPSUBW_ZValidFormsNoError(t *testing.T) {
if _, err := VPSUBW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPSUBW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGDValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGD(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGD_ZValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGQValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGQ(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTERNLOGQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPTERNLOGQ_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPTERNLOGQ_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPTESTValidFormsNoError(t *testing.T) {
if _, err := VPTEST(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTEST(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPTEST(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPTEST(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMBValidFormsNoError(t *testing.T) {
if _, err := VPTESTMB(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMB(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMDValidFormsNoError(t *testing.T) {
if _, err := VPTESTMD(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTESTMD_BCST(opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD_BCST(opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD_BCST(opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD_BCST(opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD_BCST(opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMD_BCST(opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMQValidFormsNoError(t *testing.T) {
if _, err := VPTESTMQ(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTESTMQ_BCST(opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ_BCST(opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ_BCST(opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ_BCST(opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ_BCST(opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMQ_BCST(opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTMWValidFormsNoError(t *testing.T) {
if _, err := VPTESTMW(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTMW(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMBValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMB(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMB(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMDValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMD(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMD_BCST(opm32, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD_BCST(opm32, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD_BCST(opm32, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD_BCST(opm32, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD_BCST(opm32, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMD_BCST(opm32, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMQValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMQ(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMQ_BCST(opm64, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ_BCST(opm64, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ_BCST(opm64, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ_BCST(opm64, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ_BCST(opm64, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMQ_BCST(opm64, opzmm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPTESTNMWValidFormsNoError(t *testing.T) {
if _, err := VPTESTNMW(opm512, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opm512, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opzmm, opzmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opzmm, opzmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opm128, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opm128, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opm256, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opm256, opymm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opxmm, opxmm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opxmm, opxmm, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opymm, opymm, opk, opk); err != nil {
t.Fatal(err)
}
if _, err := VPTESTNMW(opymm, opymm, opk); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHBWValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHBW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHBW_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHBW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHBW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHDQValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHDQ_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHDQ_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHQDQValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHQDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHQDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHQDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHQDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHQDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHQDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHQDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHQDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHWDValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHWD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKHWD_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKHWD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKHWD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLBWValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLBW(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLBW_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLBW_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLBW_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLDQValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLDQ_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLDQ_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLQDQValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLQDQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLQDQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLQDQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLQDQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLQDQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLQDQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLQDQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLQDQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLWDValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLWD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPUNPCKLWD_ZValidFormsNoError(t *testing.T) {
if _, err := VPUNPCKLWD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPUNPCKLWD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORValidFormsNoError(t *testing.T) {
if _, err := VPXOR(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXOR(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXOR(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXOR(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORDValidFormsNoError(t *testing.T) {
if _, err := VPXORD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPXORD_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPXORD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORD_ZValidFormsNoError(t *testing.T) {
if _, err := VPXORD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORQValidFormsNoError(t *testing.T) {
if _, err := VPXORQ(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORQ_BCSTValidFormsNoError(t *testing.T) {
if _, err := VPXORQ_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORQ_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VPXORQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVPXORQ_ZValidFormsNoError(t *testing.T) {
if _, err := VPXORQ_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VPXORQ_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPDValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD_SAE(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_SAE(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPD_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPSValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS_SAE(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_SAE(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS_SAE_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGEPS_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGEPS_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGEPS_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESDValidFormsNoError(t *testing.T) {
if _, err := VRANGESD(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRANGESD_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESD_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGESD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESD_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGESD_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESSValidFormsNoError(t *testing.T) {
if _, err := VRANGESS(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRANGESS_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESS_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGESS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRANGESS_ZValidFormsNoError(t *testing.T) {
if _, err := VRANGESS_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRANGESS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PDValidFormsNoError(t *testing.T) {
if _, err := VRCP14PD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRCP14PD_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14PD_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PD_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14PD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PSValidFormsNoError(t *testing.T) {
if _, err := VRCP14PS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRCP14PS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14PS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14PS_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14PS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14SDValidFormsNoError(t *testing.T) {
if _, err := VRCP14SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14SD_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14SSValidFormsNoError(t *testing.T) {
if _, err := VRCP14SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP14SS_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP14SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP14SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PDValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PD_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PSValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28PS_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SDValidFormsNoError(t *testing.T) {
if _, err := VRCP28SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRCP28SD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28SD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SD_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SSValidFormsNoError(t *testing.T) {
if _, err := VRCP28SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRCP28SS_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SS_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28SS_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCP28SS_ZValidFormsNoError(t *testing.T) {
if _, err := VRCP28SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCP28SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRCPPSValidFormsNoError(t *testing.T) {
if _, err := VRCPPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCPPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRCPPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCPPS(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVRCPSSValidFormsNoError(t *testing.T) {
if _, err := VRCPSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRCPSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPDValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPD_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPD_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPD_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPSValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPS(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPS_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPS_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCEPS_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCEPS_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCEPS_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCESDValidFormsNoError(t *testing.T) {
if _, err := VREDUCESD(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCESD_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCESD_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCESSValidFormsNoError(t *testing.T) {
if _, err := VREDUCESS(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVREDUCESS_ZValidFormsNoError(t *testing.T) {
if _, err := VREDUCESS_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VREDUCESS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPDValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST(opimm8, opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD_BCST_Z(opimm8, opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST_Z(opimm8, opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_BCST_Z(opimm8, opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD_SAE(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_SAE(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD_SAE_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPD_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPD_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPD_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPSValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST(opimm8, opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS_BCST_Z(opimm8, opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST_Z(opimm8, opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_BCST_Z(opimm8, opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS_SAE(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_SAE(opimm8, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS_SAE_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALEPS_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALEPS_Z(opimm8, opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_Z(opimm8, opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_Z(opimm8, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_Z(opimm8, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_Z(opimm8, opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALEPS_Z(opimm8, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESDValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESD(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESD_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESD_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESD_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESD_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESD_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESSValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESS(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESS_SAE(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESS_SAE(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRNDSCALESS_ZValidFormsNoError(t *testing.T) {
if _, err := VRNDSCALESS_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRNDSCALESS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVROUNDPDValidFormsNoError(t *testing.T) {
if _, err := VROUNDPD(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPD(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPD(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPD(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVROUNDPSValidFormsNoError(t *testing.T) {
if _, err := VROUNDPS(opimm8, opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPS(opimm8, opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPS(opimm8, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDPS(opimm8, opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVROUNDSDValidFormsNoError(t *testing.T) {
if _, err := VROUNDSD(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDSD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVROUNDSSValidFormsNoError(t *testing.T) {
if _, err := VROUNDSS(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VROUNDSS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PDValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PD_BCST(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST(opm64, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PD_BCST_Z(opm64, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST_Z(opm64, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PD_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PSValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14PS_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14PS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14SDValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14SD_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14SSValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT14SS_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT14SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT14SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PDValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PD_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PSValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28PS_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28PS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28PS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SDValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SD_SAEValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SD_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SSValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SS_SAEValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SS_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SS_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SS_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SS_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRT28SS_ZValidFormsNoError(t *testing.T) {
if _, err := VRSQRT28SS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRT28SS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRTPSValidFormsNoError(t *testing.T) {
if _, err := VRSQRTPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRTPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRTPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRTPS(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVRSQRTSSValidFormsNoError(t *testing.T) {
if _, err := VRSQRTSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VRSQRTSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPDValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPD_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPSValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFPS_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSDValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSD_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSSValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCALEFSS_ZValidFormsNoError(t *testing.T) {
if _, err := VSCALEFSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSCALEFSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSCATTERDPDValidFormsNoError(t *testing.T) {
if _, err := VSCATTERDPD(opxmm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERDPD(opymm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERDPD(opzmm, opk, opvm32y); err != nil {
t.Fatal(err)
}
}
func TestVSCATTERDPSValidFormsNoError(t *testing.T) {
if _, err := VSCATTERDPS(opxmm, opk, opvm32x); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERDPS(opymm, opk, opvm32y); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERDPS(opzmm, opk, opvm32z); err != nil {
t.Fatal(err)
}
}
func TestVSCATTERQPDValidFormsNoError(t *testing.T) {
if _, err := VSCATTERQPD(opxmm, opk, opvm64x); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERQPD(opymm, opk, opvm64y); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERQPD(opzmm, opk, opvm64z); err != nil {
t.Fatal(err)
}
}
func TestVSCATTERQPSValidFormsNoError(t *testing.T) {
if _, err := VSCATTERQPS(opxmm, opk, opvm64x); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERQPS(opxmm, opk, opvm64y); err != nil {
t.Fatal(err)
}
if _, err := VSCATTERQPS(opymm, opk, opvm64z); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF32X4ValidFormsNoError(t *testing.T) {
if _, err := VSHUFF32X4(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF32X4_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFF32X4_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF32X4_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFF32X4_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFF32X4_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF32X4_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF64X2ValidFormsNoError(t *testing.T) {
if _, err := VSHUFF64X2(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF64X2_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFF64X2_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF64X2_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFF64X2_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFF64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFF64X2_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFF64X2_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI32X4ValidFormsNoError(t *testing.T) {
if _, err := VSHUFI32X4(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI32X4_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFI32X4_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI32X4_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFI32X4_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI32X4_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFI32X4_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI32X4_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI64X2ValidFormsNoError(t *testing.T) {
if _, err := VSHUFI64X2(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI64X2_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFI64X2_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI64X2_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFI64X2_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFI64X2_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFI64X2_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFI64X2_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPDValidFormsNoError(t *testing.T) {
if _, err := VSHUFPD(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFPD_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST(opimm8, opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST(opimm8, opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST(opimm8, opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFPD_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPD_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFPD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPSValidFormsNoError(t *testing.T) {
if _, err := VSHUFPS(opimm8, opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS(opimm8, opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSHUFPS_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST(opimm8, opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST(opimm8, opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST(opimm8, opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFPS_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSHUFPS_ZValidFormsNoError(t *testing.T) {
if _, err := VSHUFPS_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_Z(opimm8, opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_Z(opimm8, opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSHUFPS_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPDValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST(opm64, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_BCST_Z(opm64, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPD_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPD_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPD_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPSValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opm512, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_BCST(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST(opm32, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST(opm32, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_BCST_Z(opm32, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST_Z(opm32, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_BCST_Z(opm32, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RD_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_RD_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RD_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RN_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_RN_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RN_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RU_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_RU_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RU_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RZ_SAE(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_RZ_SAE(opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_RZ_SAE_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTPS_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTPS_Z(opm128, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_Z(opm256, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_Z(opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_Z(opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_Z(opm512, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTPS_Z(opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSDValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSD_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSSValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSQRTSS_ZValidFormsNoError(t *testing.T) {
if _, err := VSQRTSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSQRTSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSTMXCSRValidFormsNoError(t *testing.T) {
if _, err := VSTMXCSR(opm32); err != nil {
t.Fatal(err)
}
}
func TestVSUBPDValidFormsNoError(t *testing.T) {
if _, err := VSUBPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPD_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPSValidFormsNoError(t *testing.T) {
if _, err := VSUBPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RD_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_RD_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RD_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RN_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_RN_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RN_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RU_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_RU_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RU_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RZ_SAE(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_RZ_SAE(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_RZ_SAE_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBPS_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSDValidFormsNoError(t *testing.T) {
if _, err := VSUBSD(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSD_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSD_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSSValidFormsNoError(t *testing.T) {
if _, err := VSUBSS(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RD_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RD_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS_RD_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RD_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RD_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RN_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RN_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS_RN_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RN_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RN_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RU_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RU_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS_RU_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RU_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RU_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RZ_SAEValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RZ_SAE(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS_RZ_SAE(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_RZ_SAE_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_RZ_SAE_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVSUBSS_ZValidFormsNoError(t *testing.T) {
if _, err := VSUBSS_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VSUBSS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVTESTPDValidFormsNoError(t *testing.T) {
if _, err := VTESTPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPD(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPD(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVTESTPSValidFormsNoError(t *testing.T) {
if _, err := VTESTPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPS(opm256, opymm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VTESTPS(opymm, opymm); err != nil {
t.Fatal(err)
}
}
func TestVUCOMISDValidFormsNoError(t *testing.T) {
if _, err := VUCOMISD(opm64, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUCOMISD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVUCOMISD_SAEValidFormsNoError(t *testing.T) {
if _, err := VUCOMISD_SAE(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVUCOMISSValidFormsNoError(t *testing.T) {
if _, err := VUCOMISS(opm32, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUCOMISS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVUCOMISS_SAEValidFormsNoError(t *testing.T) {
if _, err := VUCOMISS_SAE(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPDValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPD_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPSValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKHPS_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKHPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKHPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPDValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPD_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPSValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVUNPCKLPS_ZValidFormsNoError(t *testing.T) {
if _, err := VUNPCKLPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VUNPCKLPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPDValidFormsNoError(t *testing.T) {
if _, err := VXORPD(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPD_BCSTValidFormsNoError(t *testing.T) {
if _, err := VXORPD_BCST(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST(opm64, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST(opm64, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST(opm64, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPD_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VXORPD_BCST_Z(opm64, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST_Z(opm64, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_BCST_Z(opm64, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPD_ZValidFormsNoError(t *testing.T) {
if _, err := VXORPD_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPD_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPSValidFormsNoError(t *testing.T) {
if _, err := VXORPS(opm128, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opm256, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opxmm, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opymm, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opm512, opzmm, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS(opzmm, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPS_BCSTValidFormsNoError(t *testing.T) {
if _, err := VXORPS_BCST(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST(opm32, opxmm, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST(opm32, opymm, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST(opm32, opzmm, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPS_BCST_ZValidFormsNoError(t *testing.T) {
if _, err := VXORPS_BCST_Z(opm32, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST_Z(opm32, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_BCST_Z(opm32, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVXORPS_ZValidFormsNoError(t *testing.T) {
if _, err := VXORPS_Z(opm128, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_Z(opm256, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_Z(opxmm, opxmm, opk, opxmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_Z(opymm, opymm, opk, opymm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_Z(opm512, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
if _, err := VXORPS_Z(opzmm, opzmm, opk, opzmm); err != nil {
t.Fatal(err)
}
}
func TestVZEROALLValidFormsNoError(t *testing.T) {
if _, err := VZEROALL(); err != nil {
t.Fatal(err)
}
}
func TestVZEROUPPERValidFormsNoError(t *testing.T) {
if _, err := VZEROUPPER(); err != nil {
t.Fatal(err)
}
}
func TestXADDBValidFormsNoError(t *testing.T) {
if _, err := XADDB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := XADDB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestXADDLValidFormsNoError(t *testing.T) {
if _, err := XADDL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := XADDL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestXADDQValidFormsNoError(t *testing.T) {
if _, err := XADDQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := XADDQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestXADDWValidFormsNoError(t *testing.T) {
if _, err := XADDW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := XADDW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestXCHGBValidFormsNoError(t *testing.T) {
if _, err := XCHGB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := XCHGB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := XCHGB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestXCHGLValidFormsNoError(t *testing.T) {
if _, err := XCHGL(opeax, opr32); err != nil {
t.Fatal(err)
}
if _, err := XCHGL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := XCHGL(opr32, opeax); err != nil {
t.Fatal(err)
}
if _, err := XCHGL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := XCHGL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestXCHGQValidFormsNoError(t *testing.T) {
if _, err := XCHGQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := XCHGQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := XCHGQ(opr64, opr64); err != nil {
t.Fatal(err)
}
if _, err := XCHGQ(opr64, oprax); err != nil {
t.Fatal(err)
}
if _, err := XCHGQ(oprax, opr64); err != nil {
t.Fatal(err)
}
}
func TestXCHGWValidFormsNoError(t *testing.T) {
if _, err := XCHGW(opax, opr16); err != nil {
t.Fatal(err)
}
if _, err := XCHGW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := XCHGW(opr16, opax); err != nil {
t.Fatal(err)
}
if _, err := XCHGW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := XCHGW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
func TestXGETBVValidFormsNoError(t *testing.T) {
if _, err := XGETBV(); err != nil {
t.Fatal(err)
}
}
func TestXLATValidFormsNoError(t *testing.T) {
if _, err := XLAT(); err != nil {
t.Fatal(err)
}
}
func TestXORBValidFormsNoError(t *testing.T) {
if _, err := XORB(opimm8, opal); err != nil {
t.Fatal(err)
}
if _, err := XORB(opimm8, opm8); err != nil {
t.Fatal(err)
}
if _, err := XORB(opimm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := XORB(opm8, opr8); err != nil {
t.Fatal(err)
}
if _, err := XORB(opr8, opm8); err != nil {
t.Fatal(err)
}
if _, err := XORB(opr8, opr8); err != nil {
t.Fatal(err)
}
}
func TestXORLValidFormsNoError(t *testing.T) {
if _, err := XORL(opimm32, opeax); err != nil {
t.Fatal(err)
}
if _, err := XORL(opimm32, opm32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opimm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opimm8, opm32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opimm8, opr32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opm32, opr32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opr32, opm32); err != nil {
t.Fatal(err)
}
if _, err := XORL(opr32, opr32); err != nil {
t.Fatal(err)
}
}
func TestXORPDValidFormsNoError(t *testing.T) {
if _, err := XORPD(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := XORPD(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestXORPSValidFormsNoError(t *testing.T) {
if _, err := XORPS(opm128, opxmm); err != nil {
t.Fatal(err)
}
if _, err := XORPS(opxmm, opxmm); err != nil {
t.Fatal(err)
}
}
func TestXORQValidFormsNoError(t *testing.T) {
if _, err := XORQ(opimm32, opm64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opimm32, opr64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opimm32, oprax); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opimm8, opm64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opimm8, opr64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opm64, opr64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opr64, opm64); err != nil {
t.Fatal(err)
}
if _, err := XORQ(opr64, opr64); err != nil {
t.Fatal(err)
}
}
func TestXORWValidFormsNoError(t *testing.T) {
if _, err := XORW(opimm16, opax); err != nil {
t.Fatal(err)
}
if _, err := XORW(opimm16, opm16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opimm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opimm8, opm16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opimm8, opr16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opm16, opr16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opr16, opm16); err != nil {
t.Fatal(err)
}
if _, err := XORW(opr16, opr16); err != nil {
t.Fatal(err)
}
}
golang-github-mmcloughlin-avo-0.5.0/x86/zoptab.go 0000664 0000000 0000000 00010221412 14370657153 0021633 0 ustar 00root root 0000000 0000000 // Code generated by command: avogen -output zoptab.go optab. DO NOT EDIT.
package x86
import (
"github.com/mmcloughlin/avo/operand"
"github.com/mmcloughlin/avo/reg"
)
// maxoperands is the maximum number of operands in an instruction form, including implicit operands.
const maxoperands = 6
type oprndtype uint8
const (
oprndtypeNone oprndtype = iota
oprndtype1
oprndtype3
oprndtypeAL
oprndtypeAX
oprndtypeCL
oprndtypeEAX
oprndtypeIMM16
oprndtypeIMM2U
oprndtypeIMM32
oprndtypeIMM64
oprndtypeIMM8
oprndtypeK
oprndtypeM
oprndtypeM128
oprndtypeM16
oprndtypeM256
oprndtypeM32
oprndtypeM512
oprndtypeM64
oprndtypeM8
oprndtypeR16
oprndtypeR32
oprndtypeR64
oprndtypeR8
oprndtypeRAX
oprndtypeREL32
oprndtypeREL8
oprndtypeVM32X
oprndtypeVM32Y
oprndtypeVM32Z
oprndtypeVM64X
oprndtypeVM64Y
oprndtypeVM64Z
oprndtypeXMM
oprndtypeXMM0
oprndtypeYMM
oprndtypeZMM
oprndtypemax
)
func (o oprndtype) Match(op operand.Op) bool {
switch o {
default:
return false
case oprndtype1:
return operand.Is1(op)
case oprndtype3:
return operand.Is3(op)
case oprndtypeAL:
return operand.IsAL(op)
case oprndtypeAX:
return operand.IsAX(op)
case oprndtypeCL:
return operand.IsCL(op)
case oprndtypeEAX:
return operand.IsEAX(op)
case oprndtypeIMM16:
return operand.IsIMM16(op)
case oprndtypeIMM2U:
return operand.IsIMM2U(op)
case oprndtypeIMM32:
return operand.IsIMM32(op)
case oprndtypeIMM64:
return operand.IsIMM64(op)
case oprndtypeIMM8:
return operand.IsIMM8(op)
case oprndtypeK:
return operand.IsK(op)
case oprndtypeM:
return operand.IsM(op)
case oprndtypeM128:
return operand.IsM128(op)
case oprndtypeM16:
return operand.IsM16(op)
case oprndtypeM256:
return operand.IsM256(op)
case oprndtypeM32:
return operand.IsM32(op)
case oprndtypeM512:
return operand.IsM512(op)
case oprndtypeM64:
return operand.IsM64(op)
case oprndtypeM8:
return operand.IsM8(op)
case oprndtypeR16:
return operand.IsR16(op)
case oprndtypeR32:
return operand.IsR32(op)
case oprndtypeR64:
return operand.IsR64(op)
case oprndtypeR8:
return operand.IsR8(op)
case oprndtypeRAX:
return operand.IsRAX(op)
case oprndtypeREL32:
return operand.IsREL32(op)
case oprndtypeREL8:
return operand.IsREL8(op)
case oprndtypeVM32X:
return operand.IsVM32X(op)
case oprndtypeVM32Y:
return operand.IsVM32Y(op)
case oprndtypeVM32Z:
return operand.IsVM32Z(op)
case oprndtypeVM64X:
return operand.IsVM64X(op)
case oprndtypeVM64Y:
return operand.IsVM64Y(op)
case oprndtypeVM64Z:
return operand.IsVM64Z(op)
case oprndtypeXMM:
return operand.IsXMM(op)
case oprndtypeXMM0:
return operand.IsXMM0(op)
case oprndtypeYMM:
return operand.IsYMM(op)
case oprndtypeZMM:
return operand.IsZMM(op)
}
}
type implreg uint8
const (
implregNone implreg = iota
implregAL
implregAX
implregDX
implregEAX
implregEBX
implregECX
implregEDX
implregR11
implregRAX
implregRBX
implregRCX
implregRDI
implregRDX
implregX0
implregmax
)
func (i implreg) Register() reg.Register {
switch i {
default:
panic("unexpected implicit register type")
case implregAL:
return reg.AL
case implregAX:
return reg.AX
case implregDX:
return reg.DX
case implregEAX:
return reg.EAX
case implregEBX:
return reg.EBX
case implregECX:
return reg.ECX
case implregEDX:
return reg.EDX
case implregR11:
return reg.R11
case implregRAX:
return reg.RAX
case implregRBX:
return reg.RBX
case implregRCX:
return reg.RCX
case implregRDI:
return reg.RDI
case implregRDX:
return reg.RDX
case implregX0:
return reg.X0
}
}
type sffx uint8
const (
sffxNone sffx = iota
sffxBCST
sffxRD_SAE
sffxRN_SAE
sffxRU_SAE
sffxRZ_SAE
sffxSAE
sffxZ
sffxmax
)
// maxsuffixes is the maximum number of suffixes an instruction can have.
const maxsuffixes = 2
type sffxs [maxsuffixes]sffx
func (s sffxs) Strings() []string {
return sffxsstringsmap[s]
}
var sffxsstringsmap = map[sffxs][]string{
{sffxBCST, sffxZ}: {"BCST", "Z"},
{sffxBCST}: {"BCST"},
{sffxRD_SAE, sffxZ}: {"RD_SAE", "Z"},
{sffxRD_SAE}: {"RD_SAE"},
{sffxRN_SAE, sffxZ}: {"RN_SAE", "Z"},
{sffxRN_SAE}: {"RN_SAE"},
{sffxRU_SAE, sffxZ}: {"RU_SAE", "Z"},
{sffxRU_SAE}: {"RU_SAE"},
{sffxRZ_SAE, sffxZ}: {"RZ_SAE", "Z"},
{sffxRZ_SAE}: {"RZ_SAE"},
{sffxSAE, sffxZ}: {"SAE", "Z"},
{sffxSAE}: {"SAE"},
{sffxZ}: {"Z"},
{}: nil,
}
type sffxscls uint8
const (
sffxsclsNone sffxscls = iota
sffxsclsBCST
sffxsclsBCST_Z
sffxsclsER
sffxsclsER_Z
sffxsclsNIL
sffxsclsSAE
sffxsclsSAE_Z
sffxsclsZ
sffxsclsmax
)
func (s sffxscls) SuffixesSet() map[sffxs]bool {
if sffxsclsNone < s && s < sffxsclsmax {
return sffxsclssuffixessettable[s-1]
}
return nil
}
var sffxsclssuffixessettable = []map[sffxs]bool{
{sffxs{sffxBCST}: true},
{sffxs{sffxBCST, sffxZ}: true},
{sffxs{sffxRD_SAE}: true, sffxs{sffxRN_SAE}: true, sffxs{sffxRU_SAE}: true, sffxs{sffxRZ_SAE}: true},
{sffxs{sffxRD_SAE, sffxZ}: true, sffxs{sffxRN_SAE, sffxZ}: true, sffxs{sffxRU_SAE, sffxZ}: true, sffxs{sffxRZ_SAE, sffxZ}: true},
{sffxs{}: true},
{sffxs{sffxSAE}: true},
{sffxs{sffxSAE, sffxZ}: true},
{sffxs{sffxZ}: true},
}
type isas uint8
const (
isasNone isas = iota
isasBase
isasADX
isasSSE2
isasSSE
isasSSE3
isasAES
isasBMI
isasSSE41
isasBMI2
isasCLFLUSH
isasCLFLUSHOPT
isasCMOV
isasCPUID
isasSSE42
isasAVX512DQ
isasAVX512BW
isasAVX512F
isasLZCNT
isasMONITOR
isasMOVBE
isasSSSE3
isasPCLMULQDQ
isasPOPCNT
isasMMX
isasRDRAND
isasRDSEED
isasRDTSC
isasRDTSCP
isasSHA
isasAVX
isasAVX512F_AVX512VL
isasAES_AVX
isasAVX512DQ_AVX512VL
isasAVX2
isasF16C
isasAVX512VL
isasAVX512BW_AVX512VL
isasAVX512ER
isasFMA3
isasAVX512CD_AVX512VL
isasAVX512CD
isasAVX_PCLMULQDQ
isasAVX512VBMI_AVX512VL
isasAVX512VBMI
isasAVX512IFMA_AVX512VL
isasAVX512IFMA
isasAVX512VPOPCNTDQ
isasAVX512BW_AVX512F
isasmax
)
func (i isas) List() []string {
if isasNone < i && i < isasmax {
return isaslisttable[i-1]
}
return nil
}
var isaslisttable = [][]string{
nil,
{"ADX"},
{"SSE2"},
{"SSE"},
{"SSE3"},
{"AES"},
{"BMI"},
{"SSE4.1"},
{"BMI2"},
{"CLFLUSH"},
{"CLFLUSHOPT"},
{"CMOV"},
{"CPUID"},
{"SSE4.2"},
{"AVX512DQ"},
{"AVX512BW"},
{"AVX512F"},
{"LZCNT"},
{"MONITOR"},
{"MOVBE"},
{"SSSE3"},
{"PCLMULQDQ"},
{"POPCNT"},
{"MMX+"},
{"RDRAND"},
{"RDSEED"},
{"RDTSC"},
{"RDTSCP"},
{"SHA"},
{"AVX"},
{"AVX512F", "AVX512VL"},
{"AES", "AVX"},
{"AVX512DQ", "AVX512VL"},
{"AVX2"},
{"F16C"},
{"AVX512VL"},
{"AVX512BW", "AVX512VL"},
{"AVX512ER"},
{"FMA3"},
{"AVX512CD", "AVX512VL"},
{"AVX512CD"},
{"AVX", "PCLMULQDQ"},
{"AVX512VBMI", "AVX512VL"},
{"AVX512VBMI"},
{"AVX512IFMA", "AVX512VL"},
{"AVX512IFMA"},
{"AVX512VPOPCNTDQ"},
{"AVX512BW", "AVX512F"},
}
type opc uint16
const (
opcNone opc = iota
opcADCB
opcADCL
opcADCQ
opcADCW
opcADCXL
opcADCXQ
opcADDB
opcADDL
opcADDPD
opcADDPS
opcADDQ
opcADDSD
opcADDSS
opcADDSUBPD
opcADDSUBPS
opcADDW
opcADOXL
opcADOXQ
opcAESDEC
opcAESDECLAST
opcAESENC
opcAESENCLAST
opcAESIMC
opcAESKEYGENASSIST
opcANDB
opcANDL
opcANDNL
opcANDNPD
opcANDNPS
opcANDNQ
opcANDPD
opcANDPS
opcANDQ
opcANDW
opcBEXTRL
opcBEXTRQ
opcBLENDPD
opcBLENDPS
opcBLENDVPD
opcBLENDVPS
opcBLSIL
opcBLSIQ
opcBLSMSKL
opcBLSMSKQ
opcBLSRL
opcBLSRQ
opcBSFL
opcBSFQ
opcBSFW
opcBSRL
opcBSRQ
opcBSRW
opcBSWAPL
opcBSWAPQ
opcBTCL
opcBTCQ
opcBTCW
opcBTL
opcBTQ
opcBTRL
opcBTRQ
opcBTRW
opcBTSL
opcBTSQ
opcBTSW
opcBTW
opcBZHIL
opcBZHIQ
opcCALL
opcCBW
opcCDQ
opcCDQE
opcCLC
opcCLD
opcCLFLUSH
opcCLFLUSHOPT
opcCMC
opcCMOVLCC
opcCMOVLCS
opcCMOVLEQ
opcCMOVLGE
opcCMOVLGT
opcCMOVLHI
opcCMOVLLE
opcCMOVLLS
opcCMOVLLT
opcCMOVLMI
opcCMOVLNE
opcCMOVLOC
opcCMOVLOS
opcCMOVLPC
opcCMOVLPL
opcCMOVLPS
opcCMOVQCC
opcCMOVQCS
opcCMOVQEQ
opcCMOVQGE
opcCMOVQGT
opcCMOVQHI
opcCMOVQLE
opcCMOVQLS
opcCMOVQLT
opcCMOVQMI
opcCMOVQNE
opcCMOVQOC
opcCMOVQOS
opcCMOVQPC
opcCMOVQPL
opcCMOVQPS
opcCMOVWCC
opcCMOVWCS
opcCMOVWEQ
opcCMOVWGE
opcCMOVWGT
opcCMOVWHI
opcCMOVWLE
opcCMOVWLS
opcCMOVWLT
opcCMOVWMI
opcCMOVWNE
opcCMOVWOC
opcCMOVWOS
opcCMOVWPC
opcCMOVWPL
opcCMOVWPS
opcCMPB
opcCMPL
opcCMPPD
opcCMPPS
opcCMPQ
opcCMPSD
opcCMPSS
opcCMPW
opcCMPXCHG16B
opcCMPXCHG8B
opcCMPXCHGB
opcCMPXCHGL
opcCMPXCHGQ
opcCMPXCHGW
opcCOMISD
opcCOMISS
opcCPUID
opcCQO
opcCRC32B
opcCRC32L
opcCRC32Q
opcCRC32W
opcCVTPD2PL
opcCVTPD2PS
opcCVTPL2PD
opcCVTPL2PS
opcCVTPS2PD
opcCVTPS2PL
opcCVTSD2SL
opcCVTSD2SS
opcCVTSL2SD
opcCVTSL2SS
opcCVTSQ2SD
opcCVTSQ2SS
opcCVTSS2SD
opcCVTSS2SL
opcCVTTPD2PL
opcCVTTPS2PL
opcCVTTSD2SL
opcCVTTSD2SQ
opcCVTTSS2SL
opcCWD
opcCWDE
opcDECB
opcDECL
opcDECQ
opcDECW
opcDIVB
opcDIVL
opcDIVPD
opcDIVPS
opcDIVQ
opcDIVSD
opcDIVSS
opcDIVW
opcDPPD
opcDPPS
opcEXTRACTPS
opcHADDPD
opcHADDPS
opcHSUBPD
opcHSUBPS
opcIDIVB
opcIDIVL
opcIDIVQ
opcIDIVW
opcIMUL3L
opcIMUL3Q
opcIMUL3W
opcIMULB
opcIMULL
opcIMULQ
opcIMULW
opcINCB
opcINCL
opcINCQ
opcINCW
opcINSERTPS
opcINT
opcJA
opcJAE
opcJB
opcJBE
opcJC
opcJCC
opcJCS
opcJCXZL
opcJCXZQ
opcJE
opcJEQ
opcJG
opcJGE
opcJGT
opcJHI
opcJHS
opcJL
opcJLE
opcJLO
opcJLS
opcJLT
opcJMI
opcJMP
opcJNA
opcJNAE
opcJNB
opcJNBE
opcJNC
opcJNE
opcJNG
opcJNGE
opcJNL
opcJNLE
opcJNO
opcJNP
opcJNS
opcJNZ
opcJO
opcJOC
opcJOS
opcJP
opcJPC
opcJPE
opcJPL
opcJPO
opcJPS
opcJS
opcJZ
opcKADDB
opcKADDD
opcKADDQ
opcKADDW
opcKANDB
opcKANDD
opcKANDNB
opcKANDND
opcKANDNQ
opcKANDNW
opcKANDQ
opcKANDW
opcKMOVB
opcKMOVD
opcKMOVQ
opcKMOVW
opcKNOTB
opcKNOTD
opcKNOTQ
opcKNOTW
opcKORB
opcKORD
opcKORQ
opcKORTESTB
opcKORTESTD
opcKORTESTQ
opcKORTESTW
opcKORW
opcKSHIFTLB
opcKSHIFTLD
opcKSHIFTLQ
opcKSHIFTLW
opcKSHIFTRB
opcKSHIFTRD
opcKSHIFTRQ
opcKSHIFTRW
opcKTESTB
opcKTESTD
opcKTESTQ
opcKTESTW
opcKUNPCKBW
opcKUNPCKDQ
opcKUNPCKWD
opcKXNORB
opcKXNORD
opcKXNORQ
opcKXNORW
opcKXORB
opcKXORD
opcKXORQ
opcKXORW
opcLDDQU
opcLDMXCSR
opcLEAL
opcLEAQ
opcLEAW
opcLFENCE
opcLZCNTL
opcLZCNTQ
opcLZCNTW
opcMASKMOVDQU
opcMASKMOVOU
opcMAXPD
opcMAXPS
opcMAXSD
opcMAXSS
opcMFENCE
opcMINPD
opcMINPS
opcMINSD
opcMINSS
opcMONITOR
opcMOVAPD
opcMOVAPS
opcMOVB
opcMOVBELL
opcMOVBEQQ
opcMOVBEWW
opcMOVBLSX
opcMOVBLZX
opcMOVBQSX
opcMOVBQZX
opcMOVBWSX
opcMOVBWZX
opcMOVD
opcMOVDDUP
opcMOVDQ2Q
opcMOVHLPS
opcMOVHPD
opcMOVHPS
opcMOVL
opcMOVLHPS
opcMOVLPD
opcMOVLPS
opcMOVLQSX
opcMOVLQZX
opcMOVMSKPD
opcMOVMSKPS
opcMOVNTDQ
opcMOVNTDQA
opcMOVNTIL
opcMOVNTIQ
opcMOVNTO
opcMOVNTPD
opcMOVNTPS
opcMOVO
opcMOVOA
opcMOVOU
opcMOVQ
opcMOVSD
opcMOVSHDUP
opcMOVSLDUP
opcMOVSS
opcMOVUPD
opcMOVUPS
opcMOVW
opcMOVWLSX
opcMOVWLZX
opcMOVWQSX
opcMOVWQZX
opcMPSADBW
opcMULB
opcMULL
opcMULPD
opcMULPS
opcMULQ
opcMULSD
opcMULSS
opcMULW
opcMULXL
opcMULXQ
opcMWAIT
opcNEGB
opcNEGL
opcNEGQ
opcNEGW
opcNOP
opcNOTB
opcNOTL
opcNOTQ
opcNOTW
opcORB
opcORL
opcORPD
opcORPS
opcORQ
opcORW
opcPABSB
opcPABSD
opcPABSW
opcPACKSSLW
opcPACKSSWB
opcPACKUSDW
opcPACKUSWB
opcPADDB
opcPADDD
opcPADDL
opcPADDQ
opcPADDSB
opcPADDSW
opcPADDUSB
opcPADDUSW
opcPADDW
opcPALIGNR
opcPAND
opcPANDN
opcPAUSE
opcPAVGB
opcPAVGW
opcPBLENDVB
opcPBLENDW
opcPCLMULQDQ
opcPCMPEQB
opcPCMPEQL
opcPCMPEQQ
opcPCMPEQW
opcPCMPESTRI
opcPCMPESTRM
opcPCMPGTB
opcPCMPGTL
opcPCMPGTQ
opcPCMPGTW
opcPCMPISTRI
opcPCMPISTRM
opcPDEPL
opcPDEPQ
opcPEXTL
opcPEXTQ
opcPEXTRB
opcPEXTRD
opcPEXTRQ
opcPEXTRW
opcPHADDD
opcPHADDSW
opcPHADDW
opcPHMINPOSUW
opcPHSUBD
opcPHSUBSW
opcPHSUBW
opcPINSRB
opcPINSRD
opcPINSRQ
opcPINSRW
opcPMADDUBSW
opcPMADDWL
opcPMAXSB
opcPMAXSD
opcPMAXSW
opcPMAXUB
opcPMAXUD
opcPMAXUW
opcPMINSB
opcPMINSD
opcPMINSW
opcPMINUB
opcPMINUD
opcPMINUW
opcPMOVMSKB
opcPMOVSXBD
opcPMOVSXBQ
opcPMOVSXBW
opcPMOVSXDQ
opcPMOVSXWD
opcPMOVSXWQ
opcPMOVZXBD
opcPMOVZXBQ
opcPMOVZXBW
opcPMOVZXDQ
opcPMOVZXWD
opcPMOVZXWQ
opcPMULDQ
opcPMULHRSW
opcPMULHUW
opcPMULHW
opcPMULLD
opcPMULLW
opcPMULULQ
opcPOPCNTL
opcPOPCNTQ
opcPOPCNTW
opcPOPQ
opcPOPW
opcPOR
opcPREFETCHNTA
opcPREFETCHT0
opcPREFETCHT1
opcPREFETCHT2
opcPSADBW
opcPSHUFB
opcPSHUFD
opcPSHUFHW
opcPSHUFL
opcPSHUFLW
opcPSIGNB
opcPSIGND
opcPSIGNW
opcPSLLDQ
opcPSLLL
opcPSLLO
opcPSLLQ
opcPSLLW
opcPSRAL
opcPSRAW
opcPSRLDQ
opcPSRLL
opcPSRLO
opcPSRLQ
opcPSRLW
opcPSUBB
opcPSUBL
opcPSUBQ
opcPSUBSB
opcPSUBSW
opcPSUBUSB
opcPSUBUSW
opcPSUBW
opcPTEST
opcPUNPCKHBW
opcPUNPCKHLQ
opcPUNPCKHQDQ
opcPUNPCKHWL
opcPUNPCKLBW
opcPUNPCKLLQ
opcPUNPCKLQDQ
opcPUNPCKLWL
opcPUSHQ
opcPUSHW
opcPXOR
opcRCLB
opcRCLL
opcRCLQ
opcRCLW
opcRCPPS
opcRCPSS
opcRCRB
opcRCRL
opcRCRQ
opcRCRW
opcRDRANDL
opcRDSEEDL
opcRDTSC
opcRDTSCP
opcRET
opcRETFL
opcRETFQ
opcRETFW
opcROLB
opcROLL
opcROLQ
opcROLW
opcRORB
opcRORL
opcRORQ
opcRORW
opcRORXL
opcRORXQ
opcROUNDPD
opcROUNDPS
opcROUNDSD
opcROUNDSS
opcRSQRTPS
opcRSQRTSS
opcSALB
opcSALL
opcSALQ
opcSALW
opcSARB
opcSARL
opcSARQ
opcSARW
opcSARXL
opcSARXQ
opcSBBB
opcSBBL
opcSBBQ
opcSBBW
opcSETCC
opcSETCS
opcSETEQ
opcSETGE
opcSETGT
opcSETHI
opcSETLE
opcSETLS
opcSETLT
opcSETMI
opcSETNE
opcSETOC
opcSETOS
opcSETPC
opcSETPL
opcSETPS
opcSFENCE
opcSHA1MSG1
opcSHA1MSG2
opcSHA1NEXTE
opcSHA1RNDS4
opcSHA256MSG1
opcSHA256MSG2
opcSHA256RNDS2
opcSHLB
opcSHLL
opcSHLQ
opcSHLW
opcSHLXL
opcSHLXQ
opcSHRB
opcSHRL
opcSHRQ
opcSHRW
opcSHRXL
opcSHRXQ
opcSHUFPD
opcSHUFPS
opcSQRTPD
opcSQRTPS
opcSQRTSD
opcSQRTSS
opcSTC
opcSTD
opcSTMXCSR
opcSUBB
opcSUBL
opcSUBPD
opcSUBPS
opcSUBQ
opcSUBSD
opcSUBSS
opcSUBW
opcSYSCALL
opcTESTB
opcTESTL
opcTESTQ
opcTESTW
opcTZCNTL
opcTZCNTQ
opcTZCNTW
opcUCOMISD
opcUCOMISS
opcUD2
opcUNPCKHPD
opcUNPCKHPS
opcUNPCKLPD
opcUNPCKLPS
opcVADDPD
opcVADDPS
opcVADDSD
opcVADDSS
opcVADDSUBPD
opcVADDSUBPS
opcVAESDEC
opcVAESDECLAST
opcVAESENC
opcVAESENCLAST
opcVAESIMC
opcVAESKEYGENASSIST
opcVALIGND
opcVALIGNQ
opcVANDNPD
opcVANDNPS
opcVANDPD
opcVANDPS
opcVBLENDMPD
opcVBLENDMPS
opcVBLENDPD
opcVBLENDPS
opcVBLENDVPD
opcVBLENDVPS
opcVBROADCASTF128
opcVBROADCASTF32X2
opcVBROADCASTF32X4
opcVBROADCASTF32X8
opcVBROADCASTF64X2
opcVBROADCASTF64X4
opcVBROADCASTI128
opcVBROADCASTI32X2
opcVBROADCASTI32X4
opcVBROADCASTI32X8
opcVBROADCASTI64X2
opcVBROADCASTI64X4
opcVBROADCASTSD
opcVBROADCASTSS
opcVCMPPD
opcVCMPPS
opcVCMPSD
opcVCMPSS
opcVCOMISD
opcVCOMISS
opcVCOMPRESSPD
opcVCOMPRESSPS
opcVCVTDQ2PD
opcVCVTDQ2PS
opcVCVTPD2DQ
opcVCVTPD2DQX
opcVCVTPD2DQY
opcVCVTPD2PS
opcVCVTPD2PSX
opcVCVTPD2PSY
opcVCVTPD2QQ
opcVCVTPD2UDQ
opcVCVTPD2UDQX
opcVCVTPD2UDQY
opcVCVTPD2UQQ
opcVCVTPH2PS
opcVCVTPS2DQ
opcVCVTPS2PD
opcVCVTPS2PH
opcVCVTPS2QQ
opcVCVTPS2UDQ
opcVCVTPS2UQQ
opcVCVTQQ2PD
opcVCVTQQ2PS
opcVCVTQQ2PSX
opcVCVTQQ2PSY
opcVCVTSD2SI
opcVCVTSD2SIQ
opcVCVTSD2SS
opcVCVTSD2USIL
opcVCVTSD2USIQ
opcVCVTSI2SDL
opcVCVTSI2SDQ
opcVCVTSI2SSL
opcVCVTSI2SSQ
opcVCVTSS2SD
opcVCVTSS2SI
opcVCVTSS2SIQ
opcVCVTSS2USIL
opcVCVTSS2USIQ
opcVCVTTPD2DQ
opcVCVTTPD2DQX
opcVCVTTPD2DQY
opcVCVTTPD2QQ
opcVCVTTPD2UDQ
opcVCVTTPD2UDQX
opcVCVTTPD2UDQY
opcVCVTTPD2UQQ
opcVCVTTPS2DQ
opcVCVTTPS2QQ
opcVCVTTPS2UDQ
opcVCVTTPS2UQQ
opcVCVTTSD2SI
opcVCVTTSD2SIQ
opcVCVTTSD2USIL
opcVCVTTSD2USIQ
opcVCVTTSS2SI
opcVCVTTSS2SIQ
opcVCVTTSS2USIL
opcVCVTTSS2USIQ
opcVCVTUDQ2PD
opcVCVTUDQ2PS
opcVCVTUQQ2PD
opcVCVTUQQ2PS
opcVCVTUQQ2PSX
opcVCVTUQQ2PSY
opcVCVTUSI2SDL
opcVCVTUSI2SDQ
opcVCVTUSI2SSL
opcVCVTUSI2SSQ
opcVDBPSADBW
opcVDIVPD
opcVDIVPS
opcVDIVSD
opcVDIVSS
opcVDPPD
opcVDPPS
opcVEXP2PD
opcVEXP2PS
opcVEXPANDPD
opcVEXPANDPS
opcVEXTRACTF128
opcVEXTRACTF32X4
opcVEXTRACTF32X8
opcVEXTRACTF64X2
opcVEXTRACTF64X4
opcVEXTRACTI128
opcVEXTRACTI32X4
opcVEXTRACTI32X8
opcVEXTRACTI64X2
opcVEXTRACTI64X4
opcVEXTRACTPS
opcVFIXUPIMMPD
opcVFIXUPIMMPS
opcVFIXUPIMMSD
opcVFIXUPIMMSS
opcVFMADD132PD
opcVFMADD132PS
opcVFMADD132SD
opcVFMADD132SS
opcVFMADD213PD
opcVFMADD213PS
opcVFMADD213SD
opcVFMADD213SS
opcVFMADD231PD
opcVFMADD231PS
opcVFMADD231SD
opcVFMADD231SS
opcVFMADDSUB132PD
opcVFMADDSUB132PS
opcVFMADDSUB213PD
opcVFMADDSUB213PS
opcVFMADDSUB231PD
opcVFMADDSUB231PS
opcVFMSUB132PD
opcVFMSUB132PS
opcVFMSUB132SD
opcVFMSUB132SS
opcVFMSUB213PD
opcVFMSUB213PS
opcVFMSUB213SD
opcVFMSUB213SS
opcVFMSUB231PD
opcVFMSUB231PS
opcVFMSUB231SD
opcVFMSUB231SS
opcVFMSUBADD132PD
opcVFMSUBADD132PS
opcVFMSUBADD213PD
opcVFMSUBADD213PS
opcVFMSUBADD231PD
opcVFMSUBADD231PS
opcVFNMADD132PD
opcVFNMADD132PS
opcVFNMADD132SD
opcVFNMADD132SS
opcVFNMADD213PD
opcVFNMADD213PS
opcVFNMADD213SD
opcVFNMADD213SS
opcVFNMADD231PD
opcVFNMADD231PS
opcVFNMADD231SD
opcVFNMADD231SS
opcVFNMSUB132PD
opcVFNMSUB132PS
opcVFNMSUB132SD
opcVFNMSUB132SS
opcVFNMSUB213PD
opcVFNMSUB213PS
opcVFNMSUB213SD
opcVFNMSUB213SS
opcVFNMSUB231PD
opcVFNMSUB231PS
opcVFNMSUB231SD
opcVFNMSUB231SS
opcVFPCLASSPDX
opcVFPCLASSPDY
opcVFPCLASSPDZ
opcVFPCLASSPSX
opcVFPCLASSPSY
opcVFPCLASSPSZ
opcVFPCLASSSD
opcVFPCLASSSS
opcVGATHERDPD
opcVGATHERDPS
opcVGATHERQPD
opcVGATHERQPS
opcVGETEXPPD
opcVGETEXPPS
opcVGETEXPSD
opcVGETEXPSS
opcVGETMANTPD
opcVGETMANTPS
opcVGETMANTSD
opcVGETMANTSS
opcVHADDPD
opcVHADDPS
opcVHSUBPD
opcVHSUBPS
opcVINSERTF128
opcVINSERTF32X4
opcVINSERTF32X8
opcVINSERTF64X2
opcVINSERTF64X4
opcVINSERTI128
opcVINSERTI32X4
opcVINSERTI32X8
opcVINSERTI64X2
opcVINSERTI64X4
opcVINSERTPS
opcVLDDQU
opcVLDMXCSR
opcVMASKMOVDQU
opcVMASKMOVPD
opcVMASKMOVPS
opcVMAXPD
opcVMAXPS
opcVMAXSD
opcVMAXSS
opcVMINPD
opcVMINPS
opcVMINSD
opcVMINSS
opcVMOVAPD
opcVMOVAPS
opcVMOVD
opcVMOVDDUP
opcVMOVDQA
opcVMOVDQA32
opcVMOVDQA64
opcVMOVDQU
opcVMOVDQU16
opcVMOVDQU32
opcVMOVDQU64
opcVMOVDQU8
opcVMOVHLPS
opcVMOVHPD
opcVMOVHPS
opcVMOVLHPS
opcVMOVLPD
opcVMOVLPS
opcVMOVMSKPD
opcVMOVMSKPS
opcVMOVNTDQ
opcVMOVNTDQA
opcVMOVNTPD
opcVMOVNTPS
opcVMOVQ
opcVMOVSD
opcVMOVSHDUP
opcVMOVSLDUP
opcVMOVSS
opcVMOVUPD
opcVMOVUPS
opcVMPSADBW
opcVMULPD
opcVMULPS
opcVMULSD
opcVMULSS
opcVORPD
opcVORPS
opcVPABSB
opcVPABSD
opcVPABSQ
opcVPABSW
opcVPACKSSDW
opcVPACKSSWB
opcVPACKUSDW
opcVPACKUSWB
opcVPADDB
opcVPADDD
opcVPADDQ
opcVPADDSB
opcVPADDSW
opcVPADDUSB
opcVPADDUSW
opcVPADDW
opcVPALIGNR
opcVPAND
opcVPANDD
opcVPANDN
opcVPANDND
opcVPANDNQ
opcVPANDQ
opcVPAVGB
opcVPAVGW
opcVPBLENDD
opcVPBLENDMB
opcVPBLENDMD
opcVPBLENDMQ
opcVPBLENDMW
opcVPBLENDVB
opcVPBLENDW
opcVPBROADCASTB
opcVPBROADCASTD
opcVPBROADCASTMB2Q
opcVPBROADCASTMW2D
opcVPBROADCASTQ
opcVPBROADCASTW
opcVPCLMULQDQ
opcVPCMPB
opcVPCMPD
opcVPCMPEQB
opcVPCMPEQD
opcVPCMPEQQ
opcVPCMPEQW
opcVPCMPESTRI
opcVPCMPESTRM
opcVPCMPGTB
opcVPCMPGTD
opcVPCMPGTQ
opcVPCMPGTW
opcVPCMPISTRI
opcVPCMPISTRM
opcVPCMPQ
opcVPCMPUB
opcVPCMPUD
opcVPCMPUQ
opcVPCMPUW
opcVPCMPW
opcVPCOMPRESSD
opcVPCOMPRESSQ
opcVPCONFLICTD
opcVPCONFLICTQ
opcVPERM2F128
opcVPERM2I128
opcVPERMB
opcVPERMD
opcVPERMI2B
opcVPERMI2D
opcVPERMI2PD
opcVPERMI2PS
opcVPERMI2Q
opcVPERMI2W
opcVPERMILPD
opcVPERMILPS
opcVPERMPD
opcVPERMPS
opcVPERMQ
opcVPERMT2B
opcVPERMT2D
opcVPERMT2PD
opcVPERMT2PS
opcVPERMT2Q
opcVPERMT2W
opcVPERMW
opcVPEXPANDD
opcVPEXPANDQ
opcVPEXTRB
opcVPEXTRD
opcVPEXTRQ
opcVPEXTRW
opcVPGATHERDD
opcVPGATHERDQ
opcVPGATHERQD
opcVPGATHERQQ
opcVPHADDD
opcVPHADDSW
opcVPHADDW
opcVPHMINPOSUW
opcVPHSUBD
opcVPHSUBSW
opcVPHSUBW
opcVPINSRB
opcVPINSRD
opcVPINSRQ
opcVPINSRW
opcVPLZCNTD
opcVPLZCNTQ
opcVPMADD52HUQ
opcVPMADD52LUQ
opcVPMADDUBSW
opcVPMADDWD
opcVPMASKMOVD
opcVPMASKMOVQ
opcVPMAXSB
opcVPMAXSD
opcVPMAXSQ
opcVPMAXSW
opcVPMAXUB
opcVPMAXUD
opcVPMAXUQ
opcVPMAXUW
opcVPMINSB
opcVPMINSD
opcVPMINSQ
opcVPMINSW
opcVPMINUB
opcVPMINUD
opcVPMINUQ
opcVPMINUW
opcVPMOVB2M
opcVPMOVD2M
opcVPMOVDB
opcVPMOVDW
opcVPMOVM2B
opcVPMOVM2D
opcVPMOVM2Q
opcVPMOVM2W
opcVPMOVMSKB
opcVPMOVQ2M
opcVPMOVQB
opcVPMOVQD
opcVPMOVQW
opcVPMOVSDB
opcVPMOVSDW
opcVPMOVSQB
opcVPMOVSQD
opcVPMOVSQW
opcVPMOVSWB
opcVPMOVSXBD
opcVPMOVSXBQ
opcVPMOVSXBW
opcVPMOVSXDQ
opcVPMOVSXWD
opcVPMOVSXWQ
opcVPMOVUSDB
opcVPMOVUSDW
opcVPMOVUSQB
opcVPMOVUSQD
opcVPMOVUSQW
opcVPMOVUSWB
opcVPMOVW2M
opcVPMOVWB
opcVPMOVZXBD
opcVPMOVZXBQ
opcVPMOVZXBW
opcVPMOVZXDQ
opcVPMOVZXWD
opcVPMOVZXWQ
opcVPMULDQ
opcVPMULHRSW
opcVPMULHUW
opcVPMULHW
opcVPMULLD
opcVPMULLQ
opcVPMULLW
opcVPMULTISHIFTQB
opcVPMULUDQ
opcVPOPCNTD
opcVPOPCNTQ
opcVPOR
opcVPORD
opcVPORQ
opcVPROLD
opcVPROLQ
opcVPROLVD
opcVPROLVQ
opcVPRORD
opcVPRORQ
opcVPRORVD
opcVPRORVQ
opcVPSADBW
opcVPSCATTERDD
opcVPSCATTERDQ
opcVPSCATTERQD
opcVPSCATTERQQ
opcVPSHUFB
opcVPSHUFD
opcVPSHUFHW
opcVPSHUFLW
opcVPSIGNB
opcVPSIGND
opcVPSIGNW
opcVPSLLD
opcVPSLLDQ
opcVPSLLQ
opcVPSLLVD
opcVPSLLVQ
opcVPSLLVW
opcVPSLLW
opcVPSRAD
opcVPSRAQ
opcVPSRAVD
opcVPSRAVQ
opcVPSRAVW
opcVPSRAW
opcVPSRLD
opcVPSRLDQ
opcVPSRLQ
opcVPSRLVD
opcVPSRLVQ
opcVPSRLVW
opcVPSRLW
opcVPSUBB
opcVPSUBD
opcVPSUBQ
opcVPSUBSB
opcVPSUBSW
opcVPSUBUSB
opcVPSUBUSW
opcVPSUBW
opcVPTERNLOGD
opcVPTERNLOGQ
opcVPTEST
opcVPTESTMB
opcVPTESTMD
opcVPTESTMQ
opcVPTESTMW
opcVPTESTNMB
opcVPTESTNMD
opcVPTESTNMQ
opcVPTESTNMW
opcVPUNPCKHBW
opcVPUNPCKHDQ
opcVPUNPCKHQDQ
opcVPUNPCKHWD
opcVPUNPCKLBW
opcVPUNPCKLDQ
opcVPUNPCKLQDQ
opcVPUNPCKLWD
opcVPXOR
opcVPXORD
opcVPXORQ
opcVRANGEPD
opcVRANGEPS
opcVRANGESD
opcVRANGESS
opcVRCP14PD
opcVRCP14PS
opcVRCP14SD
opcVRCP14SS
opcVRCP28PD
opcVRCP28PS
opcVRCP28SD
opcVRCP28SS
opcVRCPPS
opcVRCPSS
opcVREDUCEPD
opcVREDUCEPS
opcVREDUCESD
opcVREDUCESS
opcVRNDSCALEPD
opcVRNDSCALEPS
opcVRNDSCALESD
opcVRNDSCALESS
opcVROUNDPD
opcVROUNDPS
opcVROUNDSD
opcVROUNDSS
opcVRSQRT14PD
opcVRSQRT14PS
opcVRSQRT14SD
opcVRSQRT14SS
opcVRSQRT28PD
opcVRSQRT28PS
opcVRSQRT28SD
opcVRSQRT28SS
opcVRSQRTPS
opcVRSQRTSS
opcVSCALEFPD
opcVSCALEFPS
opcVSCALEFSD
opcVSCALEFSS
opcVSCATTERDPD
opcVSCATTERDPS
opcVSCATTERQPD
opcVSCATTERQPS
opcVSHUFF32X4
opcVSHUFF64X2
opcVSHUFI32X4
opcVSHUFI64X2
opcVSHUFPD
opcVSHUFPS
opcVSQRTPD
opcVSQRTPS
opcVSQRTSD
opcVSQRTSS
opcVSTMXCSR
opcVSUBPD
opcVSUBPS
opcVSUBSD
opcVSUBSS
opcVTESTPD
opcVTESTPS
opcVUCOMISD
opcVUCOMISS
opcVUNPCKHPD
opcVUNPCKHPS
opcVUNPCKLPD
opcVUNPCKLPS
opcVXORPD
opcVXORPS
opcVZEROALL
opcVZEROUPPER
opcXADDB
opcXADDL
opcXADDQ
opcXADDW
opcXCHGB
opcXCHGL
opcXCHGQ
opcXCHGW
opcXGETBV
opcXLAT
opcXORB
opcXORL
opcXORPD
opcXORPS
opcXORQ
opcXORW
opcmax
)
func (o opc) String() string {
if opcNone < o && o < opcmax {
return opcstringtable[o-1]
}
return ""
}
var opcstringtable = []string{
"ADCB",
"ADCL",
"ADCQ",
"ADCW",
"ADCXL",
"ADCXQ",
"ADDB",
"ADDL",
"ADDPD",
"ADDPS",
"ADDQ",
"ADDSD",
"ADDSS",
"ADDSUBPD",
"ADDSUBPS",
"ADDW",
"ADOXL",
"ADOXQ",
"AESDEC",
"AESDECLAST",
"AESENC",
"AESENCLAST",
"AESIMC",
"AESKEYGENASSIST",
"ANDB",
"ANDL",
"ANDNL",
"ANDNPD",
"ANDNPS",
"ANDNQ",
"ANDPD",
"ANDPS",
"ANDQ",
"ANDW",
"BEXTRL",
"BEXTRQ",
"BLENDPD",
"BLENDPS",
"BLENDVPD",
"BLENDVPS",
"BLSIL",
"BLSIQ",
"BLSMSKL",
"BLSMSKQ",
"BLSRL",
"BLSRQ",
"BSFL",
"BSFQ",
"BSFW",
"BSRL",
"BSRQ",
"BSRW",
"BSWAPL",
"BSWAPQ",
"BTCL",
"BTCQ",
"BTCW",
"BTL",
"BTQ",
"BTRL",
"BTRQ",
"BTRW",
"BTSL",
"BTSQ",
"BTSW",
"BTW",
"BZHIL",
"BZHIQ",
"CALL",
"CBW",
"CDQ",
"CDQE",
"CLC",
"CLD",
"CLFLUSH",
"CLFLUSHOPT",
"CMC",
"CMOVLCC",
"CMOVLCS",
"CMOVLEQ",
"CMOVLGE",
"CMOVLGT",
"CMOVLHI",
"CMOVLLE",
"CMOVLLS",
"CMOVLLT",
"CMOVLMI",
"CMOVLNE",
"CMOVLOC",
"CMOVLOS",
"CMOVLPC",
"CMOVLPL",
"CMOVLPS",
"CMOVQCC",
"CMOVQCS",
"CMOVQEQ",
"CMOVQGE",
"CMOVQGT",
"CMOVQHI",
"CMOVQLE",
"CMOVQLS",
"CMOVQLT",
"CMOVQMI",
"CMOVQNE",
"CMOVQOC",
"CMOVQOS",
"CMOVQPC",
"CMOVQPL",
"CMOVQPS",
"CMOVWCC",
"CMOVWCS",
"CMOVWEQ",
"CMOVWGE",
"CMOVWGT",
"CMOVWHI",
"CMOVWLE",
"CMOVWLS",
"CMOVWLT",
"CMOVWMI",
"CMOVWNE",
"CMOVWOC",
"CMOVWOS",
"CMOVWPC",
"CMOVWPL",
"CMOVWPS",
"CMPB",
"CMPL",
"CMPPD",
"CMPPS",
"CMPQ",
"CMPSD",
"CMPSS",
"CMPW",
"CMPXCHG16B",
"CMPXCHG8B",
"CMPXCHGB",
"CMPXCHGL",
"CMPXCHGQ",
"CMPXCHGW",
"COMISD",
"COMISS",
"CPUID",
"CQO",
"CRC32B",
"CRC32L",
"CRC32Q",
"CRC32W",
"CVTPD2PL",
"CVTPD2PS",
"CVTPL2PD",
"CVTPL2PS",
"CVTPS2PD",
"CVTPS2PL",
"CVTSD2SL",
"CVTSD2SS",
"CVTSL2SD",
"CVTSL2SS",
"CVTSQ2SD",
"CVTSQ2SS",
"CVTSS2SD",
"CVTSS2SL",
"CVTTPD2PL",
"CVTTPS2PL",
"CVTTSD2SL",
"CVTTSD2SQ",
"CVTTSS2SL",
"CWD",
"CWDE",
"DECB",
"DECL",
"DECQ",
"DECW",
"DIVB",
"DIVL",
"DIVPD",
"DIVPS",
"DIVQ",
"DIVSD",
"DIVSS",
"DIVW",
"DPPD",
"DPPS",
"EXTRACTPS",
"HADDPD",
"HADDPS",
"HSUBPD",
"HSUBPS",
"IDIVB",
"IDIVL",
"IDIVQ",
"IDIVW",
"IMUL3L",
"IMUL3Q",
"IMUL3W",
"IMULB",
"IMULL",
"IMULQ",
"IMULW",
"INCB",
"INCL",
"INCQ",
"INCW",
"INSERTPS",
"INT",
"JA",
"JAE",
"JB",
"JBE",
"JC",
"JCC",
"JCS",
"JCXZL",
"JCXZQ",
"JE",
"JEQ",
"JG",
"JGE",
"JGT",
"JHI",
"JHS",
"JL",
"JLE",
"JLO",
"JLS",
"JLT",
"JMI",
"JMP",
"JNA",
"JNAE",
"JNB",
"JNBE",
"JNC",
"JNE",
"JNG",
"JNGE",
"JNL",
"JNLE",
"JNO",
"JNP",
"JNS",
"JNZ",
"JO",
"JOC",
"JOS",
"JP",
"JPC",
"JPE",
"JPL",
"JPO",
"JPS",
"JS",
"JZ",
"KADDB",
"KADDD",
"KADDQ",
"KADDW",
"KANDB",
"KANDD",
"KANDNB",
"KANDND",
"KANDNQ",
"KANDNW",
"KANDQ",
"KANDW",
"KMOVB",
"KMOVD",
"KMOVQ",
"KMOVW",
"KNOTB",
"KNOTD",
"KNOTQ",
"KNOTW",
"KORB",
"KORD",
"KORQ",
"KORTESTB",
"KORTESTD",
"KORTESTQ",
"KORTESTW",
"KORW",
"KSHIFTLB",
"KSHIFTLD",
"KSHIFTLQ",
"KSHIFTLW",
"KSHIFTRB",
"KSHIFTRD",
"KSHIFTRQ",
"KSHIFTRW",
"KTESTB",
"KTESTD",
"KTESTQ",
"KTESTW",
"KUNPCKBW",
"KUNPCKDQ",
"KUNPCKWD",
"KXNORB",
"KXNORD",
"KXNORQ",
"KXNORW",
"KXORB",
"KXORD",
"KXORQ",
"KXORW",
"LDDQU",
"LDMXCSR",
"LEAL",
"LEAQ",
"LEAW",
"LFENCE",
"LZCNTL",
"LZCNTQ",
"LZCNTW",
"MASKMOVDQU",
"MASKMOVOU",
"MAXPD",
"MAXPS",
"MAXSD",
"MAXSS",
"MFENCE",
"MINPD",
"MINPS",
"MINSD",
"MINSS",
"MONITOR",
"MOVAPD",
"MOVAPS",
"MOVB",
"MOVBELL",
"MOVBEQQ",
"MOVBEWW",
"MOVBLSX",
"MOVBLZX",
"MOVBQSX",
"MOVBQZX",
"MOVBWSX",
"MOVBWZX",
"MOVD",
"MOVDDUP",
"MOVDQ2Q",
"MOVHLPS",
"MOVHPD",
"MOVHPS",
"MOVL",
"MOVLHPS",
"MOVLPD",
"MOVLPS",
"MOVLQSX",
"MOVLQZX",
"MOVMSKPD",
"MOVMSKPS",
"MOVNTDQ",
"MOVNTDQA",
"MOVNTIL",
"MOVNTIQ",
"MOVNTO",
"MOVNTPD",
"MOVNTPS",
"MOVO",
"MOVOA",
"MOVOU",
"MOVQ",
"MOVSD",
"MOVSHDUP",
"MOVSLDUP",
"MOVSS",
"MOVUPD",
"MOVUPS",
"MOVW",
"MOVWLSX",
"MOVWLZX",
"MOVWQSX",
"MOVWQZX",
"MPSADBW",
"MULB",
"MULL",
"MULPD",
"MULPS",
"MULQ",
"MULSD",
"MULSS",
"MULW",
"MULXL",
"MULXQ",
"MWAIT",
"NEGB",
"NEGL",
"NEGQ",
"NEGW",
"NOP",
"NOTB",
"NOTL",
"NOTQ",
"NOTW",
"ORB",
"ORL",
"ORPD",
"ORPS",
"ORQ",
"ORW",
"PABSB",
"PABSD",
"PABSW",
"PACKSSLW",
"PACKSSWB",
"PACKUSDW",
"PACKUSWB",
"PADDB",
"PADDD",
"PADDL",
"PADDQ",
"PADDSB",
"PADDSW",
"PADDUSB",
"PADDUSW",
"PADDW",
"PALIGNR",
"PAND",
"PANDN",
"PAUSE",
"PAVGB",
"PAVGW",
"PBLENDVB",
"PBLENDW",
"PCLMULQDQ",
"PCMPEQB",
"PCMPEQL",
"PCMPEQQ",
"PCMPEQW",
"PCMPESTRI",
"PCMPESTRM",
"PCMPGTB",
"PCMPGTL",
"PCMPGTQ",
"PCMPGTW",
"PCMPISTRI",
"PCMPISTRM",
"PDEPL",
"PDEPQ",
"PEXTL",
"PEXTQ",
"PEXTRB",
"PEXTRD",
"PEXTRQ",
"PEXTRW",
"PHADDD",
"PHADDSW",
"PHADDW",
"PHMINPOSUW",
"PHSUBD",
"PHSUBSW",
"PHSUBW",
"PINSRB",
"PINSRD",
"PINSRQ",
"PINSRW",
"PMADDUBSW",
"PMADDWL",
"PMAXSB",
"PMAXSD",
"PMAXSW",
"PMAXUB",
"PMAXUD",
"PMAXUW",
"PMINSB",
"PMINSD",
"PMINSW",
"PMINUB",
"PMINUD",
"PMINUW",
"PMOVMSKB",
"PMOVSXBD",
"PMOVSXBQ",
"PMOVSXBW",
"PMOVSXDQ",
"PMOVSXWD",
"PMOVSXWQ",
"PMOVZXBD",
"PMOVZXBQ",
"PMOVZXBW",
"PMOVZXDQ",
"PMOVZXWD",
"PMOVZXWQ",
"PMULDQ",
"PMULHRSW",
"PMULHUW",
"PMULHW",
"PMULLD",
"PMULLW",
"PMULULQ",
"POPCNTL",
"POPCNTQ",
"POPCNTW",
"POPQ",
"POPW",
"POR",
"PREFETCHNTA",
"PREFETCHT0",
"PREFETCHT1",
"PREFETCHT2",
"PSADBW",
"PSHUFB",
"PSHUFD",
"PSHUFHW",
"PSHUFL",
"PSHUFLW",
"PSIGNB",
"PSIGND",
"PSIGNW",
"PSLLDQ",
"PSLLL",
"PSLLO",
"PSLLQ",
"PSLLW",
"PSRAL",
"PSRAW",
"PSRLDQ",
"PSRLL",
"PSRLO",
"PSRLQ",
"PSRLW",
"PSUBB",
"PSUBL",
"PSUBQ",
"PSUBSB",
"PSUBSW",
"PSUBUSB",
"PSUBUSW",
"PSUBW",
"PTEST",
"PUNPCKHBW",
"PUNPCKHLQ",
"PUNPCKHQDQ",
"PUNPCKHWL",
"PUNPCKLBW",
"PUNPCKLLQ",
"PUNPCKLQDQ",
"PUNPCKLWL",
"PUSHQ",
"PUSHW",
"PXOR",
"RCLB",
"RCLL",
"RCLQ",
"RCLW",
"RCPPS",
"RCPSS",
"RCRB",
"RCRL",
"RCRQ",
"RCRW",
"RDRANDL",
"RDSEEDL",
"RDTSC",
"RDTSCP",
"RET",
"RETFL",
"RETFQ",
"RETFW",
"ROLB",
"ROLL",
"ROLQ",
"ROLW",
"RORB",
"RORL",
"RORQ",
"RORW",
"RORXL",
"RORXQ",
"ROUNDPD",
"ROUNDPS",
"ROUNDSD",
"ROUNDSS",
"RSQRTPS",
"RSQRTSS",
"SALB",
"SALL",
"SALQ",
"SALW",
"SARB",
"SARL",
"SARQ",
"SARW",
"SARXL",
"SARXQ",
"SBBB",
"SBBL",
"SBBQ",
"SBBW",
"SETCC",
"SETCS",
"SETEQ",
"SETGE",
"SETGT",
"SETHI",
"SETLE",
"SETLS",
"SETLT",
"SETMI",
"SETNE",
"SETOC",
"SETOS",
"SETPC",
"SETPL",
"SETPS",
"SFENCE",
"SHA1MSG1",
"SHA1MSG2",
"SHA1NEXTE",
"SHA1RNDS4",
"SHA256MSG1",
"SHA256MSG2",
"SHA256RNDS2",
"SHLB",
"SHLL",
"SHLQ",
"SHLW",
"SHLXL",
"SHLXQ",
"SHRB",
"SHRL",
"SHRQ",
"SHRW",
"SHRXL",
"SHRXQ",
"SHUFPD",
"SHUFPS",
"SQRTPD",
"SQRTPS",
"SQRTSD",
"SQRTSS",
"STC",
"STD",
"STMXCSR",
"SUBB",
"SUBL",
"SUBPD",
"SUBPS",
"SUBQ",
"SUBSD",
"SUBSS",
"SUBW",
"SYSCALL",
"TESTB",
"TESTL",
"TESTQ",
"TESTW",
"TZCNTL",
"TZCNTQ",
"TZCNTW",
"UCOMISD",
"UCOMISS",
"UD2",
"UNPCKHPD",
"UNPCKHPS",
"UNPCKLPD",
"UNPCKLPS",
"VADDPD",
"VADDPS",
"VADDSD",
"VADDSS",
"VADDSUBPD",
"VADDSUBPS",
"VAESDEC",
"VAESDECLAST",
"VAESENC",
"VAESENCLAST",
"VAESIMC",
"VAESKEYGENASSIST",
"VALIGND",
"VALIGNQ",
"VANDNPD",
"VANDNPS",
"VANDPD",
"VANDPS",
"VBLENDMPD",
"VBLENDMPS",
"VBLENDPD",
"VBLENDPS",
"VBLENDVPD",
"VBLENDVPS",
"VBROADCASTF128",
"VBROADCASTF32X2",
"VBROADCASTF32X4",
"VBROADCASTF32X8",
"VBROADCASTF64X2",
"VBROADCASTF64X4",
"VBROADCASTI128",
"VBROADCASTI32X2",
"VBROADCASTI32X4",
"VBROADCASTI32X8",
"VBROADCASTI64X2",
"VBROADCASTI64X4",
"VBROADCASTSD",
"VBROADCASTSS",
"VCMPPD",
"VCMPPS",
"VCMPSD",
"VCMPSS",
"VCOMISD",
"VCOMISS",
"VCOMPRESSPD",
"VCOMPRESSPS",
"VCVTDQ2PD",
"VCVTDQ2PS",
"VCVTPD2DQ",
"VCVTPD2DQX",
"VCVTPD2DQY",
"VCVTPD2PS",
"VCVTPD2PSX",
"VCVTPD2PSY",
"VCVTPD2QQ",
"VCVTPD2UDQ",
"VCVTPD2UDQX",
"VCVTPD2UDQY",
"VCVTPD2UQQ",
"VCVTPH2PS",
"VCVTPS2DQ",
"VCVTPS2PD",
"VCVTPS2PH",
"VCVTPS2QQ",
"VCVTPS2UDQ",
"VCVTPS2UQQ",
"VCVTQQ2PD",
"VCVTQQ2PS",
"VCVTQQ2PSX",
"VCVTQQ2PSY",
"VCVTSD2SI",
"VCVTSD2SIQ",
"VCVTSD2SS",
"VCVTSD2USIL",
"VCVTSD2USIQ",
"VCVTSI2SDL",
"VCVTSI2SDQ",
"VCVTSI2SSL",
"VCVTSI2SSQ",
"VCVTSS2SD",
"VCVTSS2SI",
"VCVTSS2SIQ",
"VCVTSS2USIL",
"VCVTSS2USIQ",
"VCVTTPD2DQ",
"VCVTTPD2DQX",
"VCVTTPD2DQY",
"VCVTTPD2QQ",
"VCVTTPD2UDQ",
"VCVTTPD2UDQX",
"VCVTTPD2UDQY",
"VCVTTPD2UQQ",
"VCVTTPS2DQ",
"VCVTTPS2QQ",
"VCVTTPS2UDQ",
"VCVTTPS2UQQ",
"VCVTTSD2SI",
"VCVTTSD2SIQ",
"VCVTTSD2USIL",
"VCVTTSD2USIQ",
"VCVTTSS2SI",
"VCVTTSS2SIQ",
"VCVTTSS2USIL",
"VCVTTSS2USIQ",
"VCVTUDQ2PD",
"VCVTUDQ2PS",
"VCVTUQQ2PD",
"VCVTUQQ2PS",
"VCVTUQQ2PSX",
"VCVTUQQ2PSY",
"VCVTUSI2SDL",
"VCVTUSI2SDQ",
"VCVTUSI2SSL",
"VCVTUSI2SSQ",
"VDBPSADBW",
"VDIVPD",
"VDIVPS",
"VDIVSD",
"VDIVSS",
"VDPPD",
"VDPPS",
"VEXP2PD",
"VEXP2PS",
"VEXPANDPD",
"VEXPANDPS",
"VEXTRACTF128",
"VEXTRACTF32X4",
"VEXTRACTF32X8",
"VEXTRACTF64X2",
"VEXTRACTF64X4",
"VEXTRACTI128",
"VEXTRACTI32X4",
"VEXTRACTI32X8",
"VEXTRACTI64X2",
"VEXTRACTI64X4",
"VEXTRACTPS",
"VFIXUPIMMPD",
"VFIXUPIMMPS",
"VFIXUPIMMSD",
"VFIXUPIMMSS",
"VFMADD132PD",
"VFMADD132PS",
"VFMADD132SD",
"VFMADD132SS",
"VFMADD213PD",
"VFMADD213PS",
"VFMADD213SD",
"VFMADD213SS",
"VFMADD231PD",
"VFMADD231PS",
"VFMADD231SD",
"VFMADD231SS",
"VFMADDSUB132PD",
"VFMADDSUB132PS",
"VFMADDSUB213PD",
"VFMADDSUB213PS",
"VFMADDSUB231PD",
"VFMADDSUB231PS",
"VFMSUB132PD",
"VFMSUB132PS",
"VFMSUB132SD",
"VFMSUB132SS",
"VFMSUB213PD",
"VFMSUB213PS",
"VFMSUB213SD",
"VFMSUB213SS",
"VFMSUB231PD",
"VFMSUB231PS",
"VFMSUB231SD",
"VFMSUB231SS",
"VFMSUBADD132PD",
"VFMSUBADD132PS",
"VFMSUBADD213PD",
"VFMSUBADD213PS",
"VFMSUBADD231PD",
"VFMSUBADD231PS",
"VFNMADD132PD",
"VFNMADD132PS",
"VFNMADD132SD",
"VFNMADD132SS",
"VFNMADD213PD",
"VFNMADD213PS",
"VFNMADD213SD",
"VFNMADD213SS",
"VFNMADD231PD",
"VFNMADD231PS",
"VFNMADD231SD",
"VFNMADD231SS",
"VFNMSUB132PD",
"VFNMSUB132PS",
"VFNMSUB132SD",
"VFNMSUB132SS",
"VFNMSUB213PD",
"VFNMSUB213PS",
"VFNMSUB213SD",
"VFNMSUB213SS",
"VFNMSUB231PD",
"VFNMSUB231PS",
"VFNMSUB231SD",
"VFNMSUB231SS",
"VFPCLASSPDX",
"VFPCLASSPDY",
"VFPCLASSPDZ",
"VFPCLASSPSX",
"VFPCLASSPSY",
"VFPCLASSPSZ",
"VFPCLASSSD",
"VFPCLASSSS",
"VGATHERDPD",
"VGATHERDPS",
"VGATHERQPD",
"VGATHERQPS",
"VGETEXPPD",
"VGETEXPPS",
"VGETEXPSD",
"VGETEXPSS",
"VGETMANTPD",
"VGETMANTPS",
"VGETMANTSD",
"VGETMANTSS",
"VHADDPD",
"VHADDPS",
"VHSUBPD",
"VHSUBPS",
"VINSERTF128",
"VINSERTF32X4",
"VINSERTF32X8",
"VINSERTF64X2",
"VINSERTF64X4",
"VINSERTI128",
"VINSERTI32X4",
"VINSERTI32X8",
"VINSERTI64X2",
"VINSERTI64X4",
"VINSERTPS",
"VLDDQU",
"VLDMXCSR",
"VMASKMOVDQU",
"VMASKMOVPD",
"VMASKMOVPS",
"VMAXPD",
"VMAXPS",
"VMAXSD",
"VMAXSS",
"VMINPD",
"VMINPS",
"VMINSD",
"VMINSS",
"VMOVAPD",
"VMOVAPS",
"VMOVD",
"VMOVDDUP",
"VMOVDQA",
"VMOVDQA32",
"VMOVDQA64",
"VMOVDQU",
"VMOVDQU16",
"VMOVDQU32",
"VMOVDQU64",
"VMOVDQU8",
"VMOVHLPS",
"VMOVHPD",
"VMOVHPS",
"VMOVLHPS",
"VMOVLPD",
"VMOVLPS",
"VMOVMSKPD",
"VMOVMSKPS",
"VMOVNTDQ",
"VMOVNTDQA",
"VMOVNTPD",
"VMOVNTPS",
"VMOVQ",
"VMOVSD",
"VMOVSHDUP",
"VMOVSLDUP",
"VMOVSS",
"VMOVUPD",
"VMOVUPS",
"VMPSADBW",
"VMULPD",
"VMULPS",
"VMULSD",
"VMULSS",
"VORPD",
"VORPS",
"VPABSB",
"VPABSD",
"VPABSQ",
"VPABSW",
"VPACKSSDW",
"VPACKSSWB",
"VPACKUSDW",
"VPACKUSWB",
"VPADDB",
"VPADDD",
"VPADDQ",
"VPADDSB",
"VPADDSW",
"VPADDUSB",
"VPADDUSW",
"VPADDW",
"VPALIGNR",
"VPAND",
"VPANDD",
"VPANDN",
"VPANDND",
"VPANDNQ",
"VPANDQ",
"VPAVGB",
"VPAVGW",
"VPBLENDD",
"VPBLENDMB",
"VPBLENDMD",
"VPBLENDMQ",
"VPBLENDMW",
"VPBLENDVB",
"VPBLENDW",
"VPBROADCASTB",
"VPBROADCASTD",
"VPBROADCASTMB2Q",
"VPBROADCASTMW2D",
"VPBROADCASTQ",
"VPBROADCASTW",
"VPCLMULQDQ",
"VPCMPB",
"VPCMPD",
"VPCMPEQB",
"VPCMPEQD",
"VPCMPEQQ",
"VPCMPEQW",
"VPCMPESTRI",
"VPCMPESTRM",
"VPCMPGTB",
"VPCMPGTD",
"VPCMPGTQ",
"VPCMPGTW",
"VPCMPISTRI",
"VPCMPISTRM",
"VPCMPQ",
"VPCMPUB",
"VPCMPUD",
"VPCMPUQ",
"VPCMPUW",
"VPCMPW",
"VPCOMPRESSD",
"VPCOMPRESSQ",
"VPCONFLICTD",
"VPCONFLICTQ",
"VPERM2F128",
"VPERM2I128",
"VPERMB",
"VPERMD",
"VPERMI2B",
"VPERMI2D",
"VPERMI2PD",
"VPERMI2PS",
"VPERMI2Q",
"VPERMI2W",
"VPERMILPD",
"VPERMILPS",
"VPERMPD",
"VPERMPS",
"VPERMQ",
"VPERMT2B",
"VPERMT2D",
"VPERMT2PD",
"VPERMT2PS",
"VPERMT2Q",
"VPERMT2W",
"VPERMW",
"VPEXPANDD",
"VPEXPANDQ",
"VPEXTRB",
"VPEXTRD",
"VPEXTRQ",
"VPEXTRW",
"VPGATHERDD",
"VPGATHERDQ",
"VPGATHERQD",
"VPGATHERQQ",
"VPHADDD",
"VPHADDSW",
"VPHADDW",
"VPHMINPOSUW",
"VPHSUBD",
"VPHSUBSW",
"VPHSUBW",
"VPINSRB",
"VPINSRD",
"VPINSRQ",
"VPINSRW",
"VPLZCNTD",
"VPLZCNTQ",
"VPMADD52HUQ",
"VPMADD52LUQ",
"VPMADDUBSW",
"VPMADDWD",
"VPMASKMOVD",
"VPMASKMOVQ",
"VPMAXSB",
"VPMAXSD",
"VPMAXSQ",
"VPMAXSW",
"VPMAXUB",
"VPMAXUD",
"VPMAXUQ",
"VPMAXUW",
"VPMINSB",
"VPMINSD",
"VPMINSQ",
"VPMINSW",
"VPMINUB",
"VPMINUD",
"VPMINUQ",
"VPMINUW",
"VPMOVB2M",
"VPMOVD2M",
"VPMOVDB",
"VPMOVDW",
"VPMOVM2B",
"VPMOVM2D",
"VPMOVM2Q",
"VPMOVM2W",
"VPMOVMSKB",
"VPMOVQ2M",
"VPMOVQB",
"VPMOVQD",
"VPMOVQW",
"VPMOVSDB",
"VPMOVSDW",
"VPMOVSQB",
"VPMOVSQD",
"VPMOVSQW",
"VPMOVSWB",
"VPMOVSXBD",
"VPMOVSXBQ",
"VPMOVSXBW",
"VPMOVSXDQ",
"VPMOVSXWD",
"VPMOVSXWQ",
"VPMOVUSDB",
"VPMOVUSDW",
"VPMOVUSQB",
"VPMOVUSQD",
"VPMOVUSQW",
"VPMOVUSWB",
"VPMOVW2M",
"VPMOVWB",
"VPMOVZXBD",
"VPMOVZXBQ",
"VPMOVZXBW",
"VPMOVZXDQ",
"VPMOVZXWD",
"VPMOVZXWQ",
"VPMULDQ",
"VPMULHRSW",
"VPMULHUW",
"VPMULHW",
"VPMULLD",
"VPMULLQ",
"VPMULLW",
"VPMULTISHIFTQB",
"VPMULUDQ",
"VPOPCNTD",
"VPOPCNTQ",
"VPOR",
"VPORD",
"VPORQ",
"VPROLD",
"VPROLQ",
"VPROLVD",
"VPROLVQ",
"VPRORD",
"VPRORQ",
"VPRORVD",
"VPRORVQ",
"VPSADBW",
"VPSCATTERDD",
"VPSCATTERDQ",
"VPSCATTERQD",
"VPSCATTERQQ",
"VPSHUFB",
"VPSHUFD",
"VPSHUFHW",
"VPSHUFLW",
"VPSIGNB",
"VPSIGND",
"VPSIGNW",
"VPSLLD",
"VPSLLDQ",
"VPSLLQ",
"VPSLLVD",
"VPSLLVQ",
"VPSLLVW",
"VPSLLW",
"VPSRAD",
"VPSRAQ",
"VPSRAVD",
"VPSRAVQ",
"VPSRAVW",
"VPSRAW",
"VPSRLD",
"VPSRLDQ",
"VPSRLQ",
"VPSRLVD",
"VPSRLVQ",
"VPSRLVW",
"VPSRLW",
"VPSUBB",
"VPSUBD",
"VPSUBQ",
"VPSUBSB",
"VPSUBSW",
"VPSUBUSB",
"VPSUBUSW",
"VPSUBW",
"VPTERNLOGD",
"VPTERNLOGQ",
"VPTEST",
"VPTESTMB",
"VPTESTMD",
"VPTESTMQ",
"VPTESTMW",
"VPTESTNMB",
"VPTESTNMD",
"VPTESTNMQ",
"VPTESTNMW",
"VPUNPCKHBW",
"VPUNPCKHDQ",
"VPUNPCKHQDQ",
"VPUNPCKHWD",
"VPUNPCKLBW",
"VPUNPCKLDQ",
"VPUNPCKLQDQ",
"VPUNPCKLWD",
"VPXOR",
"VPXORD",
"VPXORQ",
"VRANGEPD",
"VRANGEPS",
"VRANGESD",
"VRANGESS",
"VRCP14PD",
"VRCP14PS",
"VRCP14SD",
"VRCP14SS",
"VRCP28PD",
"VRCP28PS",
"VRCP28SD",
"VRCP28SS",
"VRCPPS",
"VRCPSS",
"VREDUCEPD",
"VREDUCEPS",
"VREDUCESD",
"VREDUCESS",
"VRNDSCALEPD",
"VRNDSCALEPS",
"VRNDSCALESD",
"VRNDSCALESS",
"VROUNDPD",
"VROUNDPS",
"VROUNDSD",
"VROUNDSS",
"VRSQRT14PD",
"VRSQRT14PS",
"VRSQRT14SD",
"VRSQRT14SS",
"VRSQRT28PD",
"VRSQRT28PS",
"VRSQRT28SD",
"VRSQRT28SS",
"VRSQRTPS",
"VRSQRTSS",
"VSCALEFPD",
"VSCALEFPS",
"VSCALEFSD",
"VSCALEFSS",
"VSCATTERDPD",
"VSCATTERDPS",
"VSCATTERQPD",
"VSCATTERQPS",
"VSHUFF32X4",
"VSHUFF64X2",
"VSHUFI32X4",
"VSHUFI64X2",
"VSHUFPD",
"VSHUFPS",
"VSQRTPD",
"VSQRTPS",
"VSQRTSD",
"VSQRTSS",
"VSTMXCSR",
"VSUBPD",
"VSUBPS",
"VSUBSD",
"VSUBSS",
"VTESTPD",
"VTESTPS",
"VUCOMISD",
"VUCOMISS",
"VUNPCKHPD",
"VUNPCKHPS",
"VUNPCKLPD",
"VUNPCKLPS",
"VXORPD",
"VXORPS",
"VZEROALL",
"VZEROUPPER",
"XADDB",
"XADDL",
"XADDQ",
"XADDW",
"XCHGB",
"XCHGL",
"XCHGQ",
"XCHGW",
"XGETBV",
"XLAT",
"XORB",
"XORL",
"XORPD",
"XORPS",
"XORQ",
"XORW",
}
var forms = []form{
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcADCB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADCXL, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCXL, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADCXQ, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADCXQ, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADDPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADDSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSUBPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSUBPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSUBPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDSUBPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcADOXL, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADOXL, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcADOXQ, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcADOXQ, sffxsclsNIL, 0, isasADX, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcAESDEC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESDEC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESDECLAST, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESDECLAST, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESENC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcAESENC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcAESENCLAST, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcAESENCLAST, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcAESIMC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESIMC, sffxsclsNIL, 0, isasAES, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESKEYGENASSIST, sffxsclsNIL, 0, isasAES, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcAESKEYGENASSIST, sffxsclsNIL, 0, isasAES, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcANDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcANDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcANDNL, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcANDNL, sffxsclsNIL, featureCancellingInputs, isasBMI, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcANDNPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDNPD, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDNPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDNPS, sffxsclsNIL, featureCancellingInputs, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDNQ, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcANDNQ, sffxsclsNIL, featureCancellingInputs, isasBMI, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcANDPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcANDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcANDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBEXTRL, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBEXTRL, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBEXTRQ, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBEXTRQ, sffxsclsNIL, 0, isasBMI, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLENDPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDVPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDVPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDVPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLENDVPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcBLSIL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSIL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSIQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLSIQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLSMSKL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSMSKL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSMSKQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLSMSKQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLSRL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSRL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBLSRQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBLSRQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBSFL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBSFL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBSFQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBSFQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBSFW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBSFW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBSRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBSRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBSRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBSRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBSRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBSRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBSWAPL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionRW}}},
{opcBSWAPQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionRW}}},
{opcBTCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTCL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTCQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTCW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}}},
{opcBTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}}},
{opcBTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}}},
{opcBTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}}},
{opcBTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}}},
{opcBTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}}},
{opcBTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}}},
{opcBTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}}},
{opcBTRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTSL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTSL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTSL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcBTSL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcBTSQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTSQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTSQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcBTSQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcBTSW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTSW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTSW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcBTSW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcBTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionR}}},
{opcBTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}}},
{opcBTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionR}}},
{opcBTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionR}}},
{opcBZHIL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBZHIL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcBZHIQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcBZHIQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCALL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcCBW, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregAX), true, actionW}, {uint8(implregAL), true, actionR}}},
{opcCDQ, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregEAX), true, actionR}, {uint8(implregEDX), true, actionW}}},
{opcCDQE, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregEAX), true, actionR}, {uint8(implregRAX), true, actionW}}},
{opcCLC, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcCLD, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcCLFLUSH, sffxsclsNIL, 0, isasCLFLUSH, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcCLFLUSHOPT, sffxsclsNIL, 0, isasCLFLUSHOPT, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcCMC, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcCMOVLCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVLPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMOVQCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVQPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMOVWCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWCC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWCS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWEQ, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWGE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWGT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWHI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWLT, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWMI, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWNE, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWOC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWOS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPC, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPL, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMOVWPS, sffxsclsNIL, 0, isasCMOV, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCMPB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeAL), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionR}}},
{opcCMPB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionR}}},
{opcCMPB, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionR}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeEAX), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionR}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}}},
{opcCMPL, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}}},
{opcCMPPD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPPD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPPS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPPS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionR}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}}},
{opcCMPQ, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}}},
{opcCMPQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeRAX), false, actionR}, {uint8(oprndtypeIMM32), false, actionN}}},
{opcCMPSD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPSD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPSS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPSS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeAX), false, actionR}, {uint8(oprndtypeIMM16), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeIMM16), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionR}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeIMM16), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeIMM8), false, actionN}}},
{opcCMPW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionR}}},
{opcCMPW, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionR}}},
{opcCMPXCHG16B, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRBX), true, actionR}, {uint8(implregRCX), true, actionR}, {uint8(implregRDX), true, actionRW}}},
{opcCMPXCHG8B, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEBX), true, actionR}, {uint8(implregECX), true, actionR}, {uint8(implregEDX), true, actionRW}}},
{opcCMPXCHGB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcCMPXCHGB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcCMPXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcCMPXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCMPXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcCMPXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCMPXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcCMPXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcCOMISD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcCOMISD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcCOMISS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcCOMISS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcCPUID, sffxsclsNIL, 0, isasCPUID, 0, oprnds{{uint8(implregEAX), true, actionRW}, {uint8(implregEBX), true, actionW}, {uint8(implregECX), true, actionRW}, {uint8(implregEDX), true, actionW}}},
{opcCQO, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregRAX), true, actionR}, {uint8(implregRDX), true, actionW}}},
{opcCRC32B, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCRC32B, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCRC32B, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCRC32B, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCRC32L, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCRC32L, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCRC32Q, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCRC32Q, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcCRC32W, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCRC32W, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcCVTPD2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPD2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPD2PS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPD2PS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPL2PD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPL2PD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPL2PS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPL2PS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPS2PD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPS2PD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPS2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTPS2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTSD2SS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSD2SS, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSL2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSL2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSL2SS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSL2SS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSQ2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSQ2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSQ2SS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSQ2SS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSS2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSS2SD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcCVTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTTPD2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTTPD2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTTPS2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTTPS2PL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcCVTTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTTSD2SL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTTSD2SQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTTSD2SQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCVTTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcCVTTSS2SL, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcCWD, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregAX), true, actionR}, {uint8(implregDX), true, actionW}}},
{opcCWDE, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregAX), true, actionR}, {uint8(implregEAX), true, actionW}}},
{opcDECB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionRW}}},
{opcDECB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionRW}}},
{opcDECL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionRW}}},
{opcDECL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionRW}}},
{opcDECQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionRW}}},
{opcDECQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionRW}}},
{opcDECW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionRW}}},
{opcDECW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionRW}}},
{opcDIVB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(implregAX), true, actionRW}}},
{opcDIVB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(implregAX), true, actionRW}}},
{opcDIVL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionRW}}},
{opcDIVL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionRW}}},
{opcDIVPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionRW}}},
{opcDIVQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionRW}}},
{opcDIVSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDIVW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionRW}}},
{opcDIVW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionRW}}},
{opcDPPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDPPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDPPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcDPPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcEXTRACTPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM2U), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcEXTRACTPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM2U), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcHADDPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHADDPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHADDPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHADDPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHSUBPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHSUBPD, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHSUBPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcHSUBPS, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcIDIVB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(implregAX), true, actionRW}}},
{opcIDIVB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(implregAX), true, actionRW}}},
{opcIDIVL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionRW}}},
{opcIDIVL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionRW}}},
{opcIDIVQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionRW}}},
{opcIDIVQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionRW}}},
{opcIDIVW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionRW}}},
{opcIDIVW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionRW}}},
{opcIMUL3L, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcIMUL3L, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcIMUL3L, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcIMUL3L, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcIMUL3Q, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcIMUL3Q, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcIMUL3Q, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcIMUL3Q, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcIMUL3W, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcIMUL3W, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcIMUL3W, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcIMUL3W, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcIMULB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(implregAX), true, actionW}, {uint8(implregAL), true, actionR}}},
{opcIMULB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(implregAX), true, actionW}, {uint8(implregAL), true, actionR}}},
{opcIMULL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcIMULL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionW}}},
{opcIMULL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcIMULL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionW}}},
{opcIMULQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcIMULQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionW}}},
{opcIMULQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcIMULQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionW}}},
{opcIMULW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcIMULW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionW}}},
{opcIMULW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcIMULW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionW}}},
{opcINCB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionRW}}},
{opcINCB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionRW}}},
{opcINCL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionRW}}},
{opcINCL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionRW}}},
{opcINCQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionRW}}},
{opcINCQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionRW}}},
{opcINCW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionRW}}},
{opcINCW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionRW}}},
{opcINSERTPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcINSERTPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcINT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtype3), false, actionN}}},
{opcINT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM8), false, actionN}}},
{opcJA, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJA, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJAE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJAE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJB, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJB, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJBE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJBE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJCC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJCC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJCS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJCS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJCXZL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}, {uint8(implregECX), true, actionR}}},
{opcJCXZQ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}, {uint8(implregRCX), true, actionR}}},
{opcJE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJEQ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJEQ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJG, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJG, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJGE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJGE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJGT, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJGT, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJHI, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJHI, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJHS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJHS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJLE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJLE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJLO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJLO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJLS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJLS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJLT, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJLT, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJMI, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJMI, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJMP, sffxsclsNIL, featureBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJMP, sffxsclsNIL, featureBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJMP, sffxsclsNIL, featureBranch, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}}},
{opcJMP, sffxsclsNIL, featureBranch, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}}},
{opcJNA, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNA, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNAE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNAE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNB, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNB, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNBE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNBE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNG, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNG, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNGE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNGE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNLE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNLE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNP, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNP, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJNZ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJNZ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJOC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJOC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJOS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJOS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJP, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJP, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJPC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJPC, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJPE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJPE, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJPL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJPL, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJPO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJPO, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJPS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJPS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJS, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcJZ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL32), false, actionN}}},
{opcJZ, sffxsclsNIL, featureBranch | featureConditionalBranch, isasBase, 1, oprnds{{uint8(oprndtypeREL8), false, actionN}}},
{opcKADDB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKADDD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKADDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKADDW, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDNB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDND, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDNQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDNW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKANDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM8), false, actionW}}},
{opcKMOVB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcKMOVB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcKMOVD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcKMOVD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcKMOVQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcKMOVQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcKMOVW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcKMOVW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKMOVW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKNOTB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKNOTD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKNOTQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKNOTW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKORB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKORD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKORQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKORTESTB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKORTESTD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKORTESTQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKORTESTW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKORW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTLB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTLD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTLQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTLW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTRB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTRD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTRQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKSHIFTRW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKTESTB, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKTESTD, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKTESTQ, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKTESTW, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}}},
{opcKUNPCKBW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKUNPCKDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKUNPCKWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXNORB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXNORD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXNORQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXNORW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXORB, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXORD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXORQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcKXORW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcLDDQU, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcLDMXCSR, sffxsclsNIL, 0, isasSSE, 1, oprnds{{uint8(oprndtypeM32), false, actionR}}},
{opcLEAL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcLEAQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcLEAW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcLFENCE, sffxsclsNIL, 0, isasSSE2, 0, oprnds{}},
{opcLZCNTL, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcLZCNTL, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcLZCNTQ, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcLZCNTQ, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcLZCNTW, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcLZCNTW, sffxsclsNIL, 0, isasLZCNT, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMASKMOVDQU, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregRDI), true, actionR}}},
{opcMASKMOVOU, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregRDI), true, actionR}}},
{opcMAXPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMAXSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMFENCE, sffxsclsNIL, 0, isasSSE2, 0, oprnds{}},
{opcMINPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMINSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMONITOR, sffxsclsNIL, 0, isasMONITOR, 0, oprnds{{uint8(implregRAX), true, actionR}, {uint8(implregECX), true, actionR}, {uint8(implregEDX), true, actionR}}},
{opcMOVAPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVAPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVAPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVAPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVAPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVAPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionW}}},
{opcMOVB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionW}}},
{opcMOVB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionW}}},
{opcMOVB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionW}}},
{opcMOVB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionW}}},
{opcMOVBELL, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVBELL, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVBEQQ, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVBEQQ, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVBEWW, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVBEWW, sffxsclsNIL, 0, isasMOVBE, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcMOVBLSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVBLSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVBLZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVBLZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVBQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVBQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVBQZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVBQZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVBWSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVBWSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVBWZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVBWZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM64), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVD, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVDDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM64), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVDQ2Q, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVHLPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVHPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVHPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVHPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVHPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVLHPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVLPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVLPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVLPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVLPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVLQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVLQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVLQZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVMSKPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVMSKPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVNTDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVNTDQA, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVNTIL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVNTIQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVNTO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVNTPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVNTPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVOA, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVOA, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVOA, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVOU, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVOU, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVOU, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM64), false, actionN}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcMOVSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVSHDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSHDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSLDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSLDUP, sffxsclsNIL, 0, isasSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcMOVSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMOVUPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVUPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVUPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVUPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVUPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcMOVUPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcMOVW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionW}}},
{opcMOVW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcMOVW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcMOVWLSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVWLSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVWLZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVWLZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcMOVWQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVWQSX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVWQZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMOVWQZX, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcMPSADBW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMPSADBW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(implregAX), true, actionW}, {uint8(implregAL), true, actionR}}},
{opcMULB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(implregAX), true, actionW}, {uint8(implregAL), true, actionR}}},
{opcMULL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionW}}},
{opcMULL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(implregEAX), true, actionRW}, {uint8(implregEDX), true, actionW}}},
{opcMULPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionW}}},
{opcMULQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(implregRAX), true, actionRW}, {uint8(implregRDX), true, actionW}}},
{opcMULSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcMULW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionW}}},
{opcMULW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(implregAX), true, actionRW}, {uint8(implregDX), true, actionW}}},
{opcMULXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}, {uint8(oprndtypeR32), false, actionW}, {uint8(implregEDX), true, actionR}}},
{opcMULXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}, {uint8(oprndtypeR32), false, actionW}, {uint8(implregEDX), true, actionR}}},
{opcMULXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}, {uint8(oprndtypeR64), false, actionW}, {uint8(implregRDX), true, actionR}}},
{opcMULXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}, {uint8(oprndtypeR64), false, actionW}, {uint8(implregRDX), true, actionR}}},
{opcMWAIT, sffxsclsNIL, 0, isasMONITOR, 0, oprnds{{uint8(implregEAX), true, actionR}, {uint8(implregECX), true, actionR}}},
{opcNEGB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionRW}}},
{opcNEGB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionRW}}},
{opcNEGL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionRW}}},
{opcNEGL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionRW}}},
{opcNEGQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionRW}}},
{opcNEGQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionRW}}},
{opcNEGW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionRW}}},
{opcNEGW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionRW}}},
{opcNOP, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcNOTB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionRW}}},
{opcNOTB, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionRW}}},
{opcNOTL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM32), false, actionRW}}},
{opcNOTL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR32), false, actionRW}}},
{opcNOTQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionRW}}},
{opcNOTQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionRW}}},
{opcNOTW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionRW}}},
{opcNOTW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcORPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcORPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcORPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcORPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcPABSB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPABSB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPABSD, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPABSD, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPABSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPABSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPACKSSLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKSSLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKSSWB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKSSWB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKUSDW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKUSDW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKUSWB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPACKUSWB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDUSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDUSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDUSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDUSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPADDW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPALIGNR, sffxsclsNIL, 0, isasSSSE3, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPALIGNR, sffxsclsNIL, 0, isasSSSE3, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAND, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAND, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPANDN, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPANDN, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAUSE, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcPAVGB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAVGB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAVGW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPAVGW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPBLENDVB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPBLENDVB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPBLENDW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPBLENDW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCLMULQDQ, sffxsclsNIL, 0, isasPCLMULQDQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCLMULQDQ, sffxsclsNIL, 0, isasPCLMULQDQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQL, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPESTRI, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregECX), true, actionW}, {uint8(implregEDX), true, actionR}}},
{opcPCMPESTRI, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregECX), true, actionW}, {uint8(implregEDX), true, actionR}}},
{opcPCMPESTRM, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregEDX), true, actionR}, {uint8(implregX0), true, actionW}}},
{opcPCMPESTRM, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregEDX), true, actionR}, {uint8(implregX0), true, actionW}}},
{opcPCMPGTB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTL, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTQ, sffxsclsNIL, 0, isasSSE42, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasSSE42, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPCMPISTRI, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregECX), true, actionW}}},
{opcPCMPISTRI, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregECX), true, actionW}}},
{opcPCMPISTRM, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregX0), true, actionW}}},
{opcPCMPISTRM, sffxsclsNIL, 0, isasSSE42, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregX0), true, actionW}}},
{opcPDEPL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPDEPL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPDEPQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPDEPQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPEXTL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPEXTL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPEXTQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPEXTQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPEXTRB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM8), false, actionW}}},
{opcPEXTRB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPEXTRD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcPEXTRD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPEXTRQ, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcPEXTRQ, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPEXTRW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcPEXTRW, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPHADDD, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHADDD, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHADDSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHADDSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHADDW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHADDW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHMINPOSUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPHMINPOSUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPHSUBD, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHSUBD, sffxsclsNIL, featureCancellingInputs, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHSUBSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHSUBSW, sffxsclsNIL, featureCancellingInputs, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHSUBW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPHSUBW, sffxsclsNIL, featureCancellingInputs, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRB, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRQ, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRQ, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPINSRW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMADDUBSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMADDUBSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMADDWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMADDWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSB, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSB, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMAXUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSB, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSB, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMINUW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMOVMSKB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPMOVSXBD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXBD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXBQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXBQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXBW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXBW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXWD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXWD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXWQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVSXWQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXBW, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXWD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXWD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXWQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMOVZXWQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPMULDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULDQ, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHRSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHRSW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHUW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHUW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULHW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULLD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULLD, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULULQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPMULULQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPOPCNTL, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPOPCNTL, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcPOPCNTQ, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPOPCNTQ, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcPOPCNTW, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcPOPCNTW, sffxsclsNIL, 0, isasPOPCNT, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcPOPQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionW}}},
{opcPOPQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionW}}},
{opcPOPW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionW}}},
{opcPOPW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionW}}},
{opcPOR, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPOR, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPREFETCHNTA, sffxsclsNIL, 0, isasMMX, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcPREFETCHT0, sffxsclsNIL, 0, isasMMX, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcPREFETCHT1, sffxsclsNIL, 0, isasMMX, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcPREFETCHT2, sffxsclsNIL, 0, isasMMX, 1, oprnds{{uint8(oprndtypeM8), false, actionR}}},
{opcPSADBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSADBW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSHUFD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSHUFHW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFHW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFL, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSHUFL, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSHUFLW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSHUFLW, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSIGNB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSIGNB, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSIGND, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSIGND, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSIGNW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSIGNW, sffxsclsNIL, 0, isasSSSE3, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcPSLLDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSLLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRAW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLO, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSRLW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBB, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBL, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBQ, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBSB, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBSW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBUSB, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBUSW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPSUBW, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPTEST, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcPTEST, sffxsclsNIL, 0, isasSSE41, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcPUNPCKHBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHQDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHQDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKHWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLBW, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLLQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLQDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLQDQ, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUNPCKLWL, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPUSHQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM32), false, actionN}}},
{opcPUSHQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM8), false, actionN}}},
{opcPUSHQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM64), false, actionR}}},
{opcPUSHQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR64), false, actionR}}},
{opcPUSHW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM16), false, actionR}}},
{opcPUSHW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR16), false, actionR}}},
{opcPXOR, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcPXOR, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRCPPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcRCPPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcRCPSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcRCPSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRCRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRCRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRCRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRCRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRDRANDL, sffxsclsNIL, 0, isasRDRAND, 1, oprnds{{uint8(oprndtypeR16), false, actionW}}},
{opcRDRANDL, sffxsclsNIL, 0, isasRDRAND, 1, oprnds{{uint8(oprndtypeR32), false, actionW}}},
{opcRDRANDL, sffxsclsNIL, 0, isasRDRAND, 1, oprnds{{uint8(oprndtypeR64), false, actionW}}},
{opcRDSEEDL, sffxsclsNIL, 0, isasRDSEED, 1, oprnds{{uint8(oprndtypeR16), false, actionW}}},
{opcRDSEEDL, sffxsclsNIL, 0, isasRDSEED, 1, oprnds{{uint8(oprndtypeR32), false, actionW}}},
{opcRDSEEDL, sffxsclsNIL, 0, isasRDSEED, 1, oprnds{{uint8(oprndtypeR64), false, actionW}}},
{opcRDTSC, sffxsclsNIL, 0, isasRDTSC, 0, oprnds{{uint8(implregEAX), true, actionW}, {uint8(implregEDX), true, actionW}}},
{opcRDTSCP, sffxsclsNIL, 0, isasRDTSCP, 0, oprnds{{uint8(implregEAX), true, actionW}, {uint8(implregECX), true, actionW}, {uint8(implregEDX), true, actionW}}},
{opcRET, sffxsclsNIL, featureTerminal, isasBase, 0, oprnds{}},
{opcRETFL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM16), false, actionN}}},
{opcRETFQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM16), false, actionN}}},
{opcRETFW, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeIMM16), false, actionN}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcROLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcROLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcROLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcROLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcRORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcRORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcRORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcRORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcRORXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcRORXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcRORXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcRORXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcROUNDPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcROUNDPD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcROUNDPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcROUNDPS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcROUNDSD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcROUNDSD, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcROUNDSS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcROUNDSS, sffxsclsNIL, 0, isasSSE41, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcRSQRTPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcRSQRTPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcRSQRTSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcRSQRTSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSALB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSALL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSALQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSALW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSARB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSARL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSARQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSARW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSARXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSARXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSARXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSARXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSBBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcSBBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSBBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSBBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSBBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSBBB, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSBBL, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSBBQ, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSBBW, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSETCC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETCC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETCS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETCS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETEQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETEQ, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETGE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETGE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETGT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETGT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETHI, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETHI, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETLE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETLE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETLS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETLS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETLT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETLT, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETMI, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETMI, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETNE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETNE, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETOC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETOC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETOS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETOS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETPC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETPC, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETPL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETPL, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSETPS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeM8), false, actionW}}},
{opcSETPS, sffxsclsNIL, 0, isasBase, 1, oprnds{{uint8(oprndtypeR8), false, actionW}}},
{opcSFENCE, sffxsclsNIL, 0, isasMMX, 0, oprnds{}},
{opcSHA1MSG1, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1MSG1, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1MSG2, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1MSG2, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1NEXTE, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1NEXTE, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1RNDS4, sffxsclsNIL, 0, isasSHA, 3, oprnds{{uint8(oprndtypeIMM2U), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA1RNDS4, sffxsclsNIL, 0, isasSHA, 3, oprnds{{uint8(oprndtypeIMM2U), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256MSG1, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256MSG1, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256MSG2, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256MSG2, sffxsclsNIL, 0, isasSHA, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256RNDS2, sffxsclsNIL, 0, isasSHA, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHA256RNDS2, sffxsclsNIL, 0, isasSHA, 3, oprnds{{uint8(oprndtypeXMM0), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHLB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHLL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHLQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHLW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHLXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSHLXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSHLXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSHLXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSHRB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSHRL, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSHRQ, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtype1), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeCL), false, actionR}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSHRW, sffxsclsNIL, 0, isasBase, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSHRXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSHRXL, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcSHRXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSHRXQ, sffxsclsNIL, 0, isasBMI2, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcSHUFPD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHUFPD, sffxsclsNIL, 0, isasSSE2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHUFPS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSHUFPS, sffxsclsNIL, 0, isasSSE, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSQRTPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcSQRTPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcSQRTPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcSQRTPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcSQRTSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSQRTSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSQRTSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSQRTSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSTC, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcSTD, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcSTMXCSR, sffxsclsNIL, 0, isasSSE, 1, oprnds{{uint8(oprndtypeM32), false, actionW}}},
{opcSUBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcSUBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSUBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSUBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSUBB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcSUBB, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcSUBL, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcSUBPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcSUBQ, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcSUBSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBSD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBSS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcSUBW, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcSYSCALL, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregR11), true, actionW}, {uint8(implregRCX), true, actionW}}},
{opcTESTB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionR}}},
{opcTESTB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionR}}},
{opcTESTB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionR}}},
{opcTESTB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionR}}},
{opcTESTB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionR}}},
{opcTESTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionR}}},
{opcTESTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionR}}},
{opcTESTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionR}}},
{opcTESTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionR}}},
{opcTESTL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionR}}},
{opcTESTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionR}}},
{opcTESTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionR}}},
{opcTESTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionR}}},
{opcTESTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionR}}},
{opcTESTQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionR}}},
{opcTESTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionR}}},
{opcTESTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionR}}},
{opcTESTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionR}}},
{opcTESTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionR}}},
{opcTESTW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionR}}},
{opcTZCNTL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcTZCNTL, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcTZCNTQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcTZCNTQ, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcTZCNTW, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcTZCNTW, sffxsclsNIL, 0, isasBMI, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionW}}},
{opcUCOMISD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcUCOMISD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcUCOMISS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcUCOMISS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcUD2, sffxsclsNIL, 0, isasBase, 0, oprnds{}},
{opcUNPCKHPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKHPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKHPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKHPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKLPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKLPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKLPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcUNPCKLPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVADDPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVADDSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVADDSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVADDSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVADDSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVAESDEC, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESDEC, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESDECLAST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESDECLAST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESENC, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESENC, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESENCLAST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESENCLAST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESIMC, sffxsclsNIL, 0, isasAES_AVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESIMC, sffxsclsNIL, 0, isasAES_AVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESKEYGENASSIST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVAESKEYGENASSIST, sffxsclsNIL, 0, isasAES_AVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGND, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGND, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGND, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGND, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGND, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGND, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVALIGNQ, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVALIGNQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDNPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDNPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVANDPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVANDPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBLENDMPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDMPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBLENDPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDVPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDVPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDVPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDVPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDVPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDVPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBLENDVPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBLENDVPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF128, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTF32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTF32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF32X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF32X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF32X4, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X4, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF32X8, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTF64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF64X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTF64X4, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTF64X4, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI128, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI32X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI32X4, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X4, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI32X8, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTI64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI64X2, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTI64X4, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTI64X4, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTSS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVBROADCASTSS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTSS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVBROADCASTSS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVBROADCASTSS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCMPSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVCOMISD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMISD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMISD, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMISS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMISS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMISS, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCOMPRESSPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVCOMPRESSPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCOMPRESSPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVCOMPRESSPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTDQ2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTDQ2PS, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2DQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2DQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQX, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQY, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2DQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2DQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2PS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PS, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSX, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSY, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2PSY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2PSY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2QQ, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UDQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UDQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQX, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQY, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UDQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPD2UQQ, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasF16C, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasF16C, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasF16C, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasF16C, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPH2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPH2PS, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2DQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsBCST_Z, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsBCST, 0, isasAVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PD, sffxsclsNIL, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2PD, sffxsclsZ, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasF16C, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasF16C, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasF16C, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasF16C, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2PH, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVCVTPS2PH, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2PH, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2QQ, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UDQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTPS2UQQ, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTQQ2PD, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PD, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PS, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PS, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PS, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTQQ2PS, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PS, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSX, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSX, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSX, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSY, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSY, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTQQ2PSY, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2SI, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSD2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSD2SIQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSD2SS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSD2SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSD2SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSD2SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSD2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2USIL, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSD2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSD2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSD2USIQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSI2SDL, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SDL, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SDQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSL, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSL, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSL, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSI2SSQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSS2SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSS2SD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTSS2SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTSS2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2SI, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSS2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSS2SIQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSS2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2USIL, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTSS2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSS2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTSS2USIQ, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2DQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2DQ, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQX, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQY, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2DQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2DQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsSAE, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsSAE_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2QQ, sffxsclsSAE, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UDQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UDQ, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQX, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQX, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQX, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQY, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UDQY, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UDQY, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsSAE, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPD2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsSAE_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPD2UQQ, sffxsclsSAE, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2DQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2DQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsSAE, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2QQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsSAE_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2QQ, sffxsclsSAE, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UDQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsSAE, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTTPS2UQQ, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsSAE_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTPS2UQQ, sffxsclsSAE, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTTSD2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2SI, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSD2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSD2SIQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSD2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2USIL, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSD2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSD2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSD2USIQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2SI, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2SI, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2SIQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2SIQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2USIL, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2USIL, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVCVTTSS2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2USIQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTTSS2USIQ, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUDQ2PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUDQ2PS, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVCVTUQQ2PD, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PD, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PS, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PS, sffxsclsBCST_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsBCST, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PS, sffxsclsER, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVCVTUQQ2PS, sffxsclsZ, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsER_Z, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PS, sffxsclsER, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSX, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSX, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSX, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSY, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSY, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVCVTUQQ2PSY, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUQQ2PSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SDL, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SDL, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SDQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSL, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSL, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSL, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVCVTUSI2SSQ, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDBPSADBW, sffxsclsZ, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDBPSADBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVDIVPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVDIVSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVDIVSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDIVSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDPPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVDPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVDPPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXP2PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PD, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PD, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PD, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PS, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PS, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXP2PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXP2PS, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXPANDPD, sffxsclsZ, 0, isasAVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPD, sffxsclsNIL, 0, isasAVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVEXPANDPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXPANDPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVEXTRACTF128, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF128, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTF32X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTF32X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVEXTRACTF32X8, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXTRACTF32X8, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTF64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTF64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTF64X2, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTF64X2, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTF64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVEXTRACTF64X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTF64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXTRACTF64X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTF64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTF64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTI128, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI128, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTI32X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTI32X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI32X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVEXTRACTI32X8, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXTRACTI32X8, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTI64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTI64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVEXTRACTI64X2, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVEXTRACTI64X2, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVEXTRACTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVEXTRACTI64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVEXTRACTI64X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTI64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVEXTRACTI64X4, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTI64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVEXTRACTI64X4, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVEXTRACTPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVEXTRACTPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST_Z, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsBCST, 0, isasAVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsZ, 0, isasAVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMPS, sffxsclsNIL, 0, isasAVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFIXUPIMMSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD132SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD213SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADD231SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMADDSUB231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB132SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB213SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUB231SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFMSUBADD231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD132SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD213SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMADD231SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB132SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB213SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231PS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsNIL, 0, isasFMA3, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFNMSUB231SS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVFPCLASSPDX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPDZ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSX, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSY, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSPSZ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVFPCLASSSS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVGATHERDPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERDPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGATHERDPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERDPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM32Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGATHERQPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERQPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGATHERQPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM64Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGATHERQPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGATHERQPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM64Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPD, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETEXPPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsSAE_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPPS, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETEXPSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETEXPSS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVGETMANTPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTPS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVGETMANTSS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVGETMANTSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHADDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVHSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVHSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF32X8, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF32X8, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTF64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTF64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF64X2, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF64X2, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF64X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTF64X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTF64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI128, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI128, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI32X8, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI32X8, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI32X8, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTI64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVINSERTI64X2, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI64X2, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI64X2, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X2, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI64X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVINSERTI64X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTI64X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVINSERTPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVINSERTPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVLDDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVLDDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVLDMXCSR, sffxsclsNIL, 0, isasAVX, 1, oprnds{{uint8(oprndtypeM32), false, actionR}}},
{opcVMASKMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregRDI), true, actionR}}},
{opcVMASKMOVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMASKMOVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMASKMOVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMASKMOVPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMASKMOVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMASKMOVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMASKMOVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMASKMOVPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMAXPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXPS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMAXSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMAXSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMAXSS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMINPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINPS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMINSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMINSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMINSS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVAPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVAPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVAPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVAPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVMOVD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQA32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQA32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQA64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQA64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU16, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU16, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU32, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU32, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU64, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU64, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVDQU8, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVDQU8, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVHLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVHPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVHPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVHPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVLHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVLPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVLPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVLPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVMSKPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVMOVMSKPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVMOVMSKPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVMOVMSKPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVMOVNTDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVNTDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVNTDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVNTDQA, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVNTDQA, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVNTDQA, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVNTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVNTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVNTPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVNTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVNTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVNTPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVMOVQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVMOVSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVSHDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSHDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVSLDUP, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSLDUP, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVMOVSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVUPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVUPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMOVUPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVMOVUPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMPSADBW, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMPSADBW, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMPSADBW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMPSADBW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVMULPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVMULSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVMULSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVMULSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVORPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVORPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSQ, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPABSW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPABSW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsBCST_Z, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsBCST_Z, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsBCST_Z, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsBCST, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKSSDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKSSWB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKSSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsBCST_Z, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsBCST_Z, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsBCST_Z, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsBCST, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKUSDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPACKUSWB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPACKUSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDUSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDUSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDUSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPADDW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPADDW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPALIGNR, sffxsclsZ, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPALIGNR, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAND, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAND, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAND, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAND, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDN, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDN, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDN, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDN, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDND, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDND, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDND, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDND, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDND, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDND, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDNQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDNQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPANDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPANDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPAVGB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPAVGW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPAVGW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDD, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDD, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDD, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDD, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBLENDMW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBLENDVB, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDVB, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDVB, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDVB, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDW, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDW, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBLENDW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBLENDW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTMB2Q, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTMB2Q, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTMB2Q, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTMW2D, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTMW2D, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTMW2D, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPBROADCASTW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX_PCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX_PCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPEQW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPESTRI, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregECX), true, actionW}, {uint8(implregEDX), true, actionR}}},
{opcVPCMPESTRI, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregECX), true, actionW}, {uint8(implregEDX), true, actionR}}},
{opcVPCMPESTRM, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregEDX), true, actionR}, {uint8(implregX0), true, actionW}}},
{opcVPCMPESTRM, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregEAX), true, actionR}, {uint8(implregEDX), true, actionR}, {uint8(implregX0), true, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPGTW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPISTRI, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregECX), true, actionW}}},
{opcVPCMPISTRI, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregECX), true, actionW}}},
{opcVPCMPISTRM, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregX0), true, actionW}}},
{opcVPCMPISTRM, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(implregX0), true, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}},
{opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsBCST_Z, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsBCST, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsBCST_Z, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsBCST, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERM2F128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERM2F128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERM2I128, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERM2I128, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMB, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMB, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2B, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2D, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2Q, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMI2W, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMILPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMILPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2B, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2D, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2Q, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMT2W, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPERMW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPEXTRB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM8), false, actionW}}},
{opcVPEXTRB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVPEXTRD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPEXTRD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVPEXTRQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPEXTRQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR64), false, actionW}}},
{opcVPEXTRW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPEXTRW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVPGATHERDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM32Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPGATHERDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM32X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM32Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPGATHERQD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM64Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERQQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionRW}, {uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionRW}, {uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64X), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPGATHERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeVM64Y), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPGATHERQQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeVM64Z), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPHADDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHADDD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHADDSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHADDSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHADDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHADDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHADDW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHMINPOSUW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHMINPOSUW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPHSUBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPHSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRB, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRB, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRQ, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRQ, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPINSRW, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsBCST_Z, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsBCST, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTD, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTD, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsBCST_Z, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsBCST_Z, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsBCST, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPLZCNTQ, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPLZCNTQ, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsBCST, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsZ, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52HUQ, sffxsclsNIL, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST_Z, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsBCST, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsZ, 0, isasAVX512IFMA, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADD52LUQ, sffxsclsNIL, 0, isasAVX512IFMA, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADDUBSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDUBSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMADDWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMADDWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMASKMOVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMASKMOVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMASKMOVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMASKMOVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMASKMOVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMASKMOVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMASKMOVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMASKMOVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMAXUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMAXUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMINUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMINUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVB2M, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVB2M, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVB2M, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVD2M, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVD2M, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVD2M, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVM2B, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVM2B, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVM2B, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVM2D, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVM2D, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVM2D, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVM2Q, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVM2Q, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVM2Q, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVM2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVM2W, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVM2W, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVMSKB, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVPMOVMSKB, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}},
{opcVPMOVQ2M, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVQ2M, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVQ2M, sffxsclsNIL, 0, isasAVX512DQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVSWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXBW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXBW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXWD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVSXWQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVSXWQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSDB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSDB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVUSDW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSDW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM16), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQB, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQB, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVUSQD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSQD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSQW, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSQW, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVUSWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVUSWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVW2M, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVW2M, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVW2M, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM64), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVWB, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}},
{opcVPMOVWB, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXBW, sffxsclsZ, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXBW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXWD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMOVZXWQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMOVZXWQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHRSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHRSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHUW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHUW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULHW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULHW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLQ, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLQ, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST_Z, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST_Z, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST_Z, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsBCST, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULTISHIFTQB, sffxsclsZ, 0, isasAVX512VBMI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULTISHIFTQB, sffxsclsNIL, 0, isasAVX512VBMI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTD, sffxsclsBCST_Z, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTQ, sffxsclsBCST_Z, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPOR, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPOR, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPOR, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPOR, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPROLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPROLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPRORVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPRORVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSADBW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSCATTERDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVPSCATTERDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Y), false, actionW}}},
{opcVPSCATTERDD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Z), false, actionW}}},
{opcVPSCATTERDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVPSCATTERDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVPSCATTERDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Y), false, actionW}}},
{opcVPSCATTERQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64X), false, actionW}}},
{opcVPSCATTERQD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Y), false, actionW}}},
{opcVPSCATTERQD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Z), false, actionW}}},
{opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64X), false, actionW}}},
{opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Y), false, actionW}}},
{opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Z), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFHW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFHW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSHUFLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSHUFLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSIGNB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGNB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGNB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSIGNB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSIGND, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGND, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGND, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSIGND, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSIGNW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGNW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSIGNW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSIGNW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSLLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSLLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRAW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRAW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLDQ, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLVW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLVW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSRLW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSRLW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBB, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBD, sffxsclsZ, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBD, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, featureCancellingInputs, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBQ, sffxsclsZ, featureCancellingInputs, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBQ, sffxsclsNIL, featureCancellingInputs, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBUSB, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSB, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBUSW, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBUSW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, featureCancellingInputs, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPSUBW, sffxsclsZ, featureCancellingInputs, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPSUBW, sffxsclsNIL, featureCancellingInputs, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTERNLOGQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPTEST, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVPTEST, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVPTEST, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVPTEST, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMB, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPTESTNMW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHBW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHQDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHQDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKHWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKHWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLBW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLBW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLQDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLQDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPUNPCKLWD, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPUNPCKLWD, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXOR, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXOR, sffxsclsNIL, featureCancellingInputs, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXOR, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXOR, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORQ, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORQ, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVPXORQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVPXORQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsSAE, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsSAE_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPD, sffxsclsSAE, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsSAE, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRANGEPS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsSAE_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGEPS, sffxsclsSAE, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRANGESD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESD, sffxsclsSAE, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESD, sffxsclsSAE_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESD, sffxsclsSAE, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESS, sffxsclsSAE, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRANGESS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsSAE_Z, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRANGESS, sffxsclsSAE, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP14PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP14SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP14SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP14SS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PD, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PD, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PD, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PS, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PS, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRCP28PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28PS, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRCP28SD, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SD, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SD, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SD, sffxsclsSAE, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SD, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SD, sffxsclsSAE_Z, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SD, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SS, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SS, sffxsclsSAE, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRCP28SS, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsSAE_Z, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCP28SS, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCPPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCPPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCPPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCPPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRCPSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRCPSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVREDUCEPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCEPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVREDUCESD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCESD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESD, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCESD, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCESS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESS, sffxsclsNIL, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVREDUCESS, sffxsclsZ, 0, isasAVX512DQ, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVREDUCESS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPD, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRNDSCALEPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsSAE_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALEPS, sffxsclsSAE, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESD, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESD, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESS, sffxsclsSAE, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRNDSCALESS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRNDSCALESS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVROUNDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVROUNDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVROUNDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVROUNDSD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDSD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDSS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVROUNDSS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT14PS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14PS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT14SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14SD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT14SS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT14SS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PD, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PD, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PD, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PD, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsBCST, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PS, sffxsclsBCST_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsBCST, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PS, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVRSQRT28PS, sffxsclsZ, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsSAE_Z, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsNIL, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28PS, sffxsclsSAE, 0, isasAVX512ER, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SD, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SD, sffxsclsSAE, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SD, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsSAE_Z, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SD, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SS, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsNIL, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SS, sffxsclsSAE, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVRSQRT28SS, sffxsclsZ, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsSAE_Z, 0, isasAVX512ER, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsNIL, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRT28SS, sffxsclsSAE, 0, isasAVX512ER, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVRSQRTSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVRSQRTSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSCALEFPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSCALEFSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCALEFSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSCATTERDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVSCATTERDPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVSCATTERDPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Y), false, actionW}}},
{opcVSCATTERDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32X), false, actionW}}},
{opcVSCATTERDPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Y), false, actionW}}},
{opcVSCATTERDPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM32Z), false, actionW}}},
{opcVSCATTERQPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64X), false, actionW}}},
{opcVSCATTERQPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Y), false, actionW}}},
{opcVSCATTERQPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Z), false, actionW}}},
{opcVSCATTERQPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64X), false, actionW}}},
{opcVSCATTERQPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Y), false, actionW}}},
{opcVSCATTERQPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Z), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFF64X2, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFF64X2, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI32X4, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI32X4, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFI64X2, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFI64X2, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPD, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsBCST_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSHUFPS, sffxsclsZ, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSHUFPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPD, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPD, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsBCST_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsBCST, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSQRTPS, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsER_Z, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTPS, sffxsclsER, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSQRTSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSQRTSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSQRTSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSTMXCSR, sffxsclsNIL, 0, isasAVX, 1, oprnds{{uint8(oprndtypeM32), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVSUBPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBPS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVSUBSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSD, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSD, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSD, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSS, sffxsclsER, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVSUBSS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsER_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVSUBSS, sffxsclsER, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVTESTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVTESTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVTESTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVTESTPD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVTESTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVTESTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVTESTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVTESTPS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}}},
{opcVUCOMISD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUCOMISD, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUCOMISD, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUCOMISS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUCOMISS, sffxsclsNIL, 0, isasAVX, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUCOMISS, sffxsclsSAE, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKHPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKHPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPD, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPD, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsBCST_Z, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsBCST_Z, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsBCST, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVUNPCKLPS, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVUNPCKLPS, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPD, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPD, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPD, sffxsclsZ, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPD, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPS, sffxsclsBCST_Z, 0, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPS, sffxsclsBCST_Z, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsBCST, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, 0, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, 0, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
{opcVXORPS, sffxsclsZ, featureCancellingInputs, isasAVX512DQ, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVXORPS, sffxsclsNIL, featureCancellingInputs, isasAVX512DQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
{opcVZEROALL, sffxsclsNIL, 0, isasAVX, 0, oprnds{}},
{opcVZEROUPPER, sffxsclsNIL, 0, isasAVX, 0, oprnds{}},
{opcXADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionRW}, {uint8(oprndtypeM8), false, actionRW}}},
{opcXADDB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionRW}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionRW}, {uint8(oprndtypeM32), false, actionRW}}},
{opcXADDL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionRW}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionRW}, {uint8(oprndtypeM64), false, actionRW}}},
{opcXADDQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionRW}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionRW}, {uint8(oprndtypeM16), false, actionRW}}},
{opcXADDW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionRW}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXCHGB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionRW}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXCHGB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionRW}, {uint8(oprndtypeM8), false, actionRW}}},
{opcXCHGB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionRW}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeEAX), false, actionRW}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionRW}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionRW}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionRW}, {uint8(oprndtypeM32), false, actionRW}}},
{opcXCHGL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionRW}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionRW}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionRW}, {uint8(oprndtypeM64), false, actionRW}}},
{opcXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionRW}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionRW}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcXCHGQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeRAX), false, actionRW}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeAX), false, actionRW}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionRW}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionRW}, {uint8(oprndtypeAX), false, actionRW}}},
{opcXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionRW}, {uint8(oprndtypeM16), false, actionRW}}},
{opcXCHGW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionRW}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXGETBV, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregEAX), true, actionW}, {uint8(implregECX), true, actionR}, {uint8(implregEDX), true, actionW}}},
{opcXLAT, sffxsclsNIL, 0, isasBase, 0, oprnds{{uint8(implregAL), true, actionRW}, {uint8(implregEBX), true, actionR}}},
{opcXORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeAL), false, actionRW}}},
{opcXORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM8), false, actionRW}}},
{opcXORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXORB, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeM8), false, actionRW}}},
{opcXORB, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR8), false, actionR}, {uint8(oprndtypeR8), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeEAX), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXORL, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeM32), false, actionRW}}},
{opcXORL, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR32), false, actionR}, {uint8(oprndtypeR32), false, actionRW}}},
{opcXORPD, sffxsclsNIL, 0, isasSSE2, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcXORPD, sffxsclsNIL, featureCancellingInputs, isasSSE2, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcXORPS, sffxsclsNIL, 0, isasSSE, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcXORPS, sffxsclsNIL, featureCancellingInputs, isasSSE, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM32), false, actionN}, {uint8(oprndtypeRAX), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeM64), false, actionRW}}},
{opcXORQ, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR64), false, actionR}, {uint8(oprndtypeR64), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeAX), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM16), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM16), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeM16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
{opcXORW, sffxsclsNIL, 0, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeM16), false, actionRW}}},
{opcXORW, sffxsclsNIL, featureCancellingInputs, isasBase, 2, oprnds{{uint8(oprndtypeR16), false, actionR}, {uint8(oprndtypeR16), false, actionRW}}},
}
func (o opc) Forms() []form {
if opcNone < o && o < opcmax {
return opcformstable[o-1]
}
return nil
}
var opcformstable = [][]form{
forms[0:6],
forms[6:14],
forms[14:22],
forms[22:30],
forms[30:32],
forms[32:34],
forms[34:40],
forms[40:48],
forms[48:50],
forms[50:52],
forms[52:60],
forms[60:62],
forms[62:64],
forms[64:66],
forms[66:68],
forms[68:76],
forms[76:78],
forms[78:80],
forms[80:82],
forms[82:84],
forms[84:86],
forms[86:88],
forms[88:90],
forms[90:92],
forms[92:98],
forms[98:106],
forms[106:108],
forms[108:110],
forms[110:112],
forms[112:114],
forms[114:116],
forms[116:118],
forms[118:126],
forms[126:134],
forms[134:136],
forms[136:138],
forms[138:140],
forms[140:142],
forms[142:144],
forms[144:146],
forms[146:148],
forms[148:150],
forms[150:152],
forms[152:154],
forms[154:156],
forms[156:158],
forms[158:160],
forms[160:162],
forms[162:164],
forms[164:166],
forms[166:168],
forms[168:170],
forms[170:171],
forms[171:172],
forms[172:176],
forms[176:180],
forms[180:184],
forms[184:188],
forms[188:192],
forms[192:196],
forms[196:200],
forms[200:204],
forms[204:208],
forms[208:212],
forms[212:216],
forms[216:220],
forms[220:222],
forms[222:224],
forms[224:225],
forms[225:226],
forms[226:227],
forms[227:228],
forms[228:229],
forms[229:230],
forms[230:231],
forms[231:232],
forms[232:233],
forms[233:235],
forms[235:237],
forms[237:239],
forms[239:241],
forms[241:243],
forms[243:245],
forms[245:247],
forms[247:249],
forms[249:251],
forms[251:253],
forms[253:255],
forms[255:257],
forms[257:259],
forms[259:261],
forms[261:263],
forms[263:265],
forms[265:267],
forms[267:269],
forms[269:271],
forms[271:273],
forms[273:275],
forms[275:277],
forms[277:279],
forms[279:281],
forms[281:283],
forms[283:285],
forms[285:287],
forms[287:289],
forms[289:291],
forms[291:293],
forms[293:295],
forms[295:297],
forms[297:299],
forms[299:301],
forms[301:303],
forms[303:305],
forms[305:307],
forms[307:309],
forms[309:311],
forms[311:313],
forms[313:315],
forms[315:317],
forms[317:319],
forms[319:321],
forms[321:323],
forms[323:325],
forms[325:327],
forms[327:329],
forms[329:335],
forms[335:343],
forms[343:345],
forms[345:347],
forms[347:355],
forms[355:357],
forms[357:359],
forms[359:367],
forms[367:368],
forms[368:369],
forms[369:371],
forms[371:373],
forms[373:375],
forms[375:377],
forms[377:379],
forms[379:381],
forms[381:382],
forms[382:383],
forms[383:387],
forms[387:389],
forms[389:391],
forms[391:393],
forms[393:395],
forms[395:397],
forms[397:399],
forms[399:401],
forms[401:403],
forms[403:405],
forms[405:409],
forms[409:411],
forms[411:413],
forms[413:415],
forms[415:417],
forms[417:419],
forms[419:421],
forms[421:425],
forms[425:427],
forms[427:429],
forms[429:431],
forms[431:433],
forms[433:437],
forms[437:438],
forms[438:439],
forms[439:441],
forms[441:443],
forms[443:445],
forms[445:447],
forms[447:449],
forms[449:451],
forms[451:453],
forms[453:455],
forms[455:457],
forms[457:459],
forms[459:461],
forms[461:463],
forms[463:465],
forms[465:467],
forms[467:469],
forms[469:471],
forms[471:473],
forms[473:475],
forms[475:477],
forms[477:479],
forms[479:481],
forms[481:483],
forms[483:485],
forms[485:489],
forms[489:493],
forms[493:497],
forms[497:499],
forms[499:503],
forms[503:507],
forms[507:511],
forms[511:513],
forms[513:515],
forms[515:517],
forms[517:519],
forms[519:521],
forms[521:523],
forms[523:525],
forms[525:527],
forms[527:529],
forms[529:531],
forms[531:533],
forms[533:535],
forms[535:537],
forms[537:538],
forms[538:539],
forms[539:541],
forms[541:543],
forms[543:545],
forms[545:547],
forms[547:549],
forms[549:551],
forms[551:553],
forms[553:555],
forms[555:557],
forms[557:559],
forms[559:561],
forms[561:563],
forms[563:565],
forms[565:569],
forms[569:571],
forms[571:573],
forms[573:575],
forms[575:577],
forms[577:579],
forms[579:581],
forms[581:583],
forms[583:585],
forms[585:587],
forms[587:589],
forms[589:591],
forms[591:593],
forms[593:595],
forms[595:597],
forms[597:599],
forms[599:601],
forms[601:603],
forms[603:605],
forms[605:607],
forms[607:609],
forms[609:611],
forms[611:613],
forms[613:615],
forms[615:617],
forms[617:619],
forms[619:620],
forms[620:621],
forms[621:622],
forms[622:623],
forms[623:624],
forms[624:625],
forms[625:626],
forms[626:627],
forms[627:628],
forms[628:629],
forms[629:630],
forms[630:631],
forms[631:636],
forms[636:641],
forms[641:646],
forms[646:651],
forms[651:652],
forms[652:653],
forms[653:654],
forms[654:655],
forms[655:656],
forms[656:657],
forms[657:658],
forms[658:659],
forms[659:660],
forms[660:661],
forms[661:662],
forms[662:663],
forms[663:664],
forms[664:665],
forms[665:666],
forms[666:667],
forms[667:668],
forms[668:669],
forms[669:670],
forms[670:671],
forms[671:672],
forms[672:673],
forms[673:674],
forms[674:675],
forms[675:676],
forms[676:677],
forms[677:678],
forms[678:679],
forms[679:680],
forms[680:681],
forms[681:682],
forms[682:683],
forms[683:684],
forms[684:685],
forms[685:686],
forms[686:687],
forms[687:688],
forms[688:689],
forms[689:690],
forms[690:691],
forms[691:692],
forms[692:694],
forms[694:696],
forms[696:698],
forms[698:699],
forms[699:700],
forms[700:702],
forms[702:704],
forms[704:706],
forms[706:708],
forms[708:709],
forms[709:711],
forms[711:713],
forms[713:715],
forms[715:717],
forms[717:718],
forms[718:721],
forms[721:724],
forms[724:729],
forms[729:731],
forms[731:733],
forms[733:735],
forms[735:737],
forms[737:739],
forms[739:741],
forms[741:743],
forms[743:745],
forms[745:747],
forms[747:762],
forms[762:764],
forms[764:779],
forms[779:780],
forms[780:782],
forms[782:784],
forms[784:789],
forms[789:790],
forms[790:792],
forms[792:794],
forms[794:796],
forms[796:797],
forms[797:798],
forms[798:799],
forms[799:800],
forms[800:801],
forms[801:802],
forms[802:803],
forms[803:804],
forms[804:805],
forms[805:806],
forms[806:809],
forms[809:812],
forms[812:815],
forms[815:830],
forms[830:833],
forms[833:835],
forms[835:837],
forms[837:840],
forms[840:843],
forms[843:846],
forms[846:851],
forms[851:853],
forms[853:855],
forms[855:857],
forms[857:859],
forms[859:861],
forms[861:863],
forms[863:865],
forms[865:867],
forms[867:869],
forms[869:871],
forms[871:873],
forms[873:875],
forms[875:877],
forms[877:879],
forms[879:881],
forms[881:882],
forms[882:884],
forms[884:886],
forms[886:888],
forms[888:890],
forms[890:891],
forms[891:893],
forms[893:895],
forms[895:897],
forms[897:899],
forms[899:905],
forms[905:913],
forms[913:915],
forms[915:917],
forms[917:925],
forms[925:933],
forms[933:935],
forms[935:937],
forms[937:939],
forms[939:941],
forms[941:943],
forms[943:945],
forms[945:947],
forms[947:949],
forms[949:951],
forms[951:953],
forms[953:955],
forms[955:957],
forms[957:959],
forms[959:961],
forms[961:963],
forms[963:965],
forms[965:967],
forms[967:969],
forms[969:971],
forms[971:972],
forms[972:974],
forms[974:976],
forms[976:978],
forms[978:980],
forms[980:982],
forms[982:984],
forms[984:986],
forms[986:988],
forms[988:990],
forms[990:992],
forms[992:994],
forms[994:996],
forms[996:998],
forms[998:1000],
forms[1000:1002],
forms[1002:1004],
forms[1004:1006],
forms[1006:1008],
forms[1008:1010],
forms[1010:1012],
forms[1012:1014],
forms[1014:1016],
forms[1016:1018],
forms[1018:1020],
forms[1020:1022],
forms[1022:1024],
forms[1024:1026],
forms[1026:1028],
forms[1028:1030],
forms[1030:1032],
forms[1032:1034],
forms[1034:1036],
forms[1036:1038],
forms[1038:1040],
forms[1040:1042],
forms[1042:1044],
forms[1044:1046],
forms[1046:1048],
forms[1048:1050],
forms[1050:1052],
forms[1052:1054],
forms[1054:1056],
forms[1056:1058],
forms[1058:1060],
forms[1060:1062],
forms[1062:1064],
forms[1064:1066],
forms[1066:1068],
forms[1068:1070],
forms[1070:1072],
forms[1072:1073],
forms[1073:1075],
forms[1075:1077],
forms[1077:1079],
forms[1079:1081],
forms[1081:1083],
forms[1083:1085],
forms[1085:1087],
forms[1087:1089],
forms[1089:1091],
forms[1091:1093],
forms[1093:1095],
forms[1095:1097],
forms[1097:1099],
forms[1099:1101],
forms[1101:1103],
forms[1103:1105],
forms[1105:1107],
forms[1107:1109],
forms[1109:1111],
forms[1111:1113],
forms[1113:1115],
forms[1115:1117],
forms[1117:1119],
forms[1119:1121],
forms[1121:1123],
forms[1123:1124],
forms[1124:1125],
forms[1125:1126],
forms[1126:1127],
forms[1127:1129],
forms[1129:1131],
forms[1131:1133],
forms[1133:1135],
forms[1135:1137],
forms[1137:1139],
forms[1139:1141],
forms[1141:1143],
forms[1143:1145],
forms[1145:1146],
forms[1146:1149],
forms[1149:1150],
forms[1150:1153],
forms[1153:1156],
forms[1156:1159],
forms[1159:1162],
forms[1162:1163],
forms[1163:1166],
forms[1166:1167],
forms[1167:1170],
forms[1170:1173],
forms[1173:1175],
forms[1175:1177],
forms[1177:1179],
forms[1179:1181],
forms[1181:1183],
forms[1183:1185],
forms[1185:1187],
forms[1187:1189],
forms[1189:1191],
forms[1191:1193],
forms[1193:1195],
forms[1195:1197],
forms[1197:1199],
forms[1199:1201],
forms[1201:1203],
forms[1203:1205],
forms[1205:1207],
forms[1207:1211],
forms[1211:1213],
forms[1213:1215],
forms[1215:1221],
forms[1221:1227],
forms[1227:1233],
forms[1233:1239],
forms[1239:1241],
forms[1241:1243],
forms[1243:1249],
forms[1249:1255],
forms[1255:1261],
forms[1261:1267],
forms[1267:1270],
forms[1270:1273],
forms[1273:1274],
forms[1274:1275],
forms[1275:1276],
forms[1276:1277],
forms[1277:1278],
forms[1278:1279],
forms[1279:1285],
forms[1285:1291],
forms[1291:1297],
forms[1297:1303],
forms[1303:1309],
forms[1309:1315],
forms[1315:1321],
forms[1321:1327],
forms[1327:1329],
forms[1329:1331],
forms[1331:1333],
forms[1333:1335],
forms[1335:1337],
forms[1337:1339],
forms[1339:1341],
forms[1341:1343],
forms[1343:1349],
forms[1349:1355],
forms[1355:1361],
forms[1361:1367],
forms[1367:1373],
forms[1373:1379],
forms[1379:1385],
forms[1385:1391],
forms[1391:1393],
forms[1393:1395],
forms[1395:1401],
forms[1401:1409],
forms[1409:1417],
forms[1417:1425],
forms[1425:1427],
forms[1427:1429],
forms[1429:1431],
forms[1431:1433],
forms[1433:1435],
forms[1435:1437],
forms[1437:1439],
forms[1439:1441],
forms[1441:1443],
forms[1443:1445],
forms[1445:1447],
forms[1447:1449],
forms[1449:1451],
forms[1451:1453],
forms[1453:1455],
forms[1455:1457],
forms[1457:1458],
forms[1458:1460],
forms[1460:1462],
forms[1462:1464],
forms[1464:1466],
forms[1466:1468],
forms[1468:1470],
forms[1470:1472],
forms[1472:1478],
forms[1478:1488],
forms[1488:1498],
forms[1498:1508],
forms[1508:1510],
forms[1510:1512],
forms[1512:1518],
forms[1518:1528],
forms[1528:1538],
forms[1538:1548],
forms[1548:1550],
forms[1550:1552],
forms[1552:1554],
forms[1554:1556],
forms[1556:1558],
forms[1558:1560],
forms[1560:1562],
forms[1562:1564],
forms[1564:1565],
forms[1565:1566],
forms[1566:1567],
forms[1567:1573],
forms[1573:1581],
forms[1581:1583],
forms[1583:1585],
forms[1585:1593],
forms[1593:1595],
forms[1595:1597],
forms[1597:1605],
forms[1605:1606],
forms[1606:1611],
forms[1611:1616],
forms[1616:1621],
forms[1621:1626],
forms[1626:1628],
forms[1628:1630],
forms[1630:1632],
forms[1632:1634],
forms[1634:1636],
forms[1636:1637],
forms[1637:1639],
forms[1639:1641],
forms[1641:1643],
forms[1643:1645],
forms[1645:1675],
forms[1675:1705],
forms[1705:1714],
forms[1714:1723],
forms[1723:1727],
forms[1727:1731],
forms[1731:1733],
forms[1733:1735],
forms[1735:1737],
forms[1737:1739],
forms[1739:1741],
forms[1741:1743],
forms[1743:1770],
forms[1770:1797],
forms[1797:1824],
forms[1824:1851],
forms[1851:1878],
forms[1878:1905],
forms[1905:1932],
forms[1932:1959],
forms[1959:1963],
forms[1963:1967],
forms[1967:1971],
forms[1971:1975],
forms[1975:1976],
forms[1976:1988],
forms[1988:1994],
forms[1994:1997],
forms[1997:2003],
forms[2003:2006],
forms[2006:2007],
forms[2007:2025],
forms[2025:2031],
forms[2031:2034],
forms[2034:2040],
forms[2040:2043],
forms[2043:2055],
forms[2055:2069],
forms[2069:2093],
forms[2093:2117],
forms[2117:2125],
forms[2125:2133],
forms[2133:2136],
forms[2136:2139],
forms[2139:2157],
forms[2157:2175],
forms[2175:2202],
forms[2202:2232],
forms[2232:2244],
forms[2244:2253],
forms[2253:2262],
forms[2262:2274],
forms[2274:2283],
forms[2283:2292],
forms[2292:2322],
forms[2322:2334],
forms[2334:2343],
forms[2343:2352],
forms[2352:2382],
forms[2382:2403],
forms[2403:2433],
forms[2433:2463],
forms[2463:2484],
forms[2484:2514],
forms[2514:2544],
forms[2544:2574],
forms[2574:2604],
forms[2604:2616],
forms[2616:2625],
forms[2625:2634],
forms[2634:2637],
forms[2637:2640],
forms[2640:2649],
forms[2649:2652],
forms[2652:2655],
forms[2655:2657],
forms[2657:2660],
forms[2660:2663],
forms[2663:2666],
forms[2666:2675],
forms[2675:2678],
forms[2678:2681],
forms[2681:2684],
forms[2684:2687],
forms[2687:2699],
forms[2699:2708],
forms[2708:2717],
forms[2717:2747],
forms[2747:2759],
forms[2759:2768],
forms[2768:2777],
forms[2777:2807],
forms[2807:2837],
forms[2837:2867],
forms[2867:2897],
forms[2897:2927],
forms[2927:2930],
forms[2930:2933],
forms[2933:2936],
forms[2936:2939],
forms[2939:2942],
forms[2942:2945],
forms[2945:2948],
forms[2948:2951],
forms[2951:2978],
forms[2978:3008],
forms[3008:3038],
forms[3038:3050],
forms[3050:3059],
forms[3059:3068],
forms[3068:3070],
forms[3070:3073],
forms[3073:3076],
forms[3076:3079],
forms[3079:3097],
forms[3097:3127],
forms[3127:3157],
forms[3157:3166],
forms[3166:3175],
forms[3175:3177],
forms[3177:3181],
forms[3181:3193],
forms[3193:3205],
forms[3205:3223],
forms[3223:3241],
forms[3241:3243],
forms[3243:3255],
forms[3255:3261],
forms[3261:3273],
forms[3273:3279],
forms[3279:3281],
forms[3281:3293],
forms[3293:3299],
forms[3299:3311],
forms[3311:3317],
forms[3317:3319],
forms[3319:3349],
forms[3349:3379],
forms[3379:3388],
forms[3388:3397],
forms[3397:3427],
forms[3427:3457],
forms[3457:3466],
forms[3466:3475],
forms[3475:3505],
forms[3505:3535],
forms[3535:3544],
forms[3544:3553],
forms[3553:3583],
forms[3583:3613],
forms[3613:3622],
forms[3622:3631],
forms[3631:3661],
forms[3661:3691],
forms[3691:3721],
forms[3721:3751],
forms[3751:3781],
forms[3781:3811],
forms[3811:3841],
forms[3841:3871],
forms[3871:3880],
forms[3880:3889],
forms[3889:3919],
forms[3919:3949],
forms[3949:3958],
forms[3958:3967],
forms[3967:3997],
forms[3997:4027],
forms[4027:4036],
forms[4036:4045],
forms[4045:4075],
forms[4075:4105],
forms[4105:4135],
forms[4135:4165],
forms[4165:4195],
forms[4195:4225],
forms[4225:4255],
forms[4255:4285],
forms[4285:4294],
forms[4294:4303],
forms[4303:4333],
forms[4333:4363],
forms[4363:4372],
forms[4372:4381],
forms[4381:4411],
forms[4411:4441],
forms[4441:4450],
forms[4450:4459],
forms[4459:4489],
forms[4489:4519],
forms[4519:4528],
forms[4528:4537],
forms[4537:4567],
forms[4567:4597],
forms[4597:4606],
forms[4606:4615],
forms[4615:4645],
forms[4645:4675],
forms[4675:4684],
forms[4684:4693],
forms[4693:4699],
forms[4699:4705],
forms[4705:4711],
forms[4711:4717],
forms[4717:4723],
forms[4723:4729],
forms[4729:4733],
forms[4733:4737],
forms[4737:4742],
forms[4742:4747],
forms[4747:4752],
forms[4752:4757],
forms[4757:4787],
forms[4787:4817],
forms[4817:4826],
forms[4826:4835],
forms[4835:4865],
forms[4865:4895],
forms[4895:4904],
forms[4904:4913],
forms[4913:4917],
forms[4917:4921],
forms[4921:4925],
forms[4925:4929],
forms[4929:4931],
forms[4931:4943],
forms[4943:4949],
forms[4949:4961],
forms[4961:4967],
forms[4967:4969],
forms[4969:4981],
forms[4981:4987],
forms[4987:4999],
forms[4999:5005],
forms[5005:5007],
forms[5007:5009],
forms[5009:5010],
forms[5010:5011],
forms[5011:5015],
forms[5015:5019],
forms[5019:5049],
forms[5049:5079],
forms[5079:5088],
forms[5088:5097],
forms[5097:5127],
forms[5127:5157],
forms[5157:5166],
forms[5166:5175],
forms[5175:5202],
forms[5202:5229],
forms[5229:5233],
forms[5233:5251],
forms[5251:5257],
forms[5257:5284],
forms[5284:5311],
forms[5311:5317],
forms[5317:5344],
forms[5344:5371],
forms[5371:5398],
forms[5398:5425],
forms[5425:5426],
forms[5426:5428],
forms[5428:5430],
forms[5430:5431],
forms[5431:5433],
forms[5433:5435],
forms[5435:5437],
forms[5437:5439],
forms[5439:5442],
forms[5442:5445],
forms[5445:5448],
forms[5448:5451],
forms[5451:5456],
forms[5456:5464],
forms[5464:5482],
forms[5482:5500],
forms[5500:5508],
forms[5508:5535],
forms[5535:5562],
forms[5562:5566],
forms[5566:5596],
forms[5596:5626],
forms[5626:5635],
forms[5635:5644],
forms[5644:5671],
forms[5671:5698],
forms[5698:5716],
forms[5716:5743],
forms[5743:5770],
forms[5770:5788],
forms[5788:5815],
forms[5815:5833],
forms[5833:5860],
forms[5860:5878],
forms[5878:5896],
forms[5896:5923],
forms[5923:5950],
forms[5950:5968],
forms[5968:5986],
forms[5986:6004],
forms[6004:6022],
forms[6022:6040],
forms[6040:6058],
forms[6058:6062],
forms[6062:6089],
forms[6089:6093],
forms[6093:6120],
forms[6120:6147],
forms[6147:6174],
forms[6174:6192],
forms[6192:6210],
forms[6210:6214],
forms[6214:6232],
forms[6232:6259],
forms[6259:6286],
forms[6286:6304],
forms[6304:6308],
forms[6308:6312],
forms[6312:6339],
forms[6339:6366],
forms[6366:6369],
forms[6369:6372],
forms[6372:6399],
forms[6399:6426],
forms[6426:6428],
forms[6428:6440],
forms[6440:6458],
forms[6458:6474],
forms[6474:6496],
forms[6496:6518],
forms[6518:6534],
forms[6534:6536],
forms[6536:6538],
forms[6538:6554],
forms[6554:6576],
forms[6576:6598],
forms[6598:6614],
forms[6614:6616],
forms[6616:6618],
forms[6618:6636],
forms[6636:6648],
forms[6648:6666],
forms[6666:6684],
forms[6684:6696],
forms[6696:6708],
forms[6708:6726],
forms[6726:6744],
forms[6744:6771],
forms[6771:6798],
forms[6798:6800],
forms[6800:6802],
forms[6802:6820],
forms[6820:6838],
forms[6838:6856],
forms[6856:6883],
forms[6883:6910],
forms[6910:6937],
forms[6937:6964],
forms[6964:6982],
forms[6982:7036],
forms[7036:7090],
forms[7090:7126],
forms[7126:7144],
forms[7144:7180],
forms[7180:7198],
forms[7198:7225],
forms[7225:7252],
forms[7252:7279],
forms[7279:7306],
forms[7306:7324],
forms[7324:7342],
forms[7342:7360],
forms[7360:7378],
forms[7378:7380],
forms[7380:7382],
forms[7382:7384],
forms[7384:7386],
forms[7386:7391],
forms[7391:7396],
forms[7396:7401],
forms[7401:7406],
forms[7406:7410],
forms[7410:7414],
forms[7414:7418],
forms[7418:7420],
forms[7420:7424],
forms[7424:7428],
forms[7428:7432],
forms[7432:7434],
forms[7434:7436],
forms[7436:7438],
forms[7438:7440],
forms[7440:7467],
forms[7467:7494],
forms[7494:7521],
forms[7521:7548],
forms[7548:7566],
forms[7566:7584],
forms[7584:7588],
forms[7588:7592],
forms[7592:7610],
forms[7610:7637],
forms[7637:7664],
forms[7664:7682],
forms[7682:7700],
forms[7700:7727],
forms[7727:7754],
forms[7754:7772],
forms[7772:7790],
forms[7790:7817],
forms[7817:7844],
forms[7844:7862],
forms[7862:7880],
forms[7880:7907],
forms[7907:7934],
forms[7934:7952],
forms[7952:7955],
forms[7955:7958],
forms[7958:7976],
forms[7976:7994],
forms[7994:7997],
forms[7997:8000],
forms[8000:8003],
forms[8003:8006],
forms[8006:8008],
forms[8008:8011],
forms[8011:8029],
forms[8029:8047],
forms[8047:8065],
forms[8065:8083],
forms[8083:8101],
forms[8101:8119],
forms[8119:8137],
forms[8137:8155],
forms[8155:8173],
forms[8173:8191],
forms[8191:8209],
forms[8209:8227],
forms[8227:8245],
forms[8245:8263],
forms[8263:8281],
forms[8281:8299],
forms[8299:8317],
forms[8317:8335],
forms[8335:8353],
forms[8353:8371],
forms[8371:8389],
forms[8389:8392],
forms[8392:8410],
forms[8410:8428],
forms[8428:8446],
forms[8446:8464],
forms[8464:8482],
forms[8482:8500],
forms[8500:8518],
forms[8518:8545],
forms[8545:8563],
forms[8563:8581],
forms[8581:8599],
forms[8599:8626],
forms[8626:8653],
forms[8653:8671],
forms[8671:8698],
forms[8698:8725],
forms[8725:8734],
forms[8734:8743],
forms[8743:8747],
forms[8747:8774],
forms[8774:8801],
forms[8801:8828],
forms[8828:8855],
forms[8855:8882],
forms[8882:8909],
forms[8909:8936],
forms[8936:8963],
forms[8963:8990],
forms[8990:9017],
forms[9017:9023],
forms[9023:9026],
forms[9026:9029],
forms[9029:9032],
forms[9032:9035],
forms[9035:9053],
forms[9053:9080],
forms[9080:9098],
forms[9098:9116],
forms[9116:9120],
forms[9120:9124],
forms[9124:9128],
forms[9128:9173],
forms[9173:9179],
forms[9179:9224],
forms[9224:9251],
forms[9251:9278],
forms[9278:9296],
forms[9296:9332],
forms[9332:9377],
forms[9377:9422],
forms[9422:9449],
forms[9449:9476],
forms[9476:9494],
forms[9494:9530],
forms[9530:9575],
forms[9575:9581],
forms[9581:9626],
forms[9626:9653],
forms[9653:9680],
forms[9680:9698],
forms[9698:9734],
forms[9734:9752],
forms[9752:9779],
forms[9779:9806],
forms[9806:9824],
forms[9824:9842],
forms[9842:9860],
forms[9860:9878],
forms[9878:9896],
forms[9896:9923],
forms[9923:9950],
forms[9950:9954],
forms[9954:9966],
forms[9966:9984],
forms[9984:10002],
forms[10002:10014],
forms[10014:10026],
forms[10026:10044],
forms[10044:10062],
forms[10062:10074],
forms[10074:10092],
forms[10092:10119],
forms[10119:10146],
forms[10146:10164],
forms[10164:10182],
forms[10182:10209],
forms[10209:10236],
forms[10236:10254],
forms[10254:10258],
forms[10258:10285],
forms[10285:10312],
forms[10312:10342],
forms[10342:10372],
forms[10372:10381],
forms[10381:10390],
forms[10390:10417],
forms[10417:10444],
forms[10444:10450],
forms[10450:10456],
forms[10456:10468],
forms[10468:10480],
forms[10480:10489],
forms[10489:10498],
forms[10498:10502],
forms[10502:10504],
forms[10504:10531],
forms[10531:10558],
forms[10558:10564],
forms[10564:10570],
forms[10570:10600],
forms[10600:10630],
forms[10630:10639],
forms[10639:10648],
forms[10648:10652],
forms[10652:10656],
forms[10656:10658],
forms[10658:10660],
forms[10660:10687],
forms[10687:10714],
forms[10714:10720],
forms[10720:10726],
forms[10726:10738],
forms[10738:10750],
forms[10750:10759],
forms[10759:10768],
forms[10768:10772],
forms[10772:10774],
forms[10774:10804],
forms[10804:10834],
forms[10834:10843],
forms[10843:10852],
forms[10852:10855],
forms[10855:10858],
forms[10858:10861],
forms[10861:10864],
forms[10864:10882],
forms[10882:10900],
forms[10900:10918],
forms[10918:10936],
forms[10936:10963],
forms[10963:10990],
forms[10990:11020],
forms[11020:11050],
forms[11050:11059],
forms[11059:11068],
forms[11068:11069],
forms[11069:11099],
forms[11099:11129],
forms[11129:11138],
forms[11138:11147],
forms[11147:11151],
forms[11151:11155],
forms[11155:11158],
forms[11158:11161],
forms[11161:11188],
forms[11188:11215],
forms[11215:11242],
forms[11242:11269],
forms[11269:11296],
forms[11296:11323],
forms[11323:11324],
forms[11324:11325],
forms[11325:11327],
forms[11327:11329],
forms[11329:11331],
forms[11331:11333],
forms[11333:11336],
forms[11336:11341],
forms[11341:11346],
forms[11346:11351],
forms[11351:11352],
forms[11352:11353],
forms[11353:11359],
forms[11359:11367],
forms[11367:11369],
forms[11369:11371],
forms[11371:11379],
forms[11379:11387],
}